Patent Description:
Various types of devices may utilize driven switches, such as solid state driven switches, thyristors, or other types of switches. A driven switch may be turned on or off based upon energy applied to a gate of the driven switch or to a control terminal of a thyristor. The driven switch may have a particular safe operating area corresponding to voltage and current conditions at which the driven switch can operate without self-damage, which can be affected by how quickly the driven switch is turned on. The driven switch could be damaged by a high inrush current based on load and/or from the driven switch being turned on too slowly. When a device has a relatively weak power source (e.g., a voltage source of about <NUM> volts or some other low voltage), the power from the weak power source may not be capable of turning the driven switch on fast enough in order to avoid damaging the driven switch.

<CIT> discloses an apparatus according to the preamble of claim <NUM>.

This Summary is not intended to identify key factors or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.

An apparatus as defined in claim <NUM> and a method as defined in claim <NUM> are provided. The dependent claims define further embodiments.

In an embodiment of the techniques presented herein, an apparatus is provided. The apparatus comprises a power source and a buffer capacitor. A first switch is connected between the buffer capacitor and a control terminal of a driven switch. The buffer capacitor is connected to and charged by the power source when the first switch is turned off. A comparator monitors the charging of the buffer capacitor. In response to the buffer capacitor reaching a threshold amount of charge, the comparator turns on the first switch to initiate a charge redistribution of charge from the buffer capacitor to the driven switch. The apparatus further comprises a second switch to operably connect and disconnect the buffer capacitor from the power source, wherein the comparator turns off the second switch after a delay from a point in time when the first switch is turned on to initiate the charge redistribution.

In an embodiment of the techniques presented herein, a method is provided. The method includes opening a first switch connecting a buffer capacitor to a control terminal of a driven switch. A second switch connecting the buffer capacitor to a power source is closed. The power source is turned on to charge the buffer capacitor while the first switch is open and the second switch is closed. A comparator monitors the charging of the buffer capacitor to determine whether a threshold has been reached. In response to the threshold being reached, the comparator closes the first switch to initiate a charge redistribution of charge from the buffer capacitor to the driven switch and opens the second switch after a delay from initiating the charge redistribution.

To the accomplishment of the foregoing and related ends, the following description and annexed drawings set forth certain illustrative aspects and implementations. These are indicative of but a few of the various ways in which one or more aspects may be employed. Other aspects, advantages, and novel features of the disclosure will become apparent from the following detailed description when considered in conjunction with the annexed drawings.

The claimed subject matter is now described with reference to the drawings, wherein like reference numerals are used to refer to like elements throughout. In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the claimed subject matter. It may be evident, however, that the claimed subject matter may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form in order to facilitate describing the claimed subject matter.

Within the field of electronics, an apparatus comprises a driven switch, such as a solid state switch or a thyristor, which is to be controlled within a safe operating area of the driven switch. The safe operating area of the driven switch corresponds to voltage and current characteristics under which the driven switch can safely operate without being damaged. Safely operating the driven switch can be problematic where energy sourcing capabilities of the apparatus for controlling the driven switch (e.g., controlling a gate of a solid state switch, powering a control terminal of a thyristor, etc.) is limited such as due to a weak power source. In some embodiments, the weak power source may have a nominal voltage such as around <NUM> volts, <NUM> volts, or some other voltage. The limited amount of energy being transferred by the weak power source to the driven switch can result in a long turn on phase of the driven switch, which can damage the driven switch. Thus, the shorter the turn on phase for the driven switch, the lower the risk of damaging or destroying the driven switch.

A dedicated gate driver may be used to control the gate of a driven switch in a safe manner where the gate is driven high only when an energy supply has reached a sufficient level. This requires the generation of a control signal that is coupled to the input of the gate driver. The control signal is used to determine the activation of the driven switch. Besides requiring the control signal, the gate driver may require the generation of a strong power supply just for the gate driver. Thus, the use of a dedicated gate driver is not a desirable solution. Another solution relates to the use of isolated or non-isolated power sources that provide enough current to charge the gate fast enough that the driven switch is not damaged. Similar to the dedicated gate driver, this solution requires additional power sources, and thus is not desirable.

The techniques provided herein are capable of safely controlling driven switches such as solid state driven switches (e.g., SI or SiC metal-oxide-semiconductor field-effect transistors (MOSFETs), insulated-gate bioplar transistors (IGBTs), etc.) and/or thyristors in devices where the power source does not provide enough energy to safely turn on the driven switch in a timely manner without potentially damaging the driven switch. In particular, a charge storage element, such as a buffer capacitor, may be charged by the power source up to a threshold level before at least some of the charge of the charge storage element is redistributed. The charge redistribution is performed through one or more switches (e.g., a low ohmic controlled switch) connecting the charge storage element to the driven switch. The charge redistribution from the charge storage element increases the speed at which driven switch is turned on so that the driven switch is turned on fast enough so that the driven switch is not otherwise damaged.

In some embodiments of safely turning on a driven switch of an apparatus, the apparatus comprises a power source configured to provide energy to the apparatus for driving the driven switch. The power source (e.g., a voltage source with a nominal voltage such as <NUM> volts, <NUM> volts, or some other voltage) alone may not provide enough energy to safely turn the driven switch on in a timely manner. Accordingly, the apparatus comprises a first switch connecting a buffer capacitor (a charge storage element) to the driven switch, such as to a gate of the driven switch or to a control terminal of a thyristor. In some embodiments, the buffer capacitor is sized between <NUM> to <NUM> times a gate capacitance of the driven switch, such as sized within a range from several hundreds of pF to a few hundreds of nF. The buffer capacitor is connected to the power source and is charged by the power source when the first switch is turned off. The apparatus comprises a comparator that monitors the charging of the buffer capacitor in relation to a threshold. In some embodiments, the voltage Vcbuf across the buffer capacitor at the comparator decision point ensures that right after charge redistribution, the voltage level at the gate Vgate=Cgate/(Cbuf+Cgate)*Vcbuf is larger than a critical Vgate_crit voltage level determined according to the switch SOA. Since Vgate_crit, Cgate, Cbuf are known parameters, then Vcbuf threshold can be determined. Cgate may be adjusted, but in general Cgate = f(Vgate).

When the comparator determines that the buffer capacitor has reached a threshold amount of charge for safely turning on the driven switch (e.g., driving the gate of the driven switch), the first switch is turned on to initiate a charge redistribution from the buffer capacitor to the driven switch for safely turning on the driven switch fast enough that the driven switch is not damaged. The comparator may determine that the buffer capacitor has reached the threshold amount of charge by comparing a voltage across the buffer capacitor with a reference voltage. In response to the comparator determining that the voltage across the buffer capacitor has reached the level of the reference voltage, then the comparator turns on the first switch to initiate the charge redistribution to turn on the driven switch (e.g., charge the gate of the driven switch).

The apparatus includes a second switch. The second switch is controlled to disconnect the buffer capacitor from the power source at a particular point in time after the first switch is closed and the charge redistribution has been initiated and carried out until transient settling. The second switch disconnects the buffer capacitor after a delay (e.g., delay in the µs range) from when the charge redistribution is initiated. The delay corresponds to a time period of the charge redistribution where the charge redistribution can adequately charge the gate of the driven switch or adequately transfer current to the control terminal of the thyristor for turning the driven switch on in a timely manner. In this way, the second switch is opened to disconnect the buffer capacitor from the power source so that the buffer capacitor is not needlessly charged in parallel to the driven switch by the power source.

<FIG> illustrates an an apparatus <NUM> which is not a claimed embodiment and comprising a driven switch <NUM>. The apparatus <NUM> comprises a power source VSUP <NUM> (e.g., a voltage source or some other power/energy source) with an associated equivalent power source resistance RSUP <NUM> having a resistance in the mega ohm range. The power source VSUP <NUM> (e.g., a 15V voltage power source, a 16V voltage power source, or other power source with some other voltage) may be a relatively weak power source due to the equivalent power source resistance RSUP <NUM>. That is, the equivalent power source resistance RSUP <NUM> may be relatively high, which reduces the power output by the power source VSUP <NUM>. The power source VSUP <NUM>, combined with the equivalent power source resistance RSUP <NUM>, may not provide enough energy to drive a gate of the driven switch <NUM> fast enough so that the driven switch <NUM> does not incur damage from the driven switch <NUM> being turned on too slowly. To improve the turn on time of the driven switch <NUM>, the apparatus <NUM> includes a buffer capacitor <NUM> that is used as a charge storage element. The apparatus <NUM> comprises a first switch S1 <NUM> connected between the buffer capacitor <NUM> and the driven switch <NUM>.

The power source VSUP <NUM> and the equivalent power source resistance RSUP <NUM> may be located on an input chip of a gate driver, and remaining components (circuitry) of apparatus <NUM> may be located on an output chip of the gate driver. In this implementation, the power source VSUP <NUM> couples to the remaining components of apparatus <NUM> via an isolation barrier for charging the buffer capacitor <NUM>. A latch <NUM>, illustrated and discussed in conjunction with <FIG>, may be reset by decoupling the power source VSUP <NUM> from the remaining components of apparatus <NUM>.

The buffer capacitor <NUM> is connected to and is charged by the power source VSUP <NUM> when the first switch S1 <NUM> is turned off. The apparatus <NUM> comprises a comparator <NUM> that monitors the charging of the buffer capacitor <NUM> by the power source VSUP <NUM> when the first switch S1 <NUM> is turned off. For example, the comparator <NUM> may compare a voltage across the buffer capacitor <NUM> with a reference voltage VREF <NUM>. In response to the comparator <NUM> determining that the voltage across the buffer capacitor <NUM> has reached the level of the reference voltage VREF <NUM>, then the comparator <NUM> turns on the first switch S1 <NUM> in order to connect the buffer capacitor <NUM> to the driven switch <NUM>. The first switch S1 <NUM> is turned on to initiate a charge redistribution of charge from the buffer capacitor <NUM> to the gate of the driven switch <NUM> or to a control terminal of a thyristor in order to turn it on. In this way, the buffer capacitor <NUM> transfers charge during the charge redistribution to be added to the driven switch <NUM> (e.g., transfer charge to an equivalent gate capacitance of the driven switch <NUM>) for operating the driven switch <NUM>. The driven switch <NUM> is turned on fast enough for safe operation of the driven switch <NUM> because the charge redistribution provides additional charge, in addition to that of the power source VSUP <NUM>, to the driven switch <NUM> in comparison to if only the power source VSUP <NUM> was used for supplying energy to the driven switch <NUM>. In some cases where the driven switch <NUM> is a thyristor, the charge redistribution transfers charge current to a control terminal of the thyristor to control the thyristor.

<FIG> illustrates hysteresis functionality built into the comparator <NUM>. The hysteresis functionality may be set so that Vhsyt_high > Vhsyt_low, where Vhsyt_high is the threshold of Vcbuf at which S1 <NUM> is closed and Vhsyt_low is the threshold of Vcbuf at which S1 <NUM> is open. The hysteresis functionality is implemented such that the switch S1 <NUM> is closed if Vcbuf > Vhyst_high and opened again if Vcbuf < Vhyst_low or the power source VSUP is disconnected. <FIG> illustrates a latch <NUM> connected to the output of the comparator <NUM>. The latch <NUM> is operated such that when the first switch S1 <NUM> is closed, the first switch S1 <NUM> remains closed until the power source VSUP <NUM> is disconnected. The latch <NUM> is only reset once the power source VSUP <NUM> is disconnected.

In some cases, the comparator <NUM>, the first switch <NUM>, and/or the reference voltage VREF <NUM> may be implemented as an integrated circuit, illustrated by dashed line <NUM>. In some cases, the buffer capacitor <NUM> may be dimensioned such that after the charge redistribution of charge from the buffer capacitor <NUM> to the driven switch <NUM>, a drive voltage at the driven switch may be higher than a critical level.

<FIG> illustrates an embodiment of an apparatus <NUM> comprising a driven switch <NUM>. The apparatus <NUM> comprises a power source VSUP <NUM> with an associated equivalent power source resistance RSUP <NUM> having a resistance in the mega ohm range. The power source VSUP <NUM> (e.g., a 15V voltage power source, a 16V voltage power source, or other power source with some other voltage) may be a relatively weak power source due to the equivalent power source resistance RSUP <NUM>. The power source VSUP <NUM>, combined with the equivalent power source resistance <NUM>, may not provide enough energy to control such as open the driven switch <NUM> fast enough so that the driven switch <NUM> does not incur damage from the driven switch <NUM> being turned on too slowly. To improve the turn on time of the driven switch <NUM>, the apparatus <NUM> includes a buffer capacitor <NUM> that is used as a charge storage element. The apparatus <NUM> comprises a first switch S1 <NUM> connected between the buffer capacitor <NUM> and the driven switch <NUM>. The apparatus <NUM> comprises a second switch S2 <NUM> that operably connects and disconnects the buffer capacitor <NUM> from the power source VSUP <NUM>.

The buffer capacitor <NUM> is connected to and is charged by the power source VSUP <NUM> when the first switch S1 <NUM> is turned off and the second switch S2 <NUM> is turned on. In some embodiments, a comparator <NUM> turns on the second switch S2 <NUM> and turns off the first switch S1 <NUM> in order to connect the buffer capacitor <NUM> to the power source VSUP <NUM>. The buffer capacitor <NUM> is connected to the power source VSUP <NUM> so that the power source VSUP <NUM> can charge the buffer capacitor <NUM>. The comparator <NUM> monitors the charging of the buffer capacitor <NUM> by the power source VSUP <NUM> when the first switch S1 <NUM> is turned off and the second switch S2 <NUM> is turned on. For example, the comparator <NUM> may compare a voltage across the buffer capacitor <NUM> with a reference voltage VREF <NUM>. In response to the comparator <NUM> determining that the voltage across the buffer capacitor <NUM> has reached the level of the reference voltage VREF <NUM>, then the comparator <NUM> turns on the first switch S1 <NUM> and/or turns off the second switch S2 <NUM>.

The first switch S1 <NUM> and/or the second switch S2 <NUM> are both turned and kept on for a time duration which is sufficient to initiate and carry on a charge redistribution from the buffer capacitor <NUM> to the driven switch <NUM> in order to turn on the driven switch <NUM>. In this way, the buffer capacitor <NUM> transfers charge during the charge redistribution to the driven switch <NUM> (e.g., transfer charge to an equivalent gate capacitance of the driven switch <NUM>) for operating the driven switch <NUM>. The driven switch <NUM> is turned on fast enough for safe operation of the driven switch <NUM> because the charge redistribution provides additional charge, in addition to that of the power source VSUP <NUM>, to the driven switch <NUM> in comparison to if only the power source VSUP <NUM> was used for supplying energy to the driven switch <NUM>.

The comparator <NUM> may turn off the second switch S2 <NUM>, such as through a logic inverter <NUM>, after a delay <NUM> (a delay implemented by delay circuitry) from a point in time when the first switch S1 <NUM> was turned on to initiate the charge redistribution. If the switch control for the first switch S1 <NUM> and the second switch S2 <NUM> is active high, then the logic inverter <NUM> provides inverted control signals to the first switch S1 <NUM> and the second switch S2 <NUM>. In some embodiments, the delay <NUM> may correspond to a timeframe for the charge redistribution to charge an equivalent gate capacitance of the gate of the driven switch <NUM> or to transfer current to the control terminal of the thyristor for operating, such as turning on, the driven switch <NUM>. The second switch S2 <NUM> is turned off, such as after the charge redistribution has settled, by the comparator <NUM> in order to disconnect the buffer capacitor <NUM> from the power source VSUP <NUM>. In this way, energy from the power source VSUP <NUM> is not wasted in charging the buffer capacitor <NUM> after the equivalent gate capacitance or the control terminal has been charged by the buffer capacitor <NUM>.

The comparator <NUM> may turn off the second switch <NUM> after a timespan. The timespan may correspond to a time for the charge redistribution to charge the gate of the driven switch <NUM> (e.g., charge the equivalent gate capacitance of the driven switch <NUM>) for operating the driven switch <NUM> such as to turn on the driven switch <NUM>. Once the charge redistribution between the buffer capacitor <NUM> and the switch gate capacitance has settled (the timespan has occurred), the comparator <NUM> turns off the second switch <NUM> in order to disconnect the buffer capacitor <NUM> from the driven switch <NUM>.

In some embodiments, the comparator <NUM>, the first switch S1 <NUM>, the second switch S2 <NUM>, the logic inverter <NUM>, the delay <NUM> (delay circuitry), and/or the reference voltage VREF <NUM> may be implemented as an integrated circuit, illustrated by dashed line <NUM>. In some embodiments, the buffer capacitor <NUM> may be dimensioned such that after the charge redistribution of charge from the buffer capacitor <NUM> to the driven switch <NUM>, a drive voltage at the driven switch may be higher than a critical level.

<FIG> illustrates hysteresis functionality built into the comparator <NUM>. The hysteresis functionality may be set so that Vhsyt_high > Vhsyt_low, where Vhsyt_high is the threshold of Vcbuf at which S1 <NUM> is closed and Vhsyt_low is the threshold of Vcbuf at which S1 <NUM> is open. The hysteresis functionality is implemented such that the switch S1 <NUM> is closed if Vcbuf > Vhyst_high and opened again if Vcbuf < Vhyst_low or the power source VSUP is disconnected. <FIG> illustrates a latch <NUM> connected to the output of the comparator <NUM>. The latch <NUM> is operated such that when the first switch S1 <NUM> is closed, the first switch S1 <NUM> remains closed until the power source VSUP <NUM> is disconnected. The latch <NUM> is only reset once the power source VSUP <NUM> is disconnected. <FIG> illustrates a logic block <NUM> connected between the output of the comparator <NUM> and the first switch S1 <NUM> and the second switch S2 <NUM>. In this embodiment, the logic block <NUM> is connected to the output of the comparator <NUM> (with or without hysteresis) in order to allow full charge redistribution settling after closing the first switch S1 <NUM> and before opening the second switch S2 <NUM>. After closing the first switch S1 <NUM>, whose closed status is ensured by the latch <NUM> (e.g., latch of logic block <NUM>) or by the hysteresis functionality, the opening of the second switch S2 <NUM> can be determined based on a sufficient delay or on a different voltage level VGATE_SW > VHYST_HIGH. Moreover, if the first switch S1 <NUM> is latched ON, the second switch S2 <NUM> may be closed (and possibly latched) again if a sufficient voltage VGATE_SW > VHYST_HIGH is reached.

<FIG> illustrates an apparatus <NUM> comprising a driven switch <NUM>. The apparatus <NUM> comprises a power source VSUP <NUM> with an associated equivalent power source resistance RSUP <NUM> having a resistance in a mega ohm range. The power source VSUP <NUM> alone may not provide enough energy to operate the driven switch <NUM> fast enough so that the driven switch <NUM> does not incur damage from the driven switch <NUM> being turned on too slowly. To improve the turn on time of the driven switch <NUM>, the apparatus <NUM> includes a buffer capacitor <NUM> that is used as a charge storage element. The apparatus <NUM> comprises a switch S1 <NUM> connected between the buffer capacitor <NUM> and the driven switch <NUM>. The apparatus <NUM> comprises a switch S2 <NUM> that operably connects and disconnects the buffer capacitor <NUM> from the power source VSUP <NUM>.

The apparatus <NUM> comprises a first current steering switch NMSW1 <NUM> and a second current steering switch NMSW2 <NUM>. The first current steering switch NMSW1 <NUM> and the second current steering switch NMSW2 <NUM> may be controlled to steer current IBIAS <NUM> either in a first direction to turn on the switch S1 <NUM> or in a second direction to turn on the switch S2 <NUM>. A comparator <NUM> is configured to control the first current steering switch NMSW1 <NUM> and the second current steering switch NMSW2 <NUM> for steering the current IBIAS <NUM>, such as where the switch S1 <NUM> is turned on during a first timespan and the switch S2 <NUM> is turned off during a second timespan longer than the first timespan.

In some embodiments, the apparatus <NUM> comprises a voltage divider <NUM> (or a signal conditioning block) located between an input of the comparator <NUM> and power source VSUP <NUM>. In some embodiments, the comparator <NUM> may comprise a hysteretic comparator that uses a first voltage reference <NUM> and a second voltage reference <NUM> to set a hysteresis, as illustrated by <FIG>. It may be appreciated that other types of comparators may also be utilized.

Before the comparator <NUM> detects a voltage threshold at the buffer capacitor <NUM>, an output voltage level of the comparator <NUM> is low so that the second current steering switch NMSW2 <NUM> is closed. The current IBIAS <NUM> is steered by a logic inverter <NUM> through the second current steering switch NMSW2 <NUM> to RPU2 <NUM> so that the switch S2 <NUM> is turned on. Since the power source VSUP <NUM> may be relatively weak, a voltage rise across the buffer capacitor <NUM> is expected to be slow and the turn on time of switch S2 <NUM> is not a limited factor, in some embodiments. Hence the current IBIAS <NUM> consumed to turn on the switch S2 <NUM> on through RPU2 <NUM> can be low and RPU2 <NUM> can be relatively high ohmic. In some embodiments, a low biasing current and low power building blocks may be desired since the weak power source VSUP <NUM> may be the only power source in the apparatus <NUM> that can be used for supplying energy to the low power building blocks of the apparatus <NUM>. Otherwise, if the low power building blocks required a high current, then the voltage drop across the equivalent power source resistance RSUP <NUM> may be high and the settling voltage for the gate drive may be insufficient.

If the comparator <NUM> detects the voltage threshold, the current IBIAS <NUM> is steered away from RPU2 <NUM> and is steered towards RPUPD1 <NUM> by closing the first current steering switch NMSW1 <NUM> and opening the second current steering switch NMSW2 <NUM>. While RPU2 <NUM> slowly discharges the gate of switch S2 <NUM>, switch PD1 <NUM> quickly charges the gate of switch S1 <NUM>, so that the charge redistribution between the buffer capacitor <NUM> and the driven switch <NUM> can occur through switch S2 <NUM> not yet turned off, and thus switch S1 <NUM> may be quickly turned on. The turn on speed of switch S1 <NUM> can be optionally further increased by injecting a time limited current pulse towards RPUPD1 <NUM>. In some embodiments, this may be achieved by coupling the rising voltage at the output of the comparator <NUM> through the capacitor CHP <NUM> to a current mirror consisting of N-type metal-oxide-semiconductors (NMOS)es NMM1 <NUM>, NMM2 <NUM>, and resistor RHP <NUM>, with the capacitor CHP <NUM> and the resistor RHP <NUM> forming a high pass filter. The duration of this current pulse is determined by a time constant set by the capacitor CHP <NUM> and the resistor RHP <NUM>, which is set to be short enough that the necessary charge to drive the gate of PD1 <NUM> is also just instantaneously taken from the buffer capacitor <NUM> and not from the weak power source VSUP <NUM>. The parallel charging of buffer capacitor <NUM> and the gate of the driven switch <NUM> continues until RPU2 <NUM> pulls the driving voltage at the gate of switch S2 <NUM> below its threshold voltage. At that point, the switch S2 <NUM> is off and the buffer capacitor <NUM> is disconnected from the gate of the driven switch <NUM>. Thus, the weak power source VSUP <NUM> is merely charging the gate of the driven switch <NUM> and not the buffer capacitor <NUM>.

<FIG> illustrates a method <NUM> for powering a gate of a driven switch, which is described in conjunction with the apparatus <NUM> of <FIG> for illustrative purposes. In some embodiments, the method <NUM> is performed to control the driven switch <NUM> through the operation of the comparator <NUM>, the first switch S1 <NUM>, and the second switch <NUM> so that the buffer capacitor <NUM> performs a charge redistribution to transfer charge from the buffer capacitor <NUM> to the driven switch <NUM>.

In some embodiments, the first switch <NUM> may be initially closed to connect the buffer capacitor <NUM> to the driven switch <NUM>. In some embodiments, the second switch <NUM> may be initially open to disconnect the buffer capacitor <NUM> from the power source VSUP <NUM>. During operation <NUM> of method <NUM>, the first switch <NUM> is opened in order to disconnect the buffer capacitor <NUM> from the driven switch <NUM>. In some embodiments, the first switch <NUM> is opened (turned off) by the comparator <NUM> based upon a determination that the buffer capacitor <NUM> is to be charged by the power source VSUP <NUM>. During operation <NUM> of method <NUM>, the second switch <NUM> is closed in order to connect the buffer capacitor <NUM> to the power source VSUP <NUM>. In some embodiments, the second switch <NUM> is closed (turned on) by the comparator <NUM> based upon the determination that the buffer capacitor <NUM> is to be charged by the power source VSUP <NUM>.

During operation <NUM> of method <NUM>, the power source VSUP <NUM> is turned on to charge the buffer capacitor <NUM> while the first switch <NUM> is opened (off) and the second switch <NUM> is closed (on). During operation <NUM> of method <NUM>, the comparator <NUM> monitors the charging of the buffer capacitor <NUM> by the power source VSUP <NUM>. The comparator <NUM> monitors the charging of the buffer capacitor <NUM> to determine whether a threshold has been reached. In some embodiments of the monitoring, the comparator <NUM> may compare a voltage across the buffer capacitor <NUM> with a reference voltage VREF <NUM>. In response to the comparator <NUM> determining that the voltage across the buffer capacitor <NUM> has reached the level of the reference voltage VREF <NUM>, then the comparator <NUM> determines that the threshold has been reached and that buffer capacitor <NUM> has reached a threshold amount of charge. The threshold amount of charge may correspond to an amount of charge sufficient for driving the gate of the driven switch <NUM> such that the charge from the buffer capacitor <NUM> and energy from the power source VSUP <NUM> can safely turn on the driven switch <NUM> fast enough that the driven switch <NUM> is not damaged.

During operation <NUM> of method <NUM>, the comparator <NUM> closes the first switch S1 <NUM> to initiate a charge redistribution of charge from the buffer capacitor <NUM> to the gate of the driven switch <NUM>. The comparator closes the first switch S1 <NUM> in order to connect the buffer capacitor <NUM> to the gate of the driven switch <NUM> and to initiate the charge redistribution based upon the comparator determine that the threshold has been reached where the voltage across the buffer capacitor <NUM> has reached the level of the reference voltage VREF <NUM>. In this way, the buffer capacitor <NUM> transfers charge to the driven switch <NUM> and the power source VSUP <NUM> transfers energy to the driven switch <NUM> in order to turn on the driven switch.

After a delay <NUM> from initiating the charge redistribution, the comparator <NUM> opens the second switch <NUM> in order to disconnect the buffer capacitor <NUM> from the power source VSUP <NUM>. In some embodiments, the delay <NUM> corresponds to a timeframe for the charge redistribution to charge an equivalent gate capacitance of the gate of the driven switch <NUM> (or a control terminal of a thyristor) for operating the driven switch <NUM> such as to safely turn on the driven switch <NUM> fast enough that the driven switch <NUM> is not damaged. Opening the second switch <NUM> disconnects the buffer capacitor <NUM> from the power source VSUP <NUM> so that the power source VSUP <NUM> does not needlessly charge the buffer capacitor <NUM> and the buffer capacitor <NUM> can more quickly settle to a final charge value.

Any aspect or design described herein as an "example" is not necessarily to be construed as advantageous over other aspects or designs. Rather, use of the word "example" is intended to present one possible aspect and/or implementation that may pertain to the techniques presented herein. Such examples are not necessary for such techniques or intended to be limiting. Various embodiments of such techniques may include such an example, alone or in combination with other features, and/or may vary and/or omit the illustrated example.

As used in this application, the term "or" is intended to mean an inclusive "or" rather than an exclusive "or". That is, unless specified otherwise, or clear from context, "X employs A or B" is intended to mean any of the natural inclusive permutations. In addition, the articles "a" and "an" as used in this application and the appended claims may generally be construed to mean "one or more" unless specified otherwise or clear from context to be directed to a singular form. Also, unless specified otherwise, "first," "second," or the like are not intended to imply a temporal aspect, a spatial aspect, an ordering, etc. Rather, such terms are merely used as identifiers, names, etc. for features, elements, items, etc. For example, a first element and a second element generally correspond to element A and element B or two different or two identical elements or the same element.

Claim 1:
An apparatus (<NUM>, <NUM>), comprising:
a power source (<NUM>, <NUM>);
a buffer capacitor (<NUM>, <NUM>);
a first switch (<NUM>, <NUM>) connected between the buffer capacitor (<NUM>, <NUM>) and a control terminal of a driven switch (<NUM>, <NUM>);
the buffer capacitor (<NUM>, <NUM>) connected to and charged by the power source (<NUM>, <NUM>) when the first switch (<NUM>, <NUM>) is turned off; and
a comparator (<NUM>, <NUM>) to:
monitor the charging of the buffer capacitor (<NUM>, <NUM>); and
in response to the buffer capacitor (<NUM>, <NUM>) reaching a threshold amount of charge, turning on the first switch (<NUM>, <NUM>) to initiate a charge redistribution of charge from the buffer capacitor (<NUM>, <NUM>) to the driven switch (<NUM>, <NUM>);
characterized by comprising a second switch (<NUM>, <NUM>) to operably connect and disconnect the buffer capacitor (<NUM>, <NUM>) from the power source (<NUM>, <NUM>), wherein the comparator (<NUM>, <NUM>) turns off the second switch (<NUM>, <NUM>) after a delay from a point in time when the first switch (<NUM>, <NUM>) is turned on to initiate the charge redistribution.