Patent Description:
CMOS image sensors have been mass-produced and widely used. While conventional image sensors may generate two-dimensional (2D) images and video, recently, there has been much interest in image sensors and systems capable of generating three-dimensional (3D) images for applications such as face recognition, augmented reality (AR)/virtual reality (VR), drones, etc..

One of the existing 3D image sensors is based on the time-of-flight (TOF) distance measuring technique, in which the faster the sensor, the higher the accuracy, and therefore how to improve the speed of the sensor is an urgent issue to be solved in the field.

<CIT> and <CIT> each disclose an optical sensor wherein a pixel comprises a photodiode in a semiconductor substrate.

One of the obj ectives of the present application is to disclose a light sensor and a related time-of-flight distance measuring system to solve the above-mentioned issue.

One embodiment of the present invention discloses a light sensor according to claim <NUM>.

One embodiment of the present invention discloses a time-of-flight distance measuring system, including: a light pulse generating unit, configured to generate a light pulse signal; and a light sensor described above, configured to receive the light pulse signal reflected from a target and generate a corresponding light sensing signal; and a processing unit, configured to calculate a distance between the system and the target based on the light-sensing signal.

The light sensor and the related time-of-flight distance measuring system according to the invention disclosed in the present application uses a PIN diode to increase the speed that electrons move in the photodiodes of the pixels; in other words, the speed of the light sensor is increased, thereby improving the accuracy of the time-of-flight distance measuring system.

<FIG> is a functional block diagram illustrating a time-of-flight (TOF) distance measuring system according to an embodiment of the present invention. The TOF distance measuring system <NUM> is configured to detect the distance between a target <NUM> and the distance measuring system <NUM>. It should be noted that the distance between the target <NUM> and the distance measuring system <NUM> should be less than or equal to the maximum measurable distance of the distance measuring system <NUM>. For example (however, the present application is not limited thereto), the distance measuring system <NUM> could be a 3D imaging system, which may use the time-of-flight technique to measure the distance for surrounding targets, thereby obtaining the depth of field and 3D image information. In the present embodiment, the distance measuring system <NUM> may be implemented as a TOF-based optical distance measuring system.

The distance measuring system <NUM> may include (but is not limited to) a light pulse generating unit <NUM> and a light sensor <NUM>. The light pulse generating unit <NUM> may be implemented using a light-emitting unit to generate a light pulse signal EL. The light pulse signal EL may include a plurality of light pulse. The light pulse generating unit <NUM> may be (but is not limited to) a laser diode (LD), a light-emitting diode (LED), or any other light-emitting unit capable of generating the light pulse. The light sensor <NUM> is configured to sense and sample a reflected signal RL generated by the target <NUM> when reflecting the light pulse signal EL so as to detect the distance between the distance measuring system <NUM> (or the TOF light sensor <NUM>) and the target <NUM>.

The light sensor <NUM> includes (but is not limited to) a pixel array <NUM> and a readout circuit <NUM>. The pixel array <NUM> includes a plurality of pixels (not shown in <FIG>), and the readout circuit <NUM> is coupled to the pixel array <NUM> and configured to perform further processing to the sampling result of the pixel array <NUM>. <FIG> is a schematic diagram illustrating a pixel of the pixel array <NUM> according to an embodiment of the present invention. As shown in <FIG>, the photodiode PD of the pixel <NUM> correspondingly generates charges according to the received reflected signal RL.

The switch MT1 of the pixel <NUM> is coupled between a first charge output circuit <NUM> and the photodiode PD, wherein the switch MT1 is under the control of the first charge output signal TX1 to selectively couple the first charge output circuit <NUM> to the photodiode PD, and when the first charge output signal TX1 controls the switch MT1 to be conducted, the charges of the photodiode PD flow into a floating diffusion region FDN1 of the first charge output circuit <NUM>, thereby generating a first sensed voltage through the first charge output circuit <NUM>. The switch MT2 of the pixel <NUM> is coupled between a second charge output circuit <NUM> and the photodiode PD, wherein the switch MT2 is under the control of a second charge output signal TX2 to selectively couple the second charge output circuit <NUM> to the photodiode PD, and when the second charge output signal TX2 controls the switch MT2 to be conducted, the charges of the photodiode PD flow into a floating diffusion region FDN2 of the second charge output circuit <NUM>, thereby generating a second sensed voltage through the second charge output circuit <NUM>. In this embodiment, the second charge output signal TX2 and the first charge output signal TX1 are conducted at a different time; for example, the second charge output signal TX2 and the first charge output signal TX1 have different phases. For instance, the phase difference between the second charge output signal TX2 and the first charge output signal TX1 is <NUM> degrees.

In the present embodiment, the pixel <NUM> may further include a reset transistor MP; however, the present application is not limited thereto. The reset transistor MP is coupled between the photodiode PD and a second voltage V2, and the reset transistor MP is configured to selectively reset the photodiode PD according to a reset signal TXB to reduce the effect of the accumulated charges generated by those other than the reflected signal RL on the sensed voltage, specifically, during the reset operation, the charges enter a third floating diffusion zone FDN3 so as to clear the charges on the photodiode PD.

In the present embodiment, all transistors are N-type transistors, and the second voltage V2 is greater than the first voltage V1. In other words, in the embodiment shown in <FIG>, all transistors in the pixel <NUM> have the same polarity. However, the present application is not limited thereto, and in certain embodiments, transistors in the pixel <NUM> may all be P-type transistors, and the relative level of the first voltage V1 and the second voltage V2 may be adjusted correspondingly. In certain embodiments, the pixel <NUM> may have both -type transistors and P-type transistors.

<FIG> is a cross-sectional diagram illustrating a light sensor of the pixel <NUM> of the light sensor <NUM> according to an embodiment of the present invention. The light sensor <NUM> shown in <FIG> only includes a portion of the pixel's <NUM> components. Specifically, the light sensor <NUM> includes a semiconductor substrate <NUM> having a first surface 302a and a second surface 302b, a photodiode PD disposed in the semiconductor substrate <NUM> and adjacent to the first surface 302a, wherein the photodiode PD senses light to generate charges. In this embodiment, the pixel's <NUM> light-receiving face may be the first surface or the second surface. In the present embodiment, the photodiode PD is lightly doped by N-type dopant and the overall N-type doping concentration in the photodiode PD, whether from left to right or from top to bottom, is uniform. The photodiode PD includes a first terminal 301a and a second terminal 301b, wherein both the first terminal 301a and the second terminal 301b are the interfaces between the photodiode PD and the semiconductor substrate <NUM>, the first terminal 301a faces the first floating diffusion region FDN1, and the second terminal 301b faces away from the first floating diffusion region FDN1, and hence, the first terminal 301a is closer to the first floating diffusion region FDN1 than the second terminal 301b is; however, the first terminal 301a does not directly abut the first floating diffusion region FDN1; instead, the two are separated by the semiconductor substrate <NUM>. That is, the N-type doping region of the PD does not directly contact the first floating diffusion region FDN1.

The floating diffusion region FDN1 is disposed in the semiconductor substrate <NUM> and is adjacent to the first surface 302a, and is configured to collect charges generated because the PD is irradiated by light during a sampling operation. The semiconductor substrate <NUM> further includes a gate G1 of the switch MT1, wherein the gate G1 is disposed on the first surface 302a of the semiconductor substrate <NUM> and configured to selectively control the charges to enter the first floating diffusion region FDN1 from the photodiode PD. The gate G1 includes an electrode GE1 and a side-wall spacer GS1, wherein the electrode GE1 is coupled to the first charge output signal TX1, and the electrode GE1 may include polysilicon heavily doped by N-type dopant. The gate G1 further includes a dielectric layer (such as insulating layers including oxides and the like, not shown in the drawings) disposed between the electrode GE1 and the first surface 302a of the semiconductor substrate <NUM>.

The semiconductor substrate <NUM> further includes a diode <NUM> disposed on the first surface 302a of the semiconductor substrate <NUM>, a PIN diode. A dielectric layer (such as insulating layers including oxides and the like, not shown in the drawings) is disposed between the diode <NUM> and the first surface 302a of the semiconductor substrate <NUM>. It should be noted that the diode <NUM> is not shown in the circuit diagram of <FIG>. In the present embodiment, the diode <NUM> is made of polysilicon, wherein a portion of the polysilicon is subject to heavy N-type doping to form an N-type region <NUM>, a portion of the polysilicon is subject to heavy P-type doping to form a P-type region <NUM>, and the polysilicon between the polysilicon <NUM> and the polysilicon <NUM> that is not doped forms an intrinsic region <NUM>, wherein N-type region <NUM> is closer to the first floating diffusion region FDN1 than the P-type region <NUM> is. In this embodiment, the CMOS manufacturing process is used to grow polysilicon on a substrate and then perform P-type doping and N-type doping from two sides, respectively, to obtain the diode <NUM>, whereas the non-doped neutral region I in the middle has a certain thickness, which may reduce the occurrence of breakdown when the diode <NUM> is reverse-biased.

<FIG> is a top view diagram of the light sensor shown in <FIG>, wherein the cross-sectional diagram of the <FIG> is obtained along the cross-section line L shown in <FIG>. The top view diagram of <FIG> includes a gate of the switch MT2 (including an electrode GE2), a second floating diffusion region FDN2, a gate of a reset transistor MP (including an electrode GEP), and a third floating diffusion region FDN3. The first floating diffusion region FDN1, the second floating diffusion region FDN2, and the third floating diffusion region FDN3 are all disposed at the same side of the photodiode PD; that is, the side adjacent to the first terminal 301a. The third floating diffusion region FDN3 is between the first floating diffusion region FDN1 and the second floating diffusion region FDN2, and the electrode GEP is between the electrode GE1 and the electrode GE2. Specifically, since the first floating diffusion region FDN1 and the second floating diffusion region FDN2 supply the charges that they obtain during the sampling operation to the first charge output circuit <NUM> and the second charge output circuit <NUM>, respectively, it is preferred that the relative positions of the first floating diffusion region FDN1 and the second floating diffusion region FDN2 with respect to the photodiode PD are arranged symmetrically so that the charges from the photodiode PD to the first floating diffusion region FDN1 and the second floating diffusion region FDN2 have equal distances and electric field conditions.

Referring to both <FIG> and <FIG>, the diode <NUM> at least partially overlaps with the photodiode PD, or put it another way, the projection of the diode <NUM> at least partially overlaps with the projection of the photodiode with respect to the first or second surface. In the present embodiment, the diode <NUM> extends from above the photodiode PD near the first end 301a toward the second end 301b, and the diode <NUM> overlaps with the second end 301b of the photodiode PD. In the specific embodiment as shown in <FIG> and <FIG>, if the position relationship between the diode <NUM> and the photodiode PD is described according to their projections on the substrate, in simple terms, the diode <NUM> does not cover a portion of the region of the photodiode PD near the first end 301a, but it covers the other regions of the photodiode PD, including the second terminal 301b. The present application does not particularly limit the extent that the diode <NUM> overlaps with the photodiode PD; in certain embodiments, the diode <NUM> completely overlaps with the photodiode PD.

The diode <NUM> is coupled to a bias voltage, and during the operation of the TOF distance measuring system <NUM> (including the sampling operation and non-sampling operation), the diode <NUM> is reverse-biased by the bias voltage, i.e., the voltage of the N-type region <NUM> is higher than the voltage of the P-type region <NUM>. Since the N-type region <NUM> is adjacent to the first terminal 301a, and the P-type region <NUM> is adjacent to the second terminal 301b, the diode <NUM> may affect the electric field in the photodiode PD so that the electrical potential of the first terminal 301a is higher than that of the second terminal 301b.

<FIG> is an electrical potential diagram of the light sensor <NUM> when the TOF distance measuring system <NUM> is not operating under a sampling operation. As shown in <FIG>, the horizontal axis represents the position, and the vertical axis represents the electrical potential increasing downwardly). Since the photodiode PD is affected by the diode <NUM> to produce an electrical potential difference, which increases from the second terminal 301b to the first terminal 301a, the charge will move to the first terminal 301a, but because the switch MT1 has not been conducted at this time (that is, the first charge output signal TX1 is at low voltage), the charge cannot flow from the photodiode PD into the first floating diffusion region FDN1.

<FIG> is an electrical potential diagram of the light sensor <NUM> when the TOF distance measuring system <NUM> is operating under a sampling operation. As shown in <FIG>, the switch MT1 is conducted (i.e., the first charge output signal TX1 is at high voltage), and hence, the electrical potential barrier between the photodiode PD and the first floating diffusion region FDN1 disappears, and the charges flows from the photodiode PD into the first floating diffusion region FDN1.

In the present embodiment, even though the overall N-type doping concentration in the photodiode PD is uniform, it is still possible to rely solely on the electric field created by the diode <NUM> in the photodiode PD to make the charge in the photodiode PD move faster from the second terminal 301b to the first terminal 301a. Since the TOF distance measuring system <NUM> is based on estimating the time-of-flight of light to derive the distance reversely, if the charge in the photodiode PD is not fast enough, the estimated flight time of the light is longer than the actual one, thereby causing errors. Therefore, the present application makes the charge in the photodiode PD move faster from the second terminal 301b to the first terminal 301a, which may improve the accuracy of the TOF distance measuring system <NUM>. Further, the reverse-biased diode <NUM> has a little leakage current, so it will not increase the power consumption too much in order to create an electric field in the photodiode PD. While the present application does not limit the extent that the diode <NUM> overlaps with the photodiode PD, it is understood that the greater the extent of the diode <NUM> overlapping the photodiode PD, the more controllable the formation of electric fields in the photodiode PD.

However, in certain embodiments, the overall N-type doping concentration in the photodiode PD may be non-uniform. For example, the N-type doping concentration may increase from the second terminal 301b to the first terminal 301a so as to create a greater electrical potential difference between the second terminal 301b and the first terminal 301a of the photodiode PD, thereby further improving the speed that the charges move from the second terminal 301b to the first terminal 301a.

Claim 1:
A light sensor (<NUM>, <NUM>), comprising a semiconductor substrate (<NUM>) and a pixel array (<NUM>) disposed on the semiconductor substrate (<NUM>), wherein the pixel array (<NUM>) comprises a plurality of pixels, and the semiconductor substrate (<NUM>) comprises a first surface (302a) and a second surface (302b) opposite to the first surface (302a), wherein each of the pixels comprises:
a photodiode (PD), disposed at the semiconductor substrate (<NUM>) and adjacent to the first surface (302a), and configured to sense light to generate charges;
a first floating diffusion region (FDN1), disposed in the semiconductor substrate (<NUM>) and adjacent to the first surface (302a), and configured to collect the charges during a sampling operation;
a first gate (G1), disposed on the semiconductor substrate (<NUM>), and configured to selectively control the charges to enter the first floating diffusion region (FDN1);
wherein the photodiode (PD) has a first terminal (301a) and a second terminal (301b), wherein the first terminal (301a) faces the first floating diffusion region (FDN1), and the second terminal (301b) faces away from the first floating diffusion region (FDN1),
characterized in that each of the pixels further comprises:
a PIN diode (<NUM>) made of polysilicon material, disposed on the photodiode (PD), wherein the PIN diode (<NUM>) has an N-type region (<NUM>), an intrinsic region (<NUM>), and a P-type region (<NUM>), wherein the N-type region (<NUM>) is closer to the first floating diffusion region (FDN1) than the P-type region (<NUM>) is;
the PIN diode (<NUM>) is reverse-biased so that the electrical potential of the first terminal (301a) of the photodiode (PD) is higher than that of the second terminal (301b); and
the PIN diode (<NUM>) at least partially overlaps with the photodiode (PD) as viewed from the first surface (302a) of the semiconductor substrate (<NUM>) to the second surface (302b), in a direction perpendicular to the first surface (302a).