Patent Description:
A known light emitter board includes light emitters such as micro-light-emitting diodes (LEDs), and a known self-luminous display device that eliminates a backlight device includes the light emitter board. Such a display device is described in, for example, Patent Literature <NUM>. The known display device includes a glass substrate, scanning signal lines extending in a predetermined direction (e.g., a row direction) on the glass substrate, emission control signal lines crossing the scanning signal lines and extending in a direction (e.g., a column direction) crossing the predetermined direction, an effective area (pixel area) including multiple pixel units defined by the scanning signal lines and the emission control signal lines, and multiple light emitters located on an insulating layer. The scanning signal lines and the emission control signal lines are connected to back wiring on the back surface of the glass substrate with side wiring on a side surface of the glass substrate. The back wiring is connected to driving elements such as integrated circuits (ICs) and large-scale integration (LSI) circuits mounted on the back surface of the glass substrate. In other words, the display in the display device is driven and controlled by the driving elements on the back surface of the glass substrate. The driving elements are mounted on the back surface of the glass substrate by, for example, chip on glass (COG).

Each pixel unit includes an emission controller to control, for example, the emission or non-emission state and the light intensity of the light emitter in an emissive area. The emission controller includes a thin-film transistor (TFT) as a switch for inputting a drive signal into the light emitter and a TFT as a driving element for driving the light emitter with a current using an electric potential difference (drive signal) between a positive voltage (anode voltage of about <NUM> to <NUM> V) and a negative voltage (a cathode voltage of about -<NUM> to <NUM> V) corresponding to the level (voltage) of an emission control signal (a signal transmitted through the emission control signal lines). The connection line connecting the gate electrode and the source electrode of the TFT receives a capacitor, which retains the voltage of the emission control signal input into the gate electrode of the TFT until the subsequent rewriting is performed (for a period of one frame).

The light emitter is electrically connected to the emission controller, a positive voltage input line, and a negative voltage input line with feedthrough conductors such as through-holes formed through the insulating layer located in the effective area. In other words, the positive electrode of the light emitter is connected to the positive voltage input line with one feedthrough conductor and the emission controller, and the negative electrode of the light emitter is connected to the negative voltage input line with another feedthrough conductor.

The display device also includes a frame between the effective area and the edge of the glass substrate as viewed in plan. The frame, which does not contribute to display, may receive an emission control signal line drive, a scanning signal line drive, and other components. The width of the frame is to be minimized.

Further background is disclosed in <CIT>"Pixel and Organic Light Emitting Display including the Same" and <CIT> "Display with Fused LEDs".

A light emitter board according to an aspect of the present invention is defined in independent claim <NUM>. Further embodiments are set out in dependent claims <NUM>-<NUM>.

A display device according to another aspect of the present invention is defined in dependent claim <NUM>.

A method for repairing a display device according to another aspect of the present invention is defined in claim <NUM>.

The objects, features, and advantages of the present invention will become apparent from the following detailed description and the drawings.

The basic structure of a display device according to one or more embodiments of the present disclosure will first be described with reference to <FIG>. The display device according to one or more embodiments of the present disclosure with the basic structure is a backlight-free, self-luminous display device that includes a light emitter board including light emitters such as micro-light-emitting diodes (LEDs). <FIG> is a block circuit diagram of such a display device with the basic structure. <FIG> is a cross-sectional view taken along line A1-A2 in <FIG>.

The display device according to one or more embodiments of the present disclosure with the basic structure includes a glass substrate <NUM>, scanning signal lines <NUM> extending in a predetermined direction (e.g., a row direction) on the glass substrate <NUM>, emission control signal lines <NUM> crossing the scanning signal lines <NUM> and extending in a direction (e.g., a column direction) crossing the predetermined direction, an effective area (pixel area) <NUM> including multiple pixel units (Pmn) <NUM> defined by the scanning signal lines <NUM> and the emission control signal lines <NUM>, and multiple light emitters <NUM> located on an insulating layer.

The scanning signal lines <NUM> and the emission control signal lines <NUM> are connected to back wiring <NUM> on the back surface of the glass substrate <NUM> with side wiring <NUM> (shown in <FIG>) on a side surface <NUM> (shown in <FIG> and <FIG>) of the glass substrate <NUM>. The back wiring <NUM> is connected to driving elements <NUM> such as integrated circuits (ICs) and large-scale integration (LSI) circuits mounted on the back surface of the glass substrate <NUM>. In other words, the display in the display device is driven and controlled by the driving elements <NUM> on the back surface of the glass substrate <NUM>. The driving elements <NUM> are mounted on the back surface of the glass substrate <NUM> by, for example, chip on glass (COG).

Each pixel unit (Pmn) <NUM> includes an emission controller <NUM> to control, for example, the emission or non-emission state and the light intensity of the light emitter (LDmn) <NUM> in an emissive area (Lmn). The emission controller <NUM> includes a thin-film transistor (TFT) <NUM> (shown in <FIG>) as a switch for inputting a drive signal into the light emitter <NUM> and a TFT <NUM> (shown in <FIG>) as a driving element for driving the light emitter <NUM> with a current using an electric potential difference (drive signal) between a positive voltage (anode voltage of about <NUM> to <NUM> V) and a negative voltage (a cathode voltage of about -<NUM> to <NUM> V) corresponding to the level (voltage) of an emission control signal (a signal transmitted through the emission control signal lines <NUM>). The connection line connecting the gate electrode and the source electrode of the TFT <NUM> receives a capacitor, which retains the voltage of the emission control signal input into the gate electrode of the TFT <NUM> until the subsequent rewriting is performed (for a period of one frame).

The light emitter <NUM> is electrically connected to the emission controller <NUM>, a positive voltage input line <NUM>, and a negative voltage input line <NUM> with feedthrough conductors 23a and 23b such as through-holes formed through an insulating layer <NUM> (shown in <FIG>) located in the effective area <NUM>. In other words, the positive electrode of the light emitter <NUM> is connected to the positive voltage input line <NUM> with the feedthrough conductor 23a and the emission controller <NUM>, and the negative electrode of the light emitter <NUM> is connected to the negative voltage input line <NUM> with the feedthrough conductor 23b.

The display device also includes a frame <NUM> between the effective area <NUM> and the edge of the glass substrate <NUM> as viewed in plan. The frame <NUM>, which does not contribute to display, may receive an emission control signal line drive, a scanning signal line drive, and other components. The width of the frame <NUM> is to be minimized.

<FIG> and <FIG> each are a circuit diagram of a pixel unit <NUM> including a drive circuit <NUM> as an emission controller in a known light emitter board. The pixel unit <NUM> includes a p-channel TFT (Tg) <NUM> as a switch upstream from the drive circuit <NUM>. In response to an on-signal (a low-level signal of -<NUM> to <NUM> V) transmitted through a scanning signal line (Gate1) <NUM> input into the gate electrode of the p-channel TFT <NUM>, the TFT <NUM> has its channel becoming conductive to enter an on-state. This allows an emission control signal (low-level signal, Vg) transmitted through the emission control signal line (Sig1) <NUM> to be input into the drive circuit <NUM>.

In response to the emission control signal (low-level signal, Vg) input into the gate electrode of a p-channel TFT (Td) <NUM> as a driving element in the drive circuit <NUM>, the p-channel TFT <NUM> has its channel becoming conductive to enter an on-state, allowing the drive signal (VDD of about <NUM> to <NUM> V) to be input, through the drive line <NUM>, into the light emitter <NUM>, which then emits light. The light intensity (luminance) of the light emitter <NUM> is controllable by the level (voltage) of the emission control signal (Vg).

In <FIG>, the connection line connecting the gate electrode and the source electrode of the p-channel TFT <NUM> receives a capacitor (C1) <NUM> that retains capacitance. The drive line <NUM> connecting the p-channel TFT <NUM> and the light emitter <NUM> receives a p-channel TFT (Ts) <NUM>, which controls the emission or non-emission state of the light emitter <NUM>. In response to an emission or non-emission control signal (low-level signal, Emi) input into the gate electrode of the p-channel TFT (Ts) <NUM>, the p-channel TFT <NUM> has its channel becoming conductive to enter an on-state, allowing the drive signal (VDD) to be input, through the drive line <NUM>, into the light emitter <NUM>, which then emits light. The light emitter <NUM> is connected to a positive electrode pad 20p and a negative electrode pad 20n located on the drive line <NUM> with a conductive connector, such as solder and a thick-film conductive layer.

<FIG> is a circuit diagram of a pixel unit <NUM> in another known example. The light emitter is a two-terminal thin-film element or an organic electroluminescence (EL) element including a pair of electrodes that serve as an anode and a cathode and an emissive layer held between the electrodes. At least one of the electrodes is divided into multiple pieces to divide the light emitter into multiple sub-light emitters (EL1, EL2) 24a and 24b. The sub-light emitters 24a and 24b receive a drive current from a driving element <NUM> and together emit light at a luminance level corresponding to a video signal. When, for example, the sub-light emitter 24a has a defect or a short circuit, the sub-light emitter 24a is disconnected from the pixel unit <NUM>. The other sub-light emitter 24b then receives the drive current. The active matrix display device thus maintains, with the sub-light emitter 24b, the emission of light at a luminance level corresponding to a video signal.

In the light emitter board with the structure shown in <FIG> including many (about several hundred to several million) light emitters conductively connected to positive electrode pads 20p and negative electrode pads 20n with, for example, solder, some light emitters may have connection faults and may emit light at a lower, unintended light intensity due to insufficient input of drive signals or may fail to emit light (or may remain off) due to no input of drive signals. The same issue can also arise when the many light emitters include light emitters produced with defects or the emissive layers in some light emitters degrade or break during use and the light emitters become defective.

This issue may be removed by the redundant structure shown in <FIG>. In the structure, the light emitter is a thin-film element (EL element) including a stack of thin films located on the board, and at least one of the pair of electrodes is divided into multiple pieces to divide the light emitter into multiple sub-light emitters 24a and 24b. When the sub-light emitter 24a has a defect or a short circuit, the sub-light emitter 24a is disconnected from the pixel unit <NUM>. The other sub-light emitter 24b then receives the drive current to maintain the light emission at a luminance level corresponding to a video signal. The video signal transmitted first is thus input into the single sub-light emitter 24b. In this case, the video signal for the two sub-light emitters 24a and 24b may be input into the single sub-light emitter 24b. This causes overcurrent to flow into the sub-light emitter 24b, possibly degrading the sub-light emitter 24b over time and shortening its service life. To avoid this, the voltage of the video signal may be lowered before being input into the single sub-light emitter 24b. In this case, the light intensity of the sub-light emitter 24b can decrease and become insufficient.

A light emitter board, a display device, and a method for repairing the display device according to one or more embodiments of the present disclosure will now be described with reference to the drawings. Each figure referred to below shows main components and other elements of the light emitter board, the display device, and the method for repairing the display device according to one or more embodiments. The light emitter board, the display device, and the method for repairing the display device according to the embodiments may thus include known components not shown in the figures, such as circuit boards, wiring, control ICs, LSI circuits, and housings. In the figures showing the structures in the embodiments, the same components as in <FIG> showing known example structures are given the same reference numerals and will not be described in detail.

<FIG> show the light emitter board according to one or more embodiments. As shown in <FIG>, the light emitter board includes a substrate <NUM> having a mount surface 1a (shown in <FIG> and <FIG>) on which a first light emitter 14a and a second light emitter 14b are mountable, and at least one pixel unit <NUM> located on the mount surface 1a and including a drive circuit <NUM>, a first drive line 25a, and a second drive line 25b. The first drive line 25a and the second drive line 25b are connected in parallel to the drive circuit <NUM>. The first drive line 25a is a constant line, and the second drive line 25b is a redundant line. The pixel unit <NUM> also includes, on the mount surface 1a, a first positive electrode pad 20pa and a first negative electrode pad 20na connectable to the first light emitter 14a, and a second positive electrode pad 20pb and a second negative electrode pad 20nb connectable to the second light emitter 14b. One of the first positive electrode pad 20pa or the first negative electrode pad 20na is connected to the first drive line 25a, and one of the second positive electrode pad 20pb or the second negative electrode pad 20nb is connected to the second drive line 25b.

In <FIG>, the first positive electrode pad 20pa is connected to the first drive line 25a, and the first negative electrode pad 20na is connected to the ground potential terminal (VSS). When the power terminal (VDD) has a negative potential, the electrode pads may be connected oppositely from this. Similarly, the second positive electrode pad 20pb is connected to the second drive line 25b, and the second negative electrode pad 20nb is connected to the ground potential terminal (VSS). When the power terminal (VDD) has a negative potential, the electrode pads may be connected oppositely from this.

The above structure provides the effects described below. The first light emitter 14a conductively connected to the first positive electrode pad 20pa and the first negative electrode pad 20na with, for example, solder may have connection faults, or the first light emitter 14a may be a defective product. In this case, the first drive line 25a may be deactivated (placed in an unused state), and the second light emitter 14b may be connected to the second positive electrode pad 20pb and the second negative electrode pad 20nb to activate the second drive line 25b (place in a used state). This effectively reduces the pixel units <NUM> having emission faults or emission failures. The first positive electrode pad 20pa and the second positive electrode pad 20pb are physically and electrically independent of each other, and the first negative electrode pad 20na and the second negative electrode pad nb are physically and electrically independent of each other. Such drive systems independent of each other eliminate any further adjustment to the drive signal after the constantly driven light emitter is switched from the first light emitter 14a to the second light emitter 14b. This prevents the drive signal line drive (emission control signal line drive) from becoming complicated and thus from increasing power consumption. The structure can avoid overcurrent flowing into the second light emitter 14b as in the known structure, and thus can avoid a shorter service life of the second light emitter 14b.

In <FIG>, one pixel unit <NUM> includes one first drive line 25a as the constant line and one second drive line 25b as the redundant line. In some embodiments, one pixel unit <NUM> may include multiple redundant lines. In this case, the increased redundancy reduces the likelihood that the pixel units <NUM> have display faults. In some embodiments, one pixel unit <NUM> may include multiple constant lines. In this case, the display device or other devices can display multiple colors or enable color display.

In some embodiments, the light emitter board with the structure in <FIG> may eliminate the first light emitter 14a and the second light emitter 14b. In some embodiments, the first light emitter 14a alone may be mounted and constantly driven on the light emitter board, and the second light emitter 14b may be mounted on the light emitter board when any abnormality such as a decrease in light intensity occurs in the first light emitter 14a. In some embodiments, the first light emitter 14a and the second light emitter 14b may be premounted on the light emitter board.

The substrate <NUM> included in the light emitter board according to the present embodiment may be a translucent substrate such as a glass substrate and a plastic substrate, or a non-translucent substrate such as a ceramic substrate, a non-translucent plastic substrate, and a metal substrate. The substrate <NUM> may further be a composite substrate including a laminate of a glass substrate and a plastic substrate, a laminate of a glass substrate and a ceramic substrate, a laminate of a glass substrate and a metal substrate, or a laminate of at least any two of the above substrates formed from different materials. The substrate <NUM> including an electrically insulating substrate, such as a glass substrate, a plastic substrate, or a ceramic substrate, allows easy formation of wiring conductors. The substrate <NUM> may be rectangular, circular, oval, trapezoidal, or in any other shape.

The light emitters used in the light emitter board according to the present embodiment are self-luminous and free of backlight. Examples include micro-LEDs, semiconductor laser elements, inorganic EL elements, and organic EL elements. The light emitters are in chips mountable on the substrate <NUM>. The micro-LEDs have high emission efficiency with low power consumption and have a long service life. The micro-LEDs are also small and easily connectable to electrode pads. The light emitter board according to the present embodiment can be used in a display device that performs high-quality image display and allows easy repair of the light emitters. The micro-LEDs are mounted vertically on (perpendicularly to) the mount surface 1a of the substrate <NUM>. The mounted micro-LEDs include, for example, a positive electrode, an emissive layer, and a negative electrode stacked in this order from near the mount surface 1a. In some embodiments, the micro-LED may include a negative electrode, an emissive layer, and a positive electrode stacked in this order from near the mount surface 1a.

Each micro-LED rectangular as viewed in plan may have, but is not limited to, a size of at least about <NUM> and not more than <NUM> on each side, or more specifically of at least about <NUM> and not more than <NUM> on each side.

The micro-LED in each pixel unit <NUM> may emit light of a different color. For example, a micro-LED located in a first pixel unit may emit red, orange, red-orange, red-violet, or violet light. A micro-LED located in a second pixel unit adjacent to the first pixel unit may emit green or yellow-green light. A micro-LED located in a third pixel unit adjacent to the second pixel unit may emit blue light. Such a light emitter board allows easy fabrication of a color display device. In some embodiments, one pixel unit <NUM> may include two or more constantly driven micro-LEDs.

The first positive electrode pad 20pa, the first negative electrode pad 20na, the second positive electrode pad 20pb, and the second negative electrode pad 20nb are conductor layers including, for example, tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), aluminum (Al), chromium (Cr), silver (Ag), or copper (Cu). The first positive electrode pad 20pa, the first negative electrode pad 20na, the second positive electrode pad 20pb, and the second negative electrode pad 20nb may be metal layers including Mo/Al/Mo layers (indicating a stack of a Mo layer, an Al layer, and a Mo layer in this order) or metal layer(s) including an Al layer, Al/Ti layers, Ti/Al/Ti layers, a Mo layer, Mo/Al/Mo layers, Ti/Al/Mo layers, Mo/Al/Ti layers, a Cu layer, a Cr layer, a Ni layer, or a Ag layer. The positive and negative electrodes of each light emitter may also have the same structure as the first positive electrode pad 20pa, the first negative electrode pad 20na, the second positive electrode pad 20pb, and the second negative electrode pad 20nb.

The pixel unit <NUM> functions as a basic element of display. For a monochromatic image display device, for example, the light intensity (luminance) of each of many first light emitters 14a is controlled to enable display of monochromatic images. A color display device may include many sets of color display units each including a subpixel unit with a red-light emissive first light emitter 14a, a subpixel unit with a green-light emissive first light emitter 14a, and a subpixel unit with a blue-light emissive first light emitter 14a to enable display of color tones.

In each pixel unit <NUM>, the drive circuit (emission controller) <NUM> including a TFT, serving as a switch or a control element for controlling the emission or non-emission state and the light intensity of the light emitter, may be located below the light emitter with an insulating layer between them. This structure downsizes the pixel unit <NUM> and enables high-quality image display with the display device including the light emitter board according to the present embodiment.

The light emitter board according to the present invention has either the second positive electrode pad 20pb with a greater area than the first positive electrode pad 20pa as viewed in plan or the second negative electrode pad 20nb with a greater area than the first negative electrode pad 20na as viewed in plan, or both such second positive electrode pad 20pb and second negative electrode pad 20nb. This structure improves the connection of the redundant second light emitter 14b to the second positive electrode pad 20pb and the second negative electrode pad 20nb. The second light emitter 14b is more easily connected to the second positive electrode pad 20pb with a larger area or to the second negative electrode pad 20nb with a larger area, and is thus less likely to have a connection fault. Additionally, when the second light emitter 14b is positioned by optically sensing the second positive electrode pad 20pb and the second negative electrode pad 20nb with an imaging device such as a camera, the second positive electrode pad 20pb and the second negative electrode pad 20nb are easily optically sensible.

For example, the light emitter board may have either the second positive electrode pad 20pb rectangular and larger than the first positive electrode pad 20pa that is square as viewed in plan or the second negative electrode pad 20nb rectangular and larger than the first negative electrode pad 20na that is square as viewed in plan, or both such second positive electrode pad 20pb and second negative electrode pad 20nb.

To improve the conductive connection of the second positive electrode pad 20pb and the second negative electrode pad 20nb to the second light emitter 14b with a conductive connector such as solder, the second positive electrode pad 20pb and the second negative electrode pad 20nb may have rough surfaces. The roughness allows the conductive connector to be anchored to the rough surfaces with higher bonding strength. The rough surfaces may have an arithmetic mean roughness of about <NUM> to <NUM>. The surfaces of the second positive electrode pad 20pb and the second negative electrode pad 20nb may be roughened by, for example, etching or dry etching or controlling the film deposition time and temperature in forming the second positive electrode pad 20pb and the second negative electrode pad 20nb with a thin film formation method, such as chemical vapor deposition (CVD). Grain structures such as giant single crystal grains and giant polycrystal grains form in the thin film.

The light emitter board according to the present embodiment may have either the second positive electrode pad 20pb with a higher light reflectance than the first positive electrode pad 20pa or the second negative electrode pad 20nb with a higher light reflectance than the first negative electrode pad 20na, or both such second positive electrode pad 20pb and second negative electrode pad 20nb. This structure improves the connection of the redundant second light emitter 14b to the second positive electrode pad 20pb and the second negative electrode pad 20nb. In other words, the second light emitter 14b is more easily connectable to the second positive electrode pad 20pb with a higher light reflectance and the second negative electrode pad 20nb with a higher light reflectance. For example, when the second light emitter 14b is positioned by optically sensing the second positive electrode pad 20pb and the second negative electrode pad 20nb with an imaging device such as a camera, the second positive electrode pad 20pb and the second negative electrode pad 20nb are easily optically sensible.

As shown in <FIG>, the light emitter board according to one or more embodiments may include a first switch 26a on the first drive line 25a to activate and deactivate the first drive line 25a, and a second switch 26b on the second drive line 25b to activate and deactivate the second drive line 25b. This structure facilitates switching between a drive mode in which the first drive line 25a is activated and the second drive line 25b is deactivated and a drive mode in which the first drive line 25a is deactivated and the second drive line 25b is activated.

The light emitter board may include a switch controller <NUM> that controls one of the first switch 26a or the second switch 26b to be closed and the other of the first switch 26a or the second switch 26b to be open. This structure allows prompt switching of the constantly driven light emitter from the first light emitter 14a to the second light emitter 14b, thus removing emission faults immediately.

In a first drive mode in which the first light emitter 14a is constantly driven, the switch controller <NUM> inputs an on-signal (low-level signal, Vga) into the gate electrode of the first switch 26a including a p-channel TFT to activate the constant first drive line 25a and inputs an off-signal (high-level signal, Vgb) into the gate electrode of the second switch 26b including a p-channel TFT to deactivate the redundant second drive line 25b. In a second drive mode in which the second light emitter 14b is constantly driven, the switch controller <NUM> inputs an off-signal (high-level signal, Vga) into the gate electrode of the first switch 26a including the p-channel TFT to deactivate the constant first drive line 25a and inputs an on-signal (low-level signal, Vgb) into the gate electrode of the second switch 26b including the p-channel TFT to activate the redundant second drive line 25b.

The switch controller <NUM> may have the structure shown in <FIG>. To input an on-signal (low-level signal, Vga) into the gate electrode of the first switch 26a in the first drive state, the switch controller <NUM> blocks transmission of a high-level signal with a resistor 27a located on the connection line between a VH signal terminal outputting a high-level signal and the gate electrode of the first switch 26a while allowing the connection line between a VL signal terminal outputting a low-level signal and the gate electrode of the first switch 26a to be conductive. To input an off-signal (high-level signal, Vgb) into the gate electrode of the second switch 26b, the switch controller <NUM> allows the connection line between the VH signal terminal outputting a high-level signal and the gate electrode of the second switch 26b to be conductive while blocking transmission of a low-level signal with a resistor 27b located on the connection line between the VL signal terminal outputting a low-level signal and the gate electrode of the second switch 26b.

To switch to the second drive mode, the switch controller <NUM> inputs an off-signal (high-level signal, Vga) into the gate electrode of the first switch 26a. This involves melting and cutting, by laser cutting, the connection line connecting the VL signal terminal and the gate electrode of the first switch 26a at a portion between the VL signal terminal and a node nda. The switch controller <NUM> then outputs, from the VH signal terminal, an off-signal (high-level signal, Vga) reflecting the amount of voltage drop across the resistor 27a. To input an on-signal (low-level signal, Vgb) into the gate electrode of the second switch 26b, the connection line connecting the VH signal terminal and the gate electrode of the second switch 26b is melted and cut by laser cutting at a portion between the VH signal terminal and a node ndb. The switch controller <NUM> then outputs, from the VL signal terminal, an on-signal (low-level signal, Vgb) reflecting the amount of voltage drop across the resistor 27b. The laser cutting may be replaced by mechanical cutting using, for example, a grinder or by chemical cutting using, for example, etching.

<FIG> show a light emitter board according to another embodiment of the present disclosure. A switch controller <NUM> includes a static memory circuit 28a connected in parallel to the first switch 26a and the second switch 26b, and an inverter logic circuit 28c. The inverter logic circuit 28c may be located either on a first connection line LS1 connecting the static memory circuit 28a and the first switch 26a or on a second connection line LS2 connecting the static memory circuit 28a and the second switch 26b. In this example, the static memory circuit 28a can retain the receiving high- or low-level signal as an output signal, thus easily maintaining a drive mode in which the first light emitter 14a is constantly activated and the second light emitter 14b is deactivated. The static memory circuit 28a also easily maintains a drive mode in which the light emitters are driven oppositely.

The switch controller <NUM> includes the static memory circuit 28a including a static random-access memory (RAM), a switch 28b including a p-channel TFT, and the inverter logic circuit or an inverter 28c. The switch 28b has the gate electrode connected to a gate control signal line (Cont). In response to an on-signal (low-level signal) transmitted through the gate control signal line, the switch 28b has its channel becoming conductive (or entering an on-state). The source electrode of the switch 28b is connected to the emission control signal line (Sig1) <NUM>.

To place the first light emitter 14a in a constantly activated state and the second light emitter 14b in a deactivated state, the switch 28b receives an on-signal through its gate electrode to enter an on-state, transmits the on-signal (low-level signal) transmitted through the emission control signal line <NUM> to the switch 26a through the static memory circuit 28a, and transmits an off-signal (high-level signal), which is the inverted signal of the on-signal, to the switch 26b through the static memory circuit 28a and the inverter 28c. This places the first light emitter 14a in a constantly activated state and the second light emitter 14b in a deactivated state. In this state, the static memory circuit 28a remains outputting the on-signal to the switch 26a and the off-signal to the switch 26b.

To place the first light emitter 14a in a deactivated state and the second light emitter 14b in a constantly activated state, the switch 28b receives an on-signal through its gate electrode to enter an on-state, transmits the off-signal (high-level signal) transmitted through the emission control signal line <NUM> to the switch 26a through the static memory circuit 28a, and transmits an on-signal (low-level signal), which is the inverted signal of the off-signal, to the switch 26b through the static memory circuit 28a and the inverter 28c. This places the first light emitter 14a in a deactivated state and the second light emitter 14b in a constantly activated state. In this state, the static memory circuit 28a remains outputting the off-signal to the switch 26a and the on-signal to the switch 26b.

As shown in <FIG>, the static memory circuit 28a includes a first inverter 28aa and a second inverter 28ab connected in series. The first inverter 28aa includes a p-channel TFT and an n-channel TFT with their gate electrodes connected commonly and their drain electrodes connected commonly. The source electrode of the p-channel TFT is connected to the positive voltage supply (VDD), and the source electrode of the n-channel TFT is connected to the negative voltage supply (VSS). The second inverter 28ab has the same structure as the first inverter 28aa.

The static memory circuit 28a operates in the manner described below. The first inverter 28aa receiving an on-signal (off-signal) at the input end (gate electrode) inverts the on-signal into an off-signal (on-signal), which is then output from the output end (drain electrode) to be input into the input end of the second inverter 28ab. The second inverter 28ab receiving the off-signal (on-signal) at the input end inverts the off-signal into an on-signal (off-signal), which is then output from the output end. The static memory circuit 28a remains outputting the signals in this manner until receiving an off-signal newly transmitted from the switch 28b. The inverter 28c has the same structure as the first inverter 28aa.

<FIG> show more specific examples of the switch controller <NUM> in the light emitter board shown in <FIG>. As shown in <FIG>, a switch controller <NUM> includes a storage 29a that stores voltage-current correlation data about a drive voltage and a drive current of a reference light emitter, and an abnormal current detector 29b that detects any abnormality in the current through the first light emitter 14a by referring to the voltage-current correlation data. Upon detecting any abnormal current in the first light emitter 14a, the switch controller <NUM> may control the first switch 26a to be open and the second switch 26b to be closed. This structure allows more automated and accurate detection of emission faults in the first light emitter 14a than in the structure in which the emission state of the first light emitter 14a is detected visually.

The abnormal current detector 29b in the light emitter board shown in <FIG> may compare a reference drive current corresponding to a reference drive voltage in voltage-current correlation data <NUM> (shown in <FIG>) with a measured drive current of the first light emitter 14a at the reference drive voltage, and detect an abnormal current in the first light emitter 14a in response to the measured drive current deviating from the reference drive current by a predetermined value or greater. This structure allows more accurate detection of emission faults in the first light emitter 14a.

The abnormal current detector 29b, which detects an abnormal current in the first drive line 25a, measures, as a measured drive current, the drive current transmitted through a detection line connected to the first drive line 25a. The abnormal current detector 29b compares a measured drive current 52a (52b) with the reference drive current corresponding to the reference drive voltage in the voltage-current correlation data <NUM> (shown in <FIG>) stored in the storage 29a. The measured drive current 52a has a value deviating from the reference drive current within an allowable range. The measured drive current 52b has a value deviating from the reference drive current beyond the allowable range. For the measured drive current 52a, the switch controller <NUM> does not perform switching control. The first light emitter 14a remains in the constantly activated state, and the second light emitter 14b remains in the deactivated state. For the measured drive current 52b, the switch controller <NUM> performs switching control with an on-off controller 29c. In other words, the first light emitter 14a is switched to a deactivated state, and the second light emitter 14b is switched to an activated state or to a constantly activated state. The on-off controller 29c may include, for example, the switch 28b, the static memory circuit 28a, and the inverter 28c shown in <FIG>.

The deviation of the measured drive current within ±<NUM>% from <NUM>% of the value of the reference drive current is determined to be within the allowable range. In <FIG>, the plot 51a is voltage-current correlation data for a measured drive current deviating from the reference drive current by +<NUM>%, and the plot 51b is voltage-current correlation data for a measured drive current deviating from the reference drive current by -<NUM>%. The degree of deviation is not limited to the above range, but can be specified variously based on, for example, the allowable range of the intended display quality and degradation of the light emitters over time.

In <FIG>, the storage 29a is inside the pixel unit <NUM>. In <FIG>, the storage 29a is outside the pixel unit <NUM> or at the periphery of the effective area (display area). With, for example, a large memory capacity, the storage 29a is located as in the structure in <FIG> to avoid an excessively large pixel unit <NUM>.

<FIG> show other specific examples of the switch controller <NUM> in the light emitter board shown in <FIG>. As shown in <FIG>, a switch controller <NUM> includes a storage 33a that stores voltage-emission correlation data <NUM> (shown in <FIG>) about the drive voltage and the light intensity of a reference light emitter, and an abnormal emission detector 33b that detects any abnormality in emission from the first light emitter 14a by referring to the voltage-emission correlation data <NUM>. Upon detecting any abnormal emission in the first light emitter 14a, the switch controller <NUM> may control the first switch 26a to be open and the second switch 26b to be closed. This structure allows more automated and accurate detection of emission faults in the first light emitter 14a than in the structure in which the emission state of the first light emitter 14a is detected visually.

The abnormal emission detector 33b in the light emitter board shown in <FIG> compares a reference light intensity corresponding to a reference drive voltage in the voltage-emission correlation data <NUM> with a measured light intensity of the first light emitter 14a at the reference drive voltage, and detects an abnormal emission in the first light emitter 14a in response to the measured light intensity deviating from the reference light intensity by a predetermined value or greater. This structure allows more accurate detection of emission faults in the first light emitter 14a.

The abnormal emission detector 33b, which detects an abnormal emission in the first drive line 25a, includes a light receiver that performs photoelectric conversion. Examples of the light receiver include a photodiode that detects the light intensity (luminance) of the first light emitter 14a connected to the first drive line 25a and a TFT that changes its conduction-state as the channel receives light. The abnormal emission detector 33b receives light emitted from the first light emitter 14a as a measured light intensity. The abnormal emission detector 33b compares a measured light intensity 62a (62b) with the reference light intensity corresponding to the reference drive voltage in the voltage-emission correlation data <NUM> (shown in <FIG>) stored in the storage 33a. The measured light intensity 62a has a value deviating from the reference light intensity within an allowable range. The measured light intensity 62b has a value deviating from the reference light intensity beyond the allowable range. For the measured light intensity 62a, the switch controller <NUM> does not perform switching control. The first light emitter 14a remains in the constantly activated state, and the second light emitter 14b remains in the deactivated state. For the measured light intensity 62b, the switch controller <NUM> performs the switching control with an on-off controller 33c. In other words, the first light emitter 14a is switched to a deactivated state, and the second light emitter 14b is switched to an activated state or to a constantly activated state. The on-off controller 33c may include, for example, the switch 28b, the static memory circuit 28a, and the inverter 28c shown in <FIG>.

In the light emitter board according to the present embodiment, the deviation of the measured light intensity within a range of ±<NUM>% from <NUM>% of the value of the reference light intensity is determined to be within the allowable range. In <FIG>, the plot 61a is voltage-emission correlation data for a measured light intensity deviating from the reference light intensity by +<NUM>%, and the plot 61b is voltage-emission correlation data for a measured light intensity deviating from the reference light intensity by -<NUM>%. The degree of deviation is not limited to the above range, but can be specified variously based on, for example, the allowable range of the intended display quality and degradation of the light emitters over time.

In <FIG>, the storage 33a is inside the pixel unit <NUM>. In <FIG>, the storage 33a is outside the pixel unit <NUM> or at the periphery of the effective area (display area). When the storage 33a has, for example, a large memory capacity, the storage 33a is located as in the structure in <FIG> to avoid an excessively large pixel unit <NUM>.

The light emitter board according to one or more embodiments may include the switch controller <NUM>, <NUM>, <NUM>, or <NUM> in the pixel unit <NUM>. This structure allows more prompt switching of the constantly driven light emitter from the first light emitter 14a to the second light emitter 14b, thus removing emission faults further immediately. When the switch controller <NUM>, <NUM>, <NUM>, or <NUM> is at the periphery of the effective area other than in the pixel unit <NUM>, the light emitter board may be larger. However, the light emitter board with the above structure is smaller and avoids such an issue.

A light emitter board according to another embodiment includes a substrate <NUM> having a mount surface 1a on which a first light emitter 14a and a second light emitter 14b are mountable, and at least one pixel unit <NUM> located on the mount surface 1a and including a drive circuit <NUM>, a first drive line 25a, and a second drive line 25b. The first drive line 25a and the second drive line 25b are connected in parallel to the drive circuit <NUM>. The first drive line 25a is a constant line to constantly drive the first light emitter 14a, and the second drive line 25b is a redundant line to redundantly drive the second light emitter 14b. The light emitter board also includes a switch unit that places one of the first drive line 25a or the second drive line 25b in a conductive state and places the other of the first drive line 25a or the second drive line 25b in a nonconductive state, and a switch controller that controls the switch unit. This structure also provides the same effects as the structures described above.

The switch unit may include a single switch that switches the direction of a signal transmission path to one of the two directions, or may include two switches including the first switch 26a and the second switch 26b shown in <FIG>. The switch controller is connected to the switch unit to control switching of the switch unit.

As shown in <FIG> and <FIG>, the switch unit and the switch controller may be included in the pixel unit <NUM>. The switch unit and the switch controller within the pixel unit <NUM> allow more prompt switching of the constantly driven light emitter from the first light emitter 14a to the second light emitter 14b, thus removing emission faults further immediately.

As shown in <FIG>, multiple pixel units <NUM> may be arranged in a matrix. The first switch 26a and the second switch 26b as the switch unit may be included in each pixel unit <NUM>. The static memory circuit <NUM> or <NUM> as the switch controller may be provided for at least one of multiple pixel units 15m1 to 15mn arranged in a row direction or multiple pixel units 151n to 15mn arranged in a column direction. The light emitter board with this structure can include far fewer switch controllers. The resultant light emitter board is thus smaller and has a simpler circuit structure, having lower power consumption.

For example, one static memory circuit <NUM> as the switch controller may be provided for one row including the multiple pixel units 15m1 to 15mn arranged in the row direction. In this case, the light emitter board including n rows (where n is an integer of <NUM> or more) may include n static memory circuits <NUM>. One static memory circuit <NUM> may be provided for multiple rows. One static memory circuit <NUM> may be provided for each set of multiple rows. One static memory circuit <NUM> may be provided for all the rows.

For example, one static memory circuit <NUM> as the switch controller may be provided for one column including the multiple pixel units 151n to 15mn arranged in the column direction. In this case, the light emitter board including m columns (where m is an integer of <NUM> or more) includes m static memory circuits <NUM>. One static memory circuit <NUM> may be provided for multiple columns. One static memory circuit <NUM> may correspond to each set of multiple columns. One static memory circuit <NUM> may be provided for all the columns.

Each pixel unit <NUM> may include one switch controller.

As shown in <FIG>, the switch controller may be a static memory circuit <NUM>-<NUM> or <NUM>-<NUM> that includes a first inverter 28aa as a first inverter logic circuit and a second inverter 28ab as a second inverter logic circuit connected in series to and downstream from the first inverter 28aa. The first switch 26a and the second switch 26b as the switch unit may be connected in parallel to the first inverter 28aa and the second inverter 28ab. In other words, the switch unit including the first switch 26a and the second switch 26b is connected in parallel to the first inverter 28aa and the second inverter 28ab. The switch unit is thus controllable by the static memory circuit <NUM>-<NUM> or <NUM>-<NUM> alone. The resultant light emitter board thus has a simpler circuit structure with low power consumption.

In the above structure, the static memory circuit <NUM>-<NUM> or <NUM>-<NUM> as the switch controller performs either a first switch control operation to control the first drive line 25a to be conductive or nonconductive with a first output signal (Vga in <FIG>) from the first inverter 28aa and to control the second drive line 25b to be conductive or nonconductive with a second output signal (Vgb in <FIG>) from the second inverter 28ab or a second switch control operation to control the first drive line 25a to be conductive or nonconductive with a second output signal (Vga in <FIG>) and to control the second drive line 25b to be conductive or nonconductive with a first output signal (Vgb in <FIG>).

As shown in <FIG>, the switch controller <NUM> may include the static memory circuit 28a and the inverter 28c as an inverter logic circuit connected in parallel to and downstream from the static memory circuit 28a. The first switch 26a and the second switch 26b as a switch unit may be connected in parallel to the static memory circuit 28a and the inverter 28c. In other words, the switch unit including the first switch 26a and the second switch 26b is connected in parallel to the static memory circuit 28a and the inverter 28c. This structure allows the static memory circuit 28a to operate stably, thus allowing stable switch control. More specifically, a branch line connected to the output line of the first inverter 28aa to derive an inverted signal may lower the electric potential of the inverted signal, thus causing the second inverter 28ab to operate unstably. The above structure eliminates such an issue.

In the above structure, the static memory circuit 28a and the inverter 28c together as the switch controller <NUM> perform either a first switch control operation to control the first drive line 25a to be conductive or nonconductive with a first output signal (Vga in <FIG>) from the static memory circuit 28a and to control the second drive line 25b to be conductive or nonconductive with a second output signal (Vgb in <FIG>) from the inverter 28c or a second switch control operation to control the first drive line 25a to be conductive or nonconductive with the second output signal (Vgb) and to control the second drive line 25b to be conductive or nonconductive with the first output signal (Vga).

<FIG> each show a light emitter board according to another embodiment of the present disclosure. As shown in <FIG>, <FIG>, the switch controller <NUM>-<NUM> or <NUM>-<NUM> includes the static memory circuit 28a that includes the first inverter 28aa as the first inverter logic circuit and the second inverter 28ab as the second inverter logic circuit connected in series to and downstream from the first inverter 28aa. The static memory circuit 28a includes either a first connection configuration in which the first switch 26a is connected to a first output line 28aal of the first inverter 28aa and the second switch 26b is connected to a second output line 28abl of the second inverter 28ab (shown in <FIG>) or a second connection configuration in which the first switch 26a is connected to the second output line 28abl of the second inverter 28ab and the second switch 26b is connected to the first output line 28aal of the first inverter 28aa (shown in <FIG>).

In this example, the static memory circuit 28a can retain the received high- or low-level signal as an output signal, thus easily maintaining a drive mode in which the first light emitter 14a is constantly driven and the second light emitter 14b is undriven. The static memory circuit 28a also easily maintains the opposite drive mode. The structure with the static memory circuit 28a eliminates the inverter logic circuit, simplifying the circuit structure.

In the structure in <FIG>, the first connection line LS1 connects the static memory circuit 28a to the first switch 26a, and a third connection line LS3 connects the static memory circuit 28a to the second switch 26b.

In <FIG>, the first connection line LS1 is connected to the first output line 28aal. Thus, the output (e.g., low-level signal) from the first inverter 28aa input into the gate electrode of the first switch 26a places the first switch 26a in a constantly on-state, placing the first light emitter 14a in a constantly activated state. The third connection line LS3 is connected to the second output line 28abl. Thus, the output (e.g., high-level signal) from the second inverter 28ab input into the gate electrode of the second switch 26b places the second switch 26b in a constantly off-state, placing the second light emitter 14b in a constantly deactivated state. For any fault such as an abnormal emission in the first light emitter 14a, the output from the first inverter 28aa is set to a high-level signal (off-signal) to place the first switch 26a in a constantly off-state, and the output from the second inverter 28ab is set to a low-level signal (on-signal) to place the second switch 26b in a constantly on-state. This switching operation is performed in response to the signal (high- or low-level signal) input into the switch 28b through the emission control signal line (Sig1) <NUM>.

In <FIG>, the first connection line LS1 is connected to the second output line 28abl. Thus, the output (e.g., low-level signal) from the second inverter 28ab input into the gate electrode of the first switch 26a places the first switch 26a in a constantly on-state, placing the first light emitter 14a in a constantly activated state. The third connection line LS3 is connected to the first output line 28aal. Thus, the output (e.g., high-level signal) from the first inverter 28aa input into the gate electrode of the second switch 26b places the second switch 26b in a constantly off-state, placing the second light emitter 14b in a constantly deactivated state. For any fault such as an abnormal emission in the first light emitter 14a, the output from the second inverter 28ab is set to a high-level signal (off-signal) to place the first switch 26a in a constantly off-state, and the output from the first inverter 28aa is set to a low-level signal (on-signal) to place the second switch 26b in a constantly on-state. This switching operation is performed in response to the signal (low- or high-level signal) input into the switch 28b through the emission control signal line (Sig1) <NUM>.

<FIG> each are a circuit diagram of a light emitter board according to another embodiment, showing one static memory circuit <NUM> provided for the multiple pixel units 15m1 to 15mn arranged in the row direction in one row (GATE[m], where m is a natural number indicating that the row is the m-th row). As shown in <FIG>, each first switch 26a is connected to a first output line 28Gal of a first inverter 28Ga, and each second switch 26b is connected to a second output line 28Gbl of a second inverter 28Gb. The output from the first inverter 28Ga (e.g., low-level signal, LED_SEL1[m]) is input into the gate electrode of the first switch 26a in each of n pixel units 15m1 to 15mn (n is an integer of <NUM> or more), placing each first switch 26a in a constantly on-state and thus placing each first light emitter 14a in a constantly activated state. The output (e.g., high-level signa, LED_SEL2[m]) from the second inverter 28Gb is input into the gate electrode of each second switch 26b, placing the second switch 26b in a constantly off-state and thus placing the second light emitter 14b in a constantly deactivated state. For any fault such as an abnormal emission in at least one of n first light emitters 14a, the output from the first inverter 28Ga is set to a high-level signal (off-signal) to place each first switch 26a in a constantly off-state, and the output from the second inverter 28Gb is set to a low-level signal (on-signal) to place each second switch 26b in a constantly on-state. This switching operation is performed in response to an emission adjusting signal (high- or low-level signal) input into a switch 28t through an emission adjusting signal line (Sig_trim). The switch 28t is turned on or off with a gate adjusting signal (TRIM[m]) input into its gate electrode. The static memory circuit <NUM> and the switch 28t may be included in a gate signal line drive (gate driver) <NUM>.

As shown in <FIG>, a branch line from the first output line 28Gal may be connected to a buffer circuit <NUM>, through which the output from the first inverter 28Ga (e.g., low-level signal, LED_SEL1[m]) is input into the gate electrode of the first switch 26a in each of the n pixel units 15m1 to 15mn (n is an integer of <NUM> or more). The branch line branching from the first output line 28Gal and connected to the gate electrodes of the multiple first switches 26a tends to have a fluctuating electrical potential. The above structure reduces the fluctuation in the electric potential of the branch line. Similarly, the second output line 28Gbl may be connected to a buffer circuit <NUM>, through which the output from the second inverter 28Gb (e.g., high-level signal, LED_SEL2[m]) is input into the gate electrode of the second switch 26b in each of the n pixel units 15m1 to 15mn (n is an integer of <NUM> or more). The second output line 28Gbl tends to have a fluctuating electrical potential due to the branch line from the first output line 28Gal and due to the connection to the gate electrodes of the multiple second switches 26b. The above structure reduces the fluctuation in the electric potential of the second output line 28Gbl.

The buffer circuits <NUM> and <NUM> each include two inverters connected in series, but are not limited to this structure.

In the structure in <FIG>, one static memory circuit <NUM> may be provided for multiple sets of pixel units 15m1 to 15mn, pixel units <NUM>(m + <NUM>)<NUM> to <NUM>(m + <NUM>)n, and subsequent pixel units <NUM> each arranged in a different row in the row direction. In another embodiment, one static memory circuit <NUM> may be provided for all the pixel units.

<FIG> is a circuit diagram of a light emitter board according to another embodiment, showing one static memory circuit <NUM> provided for the multiple pixel units 15m1 to 15mn arranged in the row direction in one row (GATE[m]). Each first switch 26a is connected to the second output line 28Gbl of the second inverter 28Gb, and each second switch 26b is connected to the first output line 28Gal of the first inverter 28Ga. The output from the second inverter 28Gb (e.g., low-level signal, LED_SEL1 [m]) is input into the gate electrode of the first switch 26a in each of the n pixel units 15m1 to 15mn, placing each first switch 26a in a constantly on-state and thus placing each first light emitter 14a in a constantly activated state. The output (e.g., high-level signal, LED_SEL2[m]) from the first inverter 28Ga is input into the gate electrode of each second switch 26b, placing each second switch 26b in a constantly off-sate and thus placing each second light emitter 14b in a constantly deactivated state. For any fault such as an abnormal emission in at least one of n first light emitters 14a, the output from the second inverter 28Gb is set to a high-level signal (off-signal) to place each first switch 26a in a constantly off-state, and the output from the first inverter 28Ga is set to a low-level signal (on-signal) to place each second switch 26b in a constantly on-state. This switching operation is performed in response to an emission adjusting signal (low- or high-level signal) input into the switch 28t through the emission adjusting signal line (Sig_trim). The switch 28t is turned on or off with a gate adjusting signal (TRIM[m]) input into its gate electrode. The static memory circuit <NUM> and the switch 28t may be included in the gate signal line drive <NUM>.

The structure in <FIG> may incorporate the components in <FIG>. In other words, the branch line from the first output line 28Gal may be connected to the buffer circuit <NUM>, and the second output line 28Gbl may be connected to the buffer circuit <NUM>.

<FIG> and <FIG> each are a circuit diagram of a light emitter board according to another embodiment, showing one static memory circuit <NUM> provided for the multiple pixel units 151n to 15mn arranged in the column direction in one column (SOURCE[n]). As shown in <FIG>, each first switch 26a is connected to a first output line 28Sal of a first inverter 28Sa, and each second switch 26b is connected to a second output line 28Sbl of a second inverter 28Sb. The output from the first inverter 28Sa (e.g., low-level signal, LED_SEL1[n]) is input into the gate electrode of the first switch 26a in each of n pixel units 151n to 15mn, placing each first switch 26a in a constantly on-state and thus placing each first light emitter 14a in a constantly activated state. The output (e.g., high-level signal, LED_SEL2[n]) from the second inverter 28Sb is input into the gate electrode of each second switch 26b, placing each second switch 26b in a constantly off-state and thus placing each second light emitter 14b in a constantly deactivated state. For any fault such as an abnormal emission in at least one of n first light emitters 14a, the output from the first inverter 28Sa is set to a high-level signal (off-signal) to place each first switch 26a in a constantly off-state, and the output from the second inverter 28Sb is set to a low-level signal (on-signal) to place each second switch 26b in a constantly on-state. This switching operation is performed in response to an emission adjusting signal (low- or high-level signal) input into the switch 28t through the emission adjusting signal line (Sig_trim). The switch 28t is turned on or off with a gate adjusting signal (TRIM[n]) input into its gate electrode. The static memory circuit <NUM> and the switch 28t may be included in an image signal line drive (source driver) <NUM>.

As shown in <FIG>, a branch line from the first output line 28Sal may be connected to a buffer circuit <NUM>, through which the output from the first inverter 28Sa (e.g., low-level signal, LED_SEL1[m]) is input into the gate electrode of the first switch 26a in each of the n pixel units 151n to 15mn (n is an integer of <NUM> or more). This structure provides the same effects as described above, or reduces fluctuation in the electrical potential. The second output line 28Sbl may be connected to a buffer circuit <NUM>, through which the output from the second inverter 28Sb (e.g., high-level signal, LED_SEL2[m]) is input into the gate electrode of the second switch 26b in each of the n pixel units 151n to 15mn (n is an integer of <NUM> or more). This structure provides the same effects as described above, or reduces fluctuation in the electrical potential.

In the structure in <FIG> and <FIG>, one static memory circuit <NUM> may be provided for multiple sets of pixel units 151n to 15mn, pixel units <NUM>(n + <NUM>) to <NUM>(n + <NUM>), and subsequent pixel units <NUM> each arranged in a different column in the column direction. In another embodiment, one static memory circuit <NUM> may be provided for all the pixel units.

<FIG> is a circuit diagram of a light emitter board according to another embodiment, showing one static memory circuit <NUM> provided for the multiple pixel units 151n to 15mn arranged in one column (SOURCE[n]) in the column direction. Each first switch 26a is connected to the second output line 28Sbl of the second inverter 28Sb, and each second switch 26b is connected to the first output line 28Sal of the first inverter 28Sa. The output from the second inverter 28Sb (e.g., low-level signal, LED_SEL1[n]) is input into the gate electrode of the first switch 26a in each of the n pixel units 151n to 15mn, placing each first switch 26a in a constantly on-sate and thus placing each first light emitter 14a in a constantly activated state. The output (e.g., high-level signal, LED_SEL2[n]) from the first inverter 28Sa is input into the gate electrode of each second switch 26b, placing each second switch 26b in a constantly off-state and thus placing each second light emitter 14b in a constantly deactivated state. For any fault such as an abnormal emission in at least one of n first light emitters 14a, the output from the second inverter 28Sb is set to a high-level signal (off-signal) to place each first switch 26a in a constantly off-state, and the output from the first inverter 28Sa is set to a low-level signal (on-signal) to place each second switch 26b in a constantly on-state. This switching operation is performed in response to an emission adjusting signal (low- or high-level signal) input into the switch 28t through the emission adjusting signal line (Sig_trim). The switch 28t is turned on or off with a gate adjusting signal (TRIM[n]) input into its gate electrode. The static memory circuit <NUM> and the switch 28t may be included in the image signal line drive <NUM>.

The structure in <FIG> may incorporate the components in <FIG>. In other words, the branch line from the first output line 28Sal may be connected to the buffer circuit <NUM>, and the second output line 28Sbl may be connected to the buffer circuit <NUM>.

In the structure in <FIG>, one static memory circuit <NUM> may be provided for multiple sets of pixel units 151n to 15mn, pixel units <NUM>(n + <NUM>) to <NUM>(n + <NUM>), and subsequent pixel units <NUM> each arranged in a different column in the column direction. In another embodiment, one static memory circuit <NUM> may be provided for all the pixel units.

A display device according to an embodiment includes any of the light emitter boards described above. The substrate <NUM> has an opposite surface 1b (shown in <FIG>) opposite to the mount surface 1a, and a side surface <NUM> (shown in <FIG> and <FIG>). The light emitter board includes side wiring <NUM> (shown in <FIG> and <FIG>) on the side surface <NUM>, and a driver <NUM> (shown in <FIG>) on the opposite surface 1b. The first light emitters 14a and the second light emitters 14b are connected to the driver <NUM> with the side wiring <NUM>. This structure effectively reduces the pixel units <NUM> having display failures. This structure also prevents the drive signal line drive (emission control signal line drive) from becoming complicated and thus from increasing power consumption. The structure can also avoid overcurrent caused by the switch controller flowing into the second light emitter 14b as in the known structure, and thus avoids a shorter service life of the second light emitter 14b.

The driver <NUM> may include driving elements such as ICs and LSI circuits mounted by chip on glass or may be a circuit board on which driving elements are mounted. The driver <NUM> may also be a thin film circuit including, for example, a TFT that includes a semiconductor layer including low temperature polycrystalline silicon (LTPS) formed directly on the opposite surface 1b of the glass substrate <NUM> by a thin film formation method such as CVD.

The side wiring <NUM> may be formed from a conductive paste including conductive particles such as silver (Ag), copper (Cu), aluminum (Al), and stainless steel, an uncured resin component, an alcohol solvent, and water. The conductive paste may be cured by heating, photocuring using ultraviolet ray irradiation, or combination of photocuring and heating. The side wiring <NUM> may also be formed by a thin film formation method such as plating, vapor deposition, and CVD. The substrate <NUM> may have a groove on the side surface <NUM> to receive the side wiring <NUM>. This allows the conductive paste to be easily received in the groove or in an intended portion on the side surface <NUM>.

The display device according to the embodiment may include multiple substrates <NUM> each including multiple light emitters. The multiple substrates <NUM> may be arranged in a grid on the same plane. The substrates <NUM> may be connected (tiled) together with their side surfaces bonded with, for example, an adhesive. The display device can thus be composite and large, forming a multi-display.

The display device according to the embodiment may form a light-emitting device. The light-emitting device can be used as, for example, a printer head for an image formation device and other devices, an illumination device, a signboard, and a notice board.

The method for repairing the display device according to an embodiment includes constantly driving the first light emitters 14a each connected to the first positive electrode pad 20pa and the first negative electrode pad 20na on the mount surface 1a of the substrate <NUM>, and upon detection of an abnormal current or an abnormal emission in a first light emitter 14a, connecting a second light emitter 14b to the second positive electrode pad 20pb and the second negative electrode pad 20nb on the mount surface 1a of the substrate <NUM>, and deactivating the first drive line 25a and activating the second drive line 25b. This structure eliminates connection of the redundant second light emitters 14b while the first light emitters 14a remain in a constantly activated state. Thus, a display device including many light emitters can be fabricated at a low cost, without mounting numerous light emitters including the light emitters for redundant driving.

The light emitter board and the display device according to the present disclosure are not limited to the above embodiments and may include design alterations and improvements as appropriate. For example, the substrate <NUM> may be non-translucent, and may be a glass substrate colored in black, gray, or other colors, or a glass substrate including frosted glass.

The embodiments may be implemented in the forms described below.

A light emitter board according to one or more embodiments of the present disclosure includes a substrate having a mount surface on which a first light emitter and a second light emitter are mountable, and at least one pixel unit located on the mount surface and including a drive circuit, a first drive line, and a second drive line. The first drive line and the second drive line are connected in parallel to the drive circuit. The first drive line is a constant line, and the second drive line is a redundant line. The light emitter board also includes, on the mount surface, a first positive electrode pad and a first negative electrode pad connectable to the first light emitter, and a second positive electrode pad and a second negative electrode pad connectable to the second light emitter. One of the first positive electrode pad or the first negative electrode pad is connected to the first drive line, and one of the second positive electrode pad or the second negative electrode pad is connected to the second drive line.

The light emitter board according to one or more embodiments of the present disclosure may further include a first switch located on the first drive line to activate and deactivate the first drive line, and a second switch located on the second drive line to activate and deactivate the second drive line.

The light emitter board according to one or more embodiments of the present disclosure may further include a switch controller that controls one of the first switch or the second switch to be closed and the other of the first switch or the second switch to be open.

In the light emitter board according to one or more embodiments of the present disclosure, the switch controller may include a storage storing voltage-current correlation data about a drive voltage and a drive current of a reference light emitter, and an abnormal current detector that detects an abnormality in a current through the first light emitter by referring to the voltage-current correlation data. The switch controller may control the first switch to be open and the second switch to be closed upon detecting an abnormality in the current through the first light emitter.

In the light emitter board according to one or more embodiments of the present disclosure, the switch controller may include a storage storing voltage-emission correlation data about a drive voltage and a light intensity of a reference light emitter, and an abnormal emission detector that detects an abnormality in emission from the first light emitter by referring to the voltage-emission correlation data. The switch controller may control the first switch to be open and the second switch to be closed upon detecting an abnormality in the emission from the first light emitter.

In the light emitter board according to one or more embodiments of the present disclosure, the switch controller may be included in the at least one pixel unit.

In the light emitter board according to one or more embodiments of the present disclosure, the at least one pixel unit may include a plurality of pixel units arranged in a matrix. Each of the plurality of pixel units may include the switch unit. The switch controller may be provided for at least one of a first set of the plurality of pixel units arranged in a row direction or a second set of the plurality of pixel units arranged in a column direction.

In the light emitter board according to one or more embodiments of the present disclosure, the first light emitter and the second light emitter each may include a micro-light-emitting diode.

A light emitter board according to one or more embodiments of the present disclosure includes a substrate having a mount surface on which a first light emitter and a second light emitter are mountable, and at least one pixel unit located on the mount surface and including a drive circuit, a first drive line, and a second drive line. The first drive line and the second drive line are connected in parallel to the drive circuit. The first drive line is a constant line to constantly drive the first light emitter, and the second drive line is a redundant line to redundantly drive the second light emitter. The light emitter board also includes a switch unit that places one of the first drive line or the second drive line in a conductive state and the other of the first drive line or the second drive line in a nonconductive state, and a switch controller that controls the switch unit.

In the light emitter board according to one or more embodiments of the present disclosure, the switch unit and the switch controller may be included in the at least one pixel unit.

In the light emitter board according to one or more embodiments of the present disclosure, the switch controller may include a static memory circuit including a first inverter logic circuit and a second inverter logic circuit connected in series to and downstream from the first inverter logic circuit. The switch unit may be connected in parallel to the first inverter logic circuit and the second inverter logic circuit.

In the light emitter board according to one or more embodiments of the present disclosure, the switch controller may include a static memory circuit and an inverter logic circuit connected in parallel to and downstream from the static memory circuit. The switch unit may be connected in parallel to the static memory circuit and the inverter logic circuit.

A display device according to one or more embodiments of the present disclosure is a display device including the light emitter board according to one or more embodiments of the present disclosure. The substrate has an opposite surface opposite to the mount surface, and a side surface. The light emitter board includes side wiring on the side surface and a driver on the opposite surface. The first light emitter and the second light emitter are connected to the driver with the side wiring.

A method for repairing a display device according to one or more embodiments of the present disclosure is a method for repairing the display device according to one or more embodiments of the present disclosure. The method includes driving constantly the first light emitter mounted on the mount surface of the substrate, and mounting, upon detection of an abnormal current or an abnormal emission in the first light emitter, the second light emitter on the mount surface and deactivating the first drive line and activating the second drive line.

The light emitter board according to one or more embodiments of the present disclosure includes a substrate having a mount surface on which a first light emitter and a second light emitter are mountable, and at least one pixel unit located on the mount surface and including a drive circuit, a first drive line, and a second drive line. The first drive line and the second drive line are connected in parallel to the drive circuit. The first drive line is a constant line, and the second drive line is a redundant line. The light emitter board also includes, on the mount surface, a first positive electrode pad and a first negative electrode pad connectable to the first light emitter, and a second positive electrode pad and a second negative electrode pad connectable to the second light emitter. One of the first positive electrode pad or the first negative electrode pad is connected to the first drive line, and one of the second positive electrode pad or the second negative electrode pad is connected to the second drive line. This structure provides the effects described below. The first light emitter conductively connected to the first positive electrode pad and the first negative electrode pad with, for example, solder may have a connection fault, or the first light emitter may be a defective product. In this case, the first drive line may be deactivated (placed in an unused state), and the second light emitter may be connected to the second positive electrode pad and the second negative electrode pad to be activated (placed in a used state). This effectively reduces the pixel units having emission faults or emission failures. The first positive electrode pad and the second positive electrode pad are physically and electrically independent of each other, and the first negative electrode pad and the second negative electrode pad are physically and electrically independent of each other. Such drive systems independent of each other eliminate any further adjustment to the drive signal after the constant light emitter is switched to the second light emitter. This prevents the drive signal line drive (emission control signal line drive) from becoming complicated and thus from increasing power consumption. The structure can also avoid overcurrent flowing into the second light emitter as in the known structure, and can thus avoid a shorter service life of the second light emitter.

The light emitter board according to one or more embodiments of the present disclosure may further include a first switch located on the first drive line to activate and deactivate the first drive line, and a second switch located on the second drive line to activate and deactivate the second drive line. This structure facilitates switching between a drive mode in which the first drive line is activated and the second drive line is deactivated and a drive mode in which the first drive line is deactivated and the second drive line is activated.

The light emitter board according to one or more embodiments of the present disclosure may further include a switch controller that controls one of the first switch or the second switch to be closed and the other of the first switch or the second switch to be open. This structure facilitates switching between a drive mode in which the first drive line is activated and the second drive line is deactivated and a drive mode in which the first drive line is deactivated and the second drive line is activated. This allows prompt switching of the constantly driven light emitter from the first light emitter to the second light emitter, thus removing emission faults immediately.

In the light emitter board according to one or more embodiments of the present disclosure, the switch controller may include a storage storing voltage-current correlation data about a drive voltage and a drive current of a reference light emitter, and an abnormal current detector that detects an abnormality in a current through the first light emitter by referring to the voltage-current correlation data. The switch controller may control the first switch to be open and the second switch to be closed upon detecting an abnormality in the current through the first light emitter. This structure allows more automated and accurate detection of emission faults in the first light emitter than in the structure in which the emission state of the first light emitter is detected visually.

In the light emitter board according to one or more embodiments of the present disclosure, the switch controller may include a storage storing voltage-emission correlation data about a drive voltage and a light intensity of a reference light emitter, and an abnormal emission detector that detects an abnormality in emission from the first light emitter by referring to the voltage-emission correlation data. The switch controller may control the first switch to be open and the second switch to be closed upon detecting an abnormality in the emission from the first light emitter. This structure allows more automated and accurate detection of emission faults in the first light emitter than in the structure in which the emission state of the first light emitter is detected visually.

In the light emitter board according to one or more embodiments of the present disclosure, the switch controller may be included in the at least one pixel unit. This structure allows more prompt switching of the constantly driven light emitter to the second light emitter, thus removing emission faults further immediately. When the switch controller is at the periphery of the pixel unit other than in the pixel unit, the light emitter board may be larger. However, the light emitter board with the above structure is smaller and avoids such an issue.

In the light emitter board according to one or more embodiments of the present disclosure, the at least one pixel unit may include a plurality of pixel units arranged in a matrix. Each of the plurality of pixel units may include the switch unit. The switch controller may be provided for at least one of a first set of the plurality of pixel units arranged in a row direction or a second set of the plurality of pixel units arranged in a column direction. The light emitter board with this structure can include far fewer switch controllers. The resultant light emitter board is thus smaller and has a simpler circuit structure, having lower power consumption.

In the light emitter board according to one or more embodiments of the present disclosure, the first light emitter and the second light emitter each may include a micro-light-emitting diode. The micro-LEDs is a small light emitter easily connectable with electrode pads. Thus, a display device including the light emitter board according to one or more embodiments of the present disclosure enables high-quality image display and easy repair of the light emitters.

The light emitter board according to one or more embodiments of the present disclosure includes a substrate having a mount surface on which a first light emitter and a second light emitter are mountable, and at least one pixel unit located on the mount surface and including a drive circuit, a first drive line, and a second drive line. The first drive line and the second drive line are connected in parallel to the drive circuit. The first drive line is a constant line to constantly drive the first light emitter, and the second drive line is a redundant line to redundantly drive the second light emitter. The light emitter board also includes a switch unit that places one of the first drive line or the second drive line in a conductive state and the other of the first drive line or the second drive line in a nonconductive state, and a switch controller that controls the switch unit. This structure provides the effects described below. The first light emitter mounted on the mount surface may have a connection fault or the first light emitter may be a defective product. In this case, the first drive line may be deactivated (placed in an unused state) and the second drive line may be activated (placed in a used state). This effectively reduces the pixel units having emission faults or emission failures. The first drive line and the second drive line are physically and electrically independent of each other. Such drive systems independent of each other eliminate any further adjustment to the drive signal after the constantly driven light emitter is switched to the second light emitter. This prevents the drive signal line drive (emission control signal line drive) from becoming complicated and thus from increasing power consumption. The structure can also avoid overcurrent flowing into the second light emitter as in the known structure, and can thus avoid a shorter service life of the second light emitter.

In the light emitter board according to one or more embodiments of the present disclosure, the switch unit and the switch controller may be included in the at least one pixel unit. This structure allows more prompt switching of the constantly driven light emitter to the second light emitter, thus removing emission faults further immediately.

In the light emitter board according to one or more embodiments of the present disclosure, the switch controller may include a static memory circuit including a first inverter logic circuit and a second inverter logic circuit connected in series to and downstream from the first inverter logic circuit. The switch unit may be connected in parallel to the first inverter logic circuit and the second inverter logic circuit. The switch unit is thus controllable by the static memory circuit alone. The resultant light emitter board thus has a simpler circuit structure with lower power consumption.

In the light emitter board according to one or more embodiments of the present disclosure, the switch controller may include a static memory circuit and an inverter logic circuit connected in parallel to and downstream from the static memory circuit. The switch unit may be connected in parallel to the static memory circuit and the inverter logic circuit. This structure allows the static memory circuit to operate stably, thus allowing stable switch control.

The display device according to one or more embodiments of the present disclosure is a display device including the light emitter board according to one or more embodiments of the present disclosure. The substrate has an opposite surface opposite to the mount surface, and a side surface. The light emitter board includes side wiring on the side surface and a driver on the opposite surface. The first light emitter and the second light emitter are connected to the driver with the side wiring. The display device with the structure effectively reduces pixel units having display failures. This structure also prevents the drive signal line drive (emission control signal line drive) from becoming complicated and thus from increasing power consumption. The structure can also avoid a shorter service life of the second light emitter.

The method for repairing a display device according to one or more embodiments of the present disclosure is a method for repairing the display device according to one or more embodiments of the present disclosure. The method includes driving constantly the first light emitter mounted on the mount surface of the substrate, and mounting, upon detection of an abnormal current or an abnormal emission in the first light emitter, the second light emitter on the mount surface and deactivating the first drive line and activating the second drive line. The method thus eliminates connection of the redundant second light emitter while the first light emitter remains in a constantly activated state. Thus, a display device including many light emitters can be fabricated at a low cost, without mounting numerous light emitters including the light emitters for redundant driving.

Claim 1:
A light emitter board, comprising:
a substrate (<NUM>) having a mount surface (1a) on which a first light emitter (14a) and a second light emitter (14b) of a pixel unit (<NUM>) are mountable;
at least one pixel unit (<NUM>) on the mount surface (1a), the at least one pixel unit (<NUM>) including a drive circuit (<NUM>), a first drive line (25a), and a second drive line (25b), the first drive line (25a) and the second drive line (25b) being connected in parallel to each other to the drive circuit (<NUM>), the first drive line (25a) inputting a drive signal into the first light emitter (14a) and being a constant line to constantly drive the first light emitter (14a), the second drive line (25b) inputting the drive signal into the second light emitter (14b) and being a redundant line to redundantly drive the second light emitter (14b);
a first positive electrode pad (20pa) and a first negative electrode pad (20na) on the mount surface (1a), the first positive electrode pad (20pa) and the first negative electrode pad (20na) being connectable to the first light emitter (14a), one of the first positive electrode pad (20pa) or the first negative electrode pad (20na) being connected to the first drive line (25a);and
a second positive electrode pad (20pb) and a second negative electrode pad (20nb) on the mount surface (1a), the second positive electrode pad (20pb) and the second negative electrode pad (20nb) being connectable to the second light emitter (14b), one of the second positive electrode pad (20pb) or the second negative electrode pad (20nb) being connected to the second drive line (25b);
characterized in that
the second positive electrode pad (20pb) has a greater area than the first positive electrode pad (20pa) and/or the second negative electrode pad (20nb) has a greater area than the first negative electrode pad (20na).