Patent Description:
Metal strip resistors have previously been constructed in various ways. For example, <CIT> discloses plating nickel to the resistive material. However, such a process places limitations on the size of the resulting metal strip resistor. The nickel plating method is limited to large sizes because of the method for determining plating geometry. In addition, the nickel plating method has limitations on resistance measurement at laser trimming.

Another approach has been to weld copper strips to the resistive material to form terminations. Such a method is disclosed in <CIT>. The welding method is limited to larger size resistors because the weld dimensions take up space.

Yet another approach has been to clad copper to the resistive material to form terminations such as disclosed in <CIT>. The cladding method is limited to larger size resistors because of tolerances in the skiving process used to remove copper material thus defining the width and position of the active resistor element.

Still further approaches are described in <CIT>, <CIT>, and <CIT>. Such approaches also have limitations.

Thus, all of the methods described have one or more limitations. What is needed is a small sized low resistance value metal strip resistor and a method for making it.

<CIT> discloses a resistor supported on a metal plate composed of a low temperature coefficient of resistance (TCR) metallic material. The resistor includes at least two electrode columns composed of the low TCR metallic material disposed on the metal plate. The resistor further includes at least an electrode layer disposed on each of the electrode columns to form an electrode for each of the electrode columns. The low TCR metallic material of the metal plate comprises a nickel-copper alloy. The electrode layer disposed on each of the electrode columns further comprises a copper layer and a tin-lead alloy layer on each of the electrode columns.

<CIT> provides for a low-impedance electrical resistor made of a metal sheet or a film consisting of a metallic resistance alloy. A metal forming the connection contacts of the resistors is electroplated onto a multitude of photolithographically defined parallel strips, which extend, at regular mutual intervals, over the entire metal sheet or film surface. To separate the resistors, the electroplated metal piece is sawed longitudinally into cutting planes, which extend perpendicularly with respect to each other, and with respect to the metal sheet, where, in each case, the cutting planes of one group divide one of the connection contact strips in its longitudinal direction.

<CIT> discloses a method of forming successive metal layers of varying widths on a substrate is disclosed. A mask having a through going aperture is provided, the mask including a constricted neck portion between its upper and lower surfaces. Successive metal layers are applied over the substrate through the aperture in the mask sequentially by sputtering methods which form a metallic layer wider than the constricted neck portion of the mask and by vapor deposition method which forms a narrower metal layer corresponding to the transverse dimension of the constricted portion of the mask.

<CIT> provides for a chip resistor arranged on the upper surface of a square-shape insulation substrate, electrodes arranged on both end sections of the resistors <NUM>, and a protective film <NUM> coating the main portion of the resistor <NUM>, this resistor is also provided with plated electrodes <NUM>, respectively formed on the electrodes <NUM>, and the resistor <NUM> is composed of a thin film of copper-manganese-nickel(Cu-Mu-Ni) alloy.

<CIT> discloses a chip resistor including a resistor element having a first surface and a second surface opposite to the first surface. Two main electrodes, spaced from each other, are provided on the first surface, while two auxiliary electrodes, spaced from each other, are provided on the second surface. The auxiliary electrodes face the main electrodes via the resistor element. The main electrodes and the auxiliary electrodes are made of the same material.

Therefore, it is a primary object, feature, or advantage of the present invention to improve over the state of the art and to provide a small sized low resistance value metal strip resistor and a method for making it.

According to one aspect of the present invention, a metal strip resistor is provided. The metal strip resistor includes a metal strip forming a resistive element and providing support for the metal strip resistor without use of a separate substrate. There are first and second opposite terminations overlaying the metal strip. There is plating on each of the first and second opposite terminations. There is also an insulating material overlaying the metal strip between the first and second opposite terminations.

According to another aspect of the present invention, a metal strip resistor is provided. The metal strip resistor includes a metal strip forming a resistive element and providing support for the metal strip resistor without use of a separate substrate. There are first and second opposite terminations sputtered directly to the metal strip. There is plating on each of the first and second opposite terminations. There is also an insulating material overlaying the metal strip between the first and second opposite terminations.

According to yet another aspect of the present invention, a metal strip resistor is provided. The resistor includes a metal strip forming a resistive element and providing support for the metal strip resistor without use of a separate substrate. There is an adhesion layer sputtered to the metal strip. There are first and second opposite terminations sputtered to the adhesion layer. There is plating on each of the first and second opposite terminations and an insulating material overlaying the metal strip between the first and second opposite terminations.

According to another aspect of the present invention, a method for forming a metal strip resistor wherein a metal strip provides support for the metal strip resistor without use of a separate substrate is provided. The method includes coating an insulative material to the metal strip, applying a lithographic process to form a conductive pattern overlaying the resistive material wherein the conductive pattern includes first and second opposite terminations, electroplating the conductive pattern, and adjusting resistance of the metal strip.

According to another aspect of the present invention, a method for forming a metal strip resistor wherein a metal strip provides support for the metal strip resistor without use of a separate substrate, is provided. The method includes mating a mask to the metal strip to cover portions of the metal strip, sputtering an adhesion layer to the metal strip, the mask preventing the adhesion layer from depositing on the portions of the metal strip covered by the mask, the portions of the metal strip covered by the mask forming a pattern including first and second opposite terminations. The method further includes coating an insulative material to the metal strip and adjusting resistance of the metal strip.

The present invention relates to metal strip resistor and a method of making metal strip resistors. The method is suitable for making an <NUM> size or smaller, low ohmic value, metal strip surface mount resistor. An <NUM> size is a standard electronics package size for certain passive components with <NUM> inch by <NUM> inch (<NUM> by <NUM>) dimensions. One example of a smaller size of packaging which also may be used is an <NUM> size. In the context of the present invention, a low ohmic value is generally a value suitable for applications in power-related applications. A low ohmic value is generally one that is less than or equal to <NUM> Ohms, but often times in the range of <NUM> to <NUM> milliohms.

The method of manufacturing the metal strip resistor uses a process wherein the terminations of a resistor are formed by adding copper to the resistive material through sputtering and plating. This method utilizes photolithographic masking techniques that allow much smaller and better defined termination features. This method also allows the use of the much thinner resistance materials that are needed for the highest values in very small resistors yet, the resistor does not use a support substrate.

<FIG> is a cross-sectional view of one embodiment of a metal strip resistor of the present invention. A metal strip resistor <NUM> is formed from a thin sheet of resistance material <NUM> such as, but not limited to EVANOHM (nickel-chromium-aluminum-copper alloy), MANGANIN (a copper-manganese-nickel alloy), or other type of resistive material. The thickness of the resistance material <NUM> may vary based on desired resistance. However, the resistance material may be relatively thin if desired. Note that the resistance material <NUM> is central to the resistor <NUM> and provides support for the resistor <NUM> and there is no separate substrate present.

The resistor <NUM> shown in <FIG> also includes an optional adhesion layer <NUM> which may be formed of CuTiW (copper, titanium, tungsten). The adhesion layer <NUM>, where used, is sputtered over the surface of the resistive material <NUM> for the copper plating <NUM> to bond to. Some resistance materials may require the use of the adhesion layer <NUM> and others do not. Whether the adhesion layer <NUM> is used, depends on the resistance material's alloy and if it allows direct bonding of copper plating with adequate adhesion. If an adhesion layer <NUM> is desirable and both sides of the resistance material <NUM> are to receive pads then both sides of the resistance material <NUM> should be sputtered with an adhesion layer <NUM>.

Prior to the sputtering process a metal mask (not shown in <FIG>) may be mated with the sheet of resistance material <NUM> to prevent the CuTiW material from depositing onto areas of the sheet that will later become the active resistor areas. This mechanical masking step allows one to eliminate a gold plating and etch back step later in the process thus reducing cost. Where gold plating is used or other highly conductive plating, the gold plating <NUM> overlays the copper plating <NUM>. A plating <NUM> is provided which may be a nickel plating. A tin plating <NUM> overlays the nickel plating <NUM> to provide for solderability.

Also shown in <FIG> is an insulative coating material <NUM> which is applied to the resistance material <NUM>. The insulative coating material <NUM> is preferably a silicone polyester with high operating temperature resistance. Other types of insulating materials may be used which are chemical resistant and capable of handling high temperature.

<FIG> illustrates a relatively thin sheet of resistance material such as EVANOHM, MANGANIN or other type of resistance material <NUM>. The resistance material <NUM> serves as the substrate and support structure for the resistor. There is no separate substrate present. The thickness of this sheet of resistance material <NUM> may be selected to achieve higher or lower resistance value ranges. A field layer of CuTiW (copper, titanium, tungsten) or other suitable material is sputtered over the surface of the resistive material <NUM> as an adhesion layer <NUM> for the copper plating to bond to. Prior to the sputtering process, a metal mask may be mated with the sheet of resistance material <NUM> to prevent the CuTiW material or other material for the adhesion layer <NUM> from depositing onto areas of the sheet that will later become the active resistor areas. This mechanical masking step eliminates a gold plating and etch back step later in the process thus reducing cost.

Next a lithographic process is performed. The lithographic process may include laminating a dry photoresist film <NUM> to both sides of the resistance material <NUM> to protect the resistance material <NUM> from copper plating. A photo mask may then be used to expose the photoresist with a pattern corresponding to the copper areas to be deposited onto the resistance material. The photoresist <NUM> is then developed, exposing the resistive material in only the areas where copper or other conductive material is to be deposited as shown in <FIG>.

<FIG> illustrates the copper pattern <NUM>. The copper pattern may include individual terminal pads, stripes, or near complete coverage except in areas that will be the active resistor area. The pad size may be defined at the punching operation in cases where stripes and near-full coverage patterns are used. The terminal pad geometry and number can vary depending on the PCB mounting requirements and electrical connections required such as <NUM>-wire or <NUM>-wire circuit schemes, or multi-resistor arrays. Copper <NUM> is plated in an electrolytic process. A thin layer of Au (gold) <NUM> is electroplated over the copper. The photoresist material is then stripped as shown in <FIG> and subsequently the CuTiW material <NUM> not covered by copper plating <NUM> is stripped from the active resistor areas in a chemical etch process. In another embodiment the gold layer <NUM> is not added and the CuTiW layer <NUM> is not stripped back after removing the photoresist layer to save manufacturing cost but at the expense of electrical characteristics. In a further embodiment the gold is not added and stripping is not necessary because the CuTiW material was mechanically masked at the sputtering step.

The resulting terminated plate may be processed as a sheet, sections of a sheet, or in strips of one or two rows of resistors. The sheet process will be described from this point on but these subsequent processes also apply to sections and strips. As shown in <FIG>, the sheet <NUM> is a continuous solid (although alignment holes may be present) and areas of the sheet <NUM> may then be removed to define the resistor's design dimensions of length and width. Preferably this is done with a punch tool but may also be done by a chemical etching process or by laser machining or mechanical cutting away of the unwanted material.

The resistance values of the unadjusted resistors are determined by the copper pad spacing, defined by the photo mask, length, width, and the thickness of the sheet of resistive material. As shown in <FIG>, adjustment of the resistance value may be accomplished by a laser or other means of removing material <NUM> to increase the resistance while at the same time measuring the resistance value. Adjustment of the resistance value may also be accomplished by adding more termination material, or other conductive material, in areas where the resistive material is still exposed to reduce the value. The resistors work equally as well with no material removed or added but the resistance value tolerance is much broader.

As shown in <FIG>, exposed resistor material between the terminations is covered by a coating material <NUM> which is an insulating material to prevent electroplating onto the resistive element and changing its resistance value. The coating material <NUM> is preferably a silicone polyester with high operating temperature resistance but may be other insulating materials that are chemical resistant and capable of handling high temperatures. The coating material <NUM> is preferably applied by a transfer blade. A controlled amount of coating material <NUM> is deposited on the edge of the blade and then transferred to the resistor by contact between the blade and resistor. Other methods of applying the coating material <NUM> may be used such as screen printing, roller contact transfer, ink jetting, and others. The coating material <NUM> is then cured by baking the resistors in an oven. Any markings that are put on the coating material <NUM> would be applied by ink transfer and baking or by laser methods at this point in the process. A die cutter may be used to remove each single resistor from the carrier plate. Other methods to singulate the resistors from the carrier may be used such as a laser cutter or photoresist mask and chemical etching.

Individual resistors are then put into a plating process where nickel <NUM> and tin <NUM> are added to make the part solderable to a PCB as shown in <FIG>. Other plating materials may be used for other mounting methods such as gold for bonding applications. DC resistance may be checked on each piece and those in tolerance are placed into product packaging, usually tape and reel, for shipment.

Claim 1:
A metal strip (<NUM>) resistor (<NUM>), comprising:
a metal strip (<NUM>) having a generally planar top surface and a generally planar bottom surface forming a resistive element and providing support for the metal strip (<NUM>) resistor (<NUM>) without use of a separate substrate, the metal strip (<NUM>) having a first end and an opposite second end;
a first photolithographically formed termination area on the top surface of the metal strip (<NUM>) adjacent the first end of the metal strip (<NUM>);
a second photolithographically formed termination area on the top surface of the metal strip (<NUM>) adjacent the second end of the metal strip (<NUM>);
a third photolithographically formed termination area on the bottom surface of the metal strip (<NUM>) adjacent the first end of the metal strip (<NUM>);
a fourth photolithographically formed termination area on the bottom surface of the metal strip (<NUM>) adjacent the second end of the metal strip (<NUM>);
a plating (<NUM>) on each of the first, second, third, and fourth termination areas, so as to render the first, second, third, and fourth termination areas conductive;
a first plating layer (<NUM>) covering the plating (<NUM>) of the first termination area, extending along the first end of the metal strip (<NUM>), and covering the plating (<NUM>) of the third termination area;
a second plating layer (<NUM>) covering the plating (<NUM>) of the second termination area, extending along the second end of the metal strip (<NUM>), and covering the plating (<NUM>) of the fourth termination area;
a first insulating material (<NUM>) overlaying the top surface of the metal strip (<NUM>) between the first and second termination areas; and
a second insulating material (<NUM>) overlaying the bottom surface of the metal strip (<NUM>) between the third and fourth termination areas;
wherein the plating (<NUM>) of the first termination area and the plating (<NUM>) of the second termination area, each, do not overlap the first insulating material (<NUM>), and
wherein the plating (<NUM>) of the third termination area and the plating (<NUM>) of the fourth termination area, each, do not overlap the second insulating material (<NUM>)