Patent Description:
In <CIT> techniques for determining an identifier for a volume of memory in a memory device of a computer system is described. In an embodiment, the memory device detects an indication of an initialization event of the computer system and receives command information after the detecting of the indication. In certain embodiments, the memory device stores an identifier value for association with the volume of memory, wherein the storing is based on whether the received command information specifies that the volume of memory is to be assigned an identifier.

<CIT> describes a system for atomic storage operations. The system comprises a storage device and a storage controller that coordinates the storage and retrieval of data using one or more indexes to locate and retrieve data.

The dependent claims recite selected optional features.

In the following, each of the described methods, apparatuses, examples, and aspects, which do not fully correspond to the invention as defined in the claims is thus not according to the invention and is, as well as the whole following description, present for illustration purposes only or to highlight specific aspects or features of the invention.

While the concepts of the present disclosure are susceptible to various modifications and alternative forms, specific embodiments thereof have been shown by way of example in the drawings and will be described herein in detail. It should be understood, however, that there is no intent to limit the concepts of the present disclosure to the particular forms disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives consistent with the present disclosure and the appended claims.

The disclosed embodiments may be implemented, in some cases, in hardware, firmware, software, or any combination thereof. The disclosed embodiments may also be implemented as instructions carried by or stored on a transitory or non-transitory machine-readable (e.g., computer-readable) storage medium, which may be read and executed by one or more processors. A machine-readable storage medium may be embodied as any storage device, mechanism, or other physical structure for storing or transmitting information in a form readable by a machine (e.g., a volatile or non-volatile memory, a media disc, or other media device).

As shown in <FIG>, an illustrative data storage device <NUM> for performing a command on selected memory devices includes a data storage controller <NUM> and a memory <NUM>, which illustratively includes non-volatile memory <NUM> and volatile memory <NUM>. As discussed in more detail below, in use, the data storage controller <NUM> is configured to select a subgroup of one or more non-volatile memory devices for performing a data operation (e.g., read, write, refresh, etc.).

The data storage controller <NUM> of the data storage device <NUM> may be embodied as any type of control device, circuitry, or collection of hardware devices capable of writing, reading, locating, and replacing data in the non-volatile memory <NUM>. In the illustrative embodiment, the data storage controller <NUM> includes a processor or processing circuitry <NUM>, local memory <NUM>, a host interface <NUM>, selection logic <NUM>, a buffer <NUM>, and memory control logic <NUM>. It should be appreciated that the data storage controller <NUM> may include additional devices, circuits, and/or components commonly found in a drive controller of a solid state drive in other embodiments.

The processor <NUM> may be embodied as any type of processor capable of performing the functions described herein. For example, the processor <NUM> may be embodied as a single or multi-core processor(s), digital signal processor, field programmable gate arrays (FPGA), microcontroller, or other processor or processing/controlling circuit. Similarly, the local memory <NUM> may be embodied as any type of volatile and/or non-volatile memory or data storage capable of performing the functions described herein. In the illustrative embodiment, the local memory <NUM> stores firmware and/or other instructions executable by the processor <NUM> to perform the described functions of the data storage controller <NUM>. In some embodiments, the processor <NUM> and the local memory <NUM> may form a portion of a system-on-a-chip (SoC) and be incorporated, along with other components of the data storage controller <NUM>, onto a single integrated circuit chip.

The host interface <NUM> may also be embodied as any type of hardware processor, processing circuitry, input/output circuitry, and/or collection of components capable of facilitating communication of the data storage device <NUM> with a host device or service (e.g., a host application). That is, the host interface <NUM> embodies or establishes an interface for accessing data stored on the data storage device <NUM> (e.g., stored in the memory <NUM>). To do so, the host interface <NUM> may be configured to utilize any suitable communication protocol and/or technology to facilitate communications with the data storage device <NUM> depending on the type of data storage device. For example, the host interface <NUM> may be configured to communicate with a host device or service using Serial Advanced Technology Attachment (SATA), Peripheral Component Interconnect express (PCIe), Serial Attached SCSI (SAS), Universal Serial Bus (USB), and/or other communication protocol and/or technology in some embodiments.

In the illustrative embodiment, the selection logic <NUM> is embodied as dedicated circuitry and/or device configured to select one or more non-volatile memory devices of the non-volatile memory <NUM> of the memory <NUM> to form a subgroup to perform a command. The selection logic <NUM> may be embodied as a co-processor, an application specific integrated circuit (ASIC), or other dedicated circuitry or device. In such embodiments, the selection logic <NUM> provides a hardware accelerated implementation of the select-related operations described herein. In other embodiments, at least a portion of the selection logic <NUM> may be embodied as firmware or other processor-executable instructions.

The buffer <NUM> of the data storage controller <NUM> is embodied as volatile memory used by the data storage controller <NUM> to temporarily store data that is being read from or written to the memory <NUM>. The particular size of the buffer <NUM> may be dependent on the total storage size of the memory <NUM>. The memory control logic <NUM> is illustratively embodied as hardware circuitry and/or one or more devices configured to control the read/write access to data at particular storage locations of memory <NUM>.

The non-volatile memory <NUM> may be embodied as any type of data storage capable of storing data in a persistent manner (even if power is interrupted to non-volatile memory <NUM>). For example, in the illustrative embodiment, the non-volatile memory <NUM> is embodied as one or more non-volatile memory devices <NUM>. The non-volatile memory devices <NUM> are illustratively embodied as byte or block-addressable, write-in-place non-volatile memory devices. In the illustrative embodiment, the non-volatile memory devices <NUM> are arranged in ranks. It should be appreciated that the non-volatile memory devices <NUM> in each rank are connected to the same communication channel as discussed in more detail below. However, in other embodiments, the non-volatile memory <NUM> may be embodied as any combination of memory devices that use chalcogenide phase change material (e.g., chalcogenide glass), or other types of byte or block-addressable, write-in-place non-volatile memory, ferroelectric random-access memory (FeTRAM), nanowire-based non-volatile memory, phase change memory (PCM), memory that incorporates memristor technology, magnetoresistive random-access memory (MRAM) or spin transfer torque (STT)-MRAM.

The volatile memory <NUM> may be embodied as any type of data storage capable of storing data while power is supplied to the volatile memory <NUM>. For example, in the illustrative embodiment, the volatile memory <NUM> is embodied as one or more volatile memory devices, and is periodically referred to hereinafter as volatile memory <NUM> with the understanding that the volatile memory <NUM> may be embodied as other types of non-persistent data storage in other embodiments. The volatile memory devices of the volatile memory <NUM> are illustratively embodied as dynamic random-access memory (DRAM) devices, but may be embodied as other types of volatile memory devices and/or memory technologies capable of storing data while power is supplied to volatile memory <NUM>.

Referring now to <FIG>, in use, the data storage device <NUM> may establish an environment <NUM>. The illustrative environment <NUM> includes a data manager <NUM>, a command issuer <NUM>, and an interface manager <NUM>. The data manager <NUM> further includes a device selector <NUM>. Further, the command issuer <NUM> further includes a data reader <NUM>, a data writer <NUM>, and a refresher <NUM>. Additionally, the illustrative environment <NUM> includes subgroup data <NUM>, which may be embodied as any data indicative of one or more subgroups and the memory devices associated with (e.g., within) each subgroup. The subgroup data <NUM> may be accessed by the modules and/or sub-modules of the data storage controller <NUM>. Each of the components of the environment <NUM> may be embodied as firmware, software, hardware, or a combination thereof. For example the logic and other components of the environment <NUM> may form a portion of, or otherwise be established by, the data storage controller <NUM> or other hardware components of the data storage device <NUM>. As such, in some embodiments, any one or more of the components of the environment <NUM> may be embodied as a circuit or collection of electrical devices (e.g., a data manager circuit <NUM>, a device selector circuit <NUM>, a command issuer circuit <NUM>, a data reader circuit <NUM>, a data writer circuit <NUM>, a refresher circuit <NUM>, an interface manager circuit <NUM>, etc.).

The data manager <NUM>, which may be embodied as hardware, firmware, software, virtualized hardware, emulated architecture, and/or a combination thereof as discussed above, is configured to control which non-volatile memory devices <NUM> of the non-volatile memory <NUM> are selected to perform a command. To do so, the data manager <NUM> includes the device selector <NUM>. The device selector <NUM> is configured to select a subgroup of non-volatile memory devices <NUM> to perform a command. Specifically, as described above, in the illustrative embodiment, the non-volatile memory <NUM> is embodied as a plurality of non-volatile memory devices <NUM> that are arranged in ranks. The non-volatile memory devices <NUM> in each rank are connected via a communication channel. Because the non-volatile memory devices <NUM> in a rank share the same communication channel, all non-volatile memory devices <NUM> in the same rank receive and perform in response to a command unless the device selector <NUM> defines a subgroup of non-volatile memory devices <NUM> in the rank to perform a command. In the illustrative embodiment, the device selector <NUM> is configured to form a subgroup of non-volatile memory devices <NUM> by selecting (i.e., adding or removing) one or more non-volatile memory devices <NUM> within the same rank to perform a command (e.g., read or write). It should be appreciated that selectively adding or removing a non-volatile memory device <NUM> of the same rank to a subgroup to perform a command reduces the overhead in memory and energy usage that would otherwise be incurred if the all of the non-volatile memory devices <NUM> in the rank were to perform the command.

Present invention includes methods of selecting one or more non-volatile memory devices <NUM> in a rank without modifying the assigned identifier of each of the non-volatile memory device <NUM>.

In some embodiments, the device selector <NUM> is configured to create a subgroup of one or more non-volatile memory devices <NUM> in a rank based on a device state of each non-volatile memory device <NUM>. In such embodiments, each non-volatile memory device <NUM> includes a device state indicative of whether the non-volatile memory device <NUM> is selected or deselected to perform a command. This allows the device selector <NUM> to select or deselect a non-volatile memory device <NUM> by changing the device state of the non-volatile memory device <NUM> without modifying a unique identifier of the non-volatile memory device <NUM>. In such embodiments, only the subgroup of non-volatile memory devices <NUM> that are in selected state respond to a command.

For example, the device selector <NUM> may add a non-volatile memory device <NUM> to a subgroup by selecting the identifier of the non-volatile memory device <NUM>. If the selected identifier matches a non-volatile memory device <NUM> within the rank, the device state of the non-volatile memory device <NUM> changes to the selected state. If the selected identifier does not match a non-volatile memory device <NUM> within the rank, the device state of the non-volatile memory device <NUM> does not change. For example, if the non-volatile memory device <NUM> was in a selected state, the device state will remain in the selected state, and if the non-volatile memory device <NUM> was in a deselected state, the device state will remain in the deselected state.

Similarly, the device selector <NUM> may remove a non-volatile memory device <NUM> from a subgroup by selecting the identifier of the non-volatile memory device <NUM>. If the selected identifier matches a non-volatile memory device <NUM> within the rank, the device state of the non-volatile memory device <NUM> changes to the deselected state. If the selected identifier does not match a non-volatile memory device <NUM> within the rank, the device state of the non-volatile memory device <NUM> does not change. For example, if the non-volatile memory device <NUM> was in a selected state, the device state will remain in the selected state, and if the non-volatile memory device <NUM> was in a deselected state, the device state will remain in the deselected state.

In some embodiments, the device selector <NUM> is configured to create a subgroup of one or more non-volatile memory devices <NUM> in a rank based on one or more mode register bits of each non-volatile memory device <NUM>. In such embodiments, each non-volatile memory device <NUM> includes at least two mode register mask bits including a read command mask bit and a write command mask bit. The mode register mask bits allows the device selector <NUM> to select one or more non-volatile memory devices <NUM> to perform a read and/or write command by clearing the corresponding mode register mask bit of the non-volatile memory devices <NUM>. Additionally, the device selector <NUM> may set one or more mode register mask bits of the non-volatile memory devices <NUM> to remove the non-volatile memory devices <NUM> from the subgroup associated with the corresponding command.

For example, the device selector <NUM> may add a non-volatile memory device <NUM> to a subgroup to perform a read command by clearing the read command mask bit of the non-volatile memory device <NUM>. In such embodiments, only the subgroup of non-volatile memory devices <NUM> that have the read command mask bit cleared respond to a read command. It should be appreciated that a non-volatile memory device <NUM> with the read command mask bit set does not respond to a read command even if a selected identifier matches the identifier of the non-volatile memory device <NUM>. Similarly, the device selector <NUM> may add a non-volatile memory device <NUM> to a subgroup to perform a write command by clearing the write command mask bit of the non-volatile memory device <NUM>. In such embodiments, only the subgroup of non-volatile memory devices <NUM> that have the write command mask bit cleared respond to a write command. It should be appreciated that a non-volatile memory device <NUM> with the write command mask bit set does not respond to a write command even if a selected identifier matches the identifier of the non-volatile memory device <NUM>. In such embodiments, the device selector <NUM> may remove a non-volatile memory device <NUM> from the subgroup by setting the read command mask bit of the non-volatile memory device <NUM>. The non-volatile memory device <NUM> with the read command mask bit set does not respond to a read command, and the non-volatile memory device <NUM> with the write command mask bit set does not respond to a write command.

For example, in the illustrative embodiments, the non-volatile memory <NUM> includes eleven of the non-volatile memory devices <NUM> arranged in a rank. Each non-volatile memory device <NUM> includes at least two identifiers, a master identifier and an assigned identifier. All master identifiers of the non-volatile memory devices <NUM> in the same rank are either all selected or deselected. The assigned identifier is a unique identifier that is assigned to each of the non-volatile memory devices <NUM> in the rank. At the initial setup, the master identifiers of all eleven memory devices <NUM> are selected, and the read command mask bit is cleared for the first nine memory devices <NUM> (i.e., assigned identifier <NUM> to <NUM>) but the read command mask bit is set for the tenth and eleventh memory devices. In other words, the data storage controller <NUM> may read data from the first nine memory devices, but the tenth and eleventh memory devices will block and not respond to a read command. In addition, the write command mask bit is cleared for the first ten memory devices (i.e., assigned identifier <NUM> to <NUM>) but the write command mask bit is set for the eleventh memory device. In other words, the data storage controller <NUM> may write data to the first ten memory devices but the eleventh memory device will block and not respond to a write command.

In such examples, if the data storage controller <NUM> receives a read command (e.g., from the host <NUM>) to read data from the tenth memory device <NUM>, the device selector <NUM> is configured to clear the read command mask bit of the tenth memory device. This allows the data storage controller <NUM> to read data from the tenth memory device <NUM> as well as from the first nine memory devices122 in response to receipt of the read command. Additionally, if the data storage controller <NUM> receives a write command to write data to the eleventh memory device <NUM>, the device selector <NUM> is configured to clear the write command mask bit of the eleventh memory device <NUM>. This allows the data storage controller <NUM> to write data to the eleventh memory device as well as from the first ten memory devices in response to receipt of the write command.

It should be appreciated that, in some embodiments, the command may be a read command, a write command, a refresh read command, and a refresh write command. In such embodiments, the refresh read command forces the non-volatile memory device <NUM> to perform a read command regardless of the status of the read command mask bit of the non-volatile memory device <NUM>. Similarly, the refresh write command forces the non-volatile memory device <NUM> to perform a write command regardless of the status of the write command mask bit of the non-volatile memory device <NUM>. Thus, the refresh commands have priority over other commands.

In some embodiments, the device selector <NUM> is configured to create a subgroup of one or more non-volatile memory devices <NUM> in a rank based on an additional identifier of each non-volatile memory device <NUM>. In such embodiments, each non-volatile memory device <NUM> is assigned an additional identifier that is used to identify a non-volatile memory device <NUM> to add to or remove from a subgroup. For example, each non-volatile memory device <NUM> may include a master identifier for refresh or other commands, a first assigned identifier for read operations, and a second assigned identifier for write operations.

The command issuer <NUM>, which may be embodied as hardware, firmware, software, virtualized hardware, emulated architecture, and/or a combination thereof as discussed above, is configured to manage the reading of data from and writing of data to a subgroup of non-volatile memory devices <NUM> of the non-volatile memory <NUM>. To do so, the command issuer <NUM> includes a data reader <NUM>, a data writer <NUM>, and a refresher <NUM>.

The data reader <NUM> is configured to read data from a selected subgroup of non-volatile memory device(s) <NUM> in response to a read command. To do so, the data reader <NUM> is configured to determine the subgroup of non-volatile memory devices <NUM> based on the received read command. As discussed above, the subgroup of non-volatile memory devices <NUM> includes one or more non-volatile memory devices <NUM> within the same rank. In some embodiments, the read command may identify one or more non-volatile memory devices <NUM> from which the data reader <NUM> is requested to read data. In some embodiments, the data reader <NUM> may select a subgroup of non-volatile memory device(s) <NUM> from the subgroup data <NUM> associated with parameters of the received read command, such as a context of the received read command, a type of data (e.g., text, image, video, audio) to be read, an amount of data to be read, and/or an identifier of software (e.g., a process, an application, etc.) associated with the read command. The subgroup data <NUM> includes a various subgroups of one or more non-volatile memory devices <NUM>.

The data writer <NUM> is configured to write data to a selected subgroup of non-volatile memory device(s) <NUM> of a selected subgroup in response to a write command. To do so, the data writer <NUM> is configured to determine the subgroup of non-volatile memory devices <NUM> based on the received write command. As discussed above, the subgroup of non-volatile memory devices <NUM> includes one or more non-volatile memory devices <NUM> within the same rank. In some embodiments, the write command may identify one or more non-volatile memory devices <NUM> in which the data writer <NUM> is requested to write data. In some embodiments, the data writer <NUM> may select a subgroup of non-volatile memory device(s) <NUM> from the subgroup data <NUM> associated with parameters of the received write command, such as a context of the received write command, a type of data (e.g., text, image, video, audio) to be written, an amount of data to be written, and/or an identifier of software (e.g., a process, an application, etc.) associated with the write command.

The refresher <NUM> is configured to perform a requested command to all non-volatile memory devices <NUM> in a rank in response to a refresh command. For example, the refresh command may be a refresh read command. In such a case, the refresher <NUM> may force read data from all non-volatile memory devices <NUM> in a rank in response to a refresh read command regardless of the state of each non-volatile memory device <NUM> (e.g., a selected/deselected device state, a status of read command mask bit, selected identifier). Similarly, the refresh command may be a refresh write command. In such a case, the refresher <NUM> may force write data to all non-volatile memory devices <NUM> in a rank in response to a refresh write command regardless of the state of each non-volatile memory device <NUM> (e.g., a selected/deselected device state, a status of write command mask bit, selected identifier).

The interface manager <NUM> is configured to handle various instructions, including but not limited to, data storage instructions and data read instructions received from a host <NUM>, which may be embodied as an application, service, and/or other device. In some embodiments, the interface manager <NUM> may be configured to handle other instructions as well, including self-monitoring, analysis and reporting technology ("SMART") instructions, and other instructions defined in the non-volatile memory express ("NVMe") specification. To handle the various instructions, the interface manager <NUM> is configured to identify a received instruction and any data and/or parameters associated with the instruction, and transmit those items to the data manager <NUM>. For example, in response to a read instruction, the interface manager <NUM> transmits the data read by the data manager <NUM> to the host <NUM>. Conversely, in response to a write instruction and/or a trim instruction, the interface manager <NUM> may transmit a result of the instruction to the host <NUM>, for example a confirmation that the instruction was received and/or completed.

Referring now to <FIG>, in use, the data storage controller <NUM> of the data storage device <NUM> may execute a method <NUM> for performing a command on a subgroup of non-volatile memory devices <NUM>. The method <NUM> begins at block <NUM> in which a data storage controller <NUM> determines whether a command has been received from a host <NUM> to perform the received command on one or more non-volatile memory devices <NUM> in a rank. As discussed above, in the illustrative embodiment, a command may be a read command, a write command, a refresh read command, or a refresh write command. If the data storage controller <NUM> determines that a command has not been received, the method <NUM> loops back to block <NUM> to continue waiting for a command from the host <NUM>. If, however, the data storage controller <NUM> determines that a command has been received, the method <NUM> advances to block <NUM>.

In block <NUM>, the data storage controller <NUM> determines which non-volatile memory devices <NUM> are selected, based on the received command, to perform the received command operation. To do so, the data storage controller <NUM> may identify the received command and any device data associated with the received command in block <NUM>. As discussed above, in some embodiments, the device data of each command may specify one or more non-volatile memory devices <NUM> within the rank to perform the command. Alternatively, in block <NUM>, in other embodiments, the data storage controller <NUM> may determine one or more non-volatile memory devices <NUM> based on parameters of a command.

In block <NUM>, the data storage controller <NUM> determines whether to create a subgroup of selected non-volatile memory devices <NUM> based on the received command. If the data storage controller <NUM> determines not to create a subgroup based on the received command, the method <NUM> skips ahead to block <NUM>. For example, if the data storage controller <NUM> determines that the received command is requested to be applied to all non-volatile memory devices <NUM> in the rank, the data storage controller <NUM> determines that there is no need to create a subgroup. In some embodiments, the data storage controller <NUM> may select a subgroup from the subgroup data <NUM> based on parameters of the command and the selected non-volatile memory devices <NUM>.

If, however, the data storage controller <NUM> determines to create a subgroup based on the selected non-volatile memory devices <NUM>, the method <NUM> advances to block <NUM>. In block <NUM>, the data storage controller <NUM> creates a subgroup based on the selected non-volatile memory devices <NUM>. To do so, in some embodiments, the data storage controller <NUM> may set a device state of each of the selected non-volatile memory devices <NUM> to a selected state in block <NUM>. In some embodiments, the data storage controller <NUM> may clear a read or write command mask bit of each of the selected non-volatile memory devices <NUM> to zero in block <NUM>. In other embodiments, the data storage controller <NUM> may create a subgroup of the selected non-volatile memory devices <NUM> by selecting an identifier of the non-volatile memory device <NUM> in block <NUM>. For example, as discussed above, each non-volatile memory device <NUM> may include at least three distinct identifiers for read, write, and refresh or miscellaneous commands. The data storage controller <NUM> may create a subgroup of selected non-volatile memory devices <NUM> for a read command operation by identifying a read identifier of each of the selected non-volatile memory devices <NUM>. It should be appreciated that the created subgroup may be stored in the subgroup data <NUM>.

In block <NUM>, the data storage controller <NUM> issues the received command to the selected non-volatile memory devices <NUM> to be performed. In block <NUM>, if the issued command is a read command, the data storage controller <NUM> reads data from the selected subgroup of non-volatile memory devices <NUM>. In block <NUM>, if the issued command is a write command, the data storage controller <NUM> writes data to the selected subgroup of non-volatile memory devices <NUM>. In block <NUM>, if the issued command is a refresh read command, the data storage controller <NUM> reads data from the selected non-volatile memory devices <NUM> regardless of the status of the non-volatile memory device <NUM> (e.g., a selected/deselected device state, a status of read command mask bit, selected identifier). In block <NUM>, if the issued command is a refresh write command, the data storage controller <NUM> writes data to the selected non-volatile memory devices <NUM> regardless of the status of the non-volatile memory device <NUM> (e.g., a selected/deselected device state, a status of write command mask bit, selected identifier). It should be appreciated that the selected non-volatile memory devices <NUM> may be a subgroup of non-volatile memory devices <NUM> in the rank or all non-volatile memory devices <NUM> in the rank depending on the received command. Further, it should be appreciated that while read, write and refresh commands are described as examples of commands that may be issued to the selected memory devices <NUM>, in other embodiments, other commands may be issued to the selected memory devices <NUM>.

Referring now to <FIG>, in use, the data reader <NUM> of the data storage controller <NUM> may execute a method <NUM> for reading data from the subgroup of selected non-volatile memory devices <NUM> in response to receipt of a read command. The method <NUM> begins at block <NUM> in which a data storage controller <NUM> determines whether a read command has been received from the host <NUM>. If the data reader <NUM> determines that a read command has not been received, the method <NUM> loops back to block <NUM> to continue waiting for a read command. If, however, the data reader <NUM> determines that a read command has been received, the method <NUM> advances to block <NUM>.

In block <NUM>, the data reader <NUM> determines whether each non-volatile memory device <NUM> in the rank is part of a selected subgroup of non-volatile memory devices <NUM>. To do so, in some embodiments, the data reader <NUM> may determine if a read command mask bit of the non-volatile memory device <NUM> is cleared (e.g., is equal to zero) in block <NUM>. In such embodiment, if a non-volatile memory device <NUM> has a cleared read command mask bit, the data reader <NUM> determines that the non-volatile memory device <NUM> is part of the selected subgroup. In some embodiments, the data reader <NUM> may determine if a device state of the non-volatile memory device <NUM> is in a selected state in block <NUM>. In such embodiments, if a non-volatile memory device <NUM> is in a selected state, the data reader <NUM> determines that the non-volatile memory device <NUM> is part of the selected subgroup. In other embodiments, the data reader <NUM> may determine if a read identifier of the non-volatile memory device <NUM> matches one of the selected identifiers indicated in the read command in block <NUM>. In such embodiments, if a read identifier of a non-volatile memory device <NUM> matches one of the selected identifiers, the data reader <NUM> determines that the non-volatile memory device <NUM> is part of the selected subgroup.

If the data reader <NUM> determines that the non-volatile memory device <NUM> is part of the selected subgroup in block <NUM>, the method <NUM> advances to block <NUM> to read data from the non-volatile memory device <NUM>. If, however, the data reader <NUM> determines that the non-volatile memory device <NUM> is not part of the selected subgroup in block <NUM>, the method <NUM> loops back to block <NUM> to continue waiting for another read command. It should be understood that, in the illustrative embodiment, the method <NUM> is performed concurrently for every memory device <NUM> in the rank.

Referring now to <FIG>, in use, the data writer <NUM> of data storage controller <NUM> may execute a method <NUM> for writing data to a subgroup of selected non-volatile memory devices <NUM> in response to receipt of a write command. The method <NUM> begins at block <NUM> in which a data storage controller <NUM> determines whether a write command has been received from a host <NUM>. If the data writer <NUM> determines that a write command has not been received, the method <NUM> loops back to block <NUM> to continue waiting for a write command. If, however, the data writer <NUM> determines that a write command has been received, the method <NUM> advances to block <NUM>.

In block <NUM>, the data writer <NUM> determines whether each non-volatile memory device <NUM> in the rank is part of a selected subgroup of non-volatile memory devices <NUM>. To do so, in some embodiments, the data writer <NUM> may determine if a write command mask bit of a given non-volatile memory device <NUM> is cleared (e.g., equal to zero) in block <NUM>. In such embodiments, if a non-volatile memory device <NUM> has a cleared write command mask bit, the data writer <NUM> determines that the non-volatile memory device <NUM> is part of the selected subgroup. In some embodiments, the data writer <NUM> may determine if a device state of the non-volatile memory device <NUM> is in a selected state in block <NUM>. In such embodiments, if a non-volatile memory device <NUM> is in a selected state, the data writer <NUM> determines that the non-volatile memory device <NUM> is part of the selected subgroup. In other embodiments, the data writer <NUM> may determine if a write identifier of the non-volatile memory device <NUM> matches one of the selected identifiers indicated in the write command in block <NUM>. In such embodiments, if a write identifier of a non-volatile memory device <NUM> matches one of the selected identifiers, the data writer <NUM> determines that the non-volatile memory device <NUM> is part of the selected subgroup.

If the data writer <NUM> determines that the non-volatile memory device <NUM> is part of the selected subgroup in block <NUM>, the method <NUM> advances to block <NUM> to write data to the non-volatile memory device <NUM>. If, however, the data writer <NUM> determines that the non-volatile memory device <NUM> is not part of the selected subgroup in block <NUM>, the method <NUM> loops back to block <NUM> to continue waiting for another write command. It should be understood that, in the illustrative embodiment, the method <NUM> is performed concurrently for every memory device <NUM> in the rank.

Referring now to <FIG>, in some embodiments, the data storage device <NUM> may be incorporated in, or form a portion of, a computing device <NUM>. The computing device <NUM> may be embodied as any type of computing device in which the data storage device <NUM> may be used. For example, the computing device <NUM> may be embodied as a smart phone, a tablet computer, a notebook, a laptop computer, a netbook, an Ultrabook™, a wearable computing device, a pair of smart glasses, a head-mounted computing device, a cellular phone, a desktop computer, a smart device, a personal digital assistant, a mobile Internet device, a server, a data storage device, and/or any other computing/communication device. As shown in <FIG>, the illustrative computing device <NUM> includes a processor <NUM>, an input/output ("I/O") subsystem <NUM>, and a main memory <NUM>. It should be appreciated that, in some embodiments, the computing device <NUM> may include other or additional components, such as peripheral devices <NUM> or those commonly found in a typical computing device (e.g., various input/output devices and/or other components), in other embodiments. Additionally, in some embodiments, one or more of the illustrative components may be incorporated in, or otherwise form a portion of, another component. For example, the memory <NUM>, or portions thereof, may be incorporated in the processor <NUM> in some embodiments.

The processor <NUM> may be embodied as any type of processor capable of performing the functions described herein. For example, the processor <NUM> may be embodied as a single or multi-core processor(s), digital signal processor, microcontroller, or other processor or processing/controlling circuit. Similarly, the memory <NUM> may be embodied as any type of volatile or non-volatile memory or data storage capable of performing the functions described herein. In operation, the memory <NUM> may store various data and software used during operation of the computing device <NUM> such as operating systems, applications, programs, libraries, and drivers. The memory <NUM> is communicatively coupled to the processor <NUM> via the I/O subsystem <NUM>, which may be embodied as circuitry and/or components to facilitate input/output operations with the processor <NUM>, the memory <NUM>, and other components of the computing device <NUM>. For example, the I/O subsystem <NUM> may be embodied as, or otherwise include, memory controller hubs, input/output control hubs, firmware devices, communication links (i.e., point-to-point links, bus links, wires, cables, light guides, printed circuit board traces, etc.) and/or other components and subsystems to facilitate the input/output operations.

As shown in <FIG>, the data storage device <NUM> may be incorporated in, or form a portion of, one or more other components of the computing device <NUM>. For example, the data storage device <NUM> may be embodied as, or otherwise be included in, the main memory <NUM>. Additionally or alternatively, the data storage device <NUM> may be embodied as, or otherwise included in, a solid state drive <NUM> of the computing device <NUM>. Further, in some embodiments, the data storage device <NUM> may be embodied as, or otherwise included in, a hard disk drive <NUM> of the computing device <NUM>. Of course, in other embodiments, the data storage device <NUM> may be included in or form a portion of other components of the computing device <NUM>.

Reference to memory devices can apply to different memory types, and in particular, any memory that has a bank group architecture. Memory devices generally refer to volatile memory technologies. Volatile memory is memory whose state (and therefore the data stored on it) is indeterminate if power is interrupted to the device. Nonvolatile memory refers to memory whose state is determinate even if power is interrupted to the device. Dynamic volatile memory requires refreshing the data stored in the device to maintain state. One example of dynamic volatile memory includes DRAM (dynamic random access memory), or some variant such as synchronous DRAM (SDRAM). A memory subsystem as described herein may be compatible with a number of memory technologies, such as DDR4 (DDR version <NUM>, initial specification published in September <NUM> by JEDEC), DDR4E (in development by JEDEC), LPDDR4 (LOW POWER DOUBLE DATA RATE (LPDDR) version <NUM>, JESD209-<NUM>, originally published by JEDEC in August <NUM>), WIO2 (Wide I/O <NUM> (WideIO2), JESD229-<NUM>, originally published by JEDEC in August <NUM>), HBM (HIGH BANDWIDTH MEMORY DRAM, JESD235, originally published by JEDEC in October <NUM>), DDR5 (DDR version <NUM>, currently in discussion by JEDEC), LPDDR5 (currently in discussion by JEDEC), HBM2 (HBM version <NUM>), currently in discussion by JEDEC), and/or others, and technologies based on derivatives or extensions of such specifications.

Claim 1:
An apparatus comprising:
a data storage controller (<NUM>) to:
select at least a portion of memory devices (<NUM>) in a rank based on one of at least two identifiers assigned to all memory devices of the selected at least portion of memory devices, wherein the memory devices in the rank include non-volatile, byte or block addressable memory connected to a same communication channel; and
issue a command to access the selected at least portion of memory devices;
characterised in that
the at least two identifiers include a first identifier to indicate that the selected at least portion of memory devices are to be accessed responsive to a write command and a second identifier to indicate that the selected at least portion of memory devices are to be accessed responsive to a read command;
wherein the selected at least portion of memory devices comprises a subgroup of memory devices in the rank; and
wherein the subgroup is selected based on the first or second identifier.