Patent Description:
In several superconducting quantum applications, for example, fluxonium style quantum bits and traveling wave parametric amplifiers, lossless inductors with large inductance are desirable. One way to fabricate such an inductor is to use arrays of Josephson junctions. Traditionally these arrays have been made to be in a planar configuration. However, the surface area required for planar arrays becomes prohibitively large as the number of Josephson junctions increases. Devices and methods of the prior art are described in <NPL>); <NPL>); <NPL>); <CIT>; <NPL>) and <NPL>).

According to an embodiment of the present invention, a fluxonium qubit includes a superinductor. The superinductor includes a substrate, a first vertical stack extending in a vertical direction from a surface of the substrate, the first vertical stack including a first Josephson junction and a second Josephson junction connected in series along the vertical direction. The superinductor further includes a second vertical stack extending in the vertical direction from the surface of the substrate and spaced apart from the first vertical stack. The second vertical stack includes a third Josephson junction. The superinductor includes a superconducting connector connecting the first and second vertical stacks in series such that the first, second, and third Josephson junctions are connected in series. The fluxonium qubit further includes a shunted Josephson junction connected to the superinductor with superconducting wires such that the first, second, and third Josephson junctions of the superinductor that are in series are connected in parallel with the shunted Josephson junction.

According to an embodiment of the present invention, a method of producing a fluxonium qubit includes forming, on a substrate, a first vertical stack extending in a vertical direction from a surface of the substrate, the first vertical stack including a first Josephson junction and a second Josephson junction connected in series along the vertical direction. The method further includes forming, on the substrate, a second vertical stack extending in the vertical direction from the surface of the substrate and spaced apart from the first vertical stack. The second vertical stack includes a third Josephson junction. The method further includes forming a superconducting connector connecting the first and second vertical stacks in series such that the first, second, and third Josephson junctions are connected in series, and connecting a shunted Josephson junction to the first and second vertical stacks such that the first, second, and third Josephson junctions of the superinductor that are in series are connected in parallel with the shunted Josephson junction.

According to an embodiment of the present invention, a superinductor includes a substrate, a first vertical stack extending in a vertical direction from a surface of the substrate, the first vertical stack including a first Josephson junction and a second Josephson junction connected in series along the vertical direction. The superinductor further includes a second vertical stack extending in the vertical direction from the surface of the substrate and spaced apart from the first vertical stack. The second vertical stack includes a third Josephson junction. The superinductor includes a superconducting connector connecting the first and second vertical stacks in series such that the first, second, and third Josephson junctions are connected in series.

According to an embodiment of the present invention, a quantum computer includes a refrigeration system under vacuum including a containment vessel, and a qubit chip contained within a refrigerated vacuum environment defined by the containment vessel. The qubit chip includes a plurality of fluxonium qubits. The quantum computer further includes a plurality of electromagnetic waveguides arranged within the refrigerated vacuum environment so as to direct electromagnetic energy to and receive electromagnetic energy from at least a selected one of the plurality of fluxonium qubits. Each of the plurality of fluxonium qubits includes a superinductor. The superinductor includes a substrate, and a first vertical stack extending in a vertical direction from a surface of the substrate. The first vertical stack includes a first Josephson junction and a second Josephson junction connected in series along the vertical direction. The superinductor further includes a second vertical stack extending in the vertical direction from the surface of the substrate and spaced apart from the first vertical stack. The second vertical stack includes a third Josephson junction. The superinductor includes a superconducting connector connecting the first and second vertical stacks in series such that the first, second, and third Josephson junctions are connected in series. Each fluxonium qubit further includes a shunted Josephson junction connected to the superinductor with superconducting wires such that the first, second, and third Josephson junctions of the superinductor that are in series are connected in parallel with the shunted Josephson junction.

The devices and methods disclosed herein enable large numbers of Josephson junctions to be connected in series in a significantly reduced planar surface area as compared to traditional Josephson junction arrays.

<FIG> is a schematic illustration of a superinductor <NUM> according to an embodiment of the invention. The superinductor <NUM> includes a substrate <NUM>, and a first vertical stack <NUM> extending in a vertical direction D from a surface <NUM> of the substrate <NUM>. The first vertical stack <NUM> includes a first Josephson junction <NUM> and a second Josephson junction <NUM> connected in series along the vertical direction D. The superinductor <NUM> includes a second vertical stack <NUM> extending in the vertical direction D from the surface <NUM> of the substrate <NUM>. The second vertical stack <NUM> includes a third Josephson junction <NUM>. The second vertical stack <NUM> is spaced apart from the first vertical stack <NUM>.

The superinductor <NUM> includes a superconducting connector <NUM> connecting the first and second vertical stacks <NUM>, <NUM> in series such that the first Josephson junction <NUM>, second Josephson junction <NUM>, and third Josephson junction <NUM> are connected in series.

In some embodiments, the top connection doesn't have to short two vertical stacks. Both vertical stacks can have a tunnel barrier termination, for example, but not limited to a tunnel barrier, and it can be shorted from top. This will add two more inductors in series. This embodiment can provide some more fabrication flexibility.

<FIG> is a schematic illustration of a superinductor <NUM> according to an embodiment of the invention. In addition to the features shown in <FIG>, the second vertical stack <NUM> of the superinductor <NUM> includes a fourth Josephson junction <NUM> connected in series with the third Josephson junction <NUM> along the vertical direction D. The superconducting connector <NUM> connects the first and second vertical stacks <NUM>, <NUM> in series such that the first Josephson junction <NUM>, second Josephson junction <NUM>, third Josephson junction <NUM>, and fourth Josephson junction <NUM> are connected in series.

The vertical direction D may be substantially normal to the surface <NUM> of the substrate <NUM>. The vertical direction D may be exactly normal to the surface <NUM> of the substrate <NUM>, or may be approximately normal to the surface <NUM> of the substrate <NUM>. According to an embodiment of the invention, the first vertical stack <NUM> and the second vertical stack <NUM> have a same number of Josephson junctions, as shown in <FIG>, for example. According to an embodiment of the invention, the superconducting connector <NUM> connecting the first and second vertical stacks <NUM>, <NUM> extends in a direction substantially parallel to the surface <NUM> of the substrate <NUM>. According to an embodiment of the invention, each of the first, second, third, and fourth Josephson junctions includes a tunnel barrier layer disposed between two superconducting layers. For example, in <FIG>, the second Josephson junction <NUM> includes a tunnel barrier layer <NUM> disposed between two superconducting layers <NUM>, <NUM>. The third Josephson junction <NUM> includes a tunnel barrier layer <NUM> disposed between two superconducting layers <NUM>, <NUM>. The height of each tunnel barrier layer may be, for example, about <NUM>.

<FIG> is a schematic illustration of a superinductor <NUM> according to an embodiment of the invention. The superinductor <NUM> includes the features of the superinductor <NUM> shown in <FIG>, and further includes a support material <NUM> disposed between the first and second vertical stacks <NUM>, <NUM> and under the superconducting connector <NUM>. The support material <NUM> may be a dielectric material. For example, the support material <NUM> may be silicon oxide or a spin-on glass. The support material <NUM> may be a dielectric material that can be easily removed, for example, by etching.

By forming at least two Josephson junctions in a vertical stack, the two Josephson junctions cover less surface area of the surface of the substrate than they would if they were formed side-by-side. Further, there is no surface area penalty for further increasing the number of Josephson junctions per stack. For example, <FIG> is a schematic illustration of a superinductor <NUM> having a first vertical stack <NUM> and a second vertical stack <NUM> that each include at least five Josephson junctions. The first vertical stack <NUM> includes five Josephson junctions <NUM>, <NUM>, <NUM>, <NUM>, <NUM> connected in series. The second vertical stack <NUM> includes five Josephson junctions <NUM>, <NUM>, <NUM>, <NUM>, <NUM> connected in series. A superconducting connector <NUM> connects the first and second vertical stacks <NUM>, <NUM> in series such that the five Josephson junctions <NUM>, <NUM>, <NUM>, <NUM>, <NUM> in the first vertical stack <NUM> and the five Josephson junctions <NUM>, <NUM>, <NUM>, <NUM>, <NUM> in the second vertical stack <NUM> are connected in series.

As shown in <FIG> as compared to <FIG>, the addition of three or four Josephson junctions per vertical stack does not increase the surface area of the first and second vertical stacks <NUM>, <NUM> on the surface of the substrate <NUM>. According to an embodiment of the invention, the surface area of each vertical stack is about <NUM><NUM>.

According to an embodiment of the invention, the first vertical stack and the second vertical stack each include at least <NUM>, <NUM>, <NUM>, or <NUM> Josephson junctions. When the first and second vertical stacks are connected, the superinductor includes <NUM>, <NUM>, <NUM>, or <NUM> Josephson junctions connected in series. The numbers of Josephson junctions listed here are provided as non-limiting examples. The first and second vertical stacks could include alternative number of Josephson junctions. The number of Josephson junctions per stack may depend on the desired inductance of the superinductor, and on the materials used to form the individual Josephson junctions. As the inductance of each individual Josephson junction increases, the number of Josephson junctions required to meet a predetermined total inductance decreases.

According to an embodiment of the invention, the superinductor includes three or more vertical stacks. <FIG> is a schematic illustration of a superinductor <NUM> that includes four vertical stacks. In addition to first and second vertical stacks <NUM>, <NUM> including three Josephson junctions <NUM>, <NUM>, <NUM>, the superinductor <NUM> includes a third vertical stack <NUM> extending in the vertical direction D. The third vertical stack includes a fourth Josephson junction <NUM> and a fifth Josephson junction <NUM> connected in series along the vertical direction D. The superinductor <NUM> includes a fourth vertical stack <NUM> extending in the vertical direction D from the surface of the substrate. The fourth vertical stack <NUM> includes a sixth Josephson junction <NUM>. The superinductor <NUM> includes superconducting connectors <NUM>, <NUM> connecting the third and fourth vertical stacks <NUM>, <NUM> in series with the first and second vertical stacks <NUM>, <NUM> such that the first Josephson junction <NUM>, second Josephson junction <NUM>, third Josephson junction <NUM>, fourth Josephson junction <NUM>, fifth Josephson junction <NUM>, and sixth Josephson junction <NUM> are connected in series.

According to an embodiment of the invention, a superinductor is connected in parallel with a Josephson junction to form a fluxonium qubit. <FIG> is a schematic illustration of a fluxonium qubit <NUM> according to an embodiment of the invention. The fluxonium qubit <NUM> includes a superinductor <NUM>. The superinductor <NUM> includes a substrate <NUM>, and a first vertical stack <NUM> extending in a vertical direction D from a surface <NUM> of the substrate <NUM>. The first vertical stack <NUM> includes a first Josephson junction <NUM> and a second Josephson junction <NUM> connected in series along the vertical direction. The superinductor <NUM> includes a second vertical stack <NUM> extending in the vertical direction D from the surface <NUM> of the substrate <NUM>. The second vertical stack <NUM> includes a third Josephson junction <NUM>. The second vertical stack <NUM> is spaced apart from the first vertical stack <NUM>. The superinductor <NUM> further includes a superconducting connector <NUM> connecting the first and second vertical stacks <NUM>, <NUM> in series such that the first Josephson junction <NUM>, second Josephson junction <NUM>, and third Josephson junction <NUM> are connected in series. Although, <FIG> is an example with six Josephson junctions, the general concepts of the current invention are not limited to that particular number. There can be more than a total of six Josephson junctions, or less than a total of six Josephson junctions in other embodiments.

In addition to the superinductor <NUM>, the fluxonium qubit <NUM> includes a shunted Josephson junction <NUM> connected to the superinductor <NUM> with superconducting wires <NUM>, <NUM> such that the first Josephson junction <NUM>, second Josephson junction <NUM>, and third Josephson junction <NUM> of the superinductor <NUM> that are in series are connected in parallel with the shunted Josephson junction <NUM>. The fluxonium qubit <NUM> may include a superinductor that has more than two vertical stacks, like the superinductor <NUM> schematically illustrated in <FIG>.

<FIG> is a flowchart that illustrates a method <NUM> of producing a fluxonium qubit according to an embodiment of the current invention. Note that the order of the steps in <FIG> are not limiting. For example, the step that appears last in <FIG> can also be the first one in some embodiments. The method <NUM> includes forming, on a substrate, a first vertical stack <NUM> extending in a vertical direction from a surface of the substrate. The first vertical stack includes a first Josephson junction and a second Josephson junction connected in series along the vertical direction. The method <NUM> further includes forming, on the substrate, a second vertical stack <NUM> extending in the vertical direction from the surface of the substrate. The second vertical stack includes a third Josephson junction. The second vertical stack is spaced apart from the first vertical stack. The method <NUM> further includes forming a superconducting connector <NUM> connecting the first and second vertical stacks in series such that the first, second, and third Josephson junctions are connected in series. The method <NUM> further includes connecting a shunted Josephson junction to the first and second vertical stacks <NUM> such that the first, second, and third Josephson junctions of the superinductor that are in series are connected in parallel with the shunted Josephson junction.

According to an embodiment of the invention, the forming process is an additive process with subtractive steps throughout. <FIG> are schematic illustrations of an additive process that can be used to form a superinductor according to an embodiment of the invention. In <FIG>, like reference numerals refer to like features, for example, reference numeral <NUM> in <FIG> and <NUM> in <FIG> both refer to a substrate.

To produce the superinductor, a superconducting material is formed on a substrate <NUM>, as shown in <FIG>. A mask and shadow evaporation technique may be used to apply the superconducting material such that it has a first portion <NUM> and a second portion <NUM> spaced apart from the first portion <NUM>. According to an embodiment of the invention, the first portion <NUM> is spaced apart from the second portion <NUM> by about <NUM>. The substrate <NUM> may be a silicon substrate, for example, though embodiments of the invention are not limited to a silicon substrate. The superconducting material may be niobium, for example, or any superconducting material suitable for quantum computing applications.

As shown in <FIG>, once the first portion <NUM> and second portion <NUM> of the superconducting material are formed, a resist <NUM> can be spun and baked on the first portion <NUM>, second portion <NUM>, and substrate <NUM>. The resist may be an ultraviolet photo resist or an electron beam resist, for example. The resist can then be patterned to form two holes <NUM>, <NUM>, as shown in <FIG>.

In addition or as an alternative to the patterning shown in <FIG>, the resist can be ion milled to form a reverse profile. <FIG> shows holes <NUM>, <NUM> formed by ion milling. The holes <NUM>, <NUM> are wider at the upper surface of the first portion <NUM> and second portion <NUM> of the superconducting material than at the upper surface of the resist <NUM>. The reverse profile may facilitate removal of the resist later on in the production process.

<FIG> shows the deposition of a tunnel barrier layer <NUM>. The tunnel barrier layer <NUM> is formed on the first portion <NUM> and second portion <NUM> of the superconducting material. The tunnel barrier layer <NUM> may be a dielectric material. For example, the tunnel barrier layer <NUM> may be an oxide, such as aluminum oxide. Alternatively, instead of depositing a material to form the tunnel barrier layer <NUM>, the tunnel barrier layer <NUM> may be formed by exposing the upper surface of the first portion <NUM> and second portion <NUM> of the superconducting material to oxygen, thereby forming an oxide. According to an embodiment of the invention, the tunnel barrier layer <NUM> has a thickness between about <NUM> and <NUM>. According to an embodiment of the invention, the tunnel barrier layer <NUM> has a thickness of about <NUM>.

As shown in <FIG>, once the tunnel barrier layer <NUM> has been formed, a layer of superconducting material <NUM> is formed on the tunnel barrier layer. The combination of the first portion <NUM>, the tunnel barrier layer <NUM>, and the superconducting material <NUM> form a first Josephson junction. Similarly, the combination of the second portion <NUM>, the tunnel barrier layer <NUM>, and the superconducting material <NUM> form a second Josephson junction. The superconducting material <NUM> according to an embodiment of the invention may have a thickness of about <NUM>-<NUM>. According to an embodiment of the invention, the resist <NUM> has a thickness of about <NUM>, allowing for many alternating layers of the tunnel barrier and the superconducting material to be formed within the holes <NUM>, <NUM>. According to an embodiment of the invention, the resist <NUM> has a thickness greater than <NUM>.

<FIG> shows the result of forming an additional tunnel barrier layer <NUM> by deposition or by exposure to oxygen, for example, and an additional layer of superconducting material <NUM>. The combination of the superconducting material <NUM>, the tunnel barrier layer <NUM>, and the superconducting material <NUM> form an additional Josephson junction on each vertical stack. Additional Josephson junctions may be added by alternately forming layers of the tunnel barrier and the superconducting material.

The process continues with lift-off of the resist, resulting in the structure shown in <FIG>. The structure includes two vertical stacks <NUM>, <NUM>. At least one of the vertical stacks includes two or more Josephson junctions. According to some embodiments, each vertical stack includes at least five, twenty, fifty, or one hundred Josephson junctions. The first and second vertical stacks may include the same number of Josephson junctions. Alternatively, the first and second vertical stacks may include different numbers of Josephson junctions.

Once the resist has been removed, a new layer of resist <NUM> is deposited and baked, as shown in <FIG>, and then patterned to expose the substrate <NUM> between the two vertical stacks <NUM>, <NUM>, as shown in <FIG>. The process then includes depositing an oxide or sacrificial material <NUM> between the two vertical stacks <NUM>, <NUM>, as shown in <FIG>. The oxide or sacrificial material <NUM> is sufficiently wide to prevent tunneling between the two vertical stacks <NUM>, <NUM>. The oxide or sacrificial material <NUM> acts as a support material for a subsequently-formed superconducting connector. Once the oxide or sacrificial material <NUM> has been deposited, the resist <NUM> can be removed. The resulting structure is shown in <FIG>.

The process then includes forming a superconducting connector to connect the two vertical stacks <NUM>, <NUM> in series. Before depositing the superconducting connector, a resist <NUM> is deposited, baked, and then etched to form a hole <NUM> exposing the oxide or sacrificial material <NUM> and the uppermost superconducting layer of the two vertical stacks <NUM>, <NUM>, as shown in <FIG>.

As shown in <FIG>, a layer of superconducting material <NUM> is deposited in the hole <NUM> in the resist <NUM>. The superconducting material <NUM> may be deposited by dual angle evaporation, although the embodiments of the invention are not limited to dual angle evaporation of the superconducting material <NUM>. The superconducting material <NUM> contacts the uppermost superconducting layer of the two vertical stacks <NUM>, <NUM>. Further, the superconducting material <NUM> connects the Josephson junctions of the first vertical stack <NUM> in series with the Josephson junctions of the second vertical stack <NUM>. According to an embodiment of the invention, the superconducting material <NUM> extends in a direction substantially parallel to the surface of the substrate <NUM>.

The process further includes removing the resist <NUM>, resulting in the superinductor <NUM> shown in <FIG>. Although the superinductor <NUM> in <FIG> includes the oxide or sacrificial material <NUM>, the process may further include etching out the oxide or sacrificial material <NUM>, resulting in a superinductor similar to superinductor <NUM> shown in <FIG>, in which the layer of superconducting material <NUM> is only supported by the two vertical stacks <NUM>, <NUM>.

<FIG> is a schematic illustration of a quantum computer <NUM> according to an embodiment of the invention. The quantum computer <NUM> includes a refrigeration system under vacuum including a containment vessel <NUM>. The quantum computer <NUM> also includes a qubit chip <NUM> contained within a refrigerated vacuum environment defined by the containment vessel <NUM>. The qubit chip <NUM> includes a plurality of fluxonium qubits <NUM>, <NUM>, <NUM>. The fluxonium qubits <NUM>, <NUM>, <NUM> may each include a separate substrate, or may be formed on the qubit chip <NUM>, with the qubit chip <NUM> acting as a shared substrate. The quantum computer <NUM> also includes a plurality of electromagnetic waveguides <NUM>, <NUM> arranged within the refrigerated vacuum environment so as to direct electromagnetic energy to and receive electromagnetic energy from at least a selected one of the plurality of fluxonium qubits <NUM>, <NUM>, <NUM>. The electromagnetic waveguides <NUM>, <NUM> may be formed on the qubit chip <NUM>, as shown in <FIG>.

Each of the fluxonium qubits <NUM>, <NUM>, <NUM> may have the vertical structure described herein. The vertical structure of the fluxonium qubits <NUM>, <NUM>, <NUM> significantly reduces their footprint over traditional arrays. The fabrication is compatible with traditional superconducting circuit technology. The vertical stacks allow for arrays to be fabricated based on epitaxial stacks that can have better quality and lower loss than traditional angle-evaporated junctions.

Claim 1:
A fluxonium qubit (<NUM>, <NUM>, <NUM>, <NUM>), comprising:
a superinductor (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>), comprising:
a substrate (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>);
a first vertical stack (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>) extending in a vertical direction (D) from a surface (<NUM>, <NUM>) of the substrate (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>), the first vertical stack (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>) comprising a first Josephson junction (<NUM>, <NUM>, <NUM>) and a second Josephson junction (<NUM>, <NUM>, <NUM>) connected in series along the vertical direction (D);
a second vertical stack (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>) extending in the vertical direction (D) from the surface (<NUM>, <NUM>) of the substrate (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>) and spaced apart from the first vertical stack (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>), the second vertical stack (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>) comprising a third Josephson junction (<NUM>, <NUM>, <NUM>) ; and
a superconducting connector (<NUM>, <NUM>, <NUM>, <NUM>) connecting the first and second vertical stacks (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>; <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>) in series such that the first, second, and third Josephson junctions (<NUM>, <NUM>, <NUM>; <NUM>, <NUM>, <NUM>; <NUM>, <NUM>, <NUM>) are connected in series; and
a shunted Josephson junction (<NUM>) connected to the superinductor (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>) with superconducting wires (<NUM>, <NUM>) such that the first, second, and third Josephson junctions (<NUM>, <NUM>, <NUM>; <NUM>, <NUM>, <NUM>; <NUM>, <NUM>, <NUM>) of the superinductor (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>) that are in series are connected in parallel with the shunted Josephson junction (<NUM>),
characterised in that the first vertical stack (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>) and the second vertical stack (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>) each comprise at least five Josephson junctions (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>).