Patent Description:
Power semiconductor modules often include a semiconductor substrate arranged in a housing. A semiconductor arrangement including a plurality of controllable semiconductor elements (e.g., two IGBTs in a half-bridge configuration) may be arranged on the substrate. The substrate usually comprises a substrate layer (e.g., a ceramic layer), a first metallization layer deposited on a first side of the substrate layer and a second metallization layer deposited on a second side of the substrate layer. The controllable semiconductor elements are mounted, for example, on the first metallization layer. The second metallization layer may be attached to a heat sink or to a ground surface of the housing. The controllable semiconductor devices are usually mounted to the semiconductor substrate by soldering or sintering techniques.

A cover of the housing is often used to exert a force on the substrate such that the substrate is pressed on the heat sink or on the ground surface of the housing, respectively. In this way, a thermal resistance between the substrate and the heat sink or ground surface may be achieved. However, assembling such semiconductor module arrangements is often cumbersome and there is a risk that the stability of the housing is degraded during the assembly process which may decrease the overall lifetime of the semiconductor module arrangement.

Document <CIT> discloses a power semiconductor module comprising at least one semiconductor substrate comprising a dielectric insulation layer, a first metallization layer attached to the dielectric insulation layer, and a second metallization layer attached to the dielectric insulation layer, wherein the dielectric insulation layer is disposed between the first and second metallization layers. A power semiconductor arrangement is arranged on the at least one semiconductor substrate, wherein the power semiconductor arrangement includes at least one first terminal element and wherein the first terminal element is connected to the semiconductor substrate with a first end. The power semiconductor module further comprises a base plate, wherein the semiconductor substrate is arranged on the base plate, a housing that is configured to enclose the semiconductor substrate and that is configured to be connected to the base plate, the housing comprising sidewalls and a cover, wherein the cover comprises an opening, and a second terminal element that is arranged within the opening in the cover of the housing such that a first end of the second terminal element protrudes into the housing, the first end being configured to be electrically and mechanically connected to a second end of the first terminal element to form a contact element, and such that a second end of the second terminal element protrudes out of the housing to allow the contact element to be electrically contacted from the outside. A first seal is arranged within the opening in the cover of the housing, the first seal being configured to seal the opening such that gases are prevented from entering the housing through the opening.

Document <CIT> discloses a package structure including a substrate, at least one electronic component, a housing and at least one strut. The at least one electronic component is disposed on a first surface of the substrate. The housing covers the first surface of the substrate. The housing has an accommodation space. The at least one electronic component is accommodated within the accommodation space. The at least one strut is protruded from an inner surface of the housing and extended toward the accommodation space. The at least one elastomer is arranged between the corresponding strut and the substrate.

There is a need for a semiconductor module arrangement that provides a good thermal resistance between the substrate and the heat sink or ground surface of the housing, that is easy to assemble, and that has an increased lifetime.

A power semiconductor module arrangement includes at least one semiconductor substrate comprising a dielectric insulation layer and a first metallization layer attached to the dielectric insulation layer, at least one semiconductor body arranged on the first metallization layer, at least one end stop element, wherein each end stop element is arranged either on the semiconductor substrate or on one of the at least one semiconductor body and extends from the semiconductor substrate or the respective semiconductor body in a vertical direction that is perpendicular to a top surface of the semiconductor substrate, a housing at least partly enclosing the semiconductor substrate, the housing comprising sidewalls and a cover, and a casting compound covering the semiconductor substrate and partly filling the housing. The housing further comprises at least one press-on pin, each of the at least one press-on pin extending from the cover of the housing towards one of the at least one end stop element, and exerting a pressure on the respective end stop element in the vertical direction towards the semiconductor substrate or the respective semiconductor body. The casting compound has a thickness in the vertical direction, and the end stop element has a height in the vertical direction that is greater than the thickness of the casting compound such that a top surface of the end stop element that faces away from the semiconductor substrate or the semiconductor body is not covered by the casting compound. The at least one end stop element comprises a frame that encloses a hollow space or cavity, wherein the casting compound surrounds the frame and at least partly fills the hollow space or cavity.

A method for producing a power semiconductor module arrangement includes arranging at least one semiconductor body on a semiconductor substrate, the semiconductor substrate comprising a dielectric insulation layer and a first metallization layer attached to the dielectric insulation layer, arranging at least one end stop element either on the semiconductor substrate or on one of the at least one semiconductor body such that each of the at least one end stop elements extends from the semiconductor substrate or the respective semiconductor body in a vertical direction that is perpendicular to a top surface of the semiconductor substrate, arranging the semiconductor substrate in a housing, leaving a cover of the housing open, and forming a layer of a casting compound such that it covers the semiconductor substrate and partly fills the housing. The casting compound has a thickness in the vertical direction, and the end stop element has a height in the vertical direction that is greater than the thickness of the casting compound such that a top surface of the end stop element that faces away from the semiconductor substrate or the semiconductor body is not covered by the casting compound. The at least one end stop element comprises a frame that encloses a hollow space or cavity, wherein the casting compound surrounds the frame and at least partly fills the hollow space or cavity. After forming the layer of casting compound, a cover is arranged on the sidewalls, thereby closing the housing. The housing comprises at least one press-on pin, each of the at least one press-on pin extending from the cover of the housing towards one of the at least one end stop element, thereby exerting a pressure on the respective end stop element in the vertical direction towards the semiconductor substrate or the respective semiconductor body when the cover is arranged in its final mounted position.

In the following detailed description, reference is made to the accompanying drawings. The drawings show specific examples in which the invention may be practiced. It is to be understood that the features and principles described with respect to the various examples may be combined with each other, unless specifically noted otherwise. In the description as well as in the claims, designations of certain elements as "first element", "second element", "third element" etc. are not to be understood as enumerative. Instead, such designations serve solely to address different "elements". That is, e.g., the existence of a "third element" does not require the existence of a "first element" and a "second element". An electrical line or electrical connection as described herein may be a single electrically conductive element, or include at least two individual electrically conductive elements connected in series and/or parallel. Electrical lines and electrical connections may include metal and/or semiconductor material, and may be permanently electrically conductive (i.e., non-switchable). A semiconductor body as described herein may be made from (doped) semiconductor material and may be a semiconductor chip or be included in a semiconductor chip. A semiconductor body has electrically connecting pads and includes at least one semiconductor element with electrodes.

Referring to <FIG>, a cross-sectional view of an exemplary power semiconductor module is illustrated. The power semiconductor module includes a housing and a semiconductor substrate <NUM>. The semiconductor substrate <NUM> includes a dielectric insulation layer <NUM>, a (structured) first metallization layer <NUM> attached to the dielectric insulation layer <NUM>, and a second (structured) metallization layer <NUM> attached to the dielectric insulation layer <NUM>. The dielectric insulation layer <NUM> is disposed between the first and second metallization layers <NUM>, <NUM>. It is, however, also possible that the semiconductor substrate <NUM> only comprises a first metallization layer <NUM>, while the second metallization layer <NUM> is omitted.

Each of the first and second metallization layers <NUM>, <NUM> may consist of or include one of the following materials: copper; a copper alloy; aluminum; an aluminum alloy; any other metal or alloy that remains solid during the operation of the power semiconductor module arrangement. The semiconductor substrate <NUM> may be a ceramic substrate, that is, a substrate in which the dielectric insulation layer <NUM> is a ceramic, e.g., a thin ceramic layer. The ceramic may consist of or include one of the following materials: aluminum oxide; aluminum nitride; zirconium oxide; silicon nitride; boron nitride; or any other dielectric ceramic. For example, the dielectric insulation layer <NUM> may consist of or include one of the following materials: Al<NUM>O<NUM>, AlN, SiC, BeO or Si<NUM>N<NUM>. For instance, the substrate <NUM> may be, e.g., a Direct Copper Bonding (DCB) substrate, a Direct Aluminum Bonding (DAB) substrate, or an Active Metal Brazing (AMB) substrate. Further, the substrate <NUM> may be an Insulated Metal Substrate (IMS). An Insulated Metal Substrate generally comprises a dielectric insulation layer <NUM> comprising (filled) materials such as epoxy resin or polyimide, for example. The material of the dielectric insulation layer <NUM> may be filled with ceramic particles, for example. Such particles may comprise, e.g., Si<NUM>O, Al<NUM>O<NUM>, AlN, or BN and may have a diameter of between about <NUM> and about <NUM>. The substrate <NUM> may also be a conventional printed circuit board (PCB) having a non-ceramic dielectric insulation layer <NUM>. For instance, a non-ceramic dielectric insulation layer <NUM> may consist of or include a cured resin.

The semiconductor substrate <NUM> is arranged in a housing. In the example illustrated in <FIG>, the semiconductor substrate <NUM> is arranged on a ground surface <NUM> of the housing. The housing further comprises sidewalls <NUM> and a cover <NUM>. In other examples, however, the ground surface <NUM> of the housing may be omitted. In such cases the semiconductor substrate <NUM> itself may form the ground surface of the housing. In such cases the semiconductor substrate <NUM> may be arranged on a heat sink, for example. In the example in <FIG>, only one semiconductor substrate <NUM> is arranged on the ground surface <NUM>. In some power semiconductor module arrangements, more than one semiconductor substrate <NUM> may be arranged in a single housing. The ground surface <NUM>, the sidewalls <NUM> and the cover <NUM> may include a metal or a metal alloy, for example. It is, however, also possible that the ground surface <NUM>, sidewalls <NUM> and cover <NUM> comprise an electrically insulating material such as a plastic or ceramic material, for example. The housing may also include a liquid crystal polymer, for example.

The semiconductor substrate <NUM> may be connected to the ground surface <NUM> by means of a connection layer (not specifically illustrated in <FIG>). Such a connection layer may be a solder layer, a layer of an adhesive material, or a layer of a sintered metal powder, e.g., a sintered silver powder, for example. Any other kind of electrically conducting or non-conducting connection layer is also possible.

One or more semiconductor bodies <NUM> may be arranged on the semiconductor substrate <NUM>. Each of the semiconductor bodies <NUM> arranged on the semiconductor substrate <NUM> may include a diode, an IGBT (Insulated-Gate Bipolar Transistor), a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), a JFET (Junction Field-Effect Transistor), a HEMT (High-Electron-Mobility Transistor), or any other suitable controllable semiconductor element.

The one or more semiconductor bodies <NUM> may form a semiconductor arrangement on the semiconductor substrate <NUM>. In <FIG>, only two semiconductor bodies <NUM> are exemplarily illustrated. The second metallization layer <NUM> of the semiconductor substrate <NUM> in <FIG> is a continuous layer. The first metallization layer <NUM> of the example in <FIG> is also a continuous layer. However, the first metallization layer <NUM>, the second metallization layer <NUM> or both may also be structured layers. "Structured layer" means that, e.g., the respective metallization layer <NUM>, <NUM> is not a continuous layer, but includes recesses between different sections of the layer. Different semiconductor bodies <NUM> may be mounted to the same or to different sections of the first metallization layer <NUM>. Different sections of the first metallization layer <NUM> may have no electrical connection or may be electrically connected to one or more other sections using, e.g., bonding wires. Electrical connections may also include connection plates or conductor rails, for example, to name just a few examples. The one or more semiconductor bodies <NUM> may be electrically and mechanically connected to the semiconductor substrate <NUM> by an electrically conductive connection layer <NUM>. Such an electrically conductive connection layer <NUM> may be a solder layer, a layer of an electrically conductive adhesive, or a layer of a sintered metal powder, e.g., a sintered silver powder, for example.

The power semiconductor module further includes terminal elements <NUM>. The terminal elements <NUM> are electrically connected to the semiconductor substrate <NUM>, e.g., to the first metallization layer <NUM> of the semiconductor substrate <NUM>, and form a contact element which provides an electrical connection between the inside and the outside of the housing. A first end of the terminal elements <NUM> may be electrically and mechanically connected to the first metallization layer <NUM> by an electrically conductive connection layer (not specifically illustrated). Such an electrically conductive connection layer may be a solder layer, a layer of an electrically conductive adhesive, or a layer of a sintered metal powder, e.g., a sintered silver powder, for example. A second end of the terminal elements <NUM> protrudes out of the housing to allow the contact element to be electrically contacted from the outside. The cover <NUM> of the housing may comprise openings through which the terminal elements <NUM> may protrude such that their first side is inside the housing and their second side is outside the housing. The terminal elements <NUM> may protrude vertically out of the housing when the housing is arranged to surround the semiconductor substrate <NUM>. According to another example, terminal elements <NUM> may also protrude horizontally through a sidewall <NUM> of the housing.

A power semiconductor modules further includes a casting compound <NUM>, as is illustrated in the example of <FIG>. The casting compound <NUM> may consist of or include a silicone gel or may be a rigid molding compound, for example. The casting compound partly fills the interior of the housing, thereby covering the semiconductor substrate <NUM> and the semiconductor bodies <NUM>, and any other components and electrical connections <NUM> that are arranged on the semiconductor substrate <NUM>. Electrical connections <NUM> such as, e.g., bonding wires or bonding ribbons, may electrically couple the semiconductor bodies <NUM> to the first metallization layer <NUM>, to other semiconductor bodies <NUM>, or to any other components that may be arranged inside the housing. The terminal elements <NUM> may be partly embedded in the casting compound <NUM>. At least the second end of the terminal elements <NUM>, however, may not be covered by the casting compound <NUM> and may protrude from the casting compound <NUM>. The casting compound <NUM> is configured to protect the components and electrical connections inside the power semiconductor module arrangement, in particular inside the housing, from certain environmental conditions, mechanical damage and insulation faults.

The sidewalls <NUM> of the housing generally may be mechanically connected to the semiconductor substrate <NUM> by means of a joint (not specifically illustrated in the Figures). This joint may be a solder joint, a cold welding joint, or an adhesive joint, for example. Any other suitable joints are also possible to mechanically connect the sidewalls <NUM> of the housing to the semiconductor substrate, which also provide a suitable seal such that no, or at least less gasses may enter the housing <NUM>. The sidewalls <NUM> and the ground surface <NUM> may also be provided as a single piece (not specifically illustrated). This means that there are no joints between the sidewalls <NUM> and the ground surface <NUM> of the housing.

The semiconductor module arrangement further comprises an end stop element <NUM>. The end stop element <NUM> is arranged on the semiconductor substrate <NUM>, for example. In the Figures, the end stop element is illustrated as being arranged at a certain distance from the different semiconductor bodies <NUM>. This, however, is only an example. In other examples, the end stop element <NUM> may be arranged in close vicinity to at least one of the semiconductor bodies <NUM>. In close vicinity in this context refers to a distance that is shorter than, e.g., <NUM>, <NUM> or <NUM>. According to another example, the end stop element <NUM> is arranged on a semiconductor body <NUM> instead of on the semiconductor substrate <NUM>. If the end stop element <NUM> is arranged on a semiconductor body <NUM>, the respective semiconductor body <NUM> is arranged between the end stop element <NUM> and the semiconductor substrate <NUM>.

When the semiconductor module arrangement is fully assembled, the semiconductor substrate <NUM> is pressed on the ground surface <NUM> of the housing in order to reduce a thermal resistance between the semiconductor substrate <NUM> and the ground surface <NUM>. Even further, the semiconductor substrate <NUM> is kept in a desired position and is prevented from shifting inside the housing. A press-on pin <NUM> is coupled to the cover <NUM> of the housing or is integrally formed with the cover <NUM> of the housing. The press-on pin <NUM> may be coupled to the housing in any suitable way. For example, the press-on pin <NUM> may be coupled to the housing by means of an adhesive bond, or a screwed or bolted connection. When the cover <NUM> is arranged on the sidewalls <NUM> to close the housing, the press-on pin <NUM> contacts the end stop element <NUM> and exerts a pressure on the end stop element <NUM>. While the semiconductor module arrangement illustrated in <FIG> illustrates the cover <NUM> still partly open, <FIG> illustrates an example of a semiconductor module arrangement in a final mounting position (cover fully closed). The bold arrows in the Figures illustrate a direction in which the cover <NUM> and the press-on pin <NUM> are moved while closing the housing and a direction of the pressure exerted on the end stop element <NUM> once the housing is fully closed.

The semiconductor module arrangement illustrated in <FIG> does not comprise a casting compound <NUM>. A casting compound, however, is illustrated in the examples of <FIG>. When the semiconductor module arrangement comprises a casting compound <NUM>, the end stop element <NUM> is largely molded in the casting compound <NUM>. However, a second end of the end stop element <NUM> facing away from the semiconductor substrate <NUM> or the semiconductor body <NUM> on which the end stop element <NUM> is mounted protrudes from the casting compound <NUM>. Therefore, a top surface of the end stop element <NUM> facing away from the semiconductor substrate <NUM> or the semiconductor body <NUM> on which the end stop element <NUM> is mounted is not covered by the casting compound <NUM>. In this way, the top surface may be easily contacted by the press-on pin <NUM>, even if the casting compound <NUM> has already been formed. The press-on pin <NUM> then contacts the top surface of the end stop element <NUM> (but not the casting compound <NUM>) and exerts pressure on the top surface, thereby pressing the end stop element <NUM> on the semiconductor substrate <NUM> (or on the semiconductor body <NUM>) and subsequently pressing the semiconductor substrate <NUM> on the ground surface <NUM> of the housing. This allows the casting compound <NUM> to be formed even before the housing is fully closed, that is before arranging the cover <NUM> on the sidewalls <NUM>.

The casting compound <NUM> may be formed when the sidewalls <NUM> are already arranged to surround the semiconductor substrate <NUM>. The casting compound <NUM> is generally formed by forming a liquid or gel-like pre-layer. The sidewalls <NUM> prevent the material of the pre-layer from spreading unintentionally. A heating step may follow during which liquid that is present in the pre-layer is at least partly evaporated. In this way, the pre-layer is hardened to form the resulting casting compound <NUM>. Such a heating step may either me performed before arranging the cover <NUM> on the sidewalls <NUM> or alternatively, the heating step may be performed after mounting the cover <NUM> on the sidewalls <NUM>. When performing the heating step before mounting the cover <NUM> on the sidewalls <NUM>, the cover <NUM> needs not be exposed to the heat applied during the heating step. This may increase the overall lifetime of the cover <NUM>, and therefore of the complete semiconductor module arrangement, because the material of the cover <NUM> does not get fragile or brittle from being exposed to the heat.

The end stop element <NUM> may comprise a solid body, for example. That is, the end stop element <NUM> may comprise a main body that is completely formed of a solid block of suitable material. According to an example, the end stop element <NUM> may comprise a pin or cuboid having an angular or rounded cross-section. The casting compound <NUM> may then surround the end stop element <NUM>. However, as the end stop element <NUM> does not have any cavities or holes, the casting compound <NUM> cannot intrude into the end stop element <NUM>. According to another example, however, the end stop element <NUM> may comprise at least one cavity or hole such that the casting compound <NUM> may at least partly fill the cavity or hole. This will be described in further detail below with respect to <FIG> and <FIG>.

In the examples illustrated in <FIG>, the sidewalls <NUM> of the housing are coupled to the semiconductor substrate <NUM> and the semiconductor substrate <NUM> is arranged on the ground surface <NUM> of the housing. The cover <NUM> in these examples comprises a top part, covering the opening formed by the sidewalls <NUM>, and side parts which extend perpendicular to the top part and parallel to the sidewalls <NUM> of the housing when the cover <NUM> is arranged on the semiconductor substrate. The side parts of the cover <NUM> extend from the top part towards the ground surface <NUM>. When the semiconductor module arrangement is fully assembled, the side parts may even contact the ground surface <NUM>. For example, the side parts may be permanently coupled to the ground surface <NUM> in order to fix the cover <NUM> in place and prevent it from moving or even falling off. For example, the cover <NUM> may be soldered or glued to the ground surface <NUM>.

This, however, is only an example. As is exemplarily illustrated in <FIG>, it is also possible that the cover <NUM> is permanently attached to the sidewalls <NUM> of the housing only. The cover <NUM> may be glued to the sidewalls <NUM> or may be attached to the sidewalls by means of any suitable mechanical fixing mechanism. In the example illustrated in <FIG>, the cover <NUM> comprises projections which engage with corresponding counterparts provided in the sidewalls <NUM>.

The example illustrated in <FIG> is somewhat similar to the examples illustrated in <FIG>. However, in the example of <FIG> the side parts of the cover <NUM> comprise projections with threaded holes <NUM>. The ground surface <NUM> may also comprise threaded holes <NUM>. The cover <NUM> in this example may be attached to the ground surface <NUM> by means of screws or bolts <NUM> that are inserted into the threaded holes <NUM>. However, any other way of permanently mounting the cover <NUM> on the sidewalls <NUM> is also possible.

In the examples illustrated in <FIG>, the semiconductor module arrangement only comprises one end stop element <NUM> and one corresponding press-on pin <NUM> attached to the cover <NUM>. This, however, is only an example. As is illustrated in <FIG>, the semiconductor module arrangement may also comprise more than one end stop element <NUM> and more than one corresponding press-on pin <NUM>. In the examples illustrated in <FIG>, the semiconductor module arrangement comprises three end stop elements <NUM> and three press-on pins <NUM>. However, any number n of end stop elements <NUM> and press-on pins <NUM> with n ≥ <NUM> is generally possible. When providing more than one end stop element <NUM> and more than one corresponding press-on pin <NUM>, the pressure exerted on the semiconductor substrate <NUM> may be distributed more evenly over the semiconductor substrate <NUM>. However, a greater number of end stop elements <NUM> and press-on pins <NUM> increases the space requirements.

The end stop elements <NUM> may be formed of a rigid material. However, there is a risk that a pressure that is exerted on the semiconductor substrate <NUM> or the semiconductor body <NUM> on which the end stop element <NUM> is mounted becomes too high. This may damage the semiconductor body <NUM> and/or the semiconductor substrate <NUM>. Therefore, the end stop element <NUM> may be at least partly elastic such that, when a pressure exerted to the end stop element <NUM> by the respective press-on pin <NUM> exceeds a predefined threshold, the end stop element <NUM> is compressed in order to limit a pressure exerted on the semiconductor substrate <NUM> or on the semiconductor body <NUM>. That is, when the press-on pin <NUM> exerts pressure on the end stop element <NUM>, the end stop element <NUM> remains in its original form as long as the pressure is below a certain threshold. Once the pressure exceeds the threshold, the end stop element <NUM> is compressed to a certain degree and changes from its original form to a compressed form.

According to one example, the end stop element <NUM> comprises a material that is stable up to a certain point but compresses when the pressure exceeds a certain threshold. The threshold depends on the kind of material that is used to form the end stop element <NUM>. Some materials stay in the compressed form once the pressure is released, others return to their original form after releasing the pressure. According to another example, a compression of the end stop element <NUM> may result from a structural shape of the end stop element <NUM>. That is, the material of the end stop element <NUM> by itself may not be compressible. However, the end stop element <NUM> may be bent or distorted to a certain degree under pressure.

One example of such an end stop element <NUM> is schematically illustrated in <FIG>, wherein <FIG> illustrate views of the end stop element <NUM> from different sides. The end stop element <NUM> illustrated in <FIG> comprises a frame that surrounds a cavity or hollow space. The frame in the example illustrated in <FIG> has a generally trapezoidal shape. That is, a top surface of the end stop element <NUM> which is in contact with the press-on pin <NUM> when the semiconductor module is fully assembled has a length l2 in a first horizontal direction x that is shorter than a length l1 of a lower surface. The lower surface of the end stop element <NUM> is the surface that is attached to the semiconductor substrate <NUM> or semiconductor body <NUM>. As is illustrated in <FIG>, the lower surface may not be a continuous surface but may comprise a recess such that the lower surface is formed by two separate parts. Each of the two separate parts of the lower surface may be coupled to a different one of two side sections of the end stop element <NUM>, the side sections coupling the top surface to the parts of the lower surface. In the side view illustrated in <FIG>, the cavity or hollow space is visible. The side view illustrated in <FIG> shows a side view of one of the side sections. The side sections may have a width w in a second horizontal direction z which is perpendicular to the first horizontal direction x. The width w of the side sections may be between <NUM> and <NUM>, for example. According to one example, the width w of the side sections is <NUM>. The end stop element <NUM> may have a height h48 of between <NUM> and <NUM>, for example. The length l2 of the top surface may be between <NUM> and <NUM>, for example, and the length <NUM> of the lower surface may be between <NUM> and <NUM>, for example. These dimensions, however, are merely examples. The dimensions of the end stop element <NUM> generally depend on the dimensions of the semiconductor module arrangement. The height h48 of the end stop element <NUM>, for example, is higher than a height h5 of the casting compound <NUM> formed in the housing such that the top surface of the end stop element <NUM> is not covered by the casting compound <NUM>.

The structural shape of the end stop element <NUM> illustrated in <FIG> allows the end stop element <NUM> to bend or distort when a pressure exerted on the top surface exceeds a certain threshold. The bending, however, may mainly take place in those sections of the end stop element <NUM> that are arranged above and are not covered by the casting compound <NUM>. As the casting compound <NUM> is hardened during the process of assembling the semiconductor module arrangement, the casting compound <NUM> itself does not deform at all or only to a very limited extent. Damage of the casting compound <NUM> should be avoided in order to guarantee that the semiconductor substrate <NUM> and the elements mounted on the semiconductor substrate <NUM> are still sufficiently protected by the casting compound <NUM>.

Now referring to <FIG>, another example of an end stop element <NUM> is schematically illustrated. In the example illustrated in <FIG>, the length l2 of the top surface is larger than the length l1 of the lower surface. The frame of the end stop element <NUM> forms a lower part surrounding a cavity or hollow space, and an upper part that is bent in order to rest on the lower part. The top surface is connected to the lower part on one side only while the second side rests in free air. In this way the top surface is held in a springy fashion such that it may bend towards the semiconductor substrate <NUM> when the pressure exerted on the top surface exceeds a certain threshold. The specific form illustrated in <FIG>, however, is only a further example. Any other forms of the end stop element <NUM> that exhibit the characteristics described above are generally possible.

The at least one end stop element <NUM> may comprise an electrically insulating material. However, according to another example it is also possible that the at least one end stop element <NUM> comprises an electrically conducting material. The at least one press-on pin <NUM> may also comprise an electrically conducting material. In this way, the at least one end stop element <NUM> and the corresponding press-on pins <NUM> may form contact elements which provide electrical connections between the inside and the outside of the housing. The press-on pins <NUM> may be electrically coupled to the outside of the housing by any suitable means, for example, to allow for the press-on pins <NUM> and end stop elements <NUM> to be contacted from the outside of the housing. Alternatively or additionally, it is also possible that internal electrical connections are formed by means of the end stop elements <NUM> and press-on pins <NUM>. The press-on pins <NUM> and end stop elements <NUM> may replace at least some of the terminal elements <NUM>, for example. It is also possible that only some, but not all, end stop elements <NUM> and press-on pins <NUM> are used as terminal elements, while other press-on pins <NUM> and end stop elements <NUM> are electrically insulating and do not serve as terminal elements.

Claim 1:
A power semiconductor module arrangement comprising:
at least one semiconductor substrate (<NUM>) comprising a dielectric insulation layer (<NUM>) and a first metallization layer (<NUM>) attached to the dielectric insulation layer (<NUM>);
at least one semiconductor body (<NUM>) arranged on the first metallization layer (<NUM>);
at least one end stop element (<NUM>), wherein each end stop element (<NUM>) is arranged either on the semiconductor substrate (<NUM>) or on one of the at least one semiconductor body (<NUM>) and extends from the semiconductor substrate (<NUM>) or the respective semiconductor body (<NUM>) in a vertical direction (y) that is perpendicular to a top surface of the semiconductor substrate (<NUM>);
a housing at least partly enclosing the semiconductor substrate (<NUM>), the housing comprising sidewalls (<NUM>) and a cover (<NUM>); and
a casting compound (<NUM>) covering the semiconductor substrate (<NUM>) and partly filling the housing, wherein
the housing further comprises at least one press-on pin (<NUM>), each of the at least one press-on pin extending from the cover (<NUM>) of the housing towards one of the at least one end stop element (<NUM>), and exerting a pressure on the respective end stop element (<NUM>) in the vertical direction (y) towards the semiconductor substrate (<NUM>) or the respective semiconductor body (<NUM>)
the casting compound (<NUM>) has a thickness (h5) in the vertical direction (y),
the end stop element (<NUM>) has a height (h48) in the vertical direction (y) that is greater than the thickness (h5) of the casting compound (<NUM>) such that a top surface of the end stop element (<NUM>) that faces away from the semiconductor substrate (<NUM>) or the semiconductor body (<NUM>) is not covered by the casting compound (<NUM>), and
the at least one end stop element (<NUM>) comprises a frame that encloses a hollow space or cavity, wherein the casting compound (<NUM>) surrounds the frame and at least partly fills the hollow space or cavity.