Patent Description:
The present disclosure relates to manufacturing integrated circuit devices and the devices resulting therefrom.

A method of manufacturing a magnetoresistive device (for example, a magnetoresistive memory, a magnetoresistive sensor/transducer, etc.) from a magnetoresistive stack/structure is described herein. <CIT> discloses a method for forming a magnetic tunneling junction (MTJ) array in a STT-MRAM involving two photolithography steps each followed by two plasma etching steps so as to form two orthogonal sets of parallel lines defining posts in a hard mask which are then transferred through a magnetoresistive layer stack. The hard mask has an upper Ta layer and a lower NiCr layer. The Ta layer is etched with a fluorocarbon plasma while the NiCr layer and underlying MTJ layers are etched with a methanol plasma. <CIT> describes similar methods of fabricating MTJ arrays comprising two orthogonal line patterning steps using a dielectric/metal/dielectric three-layer hard mask. A self-aligned double patterning method using sidewall spacers may be employed for one or both orthogonal line patterning steps to achieve dense arrays with feature dimensions one half of the minimum photolithography feature size (F). The present invention, as a further development of the aforementioned technique, is embodied by a method according to independent claim <NUM>. Further advantageous features are set out in the dependent claims.

Embodiments of the present disclosure may be implemented in connection with aspects illustrated in the attached drawings. These drawings show different aspects of the present disclosure and, where appropriate, reference numerals illustrating like structures, components, materials and/or elements in different figures are labeled similarly. It is understood that various combinations of the structures, components, and/or elements, other than those specifically shown, are contemplated and are within the scope of the present disclosure.

For simplicity and clarity of illustration, the figures depict the general structure and/or manner of construction of the various embodiments. For ease of illustration, the figures depict the different regions along the thickness of the illustrated magnetoresistive stacks as a layer having well defined boundaries (i.e., depicted using lines). However, one skilled in the art would understand that, in reality, at an interface between adjacent regions or layers, the materials of these regions may alloy together, or migrate into one or the other material, and make their boundaries ill-defined or diffuse. That is, although multiple layers with distinct interfaces are illustrated in the figures, in some cases, over time and/or exposure to high temperatures, materials of some of the layers may migrate into or interact with materials of other layers to present a more diffuse interface between these layers. Further, although the figures illustrate each region or layer as having a relatively uniform thickness across its width, a skilled artisan would recognize that, in reality, the different regions may have a non-uniform thickness (e.g., the thickness of a layer may vary along the width of the layer).

In the figures and description, details of well-known features (e.g., interconnects, etc.) and manufacturing techniques (e.g., deposition techniques, etching techniques, etc.) may be omitted for the sake of brevity (and to avoid obscuring other features), since these features/technique are well known to a skilled artisan. Elements in the figures are not necessarily drawn to scale. The dimensions of some features may be exaggerated relative to other features to improve understanding of the exemplary embodiments. Cross-sectional views are simplifications provided to help illustrate the relative positioning of various regions/layers and to describe various processing steps. One skilled in the art would appreciate that the cross-sectional views are not drawn to scale and should not be viewed as representing dimensional relationships between different regions/layers. Moreover, while certain regions/layers and features are illustrated with straight <NUM>-degree edges, in reality, such regions/layers may be more "rounded" and/or gradually sloping. It should also be noted that, even if it is not specifically mentioned, aspects described with reference to one embodiment may also be applicable to, and may be used with, other embodiments.

It should be noted that all numeric values disclosed herein (including all disclosed thickness values, limits, and ranges) may have a variation of ±<NUM>% (unless a different variation is specified) from the disclosed numeric value. For example, a layer disclosed as being "t" units thick can vary in thickness from (t-<NUM>. 1t) to (t+<NUM>. Further, all relative terms such as "about," "substantially," "approximately," etc. are used to indicate a possible variation of ±<NUM>% (unless noted otherwise or another variation is specified). Moreover, in the claims, values, limits, and/or ranges of the thickness and atomic composition of, for example, the described layers/regions, means the value, limit, and/or range ±<NUM>%.

It should be noted that the description set forth herein is merely illustrative in nature and is not intended to limit the embodiments of the subject matter, or the application and uses of such embodiments. Any implementation described herein as exemplary is not to be construed as preferred or advantageous over other implementations. Rather, the term "exemplary" is used in the sense of example or "illustrative," rather than "ideal. " The terms "comprise," "include," "have," "with," and any variations thereof are used synonymously to denote or describe a non-exclusive inclusion. As such, a device or a method that uses such terms does not include only those elements or steps, but may include other elements and steps not expressly listed or inherent to such device and method. Further, the terms "first," "second," and the like, herein do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. Similarly, terms of relative orientation, such as "top," "bottom," etc. are used with reference to the orientation of the structure illustrated in the figures being described. Moreover, the terms "a" and "an" herein do not denote a limitation of quantity, but rather denote the presence of at least one of the referenced item.

In this disclosure, the term "region" is used generally to refer to one or more layers of material. That is, a region (as used herein) may include a single layer (or coating) of material or multiple layers or coatings of materials stacked one on top of another to form a multi-layer system. Further, although in the description below, the different regions in the disclosed stack/structure are sometimes referred to by specific names (hardmask region, reference region, transition region, etc.), this is only for ease of description and not intended as a functional description of the layer.

As alluded to above, in one exemplary aspect, the exemplary magnetoresistive devices disclosed in the present disclosure, formed from a magnetoresistive stack/structure fabricated according to the manufacturing principles described herein, may be used in, for example, a magnetic tunnel junction type device (MTJ device). The MTJ device may be implemented, for example, as a spin-torque magnetoresistive random access memory ("MRAM") element ("memory element"), a magnetoresistive sensor, a magnetoresistive transducer, etc. In such aspects, the magnetoresistive stack/structure may include an intermediate region positioned (or sandwiched) between two ferromagnetic regions to form a magnetic tunnel junction. The intermediate region may serve as a tunnel barrier in the MTJ device, and may comprise an insulating material, such as, e.g., a dielectric material. In other embodiments, the magnetoresistive device may include an intermediate region that comprises a conductive material, e.g., copper, gold, or alloys thereof. In these other embodiments, where the magnetoresistive stack/structure includes a conductive material between two ferromagnetic regions/layers, the magnetoresistive stack/structure may form a giant magnetoresistive (GMR) or GMR-type device.

For the sake of brevity, conventional techniques related to semiconductor processing and/or manufacturing of integrated circuits may not be described in detail herein. The exemplary embodiments may be fabricated using known lithographic processes. The fabrication of integrated circuits, microelectronic devices, micro electro mechanical devices, microfluidic devices, and photonic devices involves the creation of several layers of materials that interact in some fashion. One or more of these layers may be patterned so various regions of the layer have different electrical or other characteristics, which may be interconnected within the layer or to other layers to create electrical components and circuits. These regions may be created by selectively introducing or removing various materials. The patterns that define such regions are often created by lithographic processes. For example, a layer of photoresist may be applied onto a layer overlying a wafer substrate. A photo mask (containing clear and opaque areas) is used to selectively expose the photoresist by a form of radiation, such as ultraviolet light, electrons, or x-rays. Either the photoresist exposed to the radiation, or not exposed to the radiation, is removed by the application of a developer. An etch may then be employed/applied so that the layer not protected by the remaining resist is patterned. Alternatively, an additive process can be used in which a structure is built up using the photoresist as a template.

As noted above, in one aspect, the described embodiments relate to, among other things, methods of manufacturing a magnetoresistive device from a magnetoresistive stack/structure (magnetoresistive stack). The magnetoresistive stack may include one or more electrically conductive electrodes, vias, or conductors on either side of a magnetic material stack. As described in further detail below, the magnetic material stack may include many different regions of material stacked one on top of another, where some of the regions comprise magnetic materials and other regions do not. In one embodiment, the methods of manufacturing include sequentially depositing, growing, sputtering, evaporating, and/or providing (collectively referred to herein as "depositing" or other verb tense (e.g., "deposit" or "deposited")) layers and regions which, after further processing (for example, etching, etc.), the layers form a magnetoresistive stack/structure.

In some embodiments, the magnetoresistive stacks/structures (referred to herein as magnetoresistive stack) may be formed between a top electrode/via/line and a bottom electrode/via/line and, each of which may permit access to the magnetoresistive stack by allowing for connectivity (for example, electrical) to circuitry and other elements of the magnetoresistive device. Between the electrodes/vias/lines are regions (each comprising, as explained previously, single or multiple layers), including at least one "fixed" magnetic region (which includes, among other things, one or more ferromagnetic layers), at least one "free" magnetic region (which includes, among other things, one or more ferromagnetic layers), and one or more intermediate layers or regions disposed between a "fixed" magnetic region and the "free" magnetic region. In some embodiments, the magnetoresistive stack may include a dielectric material as the intermediate layer. In such embodiments, the magnetoresistive stack may form a magnetic tunnel junction (MTJ) or MTJ-type stack. In other embodiments, the magnetoresistive stack may include a conductive material as the intermediate layer. In such embodiments, the magnetoresistive stack may form a GMR or GMR-type stack. In some embodiments, the top electrode and/or the bottom electrode may be eliminated, and a bit line may be formed on top of the described magnetoresistive stacks.

<FIG> illustrates a cross-sectional view of an exemplary magnetoresistive stack/structure <NUM> (for example, an in-plane or out-of-plane magnetic anisotropy magnetoresistive stack/structure (e.g., a perpendicular magnetic anisotropy magnetoresistive stack/structure)) having multiple regions (<NUM>, <NUM>, <NUM>, etc.) formed one on top of another. For the sake of brevity, in the discussion below, the magnetoresistive stack/structure is referred to as a "magnetoresistive stack. " It will be recognized that several commonly-used regions (or layers) (e.g., various protective cap layers, seed layers, etc.) have not been illustrated in <FIG> (and in subsequent figures) for clarity. Each of the regions (<NUM>, <NUM>, <NUM>, etc.) of magnetoresistive stack <NUM> may comprise one or more layers of material. That is, for example, in some embodiments, region <NUM> may comprise a single layer of a material (e.g., element, a chemical composition, alloy, composite, etc.) formed on region <NUM>, and hardmask region <NUM> may comprise multiple layers of materials (in some cases, different materials sequentially formed one atop the other) formed on region <NUM>. In the discussion below, the term "region" is intended to cover both a zone (e.g., a thickness, volume, etc.) comprising a single layer of material (e.g., region <NUM> in the example above) and a zone comprising multiple layers of material (e.g., region <NUM> in the example above).

As known to one skilled in the art, the interface between the multiple regions (<NUM>, <NUM>, etc.) (and/or the interface between the multiple layers, if any, within a region) may, in some cases, be characterized by compositional (e.g., chemical) and/or structural changes due to intermixing between the materials (or intermetallic formation) of the adjacent regions (e.g., during deposition, post deposition anneal, etc.). For example, while the compositional profile across an ideal interface (e.g., an interface which does not undergo compositional changes) between two regions (or layers) may indicate a sharp profile (e.g., the composition abruptly changes from the composition of one region to that of the other region), the compositional profile across a typical interface of magnetoresistive stack <NUM> of <FIG> may indicate a different profile. For example, the profile may indicate a gradual change in chemical composition across an interface of two regions if intermixing occurs between the materials of the regions, or the profile across the interface may indicate the presence of a different composition in the vicinity of the interface if a different interfacial phase (e.g., an intermetallic) is formed at the interface.

It should be stressed that <FIG> only represents the structure of an exemplary magnetoresistive stack <NUM> used to describe concepts of the current disclosure. As would be recognized by those of ordinary skill in the art, many other magnetoresistive stacks are possible (e.g., standard perpendicular, perpendicular with dual spin filter stack structure, etc.). Some exemplary magnetoresistive stacks are described in, for example, <CIT>; <CIT>; <CIT>; and <CIT>, each of which is assigned to the assignee of the current application.

Each of the magnetoresistive stacks described in the aforementioned patents may be used in connection with the current disclosure. Further, as explained previously, although a magnetoresistive stack is used to describe aspects of the current disclosure, the disclosure is not limited thereto. Instead, the concepts described in the current disclosure may be applied in the fabrication of any integrated circuit device structure.

A magnetoresistive stack <NUM> having the structure illustrated in <FIG> (or any other suitable structure) may be fabricated, by techniques known in the art, in some embodiments, on the backend <NUM> of an integrated circuit (IC) device (e.g., on the surface of an IC die having electrical circuitry). For example, an electrically conductive region <NUM> may be first deposited or otherwise provided on the die backend <NUM> to serve as an electrode that is electrically connected to a metallization region <NUM> (via, pad, etc.) on the IC device. As known to those of ordinary skill in the art, the metallization region <NUM> (that extends through an inter-layer dielectric <NUM>) provides electrical contact to circuits of the IC device. In this disclosure, the term "deposited" (and various forms thereof, such as, for example, deposit, depositing, etc.) is broadly used to refer to any currently-used or future-developed IC fabrication process used to lay down (coat, dispose, provide, etc.) a material on a surface (e.g., chemical vapor deposition (CVD), physical vapor deposition (PVD), sputtering, electroplating, electroless plating, growing, etc.). Different regions (e.g., region <NUM>, region <NUM>, region <NUM>, etc. in the order illustrated in <FIG>) may then be sequentially deposited (i.e., one on top of another) to form the structure of <FIG>, which after further processing (annealing, etc.), will result in magnetoresistive stack <NUM>. Although <FIG> illustrates each region as being deposited directly on its underlying region (e.g., region <NUM> on region <NUM>, etc.), in some embodiments, one or more intermediate layers/regions (e.g., transition regions, diffusion barriers, seed regions, etc.) may be present between any two interfacing or mating regions (e.g., regions <NUM> and <NUM>).

Magnetoresistive stack <NUM> includes intermediate regions <NUM>, <NUM> (such as, for example, comprised of dielectric material(s) or nonmagnetic conductive materials) deposited on or above magnetic material regions <NUM> and <NUM>, respectively. In an exemplary magnetoresistive device (e.g., MRAM, etc.), magnetic material region <NUM> may function as a "fixed" magnetic region, and magnetic material region <NUM> may function as a "free" magnetic region, and one or both of intermediate regions <NUM> and <NUM> may function as tunnel barriers when regions <NUM> and <NUM> include a dielectric material. That is, a magnetic moment vector in a "fixed" region <NUM> does not move significantly in response to applied magnetic fields (e.g., an external field) or applied currents used to switch the magnetic moment vector of "free" region <NUM>. Although regions <NUM> and <NUM> are illustrated as a single layer in <FIG>, each of these regions may comprise several layers of a magnetic or a ferromagnetic material formed one on top of another with, in some cases, additional layers (e.g., an antiferromagnetic coupling layer, a reference layer, a transition layer, etc.) between the layers.

With continuing reference to <FIG>, hardmask region <NUM> may be a region that aids in the subsequent processing (e.g., etching) of the magnetoresistive stack <NUM>. As will be described in greater detail below, region <NUM> may itself comprise different regions (e.g., sequentially arranged along its thickness) that have different rates of etchability relative to a chemical etchant. Some of these regions may be sacrificial regions that are designed to be removed during processing of the magnetoresistive stack <NUM> to form magnetoresistive devices, e.g., magnetic tunnel junction (MTJ) bits <NUM> (see <FIG>). Region <NUM>, which separates hardmask region <NUM> from intermediate region <NUM>, may function as a spacer or a diffusion barrier region of the magnetoresistive stack <NUM>.

Since materials and geometries (thicknesses, etc.) suitable for the different regions (e.g., regions <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>) of magnetoresistive stack <NUM> are known in the art (e.g., described in <CIT>; <CIT>; <CIT>; <CIT>; and <CIT>), they are not described herein. Hardmask region <NUM> may comprise multiple regions (each of which may include one or more layers) formed one on top of another. For example, hardmask region <NUM> may include a bottom portion <NUM> interfacing with region <NUM>, a top portion <NUM> on the surface of magnetoresistive stack <NUM>, and an intermediate or middle portion <NUM> in between the top and bottom portions <NUM>, <NUM>. Each of top, middle, and bottom regions <NUM>, <NUM>, <NUM> may be formed of one or more layers. As will be explained in more detail below, the materials of each of the top, middle, and bottom portions <NUM>, <NUM>, <NUM> of the hardmask region <NUM> may be selected to aid in the etching of magnetoresistive stack <NUM> to form suitable magnetoresistive devices, e.g., MTJ bits <NUM> (see <FIG>) having a fine pitch (which may result in a magnetoresistive device having an increased feature density).

In general, some or all of top portion <NUM>, middle portion <NUM>, and bottom portion <NUM> may be comprised of materials selected to a have different levels of etchability (for example, using a chemical reagent). That is, two of, or all three of, top portion <NUM>, middle portion <NUM>, and bottom portion <NUM> may be made of materials that have significantly different rates of etching using the same or similar chemical reagent (in any now-known or later-developed etching process, e.g., reactive ion etching). For example, top portion <NUM> may comprise a material that can be etched relatively easily using the chemical reagent, and middle portion <NUM> may be made of a material that is not easily etched (or substantially unetched by) by the same or another similar chemical reagent. That is, the middle portion <NUM> may act as an etch stop during a process designed to etch of top portion <NUM>. Bottom portion <NUM> may also comprise a material that can be etched relatively easily using the same or another similar chemical reagent. In some embodiments, bottom portion <NUM> may comprise a material having an etchability profile similar to that of top portion <NUM>. In some embodiments, top portion <NUM> and bottom portion <NUM> may comprise the same material(s) and the middle portion <NUM> may comprise a different material(s).

Top portion <NUM> of hardmask <NUM> may include an electrically conductive or nonconductive material that can be etched by a chemical reagent. In some embodiments, top portion <NUM> may include an electrically nonconductive material, or a dielectric material, such as, for example, TEOS (Tetraethyl orthosilicate), Silicon Nitride (Si<NUM>N<NUM>), etc. In some embodiments, top portion <NUM> may include an electrically conductive material, such as, for example, titanium nitride (TiN), tantalum (Ta), tantalum nitride (TaN), etc. Middle portion <NUM> may be formed of any material that is resistant to the chemical reagent used to etch top portion <NUM>. In some embodiments, middle portion <NUM> may be formed of a metal (e.g., a different metal than the metal used to form top portion <NUM>) that has lower etchability (e.g., substantially resistant) to the chemical reagent than the top portion <NUM>. For example, in an embodiment, where the top portion <NUM> is etched using reactive ion etching (RIE) with the aid of a chemical reagent, such as, for example, fluroform (CHF<NUM>) or tetrafluoromethane (CF<NUM>), the top portion <NUM> may comprise TEOS or TiN, and the middle portion <NUM> may comprise one or more metals that are resistant to CHF<NUM> or CF<NUM>, such as, for example, ruthenium (Ru), platinum manganese (PtMn), Iridium Manganese (IrMn), etc..

During fabrication of a magnetoresistive device from the magnetoresistive stack <NUM>, the middle portion <NUM> may be used as a hardmask to etch the bottom portion <NUM> (e.g., after the middle portion <NUM> is patterned with the aid of the top portion <NUM>). And, in the fabricated magnetoresistive device, remaining portions of the bottom portion <NUM> and/or the middle portion <NUM> (i.e., portions that remain after fabrication) may serve as an electrode (e.g., the top electrode of a magnetoresistive device). Therefore, the bottom portion <NUM> may comprise any electrically conductive material having a relatively higher etchability (or less resistance) to a chemical reagent (e.g., the same chemical reagent that was used to etch the top portion <NUM> or a different chemical reagent) than the middle portion <NUM>. In some embodiments, if the top portion <NUM> is comprised of an electrically conductive material, the bottom portion <NUM> may also comprise the same material (or a similar material in terms of chemical etchability) to the top portion <NUM>. In an exemplary embodiment, where the bottom portion <NUM> is etched using reactive ion etching (RIE) with the aid of a chemical reagent, such as, for example, fluroform (CHF<NUM>) or tetrafluoromethane (CF<NUM>), the bottom portion <NUM> may comprise a material, such as, for example, tantalum (Ta), tantalum nitride (TaN), titanium nitride (TiN), etc. As alluded to above, although the described hardmask region <NUM> is depicted as have multiple layers or regions (e.g., top, middle, and bottom portions <NUM>, <NUM>, and <NUM>), those of ordinary skill in the art will understand that the hardmask region <NUM> may only include a single layer of a single material.

In general, hardmask region <NUM> (and its constituent regions - top portion <NUM>, middle portion <NUM>, and bottom portion <NUM>) may have any thickness. As explained previously, each region or portion <NUM>, <NUM>, and <NUM> of the hardmask region <NUM> may be used as a hardmask to etch a lower region. Therefore, as would be recognized by those of ordinary skill in the art, the thickness of these portions may be selected to be suitable for this purpose. In some embodiments, the thickness of hardmask region <NUM> may be in the range of approximately <NUM>-<NUM>Å (preferably approximately <NUM>-<NUM>Å, or more preferably approximately <NUM>-<NUM>Å), the thickness of top portion <NUM> may be approximately <NUM>-<NUM>Å (preferably approximately <NUM>-<NUM>Å, or more preferably approximately <NUM>-<NUM>Å), the thickness of middle portion <NUM> may be approximately <NUM>-<NUM>Å (preferably approximately <NUM>-<NUM>Å, or more preferably approximately <NUM>-<NUM>Å) thick, and the thickness of bottom portion <NUM> may be approximately <NUM>-<NUM>Å (preferably approximately <NUM>-<NUM>Å, or more preferably approximately <NUM>-<NUM>Å).

During fabrication of a magnetoresistive device, the magnetoresistive stack <NUM> may be processed to form an array of magnetoresistive devices (e.g., MTJ bit <NUM> of <FIG>). Some of these processing operations will be described below.

As illustrated in <FIG>, for example, a patterned mask <NUM> may first be formed on a surface of hardmask region <NUM> to form exposed areas <NUM> of the hardmask region <NUM>. In general, the exposed areas <NUM> may correspond to any desired preselected pattern (e.g., a square/rectangular grid pattern, parallel lines, etc.). As will be explained in more detail below, in some embodiments, the pattern of the exposed areas <NUM> may be selected to decrease the pitch or increase the density of the magnetoresistive devices to be formed from the steps described below. The mask <NUM> may be formed by any now-known or future-developed technique, including conventional deposition and lithographic techniques. For example, a conventional photoresist may be deposited and patterned (e.g., exposed to a light source through a template, and the exposed/covered regions removed) to form exposed areas <NUM> on the mask <NUM>. Any suitable material may be used to form mask <NUM>. These materials may include, among others, a conventional photoresist plus a bottom anti-reflective coating (BARC), patterned spin on glass, a silicon containing polymer such as SIHM® (Shin-Etsu Chemical Co. ), UVAS® (Honeywell International Inc. ), spin on carbon, near-frictionless carbon layer (NFC), etc. Since patterning these mask materials to expose selected areas <NUM> of hardmask region <NUM> are well known in the art, further discussion is not provided herein.

The uncovered regions of the top portion <NUM> (of hardmask region <NUM>) at the exposed areas <NUM> may then be etched to remove the top portion <NUM> from these areas. In some embodiments, the mask <NUM> may then be stripped or otherwise removed after etching the top portion <NUM>. In some embodiments, this stripping step may be eliminated, and at least a portion of the mask <NUM> may remain atop the retained regions the top portion <NUM>. <FIG> is schematic cross-sectional illustration of the magnetoresistive stack <NUM> after the top portion <NUM> is etched and the mask <NUM> has been stripped. Any now-known or future developed etching process (e.g., an etching process that uses a chemical reagent (chemical etching or a partial chemical etching ,etc.)) may be used to etch and remove the exposed areas of top portion <NUM>. For example, in some embodiments, RIE using CHF<NUM> or CF<NUM> as a reactive chemical species may be used to etch the exposed areas of top portion <NUM>. Since the material of the middle portion <NUM> is selected to be relatively resistant (or poor etchability) to the chemical reagent used to etch the top portion <NUM>, the middle portion <NUM> remains substantially unetched during the etching process to remove the exposed portions of top portion <NUM>. That is, the middle portion <NUM> acts as an etch stop during the etching of the top portion <NUM>.

During the etching process, the pattern of the mask <NUM> (in <FIG>) is replicated on the top portion <NUM>. That is, regions of the top portion <NUM> that are covered by the mask <NUM> (see <FIG>) are not etched and the regions of the top portion <NUM> that are not covered by the mask (e.g., exposed areas <NUM> in <FIG>) are etched and removed to expose the middle portion <NUM>. The mask <NUM> may be patterned to have any shape (a grid of square/rectangular shapes, parallel lines, perpendicular or otherwise orthogonal or angled lines, etc.).

Turning now to <FIG>, there is illustrated a top view (plan view) of the magnetoresistive stack <NUM> of <FIG>. As illustrated in <FIG>, in some embodiments, the mask <NUM> (in <FIG>) may be patterned to leave an array of substantially square-shaped (or substantially rectangular-shaped) islands of the top portion <NUM> after the etching process. In some embodiments, when the top portion <NUM> is etched (see <FIG>), a portion (some or all) of the mask <NUM> (on the surface of the top portion <NUM>) may also be removed as a result of the etching process. In some embodiments, a portion of the mask <NUM> may remain on the top portion <NUM> after the etching process. Although not a requirement, in some embodiments, any remaining mask <NUM> after the etching process may be stripped or otherwise removed to expose the underlying top portion <NUM>.

After processing, regions of the magnetoresistive stack <NUM> covered by the top portion <NUM> (in <FIG>) will form an array of magnetoresistive devices, such as, e.g., MTJ bits <NUM> (see <FIG>). As known to those of ordinary skill in the art, the pitch or the spacing (d) between top portions <NUM> (of the various magnetoresistive devices in the depicted array) is limited by parameters associated with the lithographic process (wavelength of light, etc.) used to form mask <NUM>. As known to those of ordinary skill in the art, decreasing the spacing (d) below certain limits (imposed by the lithographic process) may detrimentally affect the critical dimensions of the retained structure. For improved performance of a magnetic memory element having an array of magnetoresistive devices, for example, it is desirable to decrease the spacing (d) (in <FIG>) so as to increase the density of the resulting magnetoresistive devices in the magnetic memory element. As will be described in more detail below, in some embodiments, to decrease the spacing between the magnetoresistive devices, a multi-step etching process (such as, for example, litho-etch litho-etch (or LELE)) may be used to etch the top portion <NUM>.

<FIG> illustrate an exemplary LELE process that may be used, as is known from the above-mentioned prior art.

In a first litho-etch (or LE) step, a mask <NUM> is deposited on the surface of hardmask region <NUM> and patterned to form exposed areas <NUM> (see, e.g., <FIG>) in the form of a series of spaced-apart parallel strips extending in the horizontal direction of <FIG>. The magnetoresistive stack <NUM> may then be etched (using the same process described previously or any other suitable process) to remove the top portion <NUM> from the exposed areas <NUM>. After this first litho-etch step (or LE step), as illustrated in <FIG>, the retained top portion <NUM> and the exposed middle portion <NUM> (below the etched areas of the top portion <NUM>) form parallel strips that extend in the horizontal direction. After optionally stripping any remaining mask <NUM> from the surface of hardmask region <NUM>, a second litho-etch step then may be performed (on the patterned structure of <FIG>) by depositing and patterning a second mask <NUM> to form exposed areas <NUM> that form spaced-apart parallel strips extending in the vertical direction (i.e., in a direction perpendicular to the direction of the first etching step described above in this paragraph). After this step, some areas of the top portion <NUM> that were covered by the mask <NUM> during the first litho-etch step will be exposed (e.g., regions marked A in <FIG>). The magnetoresistive stack <NUM> is etched again to etch these newly uncovered regions of the top portion <NUM>. In some embodiments, any remaining portions of the second mask <NUM> is thereafter stripped. In some embodiments, this step may be eliminated, and the second mask <NUM> may remain.

<FIG> illustrates the magnetoresistive stack <NUM> after the second litho-etch step. As illustrated in <FIG>, after the LELE process, an array of square-shaped (or rectangular-shaped) top portions <NUM> is retained on the magnetoresistive stack <NUM> similar to that in <FIG>. However, as will be recognized by those of ordinary skill in the art, forming the horizontally oriented and vertically oriented exposed areas <NUM> separately, significantly improves the photo-contrast ratio (e.g., normalized image log-slope or NILS, etc.) during the lithographic process, and also allows tuning the photo illumination (during lithography) to each orientation separately (e.g., dipole illumination) for further contrast ratio increase. Further, as would be recognized by a person skilled in the art, a magnetoresistive device has a regular pattern that lends itself well to separating horizontal and vertical patterning. As a result of these and other improvements, the spacing (d<NUM>) (see <FIG>) between the retained top portions <NUM> (and the resulting magnetoresistive devices) after the LELE process will be smaller than the spacing (d) after the single litho-etch process of <FIG>. Further, since the horizontally oriented and vertically oriented exposed areas <NUM> are formed separately in the LELE process, any misalignment between the resulting exposed areas does not affect the size of the magnetoresistive device. Due to the two litho-etch steps of the LELE process, some regions of the middle portion <NUM> (e.g., region marked B in <FIG>) are subject to etching twice. However, because of the high etch selectivity of hardmask region <NUM> (i.e., the top portion <NUM> has relatively high etchability while the middle portion <NUM> has a relatively low etchabilty), the LELE process can be applied to etch the top portion <NUM> without creating deeper holes or pits at these double-etched regions or junctions. As one of ordinary skill in the art would recognize, such deeper holes and/or pits may become defects that trap material (e.g., veil material, etc.) during further processing of magnetoresistive stack <NUM>, thereby potentially leading to electrical shorting.

To further decrease the spacing between the magnetoresistive devices in the array (e.g., the array depicted in <FIG>), the horizontally aligned and the vertically aligned exposed regions may each be formed using multiple litho-etch steps. That is, while a single litho-etch step was used to form the horizontal pattern of <FIG>, and a subsequent single litho-etch step was used to form the vertical pattern of <FIG>, multiple litho-etch steps may be used to form each of the horizontal and vertical patterns. According to the present invention, as illustrated in <FIG>, the horizontally aligned exposed regions are formed by two litho-etch steps (see <FIG>), and the vertically aligned exposed regions are formed by two litho-etch steps (see <FIG>).

Specifically, after depositing a mask <NUM>, patterning the deposited mask <NUM> to form exposed regions <NUM> (see <FIG>) that are aligned in the horizontal direction, the top portion <NUM> at the exposed regions <NUM> is etched to form a first set of horizontally aligned strips of top portions <NUM> at a first pitch separated by strips of exposed middle portions <NUM> (see <FIG>). After the mask <NUM> optionally is stripped, another mask <NUM> may be deposited and patterned to form a second set of horizontally aligned exposed areas spaced apart from the first horizontally aligned exposed middle portions <NUM> (see <FIG>). The top portions <NUM> visible through the resulting exposed areas are then etched to form a second set of horizontally aligned top portions <NUM> separated from the first set of horizontally aligned top portions <NUM> (see <FIG>). The resulting array of magnetoresistive devices of <FIG> is similarly litho-etched in two steps (see <FIG>) with masks having exposed regions aligned in the vertical direction (i.e., perpendicularly to the direction of the first etching processes described earlier in this paragraph). That is, a first vertical etch is performed followed by a second vertical etch offset from the location of the first vertical etch. The intersection of the horizontal and vertical patterns create roughly an array of square- or rectangular-shaped top portions <NUM> separated by exposed middle portions <NUM>. As would be recognized by those of ordinary skill in the art, the spacing (d<NUM>) between the retained top portions <NUM> (and the resulting magnetoresistive devices) after the multiple LELE processes of <FIG> will be smaller than the spacing (d<NUM>) after the single LELE process of <FIG>. Further, because of the high etch selectivity of the various portions of hardmask region <NUM>, the multiple LELE processes can be applied to etch the top portion <NUM> without creating deeper holes at regions of the middle portion <NUM> which are subject to etching multiple times (marked B in <FIG>).

With renewed reference to <FIG>, as explained previously, after processing of the magnetoresistive stack, each of the regions remaining covered by top portion <NUM> will form a single magnetoresistive device, as explained in greater detail below. Sharp corners of the regions retaining top portion <NUM> (in <FIG>) may therefore result in magnetoresistive devices with similar sharp corners. In some cases, these sharp corners in the magnetoresistive devices may detrimentally affect the performance of device magnetoresistive memory element formed from such magnetoresistive devices (e.g., the sharp corners may act as domain nucleation sites and affect the magnetic performance of the magnetoresistive devices and/or the result magnetoresistive memory element). Therefore, in some embodiments, the regions retaining top portion <NUM> in <FIG> may be etched to remove the sharp corners by a rounding process. Etching the regions retaining top portion <NUM> (<FIG>), for example, without the mask <NUM> atop the corners, may etch these corners to provide rounding of the corners. In some embodiments, the etching process that is used to etch the top portion <NUM> (e.g., see <FIG>) may be continued for a longer time (than is necessary to etch the top portion <NUM> in the exposed areas <NUM>) to round the sharp corners of the resulting array of top portions <NUM>. That is, if RIE is used to etch the top portion <NUM>, the RIE process may be continued (to round off the corners of the retained top portions <NUM>) for an additional time even after the middle portion <NUM> is exposed in the etched areas. The additional time that the etching process is continued depends upon the application, and may be determined through experimentation. In some embodiments, as illustrated in <FIG>, for example, the etching process may be continued only until the apex of one or more corners of each region retaining top portion <NUM> is rounded. In other embodiments, as illustrated in <FIG>, the etching process may be continued until the entire region retaining top portion <NUM> is rounded into a circular or oval configuration when viewed from above. In some embodiments, after the array of regions retaining top portion <NUM> is first formed (e.g., as in <FIG>, <FIG>, etc.), any residual mask <NUM> remaining on the top portions <NUM> may be stripped before rounding off the corners by continued etching. In some embodiments, the mask <NUM> may be stripped only after the rounding step. In some embodiments, however, the mask <NUM> may not be stripped even after the rounding step.

After the top portion <NUM> of hardmask region <NUM> is patterned in the manner described above (e.g., forming an array of regions retaining top portion <NUM>, as illustrated in <FIG>), the patterned top portion <NUM> may then be used to etch the region below (i.e., the middle portion <NUM>). <FIG> illustrates the top region of the magnetoresistive stack <NUM> after the middle portion <NUM> is etched through the exposed areas <NUM> of the patterned top portion <NUM>. Since, in some embodiments, the material of the middle portion <NUM> is generally resistant (or includes a relatively low etchability) to chemical etches, the middle portion <NUM> may be etched using a physical etching process using the patterned top portion <NUM> as a mask. Any now-known or future developed physical etching (or dry etching) technique (e.g., sputter etching, ion beam etching, etc.) may be used to etch (or ablate) the middle portion <NUM>. Since physical etching techniques are well known in the art, they are not described herein in greater detail. As illustrated in <FIG>, during the etching process, a portion of the top portion <NUM> (which, as explained earlier, is used as a mask during the etching) may also be removed. Although not illustrated in <FIG>, if there is any amount of mask <NUM> remaining (from the etching of the top portion <NUM>) on the top portion <NUM>, some or all of this mask <NUM> may also be removed by the physical etching process of middle portion <NUM>. The physical etching may be continued until the bottom portion <NUM> of hardmask region <NUM> is detected at the exposed areas <NUM>. The bottom portion <NUM> may be detected during the etching process by any method. For example, in some embodiments, during the etching process, the material of the bottom portion <NUM> may be detected using optical emission spectra (OES). That is, the physical etching process used to remove the middle portion <NUM> may be terminated when a rise in OES signal for the material of the bottom portion <NUM> is detected. In this step, the pattern of the top portion <NUM> is replicated on the middle portion <NUM>. That is, by the physical etching process, the middle portion <NUM> of hardmask region <NUM> is patterned.

The patterned middle portion <NUM> may then be used to etch the bottom portion <NUM> of the hardmask region <NUM>. <FIG> illustrates the top region of the magnetoresistive stack <NUM> after the bottom portion <NUM> is etched. The bottom portion <NUM> may be etched by any chemical or partial chemical etching process that selectively etches the bottom portion <NUM> relative to the middle portion <NUM>. In some embodiments, the same etching process used to etch the top portion <NUM> may be used to etch the bottom portion <NUM>. For example, in some embodiments, RIE using CHF<NUM> or CF<NUM> as a reactive chemical species may be used to etch the bottom portion <NUM>. Since the material of the middle portion <NUM> is resistant to these chemicals, in some embodiments, the patterned middle portion <NUM> may remain substantially unetched during the etching process for bottom portion <NUM>. It is also contemplated that, in some embodiments, as illustrated in <FIG>, a portion of the middle portion <NUM> may also be removed while etching the bottom portion <NUM>. As further illustrated in <FIG>, in embodiments where the bottom portion <NUM> also is etched by the chemical species used to etch the top portion <NUM>, any material of top portion <NUM> remaining prior to the etching process of bottom portion <NUM> (see <FIG>) may also be removed (or reduced) during this etching. In some embodiments, the material of region <NUM> may substantially resistant (or has low etchability) to the chemical species used to etch the bottom portion <NUM>. In these embodiments, the etching will terminate at region <NUM>. That is, region <NUM> will act as an etch stop during the etching of the bottom portion <NUM>. Additionally or alternatively, in some embodiments, techniques such as, for example, OES (described previously) may be used to terminate the etch at region <NUM>.

After the bottom portion <NUM> of hardmask region <NUM> is patterned as described above, the patterned middle and bottom portions <NUM> and <NUM> may thereafter be used as a mask to etch the lower regions (e.g., regions <NUM>, <NUM>, <NUM>, etc.) of the magnetoresistive stack <NUM> to form an array of magnetoresistive devices, e.g., MTJ bits <NUM>. <FIG> illustrates MTJ bits <NUM> formed by etching the multiple regions of the magnetoresistive stack <NUM> using the middle and bottom portions <NUM> and <NUM> of hardmask region <NUM> as a mask. In some embodiments, as illustrated in <FIG>, a portion of the bottom portion <NUM> and the middle portion <NUM> may also be removed (ablated, etched, etc.) while etching the underlying regions of the stack. In some embodiments, the bottom portion <NUM> and/or the middle portion <NUM> may not be removed. In some embodiments, substantially all, or a significant portion of, the middle portion <NUM> may be removed as a result of the etching. Since the bottom portion <NUM> may serve as an electrode of the formed MTJ bits <NUM>, in some embodiments, the etching process may be controlled to minimize the removal of the bottom portion <NUM>. Any now-known or future developed process may be used to etch regions <NUM>-<NUM> of the magnetoresistive stack <NUM>. In some embodiments, regions <NUM>-<NUM> may be etched in one etching step. For example, an etching technique such as, for example, ion beam etching, RIE, etc. may be used to etch through the entire thickness of the magnetoresistive stack <NUM>, exposed through the patterned middle and bottom portions <NUM> and <NUM>, in one etching operation. In some cases, debris (e.g., nonvolatile byproducts of the multiple regions that are removed or ablated by the etching process) may redeposit on the sidewalls of the formed MTJ bits <NUM> after the etching, to form a veil of electrically or magnetically conductive material. This debris can cause shorts between the different regions, and may therefore be removed after the etching process. Any process, such as, for example, angled etch, etc. may be used to remove the debris from the side walls.

In some embodiments, a multi-step etching process may be used to etch through the underlying regions (i.e., regions <NUM>-<NUM>) of magnetoresistive stack <NUM>. For example, in some embodiments, some of the regions (e.g., regions <NUM>-<NUM>) may be etched in a first etching step and the side walls cleaned (using, for example, angled etch) after this etching step. An encapsulant (e.g., silicon nitride, silicon oxide, etc.) may then be deposited on the partially formed and cleaned MTJ bits (using, for example, chemical vapor deposition (CVD), atomic layer deposition (ALD), etc.) to enacapsulate these structures, and the remaining regions (e.g., regions <NUM>-<NUM>) may then be etched in a second etch step to form the entire MTJ bits <NUM>. It is also contemplated that, in some embodiments, the etching process used to etch the bottom portion <NUM> of the hardmask region <NUM> (see <FIG>) may not be terminated at region <NUM>. Instead, this etching process may be continued and used to etch additional regions (e.g., some or all of the regions <NUM>, <NUM>, etc.) of the magnetoresistive stack <NUM>. That is, in some embodiments, the same etching process used to etch the bottom portion <NUM> (i.e., using the middle portion <NUM> as a mask) may be used to etch through some or all of the underlying regions of the magnetoresistive stack <NUM>.

As illustrated in <FIG>, after the MTJ bits <NUM> are formed as described above, a first encapsulant <NUM> (formed of a material, such as, for example, silicon nitride, silicon oxide, etc.) may be deposited on the formed MTJ bits <NUM>, and a second encapsulant <NUM> (formed of an inter-layer dielectric (ILD) material, such as, for example, TEOS or a low-K ILD such as, for example, SiCOH, fluorinated silicates glasses (FSG), organosilica glasses (OSG), etc. may be deposited over the encapsulated MTJ bits <NUM>. The encapsulated magnetoresistive stack <NUM> of <FIG> may then be polished (and, in some embodiments, etched) to expose the top electrically conductive surface of the MTJ bits <NUM>. <FIG> is an illustration of the magnetoresistive stack <NUM> after the polishing. Since such polishing processes are well known in the art, they are not described herein. The magnetoresistive stack <NUM> may be polished to expose the middle portion <NUM> (if any middle portion <NUM> remains on the bits) or the bottom portion <NUM> of the MTJ bits <NUM>. In some embodiments, as illustrated in <FIG>, the exposed top surface on some of the MTJ bits <NUM> may be the middle portion <NUM> while the exposed top surface on other MTJ bits <NUM> may be the bottom portion <NUM>. After exposing an electrically conductive surface of the formed MTJ bits <NUM>, a bit contact structure <NUM> may be formed on the magnetoresistive stack to make electrical contact with the MTJ bits <NUM>. <FIG> illustrates a magnetoresistive stack <NUM> with an exemplary bit contact structure <NUM> formed thereon. The bit contact structure <NUM> may include electrically conductive elements <NUM> that make contact with the MTJ bits <NUM> and interconnect these bits in a desired configuration to form device magnetoresistive device, such as, e.g., a magnetoresistive memory element. Any type of bit contact structure where a conductive element <NUM> (e.g., trench, via, or logic metal layer, etc.) is used to contact the exposed conductive region (e.g., middle portion <NUM> or bottom portion <NUM>) of the MTJ bits <NUM> may be used. Since such structures are known in the art, they are not described here in greater detail.

As alluded to above, the magnetoresistive devices (formed using aforementioned described techniques and/or processes) may include a sensor architecture or a memory architecture (among other architectures). For example, in a magnetoresistive device having a memory configuration, the magnetoresistive devices, e.g., MTJ bits <NUM>, may be electrically connected to an access transistor and configured to couple or connect to various conductors, which may carry one or more control signals, as shown in <FIG>. The magnetoresistive devices may be used in any suitable application, including, e.g., in a memory configuration. In such instances, the magnetoresistive devices may be formed as integrated circuits comprising a discrete memory device (e.g., as shown in <FIG>) or an embedded memory device having a logic therein (e.g., as shown in <FIG>), each including MRAM, which, in one embodiment is representative of one or more arrays of MRAM having a plurality of magnetoresistive devices formed magnetoresistive stacks/structures, according to certain aspects of certain embodiments disclosed herein.

An exemplary method of fabricating a magnetoresistive device in connection with the method of the present invention will now be described.

<FIG> depicts a flow chart of an exemplary method <NUM> of fabricating one or more magnetoresistive devices from an MTJ stack. For the sake of brevity, the method will describe fabricating a magnetoresistive device, such as, e.g., an MTJ bit <NUM>, from magnetoresistive stack <NUM> (of <FIG>), referencing previously described aspects (materials, fabrication processes, dimensions, etc.) of these embodiments. However, as described previously, the current disclosure may be applied to any magnetoresistive stack (e.g., dual spin filter MTJ stack, etc.), including devices based on magnetic tunnel junction or giant magnetoresistive technologies. A magnetoresistive stack may first be provided (step <NUM>). Providing the magnetoresistive stack may include sequentially depositing (and/or growing, sputtering, etc.) the multiple regions of the magnetoresistive stack <NUM>, and processing (e.g., annealing, etc.) these deposited regions to form magnetoresistive stack <NUM>. In some embodiments, this step may include using a magnetoresistive stack <NUM> that was previously formed. The magnetoresistive stack <NUM> includes a top hardmask region <NUM> that comprises a chemical etch resistant material (middle portion <NUM>) sandwiched on either side by chemically etchable materials (e.g., top portion <NUM> and bottom portion <NUM>). In general, the material on the exposed top side of the etch resistant material (e.g., top portion <NUM>) may be electrically conductive or nonconductive (e.g., TiN, TEOS, etc.), while the material on the bottom side of the etch resistant material (i.e., bottom portion <NUM>) may be electrically conductive (e.g., Ta, TaN, TiN, etc.) so that it can serve as a conductor of the formed magnetoresistive device. The etch resistant middle portion <NUM> of the hardmask region <NUM> may include any material that is relative inert to the chemical reagent used in the etch (e.g., Ru, PtMn, etc.) processes described herein.

The top portion <NUM> of the hardmask region <NUM> is then etched in a chemical or a partially chemical etch process (e.g., RIE, etc.) to pattern the top portion <NUM> in a desired pattern (step <NUM>). This step includes the above-described multiple litho-etch (LELE) technique to expose selected regions of the top portion <NUM> and then etching the exposed regions to form islands of regions that retain top portion <NUM> separated by the exposed middle portion (see <FIG>). Etching may be performed using any suitable chemical (or partially chemical) technique (for example, reactive ion beam etching using CHF<NUM> and/or CF<NUM>, as the chemical species). Since the middle portion <NUM> of the hardmask region <NUM> is relatively resistant to the chemical component of the etch, it acts as an etch stop. In some embodiments, sharp corners of the regions retaining top portion <NUM> (see <FIG>) may then be rounded (see, for example, <FIG>) by etching (e.g., continuing the etching of the top portion <NUM> for a longer time), for example, without a mask over the corners (step <NUM>). In some embodiments, step <NUM> may be eliminated.

Claim 1:
A method of fabricating a magnetoresistive bit (<NUM>) from a magnetoresistive stack (<NUM>) including at least two magnetic regions (<NUM>, <NUM>), an intermediate region (<NUM>) positioned between the at least two magnetic regions, and a hard mask region (<NUM>), the method comprising:
(a) etching through at least a first layer (<NUM>) of the hard mask region in a first direction to expose a first set of areas in a second layer (<NUM>) of the hard mask region:
(b) after the etching in step (a), etching through at least the first layer of the hard mask region in the first direction to expose a second set of areas in the second layer of the hard mask region;
(c) after the etching in step (b), etching through at least the first layer of the hard mask region in a second direction to expose a third set of areas in the second layer of the hard mask region;
(d) after the etching in step (c), etching through at least the first layer of the hard mask region in the second direction to expose a fourth set of areas in the second layer of the hard mask region; and
(e) after the etching in step (d), etching through at least a portion of the thickness of the magnetoresistive stack.