Patent Description:
In recent years, in various scenes, an image analysis is performed for detecting, tracking, estimating attribute, or the like of an object using an image captured by a monitoring camera, and image processing is performed such as estimating the number of objects based on a result of such an image analysis. Heretofore, such image processing has been performed by a high-performance computation apparatuses such as a PC or a server that executes actual image processing for a video which is taken by a monitoring camera and is transferred to the high-performance computation apparatuses. In contrast, as a result of improvement in processing ability of mobile computation apparatuses in recent years, image processing can be performed in a monitoring camera. The processing in the monitoring camera (image capturing apparatus) may be executed by a computation apparatus arranged in a monitoring camera body, for example. Also, by attaching a detachable device such as a USB in which a computation apparatus is arranged to a monitoring camera, the detachable device can execute at least a portion of processing performed in the monitoring camera.

Some detachable devices perform image processing operations using power and a clock signal that are supplied by an apparatus to which the detachable device is attached. For instance <CIT> discloses an image capturing apparatus with a detachable device configured to perform analysis processing on an image transmitted from the image capturing apparatus.

However, there are apparatuses, among apparatuses such as.

PCs and cameras to which detachable devices are to be attached, that stop clock signal supply to the detachable devices when the CPU load increases. If the clock signal supply is stopped, image processing cannot be normally executed in the detachable device. Regarding this issue, in <CIT>, a technique is disclosed in which, when clock signal supply is stopped, the operation is resumed by switching to a clock signal for self-running.

With the technique disclosed in <CIT>, addition of a circuit for detecting that a clock signal is stopped and a configuration for switching to an operation using a clock signal for self-running are needed in the detachable device, and therefore the circuit scale increases. Further prior art documents are <CIT> showing a camera system with a replaceable lens unit and <CIT> showing a mountable flash control device, flash control method, flash, image capture apparatus, and image capture system.

Therefore, provided is an image capturing apparatus, to which a detachable device can be attached, that enables returning to a state in which image processing can be continued in the detachable device, even when clock signal supply is stopped, without incurring an increase in the circuit scale of the detachable device.

The present invention provides an image capturing apparatus, a control method, and a computer program as specified in the respective claims.

The scope of protection of the invention is defined by the appended claims.

<FIG> shows an exemplary configuration of an image processing system of the present embodiment. The image processing system may be constructed as a system for tracking a specific person by analyzing captured images input from a plurality of image capturing apparatuses <NUM>, for example. Note that the embodiment is not limited to this embodiment, and the image processing system may be constructed as any system that outputs predetermined information by analyzing an image. The image processing system includes image capturing apparatuses 110a to 110d, a network <NUM>, and an input/output apparatus <NUM>. The image capturing apparatuses 110a to 110d each include a slot to and from which a device that can record a captured image can be attached and detached, for example. The detachable devices 100a to 100d are inserted into the respective slots, and the image capturing apparatuses 110a to 110d are connected to the respective detachable devices 100a to 100d. Hereinafter, the detachable devices 100a to 100d may be collectively referred to as a "detachable device <NUM>", and the image capturing apparatuses 110a to 110d may be collectively referred to as an "image capturing apparatus <NUM>". The apparatuses that constitute the system will be described below.

The detachable device <NUM> is a computation device that is configured to be attached to and detached from the image capturing apparatus <NUM>. The detachable device <NUM> can be configured as a device that is realized by mounting a predetermined processing circuit on a nonvolatile semiconductor memory device (e.g., SD card) that is configured to store an image captured by the image capturing apparatus <NUM>, for example. SD card slots are prepared in many existing image capturing apparatuses <NUM> such as network cameras, and therefore an expanded function can be provided to an existing image capturing apparatus <NUM> by connecting the detachable device <NUM> thereto. For example, the detachable device <NUM> is configured to be entirely insertable into the image capturing apparatus <NUM>, depending on the form of the SD card, and with this configuration, can be configured to be connectable to the image capturing apparatus <NUM> in a state in which no portion protrudes from the image capturing apparatus <NUM>.

Also, for example, the detachable device <NUM> may be configured such that more than half of the detachable device <NUM> is insertable to the image capturing apparatus <NUM>, and with this configuration, may be configured to be connectable to the image capturing apparatus <NUM> in a state in which a small portion protrudes from the image capturing apparatus <NUM>. Accordingly, the detachable device <NUM> can be prevented from interfering with an obstacle such as wiring, and the convenience at the time of using the device can be improved.

Also, the detachable device <NUM> may also be configured to, other than the form of the SD card, be attached to the image capturing apparatus <NUM> with any interface that is used when a storage apparatus that can store at least an image captured by the image capturing apparatus <NUM> is attached. For example, the detachable device <NUM> may also be configured to include a Universal Serial Bus (USB) interface, and be attached to a USB socket of the image capturing apparatus <NUM>. Moreover, the predetermined processing circuit to be mounted on the detachable device <NUM> can be implemented by a field programmable gate array (FPGA) that is programmed to execute predetermined processing, for example, but may also be implemented in another form.

The image capturing apparatus <NUM> is an image capturing apparatus such as a network camera, and can provide a captured image to the input/output apparatus <NUM> via the network <NUM>. In the present embodiment, the image capturing apparatus <NUM> is assumed to incorporate a computation apparatus that can process a captured image, but there is no limitation to this configuration. For example, an external computer such as a personal computer (PC) that is connected to the image capturing apparatus <NUM> may also be present, and the combination of these apparatuses may also be treated as the image capturing apparatus <NUM>. Also, in the present embodiment, it is assumed that the detachable devices <NUM> are attached to all of the image capturing apparatuses <NUM>, respectively. In <FIG>, four image capturing apparatuses <NUM> and detachable devices that are respectively attached thereto are illustrated, but the number of combinations of these apparatuses may be three or less, or may be five or more.

As a result of attaching the detachable device <NUM>, to the image capturing apparatus <NUM>, that has an image analysis processing function such as image analysis, image analysis or the like can be executed in the image capturing apparatus <NUM>, even though the image capturing apparatus <NUM> does not have an image analysis processing function such as image analysis. A specific example of the analysis processing will be described later. Also, in a mode in which a computation apparatus for image processing is arranged in the image capturing apparatus <NUM>, as in the present embodiment, as a result of attaching a detachable device <NUM> in which a computation apparatus is arranged to the image capturing apparatus <NUM>, it becomes possible to use the computation apparatus of the detachable device <NUM> along with the own computation apparatus of the image capturing apparatus <NUM>, and as a result, the variety and level of image processing that can be executed in the image capturing apparatus <NUM> can be increased.

The input/output apparatus <NUM> is an apparatus for receiving inputs from a user of the system and outputting information to the user (e.g., display of information). In the present embodiment, the input/output apparatus <NUM> can be a computer such as a PC, for example, and as a result of a browser or a native application installed in the computer being executed by the incorporated processor, input/output of information is performed. The image capturing apparatus <NUM> and the input/output apparatus <NUM> are communicably connected via the network <NUM>. The network <NUM> includes a plurality of routers that satisfies a communication standard such as the Ethernet (registered trademark), switches, cables, and the like, for example. In the present embodiment, the network <NUM> may be any network that enables communication between the image capturing apparatus <NUM> and the input/output apparatus <NUM>, and may be constructed with any scale, configuration, and communication standard to which the network is conformable. For example, the network <NUM> may be the Internet, a wired local area network (LAN), a wireless LAN, a wide area network (WAN), or the like. Also, the network <NUM> may be configured to perform communication with a communication protocol conforming to the Open Network Video Interface Forum (ONVIF) standard, for example. Note that there is no limitation to this configuration, and the network <NUM> may also be configured to perform communication with another communication protocol such as the original communication protocol, for example.

Next, an exemplary configuration of the image capturing apparatus <NUM> will be described with reference to <FIG> is a diagram illustrating an exemplary hardware configuration of the image capturing apparatus <NUM>. The image capturing apparatus <NUM> includes an image capturing unit <NUM>, an image processing unit <NUM>, a computation processing unit <NUM>, a distributing unit <NUM>, an SD I/F unit <NUM>, as its hardware configuration, for example. I/F is an abbreviation of interface.

The image capturing unit <NUM> includes a lens unit for forming an image by light and an image sensor for performing analog signal conversion in accordance with light with which an image is formed. The lens unit has a zoom function for adjusting the angle of view, a diaphragm function for adjusting the light amount, and the like. The image sensor has a gain function for performing sensitivity adjustment when light is converted to an analog signal. These functions are adjusted based on setting values notified from the image processing unit <NUM>. The analog signal generated by the image capturing unit <NUM> is converted to a digital signal by an analog to digital conversion circuit, and the digital signal is transferred to the image processing unit <NUM> as an image signal.

The image processing unit <NUM> includes an image processing engine, peripheral devices thereof, and the like. The peripheral device includes random access memory (RAM), I/F drivers, and the like, for example. The image processing unit <NUM> generates image data by performing image processing such as developing processing, filtering processing, sensor correction, noise removal, and the like on the image signal acquired from the image capturing unit <NUM>, for example. Also, the image processing unit <NUM> transmits setting values to the lens unit and the image sensor, and may execute exposure adjustment such that an appropriate exposure image can be acquired. The image data generated by the image processing unit <NUM> is transferred to the computation processing unit <NUM>.

The computation processing unit <NUM> includes one or more processors such as CPU and MPU, memories such as RAM and ROM, I/F drivers, and the like. Note that CPU is an acronym of Central Processing Unit, MPU is an acronym of Micro Processing Unit, and ROM is an acronym of Read Only Memory. The computation processing unit <NUM> executes various types of processing such as control and computation that are needed for the operations of the image capturing apparatus <NUM>. Also, in one example, assignment of portions of processing to be executed in the system described above to the image capturing apparatus <NUM> and the detachable device <NUM> for execution is determined, and the image capturing apparatus <NUM> and the detachable device <NUM> may execute the processing according to the determined assignment. The details of the processing contents and the assignment of processing will be described below. An image received from the image processing unit <NUM> is transferred to the distributing unit <NUM> or the SD I/F unit <NUM>. Also, the processing result data is also transferred to the distributing unit <NUM>.

The distributing unit <NUM> includes a network distribution engine and peripheral devices such as RAM and an ETH PHY module, for example. The ETH PHY module is a module for executing processing of the Ethernet physical (PHY) layer. The distributing unit <NUM> coverts the image data and processing result acquired from the computation processing unit <NUM> to a format for enabling distribution to the network <NUM>, and outputs the converted data to the network <NUM>.

The SD I/F unit <NUM> is an interface portion for connection with the detachable device <NUM>, and includes a mounting part such as a socket for attachment/detachment of a power supply and the detachable device <NUM>, for example. Here, it is assumed that the SD I/F unit <NUM> is configured following the SD standard defined by the SD Association. The communication between the detachable device <NUM> and the image capturing apparatus <NUM> such as transferring an image acquired from the computation processing unit <NUM> to the detachable device <NUM> and acquiring data from the detachable device <NUM> is performed through the SD I/F unit <NUM>.

Next, an exemplary functional configuration of the image capturing apparatus <NUM> will be described with reference to <FIG>. The image capturing apparatus <NUM> includes an image capturing control unit <NUM>, a signal processing unit <NUM>, a storing unit <NUM>, a control unit <NUM>, an analyzing unit <NUM>, a device communication unit <NUM>, and a network communication unit <NUM>, as its functional units.

The image capturing control unit <NUM> corresponds to the one or more processors such as CPU and MPU in the computation processing unit <NUM>, and executes control to capture images of the surrounding environment via the image capturing unit <NUM>. The signal processing unit <NUM> corresponds to the image processing unit <NUM>, and generates captured image data by performing predetermined processing on an image captured by the image capturing control unit <NUM>. In the following, the captured image data is simply referred to as a "captured image". The signal processing unit <NUM> encodes the image captured by the image capturing control unit <NUM>, for example. The signal processing unit <NUM> encodes still images using an encoding system such as the Joint Photographic Experts Group (JPEG), for example. Also, the signal processing unit <NUM> encodes moving images using an encoding system such as H. <NUM>/MPEG-<NUM> AVC (referred to as "H. <NUM>" below) or High Efficiency Video Coding (HEVC). Also, the signal processing unit <NUM> may encode images using an encoding system selected by a user from a plurality of preset encoding systems, via an operation unit (unshown) of the image capturing apparatus <NUM>, for example.

The storing unit <NUM> corresponds to various storage apparatuses included in the image processing unit <NUM> and the computation processing unit <NUM>, and stores a list of analysis processing that can be executed in the analyzing unit <NUM> and a list of postprocessing for analysis processing results. Also, the storing unit <NUM> can store a test image whose analysis processing result is known, and also the analysis processing result. Note that, in the present embodiment, the image processing to be executed is analysis processing, but any processing may also be executed, and the storing unit <NUM> stores an analysis processing list and a postprocessing list regarding processing related to the processing to be executed.

The control unit <NUM> corresponds to one or more processors such as CPU and MPU in the computation processing unit <NUM>, and controls the signal processing unit <NUM>, the storing unit <NUM>, the analyzing unit <NUM>, the device communication unit <NUM>, and the network communication unit <NUM> such that each of them executes predetermined processing. Also, the control unit <NUM> determines the load state of processing that is being executed in the image capturing apparatus <NUM>, and if it is determined that the load is high, performs control such that clock signal supply from the device communication unit <NUM> to the detachable device <NUM> is stopped, and the like.

The analyzing unit <NUM> corresponds to one or more processors such as CPU and MPU in the computation processing unit <NUM>, and selects image processing to be executed on a captured image from at least any of preprocessing for analysis, analysis processing, and postprocessing for analysis, which will be described later, and executes the selected image processing. The preprocessing for analysis is image processing to be executed on a captured image before executing the later-described analysis processing. It is assumed that, in the preprocessing for analysis of the present embodiment, processing for creating divided images by dividing a captured image is to be executed, as an example. The analysis processing is image processing for analyzing an input image and outputting information obtained by the analysis.

It is assumed that, in the analysis processing of the present embodiment, processing is executed in which at least any of human body detection processing, face detection processing, and vehicle detection processing is executed using the divided images obtained by the preprocessing for analysis as an input, and the analysis processing result is output, as an example. The analysis processing may be image processing configured to output the position of an object included in divided images using a machine learning model subjected to learning so as to be able to detect an object included in an image using a technique described in "J. Farhadi "YOLO9000: Better Faster Stronger", Computer Vision and Pattern Recognition (CVPR) <NUM>", for example.

That is, the image processing includes analysis processing using a trained neural network that can perform feature extraction for detecting a predetermined object. The postprocessing for analysis is image processing that is executed after the analysis processing has been executed. It is assumed that, in the postprocessing for analysis of the present embodiment, image processing is executed in which a value obtained by adding up the number of objects detected in divided images is output as the processing result, based on the results of analysis processing performed on the divided images, for example. Note that the analysis processing may also be processing in which an object in an image is detected by performing pattern matching, and the position of the object is output.

The device communication unit <NUM> corresponds to the SD I/F unit <NUM>, performs communication with the detachable device <NUM>, and supplies a clock signal for generating a later-described clock signal for processing to the detachable device <NUM>. The device communication unit <NUM> converts the format of input data to a format that the detachable device <NUM> can process, and transmits the data obtained by the conversion to the detachable device <NUM>. Also, the device communication unit <NUM> receives data from the detachable device <NUM>, and converts the format of the received data to a format that the image capturing apparatus <NUM> can process. In the present embodiment, it is assumed that the device communication unit <NUM> executes processing for converting decimals between a floating point format and a fixed point format, but there is no limitation to this type of processing, and another processing may also be executed by the device communication unit <NUM>. Also, in the present embodiment, it is assumed that the device communication unit <NUM> performs communication with the detachable device <NUM> by transmitting a request (or, command, command sequence) determined in advance in the range of the SD standard to the detachable device <NUM>, and receiving a response from the detachable device <NUM>. The network communication unit <NUM> corresponds to the distributing unit <NUM>, and performs communication with the input/output apparatus <NUM> via the network <NUM>.

Next, an exemplary hardware configuration of the detachable device <NUM> will be described with reference to <FIG>. The detachable device <NUM> includes an I/F unit <NUM>, an FPGA <NUM>, an SD controller <NUM>, and a storing unit <NUM>, for example. It is assumed that the detachable device <NUM> is formed with a shape for enabling insertion and removal to and from the socket of the SD I/F unit <NUM> included in the image capturing apparatus <NUM>, that is, formed with a shape conforming to the SD standard.

The I/F unit <NUM> is an interface portion for connecting the detachable device <NUM> to an apparatus such as the image capturing apparatus <NUM>. The I/F unit <NUM> includes electrical contact terminals and the like, receives supply of power from the image capturing apparatus <NUM>, and generates and distributes power supplies to be used in the detachable device <NUM>, for example. It is assumed that, similarly to the SD I/F unit <NUM> of the image capturing apparatus <NUM>, regarding items defined in the SD standard, the I/F unit <NUM> follows (in conformity to) the definitions. Reception of images and setting data from the image capturing apparatus <NUM> and transmission of data from the FPGA <NUM> to the image capturing apparatus <NUM> are executed via the I/F unit <NUM>.

The FPGA <NUM> includes an input/output control unit <NUM>, a processing switching unit <NUM>, a computation processing unit <NUM>, and a processing clock signal generating unit <NUM>. The FPGA <NUM> is one type of semiconductor device whose internal logic circuit structure can be repeatedly reconfigured. A processing function can be added (provided) to an apparatus on which the detachable device <NUM> is mounted by processing realized by the FPGA <NUM>. Also, with the reconfiguring function of the FPGA <NUM>, the logic circuit structure can be changed later, and therefore, by attaching the detachable device <NUM> to an apparatus in a field in which technical advancement is rapid, the apparatus can execute appropriate processing at an appropriate time, for example.

In the present embodiment, an example in which an FPGA is used is described, but a general-purpose ASIC or a dedicated LSI may also be used, as long as later-describing processing can be realized, for example. The FPGA <NUM> is started by writing into setting data including information regarding the logic circuit structure to be generated from a dedicated I/F, or by reading out the setting data from the dedicated I/F. In the present embodiment, it is assumed that the setting data is retained in the storing unit <NUM>. Upon turning on a power supply, the FPGA <NUM> reads out the setting data from the storing unit <NUM>, generate a logic circuit, and then starts. Note that there is no limitation to this configuration, and a configuration may also be adopted in which, by implementing a dedicated circuit in the detachable device, the image capturing apparatus <NUM> writes setting data into the FPGA <NUM> via the I/F unit <NUM>, for example.

The input/output control unit <NUM> includes a circuit for transmitting and receiving images to and from the image capturing apparatus <NUM>, a circuit for analyzing a command received from the image capturing apparatus <NUM>, a circuit for performing control based on the analyzed result, and the like. The commands here are defined in the SD standard, and the input/output control unit <NUM> can detect some of the defined commands. The details of the functions will be described later. The input/output control unit <NUM> performs control such that, in the case of storing processing, an image is transmitted to the SD controller <NUM>, and in the case of image analysis processing, an image is transmitted to the computation processing unit <NUM>. Also, the input/output control unit <NUM>, upon receiving setting data for switching processing, transmits the setting data to the processing switching unit <NUM>.

The processing switching unit <NUM> includes circuits for acquiring information regarding an image analysis processing function from the storing unit <NUM> based on setting data received from the image capturing apparatus <NUM>, and for writing the information into the computation processing unit <NUM>. The information regarding the image analysis processing function is a setting parameter indicating the sequence and type of computation to be processed in the computation processing unit <NUM> and computation coefficients, for example. The computation processing unit <NUM> includes a plurality of computation circuits that are needed to execute the image analysis processing function. The computation processing unit <NUM> executes computation processing based on information regarding the image analysis processing function received from the processing switching unit <NUM>, and transmits the processing result to the image capturing apparatus <NUM>, and/or stores the processing result in the storing unit <NUM>.

The processing clock signal generating unit <NUM> is constituted by a phase locked loop (PLL) or the like for speeding up the computation processing, and generates a high-speed clock signal (hereinafter, a clock signal for processing) by clocking up the clock signal supplied from the image capturing apparatus <NUM> via the input/output control unit <NUM>. The computation processing unit <NUM> executes processing using the clock signal for processing generated by the processing clock signal generating unit <NUM>. Therefore, if the clock signal supply from the image capturing apparatus <NUM> stops for a long period of time, the clock signal for processing generated by the processing clock signal generating unit <NUM> oscillates and becomes unstable, and as a result, the processing in the computation processing unit <NUM> cannot be performed normally. Also, if the clock signal supply is stopped for a long period of time when a high-speed clock signal is generated, it is possible that the high-speed clock signal generated by the PLL is not resumed by simply restarting the clock signal supply, and normal processing is not returned to be executed. Note that the input/output control unit <NUM> uses the clock signal supplied from the image capturing apparatus <NUM> for communication as is, and therefore even in a state in which the clock signal for processing becomes unstable, exchange of command/data with the image capturing apparatus <NUM> is possible via the I/F unit <NUM>.

The FPGA <NUM> extracts setting data of a processing function to be executed that is included in setting data corresponding to a plurality of processing functions that are retained in advance, and rewrites processing contents to be executed by the computation processing unit <NUM> based on the extracted setting data. Accordingly, the detachable device <NUM> can selectively execute at least one of the plurality of processing functions. Also, as a result of adding setting data for processing that is newly added as appropriate, latest processing can be executed in the image capturing apparatus <NUM>. Note that, in the following, the fact that a plurality of pieces of setting data respectively corresponding to the plurality of processing functions are included is expressed as including the plurality of processing functions. That is, even in a state in which the FPGA <NUM> of the detachable device <NUM> is configured to execute one processing function, if the processing contents of the computation processing unit <NUM> can be changed with setting data for another processing function, this fact is expressed as including a plurality of processing functions.

The SD controller <NUM> is a known control Integrated Circuit (IC) such as one defined in the SD standard, and executes control of a slave operation according to the SD protocol, and data read/write control for storing unit <NUM>. The storing unit <NUM> is constituted by a NAND-type flash memory, for example, and stores various types of information such as storage data written into by the image capturing apparatus <NUM>, information regarding an image analysis processing function to be written into the computation processing unit <NUM>, setting data of the FPGA <NUM>, and circuit data for analysis.

Next, an exemplary functional configuration of the detachable device <NUM> will be described with reference to <FIG>. The detachable device <NUM> includes an analyzing unit <NUM>, a communication unit <NUM>, and a storing unit <NUM>, as its functional configuration, for example. The analyzing unit <NUM> executes various types of image processing (computation processing) including analysis processing on an image. The analyzing unit <NUM> corresponds to the FPGA <NUM>, and upon receiving input of a setting request of analysis processing from the image capturing apparatus <NUM>, configures setting for entering a state in which the analysis processing is executable, for example. The setting request of analysis processing can include information for designating the type of analysis processing to be made executable, and the analyzing unit <NUM> configures setting for making the type of analysis processing designated by the setting request executable. Also, the analyzing unit <NUM>, upon receiving input of an image, executes the analysis processing that is set to be executable on the input image. The communication unit <NUM> corresponds to the I/F unit <NUM>, and performs communication with the image capturing apparatus <NUM>. The storing unit <NUM> corresponds to the SD controller <NUM> and the storing unit <NUM>, stores image data received from the image capturing apparatus <NUM>, and is also used as a work area for image processing in the analyzing unit <NUM>. In the present embodiment, the configuration is such that the result of analysis processing in the analyzing unit <NUM> is stored as appropriate in the storing unit <NUM>, even in a middle of processing.

In the present embodiment, the types of executable analysis processing include human body detection processing and face detection processing, but the example of executable analysis processing is not limited thereto. For example, the executable analysis processing may also be processing for determining whether or not an input image includes a subject (person, vehicle, object, or the like) stored in the storing unit <NUM> in advance, for example. Specifically, a matching degree between an image feature amount of a person stored in advance and an image feature amount of a person detected from the input image is calculated, and if the matching degree is a threshold value or more, it can be determined that the person stored in advance is present. Also, for the purpose of privacy protection, the executable analysis processing may also be processing of superimposing a predetermined mask image or performing mosaic processing on a person, an object, a region, or the like that has been detected from the input image. Also, the executable analysis processing may also be processing for detecting whether or not a person in an image is performing a specific action, using a learning model that has been subjected to learning regarding the specific action of a person by machine learning. Furthermore, the executable analysis processing may also be processing for determining what type of region is the region in an image. For example, the executable analysis processing may also be processing for determining what type of region is the region in an image using a learning model that has been subjected to learning regarding a building, a road, person, the sky, and the like by machine learning.

As described above, the executable analysis processing can be applied to image analysis processing using machine learning, and also to image analysis processing in which machine learning is not used. Also, the analysis processing described above may also be executed in cooperation with the image capturing apparatus <NUM>, instead of being performed by the detachable device <NUM> independently.

Next, the processing flow for resetting a clock signal for processing generated in the processing clock signal generating unit <NUM> will be described with reference to the flowchart in <FIG>. The processing corresponding to the flowchart can be realized, in the image capturing apparatus <NUM>, by one or more processors (CPU, MPU, and the like) that function as the control unit <NUM> executing a corresponding program (stored in a memory that functions as the storing unit <NUM>), for example. Also, in the detachable device <NUM>, the processing corresponding to the flowchart can be realized by the FPGA <NUM> that is started after reading out corresponding setting data from the storing unit <NUM> and generating the logic circuit.

First, in step S601, the control unit <NUM> of the image capturing apparatus <NUM> issues a clock resetting command for requesting the detachable device <NUM> to reset the clock signal for processing via the device communication unit <NUM>. Upon receiving the clock resetting command for resetting a high-speed clock signal via the I/F unit <NUM>, in step S611, the input/output control unit <NUM> outputs a signal for resetting a PLL that constitutes the processing clock signal generating unit <NUM>, and regenerates the clock signal for processing.

As shown in <FIG>, an SD command <NUM> is constituted by STARTbit <NUM>, Directionbit <NUM>, a command number portion <NUM>, a command argument portion <NUM>, an error correction data portion <NUM>, ENDbit <NUM>, and the like. The clock resetting command may be issued by setting a number different from known SD commands to the command number portion <NUM>, or by embedding a reset request flag in a portion set as reserve in the command argument portion <NUM> using a known command, for example.

Next, in step S602, the control unit <NUM> of the image capturing apparatus <NUM> transmits a captured image for image processing to the detachable device <NUM> via the device communication unit <NUM>. In step S612, the communication unit <NUM> that has received the captured image outputs the captured image to the analyzing unit <NUM>. In step S603 next, the control unit <NUM> of the image capturing apparatus <NUM> issues an execution instruction command for instructing execution of computation processing via the device communication unit <NUM>. The communication unit <NUM> that has received the execution instruction command outputs the execution instruction command to the analyzing unit <NUM>. In step S613, the computation processing unit <NUM>, upon receiving the execution instruction command, executes the computation processing on the already-received captured image, and in step S614, ends the processing. The image processing such as analysis processing that is set operable in response to an analysis processing setting request that has received in advance as described above corresponds to the computation processing.

In step S604 next, the image capturing apparatus <NUM> waits for a period of time needed for computation processing in the analyzing unit <NUM> (computation processing unit <NUM>). The wait time may be retained in the image capturing apparatus <NUM> in advance as information, or may also be read out from the detachable device <NUM> before starting processing. In step S605 next, the control unit <NUM> of the image capturing apparatus <NUM> issues an output request command for requesting output of a computation result via the device communication unit <NUM>. The communication unit <NUM> that has received the output request command in step S615 outputs the command to the analyzing unit <NUM>. In step S616 next, in response to the output request command, the analyzing unit <NUM> outputs the computation result to the communication unit <NUM>, and the communication unit <NUM> outputs the received computation result to the image capturing apparatus <NUM>. In step S606 next, the device communication unit <NUM> of the image capturing apparatus <NUM> receives the computation result output from the detachable device <NUM>.

As described above, in the processing described in <FIG>, in step S601, the clock resetting command is issued to the detachable device <NUM>, and the clock signal for processing is reset and regenerated before starting computation. Accordingly, even in a case where clock signal supply from the image capturing apparatus <NUM> is stopped, and the clock signal for processing is unstable, the computation processing can be started in a state in which the processing clock signal is returned to normal, and therefore the computation processing can be normally executed.

In the above embodiment, processing in which the clock signal for processing is reset before starting computation in the detachable device <NUM> has been described. In contrast, when the fact that the clock signal for processing becomes unstable is detected while computation processing is undergoing in a detachable device <NUM>, the clock signal for processing can also be reset. The processing of the present embodiment will be described below with reference to <FIG>.

An example of processing to be performed when the fact that the clock signal for processing has become unstable has been detected based on a computation result will be described with reference to <FIG>. The processing corresponding to the flowchart can be realized, in an image capturing apparatus <NUM>, by one or more processors (CPU, MPU, and the like) that function as a control unit <NUM> executing a corresponding program (stored in a memory that functions as the storing unit <NUM>), for example. Also, although not illustrated in <FIG>, the processing in the detachable device <NUM> can be realized by ab FPGA <NUM> that is started after reading out corresponding setting data from a storing unit <NUM> and generating the logic circuit.

First, in step S801, the control unit <NUM> of the image capturing apparatus <NUM> transmits a captured image for image processing to the detachable device <NUM> via a device communication unit <NUM>. Next, in step S802, the control unit <NUM> of the image capturing apparatus <NUM> issues a command for instructing execution of computation processing to the detachable device <NUM> via the device communication unit <NUM>, and causes the detachable device <NUM> to execute the computation processing on the captured image. In step S803, the control unit <NUM> of the image capturing apparatus <NUM> requests a computation result by issuing an output request command to the detachable device <NUM> via the device communication unit <NUM>.

Upon receiving the computation result in response to the request, in step S804, the control unit <NUM> of the image capturing apparatus <NUM> determines whether or not the computation result output from the detachable device <NUM> is normal (or anomalous). Whether or not the computation result is normal can be determined based on whether or not the computation result takes an invalid value, for example. Here, the "invalid value" indicates a case where the output results are all values that cannot be output as computation results, such as 0x00 or 0xFF, a case where, although the captured image on which computation processing is performed has been changed, a value that is the same as the value of the previous computation result has been output, or the like. In the present embodiment, whenever computation processing is performed, the computation result is saved in the storing unit <NUM>, and therefore when a value that is the same as the value of the previous computation result has been output, the computation processing itself has not been executed, and as a result, the computation result of the previous time is regarded as an invalid value. When the computation result is an invalid value, the computation result is regarded as being not normal (that is, anomalous). If it is determined that the computation result is an invalid value in step S804, the processing is advanced to step S805. In this case, the image capturing apparatus <NUM> regards that the clock signal for processing becomes unstable, and in step S805, the control unit <NUM> of the image capturing apparatus <NUM> issues a clock resetting command via the device communication unit <NUM>, and again executes computation processing from step S801.

If it is determined that the computation result is not an invalid value in step S804, the processing is advance to step S806, and the image capturing apparatus <NUM> executes postprocessing. Processing such as displaying the computation result acquired from the detachable device <NUM> that is superimposed on an image can be performed as the postprocessing, for example.

As described above, in the present embodiment, an anomaly in the result of computation performed in the detachable device <NUM> is detected, resetting of the clock signal for processing is performed, and with this, the anomalous state can be resolved. Therefore, even if the clock signal for processing becomes unstable in the middle of computation in the detachable device <NUM>, the clock signal is reset and the state can be returned to the normal state. On the other hand, when an anomaly in the computation result is not detected, resetting processing of the clock signal for processing need not be performed because the clock signal for processing is not unstable, and as a result, the overall processing time can be reduced.

In the second embodiment described above, processing has been described in which the clock signal for processing is reset based on an anomaly in the computation result detected while computation is being performed. In the second embodiment, an anomaly in the computation result is detected based on a specific value (0x00 or 0xFF), but a case is also envisioned in which unstableness of the clock signal for processing does not appear as a specific value. Therefore, in the present embodiment, a case will be described in which the fact that the clock signal for processing has become unstable is detected based on a result of computation performed on a test image. Here, the test image indicates image data for which the computation result in a detachable device <NUM> is determined (known) in advance. In the present embodiment, the known computation result is referred to as an "expected value". When the content of computation processing on an image to be executed by the detachable device <NUM> is the same, the results of the computation processing performed on the same image match. Therefore, when a computation result that is the same as the expected value is not returned, it can be estimated that an error incurred by unstableness of the clock signal for processing occurs, for example. In the present embodiment, an image for which the computation result is known is retained in a storing unit <NUM> of an image capturing apparatus <NUM> as a test image in advance. Also, the value of a computation result obtained by computation performed on the test image in advance can also be retained.

<FIG> is a flowchart illustrating an example of processing corresponding to the present embodiment. First, in step S901, a control unit <NUM> of the image capturing apparatus <NUM> transmits a test image stored in the storing unit <NUM> to the detachable device <NUM> via a device communication unit <NUM>. In step S902 next, the control unit <NUM> of the image capturing apparatus <NUM> issues a command for instructing execution of computation processing to the detachable device <NUM> via the device communication unit <NUM>, and in step S903, further issues a computation result output request command. Upon receiving the computation result transmitted from the detachable device <NUM> in response to the output request command, in step S904, the control unit <NUM> of the image capturing apparatus <NUM> determines whether or not the computation result acquired from the detachable device <NUM> matches the expected value obtained in advance. If it is determined that the computation result does not match the expected value in step S904, the processing is transitioned to step S905. In this case, it is estimated that the clock signal for processing is unstable, and therefore the device communication unit <NUM> of the image capturing apparatus <NUM> issues a clock resetting command to the detachable device <NUM>. On the other hand, if it is determined that the computation result matches the expected value in step S904, the processing is advanced to step S906.

In step S906, the device communication unit <NUM> of the image capturing apparatus <NUM> transmits an image for processing to the detachable device <NUM>, and in step S907 next, issues a request command for instructing execution of computation processing, and further in step S908, issues a command for requesting the computation result.

As described above, in the present embodiment, a case has been described in which computation processing on a test image is executed in advance to performing computation processing on a captured image on which an actual computation processing is to be performed, and the computation processing on the test image can be executed at a predetermined frequency. For example, the computation processing on the test image may be executed every time the number of images on which the computation processing has been executed matches a predetermined number, for example. Also, the computation processing on the test image may also be performed in a period in which the detachable device <NUM> is not performing computation processing (in an unoccupied time).

According to the present embodiment, it is possible to detect that computation processing in the detachable device <NUM> is not performed normally, based on a result of computation performed on a test image. Accordingly, in a case where a portion of a computation result is anomalous as well, other than the case where the computation result takes a fixed value such as 0x00 or 0xFF and the case where the computation result is not updated from the previous computation result, the anomaly in the computation processing can be detected. In the present embodiment, computation is performed using a test image for which an expected value of the computation result is known in advance, and therefore an anomaly in computation processing can be highly accurately detected, relative to the computation processing using a normal captured image, as in the case of the second embodiment.

In the embodiments described above, a mode has been described in which computation processing in a detachable device <NUM> is caused to be normally performed by issuing a clock resetting command to the detachable device <NUM>. In contrast, in the present embodiment, processing in an image capturing apparatus <NUM> for avoiding a stop situation of the clock signal supply will be described.

First, a factor for causing stoppage of clock signal supply from the image capturing apparatus <NUM> to the detachable device <NUM> includes a high load of the control unit <NUM> in the image capturing apparatus <NUM>. Therefore, if similar processing as before is continued without resolving the high-load situation in the image capturing apparatus <NUM> after merely resetting the clock signal for computation in the detachable device <NUM>, there is a risk that stoppage of clock signal supply will be repeated. Therefore, in the present embodiment, a situation is avoided in which stoppage of clock signal supply will be repeated by reducing the processing load in the image capturing apparatus <NUM>. It is assumed that stoppage of clock signal for processing is detected using a result of computation on a captured image, similar to the flowchart of <FIG>, for the sake of description below.

The processing flow in the image capturing apparatus <NUM> corresponding to the present embodiment will be described with reference to <FIG>. First, in step S1001, the control unit <NUM> of the image capturing apparatus <NUM> transmits a captured image for image processing to the detachable device <NUM> via the device communication unit <NUM>. In step S1002 next, the control unit <NUM> of the image capturing apparatus <NUM> issues a command for instructing execution of computation processing to the detachable device <NUM> via a device communication unit <NUM>, issues a command for requesting a computation result in step S1003, and acquires the computation result. In step S1004 next, the control unit <NUM> of the image capturing apparatus <NUM> determines whether or not the computation result output from the detachable device <NUM> is an invalid value. If it is determined that the computation result is an invalid value, the processing is advanced to step S1005. In step S1005, the control unit <NUM> of the image capturing apparatus <NUM> issues a clock resetting command to the detachable device via the device communication unit <NUM>, and in step S1006, the control unit <NUM> of the image capturing apparatus <NUM> changes the settings such that the frequency of computation processing is reduced, and the processing in step S1001 and onward is again performed. On the other hand, if it is determined that the computation result is not an invalid value in step S1004, the processing is transitioned to step S1007 without reducing the processing frequency, and postprocessing is performed such as a computation result that is superimposed on an image being displayed.

A case has been described in which when an invalid value is detected in the computation result, the computation frequency in the image capturing apparatus <NUM> is immediately reduced. However, the frequency of computation processing may also be reduced when an invalid value is detected a certain number of times or at a certain frequency or more, depending on the embodiment.

Also, the load of the image capturing apparatus <NUM> may also be reduced by, not only reducing the frequency of computation processing in the image capturing apparatus <NUM>, making a change such that a portion of the processing performed in the image capturing apparatus <NUM> is caused to be performed in the detachable device <NUM>. Alternatively, the control unit <NUM> of the image capturing apparatus <NUM> may also perform notification control such that a user notification indicating that the processing load of the image capturing apparatus <NUM> has increased or for prompting a user to reduce the processing load is output (displayed) on the input/output apparatus <NUM>. Examples of such a user notification include a notification for causing the load of the image capturing apparatus <NUM> to be reduced such as a proposal for reducing the number of streams to be distributed to a network or for reducing the region for which computation processing is performed.

In the present embodiment, by reducing the load in the image capturing apparatus <NUM>, a situation can be avoided in which a high processing load state continues, and the clock signal supply is stopped at a high frequency, and as a result, the clock signal for processing can be effectively prevented from frequently becoming unstable in a short period of time.

The present invention is not limited to the above embodiments and various changes and modifications can be made within the scope of the present invention. Therefore, to apprise the public of the scope of the present invention, the following claims are made.

Embodiments of the present invention can also be realized by a computer of a system or apparatus that reads out and executes computer executable instructions (e.g., one or more programs) recorded on a storage medium (which may also be referred to more fully as a 'non-transitory computer-readable storage medium') to perform the functions of one or more of the above-described embodiments and/or that includes one or more circuits (e.g., application specific integrated circuit (ASIC)) for performing the functions of one or more of the above-described embodiments, and by a method performed by the computer of the system or apparatus by, for example, reading out and executing the computer executable instructions from the storage medium to perform the functions of one or more of the above-described embodiments and/or controlling the one or more circuits to perform the functions of one or more of the above-described embodiments.

Claim 1:
An image capturing apparatus (<NUM>) including a mounting part for enabling attachment and detachment of a device (<NUM>), comprising:
generating means (<NUM>) for generating a command; and
communicating means (<NUM>) for, in a state where a device having a function of executing the analysis processing is attached to the mounting part, transmitting an image to the device, transmitting an execution instruction for executing the analysis processing on the image, and receiving a processing result of the analysis processing obtained according to the execution instruction,
characterized in that
the image capturing apparatus comprises a determining means configured to determine whether or not the processing result of the analysis processing indicates that a clock signal for processing is unstable;
wherein the communicating means is configured to transmit the command to the device if the determining means determines that the processing result of the analysis processing indicates that the clock signal for processing is unstable and
the command includes a request for clock resetting for causing the device to reset the clock signal for processing to be used to execute analysis processing.