Patent Description:
A variety of wireless cellular communication systems have been implemented, including a 3rd Generation Partnership Project (3GPP) Universal Mobile Telecommunications Systems (UMTS) system, a 3GPP Long-Term Evolution (LTE) system, and a 3GPP LTE- Advanced (LTE-A) system. Next-generation wireless cellular communication systems based upon LTE and LTE-A systems are being developed, such as a Fifth Generation (<NUM>) wireless system / <NUM> mobile networks system. Next-generation wireless cellular communication systems may provide support for higher bandwidths in part by supporting beamforming. The 3GPP draft <NPL>), discloses a transmission scheme for TRS and SS-block.

Preferred embodiments are described by the dependent claims.

The embodiments of the disclosure will be understood more fully from the detailed description given below and from the accompanying drawings of various embodiments of the disclosure. However, while the drawings are to aid in explanation and understanding, they are only an aid, and should not be taken to limit the disclosure to the specific embodiments depicted therein.

Various wireless cellular communication systems have been implemented or are being proposed, including 3rd Generation Partnership Project (3GPP) Universal Mobile Telecommunications Systems (UMTS), 3GPP Long-Term Evolution (LTE) systems, 3GPP LTE-Advanced (LTE- A) systems, and 5th Generation (<NUM>) wireless systems / <NUM> mobile networks systems / <NUM> New Radio (NR) systems.

With respect to various embodiments, a Tracking Reference Signal (TRS) may be used for fine time tracking and frequency tracking, by which one or more of a time offset, a frequency offset, and a Doppler offset may be estimated so that a receiver may estimate a coefficient to construct a Wiener filter for channel estimation purposes. For single -beam systems, a TRS may be transmitted in one time instance within a given time window. For multi-beam systems, a TRS may be disposed to being transmitted repeatedly by different beams, so that a User Equipment (UE) may track either or both of a time offset or a frequency offset for different beams.

For NR systems, a number N of Synchronization Signal blocks (SS-blocks) comprising one or more of a Primary Synchronization Signal (PSS), a Secondary
Synchronization Signal (SSS), and Physical Broadcasting Channel (PBCH) may be transmitted within a time window. A number N of beams may then be applied to those SS-blocks.

<FIG> illustrates a scenario of an SS-block, in accordance with some embodiments of the disclosure. An SS-block <NUM> may comprise a PSS portion <NUM>, an SSS portion <NUM>, and one or more PBCH portions <NUM>. In various embodiments, for SS-block <NUM>, PSS portion <NUM> and SSS portion <NUM> may span <NUM> Resource Blocks (RBs), and PBCH portions <NUM> may span <NUM> RBs.

An SS-block may accordingly be used for measurement of Reference Signal
Received Power (RSRP). However, due to bandwidth limitations, measurement accuracy may be problematic.

<FIG> illustrates a scenario of link- level simulation results for different numbers of RBs for reference signal measurement, in accordance with some embodiments of the disclosure. A scenario <NUM> depicts link level simulation results for Cumulative
Distribution Functions (CDFs) of beamformed Signal-to-Interference-Noise Ratio (SINR) with selected beams based on the measurement of four candidate beams in one slot, where a variable B indicates a bandwidth of the reference signal. A first CDF <NUM> pertains to a B of <NUM> RBs, a second CDF <NUM> pertains to a B of <NUM> RBs, a third CDF <NUM> pertains to a B of <NUM> RBs, and a fourth CDF <NUM> pertains to a B of <NUM> RBs.

By using merely an SS-block, there may be some performance loss. One possible means of addressing this may be to use some additional signal to increase the RSRP measurement accuracy. Since the SS-block and TRS may be transmitted multiple times in a time window for multi-beam operation, multiplexing the SS-block and TRS may be problematic.

Disclosed herein are various mechanisms and methods for transmitting SS-block and TRS. Some embodiments may pertain to handling of collisions between SS-block and TRS. Some embodiments may pertain to numerologies and transmission power of SS-block and TRS. The various mechanisms and methods may facilitate multiplexing of SS-block and TRS (e.g., for multi-beam operation).

With respect to various embodiments, for multi-beam operation, the time offset and/or frequency offset may be different in beam pair links (BPLs) between different <NUM>-capable or NR-capable eNBs (or gNBs) and UEs. After a long Discontinuous Reception (DRX), a UE may be disposed to tracking time and frequency again. One possible way of doing so may be for a gNB to configure a TRS transmission to be at a slot before DRX (e.g., a slot immediately before DRX). The UE may then perform time offset and/or frequency offset tracking after the DRX. However, since multiple UEs may have different DRX cycles, it may be hard for a gNB to always keep the TRS at slots after a DRX, for all UEs.

Moreover, a UE may change its Receiving (Rx) beam after some measurement of SS-block or Channel State Information Reference Signal (CSI-RS). A timing offset or frequency offset may then be different for new BPLs. Accordingly, it may be advantageous for a UE to trigger an TRS transmission.

Disclosed herein are various mechanisms and methods for enabling UE-triggered TRS transmissions. Some embodiments may pertain to conditions for UE-triggered TRS transmissions. Some embodiments may pertain to operation of UE-triggered TRS transmissions. The various mechanisms and methods may facilitate UE triggering of TRS transmission (e.g., to better accommodate long DRX).

In the following description, numerous details are discussed to provide a more thorough explanation of embodiments of the present disclosure. It will be apparent to one skilled in the art, however, that embodiments of the present disclosure may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form, rather than in detail, in order to avoid obscuring embodiments of the present disclosure.

Throughout the specification, and in the claims, the term "connected" means a direct electrical, mechanical, or magnetic connection between the things that are connected, without any intermediary devices. The term "coupled" means either a direct electrical, mechanical, or magnetic connection between the things that are connected or an indirect connection through one or more passive or active intermediary devices. The term "circuit" or "module" may refer to one or more passive and/or active components that are arranged to cooperate with one another to provide a desired function. The term "signal" may refer to at least one current signal, voltage signal, magnetic signal, or data/clock signal. The meaning of "a," "an," and "the" include plural references. The meaning of "in" includes "in" and "on.

The terms "substantially," "close," "approximately," "near," and "about" generally refer to being within +/- <NUM>% of a target value. Unless otherwise specified the use of the ordinal adjectives "first," "second," and "third," etc., to describe a common object, merely indicate that different instances of like objects are being referred to, and are not intended to imply that the objects so described must be in a given sequence, either temporally, spatially, in ranking, or in any other manner.

It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein are, for example, capable of operation in other orientations than those illustrated or otherwise described herein.

For purposes of the embodiments, the transistors in various circuits, modules, and logic blocks are Tunneling FETs (TFETs). Some transistors of various embodiments may comprise metal oxide semiconductor (MOS) transistors, which include drain, source, gate, and bulk terminals. The transistors may also include Tri-Gate and FinFET transistors, Gate All Around Cylindrical Transistors, Square Wire, or Rectangular Ribbon Transistors or other devices implementing transistor functionality like carbon nanotubes or spintronic devices. MOSFET symmetrical source and drain terminals i.e., are identical terminals and
are interchangeably used here. A TFET device, on the other hand, has asymmetric Source and Drain terminals. Those skilled in the art will appreciate that other transistors, for example, Bi-polar junction transistors-BJT PNP/NPN, BiCMOS, CMOS, etc., may be used for some transistors without departing from the scope of the disclosure.

For the purposes of the present disclosure, the phrases "A and/or B" and "A or
B" mean (A), (B), or (A and B).

In addition, for purposes of the present disclosure, the term "eNB" may refer to a legacy LTE capable Evolved Node-B (eNB), a next-generation or <NUM> capable eNB, an Access Point (AP), and/or another base station for a wireless communication system. The term "gNB" may refer to a <NUM>-capable or NR-capable eNB. For purposes of the present disclosure, the term "UE" may refer to a legacy LTE capable User Equipment (UE), a Station (STA), and/or another mobile equipment for a wireless communication system. The term "UE" may also refer to a next-generation or <NUM> capable UE.

Various embodiments of eNBs and/or UEs discussed below may process one or more transmissions of various types. Some processing of a transmission may comprise demodulating, decoding, detecting, parsing, and/or otherwise handling a transmission that has been received. In some embodiments, an eNB or UE processing a transmission may determine or recognize the transmission's type and/or a condition associated with the transmission. For some embodiments, an eNB or UE processing a transmission may act in accordance with the transmission' s type, and/or may act conditionally based upon the transmission's type. An eNB or UE processing a transmission may also recognize one or more values or fields of data carried by the transmission. Processing a transmission may comprise moving the transmission through one or more layers of a protocol stack (which may be implemented in, e.g., hardware and/or software-configured elements), such as by moving a transmission that has been received by an eNB or a UE through one or more layers of a protocol stack.

Various embodiments of eNBs and/or UEs discussed below may also generate one or more transmissions of various types. Some generating of a transmission may
comprise modulating, encoding, formatting, assembling, and/or otherwise handling a transmission that is to be transmitted. In some embodiments, an eNB or UE generating a transmission may establish the transmission's type and/or a condition associated with the transmission. For some embodiments, an eNB or UE generating a transmission may act in accordance with the transmission' s type, and/or may act conditionally based upon the transmission's type. An eNB or UE generating a transmission may also determine one or more values or fields of data carried by the transmission. Generating a transmission may comprise moving the transmission through one or more layers of a protocol stack (which may be implemented in, e.g., hardware and/or software-configured elements), such as by moving a transmission to be sent by an eNB or a UE through one or more layers of a protocol stack.

In various embodiments, resources may span various RBs, Physical Resource
Blocks (PRBs), and/or time periods (e.g., frames, subframes, and/or slots) of a wireless communication system. In some contexts, allocated resources (e.g., channels, Orthogonal Frequency-Division Multiplexing (OFDM) symbols, subcarrier frequencies, resource elements (REs), and/or portions thereof) may be formatted for (and prior to) transmission over a wireless communication link. In other contexts, allocated resources (e.g., channels, OFDM symbols, subcarrier frequencies, REs, and/or portions thereof) may be detected from (and subsequent to) reception over a wireless communication link.

With respect to a variety of embodiments, both SS-block and TRS may be transmitted multiple times for multi-beam operation. For RSRP measurement purposes, it may be better to have a wider bandwidth reference signal, which may advantageously increase a measurement accuracy. For time offset tracking, wider bandwidth and/or a higher density may also advantageously increase accuracy. For frequency tracking, multiple time instances or symbols may be advantageous. As a result, transmitting SS-block and TRS in one slot, where the TRS and SS-block are transmitted using the same Transmitting (Tx) beam, may advantageously increase both RSRP measurement accuracy, time offset tracking performance, and/or frequency offset tracking performance.

In general, when calculating RSRP, a UE may average a received power over all the resource elements occupied by SS-block and TRS. Note that as discussed herein, an SS-block may indicate an actually-transmitted SS-block instead of a potentially transmitted SS-block. Also, note that the TRS may be a new reference signal, or may be some other Downlink (DL) reference signal or signals, such as CSI-RS, Demodulation reference signal (DM-RS), and so on.

<FIG> illustrates a scenario of TRS and SS-block multiplexing in a Frequency
Division Multiplexing (FDM) manner, in accordance with some embodiments of the disclosure. In a first option <NUM>, an SS-block portion <NUM> may be adjacent to one or more TRS portions <NUM>. TRS portions <NUM> may extend from frequencies adjacent to the frequencies of PSS, SSS, and PBCH of SS-block portion <NUM>. In a second option <NUM>, an SS-block portion <NUM> may be adjacent to one or more TRS portion <NUM>. TRS portions <NUM> may extend from frequencies adjacent to the frequencies of PBCH of SS-block portion <NUM> (and may not extend from frequencies adjacent to the frequencies of PSS and SSS of SS-block portion <NUM>).

Accordingly, in some embodiments, SS-block and TRS (e.g., SS-block portions and TRS portions) may be multiplexed in an FDM manner. TRS may be allocated to one or more subcarriers in a number K of RBs and/or in a number L of symbols outside of the RBs used for PSS and SSS, or the RBs used for PBCH (e.g., the <NUM> RBs used for PSS and SSS, and/or the <NUM> RBs used for PBCH). The number K and/or the number L may be predefined or otherwise predetermined, or may be configured (e.g., by higher-layer signaling). The RB indices of the number K of RBs may be pre-defined, e.g. to be symmetric around the SS-block, or may be configured by higher layer signaling. In some embodiments, if the number L is less than <NUM>, a priority of the symbols for TRS (e.g., the OFDM symbols) may be in the order of SSS, then a 1st and/or 2nd symbol of PBCH, then PSS. In some embodiments, the option to be used (e.g., first option <NUM> or second option <NUM>) may be pre-defined or otherwise predetermined, or may be configured (e.g., by higher-layer signaling), or may be determined by a number of RBs and/or a number of symbols for TRS.

The SS-block Antenna Port (AP) and the TRS AP may be the same, or may be
Quasi-Co-Located (QCLed). Accordingly, both TRS and SS-block (e.g., PSS, SSS, and/or PBCH) may be used for measurement and fine time/frequency tracking. An Energy Per Resource Element (EPRE) ratio between an SS-block (e.g., PSS, SSS, and/or PBCH) and TRS may be pre-defined or otherwise predetermined, or may be configured by higher-layer signaling, so that some power boosting may be used for SS-block, which may advantageously improve the performance of initial-access related procedures.

Furthermore, a numerology of TRS may be the same as that of an SS-block or may be different from that of an SS-block, and the numerology may be pre-defined or otherwise predetermined, or may be configured by higher-layer signaling. In some embodiments, whether to use first option <NUM> or second option <NUM> may be determined by whether the same numerologies are used for SS-block and TRS, or whether different numerologies are used for SS-block and TRS.

<FIG> illustrates a scenario of TRS and SS-block multiplexing in a Time
Division Multiplexing (TDM) manner, in accordance with some embodiments of the disclosure. In a first option <NUM>, an SS-block portion <NUM> may be adjacent to a TRS portion <NUM>. TRS portion <NUM> may span one or more OFDM symbols preceding the OFDM symbols of SS-block portion <NUM>. In a second option <NUM>, an SS-block portion <NUM> may be adjacent to a TRS portion <NUM>. TRS portion <NUM> may span one or more OFDM symbols following the OFDM symbols of SS-block portion <NUM>.

In some embodiments, the SS-block and TRS (e.g., SS-block portions and
TRS portions) may be multiplexed in a TDM manner. The TRS may be transmitted in one or more symbols before an SS-block (e.g., as in first option <NUM>), or in one or more symbols after an SS-block (e.g., as in second option <NUM>). A time offset may then be estimated by TRS, and a frequency offset may be estimated by TRS and/or SS-block. An RSRP measurement may be based on TRS and SS-block (e.g., PSS, SSS, and/or PBCH), and/or DM-RS of PBCH.

In various embodiments, an SS-block and TRS may be configured independently. Then, if a collision between the SS-block and TRS happens, one of the following options may be used. In a first option, TRS might not be transmitted. In a second option, TRS may be muted or punctured at the bandwidth of PSS, SSS, and/or PBCH (such as in <FIG>). In a third option, TRS may be shifted to one or more other symbols (such as in <FIG>). The option to be used may be pre-defined or otherwise predetermined, or may be configured by higher-layer signaling, or may be determined by a subcarrier spacing of SS-block and TRS and/or a system bandwidth.

In some embodiments, the presence of TRS may also be determined by a system bandwidth. For example, if the system bandwidth is equal to that of PBCH, TRS might not be transmitted.

With respect to various embodiments, various conditions may pertain to UE-triggered TRS. In some embodiments, a UE may be configured with a periodic TRS, where each periodic TRS may include at least one TRS burst. To support multiple-beam operation, multiple TRS bursts may be transmitted with a beam sweeping operation. The periodicity of TRS may in turn increase in order to better support more TRS bursts. A UE may then be disposed to trigger the TRS.

In order to advantageously avoid unnecessary triggering of TRS, in various embodiments, one or more of the following conditions may be used to judge whether or not a UE may trigger TRS. Under a first condition, a UE may trigger TRS when a TRS periodicity is above a threshold, or when no TRS is configured. Under a second condition, a UE may trigger TRS when a gNB configures the UE to trigger TRS. Under a third condition, a UE may trigger TRS when a hypothetical Block Error Ratio (BLER) of Physical Downlink Shared Channel (PDSCH) or a hypothetical BLER of Physical Downlink Control Channel (PDCCH) falls below a threshold (which may be predefined or otherwise predetermined, or may be configured by higher-layer signaling). Under a fourth condition, a UE may trigger TRS when a UE Rx beam changes, as shown in <FIG>. Under a fifth condition, a UE may trigger TRS when a DRX duration is above a threshold duration (which may be predefined or otherwise predetermined, or may be configured by higher-layer signaling), as shown in
<FIG>.

<FIG> illustrates a scenario of User Equipment (UE) triggered TRS when a Rx beam changes, in accordance with some embodiments of the disclosure. A plurality of slots <NUM> may comprise an SS-block slot <NUM>, a UE-triggering TRS slot <NUM>, and a TRS slot <NUM>. In SS-block slot <NUM>, a UE Rx beam may change. In UE-triggering TRS slot <NUM>, the UE may trigger TRS. In TRS slot <NUM>, the UE may receive TRS.

<FIG> illustrates a scenario of UE triggered TRS for a long DRX, in accordance with some embodiments of the disclosure. A plurality of slots <NUM> may comprise one or more DRX slots <NUM>, a UE-triggering TRS slot <NUM>, and a TRS slot <NUM>. A duration of DRX slots <NUM> may be above a threshold duration. In UE-triggering TRS slot <NUM>, the UE may trigger TRS. In TRS slot <NUM>, the UE may receive TRS.

In some embodiments, if a beam indication from a gNB indicates that a UE may be disposed to change its Rx beam or Tx beam, after the UE reports an
acknowledgement of a beam switching message, the gNB could configure a TRS
transmission in the slot where a PDSCH transmission begins. An example is depicted in <FIG>.

<FIG> illustrates a scenario of TRS transmission for beam indication with a
UE Rx beam change, in accordance with some embodiments of the disclosure. A plurality of slots <NUM> may comprise a beam indication slot <NUM> and a UE Rx beam switching slot <NUM>. In beam indication slot <NUM>, a UE may receive a beam indication over Downlink Control Information (DCI), which may include an indication of UE Rx beam switching. In UE Rx beam switching slot <NUM>, the UE may switch an Rx beam, and a PDSCH transmission may start.

In some embodiments, if a beam indication is included in a UE-specific DCI scheduling a DL data transmission, a timer-based solution may be employed to
advantageously facilitate or ensure alignment between a gNB and a UE on the BPL associated for TRS transmission. More specifically, TRS may be transmitted in a number of slots n + k, associated with a beam indication in a DCI in a slot n scheduling DL data transmission, where k may be predefined or otherwise predetermined (e.g., by specification), or may be configured by higher layers via NR Minimum System Information (MSI), NR Remaining Minimum System Information (RMSI), NR Other System Information (OSI), or Radio Resource Control (RRC) signaling.

Alternatively, in some embodiments, TRS may be associated with a beam indication a number k of slots after an Acknowledgement (ACK) response is received at a gNB.

In various embodiments, there may be two issues for the operation of UE triggered TRS. One issue may pertain to how to transmit a TRS request. Another issue may pertain to a gNB's response and UE behavior.

In various embodiments, a TRS request may be carried by Physical Random
Access Channel (PRACH), or Physical Uplink Control Channel (PUCCH), or higher-layer signaling, or Media Access Control (MAC) Control Element (MAC-CE), or RRC signaling, or may be combined with a beam recovery request. The TRS request may also carry QCL information and/or Transmission Configuration Indication (TCI) information, which may advantageously be used to identify the gNB beam of the TRS. For example, a UE may request that a gNB transmit a TRS QCLed with a SS-block index y.

In some embodiments, if PRACH is used to trigger a TRS request, QCL information may be carried implicitly by PRACH time resources, frequency resources, and/or preamble resources. If PUCCH or higher-layer signaling is used to trigger a TRS request, QCL information may be carried explicitly. <FIG> illustrates an exemplary scenario of a TRS request.

<FIG> illustrates a scenario of UE triggered TRS, in accordance with some embodiments of the disclosure. A plurality of slots <NUM> may comprise a UE-triggering TRS slot <NUM> and an aperiodic TRS slot <NUM>. In UE-triggering slot <NUM>, a UE may trigger TRS QCLed with an SS-block y. In aperiodic TRS slot <NUM>, the UE may receive an aperiodic TRS QCLed with the SS-block y.

In some embodiments, a UE may assume that a gNB would use the same beam as a beam used for SS-block for a follow-up data transmission as well. Furthermore, a gNB may trigger TRS in an aperiodic manner, a semi-persistent manner, or a periodic manner. The gNB may trigger TRS by DCI, by MAC-CE, and/or by RRC signaling.

In some embodiments, a UE may suggest a periodicity of TRS. A UE suggested TRS reconfiguration message may be carried by higher-layer signaling. A gNB may then change the periodicity of TRS after successfully decoding the information. <FIG> illustrates an exemplary scenario of UE suggesting TRS reconfiguration.

<FIG> illustrates a scenario of UE triggered TRS, in accordance with some embodiments of the disclosure. A plurality of slots <NUM> may comprise a UE periodicity suggestion slot <NUM> and a TRS reconfiguration slot <NUM>. In UE periodicity suggestion slot <NUM>, a UE may suggest a periodicity x of TRS. In TRS reconfiguration slot <NUM>, the UE may receive TRS reconfiguration with the periodicity x.

In some embodiments, a UE may suggest whether TRS should be transmitted during paging cycle or DRX. In some embodiments, a time window may be pre-defined or otherwise predetermined, or may be configured by higher-layer signaling, and if no response from a gNB is received after transmitting the TRS request, a UE may retransmit the request, or may wait until a next TRS transmission. Furthermore, the TRS may be transmitted in an active Bandwidth Part (BWP) regardless of whether the TRS is triggered by the gNB or the UE.

<FIG> illustrates an eNB and a UE, in accordance with some embodiments of the disclosure. <FIG> includes block diagrams of an eNB <NUM> and a UE <NUM> which are operable to co-exist with each other and other elements of an LTE network. High-level, simplified architectures of eNB <NUM> and UE <NUM> are described so as not to obscure the embodiments. It should be noted that in some embodiments, eNB <NUM> may be a stationary non-mobile device.

eNB <NUM> is coupled to one or more antennas <NUM>, and UE <NUM> is similarly coupled to one or more antennas <NUM>. However, in some embodiments, eNB <NUM> may incorporate or comprise antennas <NUM>, and UE <NUM> in various embodiments may incorporate or comprise antennas <NUM>.

In some embodiments, antennas <NUM> and/or antennas <NUM> may comprise one or more directional or omni-directional antennas, including monopole antennas, dipole antennas, loop antennas, patch antennas, microstrip antennas, coplanar wave antennas, or other types of antennas suitable for transmission of RF signals. In some MIMO (multiple- input and multiple output) embodiments, antennas <NUM> are separated to take advantage of spatial diversity.

eNB <NUM> and UE <NUM> are operable to communicate with each other on a network, such as a wireless network. eNB <NUM> and UE <NUM> may be in communication with each other over a wireless communication channel <NUM>, which has both a downlink path from eNB <NUM> to UE <NUM> and an uplink path from UE <NUM> to eNB <NUM>.

As illustrated in <FIG>, in some embodiments, eNB <NUM> may include a physical layer circuitry <NUM>, a MAC (media access control) circuitry <NUM>, a processor <NUM>, a memory <NUM>, and a hardware processing circuitry <NUM>. A person skilled in the art will appreciate that other components not shown may be used in addition to the components shown to form a complete eNB.

In some embodiments, physical layer circuitry <NUM> includes a transceiver <NUM> for providing signals to and from UE <NUM>. Transceiver <NUM> provides signals to and from UEs or other devices using one or more antennas <NUM>. In some embodiments, MAC circuitry <NUM> controls access to the wireless medium. Memory <NUM> may be, or may include, a storage media/medium such as a magnetic storage media (e.g., magnetic tapes or magnetic disks), an optical storage media (e.g., optical discs), an electronic storage media (e.g., conventional hard disk drives, solid-state disk drives, or flash-memory-based storage media), or any tangible storage media or non-transitory storage media. Hardware processing circuitry <NUM> may comprise logic devices or circuitry to perform various operations. In some embodiments, processor <NUM> and memory <NUM> are arranged to perform the operations of hardware processing circuitry <NUM>, such as operations described herein with reference to logic devices and circuitry within eNB <NUM> and/or hardware processing circuitry <NUM>.

Accordingly, in some embodiments, eNB <NUM> may be a device comprising an application processor, a memory, one or more antenna ports, and an interface for allowing the application processor to communicate with another device.

As is also illustrated in <FIG>, in some embodiments, UE <NUM> may include a physical layer circuitry <NUM>, a MAC circuitry <NUM>, a processor <NUM>, a memory <NUM>, a hardware processing circuitry <NUM>, a wireless interface <NUM>, and a display <NUM>. A person skilled in the art would appreciate that other components not shown may be used in addition to the components shown to form a complete UE.

In some embodiments, physical layer circuitry <NUM> includes a transceiver.

<NUM> for providing signals to and from eNB <NUM> (as well as other eNBs). Transceiver <NUM> provides signals to and from eNBs or other devices using one or more antennas <NUM>. In
some embodiments, MAC circuitry <NUM> controls access to the wireless medium. Memory <NUM> may be, or may include, a storage media/medium such as a magnetic storage media (e.g., magnetic tapes or magnetic disks), an optical storage media (e.g., optical discs), an electronic storage media (e.g., conventional hard disk drives, solid-state disk drives, or flash-memory-based storage media), or any tangible storage media or non-transitory storage media. Wireless interface <NUM> may be arranged to allow the processor to communicate with another device. Display <NUM> may provide a visual and/or tactile display for a user to interact with UE <NUM>, such as a touch-screen display. Hardware processing circuitry <NUM> may comprise logic devices or circuitry to perform various operations. In some embodiments, processor <NUM> and memory <NUM> may be arranged to perform the operations of hardware processing circuitry <NUM>, such as operations described herein with reference to logic devices and circuitry within UE <NUM> and/or hardware processing circuitry <NUM>.

Accordingly, in some embodiments, UE <NUM> may be a device comprising an application processor, a memory, one or more antennas, a wireless interface for allowing the application processor to communicate with another device, and a touch-screen display.

Elements of <FIG>, and elements of other figures having the same names or reference numbers, can operate or function in the manner described herein with respect to any such figures (although the operation and function of such elements is not limited to such descriptions). For example, <FIG> and <FIG> also depict embodiments of eNBs, hardware processing circuitry of eNBs, UEs, and/or hardware processing circuitry of UEs, and the embodiments described with respect to <FIG> and <FIG> and <FIG>can operate or function in the manner described herein with respect to any of the figures.

In addition, although eNB <NUM> and UE <NUM> are each described as having several separate functional elements, one or more of the functional elements may be combined and may be implemented by combinations of software-configured elements and/or other hardware elements. In some embodiments of this disclosure, the functional elements can refer to one or more processes operating on one or more processing elements. Examples of software and/or hardware configured elements include Digital Signal Processors (DSPs), one or more microprocessors, DSPs, Field-Programmable Gate Arrays (FPGAs), Application Specific Integrated Circuits (ASICs), RadioFrequency Integrated Circuits (RFICs), and so on.

<FIG> illustrates hardware processing circuitries for a UE for transmitting
SS-block and TRS, in accordance with some embodiments of the disclosure. <FIG> illustrates hardware processing circuitries for a UE for transmitting SS-block and TRS, in
accordance with some embodiments of the disclosure. With reference to <FIG>, a UE may include various hardware processing circuitries discussed herein (such as hardware processing circuitry <NUM> of <FIG> and hardware processing circuitry <NUM> of <FIG>), which may in turn comprise logic devices and/or circuitry operable to perform various operations. For example, in <FIG>, UE <NUM> (or various elements or components therein, such as hardware processing circuitry <NUM>, or combinations of elements or components therein) may include part of, or all of, these hardware processing circuitries.

In some embodiments, one or more devices or circuitries within these hardware processing circuitries may be implemented by combinations of software-configured elements and/or other hardware elements. For example, processor <NUM> (and/or one or more other processors which UE <NUM> may comprise), memory <NUM>, and/or other elements or components of UE <NUM> (which may include hardware processing circuitry <NUM>) may be arranged to perform the operations of these hardware processing circuitries, such as operations described herein with reference to devices and circuitry within these hardware processing circuitries. In some embodiments, processor <NUM> (and/or one or more other processors which UE <NUM> may comprise) may be a baseband processor.

Returning to <FIG>, an apparatus of UE <NUM> (or another UE or mobile handset), which may be operable to communicate with one or more eNBs on a wireless network, may comprise hardware processing circuitry <NUM>. In some embodiments, hardware processing circuitry <NUM> may comprise one or more antenna ports <NUM> operable to provide various transmissions over a wireless communication channel (such as wireless
communication channel <NUM>). Antenna ports <NUM> may be coupled to one or more antennas <NUM> (which may be antennas <NUM>). In some embodiments, hardware processing circuitry <NUM> may incorporate antennas <NUM>, while in other embodiments, hardware processing circuitry <NUM> may merely be coupled to antennas <NUM>.

Antenna ports <NUM> and antennas <NUM> may be operable to provide signals from a UE to a wireless communications channel and/or an eNB, and may be operable to provide signals from an eNB and/or a wireless communications channel to a UE. For example, antenna ports <NUM> and antennas <NUM> may be operable to provide transmissions from UE <NUM> to wireless communication channel <NUM> (and from there to eNB <NUM>, or to another eNB). Similarly, antennas <NUM> and antenna ports <NUM> may be operable to provide transmissions from a wireless communication channel <NUM> (and beyond that, from eNB <NUM>, or another eNB) to UE <NUM>.

Hardware processing circuitry <NUM> may comprise various circuitries operable in accordance with the various embodiments discussed herein. With reference to <FIG>, hardware processing circuitry <NUM> may comprise a first circuitry <NUM>, a second circuitry <NUM>, a third circuitry <NUM>, and/or a fourth circuitry <NUM>.

In a variety of embodiments, first circuitry <NUM> may be operable to process a TRS transmission, and may also be operable to process an SS-block transmission. Second circuitry <NUM> may be operable to measure a reference signal parameter based on the TRS transmission and the SS block transmission. First circuitry <NUM> may be operable to provide information regarding the TRS transmission to second circuitry <NUM> via an interface <NUM>. In various embodiments, hardware processing circuitry <NUM> may comprise an interface for receiving the TRS transmission and the SS block transmission from a receiving circuitry.

In some embodiments, the TRS transmission may be received in the same slot as the SS block transmission. For some embodiments, the reference signal parameter may include an RSRP measurement, a Channel State Information (CSI) measurement, and/or a DM-RS measurement.

In some embodiments, third circuitry <NUM> may be operable to track at least one of a time offset and a frequency offset based on the TRS transmission. First circuitry <NUM> may be operable to provide information regarding TRS transmission to third circuitry <NUM> via an interface <NUM>. For some embodiments, fourth circuitry <NUM> may be operable to generate an RSRP report transmission carrying an indicator of the reference signal parameter.

In some embodiments, the TRS transmission and the SS block transmission may be multiplexed in an FDM manner. For some embodiments, the TRS transmission may span a number K of RBs and/or a number L of OFDM symbols. In some embodiments, at least one of the number K and the number L may be determined by a predetermined value, a value configured by higher-layer signaling, and/or a system bandwidth.

For some embodiments, an RB index of the TRS transmission may be determined by a predetermined value and/or a value configured by higher-layer signaling. In some embodiments, a symbol index of the TRS transmission may be determined by a predetermined value and/or a value configured by higher-layer signaling. For some embodiments, an EPRE ratio between the TRS transmission and at least one of a PSS, a SSS, or a PBCH may be determined by a predetermined value and/or a value configured by higher-layer signaling.

In some embodiments, the TRS transmission and the SS block transmission may be multiplexed in a TDM manner. For some embodiments, the TRS transmission may
be transmitted in one or more OFDM symbols either before or after the SS block
transmission, as determined by a predetermined value and/or a value configured by higher-layer signaling.

In some embodiments, first circuitry <NUM>, second circuitry <NUM>, third circuitry <NUM>, and/or fourth circuitry <NUM> may be implemented as separate circuitries. In other embodiments, first circuitry <NUM>, second circuitry <NUM>, third circuitry <NUM>, and/or fourth circuitry <NUM> may be combined and implemented together in a circuitry without altering the essence of the embodiments.

Hardware processing circuitry <NUM> may comprise various circuitries operable in accordance with the various embodiments discussed herein. With reference to <FIG>, hardware processing circuitry <NUM> may comprise a first circuitry <NUM> and/or a second circuitry <NUM>.

In a variety of embodiments, first circuitry <NUM> may be operable to generate an Uplink (UL) transmission carrying a TRS request. Second circuitry <NUM> may be operable to process a DL transmission based upon the UL transmission, the DL transmission carrying a TRS response. In various embodiments, hardware processing circuitry <NUM> may comprise an interface for sending the UL transmission to a transmission circuitry and/or for receiving the DL from a receiving circuitry.

In some embodiments, the TRS request may be a request for a TRS transmission and/or a request for a TRS reconfiguration transmission. For some
embodiments, the UL transmission may be triggered upon: a determination that no TRS is configured; a determination that a TRS periodicity is above a threshold; a determination that a BLER of a PDSCH falls below a threshold value; a determination that a BLER of a PDCCH falls below a threshold value; a determination that a UE Rx beam has changed; and/or a determination that a DRX duration is above a threshold value. In some
embodiments, the UL transmission may be a PRACH transmission, a PUCCH transmission, a MAC-CE transmission, an RRC transmission, and/or a transmission associated with a beam recovery request.

For some embodiments, the UL transmission may carry one or more QCL indicators corresponding with the TRS response, and the one or more QCL indicators may identify an SS-block with which the TRS response is to be QCLed and/or a CSI-RS with which the TRS response is to be QCLed. In some embodiments, the one or more QCL indicators may be carried implicitly by one or more PRACH time resources, one or more PRACH frequency resources, and/or one or more PRACH preamble resources. For some embodiments, the one or more QCL indicators may be carried explicitly by a PUCCH and/or higher-layer signaling.

In some embodiment, the UL transmission may carry an indicator of suggested reconfigured TRS periodicity, an indicator of TRS transmission during paging cycle, and/or an indicator of TRS transmission during DRX. For some embodiments, the UE may maintain an indicator of a timing window for TRS response. In some embodiments, upon an expiration of the timing window for TRS response, the UE may initiate a retransmission of the TRS request and/or a TRS reconfiguration request.

For some embodiments, the DL transmission may be processed at a slot number n+k, the number n may be a slot for beam indication signaling and/or feedback of beam indication signaling, and the number k may be established by a predetermined value and/or configured by higher-layer signaling. In some embodiments, the DL transmission may be transmitted in an active BWP.

In some embodiments, first circuitry <NUM> and/or second circuitry <NUM> may be implemented as separate circuitries. In other embodiments, first circuitry <NUM> and/or second circuitry <NUM> may be combined and implemented together in a circuitry without altering the essence of the embodiments.

<FIG> illustrates methods for a UE for enabling UE-triggered TRS transmissions, in accordance with some embodiments of the disclosure. <FIG> illustrates methods for a UE for enabling UE-triggered TRS transmissions, in accordance with some embodiments of the disclosure. With reference to <FIG>, methods that may relate to UE <NUM> and hardware processing circuitry <NUM> are discussed herein. Although the actions in method <NUM> of <FIG> and method <NUM> of <FIG> are shown in a particular order, the order of the actions can be modified. Thus, the illustrated embodiments can be performed in a different order, and some actions may be performed in parallel. Some of the actions and/or operations listed in <FIG> and <FIG> are optional in accordance with certain embodiments. The numbering of the actions presented is for the sake of clarity and is not intended to prescribe an order of operations in which the various actions must occur. Additionally, operations from the various flows may be utilized in a variety of combinations.

Moreover, in some embodiments, machine readable storage media may have executable instructions that, when executed, cause UE <NUM> and/or hardware processing circuitry <NUM> to perform an operation comprising the methods of <FIG> and <FIG>. Such machine readable storage media may include any of a variety of storage media, like magnetic storage media (e.g., magnetic tapes or magnetic disks), optical storage media (e.g., optical discs), electronic storage media (e.g., conventional hard disk drives, solid-state disk drives, or flash-memory-based storage media), or any other tangible storage media or non-transitory storage media.

In some embodiments, an apparatus may comprise means for performing various actions and/or operations of the methods of <FIG> and <FIG>.

Returning to <FIG>, various methods may be in accordance with the various embodiments discussed herein. A method <NUM> may comprise a processing <NUM>, a processing <NUM>, and a measuring <NUM>. Method <NUM> may also comprise a tracking <NUM> and/or a generating <NUM>.

In processing <NUM>, a TRS transmission may be processed. In processing <NUM>, an SS-block transmission may be processed. In measuring <NUM>, a reference signal parameter may be measured based on the TRS transmission and the SS-block transmission.

In some embodiments, the TRS transmission may be received in the same slot as the SS block transmission. For some embodiments, the reference signal parameter may include an RSRP measurement, a CSI measurement, and/or a DM-RS measurement.

In tracking <NUM>, at least one of a time offset and a frequency offset based on the TRS transmission may be tracked. In generating <NUM>, an RSRP report transmission carrying an indicator of the reference signal parameter may be generated.

In some embodiments, the TRS transmission and the SS block transmission may be multiplexed in a TDM manner. For some embodiments, the TRS transmission may be transmitted in one or more OFDM symbols either before or after the SS block
transmission, as determined by a predetermined value and/or a value configured by higher-layer signaling.

Returning to <FIG>, various methods may be in accordance with the various embodiments discussed herein. A method <NUM> may comprise a generating <NUM> and a processing <NUM>. In generating <NUM>, a UL transmission carrying a TRS request may be generated. In processing <NUM>, a DL transmission based upon the UL transmission may be processed, the DL transmission carrying a TRS response.

In some embodiments, the TRS request may be a request for a TRS transmission and/or a request for a TRS reconfiguration transmission. For some
embodiments, the UL transmission may be triggered upon: a determination that no TRS is configured; a determination that a TRS periodicity is above a threshold; a determination that a BLER of a PDSCH falls below a threshold value; a determination that a BLER of a PDCCH falls below a threshold value; a determination that a UE Rx beam has changed; and/or a determination that a DRX duration is above a threshold value. In some
embodiments, the UL transmission may be a PRACH transmission, a PUCCH transmission, a
MAC-CE transmission, an RRC transmission, and/or a transmission associated with a beam recovery request.

<FIG> illustrates example components of a device, in accordance with some embodiments of the disclosure. In some embodiments, the device <NUM> may include application circuitry <NUM>, baseband circuitry <NUM>, Radio Frequency (RF) circuitry <NUM>, front-end module (FEM) circuitry <NUM>, one or more antennas <NUM>, and power management circuitry (PMC) <NUM> coupled together at least as shown. The components of the illustrated device <NUM> may be included in a UE or a RAN node. In some embodiments, the device <NUM> may include less elements (e.g., a RAN node may not utilize application circuitry <NUM>, and instead include a processor/controller to process IP data received from an EPC). In some embodiments, the device <NUM> may include additional elements such as, for example, memory/storage, display, camera, sensor, or input/output (I/O) interface. In other embodiments, the components described below may be included in more than one device (e.g., said circuitries may be separately included in more than one device for Cloud-RAN (C-RAN) implementations).

The processor(s) may include any combination of general-purpose processors and dedicated processors (e.g., graphics processors, application processors, and so on).

The baseband circuitry <NUM> may include one or more baseband processors or control logic to process baseband signals received from a receive signal path of the RF circuitry <NUM> and to generate baseband signals for a transmit signal path of the RF circuitry <NUM>. Baseband processing circuity <NUM> may interface with the application circuitry <NUM> for generation and processing of the baseband signals and for controlling operations of the RF circuitry <NUM>. For example, in some embodiments, the baseband circuitry <NUM> may include a third generation (<NUM>) baseband processor 1504A, a fourth generation (<NUM>) baseband processor 1504B, a fifth generation (<NUM>) baseband processor 1504C, or other baseband processor(s) 1504D for other existing generations, generations in development or to be developed in the future (e.g., second generation (<NUM>), sixth generation (<NUM>), and so on). The baseband circuitry <NUM> (e.g., one or more of baseband processors 1504A-D) may handle various radio control functions that enable communication with one or more radio networks via the RF circuitry <NUM>. In other embodiments, some or all of the functionality of baseband processors 1504A-D may be included in modules stored in the memory <NUM> and executed via a Central Processing Unit (CPU) 1504E. The radio control functions may include, but are not limited to, signal modulation/demodulation,.

In some embodiments, the baseband circuitry <NUM> may include one or more audio digital signal processor(s) (DSP) 1504F. The audio DSP(s) 1504F may include elements for compression/decompression and echo cancellation and may include other suitable processing elements in other embodiments. Components of the baseband circuitry may be suitably combined in a single chip, a single chipset, or disposed on a same circuit board in some embodiments. In some embodiments, some or all of the constituent components of the baseband circuitry <NUM> and the application circuitry <NUM> may be implemented together such as, for example, on a system on a chip (SOC).

In various embodiments, the RF circuitry <NUM> may include switches, filters, amplifiers, and so on to facilitate the communication with the wireless network.

In some embodiments, the receive signal path of the RF circuitry <NUM> may include mixer circuitry 1506A, amplifier circuitry 1506B and filter circuitry 1506C. In some embodiments, the transmit signal path of the RF circuitry <NUM> may include filter circuitry 1506C and mixer circuitry 1506A. RF circuitry <NUM> may also include synthesizer circuitry 1506D for synthesizing a frequency for use by the mixer circuitry 1506A of the receive signal path and the transmit signal path. In some embodiments, the mixer circuitry 1506A of the receive signal path may be configured to down-convert RF signals received from the FEM circuitry <NUM> based on the synthesized frequency provided by synthesizer circuitry 1506D. The amplifier circuitry 1506B may be configured to amplify the down-converted signals and the filter circuitry 1506C may be a low-pass filter (LPF) or band-pass filter (BPF) configured to remove unwanted signals from the down-converted signals to generate output baseband signals. Output baseband signals may be provided to the baseband circuitry <NUM> for further processing. In some embodiments, the output baseband signals may be zero-frequency baseband signals, although this is not a requirement. In some embodiments, mixer circuitry 1506A of the receive signal path may comprise passive mixers, although the scope of the embodiments is not limited in this respect.

In some embodiments, the mixer circuitry 1506A of the transmit signal path may be configured to up-convert input baseband signals based on the synthesized frequency provided by the synthesizer circuitry 1506D to generate RF output signals for the FEM circuitry <NUM>. The baseband signals may be provided by the baseband circuitry <NUM> and may be filtered by filter circuitry 1506C.

In some embodiments, the mixer circuitry 1506A of the receive signal path and the mixer circuitry 1506A of the transmit signal path may include two or more mixers and may be arranged for quadrature downconversion and upconversion, respectively. In some embodiments, the mixer circuitry 1506A of the receive signal path and the mixer circuitry 1506A of the transmit signal path may include two or more mixers and may be arranged for image rejection (e.g., Hartley image rejection). In some embodiments, the mixer circuitry 1506A of the receive signal path and the mixer circuitry 1506A may be arranged for direct downconversion and direct upconversion, respectively. In some embodiments, the mixer circuitry 1506A of the receive signal path and the mixer circuitry 1506A of the transmit signal path may be configured for super-heterodyne operation.

In some embodiments, the synthesizer circuitry 1506D may be a fractional-N synthesizer or a fractional N/N+I synthesizer, although the scope of the embodiments is not limited in this respect as other types of frequency synthesizers may be suitable. For example, synthesizer circuitry 1506D may be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer comprising a phase-locked loop with a frequency divider.

The synthesizer circuitry 1506D may be configured to synthesize an output frequency for use by the mixer circuitry 1506A of the RF circuitry <NUM> based on a frequency input and a divider control input. In some embodiments, the synthesizer circuitry 1506D may be a fractional N/N+I synthesizer.

Synthesizer circuitry 1506D of the RF circuitry <NUM> may include a divider, a delay-locked loop (DLL), a multiplexer and a phase accumulator. In some embodiments, the divider may be a dual modulus divider (DMD) and the phase accumulator may be a digital phase accumulator (DP A). In some embodiments, the DMD may be configured to divide the input signal by either N or N+I (e.g., based on a carry out) to provide a fractional division ratio. In some example embodiments, the DLL may include a set of cascaded, tunable, delay elements, a phase detector, a charge pump and a D-type flip-flop. In these embodiments, the delay elements may be configured to break a VCO period up into Nd equal packets of phase, where Nd is the number of delay elements in the delay line. In this way, the DLL provides negative feedback to help ensure that the total delay through the delay line is one VCO cycle.

In some embodiments, synthesizer circuitry 1506D may be configured to generate a carrier frequency as the output frequency, while in other embodiments, the output frequency may be a multiple of the carrier frequency (e.g., twice the carrier frequency, four times the carrier frequency) and used in conjunction with quadrature generator and divider circuitry to generate multiple signals at the carrier frequency with multiple different phases with respect to each other. In some embodiments, the output frequency may be a LO frequency (fLO). In some embodiments, the RF circuitry <NUM> may include an IQ/polar converter.

While <FIG> shows the PMC <NUM> coupled only with the baseband circuitry <NUM>. However, in other embodiments, the PMC <NUM> may be additionally or alternatively coupled with, and perform similar power management operations for, other components such as, but not limited to, application circuitry <NUM>, RF circuitry <NUM>, or FEM <NUM>.

If there is no data traffic activity for an extended period of time, then the device <NUM> may transition off to an RRC_Idle state, where it disconnects from the network and does not perform operations such as channel quality feedback, handover, and so on. The device <NUM> goes into a very low power state and it performs paging where again it
periodically wakes up to listen to the network and then powers down again. The device <NUM> may not receive data in this state, in order to receive data, it must transition back to
RRC_Connected state.

<FIG> illustrates example interfaces of baseband circuitry, in accordance with some embodiments of the disclosure. As discussed above, the baseband circuitry <NUM> of <FIG> may comprise processors 1504A-1504E and a memory <NUM> utilized by said processors. Each of the processors 1504A-1504E may include a memory interface, 1604A-1604E, respectively, to send/receive data to/from the memory <NUM>.

The baseband circuitry <NUM> may further include one or more interfaces to communicatively couple to other circuitries/devices, such as a memory interface <NUM> (e.g., an interface to send/receive data to/from memory external to the baseband circuitry <NUM>), an application circuitry interface <NUM> (e.g., an interface to send/receive data to/from the application circuitry <NUM> of <FIG>), an RF circuitry interface <NUM> (e.g., an interface to send/receive data to/from RF circuitry <NUM> of <FIG>), a wireless hardware connectivity interface <NUM> (e.g., an interface to send/receive data to/from Near Field Communication (NFC) components, Bluetooth® components (e.g., Bluetooth® Low Energy), Wi-Fi®
components, and other communication components), and a power management interface <NUM> (e.g., an interface to send/receive power or control signals to/from the PMC <NUM>.

It is pointed out that elements of any of the Figures herein having reference numbers and/or names that correspond with reference numbers and/or names of any other Figure herein may, in various embodiments, operate or function in a manner similar to those corresponding elements of the other Figure (without being limited to operating or functioning in such a manner).

While the disclosure has been described in conjunction with specific embodiments thereof, many alternatives, modifications and variations of such embodiments will be apparent to those of ordinary skill in the art in light of the foregoing description. For example, other memory architectures e.g., Dynamic RAM (DRAM) may use the
embodiments discussed. The embodiments of the disclosure are intended to embrace all such alternatives, modifications, and variations as to fall within the broad scope of the appended claims.

Claim 1:
A base station comprising:
a transceiver configured to enable communication with a user equipment, UE, in a wireless network; and
one or more processors communicatively coupled to the transceiver and configured to:
receive an uplink, UL, transmission from the UE carrying a tracking reference signal, TRS, request to trigger a TRS transmission from the base station; and
generate, based upon the TRS request, a downlink, DL, transmission, wherein the DL transmission carries the TRS transmission (<NUM>) and a Synchronization Signal block, SS-block, transmission (<NUM>) within a slot, wherein the TRS transmission is allocated to one or more subcarriers in a symbol within the slot and outside resource blocks used for the SS-block transmission in the same symbol in which the TRS transmission is allocated to, and wherein the one or more subcarriers for the TRS transmission are adjacent to one or more subcarriers for the SS-block transmission.