Patent Description:
Another approach involves measuring the threshold voltage of a MOSFET device during application and which is based on the measurement of the miller plateau voltage. However, this method requires the measurement of the gate waveform signal, which in turn requires complex electronics and/or computations. Furthermore, the calibration of this method is difficult, as it requires a long-lasting reference measurement for each application condition.

In many applications, such as solar or automotive inverters, the MOSFET devices are operated with a high frequency gate signal (e.g., up to <NUM>). In case the voltage levels of the AC gate signal are of different polarity, a degradation mechanism is triggered that leads to an increase of the threshold voltage which also is difficult to measure. The document <CIT> discloses a semiconductor device according to the state of the art.

Thus, there is a need for an improved device degradation measuring technique.

According to an embodiment, a semiconductor device as disclosed in claim <NUM> is provided.

According to an embodiment, a method of monitoring a semiconductor device according to the method of claim <NUM> is provided.

The features of the various illustrated embodiments can be combined unless they exclude each other. Embodiments are depicted in the drawings and are detailed in the description which follows.

Described herein are an optical device degradation sensor for semiconductor devices, related methods of monitoring and characterizing semiconductor devices using the optical device degradation sensor, and a related test apparatus. The optical device degradation sensor measures photonic emission intensity from a semiconductor device such as a SiC MOSFET. The magnitude of the threshold voltage drift for the semiconductor device may be determined based on the emission intensity detected by the optical device degradation sensor. The device may be characterized by analyzing the spectrum of the emitted light.

Described next, with reference to the figures, are exemplary embodiments of the optical device degradation sensor, related methods of monitoring and characterizing semiconductor devices using the optical device degradation sensor, and a related test apparatus.

<FIG> illustrates an embodiment of a semiconductor device that includes a semiconductor body <NUM> and an electrical device <NUM> formed in an active region <NUM> of the semiconductor body <NUM>. The active region <NUM> includes an interface between the semiconductor body <NUM> and an insulating material. The interface and insulating material are not shown in <FIG> for ease of illustration.

The electrical device <NUM> formed in the active region <NUM> of the semiconductor body <NUM> may be an active or passive device. For example, the electrical device <NUM> may be a Si, GaN or SiC MOSFET where the interface between the semiconductor body <NUM> and the insulating material is a channel interface. In another example, the electrical device <NUM> may be a capacitor where the interface is a semiconductor-oxide interface. Still other types of electrical devices <NUM> may be formed in the active region <NUM> of the semiconductor body <NUM>.

The semiconductor device also includes an optical device degradation sensor <NUM>. The sensor <NUM> is a photodetector (photosensor) configured to sense light or other electromagnetic radiation emitted by the electrical device <NUM>. For example, the sensor <NUM> may be a photodiode, an avalanche photodiode, a silicon photo multiplier, etc..

In each case, the sensor <NUM> has a bandwidth tuned to at least part of an energy spectrum of light emitted by carrier recombination at the interface between the semiconductor body <NUM> and the insulating material when the electrical device <NUM> is driven between accumulation and inversion. That is, the sensor <NUM> has a certain output intensity based on wavelength. The bandwidth at which the sensor <NUM> is sensitive covers a spectrum of interest.

The energy band diagram between the semiconductor body <NUM> and the insulating material includes a barrier for one carrier type (e.g., holes) and an accumulation well for the opposite carrier type (e.g., electrons). During accumulation, no conduction channel is formed. During inversion, the conductivity type of the semiconductor body <NUM> inverts at the interface with the insulating material (e.g., from p-type to n-type) to form a conduction channel.

The intensity of the light emitted by carrier recombination at the interface between the semiconductor body <NUM> and the insulating material when the electrical device <NUM> is driven between accumulation and inversion is proportional to a density of charge trapping states <NUM> that take part in the carrier recombination at the interface of interest. The intensity of light generally means I = E*N/ (t*A) where E is energy, N is the number of photons per measurement time (t) and area (A). The sensed light intensity is approximated by the sensor <NUM> being tuned to a specific wavelength or wavelength range.

The term 'charge trapping state' as used herein refers to any type of charge trapping state at the interface of interest which leads to emission of a photon. The sensor <NUM> outputs a signal that is proportional to the intensity of the sensed light. The term 'proportional' as used herein means corresponding in size, degree, or intensity. Accordingly, the sensor output may be linearly or non-linearly proportional to the intensity of the sensed light.

For example, when a SiC MOSFET is driven between accumulation and inversion, the defect-assisted recombination of electrons ('-') and holes ('+') at the interface between SiC and the gate dielectric insulating material (e.g., SiO<NUM>) leads to the emission of photons, e.g., as shown in <FIG>. The resulting light emission for such defect-assisted recombination is in the visible and NIR (near infrared) range of <NUM> to <NUM> for SiC. <FIG> shows which materials are transparent with respect to the light emission and which materials are opaque with respect to the light emission. The sensor <NUM> may be used with still other types of semiconductor materials, such as but not limited to Si or GaN.

As shown in <FIG>, the carrier recombination that occurs at the interface of interest (e.g., channel interface) when the electrical device <NUM> is driven between accumulation and inversion. <FIG> shows inversion, where the driving signal is at a high voltage level Vhigh which is above both the flat band voltage VFB and the threshold voltage VTH of the electrical device <NUM>. During inversion, electrons ('-') in the conduction band recombine with corresponding holes ('+') associated with charge trapping states <NUM> at the interface of interest. <FIG> shows accumulation, where the driving signal is at a low voltage level Vlow which is below both the flat band voltage VFB and threshold voltage VTH of the electrical device <NUM>. During accumulation, holes ('+') in the valence band recombine with corresponding electrons ('-') associated with charge trapping states <NUM> at the interface of interest.

In general, the intensity and spectrum of the emitted photons reflect the properties of the interface defects. Device degradation may influence the intensity of photon emission at a certain wavelength. Accordingly, the emission intensity measured by the sensor <NUM> reflects the intensity over a certain wavelength range and may be used to determine changes of the interface properties and thus of the device reliability.

The emission intensity decreases with increasing stress time of an applied bipolar AC gate voltage, which may be related both to the change of charge carrier density in the channel or to a change of the defect-assisted recombination itself. Conversely for a DC stress signal, the emission intensity increases. In either case (AC or DC), emission intensity correlates with threshold voltage shift, making it suitable for in situ threshold voltage monitoring by the sensor <NUM> during device operation.

The sensor <NUM> may be monolithically integrated with the electrical device <NUM> in the same semiconductor body <NUM> or may be provided on a separate die (chip). For example, the sensor <NUM> may be placed where there is a direct optical path through the semiconductor body <NUM> to the interface of interest. The direct optical path in the semiconductor body <NUM> optically couples the sensor <NUM> to the interface of interest for at least part of the energy spectrum of the light emitted by carrier recombination at the interface when the electrical device <NUM> is driven between accumulation and inversion.

For example, SiC has a band gap of approximately <NUM> eV. Most light below this energy would not be absorbed. An SiO<NUM> gate oxide also would not absorb the light emission as SiO<NUM> has an even larger band gap about <NUM> eV. Accordingly, the sensor <NUM> may be placed at the edge <NUM> of the semiconductor body <NUM> where the material in the optical pathway between the electrical device <NUM> and sensor <NUM> is transparent for the light emitted by the electrical device <NUM>.

In one embodiment, the emission energy of the light may be in a range of <NUM> to <NUM> eV and the edge <NUM> of the semiconductor body <NUM> may include only SiC and/or SiO<NUM> since the bandgap of SiC (<NUM> eV) and SiO<NUM> (<NUM> eV) are above the energy of the emitted light. In this case, the emitted light will pass relatively unobstructed to the sensor <NUM> as shown in <FIG>, where the sensor <NUM> has a bandwidth (Egap1) tuned to the bandgap (Egap2) of the semiconductor body <NUM>. For example, the bandwidth of the sensor <NUM> may be in a range of <NUM> to <NUM> eV for a photon <NUM> having a light emission energy range (Ephoton) of <NUM> to <NUM> eV. In this case, the sensor <NUM> efficiently converts impinging photons <NUM> into an electrical current. The magnitude of the electrical current output by the sensor <NUM> corresponds to the intensity of the emitted light detected by the sensor <NUM>. The bandwidth of the sensor <NUM> may be tailored to a subrange of the energy spectrum of the light emitted by carrier recombination at the interface when the electrical device <NUM> is driven between accumulation and inversion, the subrange of the energy spectrum being most closely correlated to the density of charge trapping states at the interface.

Other placement configurations for the sensor <NUM> are contemplated. For example, the semiconductor body <NUM> that includes the electrical device <NUM> may provide waveguiding and the sensor <NUM> may be monolithically integrated with the electrical device <NUM> in the same semiconductor body <NUM>. This may involve placing the sensor <NUM> in close proximity to the semiconductor-insulator interface where the light emission occurs and without an intervening light absorbing layer such as metallization in between. In the case of a SiC MOSFET, and to capture most of the emitted light, the sensor <NUM> may be formed in a trench where the semiconductor-insulator channel interface is on both sides, e.g., <NUM> to <NUM> away. In another example, the sensor <NUM> may be placed in an edge of the semiconductor body <NUM> where the sensor <NUM> is still close enough to the emitted light. In still another option, the sensor <NUM> may be placed outside the chip that includes the electrical device, with an opening in the chip metallization (e.g., drain metal for bottom side observation or source metal for top side observation) so as to not obstruct the emitted light from reaching the sensor <NUM>.

Independent of the chip design (e.g., trench or planar), photoemissions reach the sensor <NUM> without being absorbed. The higher refractive index of the semiconductor body <NUM> should further enhance the amount of detected signal by wave guiding effects, where the spectrum of the emission is typically between <NUM> and <NUM>. Various sensor placement embodiments are described next in more detail.

<FIG> illustrates a top plan view of a SiC device <NUM>. The SiC device <NUM> includes a SiC substrate <NUM> and a plurality of transistor cells 'TC' formed in the SiC substrate <NUM>. The transistor cells TC are electrically connected in parallel to form a SiC power transistor device. The transistor cells TC include trenches <NUM> formed in the SiC substrate <NUM>. Each trench <NUM> includes a gate electrode <NUM> separated from the surrounding SiC substrate <NUM> by a gate dielectric <NUM> such as SiO<NUM>. An enlarged cross-sectional view of one trench <NUM> is shown in <FIG>.

A gate pad <NUM> above the SiC substrate <NUM> provides a point of contact for the gate potential, and a gate runner <NUM> extending from the gate pad <NUM> provides electrical contact through vias (not visible) to the gate electrodes <NUM> disposed in the trenches <NUM>. A source pad <NUM> above the SiC substrate <NUM> similarly provides a point of contact for the source potential which is provided by vias (not visible) to the source regions <NUM> and body regions <NUM> of the transistor cells TC. The drain contact is provided at the backside of the SiC substrate <NUM> which is out of view in <FIG>.

According to the embodiment illustrated in <FIG>, carrier recombination occurs at the channel interface <NUM> between the SiC substrate <NUM> and the gate dielectric <NUM> of the transistor cells TC when the power transistor device is driven between accumulation and inversion. A change in magnitude of the signal output by the sensor <NUM> is proportional to a threshold voltage drift of the power transistor device. Also, the sensor <NUM> is monolithically integrated in the same SiC substrate <NUM> as the power transistor device formed by the parallel-connected transistor cells TC.

Placement options for the sensor <NUM> are labelled '<NUM>' through '<NUM>' in <FIG>. For location '<NUM>', the sensor <NUM> is disposed under the gate pad <NUM>. For location '<NUM>', the sensor <NUM> is formed in an edge termination region <NUM> of the SiC substrate <NUM> that laterally surrounds the active region <NUM> that includes the transistor cells TC. The edge termination region <NUM> is devoid of any fully functional cells of the power transistor device. That is, the edge termination region <NUM> does not contain active transistor cells. For location '<NUM>', the sensor <NUM> is disposed adjacent the gate runner <NUM> extending from the gate pad <NUM>. For location '<NUM>', the sensor <NUM> is formed in the active region <NUM> of the SiC substrate <NUM>.

<FIG> illustrates a first cross-sectional view of an embodiment of the sensor <NUM> and <FIG> illustrates a second cross-sectional view of an embodiment of the sensor <NUM>. The sensor <NUM> is disposed in a trench <NUM> formed in the SiC substrate <NUM>. The cross-section in <FIG> is taken across the width of the trench <NUM> whereas the cross-section in <FIG> is taken along the length of the trench <NUM>, in an end region of the trench <NUM>.

According to the embodiment illustrated in <FIG>, the sensor <NUM> is a photodiode, an avalanche photodiode or a silicon photo multiplier comprising a semiconductor material of a first conductivity type (e.g., p-type) <NUM> disposed in a lower part of the trench <NUM> and a semiconductor material of a second conductivity type opposite the first conductivity type (e.g., n-type) <NUM> disposed on the semiconductor material of the first conductivity type <NUM> in an upper part of the trench <NUM> to form a photosensor. Photons entering the pn-junction formed between the semiconductor regions <NUM>, <NUM> induce a photo-effect. That is, electron-hole pairs are created and separated which in turn creates a current, e.g., as shown in <FIG>. The semiconductor regions <NUM>, <NUM> of opposite conductivity type that form the sensor <NUM> are separated from the surrounding SiC substrate <NUM> by a dielectric material <NUM> such as SiO<NUM>.

A contact structure <NUM> may be provided at the end of the trench <NUM>, as shown in <FIG>. The semiconductor material of the first conductivity type <NUM> disposed in the lower part of the trench <NUM> extends up to the front surface <NUM> of the SiC substrate <NUM> in the end region of the trench <NUM>. A first contact <NUM> provides a point of electrical contact to the semiconductor material of the first conductivity type <NUM> and a second contact <NUM> provides a point of electrical contact to the semiconductor material of the second conductivity type <NUM>, to access the electrical signal output by the sensor <NUM>. The contact structure <NUM> instead may be provided at a different part of the trench <NUM>, e.g., in a center part along the length of the trench <NUM>.

<FIG> illustrates a cross-sectional view of another embodiment of the sensor <NUM>. The embodiment shown in <FIG> is similar to the embodiment shown in <FIG>. Different, however, the semiconductor material of the first conductivity type <NUM> is formed as a first layer <NUM> that lines the sidewalls <NUM> and the bottom <NUM> of the trench <NUM> with the dielectric material <NUM> interposed therebetween. The first layer <NUM> extends up to the front surface <NUM> of the SiC substrate <NUM> along the entire length of the trench <NUM> instead of only in the end region of the trench <NUM>. Accordingly, both semiconductor regions <NUM>, <NUM> that form the sensor <NUM> are accessible for contacting along the entire length of the trench <NUM>. The semiconductor material of the second conductivity type <NUM> is formed as a second layer <NUM> over the first layer <NUM>.

<FIG> illustrate embodiments according to which the sensor <NUM> is monolithically integrated with the monolithically integrated with the electrical device <NUM>. <FIG> illustrate embodiments according to which the sensor <NUM> is included in a different die (chip) than the electrical device <NUM>.

In <FIG>, the electrical device <NUM> optically monitored by the sensor <NUM> is included in a first semiconductor die <NUM> and the sensor <NUM> is included in a second semiconductor die <NUM>. For example, the first semiconductor die <NUM> may be a SiC die, the electrical device <NUM> may be a vertical SiC power MOSFET, the second semiconductor die <NUM> may be a Si die, and the sensor <NUM> may be a Si photodetector.

The first semiconductor die <NUM> and the second semiconductor die <NUM> are arranged one on the other in a stacked arrangement. The light <NUM> emitted by carrier recombination at the interface of interest (e.g., channel interface) when the electrical device <NUM> is driven between accumulation and inversion propagates through a main surface <NUM> of the first semiconductor die <NUM> that faces the second semiconductor die <NUM> and into a main surface <NUM> of the second semiconductor die <NUM> that faces the first semiconductor die <NUM>. In one embodiment, the main surface <NUM> of the first semiconductor die from which the light <NUM> is emitted is a source-side of the first semiconductor die <NUM>. Accordingly, the source electrode and gate electrode (not shown) may be patterned to include one or more openings which allow the light <NUM> to pass unblocked to the second semiconductor die <NUM>. The source electrode and gate electrodes are typically patterned, so only a modification of the patterning is needed to not block the emitted light <NUM>.

<FIG>, like <FIG>, illustrate an embodiment according to which the separate dies are arranged one on the other in a stacked arrangement. <FIG> shows a side perspective view of the stacked arrangement whereas <FIG> shows a bottom plan view of the stacked arrangement. The embodiment shown in <FIG> is similar to the embodiment shown in <FIG>. Different, however, the first semiconductor die <NUM> with the vertical SiC power MOSFET <NUM> is stacked on the second semiconductor die <NUM> with the Si photodetector <NUM>. According to this embodiment, the gate electrode <NUM> and the source electrode <NUM> for the vertical SiC power MOSFET are disposed at a first main surface <NUM> of the first semiconductor die <NUM>, a drain electrode <NUM> for the vertical SiC power MOSFET <NUM> is disposed at a second main surface <NUM> of the first semiconductor die <NUM> opposite the first main surface <NUM>, the second main surface <NUM> of the first semiconductor die <NUM> faces the second semiconductor die <NUM>, and the drain electrode <NUM> has an opening <NUM> to permit the light <NUM> emitted by carrier recombination at the interface of interest when the vertical SiC power MOSFET <NUM> is driven between accumulation and inversion to propagate into the main surface <NUM> of the second semiconductor die <NUM> that faces the first semiconductor die <NUM>. <FIG> shows an embodiment of the opening <NUM> in the drain electrode <NUM> for the vertical SiC power MOSFET <NUM>.

In <FIG>, the first semiconductor die <NUM> and the second semiconductor die <NUM> are arranged side-by-side, i.e., edge-to-edge. The light <NUM> emitted by carrier recombination at the interface of interest when the electrical device <NUM> is driven between accumulation and inversion propagates through an edge <NUM> of the first semiconductor die <NUM> that faces the second semiconductor die <NUM> and into an edge <NUM> of the second semiconductor die <NUM> that faces the first semiconductor die <NUM>. The dies <NUM>, <NUM> instead may be arranged at a <NUM> degree angle with respect to one another, so that the light <NUM> propagates from the edge <NUM> of the first die <NUM> into the front main sensing side <NUM> of the second die <NUM>.

<FIG> illustrates an embodiment of an amplification circuit <NUM> and a condition monitoring circuit <NUM> that may be used in conjunction with the sensor <NUM>. The sensor <NUM> is illustrated schematically as a photodiode having a bias voltage Vbias in <FIG>. However, as explained herein, the sensor <NUM> may be any type of photodetector (photosensor) configured to sense light or other electromagnetic radiation emitted by the electrical device <NUM>. The amplification circuit <NUM> and/or the condition monitoring circuit <NUM> may or may not be monolithically integrated with either the electrical device <NUM> and/or the sensor <NUM>.

If the sensor <NUM> is monolithically integrated with the electrical device <NUM>, the signal 'sen_out' output by the sensor <NUM> must be strong enough to measure without amplification and a separate pin <NUM> is provided for reading out the sensor current. For example, the sensor may be monolithically integrated in the same semiconductor body as the electrical device <NUM> in a first semiconductor die and the amplification circuit may be disposed in a second semiconductor die. In this case, the first semiconductor die includes a pin <NUM> electrically coupled to the sensor <NUM>, the pin <NUM> of the first semiconductor die is electrically coupled to a corresponding pin <NUM> of the second semiconductor die, and the pin <NUM> of the second semiconductor die is electrically coupled to an input ('-') of the amplification circuit <NUM>. In general, the sensor <NUM> and amplification circuit <NUM> may be integrated in same die or disposed in separate dies. In either case, the package has at least one additional pin <NUM> for reading out the amplifier output 'Vmeasure'.

The amplification circuit <NUM> amplifies the signal sen_out output by the sensor <NUM>. In one embodiment, the amplification circuit <NUM> includes a transimpedance amplifier implemented with an operational amplifier (opamp) <NUM> having a differential input '-, +' and a single-ended output Vmeasure. The transimpedance amplifier is shown implemented as an inverting transimpedance amplifier used with the photodiode <NUM> operating in the photoconductive mode. A positive voltage Vbias at the cathode of the photodiode applies a reverse bias. The reverse bias increases the width of the depletion region and lowers the junction capacitance, improving high-frequency performance. The operational amplifier <NUM> determines the transimpedance amplification. The operational amplifier <NUM> may be treated as an ideal opamp. Accordingly, the open-loop gain of the operational amplifier <NUM> may be considered infinite. The DC-amplification, that is conversion of input-current lin into Vmeasure, is given by R where Vmeasure = lin * R. Resistor R and capacitor C determine the integrative behavior of the amplification circuit <NUM>.

The condition monitoring circuit <NUM> may be included in the same or different die as the amplification circuit <NUM>. If the condition monitoring circuit <NUM> is included in a different die than the amplification circuit <NUM>, the die that includes the condition monitoring circuit <NUM> has a pin <NUM> electrically coupled to the output Vmeasure of the amplification circuit <NUM>.

The condition monitoring circuit <NUM> may be implemented as part of a smart gate driver, controller, etc. for monitoring the amplifier output Vmeasure. In one embodiment, the condition monitoring circuit <NUM> compares the output Vmeasure of the amplification circuit <NUM> to a threshold and may take some action if the threshold is crossed. For example, if the output Vmeasure of the amplification circuit <NUM> crosses the threshold, the condition monitoring circuit disables the electrical device <NUM> or adjusts a gate voltage for the electrical device <NUM> to maintain a gate overdrive at a constant value. As previously explained herein, light emission intensity decreases with increasing stress time of an applied AC signal and conversely increases for an applied DC signal. Accordingly, Vmeasure may 'cross' the threshold by either exceeding the threshold or falling below the threshold, depending on the type (AC or DC) of applied signal.

<FIG> and <FIG> illustrate an embodiment of a test apparatus for monitoring and characterizing a package semiconductor device <NUM> that includes an electrical device formed in an active region of a semiconductor body with the active region having an interface between the semiconductor body and an insulating material. <FIG> shows loading of the semiconductor device <NUM> into the test apparatus, and <FIG> shows the test apparatus during use. The semiconductor device <NUM> is a molded semiconductor device in <FIG> and <FIG>. However, other types of packaged semiconductor devices <NUM> may be tested by the test apparatus illustrated in <FIG> and <FIG>.

The test apparatus includes a mechanical interface <NUM> configured to receive the packaged semiconductor device <NUM>. For example, the mechanical interface <NUM> may include a base <NUM> and a cover <NUM> placed over the base <NUM> with the package semiconductor device <NUM> sandwiched between. The cover <NUM> has a window <NUM> such as a quartz window that is transparent to the light emitted by the electrical device included in the packaged semiconductor device <NUM> when driven between accumulation and inversion.

The test apparatus also includes an electrical interface <NUM> such as a multi-pin contact plug and cables for electrically connecting to the packaged semiconductor device <NUM> and which enables driving of the electrical device included in the packaged semiconductor device <NUM> between accumulation and inversion. As shown in <FIG>, the packaged semiconductor device <NUM> may include <NUM> or more pins <NUM>, depending on the type of device <NUM>. In general, the electrical interface <NUM> of the test apparatus is compatible with the pin-out or terminal configuration of the packaged semiconductor device <NUM>. The test apparatus may also include heating and temperature sensor cables <NUM> that are connected to a controller such as a PID (proportional-integral-derivative) controller, for heating the packaged semiconductor device <NUM> during testing and sensing the temperature inside the mechanical interface <NUM>. Fasteners <NUM> such as screws and stoppers <NUM> may be used to fix the packaged semiconductor device <NUM> in place during testing.

During testing of a power semiconductor device <NUM> such as a SiC MOSFET, the drain and source of the SiC MOSFET may be grounded and only the gate is switched via the electrical interface <NUM> of the test apparatus. Under these conditions, no voltage is applied to the body diode of the SiC MOSFET so there is no current. Light emission happens whenever the SiC MOSFET is driven between accumulation and inversion, as previously explained herein. SiC MOSFETs are typically turned off with negative gate voltage below the flat band voltage VFB. Hence, normal switching control of a SiC MOSFET brings about the light emission condition.

The test apparatus also includes a spectrometer device <NUM> for measuring an energy spectrum of light emitted by carrier recombination at the interface of the electrical device included in the packaged semiconductor device <NUM> when the electrical device is driven between accumulation and inversion. One or more components such as a lens <NUM> like an achromatic objective lens and a reflective collimator <NUM> guide the emitted light to the spectrometer device <NUM>.

As shown in <FIG>, the carrier recombination that occurs at the interface of interest (e.g., channel interface) within the packaged semiconductor device <NUM> when the electrical device included in the semiconductor device <NUM> is driven between accumulation and inversion. <FIG> shows inversion, where the driving signal is at a high voltage level Vhigh which is above both the flat band voltage VFB and the threshold voltage VTH of the electrical device included in the semiconductor device <NUM>. During inversion, electrons ('-') in the conduction band recombine with corresponding holes ('+') associated with charge trapping states <NUM> at the interface <NUM> of interest. <FIG> shows accumulation, where the driving signal is at a low voltage level Vlow which is below both the flat band voltage VFB and threshold voltage VTH of the electrical device included in the semiconductor device <NUM>. During accumulation, holes ('+') in the valence band recombine with corresponding electrons ('-') associated with charge trapping states <NUM> at the interface <NUM> of interest.

<FIG> shows the time dependence of the emitted light signal 'SiPM' as a function of the gate signal applied to the packaged semiconductor device <NUM>. In the case of a SiC MOSFET, the packaged semiconductor device <NUM> may be turned off with a negative gate voltage as shown in <FIG>. Hence, normal switching control of a SiC MOSFET brings about the light emission condition.

By driving the electrical device between accumulation and inversion, the intensity of the emitted light is proportional to the density of charge trapping states at the interface of <NUM> where the energy of each emitted photon Ephoton is given by: <MAT> where h is Planck's constant, c is the speed of light in vacuum and λ is the wavelength of the emitted photon.

The spectrum of emitted light contains information about charge trapping defects at the interface of <NUM> of interest. By measuring and characterizing the intensity and energy spectrum of the emitted light, information can be learned about the interface <NUM> (e.g., a SiC-oxide interface). For example, the intensity of the emitted light is proportional to the defect density. Over time, the number of interface charge trapping states is expected to increase for a DC stress signal or decrease for an AC stress signal, which in either case can be observed as a change of the light intensity. If the device degrades during operation and the threshold voltage VTH increases, so too does the intensity of the emitted light. The sensor <NUM> previously described here can be used to monitor such a change in light intensity over the device lifetime. If the detected light intensity increases, e.g., by <NUM>% a warning may be issued and the device replaced before the system breaks down.

The spectrum of the emitted light also provides useful information, which can be observed and characterized using the test apparatus. For example, the spectrometer device <NUM> of the test apparatus may measure an energy spectrum of the emitted light, as explained above.

<FIG> illustrates an embodiment of an exemplary energy spectrum <NUM> which can be fitted by a cumulative peak curve <NUM>, which has several peaks (Peak <NUM> through Peak <NUM>). By characterizing the spectrum of the measured light, different properties of the interface <NUM> of interest may be investigated. For example, the spectrum information may be used to identify the microphysical nature of the trap states and use this information to tune the interface passivation of the device. Individual frequency signatures may be obtained from the measured signal. The test apparatus may include one or more filters (not shown) which allow only certain frequencies to pass where each peak shown in <FIG> may indicate an optical transition. The spectrometer device <NUM> of the test apparatus may be used to determine which spectral transition(s) correlate most with device degradation. For example, the spectrometer device <NUM> may be optimized for a certain wavelength region where the corresponding peak provides an even stronger correlation compared to a broadband photodiode. Such information may be used to tune the bandwidth of the sensor <NUM> described herein. For process development (zero-hour performance), the spectrometer device <NUM> may be used to determine whether any peaks correspond to degraded channel mobility (e.g., a trap state). For example, process splits may be fabricated and the spectrometer device <NUM> used to determine how the peaks move / intensity changes. The spectrometer device <NUM> may be used to measure the spectrum and predict whether channel interface properties are improved or not. Further spectrum analysis implementation options are possible.

<FIG> illustrates another embodiment of a test apparatus for monitoring and characterizing a semiconductor device that includes an electrical device formed in an active region of a semiconductor body with the active region having an interface between the semiconductor body and an insulating material. The test apparatus embodiment illustrated in <FIG> and <FIG> is designed for packaged semiconductor device whereas the test apparatus embodiment illustrated in <FIG> is designed for testing entire semiconductor wafers.

The test apparatus illustrated in <FIG> includes a first unit <NUM> that is moveable in the x, y, and z directions. The first unit <NUM> includes an objective <NUM>, a camera <NUM>, a flip mirror <NUM>, a reflective collimator <NUM> and a spectrometer device <NUM> which may be the same type of spectrometer device described above with reference to <FIG>. Hence, the spectrometer device <NUM> may perform the same type of spectroscopy functions described above. The camera <NUM> is used to locate the area to be measured which may be marked by a specific pattern integrated into the wafer backside metallization. The flip mirror <NUM> is flipped after the area to be measured has been found, to couple light from the objective <NUM> to the spectrometer device <NUM>.

The semiconductor wafer <NUM> to be characterized may be received by a chuck <NUM>. The chuck <NUM> has an opening <NUM> over which the area of the wafer <NUM> to be measured is placed during the characterization process. An ITO (indium tin oxide) coated glass substrate <NUM> may be placed over the opening <NUM> in the chuck <NUM> and removable contact clamps <NUM> may be used to clamp the semiconductor wafer <NUM> to the ITO coated glass substrate <NUM>. The chuck <NUM> together with the first unit <NUM> form a second unit <NUM> that is moveable in the x and y directions. The second unit <NUM> may be moved to allow for proper contacting of the wafer frontside metallization for operating each device under test to generate the light emission to be characterized. The spectrum characterization performed by the test apparatus shown in <FIG> may be the same as explained above for the test apparatus shown in <FIG> and <FIG>.

The wafer backside metallization is either partly or completely removed before characterization measurements, otherwise the light emission of interest is absorbed. If only partly removed, e.g., only within small circles <NUM>, the remaining metallization may be contacted via the chuck <NUM> which has an opening <NUM> in the middle for the placement of the ITO coated glass substrate <NUM>. As ITO is transparent above <NUM> and electroconductive, the emission can pass the glass substrate <NUM> while the ITO provides electrical contact to the backside metallization via removable contact clamps <NUM>. Holes in the substrate that are aligned to holes in the chuck allow the application of vacuum to fix the wafer <NUM> on the ITO coated glass substrate <NUM>.

The emission is collected from the backside of the wafer <NUM> via the objective <NUM>. The flip-mirror <NUM> allows to choose between the camera <NUM>, which can be used for alignment, and spectral detection. The electrical contacts on the topside of the wafer <NUM> are realized by probe needles (not shown). Alternatively, the same principle could be applied without the ITO coated glass substrate <NUM> so that there is just a hole <NUM> in the middle of the chuck <NUM>. This way, the wafer <NUM> may be heated and the emission measured at higher temperatures.

Terms such as "first", "second", and the like, are used to describe various elements, regions, sections, etc. and are also not intended to be limiting. Like terms refer to like elements throughout the description.

Claim 1:
A semiconductor device, comprising:
a semiconductor body (<NUM>);
an electrical device (<NUM>) formed in an active region (<NUM>) of the semiconductor body (<NUM>), the active region (<NUM>) including an interface between the semiconductor body (<NUM>) and an insulating material;
characterised in that the semiconductor device further comprises
a sensor (<NUM>) having a bandwidth tuned to a certain wavelength range of an energy spectrum of light (<NUM>) emitted by carrier recombination at the interface when the electrical device (<NUM>) is driven between accumulation and inversion, wherein an intensity of the emitted light is proportional to a density of charge trapping states (<NUM>) at the interface, wherein the sensor (<NUM>) is configured to output a signal that is proportional to the intensity of the sensed light, and the sensor (<NUM>) is placed so as to receive the light (<NUM>) emitted by the electrical device (<NUM>).