Patent Description:
The present disclosure relates to the field of power electronics technology, and in particular, to a component structure for connecting a power module and an external circuit, a power module and a power module assembly structure having the component structure.

Modern power electronic devices, as an important part of power conversions, are widely used in the electric power, electronics, motor drivers and energy industries. It is always an important pursuing goal for those skilled in the art to ensure long-term stable operation of the power electronic devices and improve the power conversion efficiency of the power electronic devices.

Power semiconductor elements are core parts of modern power electronic devices, performance of which directly determines the reliability and power conversion efficiency of the power electronic devices. In order to design a more reliable and safer power electronic device with higher performance, it is desirable that the power semiconductor element has characteristics of low voltage stress and low power loss. Power semiconductor elements used in the power electronic devices operate in a switching state, and high-frequency switching actions will cause a high current change rate di/dt in the circuit. According to the principle of the circuit, a voltage Vs will be generated when a changing current acts on a parasitic inductor Lstray, the calculation formula is as follows: <MAT>.

It can be seen that reducing the parasitic inductance may reduce the generated voltage spike when the current change rate is constant. On the other hand, the parasitic inductance is related to the packaging and connection of the power semiconductor element.

Therefore, in order to reduce the voltage stress across the power semiconductor device, a circuit for controlling the voltage spike is generally placed outside the power semiconductor device and near the terminals. As shown in <FIG>, it is a schematic diagram of a power semiconductor circuit with a capacitor clamping circuit in the prior art. The capacitor C is usually provided on an external circuit connected to the power module nearby, such as a laminated bus bar, a PCB system board, a control board, and the like. Since the circuits in the periphery of the power module are usually quite easy to set wiring layers with superimposing upper and lower layers, the loop inductance may be controlled at a quite low level, which results in that the entire loop inductance is dominated inside the power module. That is, this method may reduce the voltage spike caused by the parasitic inductance outside the power module, but cannot reduce the voltage spike caused by the parasitic inductance inside the power module.

In order to reduce the parasitic inductance inside the power module, a laminated bus bar structure is used inside the power module. Taking an MOSFET half-bridge circuit as an example, <FIG> is a schematic diagram of the half-bridge circuit. <FIG> is a schematic structural view of a laminated bus bar used in the half-bridge circuit of <FIG>. As shown in <FIG>, upper and lower layers of bus bars <NUM> and <NUM> superimpose with each other, in the dashed box A, the currents of which are with opposite directions, and the loop inductance inside the power module may be reduced well. However, in the dashed box B, the two bus bars <NUM> and <NUM> are separated to fan-out terminals <NUM> and <NUM> respectively. Due to factors such as voltage isolation, a distance d of the fan-out portions between the terminals <NUM> and <NUM> is relatively far, and the loop inductance between the two fan-out portions is large. That is, the solution in <FIG> does not reduce the parasitic inductance inside the power module to an ideal value. Therefore, it is necessary to provide a new technical solution to improve one or more problems existing in the prior art.

It should be noted that, information disclosed in the above background portion is provided only for better understanding of the background of the present disclosure, and thus it may contain information that does not form the prior art known by those ordinary skilled in the art.

Prior art documents disclosing power modules with low-inductance laminated bus bars are, for example, <CIT>, <CIT>, <CIT> and <CIT>.

The present disclosure provides a component structure for connecting a power module and an external circuit, a power module and a power module assembly structure having the component structure, so as to overcome one or more problems caused by the limitations and defects in the related art. The invention is set out by the appended claims.

Other features and advantages of the present disclosure will be apparent from the following detailed description, or may be learned in part through the practice of the present disclosure.

According to one aspect of the present disclosure, there is provided a system comprising an external circuit and a component structure configured to connect a power module and the external circuit, according to claim <NUM>.

The technical solutions provided by the embodiments of the present disclosure may include following beneficial effects.

As for a component structure in an embodiment of the present disclosure, within the power module, the first bus bar and the front portion of the second bus bar are laminated in parallel to form a laminated bus bar, which reduces the parasitic inductance inside the power module. At the fan-out terminals of the modules, the rear portion of the second bus bar and the third bus bar of the external circuit are settled in parallel to form a stacked bus bar structure, which reduces the parasitic inductance between the fan-out terminals of the power module. Through the design of the laminated bus bars inside the power module and the cooperation of the fan-out terminals inside the power module and the external circuit, the parasitic inductance inside the power module is greatly reduced, thereby facilitating and effectively reducing the voltage stress and power loss of the power electronic semiconductor device, and then improving the reliability and safety of the power electronic devices.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure.

The accompanying drawings herein are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure, and together with the description serve to explain the principles of the present disclosure. Obviously, the drawings in the following description are merely some embodiments of the present disclosure, and those skilled in the art can also obtain other drawings based on these drawings without any creative work.

However, example embodiments can be implemented in various forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that the present disclosure will be more comprehensive and complete, and will fully convey the concept of the example embodiments to those skilled in the art. The features, structures, or characteristics described may be combined in any suitable manner in one or more embodiments.

In addition, the drawings are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus their repeated description will be omitted.

Currently, in order to reduce the loop inductance, a laminated bus bar has been adopted inside the power module to lead out electrodes. However, due to the separation of the fan-out portions of the bus bar, it is still unable to reduce the parasitic inductance to the optimal value. Currently, the parasitic inductance of the external circuit connected to the power module has been controlled to the minimum. It seems to have reached a bottleneck stage to achieve an even lower parasitic inductance by improving the power module and the external circuit respectively. In order to solve the above bottleneck problem, the present disclosure proposes a novel component structure which may conveniently and effectively reduce the loop inductance.

The present disclosure provides a component structure, for connecting a power module and an external circuit. The component structure includes a first bus bar and a second bus bar. The first bus bar has one end extending to a first plane, and a first connecting terminal is formed. The second bus bar includes a front portion of the second bus bar and a rear portion of the second bus bar. The front portion of the second bus bar is laminated in parallel with the first bus bar, and the rear portion of the second bus bar extends to a second plane and a second connecting terminal is formed. The external circuit includes a third bus bar. The third bus bar is settled in parallel with the rear portion of the second bus bar, to reduce a parasitic inductance between the first connecting terminal and the second connecting terminal.

As for a component structure of the present disclosure, within the power module, the first bus bar and the front portion of the second bus bar are laminated in parallel to form a laminated bus bar, which reduces the parasitic inductance inside the power module. At the fan-out terminals of the modules, the rear portion of the second bus bar and the third bus bar of the external circuit are settled in parallel to form a stacked bus bar structure, which reduces the parasitic inductance between the fan-out terminals of the power module. Through the design of the laminated bus bars inside the power module and the cooperation of the fan-out terminals inside the power module with the external circuit, the parasitic inductance of the power module is greatly reduced, thereby effectively reducing the voltage stress and power loss of the power electronic semiconductor element, and then improving the reliability and safety of the power electronic devices.

In order to ensure a good parasitic inductance reduction effect, in an exemplary embodiment of the present disclosure, a portion of the third bus bar settled in parallel with the rear portion of the second bus bar is defined as a front portion of the third bus bar. Surfaces of the rear portion of the second bus bar and the front portion of the third bus bar disposed oppositely are a first surface and a second surface respectively. An area ratio of an overlapping area of the rear portion of the second bus bar and the front portion of the third bus bar to the first surface is greater than <NUM>, and an area ratio of an overlapping area of the rear portion of the second bus bar and the front portion of the third bus bar to the second surface is also greater than <NUM>. The inventors have found that when the area ratio of the overlapping area to the first surface and the area ratio of the overlapping area to the second surface are both greater than <NUM>, the parasitic inductance can be effectively reduced. In this embodiment, the area ratio of the overlapping area to the first surface and the area ratio of the overlapping area to the second surface may be different.

In order to further ensure a good parasitic inductance reduction effect, in another exemplary embodiment of the present disclosure, the area ratios of the overlapping area of the rear portion of the second bus bar and the front portion of the third bus bar to the first surface and the second surface are both <NUM>.

In the following, various parts of the component structure of the present disclosure will be described in more detail with reference to <FIG>.

<FIG> is a schematic diagram of a component structure in an exemplary embodiment of the present disclosure. The component structure <NUM> is used for connecting the power module and the external circuit. The component structure <NUM> includes a first bus bar <NUM> and a second bus bar <NUM>. In the embodiment, the power module may be a power semiconductor element, such as an MOS transistor, an IGBT (Insulated Gate Bipolar Transistor) and a transistor. Or the power module may be a conversion circuit composed of these power semiconductor elements, for example, the half-bridge power circuit in <FIG>. The external circuit may be an external circuit distribution unit corresponding to the power distribution of the power module, but it is not limited thereto.

Continuing to refer to <FIG>, one end of the first bus bar <NUM> extends to a first plane A and a first connecting terminal <NUM> is formed. The second bus bar <NUM> includes a front portion of the second bus bar <NUM> and a rear portion of the second bus bar <NUM>. The front portion of the second bus bar <NUM> and the rear portion of the second bus bar <NUM> are connected. The front portion of the second bus bar <NUM> is laminated in parallel with the first bus bar <NUM>, and the rear portion of the second bus bar extends to a second plane B and a second connecting terminal <NUM> is formed. The first connecting terminal <NUM> and the second connecting terminal <NUM> are served as connecting ports between the power module and the external circuit. The external circuit includes a third bus bar <NUM>. The third bus bar <NUM> is settled in parallel with the rear portion of the second bus bar <NUM>, to reduce a parasitic inductance between the first connecting terminal <NUM> and the second connecting terminal <NUM>. It should be noted that only the partial structure of the third bus bar is shown in the figure, and the third bus bar may have a larger area and length to connect other elements of the external circuit. Since the subsequent structures are weakly related to the present disclosure, they are not shown in detail.

A portion of the third bus bar <NUM> disposed opposite to the rear portion of the second bus bar <NUM> is further defined as a front portion of the third bus bar. Surfaces of the rear portion of the second bus bar <NUM> and the front portion of the third bus bar disposed oppositely are a first surface and a second surface respectively. An area ratio of an overlapping area of the rear portion of the second bus bar and the front portion of the third bus bar to the first surface is greater than <NUM>, and an area ratio of an overlapping area of the rear portion of the second bus bar and the front portion of the third bus bar to the second surface is greater than <NUM>. In this embodiment, the area ratio of the overlapping area to the first surface and the area ratio of the overlapping area to the second surface may be different. In order to further ensure a good parasitic inductance reduction effect, the area ratios of the overlapping area of the rear portion of the second bus bar and the front portion of the third bus bar to the first surface and the second surface may both be <NUM>, which may further effectively reduce the parasitic inductance. That is, the rear portion of the second bus bar <NUM> and the front portion of the third bus bar overlap in parallel, and surface areas of the oppositely disposed surfaces are equal.

As shown in <FIG>, in the present exemplary embodiment, one end of the third bus bar <NUM> is provided with a third connecting terminal <NUM>, and the third connecting terminal <NUM> is stacked and connected with the first connecting terminal <NUM>. For example, the third connecting terminal <NUM> and the first connecting terminal <NUM> can be electrically connected by mechanical fixing or the like. The external circuit is further provided a fourth connecting terminal <NUM>, and the fourth connecting terminal <NUM> and the second connecting terminal <NUM> are stacked and connected. For example, the fourth connecting terminal <NUM> and the second connecting terminal <NUM> may be electrically connected by mechanical fixing or the like. It should be noted that, another wiring layer connected with the fourth terminal <NUM> is arranged in parallel with the third bus bar, and may have a larger area and length to connect other elements of the external circuit. Since the subsequent structures are weakly related to the present disclosure, they are not shown in detail.

A schematic diagram of a flow direction of the current in each part of the component structure <NUM> is further shown in <FIG>. The flow direction of the current is indicated by the dashed arrow in <FIG>. It is assumed that the current flows from the first bus bar <NUM> into the power module and flows out from the second bus bar <NUM>. As shown in <FIG>, the current of the external circuit flows to the third connecting terminal <NUM> via the third bus bar <NUM>. The first connecting terminal <NUM> is connected with the third connecting terminal <NUM>, and the current flows into the first bus bar <NUM> through the first connecting terminal <NUM>. Then through a circuit distribution design inside the power module, the conversion of the current from the first bus bar <NUM> to the second bus bar <NUM> is achieved, and the current flows out from the second bus bar <NUM>. The current flows into the fourth connecting terminal <NUM> through the second connecting terminal <NUM> and then flows into the external circuit. The wiring layer of the external circuit is not shown in detail, and it may usually be implemented by a laminated bus bar, a PCB or a laminated copper bar, but not limited thereto. It should be noted that areas of bus bars of upper and lower layers in <FIG> remain strictly identical, but in fact, because some electrodes need to be connected to a certain layer of the laminated bus bars, certain avoidance space may need to be left, resulting in that areas of bus bars of upper and lower layers do not have to be strictly consistent. Those skilled in the art can determine it flexibly according to needs, and no special explanation will be given herein.

In the present exemplary embodiment, the first bus bar <NUM> and the front portion of the second bus bar <NUM> are superimposed, and the interlayer distance is relatively small. Due to limitations of voltage isolation and material or the like, the thickness of the bus bar is generally between <NUM> and <NUM>. Because the direction of the current inside the first bus bar <NUM> is opposite to that of the current inside the front portion of the second bus bar <NUM>, the loop inductance of this portion is relatively low, which may be usually limited to between <NUM>~ 9nH. Due to considerations of voltage isolation or the like, a distance of the rear portion of the second bus bar <NUM> is relatively long (usually greater than <NUM>), resulting in a large parasitic inductance, which is usually larger than 10nH. Thus the rear portion of the second bus bar <NUM> becomes a major factor affecting the loop inductance. However, in the present exemplary embodiment, since the third bus bar <NUM> of the external circuit and the rear portion of the second bus bar <NUM> are superimposed in parallel or overlap in parallel with a large overlapping area, and the current direction of the third bus bar <NUM> is opposite to that of the rear portion of the second bus bar <NUM>, the loop inductance can be partially or completely counteracted, so that its parasitic inductance is greatly reduced. The overall circuit parasitic inductance of the component structure <NUM> is greatly reduced. Therefore, the present disclosure effectively solves the problem of large circuit inductance through the design of a laminated bus bar inside the power module and the cooperation with the bus bar of the external circuit.

From the above, in the present disclosure, a current conducting direction of the first bus bar <NUM> is opposite to that of the front portion of the second bus bar <NUM>, and a current conducting direction of the rear portion of the second bus bar <NUM> is opposite to that of the third bus bar <NUM>. Since conducting directions of the current are opposite and the counteracting effect of the opposite currents is significant, the parasitic inductance can be greatly reduced.

Continuing to refer to <FIG>, the first bus bar <NUM> further includes a first extending portion <NUM> and a first bending portion <NUM>. The first bending portion <NUM> is located in the first plane A. The first connecting terminal <NUM> is disposed at an end of the first bending portion <NUM>. The front portion of the second bus bar <NUM> further includes a second extending portion <NUM> and a second bending portion <NUM>. The first extending portion <NUM> and the second extending portion <NUM> are laminated in parallel, and the first bending portion <NUM> and the second bending portion <NUM> are laminated in parallel. The rear portion of the second bus bar further includes a third extending portion <NUM> and a third bending portion <NUM>. The third bending portion <NUM> is connected to the second bending portion <NUM>, and the third extending portion <NUM> is located in the second plane B. The second connecting terminal <NUM> is disposed at an end of the third extending portion <NUM>. In this embodiment, by providing the third bending portion <NUM>, the first plane A and the second plane B can be in the same plane, and the interlayer distance between the third bus bar <NUM> and the rear portion of the second bus bar <NUM> can be minimized, which may further reduce the parasitic inductance.

In the component structure <NUM> of one exemplary embodiment of the present disclosure, as shown in <FIG>, it may also be the case that the front portion of the second bus bar <NUM> includes a second extending portion <NUM> and a second bending portion <NUM>, the rear portion of the second bus bar <NUM> is connected with the second bending portion <NUM>, and the second bending portion <NUM> and the rear portion of the second bus bar <NUM> are both located in the second plane B. That is, the rear portion of the second bus bar <NUM> does not include the third bending portion described above. The rear portion of the second bus bar <NUM> and the second bending portion <NUM> constitute a flat plate structure. In addition, in <FIG>, the third bus bar <NUM> is adjacent to and disposed under the rear portion of the second bus bar <NUM>. And the third bus bar <NUM> is connected to the first bus bar <NUM> through a via hole. In this way, it may also reduce the interlayer distance between the third bus bar <NUM> and the rear portion of the second bus bar <NUM>, and further reduce the parasitic inductance.

It should be noted that only main structures of the component structure are described in <FIG> and <FIG>, in which the insulating layer is not shown, and the thickness, width and the like of the bus bar are also schematically depicted instead of being drawn in scale.

Referring to <FIG>, in one exemplary embodiment of the present disclosure that is not covered by the claimed invention, inside the power module, the first bus bar <NUM> includes a front portion of the first bus bar <NUM> and a rear portion of the first bus bar <NUM>. The front portion of the first bus bar <NUM> and the rear portion of the first bus bar <NUM> are connected. The rear portion of the first bus bar <NUM> extends to the first plane A and the first connecting terminal <NUM> is formed. The second bus bar <NUM> includes a front portion of the second bus bar <NUM> and a rear portion of the second bus bar <NUM>. The front portion of the second bus bar <NUM> and the rear portion of the second bus bar <NUM> are connected. The front portion of the second bus bar <NUM> is laminated in parallel with the front portion of the first bus bar <NUM>, which may reduce the parasitic inductance inside the power module. The rear portion of the second bus bar <NUM> extends to the second plane B and the second connecting terminal <NUM> is formed. As shown in <FIG>, an extending direction of the rear portion of the first bus bar <NUM> is opposite to that of the rear portion of the second bus bar <NUM>. The first connecting terminal <NUM> and the second connecting terminal <NUM> may be served as connecting ports between the power module and the external circuit. The external circuit further includes a fourth bus bar <NUM> and the third bus bar <NUM>. The third bus bar <NUM> has a front portion of the third bus bar <NUM> and a rear portion of the third bus bar <NUM>, and the fourth bus bar <NUM> has a front portion of the fourth bus bar <NUM> and a rear portion of the fourth bus bar <NUM>. The front portion of the third bus bar <NUM> is settled in parallel with the rear portion of the second bus bar <NUM>, and the front portion of the third bus bar <NUM> is a portion of the third bus bar <NUM> settled in parallel with the rear portion of the second bus bar <NUM>. The front portion of the fourth bus bar <NUM> is settled in parallel with the rear portion of the first bus bar <NUM>, and the front portion of the fourth bus bar <NUM> is a portion of the fourth bus bar <NUM> settled in parallel with the rear portion of the first bus bar <NUM>. The laminated structure may reduce the parasitic inductance between the first connecting terminal <NUM> and the second connecting terminal <NUM>. At the same time, the rear portion of the fourth bus bar <NUM> and the rear portion of the third bus bar <NUM> are laminated in parallel, which further reduces the parasitic inductance between the first connecting terminal <NUM> and the second connecting terminal <NUM>. It should be noted that only the partial structures of the third bus bar and the fourth bus bar are shown in the figure, and the third bus bar and the fourth bus bar may have a larger area and length to connect other elements of the external circuit. Since these structures are weakly related to the present disclosure, they are not shown in detail.

Further, surfaces where the rear portion of the second bus bar <NUM> and the front portion of the third bus bar <NUM> settled in parallel are respectively a first surface and a second surface. An area ratio of an overlapping area of the rear portion of the second bus bar <NUM> and the front portion of the third bus bar <NUM> to the first surface is greater than <NUM>, and an area ratio of an overlapping area of the rear portion of the second bus bar <NUM> and the front portion of the third bus bar to the second surface is greater than <NUM>. In this embodiment, the area ratio of the overlapping area to the first surface and the area ratio of the overlapping area to the second surface may be different. In order to further ensure a good parasitic inductance reduction effect, the area ratios of the overlapping area of the rear portion of the second bus bar and the front portion of the third bus bar to the first surface and the second surface may both be <NUM>, which may further effectively reduce the parasitic inductance. That is, the rear portion of the second bus bar <NUM> and the front portion of the third bus bar <NUM> overlap in parallel, and surface areas of the oppositely disposed surfaces are equal.

Similarly, surfaces of the rear portion of the first bus bar <NUM> and the front portion of the fourth bus bar <NUM> disposed oppositely are respectively a third surface and a fourth surface. An area ratio of an overlapping area of the rear portion of the first bus bar <NUM> and the front portion of the fourth bus bar <NUM> to the third surface is greater than <NUM>, and an area ratio of an overlapping area of the rear portion of the first bus bar <NUM> and the front portion of the fourth bus bar <NUM> to the fourth surface is greater than <NUM>. In this embodiment, the area ratio of the overlapping area to the third surface and the area ratio of the overlapping area to the fourth surface may be different. In order to further ensure a good parasitic inductance reduction effect, the area ratios of the overlapping area of the rear portion of the first bus bar and the front portion of the fourth bus bar to the third surface and the fourth surface may both be <NUM>, which may further effectively reduce the parasitic inductance. That is, the rear portion of the first bus bar <NUM> and the front portion of the fourth bus bar <NUM> overlap in parallel, and surface areas of the surfaces oppositely disposed are equal.

Similarly, surfaces of the rear portion of the fourth bus bar <NUM> and the rear portion of the third bus bar <NUM> disposed oppositely are respectively a fifth surface and a sixth surface. An area ratio of an overlapping area of the rear portion of the third bus bar <NUM> and the front portion of the fourth bus bar <NUM> to the fifth surface is greater than <NUM>, and an area ratio of an overlapping area of the rear portion of the third bus bar <NUM> and the rear portion of the fourth bus bar <NUM> to the sixth surface is greater than <NUM>. In this embodiment, the area ratio of the overlapping area to the fifth surface and the area ratio of the overlapping area to the sixth surface may be different. In order to further ensure a good parasitic inductance reduction effect, the area ratios of the overlapping area of the rear portion of the third bus bar and the rear portion of the fourth bus bar to the fifth surface and the sixth surface may both be <NUM>, which may further effectively reduce the parasitic inductance. That is, the rear portion of the third bus bar <NUM> and the rear portion of the fourth bus bar <NUM> overlap in parallel, and surface areas of the oppositely disposed surfaces are equal.

As shown in <FIG>, in the present exemplary embodiment, the front portion of the third bus bar <NUM> is provided with a third connecting terminal <NUM>, and the third connecting terminal <NUM> is stacked and connected with the second connecting terminal <NUM>. The rear portion of the fourth bus bar <NUM> is provided with a fourth connecting terminal <NUM>, and the fourth connecting terminal <NUM> is stacked and connected with the first connecting terminal <NUM>. For example, the third connecting terminal <NUM> and the second connecting terminal <NUM> may be electrically connected by mechanical fixing or the like, and the fourth connecting terminal <NUM> and the first connecting terminal <NUM> may also be electrically connected by mechanical fixing or the like.

<FIG> further shows the schematic diagram of the flow direction of the current in each part of the component structure <NUM>, wherein the flow direction of the current is indicated by the dashed arrow in <FIG>. It is assumed that the current flows from the first bus bar <NUM> into the power module and flows out from the second bus bar <NUM>. As shown in <FIG>, the current of the external circuit flows to the fourth connecting terminal <NUM> through the fourth bus bar <NUM>. The fourth connecting terminal <NUM> is connected with the first connecting terminal <NUM>, and the current flows into the first bus bar <NUM> through the first connecting terminal <NUM>. Then, the current is switched from the first bus bar <NUM> to the second bus bar <NUM> through the circuit distribution design inside the power module and flows out from the second bus bar <NUM>. The second connecting terminal <NUM> is connected with the third connecting terminal <NUM>, and the current flows into the third connecting terminal <NUM> through the second connecting terminal <NUM>, and then flows into the external circuit through the third bus bar <NUM>. A wiring layer of the external circuit is not shown in detail, and it may usually implemented by a laminated bus bar, a PCB or a laminated copper bar, but not limited thereto. It should be noted that bus bar areas of the upper and lower layers shown in <FIG> are strictly identical, but in practice, since some electrodes need to be connected to a certain layer of the laminated bus bars, some avoidance space may need to be remained, resulting in that the bus bar areas of the upper and lower layers do not have to be strictly identical. Those skilled in the art may determine it flexibly according to needs, and no special explanation will be given here.

From the above, in the present exemplary embodiment, a current conducting direction of the front portion of the first bus bar <NUM> is opposite to that of the front portion of the second bus bar <NUM>, a current conducting direction of the rear portion of the first bus bar <NUM> is opposite to that of the front portion of the fourth bus bar <NUM>, a current conducting direction of the rear portion of the second bus bar <NUM> is opposite to that of the front portion of the third bus bar <NUM>, and a current conducting direction of the rear portion of the third bus bar <NUM> is opposite to that of the rear portion of the fourth bus bar <NUM>. The effect of reverse currents to cancel out each other is significant, and the parasitic inductance may be greatly reduced.

In addition, similar to the exemplary embodiment of <FIG>, the rear portion of the second bus bar <NUM> may also be provided with a bending portion, such that the first plane A and the second plane B are located in the same plane. The front portion of the third bus bar <NUM> may also be provided with a bending portion, such that the front portion of the third bus bar <NUM> and the front portion of the fourth bus bar <NUM> are in the same plane, so that the interlayer distance can be further reduced, and then the parasitic inductance can be further reduced, which will not be described again herein.

It should be noted that only main structures of the component structure <NUM> are described in <FIG>, in which the insulating layer is not shown, and the thickness, width and the like of the bus bar are also schematically depicted instead of being drawn in scale.

In the exemplary embodiments described above, the connecting terminals are all stacked and connected with each other, but the present disclosure is not limited thereto. In other exemplary embodiments of the present disclosure, the connecting terminals may also be in other forms, and other connecting manners may also be adopted correspondingly.

Referring to <FIG>, in one exemplary embodiment of the present disclosure, inside the power module, one end of the first bus bar <NUM> extends to the first plane A and the first connecting terminals <NUM> are formed. The first connecting terminals <NUM> are plug-in type terminals. The second bus bar <NUM> includes a front portion of the second bus bar <NUM> and a rear portion of the second bus bar <NUM>, and the front portion of the second bus bar <NUM> and the rear portion of the second bus bar <NUM> are connected. The front portion of the second bus bar <NUM> and the first bus bar <NUM> are laminated in parallel. The rear portion of the second bus bar extends to the second plane B, and the second connecting terminals <NUM> are formed. The second connecting terminals <NUM> are plug-in type terminals. The first connecting terminals <NUM> and the second connecting terminals <NUM> are served as connecting ports between the power module and the external circuit. The external circuit includes a third bus bar <NUM> and a fourth bus bar <NUM>. The third bus bar <NUM> has a front portion of the third bus bar <NUM> and a rear portion of the third bus bar <NUM>. The front portion of the third bus bar <NUM> and the rear portion of the second bus bar <NUM> are settled in parallel, and the front portion of the third bus bar <NUM> is a portion of the third bus bar <NUM> disposed opposite to the rear portion of the second bus bar <NUM>. The fourth bus bar <NUM> is laminated in parallel with the rear portion of the third bus bar <NUM>. The parasitic inductance between the first connecting terminals <NUM> and the second connecting terminals <NUM> can be reduced through these stack settings. It should be noted that only partial structures of the third bus bar and the fourth bus bar are shown in the figure, and the third bus bar and the fourth bus may have a larger area and length to connect other elements of the external circuit. Since these structures are weakly related to the present disclosure, they are not shown in detail.

Further, surfaces of the rear portion of the second bus bar <NUM> and the front portion of the third bus bar <NUM> settled in parallel are a first surface and a second surface respectively. An area ratio of an overlapping area of the rear portion of the second bus bar <NUM> and the front portion of the third bus bar <NUM> to the first surface is greater than <NUM>. In order to further ensure a good parasitic inductance reduction effect, an area ratio of the overlapping area of the rear portion of the second bus bar and the front portion of the third bus bar to the first surface may be <NUM>. In order to further ensure a good parasitic inductance reduction effect, area ratios of the overlapping area of the rear portion of the second bus bar and the front portion of the third bus bar to the first surface and the second surface may both be <NUM>, which may further effectively reduce the parasitic inductance. That is, the rear portion of the second bus bar <NUM> and the front portion of the third bus bar <NUM> overlap in parallel, and surface areas of the oppositely disposed surfaces are equal.

Similarly, surfaces of the fourth bus bar <NUM> and the rear portion of the third bus bar <NUM> disposed oppositely are respectively a third surface and a fourth surface. An area ratio of an overlapping area of the rear portion of the third bus bar <NUM> and the fourth bus bar <NUM> to the third surface is greater than <NUM>, and an area ratio of an overlapping area of the rear portion of the third bus bar <NUM> and the fourth bus bar <NUM> to the fourth surface is greater than <NUM>. In this embodiment, the area ratio of the overlapping area to the third surface and the area ratio of the overlapping area to the fourth surface may be different. In order to further ensure a good parasitic inductance reduction effect of the external circuit, the area ratios of the overlapping area of the rear portion of the third bus bar and the rear portion of the fourth bus bar to the third surface and the fourth surface may both be <NUM>, which may further effectively reduce the parasitic inductance. That is, the rear portion of the third bus bar <NUM> and the fourth bus bar <NUM> overlap in parallel, and surface areas of the oppositely disposed surfaces are equal.

As shown in <FIG>, in the present exemplary embodiment, the front portion of the third bus bar <NUM> is provided with the third connecting terminals <NUM>, and the third connecting terminals <NUM> are connected with the first connecting terminals <NUM> in one to one ratio. The fourth bus bar <NUM> is provided with the fourth connecting terminals <NUM>, and the fourth connecting terminals <NUM> are connected with the second connecting terminals <NUM> in one to one ratio. Both the third connecting terminals <NUM> and the fourth connecting terminals <NUM> may be terminals that can be mated with the plug-in type terminals. For example, the third connecting terminals <NUM> and the first connecting terminals <NUM> can be electrically connected by welding or press-fit or the like. The fourth connecting terminals <NUM> and the second connecting terminals <NUM> can also be electrically connected by welding or press-fit or the like.

<FIG> further shows the schematic diagram of the flow direction of the current in each part of the component structure <NUM>, wherein the flow direction of the current is indicated by the dashed arrow in <FIG>. It is assumed that the current flows from the first bus bar <NUM> into the power module and flows out from the second bus bar <NUM>. As shown in <FIG>, the current of the external circuit flows to the third connecting terminal <NUM> through the third bus bar <NUM>. The first connecting terminal <NUM> is connected to the third connecting terminal <NUM>, and the current flows into the first bus bar <NUM> through the first connecting terminal <NUM>. The current is then switched from the first bus bar <NUM> to the second bus bar <NUM> through the circuit distribution design inside the power module and flows out from the second bus bar <NUM>. The current flows into the fourth connecting terminal <NUM> through the second connecting terminal <NUM>, and then flows into the external circuit through the fourth bus bar <NUM>. A wiring layer of the external circuit is not shown in detail, and it may usually implemented by a laminated bus bar, a PCB or a laminated copper bar, but not limited thereto. It should be noted that bus bar areas of the upper and lower layers shown in <FIG> are strictly identical, but in practice, since some electrodes need to be connected to a certain layer of the laminated bus bars, some avoidance space may need to be remained. For example, through holes and the like for avoiding the second connecting terminals <NUM> needs to be set on the third bus bar <NUM>. It results in that the bus bar areas of the upper and lower layers do not have to be strictly identical. Those skilled in the art may determine it flexibly according to needs, and no special explanation will be given here.

In the present exemplary embodiment, the first bus bar <NUM> overlaps the front portion of the second bus bar <NUM>, and the interlayer distance is relatively small. Due to limitations of voltage isolation and material or the like, the thickness of the bus bar is generally between <NUM> and <NUM>. Because the direction of the current inside the first bus bar <NUM> is opposite to that of the current inside the front portion of the second bus bar <NUM>, the loop inductance of this portion is relatively low, which may be usually limited to between <NUM>~ 9nH. Due to considerations of voltage isolation or the like, a distance of the rear portion of the second bus bar <NUM> is relatively long (usually greater than <NUM>), resulting in a large parasitic inductance, which is usually larger than 10nH. Thus the rear portion of the second bus bar <NUM> becomes a major factor affecting the loop inductance. However, in the present exemplary embodiment, since the front portion of the third bus bar <NUM> of the external circuit and the rear portion of the second bus bar <NUM> are superimposed in parallel or overlap in parallel with a large overlapping area, and the current direction of the front portion of the third bus bar <NUM> is opposite to that of the rear portion of the second bus bar <NUM>, the loop inductance can be partially or completely counteracted, so that its parasitic inductance is greatly reduced.

From the above, in the present disclosure, a current conducting direction of the first bus bar <NUM> is opposite to that of the front portion of the second bus bar <NUM>, a current conducting direction of the rear portion of the second bus bar <NUM> is opposite to that of the front portion of the third bus bar <NUM>, and a current conducting direction of the rear portion of the third bus bar <NUM> is opposite to that of the fourth bus bar <NUM>. The counteracting effect of the opposite currents is significant, and the parasitic inductance can be greatly reduced. The overall circuit parasitic inductance of the component structure <NUM> is greatly reduced. Therefore, the present disclosure effectively solves the problem of large circuit inductance in the prior art through the design of a laminated bus bar inside the power module and the cooperation with the bus bar of the external circuit.

In addition, similar to the exemplary embodiment in <FIG>, the first bus bar <NUM> further includes a first extending portion <NUM> and a first bending portion <NUM>. The first bending portion <NUM> is located in the first plane A. The first connecting terminals <NUM> are disposed at an end of the first bending portion <NUM>. The front portion of the second bus bar <NUM> further includes a second extending portion <NUM> and a second bending portion <NUM>. The first extending portion <NUM> and the second extending portion <NUM> are laminated in parallel, and the first bending portion <NUM> and the second bending portion <NUM> are laminated in parallel. The rear portion of the second bus bar further includes a third extending portion <NUM> and a third bending portion <NUM>. The third bending portion <NUM> is connected to the second bending portion <NUM>, and the third extending portion <NUM> is located in the second plane B. The second connecting terminals <NUM> are disposed at an end of the third extending portion <NUM>, which will not be described again here.

In the previous exemplary embodiments, the corresponding power modules are two-port structures, and there are two output terminals. A typical application of the power module may be the half-bridge power circuit with capacitor clamping as shown in <FIG>, a half-bridge power circuit with diode clamping as shown in <FIG>, a half-bridge power circuit with active clamping as shown in <FIG> and the like. These typical applications will be described in detail below.

The half-bridge circuit with capacitor clamping as shown in <FIG> is taken as an example, in which a first IGBT element S1 and a second IGBT element S2 are connected in parallel with a diode D1 and a diode D2 respectively, then connected in series, and then the bridge arm circuit formed by the series connection is further connected in parallel with the capacitor C of the external clamping circuit. The capacitor C can effectively reduce the voltage spike between a collector of the first IGBT element S1 and an emitter of the second IGBT element S2 during switching. For example, when the first IGBT element S1 is turned on and the second IGBT element S2 is turned off, the capacitor C can reduce the voltage between the collector and the emitter of the second IGBT element S2. When the first IGBT element S1 is turned off and the second IGBT element S2 is turned on, the capacitor C can reduce the voltage between the collector and the emitter of the first IGBT element S1. At the same time, the parasitic inductance of the commutation loop composed of the first IGBT element S1, the second IGBT element S2 and the capacitor C needs to be strictly controlled. In view of this, in the present embodiment, the collector of the first IGBT element S1 and the emitter of the second IGBT element S2 may be respectively led to the first connecting terminal and the second connecting terminal which are the ports of the power module through the first bus bar and the second bus bar, and connected to the capacitor C of the external circuit through the third connecting terminal and the fourth connecting terminal. The connection between the power module and the external circuit is realized through the component structure in the above exemplary embodiment, and a low loop parasitic inductance can be obtained, thereby reducing the voltage stress experienced by the power elements and improving the efficiency of the circuit.

Referring to <FIG>, a schematic diagram of a half-bridge power circuit with diode clamping is shown. The circuit connection is basically the same as the half-bridge circuit with capacitor clamping as shown in <FIG> except that the capacitor C in <FIG> is replaced by a diode clamping circuit <NUM>. The diode clamping circuit <NUM> includes a capacitor C1, a diode D and a snubber resistor R. Similarly, the parasitic inductance of the current loop composed of the first IGBT element S1, the second IGBT element S2 and the diode D needs to be strictly controlled. In view of this, in the present embodiment, the collector of the first IGBT element S1 and the emitter of the second IGBT element S2 may be respectively led to the first connecting terminal and the second connecting terminal which are the ports of the power module through the first bus bar and the second bus bar, and connected to the capacitor C1 of the external circuit and the diode D through the third connecting terminal and the fourth connecting terminal. The connection between the power module and the external circuit is realized through the component structure in the above exemplary embodiment, and a low loop parasitic inductance can be obtained, thereby reducing the voltage stress experienced by the power element and improving the efficiency of the circuit.

Referring to <FIG>, a schematic diagram of a half-bridge power circuit with active clamping is shown. The circuit connection is basically the same as the half-bridge circuit with capacitor clamping as shown in <FIG> except that the capacitor C in <FIG> is replaced by an active clamping circuit <NUM>. The active clamping circuit <NUM> includes a capacitor C2, a power semiconductor element S and a snubber resistor R. Similarly, the parasitic inductance of the commutation loop composed of the first IGBT element S1, the second IGBT element S2, the capacitor C2 and the power semiconductor element S needs to be strictly controlled. In view of this, in the present embodiment, the collector of the first IGBT element S1 and the emitter of the second IGBT element S2 may be respectively led to the first connecting terminal and the second connecting terminal which are the ports of the power module through the first bus bar and the second bus bar, and connected to the capacitor C2 of the external circuit and the power semiconductor element S through the third connecting terminal and the fourth connecting terminal. The connection between the power module and the external circuit is realized through the component structure in the above exemplary embodiment, and a low loop parasitic inductance can be obtained, thereby reducing the voltage stress experienced by the power element and improving the efficiency of the circuit.

It should be noted that all or some of the elements of the clamping circuits may be disposed on the internal laminated bus bar or on the external circuit unit. Persons of ordinary skill in the art can change the form of the internal laminated bus bars slightly as needed. For example, as shown in <FIG>, a wiring layer <NUM> of the mounting elements <NUM> can be added additionally, to achieve the placement of the elements <NUM>. As another example, as shown in <FIG>, it is also possible to allocate the partial position of a layer in the internal laminated bus bars to the same surface of another layer by rewiring, so as to directly mount the elements <NUM> through the SMT (Surface Mount Technology) process. As still another example, as shown in <FIG>, the elements <NUM> can also be mounted on a layer of the laminated bus bars, and a partial position of another layer of the laminated bus bars is exposed, and the electrical connection is achieved by a wire bonding process. In addition, it is easily understood that, circuit elements for realizing other functions, such as a driving circuit or the like, may also be mounted on the internal laminated bus bar, which is not particularly limited in this exemplary embodiment. In addition, the laminated bus bars may also lead out other signal terminals in addition to the power terminals, which will not be described in detail herein.

In the following exemplary embodiments, the corresponding power modules are all three-port structures, that is, there are three output terminals, which will be described in detail below.

Referring to <FIG>, in the component structure <NUM> of one exemplary embodiment of the present disclosure, inside the power module, in addition to the first bus bar <NUM> and the second bus bar <NUM>, a fifth bus bar <NUM> is further included. In the embodiment, one end of the first bus bar <NUM> extends to a first plane A and a first connecting terminal <NUM> is formed. The second bus bar <NUM> includes a front portion of the second bus bar <NUM> and a rear portion of the second bus bar <NUM>. The front portion of the second bus bar <NUM> and a rear portion of the second bus bar <NUM> are connected. The front portion of the second bus bar <NUM> is laminated in parallel with the first bus bar <NUM>. The rear portion of the second bus bar <NUM> extends to a second plane B and a second connecting terminal <NUM> is formed. The fifth bus bar <NUM> includes a front portion of the fifth bus bar <NUM> and a rear portion of the fifth bus bar <NUM>. The front portion of the fifth bus bar <NUM> and the rear portion of the fifth bus bar <NUM> are connected. The front portion of the fifth bus bar <NUM> is laminated in parallel with the first bus bar <NUM>. The rear portion of the fifth bus bar <NUM> extends to a third plane C and a fifth connecting terminal <NUM> is formed. The first connecting terminal <NUM>, the second connecting terminal <NUM> and the fifth connecting terminal <NUM> are served as connecting ports between the power module and the external circuit. The external circuit includes a third bus bar <NUM> and a fourth bus bar <NUM>. The third bus bar <NUM> is settled in parallel with the rear portion of the second bus bar <NUM>, to reduce the parasitic inductance between the first connecting terminal <NUM> and the second connecting terminal <NUM>. The fourth bus bar <NUM> is settled in parallel with the rear portion of the fifth bus bar <NUM>, to reduce the parasitic inductance between the first connecting terminal <NUM> and the fifth connecting terminal <NUM>.

It should be noted that only the partial structures of the third bus bar and the fourth bus bar are shown in the figure, and the third bus bar and the fourth bus bar may have a larger area and length to connect other elements of the external circuit. Since the subsequent structures are weakly related to the present disclosure, they are not shown in detail.

A portion of the third bus bar <NUM> disposed opposite to the rear portion of the second bus bar <NUM> is further defined as a front portion of the third bus bar. Surfaces of the rear portion of the second bus bar <NUM> and the front portion of the third bus bar disposed oppositely are a first surface and a second surface respectively. An area ratio of an overlapping area of the rear portion of the second bus bar <NUM> and the front portion of the third bus bar to the first surface is greater than <NUM>, and an area ratio of an overlapping area of the rear portion of the second bus bar <NUM> and the front portion of the third bus bar to the second surface is greater than <NUM>. In this embodiment, the area ratio of the overlapping area to the first surface and the area ratio of the overlapping area to the second surface may be different. In order to further ensure a good parasitic inductance reduction effect, the area ratios of the overlapping area of the rear portion of the second bus bar and the front portion of the third bus bar to the first surface and the second surface may both be <NUM>, which may further effectively reduce the parasitic inductance. That is, the rear portion of the second bus bar <NUM> and the front portion of the third bus bar overlap in parallel, and surface areas of the oppositely disposed surfaces are equal.

Similarly, a portion of the fourth bus bar <NUM> disposed opposite to the rear portion of the fifth bus bar <NUM> is further defined as a front portion of the fourth bus bar. Surfaces of the rear portion of the fifth bus bar <NUM> and the front portion of the fourth bus bar disposed oppositely are a third surface and a fourth surface respectively. An area ratio of an overlapping area of the rear portion of the fifth bus bar <NUM> and the front portion of the fourth bus bar to the third surface is greater than <NUM>, and an area ratio of an overlapping area of the rear portion of the fifth bus bar <NUM> and the front portion of the fourth bus bar to the fourth surface is greater than <NUM>. In this embodiment, the area ratio of the overlapping area to the third surface and the area ratio of the overlapping area to the fourth surface may be different. In order to further ensure a good parasitic inductance reduction effect, the area ratios of the overlapping area of the rear portion of the fifth bus bar and the front portion of the fourth bus bar to the third surface and the fourth surface may both be <NUM>, which may further effectively reduce the parasitic inductance. That is, the rear portion of the fifth bus bar <NUM> and the front portion of the fourth bus bar overlap in parallel, and surface areas of the oppositely disposed surfaces are equal.

As shown in <FIG>, in the present exemplary embodiment, one end of the third bus bar <NUM> is provided with a third connecting terminal <NUM>, and the third connecting terminal <NUM> is stacked and connected with the second connecting terminal <NUM>. For example, the third connecting terminal <NUM> and the second connecting terminal <NUM> can be electrically connected by mechanical fixing or the like. One end of the fourth bus bar <NUM> is provided with a fourth connecting terminal <NUM>, and the fourth connecting terminal <NUM> is stacked and connected with the fifth connecting terminal <NUM>. For example, the fourth connecting terminal <NUM> and the fifth connecting terminal <NUM> can be electrically connected by mechanical fixing or the like. The external circuit is further provided a sixth connecting terminal <NUM>, and the sixth connecting terminal <NUM> and the first connecting terminal <NUM> are stacked and connected. For example, the sixth connecting terminal <NUM> and the first connecting terminal <NUM> may be electrically connected by mechanical fixing or the like through a through hole avoided in the third bus bar <NUM> and the fifth bus bar <NUM>.

<FIG> further shows the schematic diagram of the flow direction of the current in each part of the component structure <NUM>, wherein the flow direction of the current is indicated by the dashed arrow in <FIG>. As for a three-port element, there are two loop current paths. The first loop current path is as follows: the external current flows into the first bus <NUM> inside the module through the sixth connecting terminal <NUM>, and flows out from the second connecting terminal <NUM> of the second bus bar <NUM> and then flows into the third bus bar <NUM>. The other loop current path is as follows: the external current flows into the first bus bar <NUM> inside the module through the sixth connecting terminal <NUM>, and flows out from the fifth connecting terminal <NUM> of the fifth bus bar <NUM>, and then flows into the fourth bus bar <NUM>. Specifically, continuing to refer to <FIG>, as for the first loop current path, the current of the external circuit flows to the first connecting terminal <NUM> via the sixth connecting terminal <NUM>; the current flows into the first bus <NUM> through the first connecting terminal <NUM>; then the current is switched from the first bus bar <NUM> to the second bus bar <NUM> through the circuit distribution design inside the power module, and flows out from the second bus bar <NUM>; the current flows into the third connecting terminal <NUM> through the second connecting terminal <NUM>, and the current flows into the third bus bar <NUM> through the third connecting terminal <NUM>, and then flows into the external circuit through the third bus bar <NUM>. As for the second loop current path, as shown in <FIG>, the current of the external circuit flows to the first connecting terminal <NUM> via the sixth connecting terminal <NUM>; the current flows into the first bus bar <NUM> through the first connecting terminal <NUM>; then the current is switched from the first bus bar <NUM> to the fifth bus bar <NUM> through the circuit distribution design inside the power module, and flows out from the fifth bus bar <NUM>; the current flows into the fourth bus bar <NUM> through the fifth connecting terminal <NUM>, and then flows into the fourth bus bar <NUM> through the fourth connecting terminal <NUM> and then flows into the external circuit. A wiring layer of the external circuit is not shown in detail, and it may usually implemented by a laminated bus bar, a PCB or a laminated copper bar, but not limited thereto. It should be noted that bus bar areas of the upper and lower layers shown in <FIG> are strictly identical, but in practice, since some electrodes need to be connected to a certain layer of the laminated bus bars, some avoidance space may need to be remained, resulting in that the bus bar areas of the upper and lower layers do not have to be strictly identical. Those skilled in the art may determine it flexibly according to needs, and no special explanation will be given here.

From the above, in the present disclosure, a current conducting direction of the first bus bar <NUM> is opposite to that of the front portion of the second bus bar <NUM>, a current conducting direction of the first bus bar <NUM> is opposite to that of the front portion of the fifth bus bar <NUM>, a current conducting direction of the rear potion of the second bus bar <NUM> is opposite to that of the third bus bar <NUM>, and a current conducting direction of the rear portion of the fifth bus bar <NUM> is opposite to that of the fourth bus bar <NUM>. Since conducting directions of the current are opposite and the counteracting effect of the opposite currents is significant, the parasitic inductance can be greatly reduced.

In addition, similar to the exemplary embodiment in <FIG>, the rear portion of the second bus bar <NUM> may also be provided with a bending portion, such that the first plane A and the third plane C are located in the same plane. The interlayer distance can be further reduced, and then the parasitic inductance can be further reduced, which will not be described again herein.

In the above-described exemplary embodiment of <FIG>, the first bus bar <NUM> is disposed between the front portion of the second bus bar <NUM> and the front portion of the fifth bus bar <NUM>, but in other exemplary embodiments of the present disclosure, it is also possible to adopt other settings.

As shown in <FIG>, in one exemplary embodiment of the present disclosure, the front portion of the second bus bar <NUM> and the front portion of the fifth bus bar <NUM> of the component structure <NUM> are arranged in parallel. That is, the front portion of the second bus bar <NUM> and the front portion of the fifth bus bar <NUM> are disposed in the same layer. By arranging the front portion of the second bus bar <NUM> and the front portion of the fifth bus bar <NUM> in parallel, the thickness of the power module can be reduced, thereby facilitating the realization of an ultrathin product. The other parts of the component structure in this exemplary embodiment are similar to those of the previous exemplary embodiment of <FIG>, and thus will not be described again here.

In the previous exemplary embodiments in <FIG> and <FIG>, the corresponding power modules are all three-port structures. There are three output terminals. A typical application of the power module may be a three-level circuit with a clamping circuit as shown in <FIG>, or a T-type three-level power circuit with a snubber capacitor as shown in <FIG>. These typical applications will be described in detail below.

Referring to <FIG>, a schematic diagram of a three-level power circuit with a clamping circuit is shown. A first IGBT element S1, a second IGBT element S2, a third IGBT element S3, and a fourth IGBT element S4 are connected in parallel with a diode D1, a diode D2, a diode D3 and a diode D4 respectively, and then connected in series to form a bridge arm circuit. The bridge arm circuit is connected in parallel with a branch circuit formed by connecting the capacitor C1 and the capacitor C2 in series. The branch circuit formed by series connection of the third IGBT element S3 and the fourth IGBT element S4 in the bridge arm circuit is connected in parallel with the branch circuit formed by connecting the diode D5 and the diode D6 in series. A connection point (hereinafter referred to as a common terminal) of the capacitor C1 and the capacitor C2 is connected with a connection point of the diode D5 and the diode D6. In this circuit, the capacitor C1 as a control element can reduce the voltage spike between the collector of the first IGBT element S1 and the anode of the diode D5 during switching. For example, when the first IGBT element S1 is turned on and the diode D5 is reversely blocked, the capacitor C1 can reduce the voltage between the anode and cathode of the diode D5. When the diode D5 is conducting forward and the first IGBT element S1 is turned off, the capacitor C1 can reduce the voltage between the collector and the emitter of the first IGBT element S1. The capacitor C2 as a control element can reduce the voltage spike between the emitter of the fourth IGBT element S4 and the cathode of the diode D6. For example, when the fourth IGBT element S4 is turned on and the diode D6 is reversely blocked, the capacitor C2 can reduce the voltage between the anode and cathode of the diode D6. When the diode D6 is conducting forward and the fourth IGBT element S4 is turned off, the capacitor C2 can reduce the voltage between the collector and the emitter of the fourth IGBT element S4. At the same time, the parasitic inductance of the commutation loop composed of the first IGBT element S1, the diode D5, and the capacitor C1 and the current loop composed of the fourth IGBT element S4, the diode D6, and the capacitor C2 needs to be strictly controlled. In view of this, in the present embodiment, the collector of the first IGBT element S1 and the emitter of the fourth IGBT element S4 may be respectively connected to the second connecting terminal and the fifth connecting terminal of the power module through the second bus bar and the fifth bus bar, and connected to the capacitors C1 and C2 of the external circuit through the third connecting terminal and the fourth connecting terminal. The common terminal can be connected to the first connecting terminal of the power module via the first bus bar, and connected to the external circuit through the sixth connecting terminal. The connection between the power module and the external circuit is realized through the component structure in the above exemplary embodiment, and a low loop parasitic inductance can be obtained, thereby reducing the voltage stress experienced by the power element and improving the efficiency of the circuit.

Referring to <FIG>, a schematic diagram of a T-type three-level power circuit with a snubber capacitor is shown. A first IGBT element S1, a second IGBT element S2 are connected in parallel with a diode D1, a diode D2 respectively, and then connected in series to form a bridge arm circuit. The bridge arm circuit is connected in parallel with a branch circuit formed by connecting the capacitor C1 and the capacitor C2 in series. The third IGBT element S3 and the fourth IGBT element S4 are connected in parallel with the diodes D3 and D4 respectively, and then connected in series to form a branch circuit. The branch circuit is connected in series between a midpoint of the bridge circuit and a connection point (hereinafter referred to as a common terminal) of the capacitor C1 and the capacitor C2. Specifically, it may be the case that the emitter of the third IGBT element S3 is connected to the common terminal, and the collector of the fourth IGBT element S4 is connected to the midpoint of the bridge arm circuit. Similarly, the parasitic inductance of the current loop composed of the first IGBT element S1, the fourth IGBT element S4, the diode D3, and the capacitor C1 and the current loop composed of the second IGBT element S2, the third IGBT element S3, the diode D4, and the capacitor C2 needs to be strictly controlled. In view of this, in the present embodiment, the collector of the first IGBT element S1 and the emitter of the second IGBT element S2 may be respectively connected to the second connecting terminal and the fifth connecting terminal of the power module through the second bus bar and the fifth bus bar, and connected to the capacitors C1 and C2 of the external circuit through the third connecting terminal and the fourth connecting terminal. The common terminal can be connected to the first connecting terminal of the power module via the first bus bar, and connected to the external circuit through the sixth connecting terminal. The connection between the power module and the external circuit is realized through the component structure in the above exemplary embodiment, and a low loop parasitic inductance can be obtained, thereby reducing the voltage stress experienced by the power element and improving the efficiency of the circuit.

From the typical application of the power modules in the above exemplary embodiment, it can be seen that the power modules applied in the present disclosure generally includes at least two power elements connected in series, and at least one of the power elements is a controllable device, such as an MOSFET, an IGBT, a SiC MOS, a GaN MOS. The basic features of the controllable device are all controllable three-port power elements, including a first terminal, a second terminal, and a control terminal. Another power element can be a controllable element or an uncontrollable element, such as a diode or the like. Therefore, the component structure in the present disclosure has a wide range of applications, for example, it can be widely applied to power conversion equipment such as solar inverters, uninterruptible power supplies, active filters, and motor drives.

Further, a power module is also provided in an exemplary embodiment of the present disclosure. The power module may include a substrate, a power unit, and a component structure in any one of the above-described exemplary embodiments. In the embodiment, the power unit is disposed on the substrate, and the component structure connects the power unit and an external circuit. The power module will be further described below with reference to <FIG>.

Referring to <FIG>, the substrate may be a DBC (Direct Bonding Copper). However, in other exemplary embodiments of the present disclosure, the substrate may also be an Active Metal Bonding (AMB), an Insulated Metal Substrate (IMS), a Direct Plated Copper (DPC) or a thick film circuit and so on. In addition, in order to improve the heat dissipation performance of the power module, a heat dissipation structure, such as a heat sink, a fin, a boss and the like may be integrated at one side of the substrate where a device is not mounted.

The power unit may include a power element S1 and a power element S2 provided on a DBC substrate. The power element S1 and the power element S2 may be disposed on the substrate DBC through a die bonding material layer <NUM>. The material of the die bonding material layer <NUM> may be a brazing material, a low temperature sintering material, a conductive adhesive, or the like, which is not specifically limited in the present exemplary embodiment. The power element S1 and the power element S2 are connected in series. The first end of the power unit may be one end of the power element S1, such as the drain electrode of the power element S1. The second end of the power unit may be one end of the power element S2, such as the source electrode of the power element S2.

The component structure <NUM> includes two layers of laminated bus bars, which may be for example the first bus bar and the second bus bar respectively in the previous exemplary embodiment of <FIG>. The lower layer of the laminated bus bars may be mechanically and thermally connected to the substrate DBC through the adhesive material layer <NUM>. An insulating medium such as a ceramic is provided between two layers of the laminated bus bars. When the insulating medium is a ceramic, the ceramic material may be aluminum oxide, aluminum nitride, silicon nitride, silicon carbide, and beryllium oxide or the like. This is not particularly limited in the exemplary embodiment.

The power unit is connected to the component structure. For example, the first end (front electrode) of the power element S1 is connected to the wiring layer of the substrate DCB through the lead <NUM>, and the second end (back electrode) of the power element S1 is connected to the lower layer of the laminated bus bars through the lead <NUM>. The first end of the power element S2 is connected to the upper layer of the laminated bus bars through the lead <NUM>, and the second end of the power element S2 is led out through the wiring layer of the substrate DCB. Specifically, referring to <FIG> and <FIG>, it can be the case that the source electrode of the power element S1 is connected to the wiring layer of the substrate DBC through the bonding wire <NUM>, and the drain electrode of the power element S1 is connected to the lower layer of the laminated bus bars through the lead <NUM>. The source electrode of the power element S2 is connected to the upper layer of the laminated bus bars through a bonding wire <NUM>, and the drain electrode is connected to the DCB wiring layer of the substrate. However, it is easy to understand that other feasible connection manners also fall within the protection scope of the present disclosure.

It should be noted that the material for insulation protection is not shown in the power module shown in <FIG>. The insulation protection material can guarantee the voltage withstand requirements between the chip and the electrical connection unit. There are two kinds of typical protection manners in the art. One is the potting insulation protection material, and the other is transfer molding the insulating protection material, both of which are within the protection scope of the present disclosure.

In addition, for the purpose of insulation, it is also possible to cover the surface of the laminated bus bar with a high-voltage insulating material and open a window in a part that needs to be electrically connected with the outside. The above content can be referred to the prior art and is not shown in detail in the figure. The control terminal of the power element or the like are not shown in the figure either, which can also refer to the prior art. In addition, in practical applications, the laminated bus bars may not be limited to one unit, but may have a plurality of double-layered structures, to achieve different currents and circuit requirements. The surface of the laminated bus bars may also set graphic regions according to circuit requirements. In addition, components and parts, such as a gate resistor, a driver chip, and the like are provided thereon, which is not specifically limited in this exemplary embodiment.

It should be noted that in <FIG>, the two-layer laminated bus bar is taken as an example for description. However, when the power unit also has the third terminal and is a three-port structure, the laminated bus bar may also be set as three layers. For example, the third layer of the laminated bus bars may be the fifth bus bar in the above exemplary embodiment, and the third end of the power unit is connected with the fifth bus bar. Alternatively, the laminated bus bar is provided in two layers, but one of the layers is provided to be two bus bars arranged in parallel, and the additionally arranged stacked bus bar may be the fifth bus bar in the above exemplary embodiment, and the third terminal of the power unit is connected to the fifth bus bar.

In the above power module, the insulation between the power module terminal and the external circuit also needs to be considered. Referring to <FIG>, a partial structure of the laminated bus bars inside the power module is shown in the solid box, and a partial structure of the external circuit (such as the above-mentioned third bus bar, the fourth bus bar, etc.) is shown in the dashed box. The distance d between the partial structure of the laminated bus bar inside the power module and the partial structure of the external circuit is only for indicating that the two are separated in the figure. In actual use, the two structures will be closely fit together by mechanical compression or the like, to obtain better loop inductance.

Further, in order to ensure a good inductance control effect, a thickness T of the surface insulating layer located between the above two (for example, between the third bus bar and the rear portion of the second bus bar, or between the fourth bus bar and the rear portion of the fifth bus bar) is generally less than <NUM>. In the present exemplary embodiment, it is less than <NUM> preferably. At the same time, in order to ensure a good insulation effect, the surface insulation layer can be laminated by two insulation layers or even more insulation layers, thereby avoiding the failure of voltage isolation caused by cut through at the same position due to raw materials and process defects. The material of the surface insulating layer may be polyester, polyimide, epoxy resin, polyvinyl fluoride, silicone and not limited thereto. In addition, as for the insulating layer of the same material, the insulating distance X in the figure is greater than <NUM>, and preferably greater than <NUM>. In addition, the insulation treatment of the surface of the laminated bus bars and the insulation edge of the metal edge covering can also be performed. This section can refer to the prior art and will not be described again here.

In <FIG>, the current direction may flow from the D position to the E position and then flow into the terminal F of the power module. After being distributed by the internal circuit of the power module, the current flows from the I position and flows to the terminal J of the module, and then flows to the external allocation unit K. In the above F position, it is necessary to realize the conversion of the bus bars of different layers, to lift the pin terminals to the same plane. In the case of a small current, the thickness of the laminated bus bars is usually relatively thin, and each pin terminal can be lifted to the same plane by through-hole plating. However, in the case of a large current, on the one hand, the thickness of the electroplating layer itself is limited and it is difficult to apply to a large current. On the other hand, the thickness of the laminated bus bar itself is also large, so it is difficult to use the through-hole plating manner to raise each pin terminal to the same plane. Based on this, a pin terminal (such as a T-type pin terminal, etc.) may be directly riveted to the lower layer of the laminated bus bars, so that all the pin terminals can reach the same plane. Of course, a metal gasket may also be directly provided on the lower layer of the laminated bus bars, to lift the pin terminals to the same plane. The metal gasket can be fixed on the lower layer of the laminated bus bars by the connecting material (such as conductive adhesive, welding material, etc.), or the metal gasket can be directly placed in the corresponding position when the system is assembled and then fixedly connected to the lower layer of the laminated bus bars through a stud installed by the system.

It should be noted that, in the above exemplary embodiments, the power module may further include typical components or structures, such as a chip, a potting glue, a housing and so on, all of which belong to a portion that can be configured by a person skilled in the art according to requirements, which is not specifically limited by the present exemplary embodiment.

Further, embodiments of the present disclosure also provide a power module assembly structure, wherein the power module assembly structure may include: a substrate; two power elements connected in serial disposed on the substrate; a first conductive strip and a second conductive strip. In the embodiment, the two power elements connected in series are disposed on the substrate. The first conductive strip and the second conductive strip are coupled to the two power elements respectively. In the embodiment, the first conductive strip and the second conductive strip extend from the substrate to a first side of the power module assembly structure in parallel and two connecting terminals are formed on the first side. An extending portion exists between the two connecting terminals, and the extending portion overlaps an external conductive strip to reduce a parasitic inductance between the two connecting terminals.

Claim 1:
A system comprising an external circuit and a component structure configured to connect a power module and the external circuit, the component structure comprising:
a first bus bar (<NUM>, <NUM>, <NUM>), having one end extending to a first plane (A) to form a first connecting terminal (<NUM>, <NUM>, <NUM>); and
a second bus bar (<NUM>, <NUM>, <NUM>), comprising a front portion of the second bus bar (<NUM>, <NUM>, <NUM>) and a rear portion of the second bus bar (<NUM>, <NUM>, <NUM>), wherein the front portion of the second bus bar is laminated in parallel with the first bus bar, and the rear portion of the second bus bar is extended to a second plane (B) to form a second connecting terminal (<NUM>, <NUM>, <NUM>);
wherein the external circuit comprises a third bus bar (<NUM>, <NUM>, <NUM>), one end of the third bus bar (<NUM>, <NUM>, <NUM>) is provided with an input terminal (<NUM>, <NUM>) stacked and connected with the second connecting terminal (<NUM>, <NUM>), and another end of the third bus bar (<NUM>, <NUM>, <NUM>) is provided with an output terminal (<NUM>, <NUM>), wherein the third bus bar is settled in parallel with the rear portion of the second bus bar, thereby reducing a parasitic inductance between the first connecting terminal and the second connecting terminal;
wherein the first connecting terminal (<NUM>, <NUM>, <NUM>) overlaps the second bus bar (<NUM>, <NUM>, <NUM>);
wherein the system is characterized in that,
the output terminal (<NUM>, <NUM>) is stacked and connected with the first connecting terminal (<NUM>, <NUM>), wherein the component structure and the external circuit are positioned such that a current of the external circuit successively flows through the third bus bar (<NUM>, <NUM>, <NUM>), the output terminal (<NUM>, <NUM>), the first connecting terminal (<NUM>, <NUM>, <NUM>), the first bus bar (<NUM>, <NUM>, <NUM>), the power module, the front portion of the second bus bar (<NUM>, <NUM>, <NUM>), the rear portion of the second bus bar (<NUM>, <NUM>, <NUM>), the second connecting terminal (<NUM>, <NUM>, <NUM>), and the input terminal (<NUM>, <NUM>), and flows into the external circuit, wherein a conducting direction of said current in the rear portion of the second bus bar is in parallel with that of the third bus bar, and is opposite to that of the third bus bar.