Patent Description:
The surface light-emission type semiconductor light-emitting device is required to have a large light output.

<CIT> discloses a surface emission quantum cascade laser comprising an active layer and a first semiconductor layer. The first semiconductor layer is provided on the active layer, and has a first face. The first face includes: an internal region where first pits form first two-dimensional grid; and an outer peripheral region where second pits form a second two-dimensional grid. A grid spacing of the first pits is m times that of the second pits. The two-dimensional shape of the first pits is asymmetric with respect to a line which runs through a center of mass of the first two-dimensional shape, and which is in parallel with at least one side of the first two-dimensional grid. The two-dimensional shape of the second pits is symmetric with respect to each of lines which run through a center of mass of the two-dimensional shape, and which are in parallel with all of sides of the second two-dimensional grid. A laser beam has an emission wavelength corresponding to the grid spacing of the second pits and is emitted from the internal region mostly in a vertical direction to the active layer.

<CIT> discloses a semiconductor light emitting device comprising a plurality of compound semiconductor layers, a first electrode, a second electrode layer, and a conductive support member. The plurality of compound semiconductor layers comprises a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer. The first electrode is formed under the compound semiconductor layer. The second electrode layer is formed on the compound semiconductor layer. The second electrode layer has an unevenness. The conductive support member is formed on the second electrode layer.

The present invention provides a surface light-emission type semiconductor light-emitting device, in accordance with claim <NUM>.

According to an embodiment, a surface light-emission type semiconductor light-emitting device includes a first semiconductor layer; a light-emitting layer provided on the first semiconductor layer; a second semiconductor layer provided on the light-emitting layer; an uneven structure provided on the second semiconductor layer, the uneven structure including a protrusion and a recess next to the protrusion; a first metal layer covering the uneven structure; and a second metal layer provided between the uneven structure and the first metal layer. The second metal layer is provided on one of a bottom surface of the recess, an upper surface of the protrusion, or a side surface of the protrusion. The second metal layer has a reflectance for light radiated from the light-emitting layer, which is less than a reflectance of the first metal layer for the light.

Embodiments will now be described with reference to the drawings. The same portions inside the drawings are marked with the same numerals; a detailed description is omitted as appropriate; and the different portions are described. The drawings are schematic or conceptual; and the relationships between the thicknesses and widths of portions, the proportions of sizes between portions, etc., are not necessarily the same as the actual values thereof. The dimensions and/or the proportions may be illustrated differently between the drawings, even in the case where the same portion is illustrated.

There are cases where the dispositions of the components are described using the directions of XYZ axes shown in the drawings. The X-axis, the Y-axis, and the Z-axis are orthogonal to each other. Hereinbelow, the directions of the X-axis, the Y-axis, and the Z-axis are described as an X-direction, a Y-direction, and a Z-direction. Also, there are cases where the Z-direction is described as upward and the direction opposite to the Z-direction is described as downward.

<FIG> is a schematic cross-sectional view showing a surface light-emission type semiconductor light-emitting device <NUM> according to an embodiment. The semiconductor light-emitting device <NUM> is, for example, a surface light-emitting QCL (Quantum Cascade Laser).

The semiconductor light-emitting device <NUM> includes a semiconductor substrate <NUM>, a first semiconductor layer <NUM>, a light-emitting layer <NUM>, a second semiconductor layer <NUM>, a third semiconductor layer <NUM>, a front electrode <NUM>, an insulating film <NUM>, and a back electrode <NUM>.

The semiconductor substrate <NUM> is, for example, an n-type indium phosphide (InP) substrate. The semiconductor substrate <NUM> may be an n-type GaAs substrate.

The first semiconductor layer <NUM> is provided on the semiconductor substrate <NUM>. The first semiconductor layer <NUM> is, for example, an n-type InP layer. A buffer layer may be provided between the semiconductor substrate <NUM> and the first semiconductor layer <NUM>.

The light-emitting layer <NUM> is provided on the first semiconductor layer <NUM>. For example, the light-emitting layer <NUM> includes a quantum well structure that generates intersubband transitions of carriers. The light-emitting layer <NUM> includes, for example, an n-type Group III-V compound semiconductor doped with silicon, and emits light due to subband transitions of electrons.

The light-emitting layer <NUM> includes, for example, a quantum well structure in which a quantum well layer <NUM> and a barrier layer <NUM> are alternately stacked in a direction, e.g., a Z-direction, that is orthogonal to the upper surface of the first semiconductor layer <NUM>. The quantum well layer <NUM> includes, for example, a first compound semiconductor (InGaAs); and the barrier layer <NUM> includes, for example, a second compound semiconductor (AlInAs).

Here, InGaAs is a compound semiconductor of the compositional formula InxGa<NUM>-xAs (<NUM> < x < <NUM>). AlInAs is another compound semiconductor of the compositional formula AlyIn<NUM>-yAs (<NUM> < y < <NUM>).

The light-emitting layer <NUM> includes, for example, a light-emitting multi-quantum well region that includes the first and second compound semiconductors, and an injection multi-quantum well region that includes other first and second compound semiconductors. The light-emitting layer <NUM> includes multiple pairs of the light-emitting multi-quantum well region and the injection multi-quantum well region that are stacked alternately.

The second semiconductor layer <NUM> is provided on the light-emitting layer <NUM>. The second semiconductor layer <NUM> is, for example, an n-type InP layer.

The third semiconductor layer <NUM> is provided on the second semiconductor layer <NUM>. The third semiconductor layer <NUM> is, for example, an n-type InGaAs layer. A photonic crystal (PC) is provided in the third semiconductor layer <NUM>. The photonic crystal (hereinbelow, the PC 50f) includes an uneven structure that has a constant periodicity. The PC 50f acts as a waveguide which guides the light radiated from the light-emitting layer <NUM> in a direction perpendicular to the upper surface of the semiconductor substrate <NUM>.

The PC 50f functions as a photonic crystal that selects the wavelength and controls the emission angle of the laser light. The PC50f is designed so that the light having desired wavelength resonates inside the light-emitting layer <NUM> and induces laser oscillation. The laser light is emitted in a direction that is substantially perpendicular to the boundary between the light-emitting layer <NUM> and the first semiconductor layer <NUM>. Here, "substantially perpendicular" means that the angle with respect to the boundary between the light-emitting layer <NUM> and the first semiconductor layer <NUM> is not less than <NUM>° and not more than <NUM>°. The PC 50f includes multiple recesses that are, for example, periodically arranged as a two-dimensional diffraction grating. For example, the recesses of the PC 50f are right-triangular in the top-view of the third semiconductor layer <NUM>. The shapes of the recesses and the arrangement of the protrusions are not limited to those of the examples.

The front electrode <NUM> is provided on the third semiconductor layer <NUM>. The front electrode <NUM> covers the PC 50f. The front electrode <NUM> reflects the light radiated from the light-emitting layer <NUM>.

The semiconductor light-emitting device <NUM> has a mesa structure that includes the first semiconductor layer <NUM>, the light-emitting layer <NUM>, the second semiconductor layer <NUM>, and the third semiconductor layer <NUM>. The insulating film <NUM> covers the side surface of the mesa structure. The insulating film <NUM> is, for example, a silicon oxide film. The insulating film <NUM> also covers the surface of the semiconductor substrate <NUM> with a portion of the first semiconductor layer <NUM> interposed.

The back electrode <NUM> is provided on a back surface 10B of the semiconductor substrate <NUM>. The back electrode <NUM> includes, for example, a titanium (Ti) layer <NUM> and a gold (Au) layer <NUM>. The Ti layer <NUM> is provided between the semiconductor substrate <NUM> and the Au layer <NUM>.

In the semiconductor light-emitting device <NUM>, a driving current flows between the front electrode <NUM> and the back electrode <NUM>, and the carriers (the electrons) are injected into the light-emitting layer <NUM>. The light-emitting layer <NUM> emits QCL light guided by the PC 50f. The QCL light is generated by stimulated emission due to the energy relaxation of the carriers in the quantum well layer <NUM>. The QCL light is radiated externally from the back surface 10B of the semiconductor substrate <NUM>. The wavelength of the QCL light is, for example, <NUM> micrometers (µm).

<FIG> are perspective views schematically showing the semiconductor light-emitting device <NUM> according to the embodiment. <FIG> is a schematic view showing the backside of the semiconductor device <NUM>. <FIG> is a schematic view showing the front side of the semiconductor device <NUM>.

As shown in <FIG>, the QCL light is radiated from the back surface 10B of the semiconductor substrate <NUM>. The back electrode <NUM> surrounds the region where the QCL light is radiated.

As shown in <FIG>, a mesa-shaped light-emitting region LER is provided at the front side of the semiconductor substrate <NUM>. The insulating film <NUM> covers the side surface of the light-emitting region LER and the front side of the semiconductor substrate <NUM>.

The light-emitting region LER includes the first semiconductor layer <NUM>, the light-emitting layer <NUM>, the second semiconductor layer <NUM>, and the third semiconductor layer <NUM>. The front electrode <NUM> covers the PC 50f at the upper surface of the light-emitting region LER. For example, the upper surface of the light-emitting region LER has a square shape of which the length of one side is <NUM>.

<FIG> are schematic cross-sectional views illustrating the structures of the PC 50f in the semiconductor light-emitting device <NUM> according to the embodiment. The PC 50f may have one of the structures shown in <FIG>.

The PC 50f is provided at the upper side of the third semiconductor layer <NUM> opposite to the second semiconductor layer <NUM>. The PC 50f includes a protrusion 50a and a recess 50b. Multiple protrusions 50a are provided; and the recess 50b is provided between adjacent protrusions 50a. The multiple protrusions 50a are arranged in a direction, e.g., an X-direction, that is along the upper surface of the second semiconductor layer <NUM>. The protrusions 50a are arranged in the X-direction at a constant period. The protrusions 50a also are arranged at a constant period in a Y-direction (not-illustrated). For example, the period of the protrusions 50a is less than the wavelength of the QCL light in each of the X-direction and the Y-direction.

The front electrode <NUM> includes a first metal layer <NUM> and a second metal layer <NUM> and covers the PC 50f. The first metal layer <NUM> is, for example, a gold (Au) layer. The second metal layer <NUM> is, for example, a titanium (Ti) layer. Alternatively, the second metal layer <NUM> may be a nickel (Ni) layer or a chrome (Cr) layer.

The second metal layer <NUM> is provided between the third semiconductor layer <NUM> and the first metal layer <NUM>. The adhesion strength of the second metal layer <NUM> to the third semiconductor layer <NUM> is greater than the adhesion strength of the first metal layer <NUM> to the third semiconductor layer <NUM>. In other words, the adhesion strength of the second metal layer <NUM> to the uneven structure that includes the protrusion 50a and the recess 50b is greater than the adhesion strength of the first metal layer <NUM> to the uneven structure.

The adhesion strength of the second metal layer <NUM> to the uneven structure decreases when the layer thickness of the second metal layer <NUM> is thin. For example, the adhesion strength of the second metal layer <NUM> to the uneven structure becomes insufficient when the layer thickness of the Ti layer is not more than <NUM> nanometers (nm).

On the other hand, the reflectance of the first metal layer <NUM> for the QCL light radiated by the light-emitting layer <NUM> is greater than the reflectance of the second metal layer <NUM> for the QCL light. In other words, the absorptance of the second metal layer <NUM> for the QCL light is greater than the absorptance of the first metal layer <NUM> for the QCL light.

For example, when the layer thickness of the Ti layer (the second metal layer <NUM>) is <NUM>, the reflectance for the QCL light of the electrode in which the Ti layer and the Au layer (the first metal layer <NUM>) are stacked is <NUM>% less than the reflectance for the QCL light of an electrode of the Au layer without the Ti layer interposed.

In the example shown in <FIG>, the second metal layer <NUM> is provided at the upper surface of the protrusion 50a but is not provided on the side surface of the protrusion 50a and on the bottom surface of the recess 50b. The layer thickness of the second metal layer <NUM> is, for example, <NUM>. The first metal layer <NUM> contacts the side surface of the protrusion 50a and the bottom surface of the recess 50b. The reflectance of the front electrode <NUM> shown in <FIG> is, for example, about <NUM>% greater than a reflectance in the case where the layer thickness of the second metal layer <NUM> is <NUM> and the second metal layer <NUM> covers the entire surface of the uneven structure.

In the example shown in <FIG>, the second metal layer <NUM> is provided on the bottom surface of the recess 50b but is not provided on the upper surface and the side surface of the protrusion 50a. The layer thickness of the second metal layer <NUM> is, for example, <NUM>. The first metal layer <NUM> contacts the upper surface and the side surface of the protrusion 50a. Also, in the example, the reflectance of the front electrode <NUM> can be about <NUM>% greater than the reflectance in the case where the second metal layer <NUM> covers the entire surface of the uneven structure.

In the example shown in <FIG>, the second metal layer <NUM> is provided on the side surface of the protrusion 50a but is not provided on the upper surface of the protrusion 50a and the bottom surface of the recess 50b. The layer thickness of the second metal layer <NUM> is, for example, <NUM>. The first metal layer <NUM> contacts the upper surface of the protrusion 50a and the bottom surface of the recess 50b. Also, in the example, the reflectance of the front electrode <NUM> can be greater than the reflectance in the case where the second metal layer <NUM> covers the entire surface of the uneven structure.

In the examples shown in <FIG>, the effective refractive index difference between the recess 50b and the protrusion 50a of the PC 50f can be increased by partially providing the second metal layer <NUM>. The function of the PC 50f can be improved thereby.

<FIG> are schematic cross-sectional views showing a method for manufacturing the PC 50f according to the embodiment.

As shown in <FIG>, multiple second metal layers <NUM> are formed on the third semiconductor layer <NUM>. For example, the second metal layers <NUM> are arranged at a constant periodicity in each of the X-direction and the Y-direction along the upper surface of the third semiconductor layer <NUM>.

As shown in <FIG>, the protrusion 50a and the recess 50b are formed by selectively removing the third semiconductor layer <NUM>. The second metal layer <NUM> can be used as an etching mask. Subsequently, the first metal layer <NUM> is formed to cover the second metal layers <NUM> and the inner surfaces of the recesses 50b. As shown in <FIG>, the PC 50f and the front electrode <NUM> can be formed thereby.

<FIG> are schematic cross-sectional views showing a method for manufacturing the PC 50f according to a first modification of the embodiment.

As shown in <FIG>, the protrusion 50a and the recess 50b are formed by selectively removing the third semiconductor layer <NUM> after forming an etching mask <NUM> on the third semiconductor layer <NUM>. The etching mask <NUM> is, for example, a photoresist.

As shown in <FIG>, the second metal layer <NUM> is formed on the third semiconductor layer <NUM>. The second metal layer <NUM> is formed using, for example, a deposition method such as vacuum vapor deposition that has high directivity. Thereby, the second metal layer <NUM> is formed on the etching mask <NUM> and on the bottom surface of the recess 50b. In this process, the deposition of the second metal layer <NUM> is suppressed on the side surface of the protrusion 50a.

As shown in <FIG>, the second metal layer <NUM> that is formed on the etching mask <NUM> is removed together with the etching mask <NUM>. Thereby, the second metal layer <NUM> remains on the bottom surface of the recess 50b; and the upper surface and the side surface of the protrusion 50a are exposed.

Then, the first metal layer <NUM> is formed to cover the protrusion 50a and the bottom surface of the recess 50b. The PC 50f and the front electrode <NUM> can be formed thereby as shown in <FIG>.

<FIG> are schematic cross-sectional views showing a method for manufacturing the PC 50f according to a second modification of the embodiment.

As shown in <FIG>, the second metal layer <NUM> is formed to cover the protrusion 50a and the recess 50b. The second metal layer <NUM> is formed so that the a space remains in the recess 50b.

For example, the protrusion 50a and the recess 50b are formed by selectively removing the third semiconductor layer <NUM>. The third semiconductor layer <NUM> is removed using the etching mask <NUM> (referring to <FIG>). The second metal layer <NUM> is formed after removing the etching mask <NUM>. The second metal layer <NUM> is formed using a deposition method such as sputtering and like that has good step coverage.

As shown in <FIG>, the second metal layer <NUM> is removed so that the portion formed on the side surface of the protrusion 50a remains. The second metal layer <NUM> is removed using, for example, anisotropic RIE (Reactive Ion Etching). Then, the first metal layer <NUM> is formed to cover the protrusion 50a and the bottom surface of the recess 50b. As shown in <FIG>, the PC 50f and the front electrode <NUM> can be formed thereby.

<FIG> are schematic cross-sectional views showing a method for manufacturing the PC 50f according to a third modification of the embodiment.

As shown in <FIG>, an insulating film <NUM> is formed to cover the protrusion 50a and the recess 50b. The insulating film <NUM> is formed so that a space remains in the recess 50b. The insulating film <NUM> is, for example, a silicon oxide film. Then, a sacrificial film <NUM> is formed on the insulating film <NUM>. The sacrificial film <NUM> fills the recess 50b. The sacrificial film <NUM> is, for example, a silicon nitride film.

As shown in <FIG>, the insulating film <NUM> and the sacrificial film <NUM> are removed so that the portion formed in the recess 50b remains; and the upper surface of the protrusion 50a is exposed.

As shown in <FIG>, the second metal layer <NUM> is formed after removing the sacrificial film <NUM>. The second metal layer <NUM> is formed using, for example, a deposition method such as vacuum vapor deposition that has high directivity. The second metal layer <NUM> is formed on the upper surface of the protrusion 50a and the bottom surface of the recess 50b. The second metal layer <NUM> is formed on the bottom surface of the recess 50b with the insulating film <NUM> interposed.

As shown in <FIG>, the portion of the second metal layer <NUM> that is formed on the bottom surface of the recess 50b is removed together with the insulating film <NUM>. The insulating film <NUM> is removed using, for example, wet etching. Subsequently, the first metal layer <NUM> is formed to cover the protrusion 50a and the bottom surface of the recess 50b. As shown in <FIG>, the PC 50f and the front electrode <NUM> can be formed thereby.

<FIG> are schematic cross-sectional views showing the PC 50f according to modifications of the embodiment.

In the example shown in <FIG>, the PC 50f is formed by removing the third semiconductor layer <NUM> so that the second semiconductor layer <NUM> is exposed at the bottom surface of the recess 50b. The second metal layer <NUM> is provided at the upper surface of the protrusion 50a. The first metal layer <NUM> is provided to cover the protrusion 50a and the recess 50b. The first metal layer <NUM> contacts the second semiconductor layer <NUM> exposed at the bottom surface of the recess 50b.

In the example shown in <FIG>, the second metal layer <NUM> is provided at the upper surface of the protrusion 50a of the PC 50f. A third metal layer <NUM> is provided on the side surface of the protrusion 50a and on the bottom surface of the recess 50b. The third metal layer <NUM> is provided between the first metal layer <NUM> and the third semiconductor layer <NUM>. The layer thickness of the third metal layer <NUM> is less than the layer thickness of the second metal layer <NUM>. The third metal layer <NUM> includes, for example, the same material as the second metal layer <NUM>.

In the example as well, the reflectance of the front electrode <NUM> can be increased by providing the third metal layer <NUM> with the layer thickness less than the layer thickness of the second metal layer <NUM>. In the PC 50f according to the embodiment, a prescribed adhesion strength between the PC 50f and the front electrode <NUM> can be ensured by providing the second metal layer <NUM>. However, when the first metal layer <NUM> directly contacts the third semiconductor layer <NUM>, a partial reduction of the adhesion strength cannot be avoided. In the example, the partial reduction of the adhesion strength at the side surface of the protrusion 50a and the bottom surface of the recess 50b can be mitigated by providing the third metal layer <NUM> between the first metal layer <NUM> and the third semiconductor layer <NUM>.

In the example shown in <FIG>, the third semiconductor layer <NUM> is not provided, and the PC 50f is provided at the upper surface of the second semiconductor layer <NUM> at the side opposite to the light-emitting layer <NUM>.

The third metal layer <NUM> shown in <FIG> is applicable to the examples shown in <FIG>. Although, in the examples of the PC 50f shown in <FIG>, the second metal layer <NUM> is provided at the upper surface of the protrusion 50a, the embodiments are not limited thereto. In other words, the features shown in <FIG> are applicable even when the second metal layer <NUM> is provided on the bottom surface of the recess 50b or on the side surface of the protrusion 50a.

<FIG> are schematic cross-sectional views showing surface light-emission type semiconductor light-emitting devices <NUM> and <NUM> according to modifications of the embodiment.

In the semiconductor light-emitting device <NUM> shown in <FIG>, the light-emitting region LER has the mesa structure; and the front electrode <NUM> covers the side surface of the light-emitting region LER with the insulating film <NUM> interposed. Thereby, the light that is radiated toward the outside from the side surface of the light-emitting region LER is returned to the interior of the light-emitting region LER; and the intensity of the QCL light can be increased.

Also, in the semiconductor light-emitting device <NUM> shown in <FIG>, the light-emitting region LER has the mesa structure; and the front electrode <NUM> covers the side surface of the light-emitting region LER with the insulating film <NUM> interposed. In the example, the front electrode <NUM> includes the portion that is provided on the side surface of the light-emitting region LER without the second metal layer <NUM> interposed; and the first metal layer <NUM> directly contacts the insulating film <NUM>. The reflectance at the portion of the front electrode <NUM> that is provided on the side surface of the light-emitting region LER can be improved thereby; and the intensity of the QCL light can be further increased.

Claim 1:
A surface light-emission type semiconductor light-emitting device (<NUM>, <NUM>, <NUM>), the device comprising:
a first semiconductor layer (<NUM>);
a light-emitting layer (<NUM>) provided on the first semiconductor layer (<NUM>);
a second semiconductor layer (<NUM>) provided on the light-emitting layer (<NUM>);
an uneven structure (50f) provided on the second semiconductor layer (<NUM>), the uneven structure (50f) includes a plurality of protrusions (50a), and recesses (50b) next to said protrusions, and the plurality of protrusions (50a) are arranged at a constant periodicity in a direction along an upper surface of the second semiconductor layer (<NUM>) so that a photonic crystal structure is configured by the plurality of protrusions (50a),
a first metal layer (<NUM>) covering the uneven structure (50f); and
a second metal layer (<NUM>) provided between the uneven structure (50f) and the first metal layer (<NUM>), the second metal layer (<NUM>) being provided on one of a bottom surface of the recesses (50b), an upper surface of the protrusions (50a), or a side surface of the protrusions (50a),
a reflectance of the second metal layer (<NUM>) for light radiated from the light-emitting layer (<NUM>) being less than a reflectance of the first metal layer (<NUM>) for the light.