Patent Description:
Gallium nitride (GaN)-based blue or ultraviolet (UV) light emitting diodes (LEDs) have been used in a wide range of applications. In particular, various kinds of LED packages for emitting mixed color light, for example, white light, have been applied to backlight units, general lighting, and the like.

Since optical power of the LED package generally depends upon luminous efficiency of an LED chip, numerous studies have focused on development of LED chips having improved luminous efficiency. For example, to improve light extraction efficiency, a rough surface may be formed on a light emitting plane of the LED chip, or the shape of an epitaxial layer or transparent substrate may be adjusted.

Alternatively, a metal reflector such as Al may be disposed on a chip mounting plane opposite to the light emitting plane to reflect light traveling towards the chip mounting plane, which may improve luminous efficiency. Namely, the metal reflector may be used to reflect light and reduce optical loss, improving luminous efficiency. However, reflective metals may suffer from deterioration in reflectivity upon oxidation and the metal reflector may have a relatively low reflectivity.

Accordingly, recent studies have focused on both high reflectivity and relatively stable reflective characteristics of a reflective layer using a laminate of materials having different indices of refraction alternately stacked one above another.

However, such an alternating lamination structure may have high reflectivity in a narrow wavelength band and low reflectivity in other wavelength bands. Accordingly, for an LED package that uses light subjected to wavelength conversion through phosphors or the like to emit white light, the alternating lamination structure may not provide effective reflective characteristics with respect to the light subjected to wavelength conversion and may have limited ability to improve luminous efficiency of the LED package. Further, the alternating lamination structure may exhibit high reflectivity to vertically incident light, but may exhibit relatively low reflectivity to light having a relatively high angle of incidence.

The wavelength band with high reflectivity may be widened by increasing the total number of layers stacked in the alternating lamination structure and adjusting the thickness of each of the layers. However, a large number of layers in the alternating lamination structure may make it difficult to adjust the thickness of each of the layers, and changing the total number of layers may change the thickness of each of the layers, thereby making it difficult to determine an optimal thickness of each of the layers.

Patent literature <CIT> discloses a nitride semiconductor light emitting device including: a dielectric layered film over a substrate, the dielectric layered film being formed by stacking a plurality of dielectric films having different compositions; a semiconductor thin film formed of a single crystal over the dielectric layered film; and a pn junction diode structure over the semiconductor thin film, the pn junction diode structure being formed of a nitride semiconductor.

Non-aatent Literature, "<NPL>, discloses Nitride-based light-emitting diodes (LEDs) with a hybrid backside reflector combining a TiO SiO distributed Bragg reflector (DBR) and an AI mirror.

Non-patent Literature, "<NPL>, discloses LEDs with a backside DBR comprising a plurality of first dielectric pairs and a plurality of second dielectric pairs.

Exemplary embodiments of the present invention provide an LED chip having improved luminous efficiency.

Exemplary embodiments of the present invention provide an LED chip that may improve luminous efficiency of an LED package.

Exemplary embodiments of the present invention provide a light emitting diode chip and a fabrication method thereof, which facilitates determination of an optical thickness of each of the layers and lamination sequence of the layers in an alternating lamination structure.

Additional features of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention.

More specifically, a light emitting diode chip according to the present invention is provided as defined by independent claim <NUM>. In addition, a method for fabricating a light emitting diode chip according to the present invention is provided as defined by independent claim <NUM>.

The embodiments are also provided in dependent claims.

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the invention, and together with the description serve to explain the principles of the invention.

The invention is described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the exemplary embodiments set forth herein. Rather, these exemplary embodiments are provided so that this disclosure is thorough and will fully convey the scope of the invention to those skilled in the art. In the drawings, the sizes and relative sizes of layers and regions may be exaggerated for clarity. Like reference numerals in the drawings denote like elements.

It will be understood that when an element such as a layer, film, region or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present.

<FIG> is a side sectional view of a light emitting diode (LED) chip <NUM> according to an exemplary embodiment of the present invention.

Referring to <FIG>, the LED chip <NUM> includes a substrate <NUM>, a light emitting structure <NUM>, an alternating lamination bottom structure <NUM>, an alternating lamination top structure <NUM>, and an alternating lamination under structure <NUM>. The light emitting diode chip <NUM> may further include a buffer layer <NUM>, a transparent electrode <NUM>, a first electrode pad <NUM>, a second electrode pad <NUM>, an interfacial layer <NUM>, and a metal reflector <NUM>.

The substrate <NUM> may be selected from any substrate, for example, a sapphire substrate or a SiC substrate. The substrate <NUM> may have a pattern on an upper surface thereof, as in a patterned sapphire substrate (PSS) having a pattern on an upper surface thereof. The substrate <NUM> may be a growth substrate suited for growing GaN-based compound semiconductor layers.

The light emitting structure <NUM> is located on the substrate <NUM>. The light emitting structure <NUM> includes a first conductivity type semiconductor layer <NUM>, a second conductivity type semiconductor layer <NUM>, and an active layer <NUM> interposed between the first and second conductivity type semiconductor layers <NUM> and <NUM>. Herein, the first conductivity type and the second conductivity type refer to opposite conductivity types. For example, the first conductivity type may be n-type and the second conductivity type may be p-type, or vice versa.

The first conductivity type semiconductor layer <NUM>, the active layer <NUM> and the second conductivity type semiconductor layer <NUM> may be formed of a GaN-based compound semiconductor material, that is, (Al, In, Ga)N. The active layer <NUM> may be composed of elements emitting light at desired wavelength, for example, UV or blue light. As shown, the first conductivity type semiconductor layer <NUM> and/or the second conductivity type semiconductor layer <NUM> have a single layer structure or a multilayer structure. Further, the active layer <NUM> may have a single quantum well structure or a multi- quantum well structure. The buffer layer <NUM> may be interposed between the substrate <NUM> and the first conductive type semiconductor layer <NUM>.

These semiconductor layers <NUM>, <NUM> and <NUM> may be formed by metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE), and may be patterned to expose some regions of the first conductive type semiconductor layer <NUM> by photolithography and etching.

A transparent electrode layer <NUM> may be formed on the second conductivity type semiconductor layer <NUM>. The transparent electrode layer <NUM> may be formed of, for example, indium tin oxide (ITO) or Ni/Au. The transparent electrode layer <NUM> has a lower specific resistance than the second conductivity type semiconductor layer <NUM> and acts to spread electric current. The first electrode pad <NUM>, for example, an n-electrode pad, is formed on the first conductivity type semiconductor layer <NUM>, and the second electrode pad <NUM>, for example, a p-electrode pad, is formed on the transparent electrode layer <NUM>. As shown, the p-electrode pad <NUM> may be electrically connected to the second conductivity type semiconductor layer <NUM> through the transparent electrode layer <NUM>.

The alternating lamination bottom structure <NUM> is located under the substrate <NUM>. The alternating lamination bottom structure <NUM> is formed by alternately stacking a first material layer having a first refractive index, for example Ti02 (n: about <NUM>), and a second material layer having a second refractive index, for example Si02 (n: about <NUM>). The alternating lamination bottom structure <NUM> has a plurality of dielectric pairs exhibiting reflectance of <NUM>% or more with respect to incident light, which is emitted from the active layer, at an angle of incidence of <NUM> degrees - <NUM> degrees. Here, the plurality of dielectric pairs is formed to exhibit high reflectivity at wavelengths in the range of, for example, <NUM> - <NUM> run.

For example, as shown in <FIG>, the plurality of dielectric- pairs include a plurality of first dielectric pairs composed of the first material layer and the second material layer each having an optical thickness less than λ/<NUM> (<NUM>. 25λ), at least one second dielectric pair composed of the first material layer and the second material layer, one of which has an optical thickness less than λ/<NUM> and the other of which has an optical thickness greater than λ/<NUM>, and a plurality of third dielectric pairs composed of the first material layer and the second material layer each having an optical thickness greater than λ/<NUM>, where λ is a central wavelength of the visible light spectrum. In accordance with the present invention, the central wavelength λ is <NUM>.

As can be seen from a graph of <FIG>, the plurality of first dielectric pairs may be ocated farther from the substrate <NUM> than the plurality of third dielectric pairs. As shown in <FIG>, as the sequence of dielectric pairs increases from <NUM> to <NUM>, the distance from the substrate increases. Alternatively, the plurality of first dielectric pairs may be located closer to the substrate than the plurality of third dielectric pairs.

The at least one second dielectric pair (inside the dotted circle) is disposed near the center of the alternating lamination bottom structure <NUM>. The at least one second dielectric pair may be the (n/<NUM>)th layer, wherein n = the total number of layers in the alternating lamination bottom structure <NUM>. However, the at least one second dielectric pair may be within <NUM> or <NUM> layers of the center of the alternating lamination bottom structure <NUM>. For example, the second dielectric pairs may be the 11th and 12th dielectric pairs in the sequence of dielectric pairs, as shown in <FIG>. With reference to the at least one second dielectric pair, half or more of the first dielectric pairs may be located opposite to half or more of the third dielectric pairs. <NUM>% or more of the first dielectric pairs may be located opposite to <NUM>% or more of the third dielectric pairs with reference to the at least one second dielectric pair. In <FIG>, the total number of dielectric pairs is <NUM>, the number of first dielectric pairs is <NUM>, the number of third dielectric pairs is <NUM>, and the number of second dielectric pairs is <NUM>.

The at least one second dielectric pair may be surrounded by first dielectric pairs, as shown in <FIG>. However, the present invention is not limited thereto. Alternatively, the at least one second dielectric pair may be surrounded by third dielectric pairs, or by one first dielectric pair and one second dielectric pair.

A small number of third dielectric pairs may be interposed between the second dielectric pair and most of the first dielectric pairs, and a small number of first dielectric pairs may be interposed between the second dielectric pair and most of the third dielectric pairs.

<FIG> illustrates a simulation result of reflectance when the plurality of dielectric pairs of <FIG> is disposed on a glass substrate (n: -<NUM>). In <FIG>, the plurality of dielectric pairs are stacked as illustrated in <FIG>, in which the first layer (i.e., the layer closest to the substrate) is Ti02 and the last layer is Si02.

As shown in <FIG>, the plurality of dielectric pairs exhibit a high reflectance of <NUM>% or more in a wide range of the visible light range of <NUM> - <NUM>. This high reflectance may be maintained for blue light (for example, <NUM>) generated in the active layer <NUM> even though the angle of incidence of blue light approaches <NUM> degrees.

In addition, as shown in <FIG>, the metal reflector <NUM> may be disposed under the alternating lamination bottom structure <NUM>, so that the high reflectance of the plurality of dielectric pairs may be maintained to <NUM>% or more with respect to incident light having an angle of incidence of <NUM> degrees - <NUM> degrees by a combination of the metal reflector <NUM> and the alternating lamination bottom structure <NUM>. The metal reflector <NUM> may help to effectively dissipate heat generated by the LED during operation of the LED chip <NUM>.

The alternating lamination bottom structure <NUM> may be formed on a lower surface of the substrate <NUM> which has the light emitting structure <NUM> formed thereon. The alternating lamination bottom structure <NUM> may be formed using, for example, an ion-assisted deposition apparatus. Before using the deposition apparatus, the optical thicknesses and lamination sequence of the respective layers in the alternating lamination bottom structure <NUM> may be determined.

The optical thicknesses and lamination sequence of the respective layers in the alternating lamination bottom structure <NUM> may be determined using a simulation tool. However, since the simulation tool may not be sufficient to determine a proper number of dielectric pairs having a high reflectance of <NUM>% or more, an additional operation, for example, addition of a dielectric pair, may be performed to increase the total number of dielectric pairs and the reflectance of the dielectric pairs. Since the entire optical thickness of the dielectric pairs may be changed according to the position and optical thickness of an added single dielectric pair, it may be difficult to determine the position and the optical thickness, and a desired optical thickness may be changed.

According to the exemplary embodiments of the present invention, the plurality of dielectric pairs are divided into the first dielectric pairs, the second dielectric pairs, and the third dielectric pairs, such that the second dielectric pairs are located near the center of the alternating lamination bottom structure <NUM> with the plurality of first dielectric pairs separated from the third dielectric pairs, thereby facilitating determination of the optical thicknesses and lamination sequence of the respective layers in the structure. For example, when the plurality of first dielectric pairs is located farther from the substrate <NUM> than the second dielectric pairs, if a dielectric pair to be added pertains to the first dielectric pairs, the position of the added dielectric pair can be determined in the plurality of first dielectric pairs. As a result, the optical thicknesses and lamination sequence of the plurality of dielectric pairs may be easily determined.

Since the plurality of dielectric pairs may be formed using the ion-assisted deposition apparatus, the layers may be formed in a comparatively high density, resulting in the generation of stress between the substrate <NUM> and the alternating laminated bottom structure <NUM>. Thus, an interfacial layer <NUM> may be formed in order to enhance adhesion of the alternating laminated bottom structure <NUM> to the substrate <NUM> before the formation of the alternating laminated bottom structure <NUM>. The interfacial layer <NUM> may be formed of the same material as the alternating laminated bottom structure <NUM>, for example, Si02. Referring again to <FIG>, the alternating lamination top structure <NUM> is disposed on the light emitting structure <NUM>. As shown, the alternating laminated top structure <NUM> may cover the transparent electrode layer <NUM> and an exposed surface of the first conductive type semiconductor layer <NUM>.

The alternating laminated top structure <NUM> allows transmission of light generated in the active layer <NUM> therethrough while reflecting light entering the light emitting diode chip <NUM>, for example, light emitted from phosphors. Accordingly, the alternating laminated top structure <NUM> allows short wavelength blue light or UV light generated in the active layer <NUM> to pass therethrough, and reflects green to red light, particularly, yellow light.

<FIG> is a graph depicting simulated transmittance of the alternating laminated top structure <NUM> formed by alternately stacking Ti02 and Si02. In this simulation, the alternating laminated top structure <NUM> has <NUM> Ti02 layers and <NUM> Si02 layers alternately stacked on a glass substrate. As shown in <FIG>, by controlling the optical thicknesses of the Ti02 layer and the Si02 layer, the alternating laminated top structure <NUM> exhibits a high transmittance of <NUM>% or more with respect to near UV light or blue light having a wavelength less than <NUM>, while reflecting light having a wavelength of about <NUM> or more. Accordingly, the alternating laminated top structure <NUM> may allow transmission of light emitted from the active layer <NUM> while reflecting light in wavelength bands of green to yellow emitted from the phosphors.

The alternating laminated top structure <NUM> may also cover a mesa-sidewall and an upper surface of the light emitting diode chip <NUM> except for upper surfaces of the electrode pads <NUM>, <NUM> to protect the light emitting diode chip <NUM>.

The alternating lamination under structure <NUM> is located between the electrode pad <NUM> and the second conductivity type semiconductor layer <NUM>. The alternating lamination under structure <NUM> may be located under the transparent electrode <NUM>, but is not limited thereto. The alternating lamination under structure <NUM> may be located on the transparent electrode <NUM>. When the alternating lamination under structure <NUM> is located between the transparent electrode <NUM> and the electrode pad <NUM>, the electrode pad <NUM> may be electrically connected to the transparent electrode <NUM> through an extended portion of the electrode pad <NUM> (not shown).

The alternating lamination under structure <NUM> reflects light emitted from the active layer <NUM> and directed towards the electrode pad <NUM>. The alternating lamination under structure <NUM> is formed to exhibit high reflectivity with respect to light emitted from the active layer <NUM>, and may be formed by alternately stacking, for example, a Ti02 layer and an Si02 layer. With this configuration, the alternating lamination under structure <NUM> may prevent optical loss caused by absorption of light by the electrode pad <NUM>, thereby improving luminous efficiency.

<FIG> is a side sectional view of an LED package including an LED chip <NUM> according to an exemplary embodiment of the present invention.

Referring to <FIG>, the LED package includes a package body <NUM>, leads 61a and 61b, the light emitting diode chip <NUM>, and a molding part <NUM>. The package body <NUM> may be formed of a plastic resin.

The package body <NUM> has a mounting plane M for mounting the LED chip <NUM> and a reflection plane R, from which light emitted from the LED chip <NUM> is reflected. The LED chip <NUM> is mounted on the mounting plane M and is electrically connected to the leads 61a, 61b via bonding wires W. The LED chip <NUM> may be bonded to the mounting plane M by adhesives <NUM>, which may be formed by curing, for example, Ag epoxy pastes.

As described with reference to the embodiment shown in <FIG>, the LED chip <NUM> may include an alternating lamination bottom structure <NUM>, an alternating lamination top structure <NUM>, an alternating lamination under structure <NUM> and/or a metal reflector <NUM>.

The LED package emits light having mixed colors, for example, white light. Accordingly, the LED package may include phosphors for wavelength conversion of light emitted from the LED chip <NUM>. The phosphors may be disjposed in the molding part <NUM>, but are not limited thereto.

The alternating lamination bottom structure <NUM> and the alternating lamination under structure <NUM> of the LED chip <NUM> provide high efficiency in emission of light generated in the active layer <NUM>. Further, the alternating lamination top structure <NUM> of the LED chip <NUM> may reflect light when the light subjected to wavelength conversion by the phosphors again enters the LED chip <NUM>. Accordingly, the LED package of the present exemplary embodiment has higher luminous efficiency than conventional LED packages.

In the present exemplary embodiment, the package is described as including the light emitting diode chip <NUM> and the phosphors to emit white light, but the present invention is not limited thereto. Various LED packages for emitting white light are known in the art and the LED chip <NUM> according to the present exemplary embodiment may be applied to any LED package.

<FIG> is a side sectional view of a light emitting diode chip according to an exemplary embodiment of the present invention.

Referring to <FIG>, an LED chip <NUM> includes a plurality of light emitting structures <NUM> on a substrate <NUM>, an alternating lamination bottom structure <NUM>, a metal reflector <NUM>, and an alternating lamination top structure <NUM>.

In the present exemplary embodiment, the substrate <NUM> and the alternating lamination bottom structure <NUM> are the same as those of the LED chip described with reference to <FIG> and a detailed description thereof will thus be omitted herein. In the present exemplary embodiment, the substrate <NUM> may be an insulator, for example, a patterned sapphire substrate, for electrical isolation between the plurality of light emitting cells.

The light emitting structures <NUM> are separated from each other. Each of the light emitting structures <NUM> have the same configuration as that of the light emitting structure <NUM> described with reference to the exemplary embodiment shown in <FIG>, and a detailed description thereof will be omitted herein. Further, buffer layers <NUM> may be interposed between the light emitting structures <NUM> and the substrate <NUM>, which may be separated from each other.

A first dielectric layer <NUM> covers the overall surface of the light emitting structures <NUM>. The first dielectric layer <NUM> has openings on first conductivity type semiconductor layers <NUM> and on second conductivity type semiconductor layers <NUM>. Sidewalls of the light emitting structures <NUM> are covered by the first dielectric layer <NUM>. The first dielectric layer <NUM> also covers regions of the substrate <NUM> between the light emitting structures <NUM>. The first dielectric layer <NUM> may be formed of silicon oxide (Si02) or silicon nitride by plasma chemical vapor deposition at <NUM> - <NUM>.

Wires <NUM> are formed on the first dielectric layer <NUM>. The wires <NUM> are electrically connected to the first conductivity type semiconductor layers <NUM> and the second conductivity type semiconductor layers <NUM> through the openings. Transparent electrode layers <NUM> may be located on the second conductivity type semiconductor layers <NUM> and the wires may be connected to the transparent electrode layers <NUM>. Further, the wires <NUM> electrically connect the first conductivity type semiconductor layers <NUM> and the second conductivity type semiconductor layers <NUM> to each other in the adjacent light emitting cells <NUM> to form a serial array of the light emitting structures <NUM>. The LED chip <NUM> may have a plurality of serial arrays of light emitting cells. These serial arrays may be connected in reverse-parallel to each other and may be operated by an AC power source. Further, a bridge rectifier (not shown) may be connected to the serial array of the light emitting cells such that the light emitting cells may be operated by the bridge rectifier, which is driven by the AC power source. The bridge rectifier may be formed via electric connection of light emitting cells having the same structure as the light emitting structures <NUM> using the wires <NUM>.

Alternatively, the wires <NUM> may connect the first conductivity type semiconductor layers <NUM> or the second conductivity type semiconductor layers <NUM> of the adjacent light emitting cells to each other. Accordingly, the light emitting structures <NUM> connected in series and in parallel to each other may be provided.

The wires <NUM> may be formed of a conductive material, for example, metal or polycrystalline silicon such as a doped semiconductor material. In particular, the wires <NUM> may have a multilayer structure and may include a lower layer of Cr or Ti and an upper layer of Cr or Ti. Further, a metal layer of Au, Au/Ni or Au/Al may be interposed between the lower layer and the upper layer.

The alternating lamination top structure <NUM> may cover the wires <NUM> and the first dielectric layer <NUM>. As described above with reference to the embodiment shown in <FIG>, the alternating lamination top structure <NUM> allows light emitted from the active layer <NUM> to pass therethrough while reflecting visible light having a comparatively longer wavelength.

A phosphor layer <NUM> may be formed on the LED chip <NUM>. The phosphor layer <NUM> may be a resin layer with phosphors dispersed therein or may be a layer deposited by electrophoresis. The phosphor layer <NUM> covers the alternating lamination top structure <NUM> to convert the wavelength of light emitted from the light emitting structures <NUM>. As described with reference to <FIG>, the phosphor layer <NUM> may also be provided in a process of preparing an LED package and thus may be omitted from the LED chip <NUM>.

Meanwhile, an alternating lamination under structure may be formed between the wires <NUM> and the light emitting structures <NUM> as in <FIG>.

<FIG> is a side sectional view of a light emitting diode chip 200a including a plurality of light emitting cells according to an exemplary embodiment of the invention. Referring to <FIG>, the LED chip 200a is similar to the LED chip <NUM> described above in many regards. However, light emitting structures <NUM> of the light emitting diode chip 200a differ in shape from those of the LED chip <NUM>, thereby providing a different configuration of a first conductivity type semiconductor layer <NUM> connected to wires <NUM> from that of the LED chip <NUM>.

Specifically, in the light emitting structures <NUM> of the LED chip <NUM>, an upper surface of the first conductive type semiconductor layer <NUM> is exposed and the wire <NUM> is connected to the upper surface of the first conductive type semiconductor layer <NUM>. In the LED chip 200a of the present exemplary embodiment, the light emitting structures <NUM> are formed to have slanted side surfaces, so that a slanted side surface of the first conductivity type semiconductor layer <NUM> is exposed and the wire <NUM> is connected to the slanted side surface of the first conductivity type semiconductor layer <NUM>.

In the present exemplary embodiment, the process of exposing the upper surface of the first conductivity type semiconductor layer <NUM> is eliminated except for the process of isolating the light emitting structures <NUM> from each other, thereby simplifying the process. In addition, since there is no need to expose the upper surface of the first conductivity type semiconductor layer <NUM>, it is possible to prevent a reduction in area of the active layer <NUM>. Further, since the wires <NUM> are connected along the slanted surface of the first conductivity type semiconductor layer <NUM>, the light emitting structures <NUM> have enhanced electric current spreading performance, thereby improving forward voltage and reliability.

According to the exemplary embodiments of the present invention, the LED chip includes an alternating lamination bottom structure, a metal reflector, an alternating lamination top structure and/or an alternating lamination under structure, thereby improving luminous efficiency. Further, the alternating lamination top structure of the LED chip allows transmission of light generated in the active layer while reflecting light subjected to wavelength conversion, thereby improving luminous efficiency of an LED package.

In addition, according to the exemplary embodiments of the present invention, a plurality of dielectric pairs each composed of first and second material layers, both of which have an optical thickness less than λ/<NUM>, and a plurality of dielectric pairs each composed of the first and second materials layers, both of which have an optical thickness greater than λ/<NUM>, are disposed with reference to a dielectric pair composed of the first and second material layers, one of which has an optical thickness less than λ/<NUM> and the other of which has an optical thickness greater than λ/<NUM>, thereby facilitating determination of the optical thicknesses and lamination sequence of the respective layers in the alternating lamination bottom structure.

Claim 1:
a light emitting diode (LED) chip (<NUM>; <NUM>; 200a),
comprising: a substrate (<NUM>);
a light emitting structure (<NUM>) arranged on the substrate (<NUM>);
the light emitting structure (<NUM>) comprising a first conductivity type semiconductor layer (<NUM>),
a second conductivity type semiconductor layer (<NUM>), and an active layer (<NUM>) disposed between the first conductivity type semiconductor layer (<NUM>) and the second conductivity type semiconductor layer (<NUM>); and
an alternating lamination bottom structure (<NUM>) located under the substrate (<NUM>);
the alternating lamination bottom structure (<NUM>) comprising a plurality of dielectric pairs, each of the dielectric pairs comprising a first material layer comprising a first refractive index and a second material layer comprising a second refractive index;
the plurality of dielectric pairs comprising: a plurality of first dielectric pairs, at least one second dielectric pair, and a plurality of third dielectric pairs,
the plurality of first dielectric pairs composed of the first material layer and the second material layer, each having an optical thickness less than λ/<NUM>;
the at least one second dielectric pair composed of the first material layer and the second material layer, one of which has an optical thickness less than λ/<NUM> and the other of which has an optical thickness greater than λ/<NUM>; and
the plurality of third dielectric pairs composed of the first material layer and the second material layer each having an optical thickness greater than λ/<NUM>,
wherein λ is <NUM>,
wherein each of a number of the first dielectric pairs and a number of the third dielectric pairs is more than a number of the at least one second dielectric pair.