Patent Description:
DOEs are optical components that are operable to modify an incident light's phase and/or amplitude to create a desired optical output pattern with a specified functionality. DOEs may have a structure composed, for example, of two or more levels, formed on the surface of a substrate. The pattern may be etched, for example, into the surface of a hard substrate or replicated in a polymer on the surface of a substrate or made purely in polymer. In some instances, the depth of the pattern may be on the order of the wavelength of the light, specific to the application, and adjusted to the refractive index of the material of the DOE.

DOEs can be mass-produced by various technologies, including replication processes. As an example, in an ultra-violet (UV) replication process, the surface topology of a master structure is duplicated into a thin film of a UV-curable replication material such as an UV-curable epoxy resin on top of a substrate. In some instances, a tool (i.e., a negative copy) may be prepared from a master, and the tool then is used to UV-replicate the epoxy resin.

In the complete production chain of a wafer-scale replication, a "generation process" sometimes is used. A generation may include fabrication of a master tool, the subsequent fabrication of at least one replication tool from the master, and the subsequent fabrication of the DOEs. For industrial production, typically second or third generation replicas may be produced. One reason to introduce a generation process is to protect the relatively expensive original master.

<NPL>), discloses multi-level diffractive optical elements.

A method for providing a master tool for production of multi-level diffractive optical elements is defined in appended claim <NUM>, a diffractive optical element in claim <NUM>.

The present disclosure describes diffractive optical elements (DOEs) and master tools for producing the DOEs.

For example, in one aspect, the disclosure describes a method that includes modifying a first pixel layout design for diffractive optical elements to obtain a modified pixel layout design. The first pixel layout design comprises pixels, each of which has a shape of a regular polygon (e.g., a rectangular shape). Modifying the first pixel layout design includes approximating a contour of a cluster of pixels in the first pixel layout design by a single polygon that reduces a total number of edges relative to the contour of the cluster of pixels in the first pixel layout design. The method also includes using the modified pixel layout design to form a master tool for production of the diffractive optical elements.

Some implementations include one or more of the following features. For example, in some instances, the method included performing the modifying with respect to one or more clusters of pixels in each of different levels of the first pixel layout design. Modifying the first pixel layout design can include approximating the contour of the cluster of pixels in the first pixel layout design by a single polygon that shortens an overall length of the edges relative to the contour of the cluster of pixels in the first pixel layout design. In some instances, approximating the contour of the cluster of pixels includes replacing a zig-zag portion of a contour of the cluster of pixels with a straight line. In some cases, the method includes determining the straight line by minimizing a difference between (i) a first area of the pixels in the cluster, wherein the first area is beyond a boundary of the approximated contour defined in part by the straight line and (ii) a second area that is not part of the pixels in the cluster and that is within the boundary. In some instances, approximating the contour of the cluster of pixels includes replacing each corner node in the cluster with a respective pair of nodes. Approximating the contour of the cluster of pixels can include, for example, replacing each corner node in the cluster with a respective pair of nodes, each of which is displaced relative to the corner node. In some implementations, the method includes merging a plurality of clusters of pixels, whose contour coincides in at least one point, in the first pixel layout design to obtain a merged cluster of pixels, and approximating a contour of the merged cluster of pixels by replacing each corner node in the contour of the merged cluster with a respective pair of nodes.

The present disclosure also describes a diffractive optical element including a multi-level structured surface, at least a portion of which has a contour having straight lines, each of which has a length larger than a pixel size in the optical element, wherein the pixel size is a center-to-center distance between two adjacent pixels having a common center, and wherein the contour that changes direction at least once at an angle θ, where <NUM>° < θ < <NUM>° or <NUM>° < θ < <NUM>°.

The present disclosure further describes a master tool for manufacturing diffractive optical elements. The master tool includes a substrate having a multi-level structured surface corresponding to a pixel layout design for the diffractive optical elements, wherein at least part of the structured surface has a contour that changes direction at an angle θ, where <NUM>° < θ < <NUM>° or <NUM>° < θ < <NUM>°.

Some implementations include one or more of the following advantages. For example, in some implementations, DOEs manufactured based on a master tool obtained using a modified pixel layout design as described in this disclosure can have less line edge roughness, and thus better optical performance. In some instance, the occurrence of point tips at the pixel corners can be reduced or eliminated. Further, in some cases, the amount of memory needed to store the information for the pixel layout design can be reduced, which may make production easier. In some instances, more complicated optical designs can be achieved because less computational power is required.

Other aspects, features and advantages will be readily apparent form the following detailed description, the accompanying drawings, and the claims.

One of the initial tasks in fabricating DOEs is to determine a pixel layout design based on the desired optical performance and design criteria of the optical elements. In this context, a pixel refers to the smallest building block used when making the optical design. Typically, each pixel in the design has a regular polygonal shape (e.g., rectangular or square) whose sides may have dimensions on the order of several hundred nanometers (nm) or less. The layout design can include the pixel layout corresponding to an individual DOE, as well as the overall layout for wafer-level production. The depth of the pixels in the DOE structure may differ from one another. Thus, the pixel layout design may include two or more levels, each of which corresponds to a different depth. In some instances there may be as many four or sixteen different levels, although the particular number of levels will depend on the optical performance and functionality needed for the particular application. The pixel layout design includes a respective pattern or other layout of pixels for each level, and can include, for example, microstructures and/or nanostructures. A master tool then is prepared based on the pixel layout design. Thus, the master tool can include a multi-level structured surface that corresponds to the pixel layout design. The structured surface can be transferred (e.g., by replication) to other materials.

The inventor(s) of the present disclosure recognized that various advantages may be obtained in some cases by approximating the contour of a cluster of pixels in a particular level of the original layout design in which each of the individual pixels has the contour of a regular polygon (e.g., a rectangle or square). The overall contour of a particular cluster of original regular polygonal pixels can be approximated, for example, by a single polygon that reduces the total number of edges and shortens the total length of the edges relative to the contour of the cluster of pixels in the original layout design. The contour of the replacement polygon may have fewer corners and/or less zig-zag than the corresponding cluster of pixels in the original design. This technique may be applied to some or all clusters of pixels at each level of the pixel layout design. The approximated contours of the clusters of pixels (i.e., the replacement polygons) then can be used in a replacement layout design to form the master tool for the DOEs as described in greater detail below.

<FIG> illustrate an example in which part of the zig-zag contour (i.e., the edges) of a cluster <NUM> of pixels <NUM> in an original pixel layout design (<FIG>) is approximated by a straight line <NUM> (<FIG>). In some instances, determination of the straight line <NUM> can be achieved by minimizing the difference between (i) the area of the original pixels that would be outside the contour defined in part by the straight line <NUM> (i.e., areas <NUM>, <NUM>, <NUM>, <NUM>, <NUM> in <FIG>) and (ii) the area that would be within the contour defined in part by the straight line <NUM> and that was not part of the area of the original pixels (i.e., areas <NUM>, <NUM>, <NUM>, <NUM>, <NUM> in <FIG>). The foregoing technique also can be applied to one or more other portions of the contour of the cluster <NUM> of original pixels. The contour of the cluster <NUM> of original pixels (<FIG>) then would be replaced with a contour having an edge defined by the straight line <NUM>, as shown in <FIG>. Other portions of the zig-zag contour of the cluster <NUM> of pixels <NUM> in the original pixel layout design can be approximated by straight lines in a similar manner.

In minimizing the difference between (i) and (ii) as set forth above, further constraints also may be used in some instances. For example, the difference between (i) and (ii) can be minimized while the number of nodes (i.e., corners of the original pixels <NUM>) required to define the line <NUM> is reduced by at least a specified amount (e.g.,<NUM>% or <NUM>%) relative to the number of nodes that define the edge in the original pixel design. Thus, in the example of <FIG>, there are fourteen nodes (corners) that define the edge <NUM> in the original cluster <NUM> of pixels <NUM>, whereas only two nodes are needed to define the straight line <NUM>.

Using the foregoing technique to approximate the contour of a cluster of pixels in a particular level of the original layout design can result, in some instances, in the contour of the replacement polygon having less zig-zag than the contour of the original cluster of pixels. For example, assuming the contour of the original cluster of pixels is only along the x or y axes, portions of the contour of the replacement polygon may be inclined or slanted in the x-y plane (see <FIG>). Thus, the contour of the cluster of pixels in the modified layout design may change direction at an angle θ of ninety degrees, as well as at angles of more or less than ninety degrees (e.g., <NUM>° < θ < <NUM>° or <NUM>° < θ < <NUM>°). In some cases, the contour may change direction by an angle θ, where <NUM>° < θ < <NUM>° or <NUM>° < θ < <NUM>°. Further, in some cases, the contour may change direction by an angle θ, where <NUM>° < θ < <NUM>° or <NUM>° < θ < <NUM>°.

<FIG> though 2D illustrate another technique for approximating the contour of one or more clusters of pixels in a particular level of the original layout design. <FIG> shows an example of two clusters 120A, 120B of pixels <NUM> in the original optical design. Each cluster 120A, 120B includes a respective set of contiguous pixels, each of which has at least one edge in contact with an edge of another pixel in the same cluster. In the illustrated example, no edge of a pixel in the first cluster 120A contacts an edge of a pixel in the second cluster 120B. On the other hand, a corner of at least one pixel 122A in the first cluster 120A is in with contact a corner of a pixel 122B in the second cluster 120B. In such a situation, it may be desirable to merge the two clusters 120A, 120B into a single larger merged cluster, as discussed below.

In some implementations, to obtain the merged cluster, a sizing modification is performed in which a dimension (e.g., length of the edges) of each pixel <NUM> in both clusters 120A, 120B is increased slightly. For example, if the size of each pixel in the original design is <NUM><NUM>, the edges of each pixel can be increased, e.g., by <NUM>. As shown in <FIG>, the enlarged pixels 122X overlap one another somewhat (i.e., overlapping regions 122Y). The clusters containing the enlarged pixels 122X then can be merged into a single merged cluster 120C, as shown in <FIG>.

The contour of the merged cluster 120C of pixels then can be approximated by a polygon that has fewer corners and/or less zig-zag than the corresponding cluster(s) of pixels in the original design (<FIG>). This approximation can be accomplished, for example, by replacing a node at each corner of the merged cluster 120C with two nodes, each of which is displaced relative to the corner node and then removing duplicate nodes. <FIG> illustrates an example, in which the contour <NUM> of the replacement polygon (dashed line) is overlaid on the merged cluster 120C (solid line).

The corner node replacement can be implemented, for example, as follows. The position of each corner node of the merged cluster can be stored in memory. The information for the corner nodes can be stored sequentially, for example, in a clockwise or counterclockwise direction along the contour of the merged cluster. Each corner node is replaced by two new nodes in a manner that depends on whether the algorithm proceeds from one corner node to the next in the clockwise direction or counterclockwise direction. For example, if movement proceeds in the clockwise direction, then each corner node can be replaced as indicated in the following Table, in which each node may be referred to as a "point," and where "pixel/<NUM>" is half the length of a pixel edge.

On the other hand, if movement proceeds in the counterclockwise direction, then each corner node can be replaced as indicated in the following Table, in which each node may be referred to as a "point," and where "pixel/<NUM>" is half the length of a pixel edge.

In some instances, a correction may be applied to the positions of the replacement nodes to compensate for the sizing operation that was described in connection with <FIG>.

Further, in some instances, the sizing and merging operations may be omitted. For example, if different clusters of pixels in the original design do not have respective corners in contact with one another (i.e., as shown in the example of <FIG>), the cluster sizing and merging operations need not be performed. In such cases, the contour approximation operations (e.g., <FIG>) can be performed with respect to a cluster of pixels in the original layout design rather than a merged cluster.

<FIG> illustrates another example of a portion of an original pixel layout design. <FIG> illustrates a corresponding example in which the contours of the original pixel layout design of <FIG> are replaced by new contours that approximate, respectively, the contours of the original layout design in accordance with the techniques described above. The replacement contours in <FIG> may have fewer corners and/or less zig-zag than the contours of the corresponding clusters of pixels in the original layout design of <FIG>. In general, as noted above, the straight portions of the contour can have a length that is greater than then the pixel size (i.e., greater than the center-to-center distance between two adjacent pixels having a common corner).

The contours of the original pixel clusters at each level of the original layout design may be replaced by new contours that approximate, respectively, the contours of the original layout design in accordance with the techniques described above to obtain a modified pixel design payout. The modified pixel layout design then can be used to fabricate a master tool (e.g., having a multi-level structured surface corresponding to the modified pixel layout design) for the DOEs. In general, the contour delineates, at least in part, the area of the optical element having an optical function.

<FIG> illustrate an example of a process of fabricating a master tool based on a modified pixel layout design.

As shown, for example, in <FIG>, a substrate, such as a wafer <NUM>, is provided. The wafer <NUM> can be composed, for example, of a layer of polysilicon, pure single-crystalline silicon or amorphous silicon on glass or sapphire. Other materials for the wafer <NUM> may be appropriate in some implementations. An additive lithography process, for example, can be used to form the different levels for the design of the master tool. An additive lithographic technique allows for careful control of the resist exposure and reflow processes for fabricating the master tool for complex, multi-level optical elements. The optical design can be transformed into a multilevel diffractive structure which then can be split into multiple masking patterns. An example is described below.

For example, as part of the process of fabricating the master tool, a first layer of resist <NUM> is deposited (e.g., by spin coating) onto the upper surface of the wafer <NUM> and, using a first mask, the resist layer <NUM> is exposed selectively by lithographic techniques, e.g., electron beam lithography (EBL). The exposed portions of the resist layer <NUM> then are developed and removed such that selected regions of the wafer surface are no longer covered by the resist (see <FIG>). Next, , as indicated in <FIG>, the wafer <NUM> is etched, from the wafer surface, in the regions not covered by the resist <NUM> to form openings <NUM> down to a first depth d1. The remaining portions of the resist <NUM> then can be removed. The resulting first level pattern <NUM> is shown in <FIG>.

Next, as shown in <FIG>, in preparation for a second etch into the wafer, a second resist layer <NUM> is deposited over the wafer <NUM> (e.g., by spin coating). The resist <NUM> is present in the previously-formed openings <NUM>. The second resist layer <NUM> then is exposed selectively by lithographic techniques (e.g., EBL) and developed so that particular regions of the wafer are no longer covered by the second resist layer <NUM> (see <FIG>). A second lithographic mask can be used during the foregoing exposure. In the illustrated example, following exposure and development of the second resist layer <NUM>, the resist only partially fills the previously-formed openings <NUM> and only partially covers the upper surface of the substrate <NUM>. Next, the wafer <NUM> is etched in the regions not covered by the resist <NUM> (see <FIG>). The remaining resist layer <NUM> then can be removed. The resulting second level pattern <NUM> is shown in <FIG>.

Next, as shown in <FIG>, in preparation for a third etch into the wafer, a third resist layer <NUM> is deposited over the wafer <NUM> (e.g., by spin coating). The resist <NUM> is present in the previously-formed openings <NUM>. The second resist layer <NUM> then is exposed selectively by lithographic techniques (e.g., EBL) and developed so that particular regions of the wafer are no longer covered by the third resist layer <NUM> (see <FIG>). A third lithographic mask can be used during the foregoing exposure. In the illustrated example, following exposure and development of the third resist layer <NUM>, the resist only selectively fills the openings previously etched into the wafer during the first and second etch steps and only partially covers the upper surface of the substrate <NUM>. Next, the wafer <NUM> is etched in the regions not covered by the resist <NUM> (see <FIG>). The remaining resist layer <NUM> then can be removed. The resulting third level pattern <NUM> is shown in <FIG>.

The combination of the various lithographic and etch processes results in regions at multiple different depths (see <FIG>), which correspond to the different levels needed for the master tool. Details of the various masks used for the lithography and etch steps can be specified based on the modified pixel layout design. In this manner, a multi-level master tool can be fabricated. Although <FIG> illustrate an example of a process of fabricating an eight-level master tool based on a modified pixel layout design, similar processes can be used to fabricate master tools having fewer of more than eight levels based on a modified pixel layout design. Some or all of the operations illustrated in <FIG> may be part of an automated process. In some implementations, other techniques can be used to fabricate the master tool.

Using a modified pixel layout design as described in connection with the foregoing examples can result in one or more advantages in some cases. For example, as the number of nodes associated with each cluster of pixels decreases, the amount of memory needed to store the information becomes smaller, which can make production easier (e.g., less computing required for EBL proximity correction; increased e-beam writing speed).

Further, in some cases, optical performance of DOEs that are manufactured from a master tool obtained using a pixel layout design can be improved. If the pixel size is small, it is, in general, possible to make a higher performing design compared to a situation in which the pixel size is larger. However, such small pixel sizes can result in line edge roughness in the resulting DOEs (see <FIG>). The line edge roughness in the DOE structures tends to increase optical scattering, which can decrease optical performance. On the other hand, in some implementations, DOEs manufactured based on a master tool obtained using a modified pixel layout design as described above can have less line edge roughness (see <FIG>), and thus better optical performance.

A further advantage that can be obtained in some cases is the avoidance of the formation of pointy tips <NUM> at the pixel corners in the master tool that sometimes occur in prior techniques (see <FIG>). Such pointy tips <NUM> need to be removed; otherwise they will be present in the replication tools and/or DOEs made from the master tool. Using the modified pixel layout design - according to which the overall contour of a particular cluster of original regular polygonal pixels can be approximated by a single polygon that reduces the total number of edges and shortens the total length of the edges relative to the contour of the cluster of pixels in the original layout design - can help avoid occurrence of such pointy tips (see <FIG>).

After the master tool is fabricated based on the modified pixel layout design, the master tool can be used to manufacture one or more (negative) sub-masters or replicas, which in turn can be used directly or indirectly to replicate DOEs, for example, as part of a mass production manufacturing process. Manufacturing the DOEs may take place in some instances at a wafer-level in which tens, hundreds, or even thousands of DOEs are replicated in parallel using the same sub-master or other tool derived from the master.

In some instances, a structured element of the master (or a sub-master) is replicated into liquid or plastically deformable material, then hardened to make it dimensionally stable, and the structured element (e.g., the DOE) is removed. These replicating, hardening and removing steps are repeated over different parts of a substrate to form replicas of the same structured element.

In general, each diffractive optical element can include a multi-level structured surface, at least a portion of which has a contour having straight lines, each of which has a length larger than a pixel size in the optical element, wherein the pixel size is a center-to-center distance between two adjacent pixels having a common center. In some instances, the straight lines change direction at least once at an angle θ other than <NUM>° or <NUM>°. For example, in some instances, the straight lines change direction at least once at an angle θ, where <NUM>° < θ < <NUM>° or <NUM>° < θ < <NUM>°. Further, in some instances, the straight lines change direction at least once at an angle θ, where <NUM>° < θ < <NUM>° or <NUM>° < θ < <NUM>°.

Examples of diffractive optical elements that can be manufactured using the master tool include diffraction and other gratings, beam splitters, beam shapers, collimators, diffractive diffusers, as well as other optical elements.

Various aspects of the subject matter and the functional operations described in this specification can be implemented in digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them. Thus, aspects of the subject matter described in this specification can be implemented as one or more computer program products, i.e., one or more modules of computer program instructions encoded on a computer readable medium for execution by, or to control the operation of, data processing apparatus. The computer readable medium can be a machine-readable storage device, a machine-readable storage substrate, a memory device, a composition of matter effecting a machine-readable propagated signal, or a combination of one or more of them. The apparatus can include, in addition to hardware, code that creates an execution environment for the computer program in question, e.g., code that constitutes processor firmware.

Computer readable media suitable for storing computer program instructions and data include all forms of nonvolatile memory, media and memory devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices; magnetic disks, e.g., internal hard disks or removable disks; magneto optical disks; and CD ROM and DVD-ROM disks.

Claim 1:
A method for providing a master tool for production of multi-level diffractive optical elements, the method comprising:
modifying a first pixel layout design for multi-level diffractive optical elements to obtain a modified pixel layout design, wherein the first pixel layout design comprises pixels (<NUM>, <NUM>), each of which has a rectangular shape, and wherein modifying the first pixel layout design includes approximating a contour of a cluster (<NUM>, 120A, 120B, 120C) of pixels in the first pixel layout design by a single polygon (<NUM>) that reduces a total number of edges (<NUM>) relative to the contour of the cluster of pixels in the first pixel layout design, wherein each respective cluster is constituted by contiguous pixels within a given level of the first pixel layout design; and
using the modified pixel layout design to form a master tool for production of the diffractive optical elements.