Patent Description:
From the United States patent <CIT> a hollow soldering tip including a core material and an outer protective layer is known. From the European Patent application published as <CIT> a handheld soldering iron, comprising a power supply, a workstand, and a handpiece including a soldering iron tip having a pointed distal end. An ID device is provided, and power to the handheld soldering iron is supplied if read information from the ID feedback device corresponds to authentication information for the soldering iron tip, while the supply of power to the handheld soldering iron is stopped if the read information on the conductive material coating from the ID feedback device does not correspond to authentication information for the soldering iron tip.

It is an object of the invention to create handheld soldering iron and a method of using such a handheld soldering iron for authenticating a handheld soldering iron's soldering iron tip, and a soldering iron tip configured for the use in the handheld soldering iron and related authentication method.

These and other objects are achieved by the apparatus claimed in claim <NUM> and the method as claimed in claim <NUM>. Advantageous further embodiments are claimed in the dependent claims <NUM>-<NUM>.

With reference to <FIG>, an embodiment of a smart soldering iron tip <NUM> and method of authenticating the smart soldering iron tip <NUM> (e.g., to ensure that the smart soldering iron tip <NUM> is of known high quality and not a low-quality counterfeit) will be described after first describing an embodiment of a handheld soldering iron <NUM>.

With reference to <FIG>, the handheld soldering iron <NUM> includes a power supply <NUM> with a display <NUM>, a workstand <NUM>, and a handpiece <NUM>. The handpiece <NUM> is coupled to the power supply <NUM> and the workstand <NUM> that accommodates the handpiece <NUM>. The handpiece <NUM> receives power from the power supply <NUM> and heats the smart soldering iron tip <NUM> to melt solder to perform the soldering on a work piece.

With reference to <FIG>, the handpiece <NUM> carries a heater assembly <NUM>, an authenticity identification ("ID") feedback connection <NUM>, and a temperature sensor <NUM> thermally coupled to the smart soldering iron tip <NUM> to sense the tip temperature and transmit that data to a processor (e.g., such as processor <NUM> illustrated in <FIG>, which is preferably located in the power supply <NUM>, but alternatively or additionally may be located in one or more of the handpiece <NUM>, workstand <NUM>, and another location/element) via temperature sensor feedback line <NUM>. The smart soldering iron tip <NUM> is coupled to the handpiece <NUM> via a tip retainer <NUM>. The smart soldering iron tip <NUM> includes a hollow cylindrical base <NUM>, a pointed distal end <NUM>, and a proximal end <NUM> with an identification ("ID") feedback device <NUM>. In the embodiment of the smart soldering iron tip <NUM> shown in <FIG>, the ID feedback device <NUM> includes one or more inserts such as graphite cylinders <NUM> embedded into the tip <NUM>, which is made of an iron plated copper core. Each cylinder <NUM> is connected to the processor of the power supply <NUM> via authenticity feedback line <NUM>.

With reference additionally to <FIG>, an exemplary method of authenticating the smart soldering iron tip <NUM> will be described. At step <NUM>, startup power for the handheld soldering iron <NUM> is supplied to the electronic components carried by the handpiece <NUM> via power line <NUM>. At step <NUM>, the processor communicates with the ID feedback connection <NUM>, which communicates with the ID feedback device <NUM> (e.g., reads the resistance of the graphite cylinder(s) <NUM>/checks "graphite" resistance to ground). Then, at step <NUM>, the processor determines whether the tip <NUM> is authentic or not/checks whether reading is correct. If yes, then control passes on to step <NUM>, and normal operation of the soldering iron <NUM> continues. If no, then control passes on to step <NUM>, and the soldering iron <NUM> shuts down.

In alternative embodiments, the ID feedback device <NUM> and exemplary method of authenticating includes substance(s) other than graphite and/or inserts other than cylinders (e.g., square blocks) for the one or more inserts <NUM> embedded into the tip <NUM>.

In further alternative embodiments, as shown in <FIG>, the inserts <NUM> of the ID feedback device <NUM> and exemplary method of authenticating are replaced with conductive material coating <NUM>. In the embodiment of <FIG>, an entire proximal surface <NUM> of the proximal end <NUM> is coated with the conductive material coating <NUM>. In the embodiment of <FIG>, a partial proximal surface <NUM> of the proximal end <NUM> is coated with conductive material coating <NUM> to form, for example, a bar code type of multiple conductive material coating segments <NUM> for authenticating the tip <NUM>.

Preferably, the ID feedback device <NUM> includes a resistivity from <NUM> ohms to <NUM><NUM> ohms per in<NUM> (<NUM>,<NUM> ohms to <NUM>,<NUM><NUM> ohms per cm<NUM>). In further embodiments, the ID feedback device <NUM> includes one or more identifiers other than embedded cylinders <NUM> or conductive material coating(s) <NUM>, <NUM> for authenticating the tip <NUM>.

<FIG> is a block diagram illustrating an example wired or wireless system <NUM> that may be used in connection with various embodiments described herein. For example the system <NUM> may be used as or in conjunction with the processor in the power supply <NUM> discussed above with respect to <FIG>. The system <NUM> can be a conventional personal computer, computer server, personal digital assistant, smart phone, tablet computer, or any other processor enabled device that is capable of wired or wireless data communication. Other computer systems and/or architectures may be also used, as will be clear to those skilled in the art.

The system <NUM> preferably includes one or more processors, such as processor <NUM>, which serves as the processor in the power supply <NUM> discussed above with respect to <FIG>. Additional processors may be provided, such as an auxiliary processor to manage input/output, an auxiliary processor to perform floating point mathematical operations, a special-purpose microprocessor having an architecture suitable for fast execution of signal processing algorithms (e.g., digital signal processor), a slave processor subordinate to the main processing system (e.g., back-end processor), an additional microprocessor or controller for dual or multiple processor systems, or a coprocessor. Such auxiliary processors may be discrete processors or may be integrated with the processor <NUM>.

The processor <NUM> is preferably connected to a communication bus <NUM>. The communication bus <NUM> may include a data channel for facilitating information transfer between storage and other peripheral components of the system <NUM>. The communication bus <NUM> further may provide a set of signals used for communication with the processor <NUM>, including a data bus, address bus, and control bus (not shown). The communication bus <NUM> may comprise any standard or non-standard bus architecture such as, for example, bus architectures compliant with industry standard architecture ("ISA"), extended industry standard architecture ("EISA"), Micro Channel Architecture ("MCA"), peripheral component interconnect ("PCI") local bus, or standards promulgated by the Institute of Electrical and Electronics Engineers ("IEEE") including IEEE <NUM> general-purpose interface bus ("GPIB"), IEEE <NUM>/S-<NUM>, and the like.

System <NUM> preferably includes a main memory <NUM> and may also include a secondary memory <NUM>. The main memory <NUM> provides storage of instructions and data for programs executing on the processor <NUM>. The main memory <NUM> is typically semiconductor-based memory such as dynamic random access memory ("DRAM") and/or static random access memory ("SRAM"). Other semiconductor-based memory types include, for example, synchronous dynamic random access memory ("SDRAM"), Rambus dynamic random access memory ("RDRAM"), ferroelectric random access memory ("FRAM"), and the like, including read only memory ("ROM").

The secondary memory <NUM> may optionally include an internal memory <NUM> and/or a removable medium <NUM>, for example a floppy disk drive, a magnetic tape drive, a compact disc ("CD") drive, a digital versatile disc ("DVD") drive, etc. The removable medium <NUM> is read from and/or written to in a well-known manner. Removable storage medium <NUM> may be, for example, a floppy disk, magnetic tape, CD, DVD, SD card, etc..

The removable storage medium <NUM> is a non-transitory computer readable medium having stored thereon computer executable code (i.e., software) and/or data. The computer software or data stored on the removable storage medium <NUM> is read into the system <NUM> for execution by the processor <NUM>.

In alternative embodiments, secondary memory <NUM> may include other similar means for allowing computer programs or other data or instructions to be loaded into the system <NUM>. Such means may include, for example, an external storage medium <NUM> and an interface <NUM>. Examples of external storage medium <NUM> may include an external hard disk drive or an external optical drive, or and external magneto-optical drive.

Other examples of secondary memory <NUM> may include semiconductor-based memory such as programmable read-only memory ("PROM"), erasable programmable read-only memory ("EPROM"), electrically erasable read-only memory ("EEPROM"), or flash memory (block oriented memory similar to EEPROM). Also included are any other removable storage media <NUM> and communication interface <NUM>, which allow software and data to be transferred from an external medium <NUM> to the system <NUM>.

System <NUM> may also include an input/output ("I/O") interface <NUM>. The I/O interface <NUM> facilitates input from and output to external devices. For example the I/O interface <NUM> may receive input from a keyboard or mouse and may provide output to a display <NUM>. The I/O interface <NUM> is capable of facilitating input from and output to various alternative types of human interface and machine interface devices alike.

System <NUM> may also include a communication interface <NUM>. The communication interface <NUM> allows software and data to be transferred between system <NUM> and external devices (e.g. printers), networks, or information sources. For example, computer software or executable code may be transferred to system <NUM> from a network server via communication interface <NUM>. Examples of communication interface <NUM> include a modem, a network interface card ("NIC"), a wireless data card, a communications port, a PCMCIA slot and card, an infrared interface, and an IEEE <NUM> fire-wire, just to name a few.

Communication interface <NUM> preferably implements industry promulgated protocol standards, such as Ethernet IEEE <NUM> standards, Fiber Channel, digital subscriber line ("DSL"), asynchronous digital subscriber line ("ADSL"), frame relay, asynchronous transfer mode ("ATM"), integrated digital services network ("ISDN"), personal communications services ("PCS"), transmission control protocol/Internet protocol ("TCP/IP"), serial line Internet protocol/point to point protocol ("SLIP/PPP"), and so on, but may also implement customized or non-standard interface protocols as well.

Software and data transferred via communication interface <NUM> are generally in the form of electrical communication signals <NUM>. These signals <NUM> are preferably provided to communication interface <NUM> via a communication channel <NUM>. In one embodiment, the communication channel <NUM> may be a wired or wireless network, or any variety of other communication links. Communication channel <NUM> carries signals <NUM> and can be implemented using a variety of wired or wireless communication means including wire or cable, fiber optics, conventional phone line, cellular phone link, wireless data communication link, radio frequency ("RF") link, or infrared link, just to name a few.

Computer executable code (i.e., computer programs or software) is stored in the main memory <NUM> and/or the secondary memory <NUM>. Computer programs can also be received via communication interface <NUM> and stored in the main memory <NUM> and/or the secondary memory <NUM>. Such computer programs, when executed, enable the system <NUM> to perform the various functions of the present invention as previously described.

In this description, the term "computer readable medium" is used to refer to any non-transitory computer readable storage media used to provide computer executable code (e.g., software and computer programs) to the system <NUM>. Examples of these media include main memory <NUM>, secondary memory <NUM> (including internal memory <NUM>, removable medium <NUM>, and external storage medium <NUM>), and any peripheral device communicatively coupled with communication interface <NUM> (including a network information server or other network device). These non-transitory computer readable mediums are means for providing executable code, programming instructions, and software to the system <NUM>.

In an embodiment that is implemented using software, the software may be stored on a computer readable medium and loaded into the system <NUM> by way of removable medium <NUM>, I/O interface <NUM>, or communication interface <NUM>. In such an embodiment, the software is loaded into the system <NUM> in the form of electrical communication signals <NUM>. The software, when executed by the processor <NUM>, preferably causes the processor <NUM> to perform the inventive features and functions previously described herein.

The system <NUM> also includes optional wireless communication components that facilitate wireless communication over a voice and over a data network. The wireless communication components comprise an antenna system <NUM>, a radio system <NUM> and a baseband system <NUM>. In the system <NUM>, radio frequency ("RF") signals are transmitted and received over the air by the antenna system <NUM> under the management of the radio system <NUM>.

In one embodiment, the antenna system <NUM> may comprise one or more antennae and one or more multiplexors (not shown) that perform a switching function to provide the antenna system <NUM> with transmit and receive signal paths. In the receive path, received RF signals can be coupled from a multiplexor to a low noise amplifier (not shown) that amplifies the received RF signal and sends the amplified signal to the radio system <NUM>.

In alternative embodiments, the radio system <NUM> may comprise one or more radios that are configured to communicate over various frequencies. In one embodiment, the radio system <NUM> may combine a demodulator (not shown) and modulator (not shown) in one integrated circuit ("IC"). The demodulator and modulator can also be separate components. In the incoming path, the demodulator strips away the RF carrier signal leaving a baseband receive audio signal, which is sent from the radio system <NUM> to the baseband system <NUM>.

If the received signal contains audio information, then baseband system <NUM> decodes the signal and converts it to an analog signal. Then the signal is amplified and sent to a speaker. The baseband system <NUM> also receives analog audio signals from a microphone. These analog audio signals are converted to digital signals and encoded by the baseband system <NUM>. The baseband system <NUM> also codes the digital signals for transmission and generates a baseband transmit audio signal that is routed to the modulator portion of the radio system <NUM>. The modulator mixes the baseband transmit audio signal with an RF carrier signal generating an RF transmit signal that is routed to the antenna system and may pass through a power amplifier (not shown). The power amplifier amplifies the RF transmit signal and routes it to the antenna system <NUM> where the signal is switched to the antenna port for transmission.

The baseband system <NUM> is also communicatively coupled with the processor <NUM>. The central processing unit <NUM> has access to data storage areas <NUM> and <NUM>. The central processing unit <NUM> is preferably configured to execute instructions (i.e., computer programs or software) that can be stored in the memory <NUM> or the secondary memory <NUM>. Computer programs can also be received from the baseband processor <NUM> and stored in the data storage area <NUM> or in secondary memory <NUM>, or executed upon receipt. Such computer programs, when executed, enable the system <NUM> to perform the various functions of the present invention as previously described. For example, data storage areas <NUM> may include various software modules (not shown) that are executable by processor <NUM>.

Various embodiments may also be implemented primarily in hardware using, for example, components such as application specific integrated circuits ("ASICs"), or field programmable gate arrays ("FPGAs"). Implementation of a hardware state machine capable of performing the functions described herein will also be apparent to those skilled in the relevant art. Various embodiments may also be implemented using a combination of both hardware and software.

Furthermore, those of skill in the art will appreciate that the various illustrative logical blocks, modules, circuits, and method steps described in connection with the above described figures and the embodiments disclosed herein can often be implemented as electronic hardware, computer software, or combinations of both. Skilled persons can implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the invention. In addition, the grouping of functions within a module, block, circuit or step is for ease of description. Specific functions or steps can be moved from one module, block or circuit to another without departing from the invention.

Moreover, the various illustrative logical blocks, modules, and methods described in connection with the embodiments disclosed herein can be implemented or performed with a general purpose processor, a digital signal processor ("DSP"), an ASIC, FPGA or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general-purpose processor can be a microprocessor, but in the alternative, the processor can be any processor, controller, microcontroller, or state machine. A processor can also be implemented as a combination of computing devices, for example, a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.

Additionally, the steps of a method or algorithm described in connection with the embodiments disclosed herein can be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module can reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium including a network storage medium. An exemplary storage medium can be coupled to the processor such the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium can be integral to the processor. The processor and the storage medium can also reside in an ASIC.

While various embodiments of the present invention have been described above, it should be understood that they have been presented by way of example only, and not of limitation. Likewise, the various diagrams may depict an example architectural or other configuration for the disclosure, which is done to aid in understanding the features and functionality that can be included in the disclosure. The invention is not restricted to the illustrated example architectures or configurations, but the desired features can be implemented using a variety of alternative architectures and configurations. Indeed, it will be apparent to one of skill in the art how alternative functional, logical or physical partitioning and configurations can be implemented to implement the desired features of the present disclosure.

Although the disclosure is described above in terms of various exemplary embodiments and implementations, it should be understood that the various features, aspects and functionality described in one or more of the individual embodiments are not limited in their applicability to the particular embodiment with which they are described, but instead can be applied, alone or in various combinations, to one or more of the other embodiments of the disclosure, whether or not such embodiments are described and whether or not such features are presented as being a part of a described embodiment. Thus, the scope of the present invention should not be limited by any of the above-described exemplary embodiments.

Terms and phrases used in this document, and variations thereof, unless otherwise expressly stated, should be construed as open ended as opposed to limiting. As examples of the foregoing: the term "including" should be read as meaning "including, without limitation" or the like; the term "example" is used to provide exemplary instances of the item in discussion, not an exhaustive or limiting
list thereof.

The terms "a" or "an" should be read as meaning "at least one," "one or more" or the like; and adjectives such as "conventional," "traditional," "normal," "standard," "known" and terms of similar meaning should not be construed as limiting the item described to a given time period or to an item available as of a given time, but instead should be read to encompass conventional, traditional, normal, or standard technologies that may be available or known now or at any time in the future. Likewise, where this document refers to technologies that would be apparent or known to one of ordinary skill in the art, such technologies encompass those apparent or known to the skilled artisan now or at any time in the future.

The presence of broadening words and phrases such as "one or more," "at least," "but not limited to" or other like phrases in some instances shall not be read to mean that the narrower case is intended or required in instances where such broadening phrases may be absent.

Claim 1:
A handheld soldering iron (<NUM>), comprising:
a power supply (<NUM>);
a workstand (<NUM>);
a handpiece (<NUM>) including a soldering iron tip (<NUM>) comprising a hollow cylindrical base (<NUM>), a pointed distal end (<NUM>) and a proximal end (<NUM>) with an ID feedback device (<NUM>) including a conductive material coating (<NUM>), which when read provides authentication information on the soldering iron tip (<NUM>), wherein the ID feedback device (<NUM>) includes a conductive material coating (<NUM>), and the handpiece (<NUM>) is coupled to the power supply (<NUM>) and the workstand (<NUM>), receiving power from the power supply (<NUM>) and heating the soldering iron tip (<NUM>) to perform soldering on a work piece,
one or more processors (<NUM>) programmed to perform steps comprising:
reading information on the conductive material coating (<NUM>) from the ID feedback device (<NUM>) of the soldering iron tip (<NUM>);
determining whether the read information on the conductive material coating (<NUM>) from the ID feedback device (<NUM>) corresponds to authentication information for the soldering iron tip (<NUM>);
continuing supply of power to the handheld soldering iron (<NUM>) if the read information on the conductive material coating (<NUM>) from the ID feedback device (<NUM>) corresponds to authentication information for the soldering iron tip (<NUM>);
stopping supply of power to the handheld soldering iron (<NUM>) if the read information on the conductive material coating (<NUM>) from the ID feedback device (<NUM>) does not correspond to authentication information for the soldering iron tip (<NUM>).