Patent Description:
Power semiconductor devices, such as power metal-oxide-semiconductor field-effect transistors (MOSFETs) and insulated-gate bipolar transistors (IGBTs), can be used as switching elements (or "switches") for switching inductive and/or resistive loads, such as lamps and LEDs, motors, solenoids and heaters, which are used in automotive, industrial and other applications.

A switching element, such as a MOSFET, may be a discrete component, or it may be integrated into a load switch integrated circuit (IC) or a pre-driver IC.

Integrated switching elements are often provided with over-temperature (OT) protection to ensure that the switching element does exceed a maximum acceptable operating temperature. This can occur, for example, if the resistance of the load drops to a low value or if there is a short circuit. OT protection is usually achieved by providing an OT sensor close to the switching element coupled to a circuit which, in the event of determining that the operating temperature of the switch exceeds the maximum operating temperature, triggers thermal shutdown.

OT protection, however, faces a number of challenges. For example, if the OT sensor is located too close to the switching element, for example inside a guard ring around the switching element, then the sensor may detect localised regions of high temperature ("hot spots") and trigger thermal shutdown in a situation when the device is still operating within acceptable limits. Furthermore, locating the OT sensor inside the guard ring, reduces the active driver area resulting in a larger IC and higher ON-state resistance RON. Although, placing the OT sensor further away from the switching element, outside the guard ring, can help avoid or overcome these drawbacks, it introduces a time delay. In particular, if over temperature occurs, the sensor may detect this condition too late, by which time, the switching element may have suffered irreversible damage.

One solution, described in <CIT>, is to dynamically maintain device operation within a safe operating area (SOA) by sensing instantaneous voltage and current of the device, determining, based on the sensed instantaneous voltage and current, a value that represents a power dissipated in the device, using the determined dissipated power and a model of thermal behaviour of the device to model a junction temperature of the device, and controlling operation of the device based on the modelled junction temperature. This, however, is a complex solution.

<CIT> describes a device which acts on a switching component which is a power transistor of type MOSFET with the gate controlled by a voltage translation circuit which produces a switching signal derived from a logic control signal belonging to the range of lower voltage amplitudes. The device comprises an overheat control circuit connected to a detector element which detects the condition of overheating of the switching component and generates a logic inhibition signal which sets the logic control signal into a state bringing about a cooling of the switching component. The switching component is controlled as a two-position switch, and the range of the switching signal values comprises only two values corresponding to the opening and the closing of the switch, which is determined by the respective logic states of the logic control signal. The device comprises a logic circuit which is an AND gate whose one input and the output transmits the logic control signal to the voltage translator circuit, and the other input receives the logic inhibition signal from the overheat control circuit. The overheat control circuit comprises components for producing a temperature signal obtained by detecting a parameter linked to the functioning of the switching component, a comparator receiving the temperature signal on one input and a reference signal on the other input, and an inverter. The comparator is of analogue type with hysteresis effect, that is of the Schmitt trigger type. In the first embodiment, the temperature signal is obtained from a voltage on a component such as a diode which is in thermal contact with the switching component, and the signal is transmitted via an amplifier to the comparator. In the second embodiment, the temperature signal is obtained from the drain-source voltage which is converted into a power value dissipated by the switching organ, and then to the temperature signal as a function of the power value. The conversion includes a mathematical model in the form of analogue or digital circuits. At least a part of the overheat control circuit is implemented as an application-specific integrated circuit.

According to a first aspect of the present invention there is provided an over-temperature protection circuit as specified in claim <NUM>.

According to a second aspect of the present invention there is provided an over-temperature protection circuit as specified in claim <NUM>.

According to a third aspect of the present invention there is provided an integrated circuit comprising the circuit of the first or second aspect of the invention.

According to a fourth aspect of the present invention there is provided a motor vehicle comprising the circuit of the first or second aspects of the invention or the integrated circuit of the second aspect of the invention.

The motor vehicle may be a motorcycle, an automobile (sometimes referred to as a "car"), a minibus, a bus, a truck or lorry. The motor vehicle may be powered by an internal combustion engine and/or one or more electric motors.

Optional features are specified in the dependent claims.

Referring to <FIG>, a system <NUM> for controlling and driving a load <NUM> is shown.

The system <NUM> includes a controller <NUM>, such as a microcontroller, and a load switch integrated circuit (IC) <NUM> which includes control logic <NUM>, a pre-driver <NUM> (or "gate driver") and an integrated driver <NUM>.

The integrated driver <NUM> includes a switching element <NUM> in the form of an n-channel, power metal-oxide-semiconductor field-effect transistor (MOSFET) (herein also referred to as an "nMOSFET" or simply "nMOS transistor") and at least one temperature sensor <NUM>.

The MOSFET <NUM> is configured in a common-source topology. The drain D of the MOSFET <NUM> is connected to output terminal OUTx of the load switch IC <NUM>. A load <NUM> is connected between a positive voltage supply, VBAT, from a battery, e.g. battery <NUM> (<FIG>) and the output terminal OUTx. The source S is connected to ground GND via the switching element <NUM>. In this case, a low-side switching configuration is used. A worst-case drain current, Ilimit_x, is defined by current limitation.

Behaviour of the temperature sensor(s) <NUM> is monitored by an over-temperature (OT) detection circuit <NUM> which is used to determine the presence of an OT condition of the MOSFET <NUM>, for example resulting from a short, which might result in destructive heating of the MOSFET <NUM>.

The load switch IC <NUM> also includes a safe operating area (SOA)-based over-temperature protection circuit <NUM> which uses an SOA-based determination to supplement over-temperature detection, and to cause temporary switching-off of the MOSFET <NUM> using a shutdown enable signal nSD (which is set to LOW in the event of over temperature).

As will be explained later, temperature-based protection and SOA-based protection operate independently. Thus, the MOSFET <NUM> can be switched off as a result of a temperature sensor <NUM> directly measuring an over temperature and/or the SOA-based circuit <NUM> inferring an over-temperature condition.

As will be explained in more detail hereinafter, the SOA-based protection circuit <NUM> effectively calculates an amount of power dissipated by the MOSFET <NUM>, determines whether the power exceeds a given a threshold and, if so, causes temporary shutdown of the MOSFET <NUM>.

Power P is related to voltage V and current I according to P = IV.

Although it might be preferable to determine current I accurately, this can be hard to achieve in practice. For example, it can be difficult to distinguish between a soft overload (where the current I exceeds a threshold IOC) and a short circuit current whose value may be virtually unlimited. Therefore, a defined fast current limitation Ilimit can be used as a value for the current I. This can be sufficient since current can settle quickly (e.g. within <NUM>). As will be explained, the SOA-based protection circuit <NUM> can shut off current quickly, for example, in a little as ten or a few tens of microseconds.

If the voltage V is measured and a value of current I is assumed or defined, then a power P or a parameter which depends on power can be calculated simply using voltage V.

Driver control is carried out through a driver control signal ONx. The driver control signal ONx and the shutdown enable signal nSD are inputs to an AND gate <NUM>. The output of the AND gate <NUM> is supplied to the input of the pre-driver <NUM>.

Referring to <FIG>, a first SOA-based protection circuit <NUM>, <NUM><NUM> is shown.

The circuit <NUM> senses the source-drain voltage VDS via a tap <NUM> (or "node") between the output terminal OUTx and the drain D of the MOSFET <NUM>. The source-drain voltage VDS is converted into a current Isense_in by a sense resistor RVDS. The sense resistor RVDS preferably has a negative temperature coefficient to increase shutdown sensitivity at a high temperature, i.e. a high temperature of a substrate on which driver is formed.

A multiple-stage current mirror <NUM>, in this case a two-stage current mirror, is used to generate a scaled-down current scaled by a scaling factor k, where k is about <NUM>. Each stage scales the current by a factor of ten.

A first path <NUM> runs between the tap <NUM> and ground GND which comprises the sense resistor RVDS, a voltage regulator <NUM> (which is preferably variable), a channel of a first transistor Q1, in the form of an n-type MOSFET, whose gate is controlled by an over current signal OC supplied by the pre-driver <NUM> and a channel of second transistor Q2, in the form of an n-type MOSFET. The drain of the second transistor Q2 is connected to its gate. The over current signal OC signals start of an overload event. Below a given threshold OClimit, there is no need for shut down. Above the threshold OClimit, the circuit <NUM> starts to operate.

There are two aspects to over current management. First, there is an OC detector <NUM> which signals an OC event (i.e., when the current IOC rises above a programmable threshold), but which still results in the load <NUM> being driven with low RON. If the load current increases further, then the driver goes into a current limitation mode. In current limitation mode, the driver acts as a current source with the level I (== Ilimit_x). While the current is limited, the dissipated power just depends on the voltage drop across the driver. Expressed differently, there is no relevant SOA power dissipation below the OC detection threshold. To help try and guarantee correct normal operation, the SOA shut down circuit will be enabled just in case IOC is exceeded. Thus, the OC detector output can be seen as an ENABLE signal for the entire SOA shut down mechanism.

The voltage regulator <NUM> takes the form of a Zener diode ZD and is used to set a source-drain voltage threshold VDS_o. The source-drain voltage threshold VDS_o defines the voltage at which the SOA-based circuit <NUM><NUM> starts to integrate a power (VDS_o × Ilimit_x). Expressed differently, the source-drain voltage threshold VDS_o marks the transition from unrestricted permanent power dissipation regime (i.e., which is not SOA critical) to a regime where power dissipation is monitored.

The value of the source-drain voltage threshold VDS_o depends on driver size and application. The value can be fixed, for example, by e-fuse programming (or other form of one-time programming).

The current in the path <NUM> is the sensed current Isense_in.

A second path <NUM> runs between ground GND and supply voltage VDD and includes the channel of a third transistor Q3, in the form of an n-type MOSFET, whose gate is connected to the gate of the second transistor Q2, and the channel of fourth transistor Q4, in the form of an n-type MOSFET. The source of the fourth transistor Q4 is connected to its gate.

A third path <NUM> runs between supply voltage VDD and ground GND, and includes a fifth transistor Q5, in the form of an n-type MOSFET, first and second nodes <NUM>, <NUM> and a programmable current source <NUM> which drives a current iSOAref. A capacitor CSOA is arranged in parallel with the current source <NUM>, i.e. between second node <NUM> and ground GND. The current in the third path <NUM> is a scaled sense current Isense_in/k.

Level shifting is used to provide and consistent swing amplitude at node <NUM>.

The capacitor CSOA is used to integrate the scaled sense current Isense_in/k and, thus, effectively determine the accumulated deposited power.

The values of iSOAref, CSOA and/or RVDS are individually set for each driver class.

A fourth path <NUM> runs between supply voltage VDD and ground GND and includes a sixth transistor Q6, in the form of an n-type MOSFET, a level-setting resistor R (for example having a value of the order of a MΩ, <NUM> of MΩ) for controlling RS flip-flop operation, and a seventh transistor Q7, in the form of an n-type MOSFET. The gates of the sixth and seventh transistors Q6, Q7 are connected to the first and second nodes <NUM>, <NUM> respectively.

A fourth node <NUM> between the source of the sixth transistor Q6 and the level-setting resistor R is connected to the input of a first Schmidt trigger <NUM>. A fifth node <NUM> between the drain of the sixth transistor Q6 and the level-setting resistor R is connected to the input of a second Schmidt trigger <NUM>.

The outputs of the Schmidt triggers <NUM>, <NUM> are supplied to first inputs of respective first and second NAND gates <NUM>, <NUM> whose outputs are provided to the second inputs of the other NAND <NUM>, <NUM> (i.e. cross-coupled) to provide an RS flip-flop <NUM>.

The output of the first NAND gate <NUM> (i.e. the non-inverting flip-flop output Q) is the SOA-based shutdown signal SOA_SD supplied to a first input of a third NOR gate <NUM>. The second input of the third NOR gate <NUM> is an OR combination of over-temperature signals. The output of the third NOR gate <NUM> is provided as the shutdown enable signal nSD to the driver controller AND gate <NUM>.

A short with a low source-drain voltage VDS leads to longer shut off time. As will be explained in more detail later, there is no shut down below a static power threshold Ptot. The over-temperature sensor detector takes over shut down and releases the ONx driver control at T < TOT, where TOT is the threshold temperature for shut down.

The current iSOAref defines the duration of recovery ("cool down time") which is constant, but can be set for a given driver and an application.

Referring to <FIG>, a second SOA-based protection circuit <NUM>, <NUM><NUM> is shown.

The second circuit <NUM>, <NUM><NUM> senses the source-drain voltage VDS via the tap <NUM> between the output terminal OUTx and the drain D of the MOSFET <NUM> and the source-drain voltage VDS is converted into a current Isense_in by the sense resistor RVDS.

A path <NUM> runs between the tap <NUM> and ground GND which comprises the sense resistor RVDS, a voltage regulator <NUM> in the form of a Zener diode ZD, a switch S1 which is controlled by an over current signal OC supplied by the pre-driver <NUM>, a node <NUM>, a second switch S2 which is controlled by the SOA-based shutdown signal SOA_SD and a programmable current source <NUM> which drives a current iSOAref.

The node <NUM> is connected to the inverting input of an operational amplifier <NUM> of an integrator <NUM> comprising the operational amplifier <NUM> and a feedback capacitor CSOA. A voltage reference Vref is connected to the non-inverting input of the operational amplifier <NUM>.

The output of the operational amplifier <NUM> is connected to the input of a Schmidt trigger <NUM>. The output of the Schmidt trigger <NUM> is supplied to the input of an inverter <NUM> whose output is the SOA-based shutdown signal SOA_SD.

The output of the inverter is supplied to a first input of a NOR gate <NUM>. The second input of the NOR gate <NUM> is an OR combination of over-temperature signals OTx. The output of the NOR gate <NUM> is provided as the shutdown enable signal nSD to the driver controller AND gate <NUM>.

The second SOA-based protection circuit <NUM>, <NUM> operates in substantially the same way as the first SOA-based protection circuit <NUM>, <NUM><NUM>.

<FIG> shows simulated results of shutdown signal SOA_SD against time generated by the protection circuit <NUM> shown in <FIG> for six different values of source-drain voltage VSD, namely <NUM> V, <NUM> V, <NUM> V, <NUM> V, <NUM> V and <NUM> V, at -<NUM>.

For source-drain voltages of <NUM> and <NUM> V, there is no shutdown within <NUM> and the shutdown signal SOA_SD stays LOW. For a source-drain voltage of <NUM> V, the shutdown signal SOA_SD goes HIGH at <NUM> and stays HIGH for <NUM>. The shutdown signal SOA_SD goes HIGH again at <NUM> and stays HIGH for <NUM>. As the source-drain voltage increases the duty cycle of shutdown signal SOA_SD increases.

<FIG> shows simulated results of shutdown signal SOA_SD against time generated by the protection circuit <NUM> shown in <FIG> for the same values of source-drain voltage VSD at <NUM>.

The results at <NUM> are similar to those for -<NUM>, although the duty cycles are slightly higher for corresponding source-drain voltages.

<FIG> shows simulated results of shutdown signal SOA_SD against time generated by the protection circuit <NUM> shown in <FIG> for the same values of source-drain voltage VSD at <NUM>. The results show that the shutdown signal SOA_SD starts to go HIGH at a lower source-drain voltage, namely <NUM> V.

<FIG> show plots of calculated energy density per square millimetre (in mJmm-<NUM>) again ON time (in µs) for a driver area of <NUM><NUM> for three different ambient temperatures, namely- <NUM>, <NUM> and <NUM>. <FIG> also shows plots of the measured, maximum safe operating area energy density against ON time for a correspondingly sized device at -<NUM> and <NUM>.

The ON resistance is <NUM> mΩ and a thermal resistance Rth is <NUM> KW-<NUM>. For the calculation, I_limit_max (i.e., Ilimit_x) is <NUM>. The peak dissipated power is calculated by multiplying I_limit_max by VDS. The average current is calculated by multiplying I_limit_max by D, where D is the duty cycle. The average dissipated power is calculated by multiplying peak dissipated power by D. Peak energy is calculated by multiplying peak power by ON time. Peak energy density is calculated by multiplying peak energy by driver area. Average junction temperature is calculated by adding the ambient temperature (i.e. -<NUM>, <NUM> or <NUM>) to the average dissipated power multiplied by the thermal resistance.

As shown in <FIG>, the calculated energy density per square millimetre are approximately the same at -<NUM>, <NUM> and <NUM> increasing exponentially with ON time, but staying well within the safe operating area.

<FIG> show plots of calculated energy density per square millimetre again ON time for a driver area of <NUM><NUM> for the same three ambient temperatures. In this case, the ON resistance is <NUM> mΩ and a thermal resistance Rth is <NUM> KW-<NUM>. For the calculation, I_limit_max is <NUM> A.

<FIG> show plots of calculated energy density per square millimetre again ON time for a driver area of <NUM><NUM> for the same three ambient temperatures. In this case, the ON resistance is <NUM>,<NUM> mΩ and a thermal resistance Rth is <NUM> KW-<NUM>. For the calculation, I_limit_max is <NUM> A.

The SOA-based protection circuits <NUM> hereinbefore described are implemented by an analogue circuit. SOA-based protection, however, can be implemented by a digital circuit as will now be described in more detail.

Referring to <FIG>, a digital SOA-based protection circuit <NUM><NUM> is shown.

The circuit 11e includes an analogue-to-digital converter <NUM> which decimates the source-drain voltage VSD and outputs an n-bit voltage signal.

A clock signal CLK from a clock <NUM> digital voltage signal is frequency-multiplied by voltage signal using a multiplier <NUM>. The multiplied digital voltage signal and the clock signal are supplied, via respective first and second switches S1, S2, to count-up and count-down inputs of a bi-directional pulse counter <NUM>. The a source-drain voltage threshold VDS_o is considered inside the ADC <NUM> as an appropriate offset similar to the offset provided by the Zener diode ZD (<FIG>) in the analogue system. The overflow interrupt flag OF controls the second switch S2, i.e., the CLK signal supplied to the count-down input and the underflow interrupt flag UF controls the first switch S1, i.e. the multiplied digital signal.

The overflow interrupt flag OF SOA-based shutdown signal SOA_SD and is supplied to a NOR gate <NUM> in the same way as the analogue-based circuits <NUM><NUM>, <NUM><NUM>,.

Referring to <FIG>, a motor vehicle <NUM> is shown.

The motor vehicle <NUM> includes a battery <NUM> and a plurality of different loads <NUM>, for example motors, supplied with power from the battery <NUM> and each controlled by a respective load switch <NUM> which is controlled by a controller <NUM>. An SOA-based protection and shut down circuit <NUM> can be provided in a load switch <NUM>.

It will be appreciated that various modifications may be made to the embodiments hereinbefore described. Such modifications may involve equivalent and other features which are already known in the design, manufacture and use of load switch drivers and component parts thereof and which may be used instead of or in addition to features already described herein. Features of one embodiment may be replaced or supplemented by features of another embodiment.

Claim 1:
An over-temperature protection circuit (<NUM>) comprising:
an input (<NUM>) for sensing a source-drain voltage (VDS) at a node (<NUM>) arranged between an output terminal (OUTx) and a drain (D) of a transistor (<NUM>);
a voltage-to-current converter (RVDS) configured to generate a current (Isense_in) in dependence upon the voltage, the voltage-to-current converter comprising a path (<NUM>, <NUM>, <NUM>; <NUM>) arranged between the input (<NUM>) and a reference level (GND), the path comprising a resistor (RVDS);
an accumulator (CSOA; <NUM>, CSOA) including a capacitor (CSOA) arranged to integrate the current or a scaled current obtained from the current and to provide an output; and
a comparator (R, <NUM>; <NUM>, <NUM>) configured to determine whether the output exceeds a threshold and, in dependence on the output exceeding the threshold, to generate a signal (SOA_SD) for signalling that the transistor is be switched off.