Patent Description:
Wireless networks employ radio frequency (RF) waves to permit communication between wireless communication devices over a distance without the constraint of wire-based communication systems. In a typical wireless communication device, a transmitter takes an RF input signal containing information such as voice or data and formats the RF input signal into an appropriate RF radio signal in a predetermined frequency band for transmission by one or more RF antennas. In the transmitter, the RF input signal may be an intermedia frequency (IF) signal having frequency FIF, which is mixed with a local oscillator (LO) signal having frequency FLO in a mixer to generate the RF radio signal having a carrier frequency FRF for transmission. A wireless communication device may have a receiver, and often has a transceiver that includes both a transmitter and a receiver within one package. In the receiver, received and amplified RF radio signal is mixed in a mixer with the LO signal to extract the RF input signal (sometimes also called a baseband signal) which can be further demodulated to reproduce the information conveyed therein.

In a Wi-Fi network, wireless communication devices communicate data wirelessly via for example a wireless access point (AP) or in an ad-hoc fashion within range of the Wi-Fi network. A wireless communication device may be portable and able to draw power from a mobile power source such as rechargeable or replaceable battery without tethered to an electric network for power or data communication.

Wi-Fi signals in a Wi-Fi network may be communicated under an <NUM> protocol. In some Wi-Fi networks, Wi-Fi signals are transmitted under orthogonal frequency-division multiple access (OFDMA) transmission, in which subsets of subcarrier frequency bands are assigned to different users.

In OFDMA transmission such as that specified in <NUM>. 11ax, subsets of time-frequency resources are allocated to allow simultaneous data transmission from multiple users. For example, wide channels (<NUM>, <NUM>, <NUM>, <NUM>+<NUM> and <NUM>) specified in <NUM>. 11ac may be sub-divided into groups of subcarriers ("tones") with OFDMA. Adjacent tones are grouped together into a resource unit (RU), and a sender can choose the best RU for each particular receiver to reduce interference and improve signal to noise ratio (SNR). An RU can contain <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM> or <NUM>×<NUM> tones. Each wide RU can be split into two approximately twice-narrower RUs. The <NUM> band, <NUM> band, <NUM> band and <NUM>+<NUM> (<NUM>) MHz band corresponds to a <NUM>-tone RU, <NUM>-tone RUs, <NUM>-tone RUs and two <NUM>-tone RUs, respectively. For example, for a <NUM> bandwidth, nine <NUM>-tone RUs can be used, while four <NUM>-RUs can alternatively be used. Methods and apparatuses for providing a LO signals for wireless transmission are known from <CIT>, <CIT>, <CIT>, <CIT>, <CIT> and from <NPL>.

Disclosed herein are devices and methods to reduce unwanted CIM3 emission in a wireless communication device, such that the transmit (TX) power level applied in a RU can be increased without exceeding a regulatory emission requirement. In some aspects, unwanted emission may be reduced by shifting or changing local oscillator (LO) frequencies during TX operation. Some embodiments are directed to a fast-locking PLL with adjustable bandwidth that can be controlled to increase the PLL bandwidth during the RX to TX transition to provide a fast locking to a new LO frequency. Embodiments of the present invention are directed to configuring an LO frequency shift amount for different RUs when multiple RUs are allocated within a frequency band.

According to the present invention, a method for operating a device for wireless communication in a plurality of allocated resource units (RUs) within a frequency band is disclosed. The method comprises for one or more RUs of the plurality of RUs: receiving a receive (RX) signal in the RU and demodulating the RX signal with a local oscillator (LO) signal; changing a frequency of the LO signal; and subsequent to changing the frequency of the LO signal, modulating a transmit (TX) data packet for transmission with the LO signal.

In some embodiments, the method further comprises providing, with a phase-locked loop (PLL), the LO signal; and wherein changing the frequency of the LO signal comprises locking, with the PLL to a second LO frequency from a first LO frequency.

According to the present invention, the one or more RUs comprise a first RU and a second RU, wherein the first RU is closer to an edge of the frequency band than the second RU, and wherein a first LO frequency shift amount determined for the first RU is higher in magnitude than a second LO frequency shift amount determined for the second RU.

According to the present invention, an apparatus for wirelessly transmitting a transmit (TX) signal during a TX period and wirelessly receiving a receive (RX) signal during a RX period is disclosed. The apparatus comprises a phase-locked loop (PLL) configured to generate an oscillator (LO) signal; and a controller coupled to the PLL and configured to change a frequency of the LO signal during a transition between the RX period and the TX period. The RX signal is demodulated with the LO signal and the TX signal is modulated with the LO signal, wherein the one or more RUs comprise a first RU and a second RU, wherein the first RU is closer to an edge of the frequency band than the second RU, and wherein a first LO frequency shift amount determined for the first RU is higher in magnitude than a second LO frequency shift amount determined for the second RU.

According to some embodiments, an apparatus for wireless communication in a plurality of allocated resource units (RUs) within a frequency band is provided. The apparatus comprises a phase-locked loop (PLL) configured to generate an oscillator (LO) signal; and a controller coupled to the PLL. The controller is configured to: for one or more RUs of the plurality of RUs, receive a receive (RX) signal in the RU and demodulate the RX signal with the LO signal; change a frequency of the LO signal; and subsequent to changing the frequency of the LO signal, modulate a transmit (TX) data packet for transmission with the LO signal.

In some embodiments, the PLL comprises a phase-frequency detector (PFD); a voltage-controlled oscillator (VCO); and at least one charge pump coupled between the PFD and the VCO. In such embodiments, the controller is further configured to increase a bandwidth of the PLL prior to changing the frequency of the LO signal.

In some embodiments, the VCO has an input terminal coupled to a reference voltage node via a programmable impedance, and the controller is configured to adjust a value of the programmable impedance such that a damping ratio of the PLL is maintained. The programmable impedance may comprise a resistance and a switch that is coupled to the resistance.

In some embodiments, the controller is further configured to increase a magnitude of a charge pump current in the at least one charge pump.

In some embodiments, the VCO has an input terminal coupled to a reference voltage node via a programmable capacitance, and the controller is configured to increase the bandwidth of the PLL by adjusting a magnitude of the programmable capacitance. The programmable capacitance may comprise a capacitor and a switch coupled to the capacitor.

In some embodiments, the PLL further comprises a divider coupled to the PFD, and the controller is configured to increase the bandwidth of the PLL by adjusting a ratio N of the divider.

In some embodiments, the PLL further comprises a reference unit coupled to the PFD and configured to receive one or more reference pulses, and to generate one or more modified pulses based on the one or more reference pulses for the PFD. The modified pulses may have a higher rate of pulses than the one or more reference pulses.

In some embodiments, the reference unit comprises a plurality of delay lines configured to receive a reference pulse of the one or more reference pulses, and to generate a plurality of delayed reference pulses. The reference unit may further comprise a multiplexer coupled between the plurality of delay lines and the PFD, the multiplexer configured to combine the plurality of delayed reference pulses to generate a modified pulse.

In some embodiments, the PLL is configured to change the frequency of the LO signal within a time duration of no more than <NUM>.

A wireless signal may have unwanted emissions on a frequency or frequencies outside the necessary bandwidth allocated for transmission of the wireless signal. The power level of unwanted emissions is subject to regulatory emission requirements by, for example, the Federal Communications Commission (FCC). Under protocols such as Wi-Fi <NUM>. 11ax, a user is allocated a RU with a dedicated narrow bandwidth for signal transmission. The transmitted power is aggregated within the allocated bandwidth using a linear transmitter and harmonic-rejection mixers. Still, there could be unwanted emissions with a power level that violates FCC emission specifications. For example, while OFDMA allows different transmit (TX) powers to be applied to different RUs, increasing TX power for a RU may lead to an increase of unwanted emissions caused by, for example, 3rd-order counter-intermodulation products (CIM3) due to 3rd-order nonlinearity in a transmitter. As a result, TX power for a RU may be limited to avoid exceeding an emission requirement.

Disclosed herein are devices and methods to reduce CIM3 emission in a wireless communication device, such that the TX power level applied in a RU can be increased without exceeding the emission requirement. As a result of the increased Tx power level, higher transmission efficiency, accuracy and range may be achieved by the wireless communication device.

In some aspects of the present application, unwanted emission may be reduced by shifting or changing local oscillator (LO) frequencies between transmit (TX) and receive (RX) operation, such that different LO frequencies are used for modulation/demodulation of a RX signal and a TX signal. The inventors have recognized and appreciated that by changing the LO frequency between TX and RX packets, unwanted CIM3 emission may be reduced. For example, CIM3 emissions may be reduced if the LO frequency is shifted to align with the RU frequency.

During high data rate wireless communication, it is desirable to complete the change in LO frequency within a short amount of time to avoid disruption to continuing RX and TX operations. Some aspects of the present application are directed to a fast-locking phase locked loop (PLL) in the wireless communication device that can be controlled to rapidly change an LO frequency during a transition between a RX period and a TX period. In some embodiments, the fast-locking PLL has an adjustable bandwidth, and is controlled to first increase the PLL bandwidth prior to changing the LO frequency to allow a faster locking during the transition to the new LO frequency. After locking, the PLL bandwidth may be lowered back to the normal level to maintain accuracy of the PLL. In some embodiments, the change of LO frequency may be achieved for example within <NUM> or within <NUM>.

The PLL with adjustable bandwidth for changing the LO frequency can be implemented in a number of ways as described in detail below. Briefly, in some embodiments, a charge pump current in the PLL may be changed to adjust the bandwidth. In some embodiments, impedance and/or capacitance RC values between a reference voltage node and a voltage-controlled oscillator (VCO) may be adjusted to select the bandwidth. In some embodiments, bandwidth may be adjusted by employing a change of N-ratio of a divider in the PLL. In yet some other embodiments, reference pulses to the PLL may be modified to have higher rate of pulses.

Yet some other aspects are directed to a method of configuring an LO frequency shift amount for different RUs when multiple RUs are allocated within a frequency band. The inventors have recognized and appreciated that with multiple RUs, it is not necessary for each RU to have the same amount of LO frequency shift during a transition from RX to TX. For certain RUs, it may be desirable to have a higher amount of LO frequency shift, or no LO frequency shift at all to reduce emission. In some embodiments, the amount of LO frequency shift may be different for different channels. For example, a RU closer to an edge of the frequency band may have a higher magnitude of LO frequency shift to improve emission performance.

<FIG> is a schematic frequency domain diagram illustrating unwanted emission due to nonlinear intermodulation products. <FIG> illustrates frequency bands <NUM> and <NUM>, and a RU <NUM> for either RX or TX in frequency band <NUM>. Because of 3rd order harmonics in the transceiver circuitry, unwanted emission <NUM> appears at a frequency range lower than the LO frequency FLO. Specifically, for CIM3 the unwanted emission <NUM> is centered at FLO-<NUM>×ΔF, where ΔF is the intermediate frequency (IF) between FLO and the center RF frequency of the RU <NUM>. As the TX power level in frequency band <NUM> is increased, power level for unwanted CIM3 emission <NUM> also increases, and may risk exceeding an emission requirement <NUM> at a nearby band <NUM>. As a result, TX power level cannot be increased beyond a maximum level due to the constraint of the emission requirement. An object of the present application is to reduce the effect of CIM3 emission to allow TX power level to be further increased beyond the maximum level permitted in the scenario in <FIG>.

<FIG> is a schematic frequency domain diagram illustrating a shift in LO frequency during TX operation, in accordance with some embodiments. In <FIG>, the LO frequency is shifted higher to FLO' to be closer to the center frequency of RU <NUM>. Meanwhile, the IF is reduced accordingly to ΔF' such that the RF frequency of the RU is maintained. As a result, the unwanted emission <NUM> is centered at FLO'-<NUM>×ΔF' which is away from band <NUM> and the emission at band <NUM> as shown in <FIG> is eliminated. Therefore shifting LO frequency during TX may help relax the TX CIM3 requirement and allow an increase of TX power level.

It should be appreciated that while in the example in <FIG> FLO shifts by a positive amount, it is not a requirement and in some embodiments the amount of shift to TX FLO may be negative, for example when FLO is situated to the right of the center frequency of the RU. It should also be appreciated that while CIM3 emission is illustrated as an example, other unwanted emissions from non-linear mixing or other mechanisms may also be present and may benefit from aspects of the shifting TX LO frequency disclosed herein.

<FIG> is a timing diagram illustrating the LO frequency during transitions between RX and TX operations in a wireless communication device, in accordance with some embodiments. In <FIG>, the LO frequency shifts from FLO_TX at TX period <NUM> to a different value FLO_RX at RX period <NUM> during a first transition <NUM>, and shifts to FLO_TX during a second transition <NUM> from RX period <NUM> to TX period <NUM>. During the RX period, the device receives a RX signal in one RU of one or more RUs, and demodulates the RX signal based on an LO signal having FLO_RX, for example by mixing the received RX signal with the LO signal. During the TX period, the device modulates a TX data packet based on based on an LO signal having FLO_TX that is shifted from FLO_RX, for example by mixing the data packet with the LO signal prior for transmission. As a result of the shifted LO signal during TX period, unwanted emissions such as the CIM3 emissions may be reduced and the maximum TX power level can be increased without offending the CIM3 emission requirements.

The inventors have recognized and appreciated that to prevent interruption to data transmission during wireless communication, the period of time it takes to transition between FLO_RX and FLO_TX as shown in <FIG> needs to be minimized. According to one aspect, a fast-locking PLL is provided having means for completing the shifting of LO frequency and locking to a new LO frequency within a time duration of no more than <NUM>, no more than <NUM>, no more than <NUM>, or between <NUM> and <NUM>. In some embodiments, the PLL is controlled to perform a "gear shift" to a higher bandwidth during the LO frequency transition to allow a fast locking, and a subsequent gear shift back to a lower, normal bandwidth after locking to the new LO frequency to integrated phase noise.

<FIG> is a schematic diagram of components in a wireless communication device <NUM> having a fast-locking PLL, in accordance with some embodiments. In device <NUM>, PLL <NUM> generates an LO signal <NUM> having LO frequency FLO which is mixed with a received RF signal <NUM> at mixer <NUM>. PLL <NUM> generates a LO signal <NUM> having a shifted LO frequency FLO + δf. Mixer <NUM> mixes LO signal <NUM> with an IF signal to generate RF signal <NUM> for transmission.

In <FIG>, PLL <NUM> is controlled by a controller <NUM> to change the LO frequency between RX and TX modes in accordance with Table <NUM>. Table <NUM> summarizes the LO frequency, IF frequency, and RF frequency during operation of device <NUM>, in accordance with some embodiments. During transition from RX mode to TX mode, PLL <NUM> is controlled by controller <NUM> to change FLO by an amount of δf to reduce unwanted emissions as described elsewhere in this disclosure. Correspondingly, device <NUM> will change the IF frequency by - δf using suitable techniques known to a person of ordinary skill in the art such that the combined RF frequency for TX remains the same at FRF. It should be appreciated that δf may be of any reasonable amount, and can be either positive (to increase FLO) or negative (to decrease FLO).

<FIG>, which shows controller <NUM> coupled to PLL <NUM> with a control data path <NUM>. In some embodiments, the changing of LO frequency by PLL <NUM> may be controlled in response to control signals transmitted from controller <NUM> in control data path <NUM>. <FIG> illustrates an example in which a control signal "LO_index" is used to specify the LO frequency shift amount δf for a given channel or RU. A control signal "Fast_Locking_EN" is used to trigger the PLL to switch into a fast locking mode to allow a faster time to lock into the new LO frequency. In some embodiments, the PLL increases its bandwidth in the fast locking mode, and restores the PLL bandwidth to a normal, lower level upon completion of the locking. While not shown, it should be appreciated that additional or different control signals and/or parameter data may be transmitted in control data path <NUM> to control operation of PLL <NUM>.

Controller <NUM> may comprise any suitable logic, processors and/or memory elements, and may include any suitable processing device such as but not limited to a central processing unit (CPU), digital signal processor (DSP), addressable controller, general or special purpose microprocessor, microcontroller, addressable microprocessor, programmable processor, programmable controller, dedicated processor, dedicated controller, or any other suitable processing device. Some or all components within controller <NUM> may be packaged as a systemon-a-chip (SOC), which in some embodiments may include PLL <NUM> and other components as shown in <FIG>. Moreover, it should be appreciated that <FIG> is a simplified representation of a controller <NUM>. An actual implementation of a controller <NUM> may comprise separate circuitry for processing RX and TX data, as well as sending and receiving data and control signals to components such as PLL <NUM>.

Controller <NUM> may comprise a non-transitory computer-readable storage medium that may include, for example, volatile and/or non-volatile memory. The non-transitory computer-readable storage medium may store one or more instructions such as but not limited to a firmware to program the one or more processors to perform any of the methods or processes described herein. In some examples, the components disclosed herein may read parameters that affect the functions performed by the components. These parameters may be physically stored in any form of suitable memory including volatile memory (such as RAM) or nonvolatile memory (such as but not limited to flash memory, EPROM or EEPROM). In addition, the parameters may be logically stored in a propriety data structure (such as a database or file defined by a user space application) or in a commonly shared data structure (such as an application registry that is defined by an operating system). In addition, some examples provide for both system and user interfaces that allow external entities to modify the parameters and thereby configure the behavior of the components. The terms "code", "program" or "software" are used herein in a generic sense to refer to any type of computer code or set of computer-executable instructions that can be employed to program a computer or other processor to implement various aspects of the present invention as discussed above. Additionally, it should be appreciated that according to one aspect of this embodiment, one or more computer programs that when executed perform methods of the present invention need not reside on a single computer or processor, but may be distributed in a modular fashion amongst a number of different computers or processors to implement various aspects of the present invention. The instructions may be persistently stored as encoded signals, and the instructions may cause the processor to perform any of the functions described herein.

<FIG> is a series of timing diagrams illustrating an exemplary process of shifting LO frequency in a fast-locking PLL as shown in <FIG>, in accordance with some embodiments. <FIG> shows that a default LO frequency is indicated by LO_index of <NUM>'b0000 for RX period <NUM>. Upon transition to TX period <NUM>, a shifted LO frequency with an LO frequency shift amount of δf is indicated by LO_index of <NUM>'bxxxx, which restores back to the default LO frequency upon transition from TX period <NUM> to RX period <NUM>. Period <NUM> is a TX period that is indicated as having a default LO frequency without changes. It should be appreciated that any suitable coding schemes may be used to program LO_index to indicate the amount of LO frequency. The bit length in LO_index and the type of information conveyed therein as shown in <FIG> is by way of example only and aspects of the present application are not so limited.

Still referring to <FIG>, which shows Fast_locking_EN is used to trigger a change in PLL bandwidth during a transition between RX/TX periods to permit fast locking to a new LO frequency value. In particular, at the beginning of TX period <NUM>, Fast_locking_EN changes polarity from low to high during a transition period <NUM> to indicate a switch to higher PLL bandwidth. Similarly, at the beginning of RX period <NUM>, Fast_locking_EN changes polarity from high to low during a transition period <NUM> to indicate a switch back to lower PLL bandwidth. It should be appreciated that the low to high transition illustrated for Fast_locking_EN in periods <NUM>, <NUM> is by way of example only and opposite polarity or any other suitable encoding may also be used.

<FIG> is a schematic diagram of an exemplary fast-locking PLL <NUM>, in accordance with some embodiments. PLL <NUM> includes a phase-frequency detector (PFD), a voltage-controlled oscillator (VCO), at least one charge pump (CP) coupled between the PFD and the VCO, an impedance Rp and a capacitance Cp coupled between ground and an input terminal to the VCO, and a multi-modulus divider (MMD) having a divider ratio N.

<FIG> is a schematic flow diagram illustrating a process <NUM> of controlling shifting LO frequency in the fast-locking PLL shown in <FIG>, in accordance with some embodiments. At block <NUM> of process <NUM>, a value of LO_index is read to decide if a switch in LO frequency should be performed. If the LO_index value is zero, process <NUM> ends. As a variation of process <NUM>, block <NUM> may be omitted for a process that may proceed to begin with block <NUM> if there is no need to read an index to determine whether a change in LO frequency is called for.

If the value of LO_index calls for a change in LO frequency, at block <NUM> the Fast_Locking_EN is set to <NUM> to enable a wide PLL bandwidth. At block <NUM>, PLL parameters such as but not limited to the PLL N value and a Pcode for VCO are changed to switch the LO frequency. Block <NUM> provides an appropriate wait time for the new LO frequency to be locked. At block <NUM>, Fast_Locking_EN is set to <NUM> to disable the wide PLL bandwidth and restore the PLL bandwidth to a normal value.

It should be appreciated that while <FIG> and blocks <NUM>, <NUM> of <FIG> illustrate examples of switching between a wide and a normal PLL bandwidth levels during the LO frequency switching operation, aspects of the present application is not limited to having binary bandwidth levels. For example, the PLL may have one or more intermediate bandwidth levels, and can be controlled to switch to a highest bandwidth, followed by one or more intermediate bandwidth, before restoring to a normal bandwidth level for fast locking to a new LO frequency.

<FIG> illustrate several exemplary implementations of a PLL with means to adjust a PLL bandwidth to provide fast-locking.

<FIG> is a schematic diagram illustrating a first embodiment of a PLL 700A with an adjustable bandwidth. As shown in <FIG>, PLL 700A comprises one or more programmable current sources <NUM> that can be controlled by a controller to increase or decrease a magnitude of a charge pump current ICP. As the bandwidth <MAT>, an increase of ICP by a factor of α<NUM> will result in an increase of bandwidth by a factor of α. Programmable current sources <NUM> may be implemented with any suitable circuitry known in the field.

Meanwhile, the damping factor <MAT> is proportional to the square root of ICP and would have increased by a factor of α if ICP goes up by a factor of α<NUM>. To stabilize δ before and after the bandwidth is adjusted, a value for resistance RP as illustrated in <FIG> is also adjusted concurrently with the change to ICP to become RP/α to maintain δ at a constant level. In <FIG>, RP is implemented as two serially connected resistances having values RP/α and (<NUM>-<NUM>/α)RP, respectfully. A switch <NUM> is provided that can be controlled to short the (<NUM>-<NUM>/α)RP resistance when ICP is increased by α<NUM> to increase the PLL bandwidth, such that the effective resistance of RP is changed from a value of RP to RP/α to maintain the damping factor. It should be appreciated that a programmable resistance RP may be implemented in any suitable ways known in the field, and not limited to the example illustrated in <FIG>.

<FIG> is a schematic diagram illustrating a second embodiment of a PLL 700B with an adjustable bandwidth. In PLL 700B, the values of capacitance CP and impedance RP are adjusted concurrently to change the PLL bandwidth ωn while stabilizing the damping factor δ. In particular, when CP is changed to CP/α<NUM> and RP is changed to α·RP, the bandwidth ωn will become α·ωn while the damping factor δ remains constant.

In <FIG>, a programmable capacitance is implemented by a first capacitance of CP/α<NUM> in parallel with a second capacitance of (<NUM>-<NUM>/α<NUM>)·CP. A programmable impedance is implemented by a first resistance of (α-<NUM>) ·RP in series with a second resistance of RP. A first switch <NUM> is coupled in parallel with the first resistance, and a second switch <NUM> is coupled in series between the top terminals of the first and second capacitances. Switches <NUM> and <NUM> are closed during a normal mode operation to yield an effective impedance of RP in series with CP between an input terminal <NUM> of the VCO and ground, such that the PLL has a first bandwidth ωn. When switches <NUM> and <NUM> are open, the bandwidth of the PLL becomes α·ωn. It should be appreciated that programmable CP and impedance RP may be implemented in any suitable ways known in the field and not limited to the example illustrated in <FIG>.

<FIG> is a schematic diagram illustrating a third embodiment of a PLL 700C with an adjustable bandwidth. In PLL 700C, bandwidth may be increased by changing the MMD N-ratio. For example, when N is changed to N/α<NUM>, the bandwidth ωn becomes α·ωn. To stabilize the damping factor δ, impedance Rp may be adjusted to become RP/α, which may be accomplished by a switch <NUM> as described above in relation to <FIG>.

<FIG> is a schematic diagram illustrating a fourth embodiment of a PLL 700D with an adjustable bandwidth. Instead of increasing the charge pump current by adjusting the current sources like in <FIG>, PLL 700D provides a reference unit <NUM> that takes reference pulses CKREF and CKMMD as input and generates modified versions of CKREF and CKMMD having a higher rate of pulses to supply to the PFD in order to increase the bandwidth and to provide faster lock.

<FIG> is a schematic timing diagram of modified reference clocks as generated in the PLL of <FIG>, in accordance with some embodiments. <FIG> shows that for each pulse in a normal bandwidth mode <NUM>, three more pulses are generated in a wide bandwidth mode <NUM>. It should be appreciated that more or less multiples of additional pulses in each reference clock CKREF and CKMMD may be used.

Referring back to <FIG>, in which reference unit <NUM> comprises a plurality of delay lines <NUM> that can generate multiple delayed copies of a single pulse in the input clock signals. The delay lines <NUM> are coupled to a multiplexer <NUM> which multiplexes the output of the delay lines into modified pulses REFi and MMDi to provide to the PFD.

Still referring to <FIG>, to stabilize the damping factor δ, impedance Rp may be adjusted to become RP/α, which may be accomplished by a switch <NUM> as described above in relation to <FIG>.

Some aspects are directed to configuring an amount of LO frequency shift for different RUs when multiple RUs are allocated within a frequency band.

<FIG> is a schematic diagram illustrating a first embodiment of LO frequency shift configurations for different RU locations. <FIG> shows RU locations in a <NUM> high efficiency (HE) PHY Protocol Data Unit (PPDU). In <FIG>, channels in the edge RUs within regions <NUM> (Edge-L) and <NUM> (Edge-R) may be configured to have shifted LO frequencies during TX operations to reduce unwanted emissions. The LO frequency shift amount δf may have a magnitude of half of the data bandwidth (DBW) by the edge RUs, with a polarity of either plus or minus depending on the relative location of the LO frequency to the channel frequency.

<FIG> is a schematic diagram illustrating a second embodiment of LO frequency shift configurations for different RU locations. <FIG> shows a variation of the configuration shown in <FIG>, and shows that different shift amounts are configured for different channels, for example between channels in regions <NUM> (Edge-LL), <NUM> (Edge-L), <NUM> (Edge-RR) and <NUM> (Edge-R). The LO frequency shift amount δf may be plus or minus one half of DBW by the respecive RU groups.

<FIG> is a schematic diagram illustrating RU allocations in a <NUM> HE PPDU. In <FIG> is annotated with numerals <NUM>-<NUM> as reference numbers to each RU. Table <NUM> is a listing of TX LO frequency shift configuration for different channels and RUs as labeled in <FIG>, in accordance with some embodiments. Table <NUM> is a listing summarizing grouping of RUs into groups of Edge_LL[<NUM>], Edge_LL[<NUM>], Edge_L[<NUM>], Edge_L[<NUM>], Edge_R[<NUM>], Edge_R[<NUM>], Edge_RR[<NUM>] and Edge_RR[<NUM>], where each group may be assigned a different amount of LO frequency shift, in accordance with some embodiments.

<FIG> is a schematic diagram illustrating channel allocations for wide <NUM> and <NUM> bandwidth. Table <NUM> is a listing of TX LO frequency shift or offset amount that can be configured for the channels allocated for <NUM> bandwidth as shown in <FIG>, in accordance with some embodiments.

Having thus described several aspects of at least one embodiment of this invention, it is to be appreciated that various alterations, modifications, and improvements will readily occur to those skilled in the art.

Such alterations, modifications, and improvements are intended to be part of this disclosure, and are intended to be within the scope of the invention defined by the appended claims. Further, though advantages of the present invention are indicated, it should be appreciated that not every embodiment of the technology described herein will include every described advantage. Some embodiments may not implement any features described as advantageous herein and in some instances one or more of the described features may be implemented to achieve further embodiments. Accordingly, the foregoing description and drawings are by way of example only.

Various aspects of the present invention may be used alone, in combination, or in a variety of arrangements not specifically discussed in the embodiments described in the foregoing and is therefore not limited in its application to the details and arrangement of components set forth in the foregoing description or illustrated in the drawings. For example, aspects described in one embodiment may be combined in any manner with aspects described in other embodiments.

Also, the invention may be embodied as a method, of which an example has been provided. The acts performed as part of the method may be ordered in any suitable way. Accordingly, embodiments may be constructed in which acts are performed in an order different than illustrated, which may include performing some acts simultaneously, even though shown as sequential acts in illustrative embodiments.

Such alterations, modifications, and improvements are intended to be part of this disclosure, and are intended to be within the scope of the invention defined by the appended claims. Further, though advantages of the present invention are indicated, it should be appreciated that not every embodiment of the invention will include every described advantage. Some embodiments may not implement any features described as advantageous herein and in some instances. Accordingly, the foregoing description and drawings are by way of example only.

Claim 1:
A method for operating a device for wireless communication in a plurality of allocated resource units, RUs, within a frequency band, the method comprising:
for one or more RUs of the plurality of RUs:
receiving a receive, RX, signal in the RU and demodulating the RX signal with a local oscillator, LO, signal;
changing a frequency of the LO signal by a respective LO frequency shift; and
subsequent to changing the frequency of the LO signal, modulating a transmit, TX, data packet for transmission with the LO signal;
wherein
the one or more RUs comprise a first RU and a second RU, wherein the first RU is closer to an edge of the frequency band than the second RU, and wherein a first LO frequency shift amount determined for the first RU is higher in magnitude than a second LO frequency shift amount determined for the second RU.