Patent Description:
Gallium nitride semiconductor material has received appreciable attention in recent years because of its desirable electronic and electro-optical properties. GaN has a wide, direct bandgap of about <NUM> eV that corresponds to the blue wavelength region of the visible spectrum. Light-emitting diodes (LEDs) and laser diodes (LDs) based on GaN and its alloys have been developed and are commercially available. These devices can emit visible light ranging from the violet to red regions of the visible spectrum.

Because of its wide bandgap, GaN is more resistant to avalanche breakdown and can maintain electrical performance at higher temperatures than other semiconductors, such as silicon. GaN also has a higher carrier saturation velocity compared to silicon. Additionally, GaN has a Wurtzite crystal structure, is a very stable and hard material, has a high thermal conductivity, and has a much higher melting point than other conventional semiconductors such as silicon, germanium, and gallium arsenide. Accordingly, GaN is useful for high-speed, high-voltage, and high-power applications. For example, gallium-nitride materials are useful in semiconductor amplifiers for radio-frequency (RF) communications, radar, RF energy, and microwave applications.

Applications supporting mobile communications and wireless internet access under current and proposed communication standards, such as WiMax, <NUM>, and <NUM>, can place austere performance demands on high-speed or RF amplifiers constructed from semiconductor transistors. The amplifiers may need to meet performance specifications related to output power, signal linearity, signal gain, bandwidth, and efficiency.

<CIT> relates to an apparatus and method for a switched capacitor architecture for multi-band Doherty power amplifiers.

<CIT> relates to an integrated Doherty amplifier.

<CIT> relates to a radiofrequency amplifier.

<CIT> relates to a suspended substrate - 3dB microwave quadrature coupler.

Methods and structures for improving the performance of high-speed, high-power, broad-band, integrated amplifiers are described. The structures and methods relate to circuitry for combining amplified signals and impedance matching at the output of a modified Doherty amplifier. Rearranging the order of signal combining and impedance matching compared to conventional Doherty amplifiers and using an impedance inverter that comprises an integrated distributed inductive element in the form of a microstrip line can appreciably improve amplifier bandwidth and allow scalability of signal amplification to higher powers.

The foregoing apparatus and method embodiments may be implemented with any suitable combination of aspects, features, and acts described above or in further detail below. These and other aspects, embodiments, and features of the present teachings can be more fully understood from the following description in conjunction with the accompanying drawings.

The skilled artisan will understand that the figures, described herein, are for illustration purposes only. It is to be understood that in some instances various aspects of the embodiments may be shown exaggerated or enlarged to facilitate an understanding of the embodiments. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the teachings. In the drawings, like reference characters generally refer to like features, functionally similar and/or structurally similar elements throughout the various figures. Where the drawings relate to microfabricated circuits, only one device and/or circuit may be shown to simplify the drawings. In practice, a large number of devices or circuits may be fabricated in parallel across a large area of a substrate or entire substrate. Additionally, a depicted device or circuit may be integrated within a larger circuit.

When referring to the drawings in the following detailed description, spatial references "top," "bottom," "upper," "lower," "vertical," "horizontal," and the like may be used. Such references are used for teaching purposes, and are not intended as absolute references for embodied devices. An embodied device may be oriented spatially in any suitable manner that may be different from the orientations shown in the drawings.

Features and advantages of the illustrated embodiments will become more apparent from the detailed description set forth below when taken in conjunction with the drawings.

In the following, whenever an embodiment is described, reference is to be made to the above figure list to determine whether the embodiment is to be read as corresponding to the claimed invention or as an example which does not correspond to the claimed invention.

As described above, amplifiers comprising gallium nitride (GaN) transistors are useful for high-speed, high-voltage, and high-power applications because of the favorable material properties of gallium nitride. In some cases, transistors formed from other semiconductor materials such as gallium arsenide, silicon carbide, silicon germanium, etc., may be suitable for certain high-speed, high-voltage, and high-power applications. Technology areas in which GaN transistors are finding increasing use are radio-frequency (RF) communications and radar. In RF communications, for example, GaN transistors may be used in Doherty amplifiers at a base station to amplify data signals for wireless broadcasting within a cell covered by the base station.

One arrangement of a Doherty amplifier <NUM> is shown in <FIG>. A Doherty amplifier may comprise a main amplifier <NUM> and a peaking amplifier <NUM> arranged on parallel circuit branches. An input RF signal is split by a <NUM>-degree coupler <NUM> that provides an in-phase attenuated signal to the main amplifier and an attenuated signal rotated by <NUM> degrees (typically delayed by <NUM>°) to the peaking amplifier. After amplification, an impedance inverter <NUM> that includes a compensating <NUM>-degree rotation is used to recombine the two signals into a combined and amplified output RF signal. An output impedance-matching element <NUM> may be connected to the combining node to match the output impedance of the Doherty amplifier to the impedance of a load (not shown).

Impedance-matching components <NUM>, <NUM> may be placed before the main amplifier and peaking amplifier in a Doherty amplifier. These matching components may be used to match the impedances of the transmission lines from the <NUM>-degree coupler <NUM> to the input impedances of the two amplifiers, so that signal reflections from the amplifiers are reduced or essentially eliminated. Additional impedance-matching components <NUM>, <NUM> may be placed at the outputs of the main and peaking amplifiers to match impedances to the input of the impedance inverter <NUM> (which may be <NUM> ohms by design) and to the combining node <NUM>. The impedance-matching components <NUM>, <NUM> may comprise resistive, capacitive, and/or inductive circuit elements.

The inventor has recognized and appreciated that there is a cost in bandwidth performance of a Doherty amplifier <NUM> when impedance-matching components <NUM>, <NUM> are placed between the outputs of the main and peaking amplifiers <NUM>, <NUM> and the impedance inverter <NUM> and combining node <NUM>. At these locations, the impedance-matching components <NUM>, <NUM> add electrical path length between the two amplifiers so that it may not be possible for the impedance inverter <NUM> to employ only a <NUM>-degree rotation to compensate for the phase rotation introduced by the <NUM>° coupler. Instead, the impedance inverter <NUM> may need to operate with a phase rotation θ that is an odd integer multiple of <NUM> degrees according to the following relation <MAT> where n is an integer value of <NUM> or greater.

To investigate the cost in bandwidth performance of a Doherty amplifier <NUM> due to the impedance-matching elements <NUM>, <NUM>, high-frequency simulations were performed using a low-power circuit model <NUM>, which is depicted in <FIG>. The low-power circuit model represents a case when the peaking amplifier is off. The inventor has recognized and appreciated that when the peaking amplifier is off, a substantial impedance mismatch can occur between the output of the main amplifier <NUM> and the combining node <NUM> in the Doherty amplifier. Accordingly, the low-power operation may constrain the rated RF fractional bandwidth for a Doherty amplifier, e.g., a guaranteed bandwidth for all signal levels. In the low-power circuit model <NUM>, the main amplifier <NUM> is represented as a first current source Im and the peaking amplifier <NUM> is represented as a second current source Ip, which outputs no current. The impedance inverter <NUM> is modeled as a transmission line having a resistance Ro and having an adjustable phase rotation, which can be set to an odd multiple of <NUM>° at the center frequency of operation (<NUM> for this simulation). The load impedance is Ro/<NUM>. For purposes of the simulation, the impedance of the peaking amplifier when off is given a value of 20Ro.

Simulations circuits and circuit elements described herein may be implemented using a software tool such as Advanced Design System (ADS) available from Keysight Technologies, Inc. of Santa Rosa, California. Other suitable software tools include, but are not limited to NI AWR Design Environment available from AWR Corporation of El Segundo, California and Sonnet® software tools available from Sonnet Software of North Syracuse, New York.

Results from the simulations of the Doherty amplifier are shown in <FIG>. The frequency-response curves <NUM>, <NUM>, <NUM> plotted in the graph represent the scattering parameter S(<NUM>,<NUM>) evaluated looking from the output of the main amplifier <NUM> (e.g. the current source Im) into the impedance inverter <NUM>. The frequency-response curves represent an amount of signal reflected back to the main amplifier (e.g., voltage-to-standing-wave ratio) as a function of frequency. For purposes of evaluating amplifier performance, an RF fractional bandwidth (Δω/ωo) for the amplifier may be determined from a frequency difference Δω between the -<NUM> dB points on the frequency-response curves where the value of the back-reflected signal is at least <NUM> dB below the signal level input to the impedance inverter.

When the impedance-matching elements <NUM>, <NUM> are located before the impedance inverter and combining node, the minimum allowable phase rotation by the impedance inverter <NUM> may be <NUM>° due to the extra electrical path length added by the impedance-matching elements. One such case (n=<NUM> in EQ. <NUM>, dashed line) corresponds to the frequency-response curve <NUM> plotted in <FIG>. In this case, the RF fractional bandwidth is approximately <NUM>%. If the added electrical path introduced by the impedance-matching elements <NUM>, <NUM> is greater, the minimum allowable phase introduced by the impedance inverter <NUM> may increase to <NUM>° (n=<NUM>), which results in the frequency-response curve <NUM>. For this case, the RF fractional bandwidth reduces to about <NUM>%. Conventional Doherty amplifiers for RF communication systems typically operate with RF fractional bandwidths less than about <NUM> %. On the other hand, if the minimum allowable phase introduced by the impedance inverter <NUM> were <NUM>°, then the RF fractional bandwidth could increase to over <NUM> % as indicated by the frequency-response curve <NUM>.

The inventor has recognized and appreciated that removing the impedance-matching elements <NUM>, <NUM> before the impedance inverter <NUM> and combining node <NUM> allows a reduction in the compensating phase introduced by the impedance inverter to <NUM>° or approximately <NUM>°. Although the compensating phase angle is preferably <NUM>°, in some cases the coupler <NUM> may impart a phase difference between <NUM>° and <NUM>°, which is compensated by the impedance inverter.

<FIG> depicts an embodiment of a modified Doherty amplifier <NUM> in which signals from the main and peaking amplifiers are combined first, and then impedance is matched to a load after combining. For example, impedance matching can be accomplished in an output impedance-matching element <NUM> located after the combining node <NUM>. According to some embodiments, the combining node <NUM> may be located at the output of the peaking amplifier <NUM>. An input to an impedance inverter <NUM> may connect directly to an output from the main amplifier <NUM>. There may be no impedance-matching element between the output from the main amplifier and an input to the impedance inverter <NUM> that matches or rotates the impedance from the main amplifier to <NUM> ohms, for example. Further, there may be no impedance-matching element between the output of the peaking amplifier <NUM> and the combining node <NUM>.

Further details of an impedance inverter <NUM> and modified Doherty amplifier <NUM> are depicted in <FIG>, according to some embodiments. In some cases, the impedance inverter <NUM> comprises a conductive strip line <NUM> (e.g., a microstrip line) that extends a length L. The length L may extend between and along output drain bonding pads <NUM> of the main amplifier <NUM> and the peaking amplifier <NUM>. The conductive strip line <NUM> may have a width W. The length of the conductive strip line may be between approximately <NUM> millimeters and approximately <NUM> millimeters, according to some embodiments, and may be selected to provide a desired inductance for the strip line <NUM>. The width of the conductive strip line may be between approximately <NUM> microns and approximately <NUM> microns, according to some embodiments, and may be selected to provide a desired inductance for the strip line. In some implementations, the conductive strip line is formed over a ground conductor or ground plane and separated from the ground conductor or ground plane by a dielectric material (not shown). In other embodiments, the conductive strip line may not be formed over or adjacent to a ground plane. Instead, a ground plane may be removed from an area of a PCB at which the conductive strip line is patterned. The conductive strip line, when implemented in the impedance inverter for RF signals, may comprise an integrated distributed impedance element which is essentially entirely inductive. In some implementations, the strip line may include some parasitic capacitance and resistance.

The conductive strip line may be formed on a substrate <NUM>, upon which an output impedance matching element <NUM> may be manufactured. In some embodiments, the main amplifier <NUM> and the peaking amplifier <NUM> may be mounted adjacent to the substrate <NUM> and be on one or more separate dies. In some implementations, the conductive strip line <NUM> may be integrated onto a same substrate on which the main amplifier <NUM> and/or the peaking amplifier <NUM> are formed. The substrate <NUM> on which the conductive strip line is formed may comprise a printed circuit board in some embodiments, a high-frequency laminate capable of carrying signals at GHz frequencies in some embodiments, a ceramic, or a semiconductor. An example of a high-frequency laminate is laminate model RO4003® available from Rogers Corporation of Chandler, Arizona.

According to some embodiments, an impedance inverter <NUM> may further include one or more amplifier output bond wires <NUM> that connect to a drain bond pad <NUM> of the main amplifier and the conductive strip line <NUM> near a first end of the strip line (e.g., located within about a first <NUM>/<NUM> of the length of the strip line). Additionally, there may be one or more amplifier output bond wires <NUM> connected between a drain bond pad of the peaking amplifier <NUM> and an opposing end of the conductive strip line <NUM>. The output bond wires <NUM> may be arranged at essentially uniform spacing along the strip line in some embodiments, but may be arranged non-uniformly in other embodiments. The spacing between the bond wires may be between approximately <NUM> microns and approximately <NUM> microns. The bond wires <NUM> may be comprise gold or any other suitable conductor, may have a diameter between <NUM> microns and <NUM> microns, and may arc or extend over the substrate <NUM> and substrate <NUM> to a height between approximately <NUM> microns and approximately <NUM> microns. The output bond wires <NUM> comprise lumped inductive elements of the impedance inverter <NUM>. Such bond wires are recognized in the field of RF electronics as "lumped inductors" having an inductance that is determined primarily by a length and diameter of the bond wire. There may be amplifier input bond wires <NUM> connecting to gate bond pads <NUM> of the main amplifier <NUM> and the peaking amplifier <NUM>.

In some embodiments where the conductive strip line <NUM>, main amplifier and/or peaking amplifier are integrated onto a same substrate, bond wires <NUM> may not be used. Instead, conductive interconnects such a microstrip transmission lines or conductive traces may be used to connect the strip line <NUM> to outputs from the main and peaking amplifiers. In some implementations where the conductive strip line <NUM>, main amplifier and/or peaking amplifier are integrated onto a same substrate, one or both drain bond pads <NUM> may be replaced with or subsumed into the conductive strip line <NUM>, so that the inductance of the impedance inverter is essentially entirely a distributed inductance.

For the embodiment depicted in <FIG>, a combining node of the Doherty amplifier <NUM> may be located at the drain bond pad <NUM> of the peaking amplifier <NUM>. In such embodiments, the impedance inverter <NUM> may comprise lumped inductive elements (for example, the main and peaking amplifier output bond wires <NUM>) and an integrated distributed inductive element comprising the conductive strip line <NUM>. For purposes of analyzing RF performance, the impedance inverter may include lumped capacitive elements, which may include the drain-to source capacitances of the main amplifier <NUM> and the peaking amplifier <NUM> and capacitance of the drain bond pads <NUM>. The impedance inverter <NUM> may further include a small distributed capacitance of the conductive strip line <NUM>.

In some implementations, lumped capacitance elements may be added as shunts to the drain bond pads <NUM> and/or inductive strip line <NUM> to adjust an operating frequency of the Doherty amplifier to a desired value, or added in series to extend a length of the impedance inverter for higher power applications. In some cases, an integrated, inductive strip line may comprise two separated strip lines <NUM> that are connected by a capacitor <NUM> (e.g., a surface mount capacitor) added in series between the two halves of the strip line, as depicted in <FIG>. This arrangement of two strip lines can extend the overall distance between the two amplifiers, allowing larger amplifiers <NUM>, <NUM> and higher power capability, without adding more inductance. However, the added capacitance should be limited to avoid altering phase rotation in the impedance inverter beyond <NUM> degrees.

In some cases, there may be output bond wires <NUM> connected between a drain bond pad <NUM> of the peaking amplifier <NUM> and an output impedance-matching element <NUM> of the Doherty amplifier. The output impedance-matching element <NUM> may comprise lumped and/or distributed impedance elements that are used to match an impedance from the drain bond pad <NUM> of the peaking amplifier <NUM> to a load impedance (e.g., <NUM> ohms) at a load plane <NUM>.

Additional details of structure near the drain bond pads <NUM> of the main or peaking amplifier are shown in <FIG>, for some embodiments. The main amplifier <NUM> and/or the peaking amplifier <NUM> may comprise a linear array of transistors having gate conductors <NUM>, drain contacts <NUM>, and source contacts <NUM> formed on a semiconductor substrate <NUM>. The drain contacts <NUM> for an amplifier may connect to a drain bond pad <NUM>, at which one or more output bond wires <NUM>, <NUM> may be bonded. In some implementations, the active regions of the transistors may comprise gallium nitride, which is desirable for high-power, high-frequency amplification of RF signals as described above. As used herein, the phrase "gallium nitride" refers to gallium nitride (GaN) and any of its alloys, such as aluminum gallium nitride (AlxGa(<NUM>-x)N), indium gallium nitride (InyGa(<NUM>-y)N), aluminum indium gallium nitride (AlxInyGa(<NUM>-x-y)N), gallium arsenide phosporide nitride (GaAsxPy N(<NUM>-x-y)), aluminum indium gallium arsenide phosporide nitride (AlxInyGa(<NUM>-x-y)AsaPb N(<NUM>-a-b)), amongst others. In some cases, the transistors may be formed from other semiconductor materials such as gallium arsenide, silicon carbide, silicon germanium, silicon, indium phosphide, etc. and the invention is not limited to gallium-nitride-based amplifiers.

A benefit of a conductive strip line <NUM> in the impedance inverter as an inductive impedance element is that it can more readily allow for scalability of power of the Doherty amplifier <NUM> compared to lumped inductive elements only. For example, the power-handling capability of a Doherty amplifier may be determined by the size of transistors in the main amplifier <NUM> and peaking amplifier <NUM>. Power may be increased in a Doherty amplifier by increasing the number of transistors (gate conductors, drain contacts, and source contacts) along the linear array of transistors in the main amplifier and the peaking amplifier. However, increasing the number of transistors and length of the arrays can require additional amplifier output bond wires <NUM> between the two amplifiers and corresponding locations on the conductive strip line <NUM>, and may require increasing the length of the strip line.

The addition of amplifier output bond wires <NUM> and increased length of the strip line would normally increase the inductance of the impedance inverter <NUM>. The inventor has recognized and appreciated that this increase in inductance may be offset by decreasing the inductance of the conductive strip line <NUM>. Inductance of the strip line <NUM> may be decreased by increasing its width W. By selecting the length and width of the strip line, the distributed inductance of the strip line <NUM> may be tuned to a desired value. According to some embodiments, a total of the distributed inductance of the strip line may be between approximately <NUM> picoHenries and approximately <NUM> nanoHenries.

For power scaling in some cases, the inductance of the strip line <NUM> may be decreased by increasing its width W and/or decreasing its length L. Conversely, the inductance of the strip line may be increased by decreasing its width W and/or increasing its length L. Such changes will also affect any capacitance and resistance of the strip line. The conductive strip line <NUM> comprises a tunable impedance element for the impedance inverter <NUM> that may be adjusted at the patterning stage of manufacture for a desired application. Accordingly, power of the Doherty amplifier <NUM> may be scaled while preserving an operating frequency and bandwidth performance of the Doherty amplifier <NUM>. Such scalability would not be possible in a purely lumped-element impedance inverter where the drain bond pad <NUM> of the main amplifier <NUM> is wire bonded directly to the drain bond pad of the peaking amplifier <NUM>.

Adding length to the transistor arrays may also add electrical path length to the impedance inverter <NUM>. As a result, there will be a limit to the total allowed electrical path length, and consequently power, that the Doherty amplifier <NUM> can handle when arranged as depicted in <FIG>. Essentially, the electrical path length can be increased until the phase rotation reaches approximately <NUM> degrees, though higher values (e.g., up to <NUM> degrees) may be possible in some cases where the coupler <NUM> provides a higher phase rotation than <NUM> degrees. Because the phase rotation for a physical path length will depend on frequency, lower-frequency devices may allow greater length extensions of the amplifier transistor arrays and therefore handle high powers. Initial calculations indicate that Doherty amplifiers configured as shown in <FIG> should be capable of amplifying RF signals in frequency ranges between about <NUM> and about <NUM> to power levels between about <NUM> Watts and about <NUM> Watts at <NUM> and between about <NUM> Watts and about <NUM> Watts at <NUM>. In some implementations, the rated output power levels can be as high as between about <NUM> Watts and about <NUM> Watts at <NUM> and between about <NUM> Watts and about <NUM> Watts at <NUM>.

In an alternative embodiment, the power capability of the Doherty amplifier <NUM> may be doubled. Referring again to <FIG>, a second main amplifier <NUM> may be located on a side of the conductive strip line opposite the illustrated first main amplifier <NUM>. The output impedance-matching element <NUM> may be rotated <NUM> degrees and mounted near the end of the conductive strip line <NUM> by the peaking amplifier <NUM>. A second peaking amplifier <NUM> may be located on a side of the conductive strip line opposite the illustrated first peaking amplifier <NUM>. Drain bond pads from the additional main and peaking amplifiers may be wire bonded to the conductive strip line. Additional bond wires may be connected at angles from the output impedance-matching element <NUM> to drain bond pads of the peaking amplifiers <NUM>.

Several circuit simulations were carried out for a Doherty amplifier <NUM> as arranged in <FIG>, of which some results are shown in <FIG>. In a first simulation, the impedance inverter <NUM> was modeled using a lumped-equivalent model: a single lumped inductor and shunt capacitors arranged in a pi network connected between the main amplifier <NUM> and the peaking amplifier <NUM>. The capacitors were connected as shunts on either side of the inductor. The value of the inductor was <NUM> nH. The values of the two capacitors were <NUM> pF, which represented a sum of the drain-to-source capacitances (~ <NUM> pF) and drain bond pad capacitance (~ <NUM> pF). The circuit arrangement was similar to that shown in <FIG>, except the impedance inverter <NUM> is replaced with the lumped pi network and the peaking current source Ip is replaced with a resistance of 20Ro. The value of Ro was <NUM> ohms. This first simulation was carried out to analyze the feasibility of the Doherty amplifier <NUM> in which combining is carried out first before impedance matching.

In some embodiments, the values of a Doherty amplifier's operating frequency ωo and inductance Ls of the strip line <NUM> are constrained in part by amplifier design. For example, an amplifier design may have a drain-to-source capacitance Cds, and be rated at a maximum drain-to-source current Imax for an operating voltage Vds. The resistance Ro at which maximum power may be transferred from the amplifier may be determined approximately from the following relation. <MAT> where Vk is the knee voltage for the amplifier. Once Ro is estimated, then it is desirable to have the admittance of the shunt capacitance Csh (primarily determined by Cds, though it may include drain pad capacitance and any added capacitance) and the impedance of the impedance inverter's inductance Lc (determined from the wire bonds <NUM> and strip line <NUM>) match the corresponding admittance and impedance values of Ro, which yields: <MAT> <MAT> Since Cds is primarily determined by the amplifiers' design and may be the dominant capacitance, EQ. <NUM> roughly constrains the operating frequency of the amplifier, though it may be tuned downward by adding additional shunt capacitance. According to some embodiments, when the operating frequency is selected, the conductive strip line may be designed to provide inductance according to EQ.

A frequency-response curve <NUM> (dotted curve) from the first simulation with a lumped-element impedance inverter is plotted in <FIG>. The plot represents the scattering parameter S(<NUM>,<NUM>) looking into the impedance inverter (e.g., looking into the pi network at the first capacitive shunt). The response shows a bandwidth of about <NUM> centered at an operating frequency of approximately <NUM>. This bandwidth is greater than <NUM> % and represents a significant improvement over a comparable bandwidth performance of a conventional Doherty amplifier at RF frequencies, which is typically less than about <NUM> %.

In a second simulation, the lumped inductor was replaced with a distributed inductor that more accurately modeled the integrated conductive strip line <NUM> depicted in <FIG>. For this simulation, modeling of electromagnetic waves at different frequencies carried by the conductive strip line <NUM> was carried out using an electromagnetic (EM) field simulation tool. In the EM simulation, the conductive strip line was modeled as having six input ports corresponding to the bond wires <NUM>. The input ports were <NUM> wide, with three spaced at each end on a <NUM> pitch. The length of the conductive strip line was <NUM> and the width was <NUM>. The conductive strip line was modeled as being formed from copper (<NUM> thick) on a high-frequency laminate having a dielectric constant of <NUM> and a loss tangent of <NUM>. The thickness of the laminate separating the conductive strip line from a ground plane was <NUM>. For the EM simulation, a mesh was used having <NUM> cells per wavelength at <NUM>. The results from the EM simulation for the strip line <NUM> were used in a circuit simulation of the impedance inverter in which the same values of lumped capacitances (<NUM> pF) were used and arranged in the pi network. The circuit arrangement was otherwise the same as that used to generate the frequency-response curve <NUM>. Results from this second simulation are plotted as the frequency-response curve <NUM> (dashed curve), which indicates that using a distributed inductive element in the impedance inverter adds minimal reduction in the RF fractional bandwidth compared to a purely lumped element impedance inverter. Accordingly, the inductive strip line <NUM> enables power scalability while essentially maintaining operating frequency and RF fractional bandwidth performance.

Additional EM simulations were carried out to more accurately represent the output bonding pads <NUM> of the main amplifier <NUM> and peaking amplifier <NUM> as well as a circuit simulation to represent the bond wires <NUM> connected to the bonding pads <NUM>. For the EM simulations, the bonding pads <NUM> measured approximately <NUM> by approximately <NUM> microns. The bond wires were represented as having a <NUM> micron diameter, a conductivity of <NUM>×<NUM><NUM> Siemens, extending over a gap of about <NUM> microns and rising to a maximal height of about <NUM> microns above the amplifier die. Using the results from the EM simulations in the circuit model for the Doherty amplifier <NUM> did not appreciably alter the frequency response curve <NUM>.

In an actual device, impedance at the output of the impedance inverter <NUM> may need to be matched to impedance of a load (e.g., <NUM> ohms). To further evaluate the performance of the Doherty amplifier <NUM>, an output impedance-matching element <NUM> was added to the circuit and simulations carried out to account for the added element. For these simulations, an output impedance-matching element <NUM> depicted in <FIG> was used, but the depicted element is only one example of an output-impedance matching element and the invention is not limited to only this configuration. Other embodiments may be used for the output-impedance-matching element in other implementations.

According to some embodiments, output bond wires <NUM> are bonded to an output strip line <NUM> of the output impedance-matching element <NUM>. Shunt capacitors <NUM>, <NUM> connect between the output strip line <NUM> and pads <NUM>, which are connected to an underlying ground conductor using a via and shunt conductor <NUM>. An output capacitor <NUM> connects between the output strip line <NUM> and an output bonding pad <NUM>. For the simulation, the output bonding pad <NUM> may be shunted to ground with a <NUM> ohm resistive via to emulate a load. The length and width of the output strip line <NUM>, the values of the shunt capacitors <NUM>, <NUM>, and the value of the output capacitor <NUM> may be selected to match an impedance from the combining node to an impedance at the load plane <NUM>.

Results of a simulation of amplifier performance that includes an output impedance-matching element <NUM> as arranged in <FIG> is plotted in <FIG> as the frequency-response curve <NUM>. For this simulation, an impedance at the combining node (approximately <NUM> ohms) was matched to a load impedance of approximately <NUM> ohms. In an EM simulation, the strip line <NUM> measured approximately <NUM> in length with a width of approximately <NUM> microns, and otherwise used the same electromagnetic properties that were used for the conductive strip line <NUM>. The shunt capacitors <NUM>, <NUM> were modeled as surface-mount devices (SMDs) having a capacitance of <NUM> pF each. The shunt capacitors and conductive vias <NUM> had a combined resistance of <NUM> ohm and inductance of <NUM> nH each. The output capacitor <NUM> was also modeled as an SMD having a capacitance of <NUM> pF, which had a combined resistance of <NUM> ohm and inductance of <NUM> nH.

The result of the simulation that includes the effect of the output impedance-matching element <NUM>, and also includes EM simulations of the output bonding pads <NUM>, is plotted in the frequency-response curve <NUM> of <FIG>. For the illustrated impedance-matching element, the RF fractional bandwidth of the amplifier reduces to approximately <NUM> or about <NUM>% at an operating frequency of about <NUM>. Even with this reduction, the RF fractional bandwidth for the modified Doherty amplifier is nearly twice the bandwidth of a conventional Doherty amplifier. The results of this simulation indicate that if the output impedance-matching is not done well, or has a narrow RF fractional bandwidth, then the overall bandwidth of the device may be limited by the output impedance-matching element <NUM>.

To recover a broader bandwidth, a double-section output impedance-matching element <NUM> is used, as depicted in <FIG>. A double-section impedance-matching element comprises an added inductive strip line <NUM> that connects to the output bonding pad <NUM> and to capacitive shunt <NUM>. The dimensions of the strip line <NUM> may be resized to provide a desired inductance for the first section.

Some embodiments may include transistor biasing components comprising an inductive strip line <NUM> that connects to a DC biasing port <NUM>, at which voltage for biasing drains of transistors in the amplifiers <NUM>, <NUM> may be applied. A shunt capacitor <NUM> may be connected to the biasing port <NUM>. When installed in a device, an additional capacitor may be mounted external to the board on which the impedance-matching element <NUM> is formed and arranged in parallel to the shunt capacitor <NUM>. The external capacitor may have a value between <NUM> microFarads and <NUM> microFarads.

Further simulations were carried out for the double-section impedance-matching element in which the values of capacitances were as follows: C1 = C2 = <NUM> pF, C3 = <NUM> pF, and C4 = <NUM> pF. The double-section impedance-matching element <NUM> provides improved impedance matching over a range of RF frequencies near the center or carrier frequency at <NUM>, as compared to the single section depicted in <FIG>. Therefore, it removes a bandwidth bottleneck associated with the single section impedance-matching element <NUM> and recovers the RF fractional bandwidth available for the impedance inverter. The simulations show that the resulting RF fractional bandwidth recovers to approximately <NUM>%.

In some implementations, additional impedance-matching sections may be included between the impedance inverter and load. The double-section output impedance-matching element transforms the impedance at the output of the impedance inverter <NUM> to match or approximately match the impedance at the load plane <NUM> over a bandwidth of interest (e.g., <NUM>, <NUM>, <NUM>, <NUM>, or any desired RF fractional bandwidth in this range) at the carrier frequency (<NUM> in the above example, though other carrier frequencies may be used).

Methods for operating a Doherty amplifier using the above-described apparatus are also contemplated. In some implementations, a method for operating a Doherty amplifier <NUM> may comprise acts of splitting a received signal into a first signal and a second signal having a first phase with respect to the first signal, amplifying the first signal with a main amplifier <NUM>, and amplifying the second signal with a peaking amplifier <NUM>. A method embodiment may further comprise providing an output from the main amplifier directly to an input of an impedance inverter <NUM>, wherein the impedance inverter comprises an integrated distributed inductor, and introducing a second phase with the impedance inverter that compensates for the first phase. In some implementations, a method for operating a Doherty amplifier may further comprise combining an output from the impedance inverter <NUM> with an output from the peaking amplifier <NUM> to produce a combined output, and providing the combined output to an impedance-matching element <NUM> that matches the output impedance to the impedance of a load. The load impedance may have a value of <NUM> ohms or approximately <NUM> ohms. In some implementations, the load impedance may have a value between approximately <NUM> ohms and approximately <NUM> ohms. Operation of a Doherty amplifier <NUM> may further comprise providing the combined output for transmission by a cellular base station.

The terms "approximately" and "about" may be used to mean within ±<NUM>% of a target dimension in some embodiments, within ±<NUM>% of a target dimension in some embodiments, within ±<NUM>% of a target dimension in some embodiments, and yet within ±<NUM>% of a target dimension in some embodiments. The terms "approximately" and "about" may include the target dimension.

The technology described herein may be embodied as a method, of which at least some acts have been described. The acts performed as part of the method may be ordered in any suitable way. Accordingly, embodiments may be constructed in which acts are performed in an order different than described, which may include performing some acts simultaneously, even though described as sequential acts in illustrative embodiments. Additionally, a method may include more acts than those described, in some embodiments, and fewer acts than those described in other embodiments.

Claim 1:
A Doherty amplifier comprising:
an RF input;
a main amplifier (<NUM>) connected to the RF input;
a peaking amplifier (<NUM>) connected to the RF input;
a combining node (<NUM>) at which an output from the main amplifier combines with an output from the peaking amplifier, the combining node being located at a drain bonding pad (<NUM>) of the peaking amplifier;
an impedance inverter (<NUM>) comprising an integrated distributed inductor connected between an output of the main amplifier and the combining node; and
a double-section output impedance-matching element (<NUM>) configured to match an impedance from the combining node (<NUM>) to an impedance of a load plane (<NUM>) at an output bonding pad (<NUM>) over a bandwidth of interest, the output impedance-matching element (<NUM>) comprising an output strip line (<NUM>), first and second shunt capacitors (<NUM>, <NUM>) connected between the output strip line (<NUM>) and ground, an output capacitor (<NUM>) connected between the output strip line and the output bonding pad (<NUM>), an inductive strip line (<NUM>) connected between the output bonding pad (<NUM>) and ground, and output bond wires (<NUM>) configured to bond the output strip line (<NUM>) with the combining node (<NUM>).