Patent Description:
Aspects of the present disclosure relate generally to wireless communication systems, and more particularly, to interleaving/rate-matching and deinterleaving/de-rate-matching for <NUM> NR. Some embodiments of the technology discussed below enable and provide techniques to save memory, reduced design foot-print size, and on-the-fly operating conditions for reduced buffer space.

On the uplink, a transmission from the UE may encounter interference from uplink transmissions of other UEs communicating with the neighbor base stations or from other wireless RF of other UEs communicating with the neighbor base stations or from other wireless RF transmitters.

Research and development continue to advance wireless communication technologies not only to meet the growing demand for mobile broadband access, but to advance and enhance the user experience with mobile communications.

In <CIT>, interleaving and rate matching is performed with a unique address queue. Usually, all the data to interleave and to rate match are saved in an input buffer and copied in a different order and with punctured or repeated symbols in another output buffer. Reordering and rate matching operations are performed to the addresses in the input buffer of the symbols and data are directly read out from the input buffer according to the reordered and punctured/repeated addresses.

<CIT> discloses using parallel address queues to minimize the amount of memory needed to generate matrix interleaving with column permutation. To each column corresponds one address queue process and the permutation are only applied in the address queues, not in the interleaver matrix.

3GPP document <NPL>, discloses placing interleaving after repetition, i.e. after rate matching. It is stated that doing the interleaving operation on-the-fly after rate matching and before storing the data in memory can be done with relatively low complexity.

In the <NUM> specification, interleaving takes place after rate matching on the transmit side, where in LTE rate matching occurs after interleaving. There exist two schemes in interleaving: puncture and repetition. A result of implementing interleaving after rate matching, in the case of the repetition interleaving scheme, is that buffering, in a conventional way, is required for the incoming log likelihood ratios (LLRs) that are interleaved and repeated before performing de-interleaving and followed by de-repetition. With normally large number of repetition, this buffering necessitates a very large buffer resulting in a sizable area penalty for the circuitry implementation.

Independent claim <NUM> defines a method of interleaving rate matched data for transmission according to the invention. Independent claim <NUM> defines a corresponding method of deinterleaving rate matched received data according to the invention. Corresponding encoder and decoder according to the invention are defined in claims <NUM> and <NUM> respectively, and corresponding computer readable programmable medium are defined in claims <NUM> and <NUM> respectively.

The detailed description set forth below, in connection with the appended drawings, is intended as a description of various possible configurations and is not intended to limit the scope of the disclosure.

This disclosure relates generally to providing or participating in communication as between two or more wireless devices in one or more wireless communications systems, also referred to as wireless communications networks. In various embodiments, the techniques and apparatus may be used for wireless communication networks such as code division multiple access (CDMA) networks, time division multiple access (TDMA) networks, frequency division multiple access (FDMA) networks, orthogonal FDMA (OFDMA) networks, single-carrier FDMA (SC-FDMA) networks, long term evolution (LTE) networks, Global System for Mobile Communications (GSM) networks, as well as other communications networks. As described herein, the terms "networks" and "systems" may be used interchangeably according to the particular context.

A TDMA network may, for example implement a radio technology such as GSM. 3GPP defines standards for the GSM EDGE (enhanced data rates for GSM evolution) radio access network (RAN), also denoted as GERAN. GERAN is the radio component of GSM/EDGE, together with the network that joins the base stations (for example, the Ater and Abis interfaces) and the base station controllers (A interfaces, etc.). The radio access network represents a component of a GSM network, through which phone calls and packet data are routed from and to the public switched telephone network (PSTN) and Internet to and from subscriber handsets, also known as user terminals or user equipments (UEs). A mobile phone operator's network may comprise one or more GERANs, which may be coupled with Universal Terrestrial Radio Access Networks (UTRANs) in the case of a UMTS/GSM network. An operator network may also include one or more LTE networks, and/or one or more other networks. The various different network types may use different radio access technologies (RATs) and radio access networks (RANs).

An OFDMA network may, for example, implement a radio technology such as evolved UTRA (E-UTRA), IEEE <NUM>, IEEE <NUM>, IEEE <NUM>, flash-OFDM and the like. UTRA, E-UTRA, and GSM are part of universal mobile telecommunication system (UMTS). In particular, LTE is a release of UMTS that uses E-UTRA. 3GPP long term evolution (LTE) is a 3GPP project aimed at improving the universal mobile telecommunications system (UMTS) mobile phone standard.

For clarity, certain aspects of the apparatus and techniques may be described below with reference to exemplary LTE implementations or in an LTE-centric way, and LTE terminology may be used as illustrative examples in portions of the description below; however, the description is not intended to be limited to LTE applications. Indeed, the present disclosure is concerned with shared access to wireless spectrum between networks using different radio access technologies or radio air interfaces.

Moreover, in operation, wireless communication networks adapted according to the concepts herein may operate with any combination of licensed or unlicensed spectrum depending on loading and availability. Accordingly, it will be apparent to one of skill in the art that the systems, apparatus and methods described herein may be applied to other communications systems and applications than the particular examples provided.

While aspects and embodiments are described in this application by illustration to some examples, those skilled in the art will understand that additional implementations and use cases may come about in many different arrangements and scenarios. Innovations described herein may be implemented across many differing platform types, devices, systems, shapes, sizes, packaging arrangements. For example, embodiments and/or uses may come about via integrated chip embodiments and/or other non-module-component based devices (e.g., end-user devices, vehicles, communication devices, computing devices, industrial equipment, retail/purchasing devices, medical devices, AI-enabled devices, etc.). While some examples may or may not be specifically directed to use cases or applications, a wide assortment of applicability of described innovations may occur. Implementations may range from chip-level or modular components to non-modular, non-chip-level implementations and further to aggregated, distributed, or OEM devices or systems incorporating one or more described aspects. In some practical settings, devices incorporating described aspects and features may also necessarily include additional components and features for implementation and practice of claimed and described embodiments. It is intended that innovations described herein may be practiced in a wide variety of implementations, including both large/small devices, chip-level components, multi-component systems (e.g. RF-chain, communication interface, processor), distributed arrangements, end-user devices, etc. of varying sizes, shapes, and constitution.

<FIG> shows wireless network <NUM> for communication according to some embodiments. While discussion of the technology of this disclosure is provided relative to an LTE-A network (shown in <FIG>), this is for illustrative purposes. Principles of the technology disclosed can be used in other network deployments, including fifth generation (<NUM>) networks. As appreciated by those skilled in the art, components appearing in <FIG> are likely to have related counterparts in other network arrangements including, for example, cellular-style network arrangements and non-cellular-style-network arrangements (e.g., device to device or peer to peer or ad hoc network arrangements, etc.).

The wireless network <NUM> can include a number of base stations, such as may comprise evolved node Bs (eNBs) or G node Bs (gNBs). These may be referred to as gNBs <NUM>. A gNB may be a station that communicates with the UEs and may also be referred to as a base station, a node B, an access point, and the like. Each gNB <NUM> may provide communication coverage for a particular geographic area. In 3GPP, the term "cell" can refer to this particular geographic coverage area of a gNB and/or a gNB subsystem serving the coverage area, depending on the context in which the term is used. In implementations of wireless network <NUM> herein, gNBs <NUM> may be associated with a same operator or different operators (e.g., wireless network <NUM> may comprise a plurality of operator wireless networks), and may provide wireless communications using one or more of the same frequencies (e.g., one or more frequency band in licensed spectrum, unlicensed spectrum, or a combination thereof) as a neighboring cell.

A gNB may provide communication coverage for a macro cell or a small cell, such as a pico cell or a femto cell, and/or other types of cell. A gNB for a macro cell may be referred to as a macro gNB. A gNB for a small cell may be referred to as a small cell gNB, a pico gNB, a femto gNB or a home gNB. In the example shown in <FIG>, gNBs 105a, 105b and 105c are macro gNBs for the macro cells 110a, 110b and 110c, respectively. gNBs 105x, 105y, and 105z are small cell gNBs, which may include pico or femto gNBs that provide service to small cells 110x, 110y, and 110z, respectively. A gNB may support one or multiple (e.g., two, three, four, and the like) cells.

Wireless network <NUM> may support synchronous or asynchronous operation. For synchronous operation, the gNBs may have similar frame timing, and transmissions from different gNBs may be approximately aligned in time. For asynchronous operation, the gNBs may have different frame timing, and transmissions from different gNBs may not be aligned in time. In some scenarios, networks may be enabled or configured to handle dynamic switching between synchronous or asynchronous operations.

UEs <NUM> are dispersed throughout wireless network <NUM>, and each UE may be stationary or mobile. It should be appreciated that, although a mobile apparatus is commonly referred to as user equipment (UE) in standards and specifications promulgated by the 3rd Generation Partnership Project (3GPP), such apparatus may also be referred to by those skilled in the art as a mobile station (MS), a subscriber station, a mobile unit, a subscriber unit, a wireless unit, a remote unit, a mobile device, a wireless device, a wireless communications device, a remote device, a mobile subscriber station, an access terminal (AT), a mobile terminal, a wireless terminal, a remote terminal, a handset, a terminal, a user agent, a mobile client, a client, or some other suitable terminology. Within the present document, a "mobile" apparatus or UE need not necessarily have a capability to move, and may be stationary. Some non-limiting examples of a mobile apparatus, such as may comprise embodiments of one or more of UEs <NUM>, include a mobile, a cellular (cell) phone, a smart phone, a session initiation protocol (SIP) phone, a laptop, a personal computer (PC), a notebook, a netbook, a smart book, a tablet, and a personal digital assistant (PDA). A mobile apparatus may additionally be an "Internet of things" (IoT) device such as an automotive or other transportation vehicle, a satellite radio, a global positioning system (GPS) device, a logistics controller, a drone, a multi-copter, a quadcopter, a smart energy or security device, a solar panel or solar array, municipal lighting, water, or other infrastructure; industrial automation and enterprise devices; consumer and wearable devices, such as eyewear, a wearable camera, a smart watch, a health or fitness tracker, a mammal implantable device, gesture tracking device, medical device, a digital audio player (e.g., MP3 player), a camera, a game console, etc.; and digital home or smart home devices such as a home audio, video, and multimedia device, an appliance, a sensor, a vending machine, intelligent lighting, a home security system, a smart meter, etc. A mobile apparatus, such as UEs <NUM>, may be able to communicate with macro gNBs, pico gNBs, femto gNBs, relays, and the like. In <FIG>, a lightning bolt (e.g., communication links <NUM>) indicates wireless transmissions between a UE and a serving gNB, which is a gNB designated to serve the UE on the downlink and/or uplink, or desired transmission between gNBs. Although backhaul communication <NUM> is illustrated as wired backhaul communications that may occur between gNBs, it should be appreciated that backhaul communications may additionally or alternatively be provided by wireless communications.

<FIG> shows a block diagram of a design of base station/gNB <NUM> and UE <NUM>. These can be one of the base stations/gNBs and one of the UEs in <FIG>. For a restricted association scenario (as mentioned above), the gNB <NUM> may be small cell gNB 105z in <FIG>, and UE <NUM> may be UE 115z, which in order to access small cell gNB 105z, would be included in a list of accessible UEs for small cell gNB 105z. gNB <NUM> may also be a base station of some other type. gNB <NUM> may be equipped with antennas 234a through 234t, and UE <NUM> may be equipped with antennas 252a through 252r.

At gNB <NUM>, transmit processor <NUM> may receive data from data source <NUM> and control information from controller/processor <NUM>. The control information may be for the physical broadcast channel (PBCH), physical control format indicator channel (PCFICH), physical hybrid-ARQ indicator channel) PHICH, physical downlink control channel (PDCCH), etc. The data may be for the physical downlink shared channel (PDSCH), etc. Transmit processor <NUM> may process (e.g., encode and symbol map) the data and control information to obtain data symbols and control symbols, respectively. Transmit processor <NUM> may also generate reference symbols, e.g., for the primary synchronization signal (PSS), secondary synchronization signal (SSS), and cell-specific reference signal (CRS). Transmit (TX) multiple-input multiple-output (MIMO) processor <NUM> may perform spatial processing (e.g., precoding) on the data symbols, the control symbols, and/or reference symbols, if applicable, and may provide output symbol streams to modulators (MODs) 232a through 232t. Each modulator <NUM> may additionally or alternatively process (e.g., convert to analog, amplify, filter, and upconvert) the output sample stream to obtain a downlink signal. Downlink signals from modulators 232a through 232t may be transmitted via antennas 234a through 234t, respectively.

At UE <NUM>, antennas 252a through 252r may receive the downlink signals from gNB <NUM> and may provide received signals to demodulators (DEMODs) 254a through 254r, respectively. MIMO detector <NUM> may obtain received symbols from all demodulators 254a through 254r, perform MIMO detection on the received symbols if applicable, and provide detected symbols. Receive processor <NUM> may process (e.g., demodulate, deinterleave, and decode) the detected symbols, provide decoded data for UE <NUM> to data sink <NUM>, and provide decoded control information to controller/processor <NUM>.

On the uplink, at UE <NUM>, transmit processor <NUM> may receive and process data (e.g., for the PUSCH) from data source <NUM> and control information (e.g., for the PUCCH) from controller/processor <NUM>. Transmit processor <NUM> may also generate reference symbols for a reference signal. The symbols from transmit processor <NUM> may be precoded by TX MIMO processor <NUM> if applicable, further processed by modulators 254a through 254r (e.g., for SC-FDM, etc.), and transmitted to gNB <NUM>. At gNB <NUM>, the uplink signals from UE <NUM> may be received by antennas <NUM>, processed by demodulators <NUM>, detected by MIMO detector <NUM> if applicable, and further processed by receive processor <NUM> to obtain decoded data and control information sent by UE <NUM>. Processor <NUM> may provide the decoded data to data sink <NUM> and the decoded control information to controller/processor <NUM>.

Controllers/processors <NUM> and <NUM> may direct the operation at gNB <NUM> and UE <NUM>, respectively. Controller/processor <NUM> and/or other processors and modules at gNB <NUM> and/or controllers/processor <NUM> and/or other processors and modules at UE <NUM> may perform or direct the execution of various processes for the techniques described herein, such as to perform or direct the execution illustrated in <FIG>, <FIG>, <FIG>, <FIG>, <FIG>, <FIG>, and/or other processes for the techniques described herein. Memories <NUM> and <NUM> may store data and program codes for gNB <NUM> and UE <NUM>, respectively. Scheduler <NUM> may schedule UEs for data transmission on the downlink and/or uplink.

As noted above, in the <NUM> specification, interleaving is approached differently than LTE. As currently envisioned, in the <NUM> NR standard, interleaving takes place after rate matching on the transmit side. In contrast, rate matching occurs after interleaving in LTE on the transmit side. Implementing interleaving after rate matching, as in <NUM>, and employing a repetition rate matching scheme leads to a requirement to buffer the incoming LLRs. Given a normally large number of repetitions, this buffering necessitates a very large buffer resulting in a sizable area penalty for circuitry implementation. For example, the number of LLRs may exceed <NUM> million. At six bits per LLR, a buffer memory in excess of nine million bits is required. Thus, an efficient method and apparatus to perform deinterleaving and de-repetition on the fly to avoid paying this memory area penalty is desirable. As set forth below, this disclosure provides a technique that can reduce the required memory area for buffering LLRs by more than <NUM>%. For example, the memory area can be as small as a single codeblock, which is <NUM>*<NUM> LLRs. In this case, no multiple memory bank is needed, as a regular codeblock buffer may be used to satisfy the memory requirement.

Technology discussed in the present disclosure can address this challenge by introducing new interleaving/rate-matching and deinterleaving/de-rate-matching techniques. According to the claimed invention, on the transmit side (at a transmitter), multiple interleaver and rate matching engines operate in parallel to access a code block buffer at different starting points. On the receive side (at a receiver), multiple de-interleaver and de-rate matching engines act in parallel to process LLRs per each demodulated symbol at different offsets as result from being interleaved and rat-matched at the transmit side. This arrangement advantageously reduces the amount of interleaver memory that is required to buffer the LLRS, as described above. For example, use of ten de-interleaver and de-rate matching engines can reduce the amount of required interleaver memory to be as small as a single code block, which is <NUM>*<NUM> LLRs. Accordingly, the required memory size is reduced to a fraction of that required without the multiple engine encoding/decoding techniques presented herein.

It is envisioned that interleavers having multiple engines can be configured in a variety of manners. According to the claimed invention, an interleaver is a rectangular interleaver with N number of rows, where N = Log2(constellation_size). If each row is considered as an independent rate matching engine, for up to QAM <NUM> constellation, ten independent rate matching engines can run in parallel with different starting offset. For on the fly rate matching and interleaving (i.e., transmit side), the ten engines may read the same code block buffer independently at different points. For on-the-fly de-rate matching and de-interleaving (i.e., receive side), ten engines may write de-rate matched results in the same HARQ buffer, at the same time, while combining previous data in the HARQ buffer on the fly. One resulting advantage is a savings of <NUM>% or more of the interleaver/deinterleaver memory size. Another resulting advantage is that no multiple bank memory is needed, as any regular code block buffer can be used as a de-interleaver memory. Examples involving three or more engines, six engines, eight engines, and ten engines are presented herein.

Yet, it should be understood that use of ten engines (i.e., on-the-fly encoding or decoding modules) is presently preferred due to support of QAM <NUM> being required in the <NUM> standard, but that any number of two or more engines may be utilized. As a general rule, the number of engines may be greater than or equal to Log2(constellation_size). Constellation size can be as small as four, in which case the number of engines used can be two.

Turning to <FIG>, an example de-interleaver memory 300A for use with eight engines may be configured as a rectangular memory with QAM256 constellation having <NUM> coded bits with <NUM> columns. The LLRs per each demodulated symbol on which de-interleaving and de-rate-matching would be performed, contain those shown in various columns of the illustrated table in memory 300A (e.g., [<NUM><NUM><NUM><NUM><NUM><NUM><NUM><NUM>], [<NUM><NUM><NUM><NUM><NUM><NUM><NUM><NUM>],. The eight engines may each be configured to run on a single line with a same coded bit size <NUM> in parallel, but with different starting offsets. According to the claimed invention, an offset is determined according to:<MAT>
where line_index = <NUM>, <NUM>, <NUM>,. It is also envisioned that inter-engine combining may occur only when the number of coded bits is greater than or equal to the number of columns (i. e, row length) of the de-interleaver memory 300A. However, turning briefly to <FIG>, another example de-interleaver memory <NUM> configured for use with six engines demonstrates that intra transmission time interval (TTI) combining and line engine combining can be performed when the number of coded bits is less than the number of columns (i.e. row length) of the de-interleaver memory <NUM>.

Although the foregoing examples show starting from <NUM> with respect to a starting LLR, it should be understood that embodiments may start from any number. For example, in operation according to embodiments of the present disclosure a retransmitted LLR can start at any location, such as being offset by an e_offset amount. The starting point of each line engine in such a non-claimed embodiment may thus follow the following equation:<MAT>
where line_index = <NUM>, <NUM>, <NUM>,. <FIG> shows an example de-interleaver memory 300B for use with eight engines in an example where e_offset = <NUM>, column_num = <NUM>, and coded_bits = <NUM>.

Turning now to <FIG>, it is envisioned that eight de-interleaving and de-rate matching engines may be used. These engines can be combined around a circular de-interleaver memory starting from offset zero and output the final de-interleaving and de-rate matching result <NUM>. To reduce memory usage, all of the engines may be configured to run on a same circular HARQ buffer that is <NUM> LLRs in width. Each engine may be configured to only access the HARQ buffer once per <NUM> cycles. This HARQ buffer has enough memory bandwidth to support ten engines performing read/write operations and combining on the fly by performing a read/combine/write operation on each memory line.

Turning now to <FIG>, a deinterleaver/de-rate-matcher <NUM> has up to ten de-interleaving and de-rate matching engines, illustrated by engines 602A, 602B, and 602C, that each have their own sets of adders for performing combining of de-rate matching results with data stored in HARQ buffer <NUM>. In operation, a reader <NUM> reads thirty-two LLRs at a time from LLR buffer <NUM> and distributes two LLRs each cycle to each of the engines 602A-602C. In turn, read components RDR and write components WRT of each of the engines 602A-602C access HARQ buffer <NUM> via arbitration block <NUM>, and each engine performs read, combine, and write operations in the HARQ buffer <NUM> at different starting points.

Turning now to <FIG>, another implementation of a deinterleaver/de-rate-matcher has up to ten de-interleaving and de-rate matching engines, illustrated by engines 702A, 702B, and 702C, that all share adders for performing combining of de-rate matching results with data stored in HARQ buffer. Reader <NUM> provides two LLRs in each cycle to each of engines 702A-702C, and the engines 702A-702C store the LLRs in MIMO_FIFO registers that are each two LLRs wide and thirty-two LLRs long. Deinterleaving components of engines 702A-702C operate on the received LLRs over numerous cycles to perform de-interleaving operations and arrive at de-interleaving results that are thirty-two LLRs in length.

Turning now to <FIG>, these engines take turns accessing the HARQ buffer <NUM> at different starting points and using the adders 712A and 712B to combine the deinterleaving results <NUM> with the data <NUM> already in the buffer <NUM>. Accordingly, each engine writes de-interleaving and de-rate matching results <NUM> to the correct addresses in the HARQ buffer <NUM>.

Turning now to <FIG>, the circular registers <NUM> employed by the engines may be operated as a MIMO_FIFO memory <NUM> having various inputs and outputs. For example, output signals of the MIMO_FIFO memory <NUM> may report an amount of available space n_space and a number of stored words n_words of memory <NUM>. Additionally, input signals may include a number of words to be written wr_num, an input for data din, and a pulse wr_req to trigger writing the data din to the circular register <NUM>. Also, input and output signals may include a number of words to be read out rd_num, an ouput for data dout, and a pulse rd_req to trigger reading the data dout from the circular register <NUM>. Each of the engines may be provided with its own circular register.

Turning now to <FIG>, an interleaver/rate-matcher <NUM> has up to ten interleaving and rate matching engines, illustrated by engines 802A, 802B, and 802C, that each read multiple copies of data <NUM> from different starting points in code block buffer <NUM>. The input thirty-two LLRS are stored in the respective MIMO-FIFO buffers of the multiple engines 802A-802C, and the engines each provide two LLRs per cycle to a transmit buffer via writer block <NUM>.

Turning now to <FIG>, a method of performing data interleaving and rate matching for transmission includes reading, at block <NUM>, input data of a code block buffer. The input data read at block <NUM> is read by a first interleaving and rate matching engine, starting at a first starting point of the code block buffer. As a result, the first interleaving and rate matching engine generates first interleaved and rate matched data at block <NUM>. Processing may proceed from block <NUM> to block <NUM>.

At block <NUM>, input data of a code block buffer is read again. The input data read at block <NUM> is read by a second interleaving and rate matching engine, starting at a second starting point of the code block buffer. As a result, the second interleaving and rate matching engine generates second interleaved and rate matched data at block <NUM>. Processing may proceed from block <NUM> to block <NUM>.

At block <NUM>, encoded data is provided that includes the first interleaved and rate matched data and the second interleaved and rate matched data. For example, block <NUM> may include writing the encoded output data to a transmit buffer. Processing may return from block <NUM> to block <NUM>.

Blocks <NUM> and <NUM> may include employing a rectangular interleaver and/or employing, as an interleaver memory, a code block buffer having Log2(constellation_size) number of rows. It should additionally be understood that blocks <NUM> and <NUM> may include causing the first interleaving and rate matching engine and the second interleaving and rate matching engine to each run on a different column or row of interleaver memory. It should further be understood that blocks <NUM> and <NUM> may include the first interleaving and rate matching engine and the second interleaving and rate matching engine to each run in parallel with a same coded bit size and different starting offsets. It should further be understood that additional blocks may be included that involve utilizing a number N of interleaving and rate matching engines equal to Log2(constellation_size).

Referring now to <FIG>, a method of processing received data includes reading, at block <NUM>, input data of a log likelihood ratio (LLR) buffer. The reading at block <NUM> is performed by a first de-interleaving and de-rate matching engine, starting at a first starting point of the LLR buffer. As a result, first de-interleaved and de-rate matched data is generated at block <NUM>. Processing may proceed from block <NUM> to block <NUM>.

At block <NUM>, input data of the LLR buffer is read by a second de-interleaving and de-rate matching engine acting in parallel with the first de-interleaving and de-rate matching engine. The reading is performed starting at a second starting point of the LLR buffer. As a result, second de-interleaved and de-rate matched data is generated at block <NUM>. Processing may proceed form block <NUM> to block <NUM>.

At block <NUM>, the deinterleaved and de-rate-matched data is provided. The provided data includes the first de-interleaved and de-rate matched data and the second deinterleaved and de-rate matched data. For example, block <NUM> may include causing the first de-interleaving and de-rate matching engine and the second de-interleaving and de-rate matching engine to write de-rate matching results in a Hybrid Automatic Repeat Request (HARQ) buffer in parallel, thereby combining previous data in the HARQ buffer.

Embodiments may also include alternative arrangements and features. For example, blocks <NUM> and <NUM> may include employing a rectangular interleaver and/or employing, as an interleaver memory, a code block buffer having Log2(constellation_size) number of rows. Also, blocks <NUM> and <NUM> may include causing the first interleaving and rate matching engine and the second interleaving and rate matching engine to each run on a different column or row of interleaver memory. As another example, blocks <NUM> and <NUM> may include causing the first interleaving and rate matching engine and the second interleaving and rate matching engine to each run in parallel with a same coded bit size and different starting offsets. As yet another example, additional blocks may be included that involve utilizing a number N of de-interleaving and de-rate matching engines equal to Log2(constellation_size).

The functional blocks and modules described herein (e.g., the functional blocks and modules in <FIG> and <FIG>) may comprise processors, electronics devices, hardware devices, electronics components, logical circuits, memories, software codes, firmware codes, etc., or any combination thereof.

Disk and disc, as used herein, includes compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), hard disk, solid state disk, and blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers.

Claim 1:
A method of interleaving rate matched data for transmission, the method comprising:
performing interleaving with a rectangular interleaver having a number N equal to Log2(constellation_size) of rows and a number of columns, wherein each row is an independent interleaving and rate matching engine; and
for each of the N interleaving and rate matching engines:
reading (<NUM>), for a block of encoded data on which interleaving and rate-matching is to be performed, the block of encoded data from a code block buffer, starting at a respective different starting point of the code block buffer (<NUM>) corresponding to the each interleaving and rate matching engine, to generate interleaved and rate matched data;
wherein each of the N interleaving and rate matching engines are configured to run in parallel with a same coded bit size and different starting offsets, each starting offset determined based at least in part on a corresponding line index, column number and a coded bit size according to (line index * column_number)% (coded bits); and
providing (<NUM>) encoded output data that includes the interleaved and rate matched data from the N interleaving and rate matching engines.