Patent Description:
This disclosure relates generally to inverters, and, more particularly, to design and packaging of wide bandgap (WBG) power electronic power stages.

Power electronics include direct current (DC) to DC converters, DC to alternating current (AC) inverters, AC to DC rectifiers, and AC to AC converters. Power electronics can be used in motor drives, mobile devices, chargers, power adapters, power distribution networks, uninterruptible power supplies, renewable energy systems, electric vehicles, hybrid electric vehicles, among others. Power electronic manufacturers are manufacturing power electronics using WBG semiconductor materials such a silicon carbide (SiC) and gallium nitride (GaN). WBG materials can be utilized as power switches including SiC metal-oxide-field-effect-transistors (MOSFETs) and GaN field-effect-transistors (FETs). WBG semiconductor materials allow for smaller, faster, and more reliable power electronic components while offering higher efficiency compared to silicon-based counterparts.

<CIT> discloses an electric motor inverter which includes at least one DC-link capacitor that has contacting layers. The electric motor inverter also includes circuit breakers which are mounted on at least one substrate, and capacitor connecting plates which are attached with first sections to the contacting layers. Second sections of the capacitor connecting plates which are arranged opposite the first sections are attached to the at least one substrate.

<CIT> discloses a power electronics unit which comprises a longitudinal cooling plate with a cooling channel for a cooling fluid, the cooling plate having two opposite side faces, between which the cooling channel is arranged; and a plurality of power semiconductor modules attached to at least one side face of the cooling plate; wherein an inlet of the cooling channel and an outlet of the cooling channel are arranged at a first longitudinal end of the cooling plate; and wherein the cooling channel reciprocates between the first longitudinal end and an opposite second longitudinal end of the cooling plate.

<CIT> discloses IGBT modules, bus bars and capacitors in an inverter main circuit secured on the front face of a heat sink and at the back side of the heat sink a water cooling channel is formed to cool the IGBT modules. The bus bars and the capacitor, thereby the size of an inverter device used in an electric car is reduced and the duration thereof is prolonged.

An embodiment of the invention relates to an apparatus for wide bandgap power electronic stages according to claim <NUM> with further embodiments defined by the dependent claims.

The figures are not to scale. Instead, the thickness of the layers or regions may be enlarged in the drawings. Although the figures show layers and regions with clean lines and boundaries, some or all of these lines and/or boundaries may be idealized. In reality, the boundaries and/or lines may be unobservable, blended, and/or irregular. In general, the same reference numbers will be used throughout the drawing(s) and accompanying written description to refer to the same or like parts. As used in this patent, stating that any part (e.g., a layer, film, area, region, or plate) is in any way on (e.g., positioned on, located on, disposed on, or formed on, etc.) another part, indicates that the referenced part is either in contact with the other part, or that the referenced part is above the other part with one or more intermediate part(s) located therebetween.

As used herein, the orientation of features is described with reference to a lateral axis, a vertical axis, and a longitudinal axis of the vehicle associated with the features. As used herein, the longitudinal axis of a WBG semiconductor material-based inverter is parallel to the centerline of the WBG semiconductor material-based inverter. The terms "rear" and "front" are used to refer to directions along the longitudinal axis closer to the rear of the WBG semiconductor material-based inverter and the front of the WBG semiconductor material-based inverter, respectively. As used herein, the vertical axis of the WBG semiconductor material-based inverter is perpendicular to the ground on which a vehicle including the WBG semiconductor material-based inverter rests. The terms "below" and "above" are used to refer to directions along the vertical axis closer to the ground and away from the ground, respectively As used herein, the lateral axis of the WBG semiconductor material-based inverter is perpendicular to the longitudinal and vertical axes and is generally parallel to the axles of a vehicle including the WBG semiconductor material-based inverter. In general, the attached figures are annotated with a set of axes including the lateral axis (Y), the longitudinal axis (X), and the vertical axis (Z). As used herein, the terms "longitudinal," and "axial" are used interchangeably to refer to directions parallel to the longitudinal axis. As used herein, the terms "lateral" and "horizontal" are used to refer to directions parallel to the lateral axis. As used herein, the term "vertical" and "normal" are used interchangeably to refer to directions parallel to the vertical axis.

As used herein, connection references (e.g., attached, coupled, connected, and joined) may include intermediate members between the elements referenced by the connection reference and/or relative movement between those elements unless otherwise indicated. As such, connection references do not necessarily infer that two elements are directly connected and/or in fixed relation to each other. As used herein, stating that any part is in "contact" with another part is defined to mean that there is no intermediate part between the two parts. In some examples used herein, "substantially" is used to describe a relationship between two parts that is within ten degrees of the stated relationship (e.g., a substantially perpendicular relationship is within ten degrees of perpendicular, a substantially parallel relationship is within ten degrees of parallel, etc.).

Unless specifically stated otherwise, descriptors such as "first," "second," "third," etc. are used herein without imputing or otherwise indicating any meaning of priority, physical order, arrangement in a list, and/or ordering in any way, but are merely used as labels and/or arbitrary names to distinguish elements for ease of understanding the disclosed examples. " In such instances, it should be understood that such descriptors are used merely for identifying those elements distinctly that might, for example, otherwise share a same name. As used herein, "approximately" and "about" refer to dimensions that may not be exact due to manufacturing tolerances and/or other real-world imperfections. In some examples, "approximately congruent" refers to dimensions of a part that may not be exact due to design and manufacturing decisions that were made to allow the part to comply with other parts of an apparatus or system. As used herein "substantially real time" refers to occurrence in a near instantaneous manner recognizing there may be real world delays for computing time, transmission, etc. Thus, in one example, "substantially real time" refers to real time +/- <NUM> of microseconds while in another example, "substantially real time" refers to real time +/- <NUM> of nanoseconds.

WBG power electronics (e.g., SiC, GaN, etc.) are expected to perform very well and are expected to be extremely power-dense. For example, extremely power dense WBG power electronics are expected to be at least four to five times smaller than silicon-based power electronics. Additionally, WBG power electronics typically operate at far higher temperature compared to silicon-based counterpart. In addition to extremely high power-density compared to silicon-based power electronics, WBG electronics are expected to offer high efficiency. These expectations pose significant challenges in design, manufacturing, and operation of WBG power electronics. Because of the wide array of power electronics applications, WBG power electronics should be designed with the low-cost and smaller-footprint yet high-reliability film capacitors that can successfully co-exist with high-temperature WBG power switches. However, such film capacitors are temperature sensitive. Thus, it is difficult to reduce the size of WBG power electronics while accommodating for the temperature requirements of other components of the power electronics system.

Examples disclosed herein relate to design and packaging of WBG device-based power electronic systems and power stages. Examples disclosed herein achieve high efficiency (e.g., greater than <NUM>% at full load and/or over the recommended coolant temperature) while operating with high-temperature coolant and/or handling full load current required (e.g., requested) by vehicle traction systems (e.g., heavy-duty vehicle traction systems). The example six-pack (e.g., three-phase) SiC MOSFET power module (e.g., including SiC MOSFETs) disclosed herein facilitate, in part, extremely high power-density. Examples disclosed herein aggressively cool capacitors in the DC bus assembly and effectively couple the capacitor assembly with the ambient air around the SiC inverter. Examples disclosed herein include a vertically stacked, multi-board control system to drive and control the power switches. The disclosed stacked system provides reduced size of the SiC inverter, increased power density, and reduced electromagnetic interference (EMI).

Examples disclosed herein include tightly grouped circuitry for each phase of the SiC inverter gate driver. The SiC inverter gate driver drives not only the generator (e.g., to generate AC current), but also an AC motor, and a braking system. Each phase of the generator, the motor, and the braking system includes tightly grouped circuitry. The tightly grouped nature of the circuits isolates high voltage deviation and/or high changes in the voltage (e.g., dv/dt, change in voltage with respect to time, etc.) of one phase with respect to the others. Additionally, examples disclosed herein decouple phases from one another (e.g., reduce EMI) by routing current carrying traces that pass between different boards of the multi-board gate driver substantially perpendicular to other current carrying traces of other phases that have wide ranging and highly variable voltage levels. In this manner, despite the possibility of wide ranging and highly variant voltage levels on different phases, the substantially perpendicular routing electrically and magnetically decouples the traces and reduces noise. The substantially perpendicular routing of traces ensures that magnetically coupled noise that may be injected from one phase (e.g., a voltage class) to other phases (e.g., other voltage classes) is reduced (e.g., minimized, reduced to a negligible level, etc.).

Additionally, due to the stacked nature of the multi-board gate driver, examples disclosed herein advantageously position tightly grouped circuitry above related tightly grouped circuitry (e.g., circuitry that operates on the same or similar signals). This positioning advantageously reduces the electrical distance traveled by the signals in the circuitry despite the physical distance being relatively large. This positioning advantageously reduces electrical and magnetic coupling and allows, in part, for the overall package size of the SiC inverter to be reduced.

Examples disclosed herein additionally include output phase current sensors at the AC output terminal of the SiC inverter. The output terminals of the current sensors are coupled to wire-based connectors that couple the current sensors to the control board. Advantageously, the wire-based connectors pass through cylindrical ferrite cores to reduce noise and any EMI coupling to the sensed current signal. The example ferrite cores encircling the wire-based connectors as disclosed herein advantageously reduce (e.g., prevent) undesirable EMI coupling between the wire-based connectors and the sensed current signal. Such undesirable EMI may occur and/or originate due to the high frequency and high edge rate switching of voltage (e.g., high frequency operation, dv/dt, changes in voltage with respect to time, etc.) and current (e.g., di/dt, changes in current with respect to time, etc.) of power devices used in the SiC inverter. With the addition of the cylindrical ferrite cores, examples disclosed herein ensure that the uncorrupted current sensor data is provided to the control board of the SiC inverter for accurate execution and implementation of control commands in addition to a rapid response for protection of the power switches. As such, examples disclosed herein enable control logic of the SiC inverter to appropriately and swiftly disable the power switches of the SiC inverter in the event of overcurrent or other possible faults experienced by the SiC inverter.

Examples disclosed herein additionally include a DC bus bar associated with the capacitor bank of the SiC inverter and the power switches of the inverter. The example capacitor bank disclosed herein includes multiple capacitors coupled to the DC bus bar (e.g., planar DC bus bar). The example capacitors of the capacitor bank are coupled to the DC bus bar via press-fit pins of the capacitors connected to press-fit holes of the DC bus bar. Additionally, the example DC bus bar disclosed herein is coated with a dielectric thermal interface material (TIM) with high thermal conductivity (e.g., a TIM including high thermal conductivity). The example dielectric TIM disclosed herein improves thermal conductivity and electrically insulates the DC bus bar. For example, the dielectric TIM may be implemented by aluminum oxide (Al<NUM>O<NUM>), GAP3000S30R, aluminum nitride (AlN), Bergquist gap filler 3500S35, and/or Dow Corning® TC-<NUM> thermally conductive gap filler. In any implementation, the dielectric TIM can include micro-sized and/or nano-sized silver beads that are embedded in the dielectric TIM to significantly increase thermal conductivity while maintaining insultation properties.

Additionally, the dielectric TIM may be implemented by nonsilicone based material filled with thermally conductive fillers such as Zink Oxide, Aluminum, Alumina, among others, that effectively make a strong thermal contact between DC bus bar and the SiC inverter case which includes heat-dissipating fins. The dielectric TIM (sometimes referred to as a phase change material) can also be used in packaging the SiC inverter to effectively tie the temperature of the DC bus bar to the temperature of the SiC inverter case which includes heat-dissipating fins. In some examples, the dielectric TIM (e.g., the phase change material) includes thermal conductivity as high as <NUM> W/(m-K).

By increasing the surface area of the region of the DC bus bar associated with the capacitor bank, examples disclosed herein advantageously thermally decouple the capacitor bank from the power switches. The example region of the DC bus bar disclosed herein includes two subregions, a first subregion that is positioned above the capacitor bank with an approximately congruent surface area (e.g., a substantially similar) to that of the top side of the capacitor bank and a second subregion that curves downward along the front face of the capacitor bank and extends into a cavity between the capacitor bank and the power switching/multi-board gate driver region of the SiC inverter. In examples disclosed herein, the second subregion of the region of the DC bus bar associated with the capacitor bank is tapered slightly but includes a relatively large surface area similar to that of the front face of the capacitor bank.

Examples disclosed herein additionally include one or more manifolds (sometimes referred to as mini-manifolds) and one or more channels (sometimes referred to as mini-channels) to cool the power switches. At least some of the manifolds are located under the power switches. Coolant is pumped into the manifolds and flows through the channels. The manifolds and channels together create a turbulent flow of the coolant, which advantageously increases the heat dissipated into the coolant from the power switches by significantly raising a heat transfer coefficient between the junction of the power semiconductor and coolant flowing in channels.

The example manifold and channels disclosed herein reduce the amount of coolant that decreases in pressure and reduce the amount by which the pressure of such coolant decreases. Thus, due to the reduction in coolant pressure drop and/or coolant volume experiencing pressure drop, the example manifold and channels disclosed herein reduce the power expended in pumping coolant to thermally manage the SiC inverter. Additionally, the example manifolds and channels disclosed herein disclosed herein enable efficient thermal management of the SiC inverted by reducing the flow rate of coolant. Therefore, the example manifolds and channels disclosed herein not only increase the high heat flux at which the SiC inverter can operate (<NUM> W/cm<NUM> at <NUM> coolant, and <NUM> W/cm<NUM> at <NUM> coolant) but also reduce the volume of coolant needed resulting in a reduction of the coolant reservoir size.

<FIG> is a schematic illustration of a WBG semiconductor material-based inverter assembly <NUM>. The assembly <NUM> includes an example top side <NUM>, an example bottom side <NUM>, an example right side <NUM>, an example left side (not shown), an example front side <NUM>, and an example back side (not shown). The example bottom side <NUM> includes example output current terminals 110a, 110b, 110c, 110d, 110e, 110f, and <NUM>. The top side <NUM> includes an example first heat sink <NUM>.

In the illustrated example of <FIG>, the assembly <NUM> is an SiC inverter for use in electric vehicles to provide traction control. For example, the assembly <NUM> includes a <NUM> kW, <NUM>,<NUM> VDC bus SiC dual inverter that has increased power densities and can operate at a higher temperature compared to other inverters, such as silicon insulated gate bipolar transistor (IGBT) based inverters. The assembly <NUM> includes power electronics, heat exchangers, printed circuit boards (PCBs), AC and DC bus-bars, coreless current sensors, among other things. The assembly <NUM> may be coupled to a battery, a motor, a braking system, and a heat exchanger of a vehicle (e.g., a radiator). The assembly <NUM> an extremely power dense SiC inverter that achieves compact design with reduced electrical and magnetic interference. For example, the assembly <NUM> includes a power density of <NUM> kW/L. The assembly <NUM> miniaturizes (e.g., reduces) the size of the power electronics while achieving improvements in capability and performance. The example first heat sink <NUM> is a heat sink positioned above the capacitor bank (discussed below) and increases the exchange between the capacitor bank and the ambient air around the assembly <NUM>. The first heat sink <NUM> is a part of the enclosure of the assembly <NUM> but in other examples, the first heat sink <NUM> can be affixed to the assembly <NUM>. The first heat sink <NUM> aids in dissipating the heat generated by the capacitor bank and any stray heat originating from an SiC power switching module included in the assembly <NUM>.

<FIG> is a partially exploded view of the assembly <NUM> of <FIG>. The partially exploded view of the assembly <NUM> includes an example top cover <NUM> of the assembly <NUM>, an example printed circuit board (PCB) assembly <NUM>, an example DC bus bar <NUM>, an example capacitor bank <NUM>, an example power switching assembly <NUM>, and an example bottom cover <NUM> of the assembly <NUM>. The bottom cover <NUM> includes an example bottom enclosure <NUM> and an example manifold cover <NUM>.

In the illustrated example of <FIG>, the top cover <NUM> is mechanically affixed to the bottom cover <NUM>, and specifically to the bottom enclosure <NUM>. The top cover <NUM> encases the top side of the SiC inverter and aids in heat dissipation to decouple the power switching assembly <NUM> from the capacitor bank <NUM>. For example, the top cover <NUM> extends into and fills a cavity <NUM> between a power switching region of the DC bus bar <NUM> and the capacitor bank region of the DC bus bar <NUM>. This extension of the top cover <NUM> allows the top cover <NUM> to dissipate heat from the increased surface area of the DC bus bar <NUM>.

In the illustrated example of <FIG>, the PCB assembly <NUM> includes electrical components and mechanical components. The PCB assembly <NUM> includes a control board, a first gate drive board, and a second gate driver board. The PCB assembly <NUM> functions to control the power switches of the power switching assembly <NUM>. The PCB assembly <NUM> provides for reduced electrical and magnetic interference with a small footprint relative to other inverters.

In the illustrated example of <FIG>, the DC bus bar <NUM> is a metal conductor that is coated with a thermal interference material (TIM) including Al<NUM>O<NUM>. The DC bus bar <NUM> includes press fit holes structured to receive press fit pins of the capacitors included in the capacitor bank <NUM> (discussed further herein). The TIM includes <NUM> W/m-K thermal conductivity for. <NUM> thickness. The TIM ensures air free bonding between the top cover <NUM> and the DC bus bar <NUM>. Alternative example implementations of the TIM include GAP3000S30R, aluminum nitride (AlN), Bergquist gap filler 3500S35, and Dow Corning® TC-<NUM> thermally conductive gap filler. In any implementation, the TIM can include micro-sized (e.g., on the scale of micrometers (µm)) and nano-sized (e.g., on the scale of nanometers (nm)) silver beads that are embedded in the TIM to significantly increase thermal conductivity while maintaining electrical insulation properties. The DC bus bar <NUM> is a laminated ultra-low-inductance bus bar between both sides of the dual inverter (e.g., the capacitor bank side and the power switching assembly side). This ultra-low inductance bus bar ties DC terminals of both side of dual inverter. The DC bus bar <NUM> includes a large surface area in the region above the capacitor bank <NUM> that allows very effective thermal contact and/or connection between the capacitor bank <NUM> and the top cover <NUM>. Thus, the heat sinks on the top cover <NUM> (e.g., the first heat sink <NUM>) can better transfer heat to the ambient environment around the assembly <NUM>. The large surface area of the DC bus bar <NUM> reduces the thermal resistance between the TIM coated metal (e.g., copper, aluminum, etc.) and the top cover <NUM>. The top cover <NUM> can additionally be coated with the same or a different TIM as the DC bus bar <NUM>. The DC bus bar <NUM> is coupled to the power switching assembly via a clamp connection.

The DC bus bar <NUM> includes DC+ and DC- copper sheets (e.g., the DC bus bar <NUM> includes positive and negative voltage bus sheets), each coated with TIM (e.g., Al<NUM>O<NUM>, GAP3000S30R, AlN, Bergquist gap filler 3500S35, Dow Corning® TC-<NUM>, etc.) to ensure that the DC bus bar <NUM> is isolated from voltages as large as two-and-a-half times the nominal operating voltage of the DC bus bar <NUM>. The large surface area of the DC bus bar <NUM>, when coated with the dielectric TIM (e.g., coating or filling) between DC+ and DC- sheets of the DC bus bar <NUM>, functions as distributed decoupling parallel plate capacitor to decouple the DC bus from the high frequency switching at the power switching assembly <NUM>. For example, the large surface area of the DC bus bar <NUM> function as a snubber capacitor. As such, the DC bus bar <NUM> reduces the component count of the assembly <NUM> by eliminating the physical placement of the voltage suppressor capacitors across SiC power modules of the power switching assembly <NUM>.

In the illustrated example of <FIG>, the capacitor bank <NUM> includes multiple capacitors, each including press-fit pins structured to be inserted into the press fit holes of the DC bus bar <NUM>. The capacitors of the capacitor bank <NUM> are implemented as film capacitors. The capacitor bank <NUM> is mechanically coupled to the DC bus bar <NUM> via press fit connections. The capacitor bank <NUM> functions as the source of ripple current caused by switching of the SiC power modules of the power switching assembly <NUM>. The capacitor bank <NUM> also stabilizes voltage levels at the DC bus bar <NUM> and ensures that voltages at the DC bus bar <NUM> exhibit reduced (e.g., minimum) voltage sag and/or swell when the power demanded by the SiC inverter changes due to torque commanded by the operator of a vehicle including the SiC inverter.

In the illustrated example of <FIG>, the power switching assembly <NUM> includes six-pack SiC power modules. Due to laminated TIM coated DC bus bars <NUM>, inductance between generator and traction drive is reduced as the TIM coating has not only met voltage isolation and creepage ratings, but has also reduced (e.g., nullified) any physical separation between positive (DC+)and negative (DC-) buses of the DC bus bar <NUM>. The reduced inductance results in fast power transfer between both generator and traction drives packed in the Gen-<NUM> SiC inverter box. This indirectly provides for fast response to torque commanded by the vehicle operator with reduced (e.g., minimal) sag in the DC bus voltage of the SiC inverter that lasts for a negligibly small duration, such as under <NUM> milliseconds (ms).

In the illustrated example of <FIG>, the bottom enclosure <NUM> houses the PCB assembly <NUM>, the DC bus bar <NUM>, the capacitor bank <NUM>, and the power switching assembly <NUM>. For example, the power switching assembly <NUM> is positioned above the manifold cover <NUM> with the DC bus bar <NUM> stacked on top of the power switching assembly <NUM> and the capacitor bank <NUM> as illustrated in <FIG>. The PCB assembly <NUM> is stacked on top of the DC bus bar <NUM> and the top cover <NUM> encases the bottom enclosure <NUM>. The manifold cover <NUM> is mechanically and thermally coupled to the bottom of the bottom enclosure <NUM> and functions as an inlet and outlet of coolant to the manifold (discussed below). The manifold cover <NUM> also functions as sealing system for the coolant that comes in contact of the baseplate of the power switching assembly <NUM>. In examples disclosed herein, the coolant includes water-ethylene-glycol (WEG).

<FIG> is an exploded view of the assembly <NUM> of <FIG>. The exploded view of the assembly <NUM> of <FIG> includes the example top cover <NUM>, the example PCB assembly <NUM>, the example DC bus bar <NUM>, the example capacitor bank <NUM>, the example power switching assembly <NUM>, and the example bottom cover <NUM>.

In the illustrated example of <FIG>, the example PCB assembly <NUM> include an example control board <NUM>, an example upper gate driver board <NUM>, an example lower gate driver board <NUM>, and an example tray <NUM>. Together, the upper gate driver board <NUM> and the lower gate driver board <NUM> form the gate driver board of the SiC inverter. The example power switching assembly <NUM> includes an example power switch cover <NUM> and an example power switching module <NUM>.

<FIG> is a schematic illustration of a cross section of a portion of the assembly <NUM> of <FIG> including multiple ferrite cores, among other things. a cross section of a portion of the assembly <NUM> of <FIG> includes the example DC bus bar <NUM>, the example capacitor bank <NUM>, the example upper gate driver board <NUM>, the example lower gate driver board <NUM>, the example tray <NUM>, the example power switch cover <NUM>, the example power switching module <NUM>, an example ferrite core <NUM>, and an example press fit connection <NUM>.

In the illustrated example of <FIG>, the DC bus bar <NUM> shown in <FIG> includes two subregions, a first subregion that is positioned above the capacitor bank <NUM> with an approximately congruent surface area (e.g., a substantially similar) to that of the top side of the capacitor bank <NUM> and a second subregion that curves downward along the front face of the capacitor bank <NUM> and extends into a cavity between the capacitor bank <NUM> and the power switching region of the SiC inverter. In the example of <FIG>, the second subregion of the region of the DC bus bar <NUM> associated with the capacitor bank <NUM> is tapered slightly but includes a relatively large surface area similar to that of the front face of the capacitor bank <NUM>. In the example of <FIG>, the capacitor bank <NUM> is coupled to the DC bus bar <NUM> via press fit connection <NUM>. The press fit connection <NUM> may be referred to herein as a "fresh-fit" connection or variants thereof. For example, capacitors of the capacitor bank <NUM> include press fit pins that are inserted into press fit holes included in the DC bus bar <NUM> to form the press fit connection <NUM>. As such, the press fit pins of the capacitors of the capacitor bank <NUM> and the press fit holes of the DC bus bar <NUM> reduce capital expended in production of the SiC inverter.

In the illustrated example of <FIG>, the upper gate driver board <NUM> is mechanically and electrically coupled to the lower gate driver board <NUM>. The upper gate driver board <NUM> is positioned above the lower gate driver board <NUM> and both boards are positioned above the tray <NUM>, the power switch cover <NUM>, and the power switching module <NUM>. The ferrite core <NUM> is a cylindrical ferrite core including a through hole to receive a wire-based connector from current sensors. The cylindrical ferrite core <NUM> reduces noise and any EMI coupling that may occur between the high frequency switching of the power switching module <NUM> and the current sensor signals. With the addition of the cylindrical ferrite core <NUM>, the control board <NUM> (not shown) can detect current sensor data for a rapid response for protection of the power switching module <NUM> in order to disable the power switches in the event of a fault that leads to an over current condition.

As such, examples disclosed herein describe a planar bus bar (e.g., the DC bus bar <NUM>) that couples six pack (three-phase) SiC power modules to a DC bus capacitor bank (e.g., the capacitor bank <NUM>). The example planar bus bar described here also functions as a decoupling capacitor. The large planar surface of the DC bus bar (e.g., the DC bus bar <NUM>) between SiC power modules (e.g., the power switching assembly <NUM>) and the DC bus capacitor bank (e.g., the capacitor bank <NUM>) is tied to the case (e.g., the top cover <NUM>) of the SiC inverter to ensure that heat dissipated by the SiC power modules (e.g., a high-temperature region) does not increase the temperature of the DC bus capacitor bank (e.g., a low-temperature region).

<FIG> is a schematic illustration of the top-side view <NUM> of the upper gate driver board <NUM>. <FIG> illustrates how gate drive signals are routed from the control board through digital isolators to a drive stage including board-to-board "fresh-fit" connectors to assemble the electrical circuits of the top and bottom boards. It is noted that due to limited space availability and alignment of board-to-board connector and signal flow from the control board to the final gate-source pin pair of the SiC power switches, the circuits with different voltage classes are split into multiple clusters. The associated design challenges include providing isolated power supplies (voltage nets) for each voltage class that vary between +<NUM> V and -<NUM> V around a reference ground plain.

In the illustrated example of <FIG>, the top-side view <NUM> includes an example low voltage area <NUM>, an example first high voltage phase circuit cluster <NUM>, an example second high voltage phase circuit cluster <NUM>, an example third high voltage phase circuit cluster <NUM>, an example first high voltage phase driver circuit cluster <NUM> for regulated power supplies, an example second high voltage phase driver circuit cluster <NUM> for regulated power supplies, an example third high voltage phase driver circuit cluster <NUM> for regulated power supplies, an example first cluster of traces <NUM> for the first phase, an example second cluster of traces <NUM> for the second phase, and an example third cluster of traces <NUM> for the third phase.

In the illustrated example of <FIG>, the example low voltage area <NUM>, the example first high voltage phase circuit cluster <NUM>, the example second high voltage phase circuit cluster <NUM>, the example third high voltage phase circuit cluster <NUM>, the example first high voltage phase driver circuit cluster <NUM> for regulated power supplies, the example second high voltage phase driver circuit cluster <NUM> for regulated power supplies, the example third high voltage phase driver circuit cluster <NUM> for regulated power supplies include active and passive circuit elements to aid in driving the power switches of the power switching module <NUM>. The first high voltage phase driver circuit cluster <NUM> for regulated power supplies drives the first high voltage phase circuit cluster <NUM>. The second high voltage phase driver circuit cluster <NUM> for regulated power supplies drives the second high voltage phase circuit cluster <NUM>. The third high voltage phase driver circuit cluster <NUM> for regulated power supplies drives the third high voltage phase circuit cluster <NUM>.

In the illustrated example of <FIG>, the first cluster of traces <NUM> for the first phase electrically couple the first high voltage phase driver circuit cluster <NUM> for regulated power supplies and the first high voltage phase circuit cluster <NUM> to a connector (discussed hereinbelow) to connect the first phase circuit clusters to the lower gate driver board <NUM>. The second cluster of traces <NUM> for the second phase electrically couple the second high voltage phase driver circuit cluster <NUM> for regulated power supplies and the second high voltage phase circuit cluster <NUM> to a connector (discussed hereinbelow) to connect the second phase circuit clusters to the lower gate driver board <NUM>. The third cluster of traces <NUM> for the third phase electrically couple the third high voltage phase driver circuit cluster <NUM> for regulated power supplies and the third high voltage phase circuit cluster <NUM> to a connector (discussed hereinbelow) to connect the third phase circuit clusters to the lower gate driver board <NUM>.

In the illustrated example of <FIG>, the low voltage area <NUM> is isolated from the other clusters and traces by an isolation barrier (e.g., optic, galvanic, capacitive, etc.). The clusters <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, and <NUM> are tightly grouped. The tightly grouped nature of the circuits isolates (e.g., decouples) high voltage deviation and/or high changes in the voltage of one phase with respect to the others.

In the illustrated example of <FIG>, the first phase, second phase, and third phase circuit clusters correspond to the generator of the SiC inverter. As such, the phases can include varying voltages and very high dv/dt. For example, the high side of the generator driver circuit clusters (e.g., <NUM>, <NUM>, <NUM>) are floating grounds. That is, the voltage level at the high side of the generator gate driver circuit clusters (e.g., <NUM>, <NUM>, <NUM>) for regulated power supplies is variable. Although the driver circuit clusters <NUM>, <NUM>, and <NUM> for regulated power supplies are placed closely to one another, this placement fulfills requirements of creepage and clearance with negligible cross-coupling. Some signals have no variations with respect to different voltage phase circuits contrary to other signals that have varying voltages. For example, with respect to the ground plains of the different voltage phases, these voltage nets can oscillate between <NUM>,<NUM> to <NUM>,<NUM> of volts/ms. This design challenge makes the voltage nets very susceptible to dv/dt related coupled current flowing from one voltage class to other voltage class.

In the illustrated example of <FIG>, the different phases are decoupled from one another (e.g., reduce EMI) by routing current carrying clusters of traces (e.g., <NUM>, <NUM>, <NUM>) that pass between different boards of the multi-board gate driver substantially perpendicular to other current carrying traces of other phases (e.g., <NUM>, <NUM>, <NUM>) that have wide ranging and highly variable voltage levels. In this manner, despite the possibility of wide ranging and highly variant voltage levels on different phases, the substantially perpendicular routing electrically and magnetically decouples the traces and reduces noise.

In the illustrated example of <FIG>, only the high voltage generator circuit clusters have been discussed. However, the techniques and advantages thereof additionally apply to the low voltage clusters and/or high voltage clusters and circuits design techniques of the high voltage generator are applicable to the circuits of the AC motor, and to the circuits for the electric braking system.

<FIG> is a schematic illustration of the top-side view <NUM> of the lower gate driver board <NUM>. The top-side view <NUM> includes an example first high voltage phase circuit cluster <NUM> of the final driver stage, an example second high voltage phase circuit cluster <NUM> of the final driver stage, and an example third high voltage phase cluster <NUM> of the final driver stage. The clusters <NUM>, <NUM>, and <NUM> are tightly grouped and remain magnetically and electrically isolated from each other to reduce (e.g., minimize) dv/dt coupled noise from one cluster affecting operation of other clusters.

The example design disclosed herein ensures signal integrity is not impacted due to extremely fast dv/dt (e.g., change in voltage with respect to time) and di/dt (e.g., change in current with respect to time) related switching of SiC power devices relevant to each cluster. Therefore, the disclosed design of the upper gate driver board <NUM> and the lower gate driver board <NUM> includes the tightly grouped circuit clusters that isolate high voltage deviation and/or high changes in the voltage of one phase with respect to the others. Additionally, the clusters <NUM>, <NUM>, and <NUM> are related to the clusters <NUM>, <NUM>, and <NUM>, and driver circuit clusters <NUM>, <NUM>, and <NUM> and the clusters of traces <NUM>, <NUM>, and <NUM>. For example, the first high voltage phase circuit cluster <NUM> receives the signals passed through the connector by the first high voltage phase circuit cluster <NUM> and/or the first high voltage phase driver circuit cluster <NUM> for regulated power supplies via the first cluster of traces <NUM>. The first high voltage phase circuit cluster <NUM> is also electrically coupled to power switches of the power switching assembly <NUM>. Similar relationships are present for clusters <NUM> and <NUM>.

Due to the stacked nature of the multi-board gate driver (e.g., <NUM> and <NUM>), tightly grouped circuitry is positioned above related tightly grouped circuitry (e.g., circuitry that operates on the same or similar signals and that is referenced to the same ground plain). This positioning advantageously reduces the electrical distance traveled by the signals in the circuitry despite the physical distance being relatively large. For example, because related circuitry overlaps with one another, the current passing through that related circuitry only perceives a minimal electrical distance. This positioning advantageously reduces electrical and magnetic coupling and allows, in part, for the overall package size of the SiC inverter to be reduced. As such, although electrical signals travel long physical distances, the electrical distance travelled is negligible due to the placement of circuity and laminated traces routed for critical signals, such as PWM and Desat detector. To ensure high performance signal integrity is maintained, example routing disclosed herein pairs PWM and Desat signals with dedicated ground traces in addition to voltage phase ground plains beneath traces for the PWM and Desat signals.

<FIG> is a schematic illustration of the bottom-side view <NUM> of the upper gate driver board <NUM>. As described above, only the high voltage generator circuit clusters have been discussed with respect to <FIG> and <FIG>. However, the techniques and advantages thereof additionally apply to the low voltage clusters and/or high voltage clusters and circuits design techniques of the high voltage generator are applicable to the circuits of the AC motor, and to the circuits for the electric braking system. For example, similar techniques are presented between the top-side and bottom-side of the upper gate driver board <NUM> and the lower gate driver board <NUM>, respectively, as well as between top-side and bottom-side of the upper gate driver board <NUM> and the top-side and bottom-side of the lower gate driver board <NUM>.

<FIG> is a schematic illustration of the bottom-side view <NUM> of the lower gate driver board <NUM>. As described above, only the high voltage generator circuit clusters have been discussed with respect to <FIG> and <FIG>. However, the techniques and advantages thereof additionally apply to the low voltage clusters and/or high voltage clusters and circuits design techniques of the high voltage generator are applicable to the circuits of the AC motor, and to the circuits for the electric braking system. For example, similar techniques are presented between the top-side and bottom-side of the upper gate driver board <NUM> and the lower gate driver board <NUM>, respectively, as well as between top-side and bottom-side of the upper gate driver board <NUM> and the top-side and bottom-side of the lower gate driver board <NUM>.

Additionally, the bottom-side view <NUM> of the lower gate driver board <NUM> includes example through holes <NUM> and example through holes <NUM>. The example through holes <NUM> are DC+ and DC- plated-holes to receive screws and pass the screws to the DC+ and DC- terminals of the DC bus bar <NUM>. The through holes <NUM> eliminate ribbon connector resulting in improved reliability and elimination of a significant failure mode. The example through holes <NUM> are DC+, DC-, and mid-point-holes, totaling in four through holes, that are connected with DC+ and DC- via traces. The through holes <NUM> (e.g. pair of DC+ and mid-point and pair of mid-point and DC-) connect bleed resistance by drive-through screws. This approach has eliminated high-voltage class wired connections resulting in improved reliability and elimination of a significant failure mode including high temperature related melt of insulation from of high voltage wires. Through holes <NUM> and through holes <NUM> are configured to receive drive through screws and as such, eliminate manufacturing steps during fabrication of the SiC inverter. As such, examples disclosed herein eliminate wired connections for a high-voltage sensing circuit and a self-discharge circuit of the SiC inverter (e.g., when the SiC inverter is not in operation).

<FIG> is a schematic illustration of the top-side view <NUM> and the bottom-side view <NUM> of the upper gate driver board <NUM> and the top-side view <NUM> and the bottom-side view <NUM> of the lower gate driver board <NUM>. <FIG> illustrates the overlap between the related clusters of circuits that results in minimal electrical distance travelled by signals.

<FIG> is a schematic illustration of a connector <NUM> that can be used to couple the upper gate driver board <NUM> to the lower gate driver board <NUM>. The connector <NUM> is a press-fit connector including press-fit-pins <NUM> on one side and solderable pins <NUM> on the other side of board-to-board connector.

<FIG> is a schematic illustration of an alternative connector <NUM> that can be used to couple the upper gate driver board <NUM> to the lower gate driver board <NUM>. The connector <NUM> is a press-fit connector including press-fit-pins <NUM> and <NUM> on both sides of the board-board connector. The connector <NUM> adds manufacturing complexities and is prone to introduce manufacturing defects while the connector <NUM> significantly simplifies manufacturing processes, lowers manufacturing cost and eliminates manufacturing defects.

<FIG> is a schematic illustration of an isometric view of a cross-section of a portion of the assembly <NUM> of <FIG>. The isometric view illustrates the connector <NUM> connecting the upper gate driver board <NUM> and the lower gate driver board <NUM>. In alternative examples, the connector <NUM> connects the upper gate driver board <NUM> and the lower gate driver board <NUM>.

<FIG> is a schematic illustration of a right-side view of a cross-section of the portion of the assembly <NUM> of <FIG> shown in <FIG>. The right-side view includes the example DC bus bar <NUM>, the example capacitor bank <NUM>, the example power switching assembly <NUM>, an example cavity <NUM>, an example front face <NUM> of the capacitor bank <NUM>, and an example rear face <NUM> of the power switching assembly <NUM>. The DC bus bar <NUM> includes two subregions, a first subregion that is positioned above the capacitor bank <NUM> with an approximately congruent surface area (e.g., a substantially similar) to that of the top side of the capacitor bank <NUM> and a second subregion that curves downward along the front face <NUM> of the capacitor bank <NUM> and extends into the cavity <NUM> between the capacitor bank <NUM> and the rear face <NUM> of the power switching assembly <NUM>. In examples disclosed herein, the second subregion of the region of the DC bus bar <NUM> associated with the capacitor bank <NUM> is tapered slightly but includes a relatively large surface area similar to that of the front face of the capacitor bank <NUM>. The large surface area of the DC bus bar <NUM> enabled by the first subregion and the second subregion ensures that heat flow path from the power switching assembly <NUM> to the capacitor bank <NUM> is thermally decoupled (e.g., disconnected). For example, the large surface area of the DC bus bar <NUM> enabled by the first subregion and second subregion ensures that peaks in a temperature of one or more the capacitors of the capacitor bank are avoided despite heat generated by the power switching assembly <NUM>. Thus, the capacitor bank <NUM> is effectively thermally coupled to ambient temperature of the environment around the assembly <NUM> which results in improved reliability and durability of the SiC inverter.

<FIG> is a schematic illustration of an isometric view of the assembly <NUM> of <FIG> with a portion of the manifold cover <NUM> removed. <FIG> illustrates the manifold and channels of the cooling system of the power switching assembly <NUM>. <FIG> includes an example inlet <NUM>, an example outlet <NUM>, and an example upper manifold <NUM>. Coolant flows from the inlet <NUM>, through the upper manifold <NUM>, the lower manifold (discussed in connection with <FIG>, <FIG>, <FIG>, and <FIG>), and the channels (discussed in connection with <FIG>, <FIG>, <FIG>, and <FIG>), to the outlet <NUM>. As such, the lower manifold <NUM> ejects the coolant at the outlet <NUM> after the coolant has absorbed heat produced by the power switching modules of the power switching assembly <NUM>.

<FIG> is a schematic illustration of a partially exploded view of a portion of the assembly <NUM> of <FIG>. <FIG> illustrates the lower manifold <NUM> engraved on the interior of the manifold cover <NUM>.

<FIG> is a schematic illustration of a baseplate <NUM> of the power switching module <NUM>. The baseplate <NUM> includes example channel section <NUM> corresponding to a first set of SiC switches of the power switching module <NUM> and example channel section <NUM> corresponding to a second set of SiC switches of the power switching module <NUM>. The channel sections <NUM> and <NUM> are just below the SiC die of the respective SiC switches and engraved in the copper baseplate <NUM> of the power switching module <NUM>. Each of the channel sections <NUM> and <NUM> covers an area of <NUM> millimeters (mm) by <NUM> and includes approximately <NUM> channels.

<FIG> is a schematic illustration of the geometry of an individual channel <NUM> of the channel section <NUM> of <FIG>. The channel <NUM> includes an example first fin <NUM>, and example second fin <NUM>, and an example cavity <NUM>. In the example of <FIG>, the width of the channel <NUM> (e.g., the distance between the interior sides of the first fin <NUM> and the second fin <NUM>) is <NUM> and the height of the channel <NUM> (e.g., the depth of the cavity <NUM> in the Z-direction) is <NUM> (e.g., three millimeters). The pitch of the example channel <NUM> is <NUM>. The bottom of the channel <NUM> contacts the lower manifold <NUM>.

<FIG> is a schematic illustration of a front-side view of the channel section <NUM> interfacing with the lower manifold <NUM>. In the example of <FIG>, the lower manifold <NUM> is positioned beneath the channel section <NUM> in such a way that the lower manifold <NUM> causes jet impingement (e.g., is to cause jet impingement) of coolant flowing into the channel section <NUM>. For example, lines <NUM>,<NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, and <NUM> illustrate the coolant flowing into and out of the channel section <NUM>. As the coolant flows through the channel section <NUM> and into the coolant passage built-in the lower manifold <NUM>, the coolant absorbs heat dissipated by a first set of SiC switches <NUM> corresponding to the channel section <NUM>. In examples disclosed herein, the coolant can reach a temperature of <NUM> (e.g., one hundred and fifteen degrees Celsius).

The example jet impingement process caused by the channels and manifolds disclosed herein creates turbulent motion of the coolant flowing through the channels (e.g., the channel section <NUM>) resulting in extremely high (e.g., > <NUM>,<NUM>) Reynold number. As such, examples disclosed herein retain turbulent motion even with the low flow rate and insignificant pressure drop of coolant through the SiC inverter. With the reduced delta in pressure drops, examples disclosed herein reduce the pumping power expended by the coolant pump. The channel and manifold based cooling techniques disclosed herein result in extremely high transfer coefficient (e.g., > <NUM> kW/(m<NUM>-K)).

<FIG> is a schematic illustration of a portion of the manifold cover <NUM> of <FIG>, <FIG>, and <FIG> illustrating how the channels and the manifolds interface with the baseplate <NUM> of the power switching module <NUM>. In the example of <FIG>, the lower manifold <NUM> is inserted into the upper manifold <NUM> when the manifold cover <NUM> is attached. The channels and the manifold based cooling technology described herein is applicable and can be extended to any power switching module no matter the manufacturer or type of power semiconductor technology used. For example, the cooling technology described herein can be applied to Si IGBTs, SiC MOSFETs and GaN high electron mobility transistors (HEMTs). The channels and the manifold cooling technology can also be extended to cool large surface area underneath the AC output bus bars to actively cool down interconnects between the SiC inverter and electric machine such as electric motor and electric generator.

<FIG> is a schematic illustration of a bottom-side view of the assembly <NUM> of <FIG> with the manifold cover <NUM> illustrated opaquely. In the example of <FIG>, coolant flows from the inlet <NUM> through first channels and manifolds, as illustrated by lines <NUM>, as the coolant absorbs heat from a first power switching module. The coolant passes through the coolant passage as illustrated by line <NUM>. The coolant passes through second channels and manifolds, as illustrated by lines <NUM>, as the coolant absorbs heat from a second power switching module. Subsequently, the coolant flows out the outlet <NUM>.

Claim 1:
An apparatus (<NUM>) for wide bandgap power electronic power stages, the apparatus comprising:
a first printed circuit board, PCB, (<NUM>) including:
a first voltage phase circuit cluster (<NUM>);
a second voltage phase circuit cluster (<NUM>) the second voltage phase circuit cluster (<NUM>) including first traces; and
a cluster of second traces (<NUM>), the cluster of second traces routed substantially perpendicular to the first traces of the second voltage phase circuit cluster (<NUM>);
a second PCB (<NUM>) positioned below the first PCB (<NUM>); and
a connector (<NUM>) to connect the first PCB (<NUM>) to the second PCB (<NUM>), the connector electrically coupled to the first voltage phase circuit cluster (<NUM>) by the cluster of second traces (<NUM>).