Patent Description:
Hereinafter, a "Q" prefix in a word or phrase is indicative of a reference of that word or phrase in a quantum computing context unless expressly distinguished where used.

Molecules and subatomic particles follow the laws of quantum mechanics, a branch of physics that explores how the physical world works at a fundamental level. At this level, particles behave in strange ways, taking on more than one state at the same time, and interacting with other particles that are very far away. Quantum computing harnesses these quantum phenomena to process information.

The computers we use today are known as classical computers (also referred to herein as "conventional" computers or conventional nodes, or "CN"). A conventional computer uses a conventional processor fabricated using semiconductor materials and technology, a semiconductor memory, and a magnetic or solid-state storage device, in what is known as a Von Neumann architecture. Particularly, the processors in conventional computers are binary processors, i.e., operating on binary data represented in <NUM> and <NUM>.

A quantum processor (Q-processor) uses the odd nature of quantum bit devices (compactly referred to herein as "qubit," plural "qubits") to perform computational tasks. In the particular realms where quantum mechanics operates, particles of matter can exist in multiple states-such as an "on" state, an "off" state, and both "on" and "off" states simultaneously. Where classical computing using semiconductor processors is limited to using just the on and off states (equivalent to <NUM> and <NUM> in binary code), a Q-processor harnesses these quantum states of matter to output signals that are usable in data computing.

Conventional computers encode information in bits. Each bit can take the value of <NUM> or <NUM>. These <NUM> and <NUM> act as on/off switches that ultimately drive computer functions. Quantum computers, on the other hand, are based on qubits, which differ from classical computers according to two key principles of quantum physics: superposition and entanglement. Superposition means that each qubit can represent both a <NUM> and a <NUM> at the same time. Entanglement means that qubits in a superposition can be correlated with each other in a non-classical way; that is, the state of one (whether it is a <NUM> or a <NUM> or both) can depend on the state of another, and that there is more information that can be ascertained about the two qubits when they are entangled than when they are treated individually.

Using these two principles, qubits operate as more sophisticated processors of information, enabling quantum computers to function in ways that allow them to solve difficult problems that are intractable using conventional computers. IBM has successfully constructed and demonstrated the operability of a Q-processor using superconducting qubits (IBM is a registered trademark of International Business Machines Corporation in the United States and in other countries.

A superconducting qubit includes a Josephson junction. A Josephson junction is formed by separating two thin-film superconducting metal layers by a non-superconducting material. When the metal in the superconducting layers is caused to become superconducting - e.g. by reducing the temperature of the metal to a specified cryogenic temperature - pairs of electrons can tunnel from one superconducting layer through the non-superconducting layer to the other superconducting layer. In a qubit, the Josephson junction - which functions as a dispersive nonlinear inductor - is electrically coupled in parallel with one or more capacitive devices forming a nonlinear microwave oscillator. The oscillator has a resonance/transition frequency determined by the value of the inductance and the capacitance in the qubit. Any reference to the term "qubit" is a reference to a superconducting qubit oscillator circuitry that employs a Josephson junction unless expressly distinguished where used.

In a superconducting state, the material firstly offers no resistance to the passage of electrical current. When resistance falls to zero, a current can circulate inside the material without any dissipation of energy. Secondly, the material exhibits Meissner effect, i.e., provided they are sufficiently weak, external magnetic fields do not penetrate the superconductor, but remain at its surface. When one or both of these properties are no longer exhibited by the material, the material is said to be no longer superconducting.

A critical temperature of a superconducting material is a temperature at which the material begins to exhibit characteristics of superconductivity. Superconducting materials exhibit very low or zero resistivity to the flow of current. A critical field is the highest magnetic field, for a given temperature, under which a material remains superconducting.

Superconductors are generally classified into one of two types. Type I superconductors exhibit a single transition at the critical field. Type I superconductors transition from a non-superconducting state to a superconducting state when the critical field is reached. Type II superconductors include two critical fields and two transitions. At or below the lower critical field, type II superconductors exhibit a superconducting state. Above the upper critical field, type II superconductors exhibit no properties of superconductivity. Between the upper critical field and the lower critical field, type II superconductors exhibit a mixed state. In a mixed state, type II superconductors exhibit an incomplete Meissner effect, i.e., penetration of external magnetic fields in quantized packets at specific locations through the superconductor material.

The Meissner effect results from the generation of persistent currents at the surface of the superconductor material. Persistent currents are perpetual electric currents which do not require an external power source. The persistent currents generate an opposing magnetic field to cancel the external magnetic field throughout the bulk of the superconductor material. In a superconducting state, persistent currents do not decay with time due to the zero resistance property.

A superconductor material above the critical temperature allows penetration of an external magnetic field. Cooling the superconductor material at or below the critical temperature while maintaining the external magnetic field results in the generation of persistent currents. The persistent currents flow indefinitely due to the superconductor material offering no resistance to the passage of electrical current. The external magnetic field can be switched off or removed altogether and the persistent currents remain. The persistent currents generate a magnetic field outside the superconductor material. The magnetic field generated by the persistent currents compensates for the change in magnetic flux from the switched off external magnetic field. The superconducting material acts as a permanent magnet as long as the temperature does not rise above the critical temperature.

The information processed by qubits is carried or transmitted in the form of microwave signals/photons in the range of microwave frequencies. The microwave frequency of a qubit output is determined by the resonance frequency of the qubit. The microwave signals are captured, processed, and analyzed to decipher the quantum information encoded therein. A readout circuit is a circuit coupled with the qubit to capture, read, and measure the quantum state of the qubit. An output of the readout circuit is information usable by a Q-processor to perform computations.

A superconducting qubit has two quantum states - |<NUM>> and |<NUM>>. These two states may be two energy states of atoms, for example, the ground (|<NUM>>) and first excited state (|<NUM>>) of a superconducting artificial atom (superconducting qubit). Other examples include spin-up and spin-down of the nuclear or electronic spins, two positions of a crystalline defect, and two states of a quantum dot. Since the system is of a quantum nature, any combination of the two states is allowed and valid.

For quantum computing using qubits to be reliable, quantum circuits, e.g., the qubits themselves, the readout circuitry associated with the qubits, and other parts of the Q-processor, must not alter the energy states of the qubit, such as by injecting or dissipating energy, in any significant manner or influence the relative phase between the |<NUM>> and |<NUM>> states of the qubit. This operational constraint on any circuit that operates with quantum information necessitates special considerations in fabricating semiconductor and superconducting structures that are used in such circuits.

The document<NPL>, proposes a contactless magnetic phase shifter for flux-based superconducting qubits. The phase shifter is realised by placing a perpendicularly magnetized dot at the centre of a superconducting loop. The flux generated by this magnetic dot gives rise to an additional shielding current in the loop, which, in turn, induces a phase shift. By modifying the parameters of the dot (e.g. changing radius of the dot or varying the number of Co/Pb bilayer) an arbitrary phase shift can be generated in the loop. <CIT> describes a system with a compensation coil for generating a compensation field, a SQUID for measuring an effect of the compensation field, and a heater for locally heating a portion of the system above a critical temperature of at least one superconducting component in the system to release the magnetic flux trapped by the superconducting component in the system.

The illustrative embodiments recognize that a qubit's resonance frequency is inherently fixed at the time the qubit is fabricated, i.e., when the Josephson junction and the capacitive element of the qubit-oscillator are fabricated on a Q-processor chip. The illustrative embodiments further recognize that in the simplest implementation of a Q-processor, at least two qubits are needed to implement a quantum logic gate. Therefore, a Q-processor chip is typically fabricated to have at least <NUM>, but often <NUM>, <NUM>, or more qubits on a single Q-processor chip.

Some qubits are fixed-frequency qubits, i.e., their resonance frequencies are not changeable. Other qubits are frequency-tunable qubits. A Q-processor can employ fixed-frequency qubits, frequency-tunable qubits, or a combination thereof.

The illustrative embodiments recognize that it is difficult to fabricate single-junction transmons or fixed-frequency superconducting qubits with specific accurate frequencies or accurate frequency differences between neighboring qubits. This is mainly because the critical current of Josephson junctions is not a well-controlled parameter in the fabrication process. This results in a relatively wide-spread in the critical currents of Josephson junctions having the same design and area and fabricated on the same chip.

The illustrative embodiments recognize that when the resonance frequencies of two neighboring coupled qubits on a chip are the same or within a threshold band of frequencies or their higher transition frequencies are on resonance or close to resonance, then negative effects can happen such as, crosstalk, quantum decoherence, energy decay, creation of mixed states, unintended information transfer, quantum state leakage and so on. Having such qubits can also negatively affect the performance or utility of certain quantum gates such as cross-resonance gates which have stringent requirements on the spectrum of resonance frequencies of qubits upon which the gate is operating on. Therefore, the illustrative embodiments recognize that one challenge in Q-processors that are based on coupled fixed-frequency qubits is frequency crowding or frequency collision between adjacent qubits, in particular, when cross-resonance gates are used.

It is important to note that while the proposed qubit tuning technique is motivated by the need to solve frequency collisions of coupled qubits on the same chip which are acted on with cross-resonance gates, the proposed qubit tuning technique is general, and can be applied to other kinds of quantum devices on chip which require qubit tuning without penetrating the device package.

The illustrative embodiments recognize that a frequency-tunable qubit (hereinafter compactly referred to as a "tunable qubit") has a flux-dependent inductance. Frequency tunability can be achieved, for example, by replacing the single Josephson junction of a fixed frequency qubit with a superconducting loop that includes one or more Josephson junctions. By varying the magnetic field threading the loop, the inductance of the loop changes, which in turn changes the resonance frequency of the qubit, thus making the qubit tunable. The illustrative embodiments recognize that one challenge in Q-processors that are based on tunable-frequency qubits is sensitivity to flux noise which leads to dephasing.

Presently, when the frequency of a flux-tunable qubit on a chip has to be changed, there are two main methods that are used in the state-of-the-art to apply or change the flux threading the loop of the qubit. The first method is using a global superconducting coil attached to the qubit-chip package. This method has the advantage of having an external fully controllable magnetic source which does not penetrate the device package. Such an external source can be filtered well and avoids several negative effects. The disadvantage of this method is that the qubits cannot be individually controlled and tuned.

The second method is using on-chip magnetic field lines or flux-lines that are placed on the Q-processor chip and routed near the qubit. The advantages of this method are: <NUM>- it is scalable, <NUM>- enables high-density flux-line systems for large Q-processors, <NUM>- allows individual qubits to be tuned and controlled. The disadvantages of this method are: <NUM>- it introduces additional noise channels between the Q-processor and the external environment which can negatively affect the coherence and performance of the Q-processors, <NUM>- it is difficult to fabricate and route the on-chip flux-lines near the qubits inside the device package.

The illustrative embodiments provide a superconducting device, a method and system of fabrication therefore. A superconducting qubit tuning device of an embodiment includes a first layer configured to generate a magnetic field, the first layer comprising a material exhibiting superconductivity below a critical temperature of the material in a cryogenic temperature range. The device includes a qubit of a Q-processor chip, wherein the first layer is configured to magnetically interact with the qubit such that a first magnetic flux of the first layer causes a first change in a first resonance frequency of the qubit by a first frequency shift value.

The device includes a heating element configured to heat a portion of the first layer above the critical temperature. The device includes a magnetic element configured to apply a magnetic field to the first layer. In an embodiment, the heating element is a resistor. In an embodiment, the heating element is a light source.

In an embodiment, the device includes a wire of a superconducting material, the wire being formed into a coil structure. In an embodiment, the heating element is one of a plurality of heating elements, each heating element configured to heat a corresponding portion of the first layer above a critical temperature.

In an embodiment, each portion of the first layer is configured to magnetically interact with a corresponding qubit of a plurality of qubits of the Q-processor such that a magnetic flux of each portion causes a change in a resonance frequency of the corresponding qubit. In an embodiment, the first layer produces the first magnetic flux while operating in a range of temperatures between <NUM> Kelvin and <NUM> Kelvin, inclusive of both ends of the range.

In an embodiment, the device includes a second layer configured to generate a magnetic field, the second layer comprising a material exhibiting superconductivity in a cryogenic temperature range. In an embodiment, the device includes a magnetic element disposed on a surface of a chip, wherein the first layer is formed on an opposite surface of the chip. In an embodiment, the qubit is formed on a first surface of the Q-processor chip. In an embodiment, the first layer is formed on an opposite surface of the Q-processor chip.

In an embodiment, the device includes a magnetic element configured to apply a magnetic field to the first layer, the magnetic element disposed on a first chip. In an embodiment, the first layer is disposed on a second chip.

An embodiment includes a method to fabricate a qubit tuning device. The method includes forming a first layer configured to generate a magnetic field, the first layer comprising a material exhibiting superconductivity below a critical temperature of the material in a cryogenic temperature range. The method includes forming a qubit on a Q-processor chip, wherein the first layer is configured to magnetically interact with the qubit such that a first magnetic flux of the first layer causes a first change in a first resonance frequency of the qubit by a first frequency shift value. The method includes providing a heating element configured to heat a portion of the first layer above the critical temperature and a magnetic element configured to apply a magnetic field to the first layer.

In an embodiment, the method includes forming a second layer configured to generate a magnetic field, the second layer comprising a material exhibiting superconductivity in a cryogenic temperature range. In an embodiment, the first layer produces the first magnetic flux while operating in a range of temperatures between <NUM> Kelvin and <NUM> Kelvin, inclusive of both ends of the range.

In an embodiment, the method includes disposing a magnetic element on a surface of a chip, wherein the first layer is formed on an opposite surface of the chip. In an embodiment, the qubit is formed on a first surface of the Q-processor chip. In an embodiment, the first layer is formed on an opposite surface of the Q-processor chip.

An embodiment includes a method of tuning a qubit. In an embodiment, the method includes generating a first magnetic field through a portion of a first layer, the first layer comprising a material exhibiting superconductivity in a cryogenic temperature range, the portion of the first layer above a critical temperature. In an embodiment, the method includes cooling the portion of the first layer at least to the critical temperature. In an embodiment, the method includes generating, in response to cooling the portion of the first layer at least to the critical temperature, a second magnetic field to magnetically interact with a qubit of a Q-processor chip such that a first magnetic flux of the first layer causes a first change in a first resonance frequency of the qubit by a first frequency shift value.

In an embodiment, the method includes heating with a heating element, prior to cooling the portion of the first layer, the portion of the first layer above the critical temperature. In an embodiment, the heating element is a resistor. In an embodiment, the heating element is embedded in the Q-processor chip.

In an embodiment, the method includes switching off, after cooling the portion, the first magnetic field through the portion of the first layer. In an embodiment, the method includes generating a third magnetic field through a second portion of the first layer.

In an embodiment, the method includes cooling the second portion of the first layer at or below the critical temperature. In an embodiment, the method includes generating, in response to cooling the second portion, a fourth magnetic field to magnetically interact with a second qubit of the Q-processor chip such that a second magnetic flux of the first layer causes a first change in a second resonance frequency of the second qubit by a second frequency shift value.

In an embodiment, the method includes maintaining the first magnetic field while cooling the portion of the first layer. In an embodiment, the method includes forming the qubit on a first surface of the Q-processor chip.

In an embodiment, the method includes forming the first layer on an opposite surface of the Q-processor chip. In an embodiment, the method includes forming a coil structure from a wire of superconducting material, the coil structure configured to generate the first magnetic field.

In an embodiment, the method includes forming the first layer on a first surface of a chip. In an embodiment, the method includes forming the coil structure on an opposite surface of the chip. In an embodiment, the method includes heating the portion of the first layer above the critical temperature using a light source.

In an embodiment, the critical temperature of the first layer is between <NUM> Kelvin and <NUM> Kelvin, inclusive of both ends of the range. In an embodiment, the method includes measuring a set of qubits to determine a set of qubit frequencies. In an embodiment, the method includes analyzing the set of qubit frequencies to determine instances of frequency crowding between the set of qubits.

In an embodiment, the method includes forming a plurality of coil structures, the plurality of coil structures configured to generate the first magnetic field. In an embodiment, the method includes heating a plurality of portions of the first layer above the critical temperature.

In an embodiment, the method includes generating a plurality of magnetic fields, each magnetic field corresponding to a portion of the plurality of portions of a first layer. In an embodiment, the method includes cooling the plurality of portions of the first layer at least to the critical temperature. In an embodiment, the method includes generating, in response to cooling the plurality of portions of the first layer at least to the critical temperature, a second plurality of magnetic fields to magnetically interact with a plurality of qubits of the Q-processor chip such that each magnetic flux of a plurality of magnetic fluxes of the first layer causes a first change in a first resonance frequency of a corresponding qubit of the plurality of qubits by a first frequency shift value.

An embodiment includes a computer usable program product. The computer usable program product includes a computer-readable storage device, and program instructions stored on the storage device.

In an embodiment, the computer usable code is stored in a computer readable storage device in a data processing system, and wherein the computer usable code is transferred over a network from a remote data processing system. In an embodiment, the computer usable code is stored in a computer readable storage device in a server data processing system, and wherein the computer usable code is downloaded over a network to a remote data processing system for use in a computer readable storage device associated with the remote data processing system.

An embodiment includes a computer system. The computer system includes a processor, a computer-readable memory, and a computer-readable storage device, and program instructions stored on the storage device for execution by the processor via the memory.

An embodiment includes a superconductor fabrication system which when operated to fabricate a qubit tuning device performs operations comprising: forming a first layer configured to generate a magnetic field, the first layer comprising a material exhibiting superconductivity below a critical temperature of the material in a cryogenic temperature range; and forming a qubit on a quantum processor chip, wherein the first layer is configured to magnetically interact with the qubit such that a first magnetic flux of the first layer causes a first change in a first resonance frequency of the qubit by a first frequency shift value.

The operations of the superconductor fabrication system may further comprise forming a second layer configured to generate a magnetic field, the second layer comprising a material exhibiting superconductivity in a cryogenic temperature range.

The operations of the superconductor fabrication system may further comprise disposing a magnetic element on a surface of a chip, wherein the first layer is formed on an opposite surface of the chip.

The characteristics of the invention are set forth in the appended claims. The invention as well as a preferred mode of use, further objectives, and advantages thereof, will best be understood by reference to the following detailed description of the illustrative embodiments when read in conjunction with the accompanying drawings, wherein:.

The illustrative embodiments used to describe the invention generally address and solve the above-described needs for individually tunable qubits on a single chip.

An operation described herein as occurring with respect to a frequency or frequencies should be interpreted as occurring with respect to a signal of that frequency or frequencies. All references to a "signal" are references to a microwave signal unless expressly distinguished where used. Within the scope of the illustrative embodiments, temperatures at ninety-three Kelvin and below are regarded as cryogenic temperatures.

An embodiment provides a configuration of a device for qubit tuning using magnetic fields in superconductors. Another embodiment provides a fabrication method for the device for qubit tuning using magnetic fields in superconductors, such that the method can be implemented as a software application. The application implementing a fabrication method embodiment can be configured to operate in conjunction with an existing superconductor fabrication system - such as a lithography system.

Illustrative embodiments are described using some example configurations. From this disclosure, those of ordinary skill in the art will be able to conceive many alterations, adaptations, and modifications of a described configuration for achieving a described purpose, and the same are contemplated within the scope of the illustrative embodiments.

Furthermore, simplified diagrams of the example qubits, coils or magnetic flux inducing structures, housing, casing, and other circuit components are used in the figures and the illustrative embodiments. In an actual fabrication or circuit, additional structures or component that are not shown or described herein, or structures or components different from those shown but for the purpose described herein may be present without departing the scope of the illustrative embodiments.

Furthermore, the illustrative embodiments are described with respect to specific actual or hypothetical components only as examples. The steps described by the various illustrative embodiments can be adapted for fabricating a circuit using a variety of components that can be purposed or repurposed to provide a function in a described manner, and such adaptations are contemplated within the scope of the illustrative embodiments.

The illustrative embodiments are described with respect to certain types of materials, electrical properties, steps, shapes, sizes, numerosity, frequencies, circuits, components, and applications only as examples. Any specific manifestations of these and other similar artifacts are not intended to be limiting to the invention. Any suitable manifestation of these and other similar artifacts can be selected within the scope of the illustrative embodiments.

The examples in this disclosure are used only for the clarity of the description and are not limiting to the illustrative embodiments. Any advantages listed herein are only examples and are not intended to be limiting to the illustrative embodiments. Additional or different advantages may be realized by specific illustrative embodiments. Furthermore, a particular illustrative embodiment may have some, all, or none of the advantages listed above.

With reference to <FIG>, this figure depicts a block diagram of an example configuration of a prior-art of a global superconducting coil which can be improved in accordance with an illustrative embodiment. Printed circuit board (PCB) <NUM> includes microwave connectors <NUM>, chip <NUM>, and other components as may be needed in an implementation. Chip <NUM> is an example of a Q-processor comprising a plurality of qubits, e.g., qubits <NUM> and <NUM>. In one embodiment, chip <NUM> can be mounted on printed circuit board <NUM> using a housing, a non-limiting example of which is described herein.

Global superconducting coil <NUM> is a flux inducing structure that is placed near chip <NUM> to provide biasing flux to all qubits on chip <NUM>. Global superconducting coil <NUM> is distinct and separate from chip <NUM>. Global superconducting coil <NUM> is formed by winding a superconducting wire with very thin insulating coating around a metallic core or rod, the two ends of the superconducting wire terminating at contacts <NUM> and <NUM>. Electric Direct current (DC) - current A - flows through the coil to generate magnetic flux Φ. Flux Φ change the output frequencies of qubits <NUM> and <NUM> by some amount. The flux dependence of the superconducting loop is periodic. The amount of flux that threads the qubit loops depend on their distances from global superconducting coil <NUM> and also on the background magnetic field which might be unequal for the different qubits. Generally, once the position of global superconducting coil <NUM> is fixed relative to chip <NUM>, and the magnetic environment of chip <NUM> is stabilized in an installation, the changes in the frequencies of qubits <NUM> and <NUM> on chip <NUM> cannot be tuned independently of each other using a global superconducting coil <NUM>.

With reference to <FIG>, this figure depicts a block diagram of an example configuration of an apparatus for qubit tuning using magnetic fields in superconductors in accordance with an illustrative embodiment. Configuration <NUM> includes chip <NUM> and other components as may be needed in an implementation. Chip <NUM> is an example of a Q-processor comprising a plurality of qubits, e.g., qubits <NUM> and <NUM>.

In contrast with global superconducting coil <NUM> of <FIG>, configuration <NUM> of <FIG> depicts chip <NUM> comprising a first layer <NUM>. First layer <NUM> comprises a material that exhibits superconductivity in a portion of the cryogenic temperature range. In an embodiment, first layer <NUM> is a thin film layer. For example, first layer <NUM> can be a patterned film or a blanket film. In an embodiment, first layer <NUM> comprises a material that exhibits superconductivity in a temperature range of about <NUM>-<NUM> Kelvin, inclusive of both ends of the temperature range. For example, first layer <NUM> may be formed using a Type II superconductor material.

Coil <NUM> is configured to generate a magnetic field acting at the first layer <NUM>. In an embodiment, a plurality of coils are configured to generate a magnetic field acting at the first layer <NUM>. For example, a plurality of coils may be configured to generate a uniform magnetic field at the first layer <NUM>. In an embodiment, each coil is configured to generate a specific magnetic field at a specific portion of the first layer <NUM>. In an embodiment, each specific portion of the first layer <NUM> corresponds to an individual qubit on chip <NUM>. For example, coil <NUM> generates a first magnetic field at a first portion of the first layer <NUM> and the first portion flux biases qubit <NUM> (and therefore are associated with qubit <NUM>).

Hereinafter, the group of a qubit-specific coil, qubit-specific portion, and the corresponding qubit is referred to as an "Q group". An embodiment forms and positions such a qubit-specific coil relative to the corresponding portion of the first layer in such a manner that the magnetic field lines from the qubit-specific coil interact mainly with the corresponding portion and any magnetic interference with adjacent portions corresponding to other qubit-specific coils is maintained within an acceptable tolerance limit. An embodiment forms and positions such a qubit-specific portion relative to the corresponding qubit in such a manner that the magnetic field lines form the qubit-specific portion interact mainly with the corresponding qubit and any magnetic interference with adjacent qubits is maintained within an acceptable tolerance limit.

Each coil is optionally mounted on platform <NUM>, which is a separate removable platform, e.g., a separate PCB. Platform <NUM> is usable to position each coil relative to first layer <NUM> in a movable manner, removable manner, or both. For example, in one embodiment, one coil may be moved or repositioned relative to the first layer, e.g., for improving the magnetic interaction with a portion of the first layer, reducing undesirable interference with a second portion of the first layer, or some combination of these and other objectives.

First layer <NUM> is configured to act as a permanent magnet in response to exposure to an external magnetic field generated by the coils and cooling below a critical temperature of the first layer <NUM>. First layer <NUM> generates magnetic flux, which pass through - or threads - the superconducting loop of a qubit - which includes the inductance of a Josephson junction. The flux threading through the loop of the qubit causes a change in the inductance of the Josephson junction, which in turn results in a change in the resonance frequency of the qubit loop. Operating in this manner, a portion of first layer <NUM> interacts with qubit <NUM> in a manner to cause a substantial (greater than the threshold) amount of change or shift in qubit <NUM>'s frequency. In an embodiment, a second portion of first layer <NUM> operates relative to qubit <NUM> in a similar manner.

The depicted orientation of <FIG>, which shows the qubit-specific coils <NUM>-<NUM> positioned below qubits <NUM>-<NUM>, respectively, is a preferred orientation but is not intended to be limiting. As will become apparent from this disclosure, a qubit-specific coil can be oriented relative to the corresponding qubit in other orientations as well to achieve the qubit-specific frequency shifting effect on corresponding qubits. Different orientations of coils and combinations of (multiple) coils yield different amounts of fluxes ranging from significant to negligible. While some orientations might be useful in presently available superconducting Q-processor implementations, other orientations might find utility in other potential quantum devices which employ non-superconducting qubits.

Furthermore, in one embodiment, the magnetic flux of each qubit-specific coil is independently and dynamically controlled by adjusting the current supplied to the qubit-specific coil through a dedicated pair of contacts for that qubit-specific coil. In an embodiment, each qubit-specific coil is switched off after the first layer <NUM> is cooled at or below the critical temperature. In an embodiment, chip <NUM> is removed after the first layer <NUM> is cooled at or below the critical temperature. In another embodiment, chip <NUM> remains in place, but coils on chip <NUM> are no longer biased after the first layer <NUM> is cooled at or below the critical temperature.

Without implying that any particular embodiment provides any specific advantage or property, some of the advantages or properties that may be realized from implementing an embodiment in a specific manner include but are not limited to: <NUM>- each coil is independent from other coils allowing the entire plurality of qubits to be tuned at the same time; <NUM>- each coil primarily flux-biases one portion of the first layer; <NUM>- first layer can be cooled below critical temperature; <NUM>- chip <NUM> can be held in thermal equilibrium; and <NUM>- chip <NUM> can be removed or coils <NUM>-<NUM> switched off while first layer <NUM> acts as permanent magnet.

Different quantum processing applications can have different requirements for flux-biasing the qubits. In some implementations, magnetic field biasing may have to be applied perpendicularly to the plane of superconducting qubits. In some other implementations, magnetic field biasing may have to be applied in parallel to the plane of superconducting qubits or other quantum devices. Such other requirements and implementations are contemplated within the scope of the illustrative embodiments. The coils in Q groups of an embodiment can be oriented differently relative to their corresponding portions of the superconducting material. The portions in Q groups of an embodiment can be oriented differently relative to their corresponding qubits. Furthermore, in one embodiment, a coil can have a one-to-one correspondence with a qubit; in another embodiment, a coil can have a one-to-n correspondence with a plurality of qubits; in another embodiment, n coils can have an n-to-one correspondence with a qubit where several coils correspond to a single qubit; in another embodiment, n coils can have an n-to-m correspondence with qubits where a set of n coils correspond to a set of m qubits. In another embodiment, a coil can have a zero-to-one correspondence with a qubit where no coil corresponds to certain qubits on a chip. A group of four coils can provide full vector control of the magnetic field at the location of the qubit, allowing to set all three spatial vector components (i.e., the magnitude and direction) of the magnetic field at the specific location of the corresponding qubit.

As can be seen from the variety of configurations disclosed, each qubit can be independently controlled for resonance frequency shift. Furthermore, the shift can be statically set or iteratively changed for an individual qubit on a multi-qubit chip. Additionally, qubits and coils can be oriented and grouped differently relative to one another to achieve the shifts, giving a variety of implementation alternatives in space-constrained implementations.

With reference to <FIG>, this figure depicts a cross-section of an example configuration of a qubit tuning device in accordance with an illustrative embodiment. Configuration <NUM> depicts chip <NUM> comprising a qubit <NUM>, chip <NUM> comprising a first layer <NUM>, and chip <NUM> comprising a coil <NUM>. In an embodiment, chip <NUM> is disposed between chip <NUM> and chip <NUM>. First layer <NUM> comprises a material that exhibits superconductivity in a portion of the cryogenic temperature range. In an embodiment, first layer <NUM> comprises a material that exhibits superconductivity in a temperature range of about <NUM>-<NUM> Kelvin, inclusive of both ends of the temperature range. For example, first layer <NUM> may be formed using a Type II superconductor material. In an embodiment, first layer <NUM> is disposed on a surface of chip <NUM> facing chip <NUM>. In an embodiment, coil <NUM> is disposed on a surface of chip <NUM> facing away from first layer <NUM>.

With reference to <FIG>, this figure depicts a cross-section of an example configuration of a qubit tuning device in accordance with an illustrative embodiment. Configuration <NUM> depicts chip <NUM> comprising a qubit <NUM>, chip <NUM> comprising a first layer <NUM>, and chip <NUM> comprising a coil <NUM>. Configuration <NUM> operates in a similar manner as configuration <NUM> in <FIG> and configuration <NUM> in <FIG>. In an embodiment, first layer <NUM> is disposed on a surface of chip <NUM> facing qubit <NUM>. In an embodiment, coil <NUM> is disposed on a surface of chip <NUM> facing away from first layer <NUM>.

With reference to <FIG>, this figure depicts a cross-section of an example configuration of a qubit tuning device in accordance with an illustrative embodiment. Configuration <NUM> depicts chip <NUM> comprising a qubit <NUM>, chip <NUM> comprising a first layer <NUM>, and chip <NUM> comprising a coil <NUM>. Configuration <NUM> operates in a similar manner as configuration <NUM> in <FIG> and configuration <NUM> in <FIG>. In an embodiment, first layer <NUM> is disposed on a surface of chip <NUM> facing coil <NUM>. In an embodiment, coil <NUM> is disposed on a surface of chip <NUM> facing qubit <NUM>.

With reference to <FIG>, this figure depicts a cross-section of an example configuration of a qubit tuning device in accordance with an illustrative embodiment. Configuration <NUM> depicts chip <NUM> comprising a qubit <NUM>, chip <NUM> comprising a first layer <NUM> and a second layer <NUM>, and chip <NUM> comprising a coil <NUM>. Configuration <NUM> operates in a similar manner as configuration <NUM> in <FIG> and configuration <NUM> in <FIG>. In an embodiment, chip <NUM> is disposed between chip <NUM> and chip <NUM>. First layer <NUM> comprises a material that exhibits superconductivity in a portion of the cryogenic temperature range. In an embodiment, first layer <NUM> comprises a material that exhibits superconductivity in a temperature range of about <NUM>-<NUM> Kelvin, inclusive of both ends of the temperature range. For example, first layer <NUM> may be formed using a Type II superconductor material. In an embodiment, first layer <NUM> is disposed on a surface of chip <NUM> facing chip <NUM>. In an embodiment, coil <NUM> is disposed on a surface of chip <NUM> facing away from first layer <NUM>.

Second layer <NUM> comprises a material that exhibits superconductivity in a portion of the cryogenic temperature range. In an embodiment, second layer <NUM> comprises a material that exhibits superconductivity in a temperature range of about <NUM>-<NUM> Kelvin, inclusive of both ends of the temperature range. For example, second layer <NUM> may be formed using a Type II superconductor material. In an embodiment, second layer <NUM> is disposed on a surface of chip <NUM> facing chip <NUM>.

Coil <NUM> is configured to generate a magnetic field acting at the first layer <NUM> and the second layer <NUM>. In an embodiment, a plurality of coils are configured to generate a magnetic field acting at the first layer <NUM> and the second layer <NUM>. For example, a plurality of coils may be configured to generate a uniform magnetic field at the first layer <NUM> and the second layer <NUM>.

With reference to <FIG>, this figure depicts a cross-section of an example configuration of a qubit tuning device in accordance with an illustrative embodiment. Configuration <NUM> depicts chip <NUM> comprising a qubit <NUM>, chip <NUM> comprising a first layer <NUM> and a second layer <NUM>, and chip <NUM> comprising a coil <NUM>. Configuration <NUM> operates in a similar manner as configuration <NUM> in <FIG> and configuration <NUM> in <FIG>. In an embodiment, chip <NUM> is disposed between chip <NUM> and chip <NUM>. In an embodiment, coil <NUM> is disposed on a surface of chip <NUM> facing chip <NUM>.

With reference to <FIG>, this figure depicts a cross-section of an example configuration of a qubit tuning device in accordance with an illustrative embodiment. Configuration <NUM> depicts chip <NUM> comprising a qubit <NUM> and first layer <NUM>, and chip <NUM> comprising a coil <NUM>. Configuration <NUM> operates in a similar manner as configuration <NUM> in <FIG> and configuration <NUM> in <FIG>. In an embodiment, qubit <NUM> is formed and configured on a first surface of chip <NUM>. In an embodiment, chip <NUM> is disposed above chip <NUM>. In an embodiment, first layer <NUM> is disposed on an opposite surface of chip <NUM> from qubit <NUM>. In an embodiment, coil <NUM> is disposed on a surface of chip <NUM> facing first layer <NUM>.

With reference to <FIG>, this figure depicts a cross-section of an example configuration of a qubit tuning device in accordance with an illustrative embodiment. Configuration <NUM> depicts chip <NUM> comprising a qubit <NUM> and first layer <NUM>, and chip <NUM> comprising a coil <NUM>. Configuration <NUM> operates in a similar manner as configuration <NUM> in <FIG> and configuration <NUM> in <FIG>. In an embodiment, qubit <NUM> is formed and configured on a first surface of chip <NUM>. In an embodiment, first layer <NUM> is disposed on an opposite surface of chip <NUM> from qubit <NUM>. In an embodiment, coil <NUM> is disposed on a surface of chip <NUM> facing away from first layer <NUM>.

With reference to <FIG>, this figure depicts a cross-section of an example configuration of a qubit tuning device in accordance with an illustrative embodiment. Configuration <NUM> depicts chip <NUM> comprising a qubit <NUM> and first layer <NUM>, and chip <NUM> comprising a coil <NUM>. Configuration <NUM> operates in a similar manner as configuration <NUM> in <FIG> and configuration <NUM> in <FIG>. In an embodiment, qubit <NUM> is formed and configured on a first surface of chip <NUM>. In an embodiment, chip <NUM> is disposed below chip <NUM>. In an embodiment, first layer <NUM> is disposed on an opposite surface of chip <NUM> from qubit <NUM>. In an embodiment, coil <NUM> is disposed on a surface of chip <NUM> facing away from first layer <NUM>.

With reference to <FIG>, this figure depicts a cross-section of an example configuration of a qubit tuning device in accordance with an illustrative embodiment. Configuration <NUM> depicts chip <NUM> comprising a qubit <NUM> and first layer <NUM>, and chip <NUM> comprising a coil <NUM>. Configuration <NUM> operates in a similar manner as configuration <NUM> in <FIG> and configuration <NUM> in <FIG>. In an embodiment, qubit <NUM> is formed and configured on a first surface of chip <NUM>. In an embodiment, chip <NUM> is disposed below chip <NUM>. In an embodiment, first layer <NUM> is disposed on an opposite surface of chip <NUM> from qubit <NUM>. In an embodiment, coil <NUM> is disposed on a surface of chip <NUM> facing chip <NUM>.

With reference to <FIG>, this figure depicts a cross-section of an example configuration of a qubit tuning device in accordance with an illustrative embodiment. Configuration <NUM> depicts chip <NUM> comprising a qubit <NUM> and chip <NUM> comprising a first layer <NUM> and a coil <NUM>. Configuration <NUM> operates in a similar manner as configuration <NUM> in <FIG> and configuration <NUM> in <FIG>. In an embodiment, first layer <NUM> is formed and configured on a first surface of chip <NUM>. In an embodiment, chip <NUM> is disposed below chip <NUM>. In an embodiment, coil <NUM> is disposed on an opposite surface of chip <NUM> from first layer <NUM>. In an embodiment, first layer <NUM> is disposed on a surface of chip <NUM> facing chip <NUM>.

With reference to <FIG>, this figure depicts a cross-section of an example configuration of a qubit tuning device in accordance with an illustrative embodiment. Configuration <NUM> depicts chip <NUM> comprising a qubit <NUM> and chip <NUM> comprising a first layer <NUM> and a coil <NUM>. Configuration <NUM> operates in a similar manner as configuration <NUM> in <FIG> and configuration <NUM> in <FIG>. In an embodiment, first layer <NUM> is formed and configured on a first surface of chip <NUM>. In an embodiment, chip <NUM> is disposed below chip <NUM>. In an embodiment, coil <NUM> is disposed on an opposite surface of chip <NUM> from first layer <NUM>. In an embodiment, first layer <NUM> is disposed on a surface of chip <NUM> facing away from chip <NUM>.

With reference to <FIG>, this figure depicts a cross-section of an example configuration of a qubit tuning device in accordance with an illustrative embodiment. Configuration <NUM> depicts chip <NUM> comprising a qubit <NUM>, chip <NUM> comprising a first layer <NUM>, and chip <NUM> comprising a coil <NUM>. Configuration <NUM> operates in a similar manner as configuration <NUM> in <FIG> and configuration <NUM> in <FIG>. In an embodiment, chip <NUM> is disposed between chip <NUM> and chip <NUM>.

The orientations of <FIG> are not intended to be limiting. From this disclosure, those of ordinary skill in the art will be able to conceive different orientations for qubit(s), layer(s), coil(s), and chips, as well as combinations of features from different configurations and the same are contemplated within the scope of the illustrative embodiments.

With reference to <FIG>, this figure depicts a block diagram of an example configuration of an apparatus for qubit tuning using magnetic fields in superconductors in accordance with an illustrative embodiment. Configuration <NUM> includes chip <NUM> and other components as may be needed in an implementation. Chip <NUM> is an example of a Q-processor comprising a plurality of qubits, e.g., qubit <NUM>.

Coils <NUM>, <NUM> are configured to generate a magnetic field acting at the first layer <NUM>. For example, coils <NUM>, <NUM> may be configured to generate a uniform magnetic field at the first layer <NUM>. As another example, coils <NUM>, <NUM> may be configured in a Helmholtz coil configuration.

Chip <NUM> includes a plurality of resistors <NUM> disposed on a surface opposite the first layer <NUM>. Each resistor is configured to heat a portion of the first layer <NUM> above the critical temperature of the first layer <NUM>. In an embodiment, each resistor is operated independently of other resistors on chip <NUM>. In an embodiment, each resistor corresponds to a separate portion of the first layer <NUM>. For example, each resistor can heat a portion of the first layer <NUM> associated with a different qubit on chip <NUM>.

First layer <NUM> is configured to act as a permanent magnet in response to exposure to an external magnetic field generated by the coils and cooling below a critical temperature of the first layer <NUM>. First layer <NUM> generates magnetic flux, which pass through - or threads - the superconducting loop of a qubit - which includes the inductance of a Josephson junction. The flux threading through the loop of the qubit causes a change in the inductance of the Josephson junction, which in turn results in a change in the resonance frequency of the qubit loop. Operating in this manner, a portion of first layer <NUM> interacts with qubit <NUM> in a manner to cause a substantial (greater than the threshold) amount of change or shift in qubit <NUM>'s frequency.

The depicted orientation of <FIG>, which shows the chip <NUM> positioned above chip <NUM>, respectively, is a preferred orientation but is not intended to be limiting. Different orientations yield different amounts of fluxes ranging from significant to negligible. While some orientations might be useful in presently available superconducting q-processor implementations, other orientations might find utility in other potential quantum devices which employ non-superconducting qubits.

Furthermore, in one embodiment, the heat generated by each resistor is independently and dynamically controlled by adjusting the current supplied to the resistor through a dedicated pair of contacts for that resistor. In an embodiment, each resistor is switched off after the magnetic field generated by coils <NUM>, <NUM> stabilizes and the portion of the first layer <NUM> heated by the resistor falls below a critical temperature. In an embodiment, the heated portion of first layer <NUM> is cooled to at or below the critical temperature to pin the generated magnetic field in the portion of the first layer <NUM>. In an embodiment, the process of heating above the critical temperature and cooling at or below the critical temperature is repeated for other portions of the first layer <NUM> using corresponding resistors. In an embodiment, the generated magnetic field is changed before heating a subsequent portion of the first layer <NUM> in order to tune a different qubit at a different frequency.

Without implying that any particular embodiment provides any specific advantage or property, some of the advantages or properties that may be realized from implementing an embodiment in a specific manner include but are not limited to: <NUM>- only one coil needed to generate magnetic field; and <NUM>- coil can be switched off while first layer acts as permanent magnet.

Different quantum processing applications can have different requirements for flux-biasing the qubits. In some implementations, magnetic field biasing may have to be applied perpendicularly to the plane of superconducting qubits. In some other implementations, magnetic field biasing may have to be applied in parallel to the plane of superconducting qubits or other quantum devices. Such other requirements and implementations are contemplated within the scope of the illustrative embodiments. A group of four locations of generated magnetic field (in first layer <NUM>) can provide full vector control of the magnetic field at the location of a qubit, enabling to set all three spatial vector components (i.e., the magnitude and direction) of the magnetic field at the specific location of the corresponding qubit.

As can be seen from the variety of configurations disclosed, each qubit can be independently controlled for resonance frequency shift. Furthermore, the shift can be statically set or iteratively changed for an individual qubit on a multi-qubit chip.

With reference to <FIG>, this figure depicts a cross-section of an example configuration of a qubit tuning device in accordance with an illustrative embodiment. Configuration <NUM> depicts chip <NUM> comprising a qubit <NUM>, chip <NUM> comprising a first layer <NUM> and a resistor <NUM>, and coils <NUM>-<NUM>. Configuration <NUM> operates in a similar manner as configuration <NUM> in <FIG>. In an embodiment, chip <NUM> is disposed below chip <NUM>. First layer <NUM> comprises a material that exhibits superconductivity in a portion of the cryogenic temperature range. In an embodiment, first layer <NUM> comprises a material that exhibits superconductivity in a temperature range of about <NUM>-<NUM> Kelvin, inclusive of both ends of the temperature range. For example, first layer <NUM> may be formed using a Type II superconductor material and may be a patterned film or a blanket film. In an embodiment, first layer <NUM> is disposed on a surface of chip <NUM> facing chip <NUM>. In an embodiment, resistor <NUM> is disposed on an opposite surface of chip <NUM> from first layer <NUM>.

Resistor <NUM> is configured to heat a portion of the first layer <NUM> above the critical temperature. In an embodiment, each resistor is configured to heat a separate portion of the first layer. Coils <NUM>-<NUM> are configured to generate a magnetic field acting at the first layer <NUM>. For example, coils may be configured to generate a uniform magnetic field at the first layer <NUM>.

With reference to <FIG>, this figure depicts a cross-section of an example configuration of a qubit tuning device in accordance with an illustrative embodiment. Configuration <NUM> depicts chip <NUM> comprising a qubit <NUM>, chip <NUM> comprising a first layer <NUM> and a resistor <NUM>, and coils <NUM>-<NUM>. Configuration <NUM> operates in a similar manner as configuration <NUM> in <FIG>. In an embodiment, chip <NUM> is disposed below chip <NUM>. In an embodiment, resistor <NUM> is embedded in chip <NUM>. In an embodiment, first layer <NUM> is disposed on a surface of chip <NUM> facing chip <NUM>.

With reference to <FIG>, this figure depicts a cross-section of an example configuration of a qubit tuning device in accordance with an illustrative embodiment. Configuration <NUM> depicts chip <NUM> comprising a qubit <NUM>, a first layer <NUM>, and a resistor <NUM>, and coils <NUM>-<NUM>. Configuration <NUM> operates in a similar manner as configuration <NUM> in <FIG> In an embodiment, qubit <NUM> is formed and disposed on a first surface of the chip <NUM>. In an embodiment, first layer <NUM> is disposed on an opposite surface of chip <NUM>. In an embodiment, resistor <NUM> is disposed on first layer <NUM>.

With reference to <FIG>, this figure depicts a cross-section of an example configuration of a qubit tuning device in accordance with an illustrative embodiment. Configuration <NUM> depicts chip <NUM> comprising a qubit <NUM>, a first layer <NUM>, and a resistor <NUM>, and coils <NUM>-<NUM>. Configuration <NUM> operates in a similar manner as configuration <NUM> in <FIG>. In an embodiment, qubit <NUM> is formed and disposed on a first surface of the chip <NUM>. In an embodiment, first layer <NUM> is disposed on an opposite surface of chip <NUM>. In an embodiment, resistor <NUM> is embedded in chip <NUM>.

The orientations of <FIG> are not intended to be limiting. From this disclosure, those of ordinary skill in the art will be able to conceive different orientations for qubit(s), layer(s), resistor(s), coil(s), and chips, as well as combinations of features from different figures, and the same are contemplated within the scope of the illustrative embodiments.

Laser <NUM> is configured to generate heat at a portion <NUM> of first layer <NUM>. Light source (e.g., laser) <NUM> is configured to locally heat a portion of the first layer <NUM> above the critical temperature of the first layer <NUM>. In an embodiment, a light absorbing layer (not shown) is placed on chip <NUM> on the chip face that the light impinges on. In an embodiment, a laser source generating the laser can be moved and positioned to target different portions of the first layer <NUM>. For example, laser <NUM> can heat a portion of the first layer <NUM> associated with a different qubit on chip <NUM>.

First layer <NUM> is configured to act as a permanent magnet in response to exposure to an external magnetic field generated by the coils and cooling below a critical temperature of the first layer <NUM>. First layer <NUM> generates magnetic flux, which pass through - or threads - the superconducting loop of a qubit - which includes the inductance of a Josephson junction. The flux threading through the loop of the qubit causes a change in the inductance of the Josephson junction, which in turn results in a change in the resonance frequency of the qubit that comprises the loop. Operating in this manner, a portion (or a group of portions) of first layer <NUM> interacts with qubit <NUM> in a manner to cause a substantial (greater than the threshold) amount of change or shift in qubit <NUM>'s frequency.

Furthermore, in one embodiment, the heat generated by the laser is independently and dynamically controlled. In an embodiment, the light source or laser <NUM> is switched off after the magnetic field generated by coils <NUM>, <NUM> stabilizes and the portion of the first layer <NUM> heated by the light beam or laser <NUM> falls below a critical temperature. In an embodiment, the heated portion of first layer <NUM> is cooled to at or below the critical temperature to pin the generated magnetic field in the portion of the first layer <NUM>. In an embodiment, the process of heating above the critical temperature and cooling at or below the critical temperature is repeated for other portions of the first layer <NUM> using light source or laser <NUM>. In an embodiment, the generated magnetic field is changed before heating a subsequent portion of the first layer <NUM> in order to tune a different qubit at a different frequency.

Different quantum processing applications can have different requirements for flux-biasing the qubits. In some implementations, magnetic field biasing may have to be applied perpendicularly to the plane of superconducting qubits. In some other implementations, magnetic field biasing may have to be applied in parallel to the plane of superconducting qubits or other quantum devices. Such other requirements and implementations are contemplated within the scope of the illustrative embodiments.

With reference to <FIG>, this figure depicts a cross-section of an example configuration of a qubit tuning device in accordance with an illustrative embodiment. Configuration <NUM> depicts chip <NUM> comprising a qubit <NUM>, chip <NUM> comprising a first layer <NUM>, and coils <NUM>, <NUM>. Configuration <NUM> operates in a similar manner as configuration <NUM> in <FIG>. In an embodiment, first layer <NUM> is formed and disposed on a first surface of chip <NUM>. In an embodiment, a light absorbing layer is deposited on top of the first layer <NUM>. In an embodiment, chip <NUM> is disposed below chip <NUM>. In an embodiment, coils <NUM>, <NUM> are configured to generate a magnetic field. In an embodiment, light beam or laser <NUM> is configured to heat a portion of the first layer <NUM>.

With reference to <FIG>, this figure depicts a cross-section of an example configuration of a qubit tuning device in accordance with an illustrative embodiment. Configuration <NUM> depicts chip <NUM> comprising a qubit <NUM>, a first layer <NUM>, and coils <NUM>, <NUM>. Configuration <NUM> operates in a similar manner as configuration <NUM> in <FIG>. In an embodiment, qubit <NUM> is formed and disposed on a first surface of chip <NUM>. In an embodiment, first layer <NUM> is formed and disposed on an opposite surface of chip <NUM> from qubit <NUM>. In an embodiment, a light absorbing layer is deposited on the surface of the first layer <NUM>. In an embodiment, coils <NUM>, <NUM> are configured to generate a magnetic field. In an embodiment, laser <NUM> is configured to heat a portion of the first layer <NUM>.

The orientations of <FIG> are not intended to be limiting. From this disclosure, those of ordinary skill in the art will be able to conceive different orientations for qubit(s), layer(s), light and laser source(s), coil(s), and chips, and the same are contemplated within the scope of the illustrative embodiments.

With reference to <FIG>, this figure depicts a flowchart of an example process for tuning a qubit in accordance with an illustrative embodiment. Process <NUM> can be implemented in a fabrication system, e.g., in a software application that operates the fabrication system, to cause the described operations.

The embodiment measures a set of qubits to determine a set of qubit frequencies (block <NUM>). In response to the determined set of qubit frequencies, the embodiment analyses the set of frequencies to determine frequency crowding (block <NUM>). In an embodiment, frequency crowding occurs when neighboring qubits on a Q-processor chip have resonance frequencies within a threshold frequency range. For example, a threshold frequency range is <NUM>. In an embodiment, the application identifies qubit candidates for tuning based on the frequency crowding analysis. If frequency crowding is present and qubit candidates are identified (YES path of block <NUM>), the application configures a superconducting material to produce a specific magnetic flux to cause a shift in the resonance frequency of a qubit (block <NUM>). Application returns to block <NUM> to determine additional instances of frequency crowding. The embodiment repeats block <NUM> as many times as may be needed to tune various qubits in a given implementation. If no frequency crowding is determined to occur (NO path of block <NUM>), the embodiment ends process <NUM> thereafter.

With reference to <FIG>, this figure depicts an example process of configuring a device for tuning a qubit in accordance with an illustrative embodiment. Process <NUM> can be implemented as block <NUM> in <FIG>.

When a need exists for a shift in a qubit's resonance frequency, the embodiment heats a portion of a superconducting material above a critical temperature (block <NUM>). For example, a resistor disposed on or adjacent to the superconducting material can heat a portion of the superconducting material above the critical temperature. As another example, a light source, such as a laser, can heat a portion of the superconducting material above the critical temperature. In an embodiment, a portion of a superconducting material is already above the critical temperature. In an embodiment, the entirety of the superconducting material is above a critical temperature. The application generates a magnetic field through the portion of the superconducting material above the critical temperature (block <NUM>). The application cools the portion of the superconducting material below the critical temperature while maintaining the applied magnetic field (block <NUM>). The embodiment ends process <NUM> thereafter.

When a need exists for a shift in a qubit's resonance frequency, the embodiment generates a magnetic field through a first portion of a superconducting material above a critical temperature (block <NUM>). For example, a plurality of coils can be configured to generate the magnetic field, the magnetic field comprising a superposition of the magnetic field generated by each individual coil. The application configures the magnetic field through the portion (block <NUM>). In an embodiment, the application configures the magnetic field by controlling vector components (magnitude and direction) of the magnetic field in three spatial dimensions at the portion of the superconducting material. For example, the application can adjust a position of the first portion of the superconducting material, adjust a current (magnitude and direction) through any of the coils, or other operations to configure the magnetic field generated by the plurality of coils. The application cools the first portion of the superconducting material below the critical temperature while maintaining the applied magnetic field (block <NUM>). The embodiment ends process <NUM> thereafter.

The circuit elements of the flux-biasing apparatus and connections thereto can be made of superconducting material. Examples of superconducting materials (at low temperatures, such as about <NUM>-<NUM> millikelvin (mK), or about <NUM>) include Niobium, Aluminum, Tantalum, etc. For example, the Josephson junctions are made of superconducting material, and their tunnel junctions can be made of a thin tunnel barrier, such as an aluminum oxide. The capacitors can be made of superconducting material separated by low-loss dielectric material. The transmission lines (i.e., wires) connecting the various elements can be made of a superconducting material.

Various embodiments of the present invention are described herein with reference to the related drawings. Alternative embodiments can be devised without departing from the scope of this invention. Although various connections and positional relationships (e.g., over, below, adjacent, etc.) are set forth between elements in the following description and in the drawings, persons skilled in the art will recognize that many of the positional relationships described herein are orientation-independent when the described functionality is maintained even though the orientation is changed. These connections and/or positional relationships, unless specified otherwise, can be direct or indirect, and the present invention is not intended to be limiting in this respect. Accordingly, a coupling of entities can refer to either a direct or an indirect coupling, and a positional relationship between entities can be a direct or indirect positional relationship. As an example of an indirect positional relationship, references in the present description to forming layer "A" over layer "B" include situations in which one or more intermediate layers (e.g., layer "C") is between layer "A" and layer "B" as long as the relevant characteristics and functionalities of layer "A" and layer "B" are not substantially changed by the intermediate layer(s).

Additionally, the term "illustrative" is used herein to mean "serving as an example, instance or illustration. " Any embodiment or design described herein as "illustrative" is not necessarily to be construed as preferred or advantageous over other embodiments or designs. The terms "at least one" and "one or more" are understood to include any integer number greater than or equal to one, i.e. one, two, three, four, etc. The terms "a plurality" are understood to include any integer number greater than or equal to two, i.e. two, three, four, five, etc. The term "connection" can include an indirect "connection" and a direct "connection.

References in the specification to "one embodiment," "an embodiment," "an example embodiment," etc., indicate that the embodiment described can include a particular feature, structure, or characteristic, but every embodiment may or may not include the particular feature, structure, or characteristic.

Claim 1:
A device comprising:
a first layer (<NUM>, <NUM>) configured to generate a magnetic field, the first layer comprising a material exhibiting superconductivity below a critical temperature of the material in a cryogenic temperature range; and
a qubit (<NUM>, <NUM>, <NUM>) of a quantum processor chip (<NUM>, <NUM>), wherein the first layer is configured to magnetically interact with the qubit such that a first magnetic flux of the first layer causes a first change in a first resonance frequency of the qubit by a first frequency shift value, further comprising:
a heating element (<NUM>) configured to heat a portion of the first layer above the critical temperature; and
a magnetic element configured to apply a magnetic field to the first layer.