Patent Description:
Many known magnetic memory devices, for example, magnetic random access memory (MRAM) devices, are storage elements that store information utilizing magnetic materials as the information storage medium. At least some of these known MRAM devices are configured as a layered stack, where at least a portion of the stack is fabricated through known deposition and templating methods. Many of these known MRAM devices include a magnetic tunneling junction (MTJ) that is typically a structure that includes three distinct layers, i.e., a magnetic reference layer and a magnetic free layer (sometimes referred to as a "storage layer") with an insulating tunneling barrier therebetween. When electric current is transmitted through the MRAM device, the resistance of the MTJ typically depends on the relative orientation of magnetization of the two magnetic layers, and the relative change in resistance is referred to as the tunnel magnetoresistance (TMR). In general, a higher TMR is preferred over a lower TMR for most applications.

The direction of the current flow through the stack is typically reversible. Specifically, the electrical conductivity features of the stack above and below the MTJ are used to drive current through the MTJ in a current-perpendicular-to-plane (CPP) direction. It is advantageous for such MTJs to have magnetic layers with perpendicular magnetic anisotropy (PMA) as smaller switching currents are required as compared to in-plane magnetized MTJs. In at least some known MTJs, the free layer is formed from a Heusler compound (or alloy). Such Heusler compounds are magnetic intermetallic substances that have a tetragonal crystal configuration such that they may exhibit a relatively large volume PMA, and a low magnetic moment that requires lower switching currents.

A system and method are provided for enhancing the tunnel magnetoresistance (TMR) a magnetic tunneling junction (MTJ) device with a Heusler layer in a magnetic random access memory (MRAM) stack.

In one aspect, a magnetic random access memory (MRAM) stack is presented. The MRAM device includes a first magnetic layer including a Heusler compound. The MRAM stack also includes one or more seed layers that include a multi-layer templating structure including a crystalline structure configured to template the Heusler compound and enhance a tunnel magnetoresistance (TMR) of the MRAM stack. The first magnetic layer is formed over the multi-layer templating structure. The multi-layer templating structure includes a layer of a first binary alloy including tungsten-aluminum (WAl), and a layer of a second binary alloy having a cesium-chloride (CsCl) structure. The second binary alloy overlays the first binary alloy. The desired increases in TMR are at least partially due to the enhancements to the spin polarization of the Heusler compound through improvement of the chemical ordering and/or crystallinity of the Heusler compound.

In another aspect, a method of fabricating a magnetic random access memory (MRAM) stack is presented. The method includes forming one or more seed layers that includes forming a multi-layer templating structure above a substrate. The multi-layer templating structure includes a crystalline structure configured to enhance a tunnel magnetoresistance (TMR) of the MRAM stack. The forming the multi-layer templating structure includes forming a layer of a first binary alloy including tungsten-aluminum (WAl), and forming a layer of a second binary alloy having a cesium-chloride (CsCl) structure. The second binary alloy overlays the first binary alloy. The method also includes forming a first magnetic layer including templating a Heusler compound through the multi-layer templating structure. The desired increases in TMR are at least partially due to the enhancements to the spin polarization of the Heusler compound through improvement of the chemical ordering and/or crystallinity of the Heusler compound.

In yet another aspect, a magnetic random-access memory (MRAM) array is presented. The MRAM array includes a plurality of bit lines and a plurality of corresponding complementary bit lines forming a plurality of bit line-complementary bit line pairs. The MRAM array also includes a plurality of word lines intersecting the plurality of bit line pairs at a plurality of cell locations. The MRAM array further includes a plurality of MRAM cells located at each cell location of the plurality of cell locations. Each MRAM cell of the plurality of MRAM cells is electrically connected to a corresponding bit line of the plurality of bit lines and selectively interconnected to a corresponding one of the plurality of the complementary bit lines under control of a corresponding one of the word lines of the plurality of word lines. Each MRAM cell of the plurality of MRAM cells includes a first magnetic layer including a Heusler compound. Each MRAM cell also includes one or more seed layers including a multi-layer templating structure including a crystalline structure configured to template the Heusler compound and enhance a tunnel magnetoresistance (TMR) of each MRAM cell of the plurality of MRAM cells. The first magnetic layer is formed over the multi-layer templating structure. The multi-layer templating structure includes a layer of a first binary alloy including tungsten-aluminum (WAl), and a layer of a second binary alloy having a cesium-chloride (CsCl) structure. The second binary alloy overlays the first binary alloy. The desired increases in TMR are at least partially due to the enhancements to the spin polarization of the Heusler compound through improvement of the chemical ordering and/or crystallinity of the Heusler compound.

In yet another aspect, a computer system is presented. The computer system includes one or more processing devices, and one or more memory devices communicatively and operably coupled to the one or more processing devices. At least one memory device of the one or more memory devices includes one or more magnetic random access memory (MRAM) devices. Each MRAM device of the one or more MRAM devices includes a first magnetic layer including a Heusler compound. Each MRAM device also includes one or more seed layers including a multi-layer templating structure including a crystalline structure configured to template the Heusler compound and enhance a tunnel magnetoresistance (TMR) of each MRAM device of the plurality of MRAM devices. The first magnetic layer is formed over the templating structure. The multi-layer templating structure includes a layer of a first binary alloy including tungsten-aluminum (WAl), and a layer of a second binary alloy having a cesium-chloride (CsCl) structure. The second binary alloy overlays the first binary alloy. The desired increases in TMR are at least partially due to the enhancements to the spin polarization of Heusler compound through improvement of the chemical ordering and/or crystallinity of the Heusler compound.

In yet another aspect, a magnetic random-access memory (MRAM) device is presented. The MRAM device includes a plurality of MRAM stacks. Each MRAM stack of the plurality of MRAM stacks includes a first magnetic layer including a Heusler compound. Each MRAM stack also includes one or more seed layers including a multi-layer templating structure including a crystalline structure configured to template the Heusler compound and enhance a tunnel magnetoresistance (TMR) of each MRAM stack of the plurality of MRAM stacks. The first magnetic layer is formed over the multi-layer templating structure. The multi-layer templating structure includes a layer of a first binary alloy including tungsten-aluminum (WAl), and a layer of a second binary alloy having a cesium-chloride (CsCl) structure. The second binary alloy overlays the first binary alloy. The desired increases in TMR are at least partially due to the enhancements to the spin polarization of Heusler compound through improvement of the chemical ordering and/or crystallinity of the Heusler compound.

The present Summary is not intended to illustrate each aspect of every implementation of, and/or every embodiment of the present disclosure. These and other features and advantages will become apparent from the following detailed description of the present embodiment(s), taken in conjunction with the accompanying drawings.

The drawings included in the present application are incorporated into, and form part of, the specification. They illustrate embodiments of the present disclosure and, along with the description, serve to explain the principles of the disclosure. The drawings are illustrative of certain embodiments and do not limit the disclosure.

While the present disclosure is amenable to various modifications and alternative forms, specifics thereof have been shown by way of example in the drawings and will be described in detail. It should be understood, however, that the intention is not to limit the present disclosure to the particular embodiments described.

Aspects of the present disclosure relate to enhancing the tunnel magnetoresistance (TMR) of a Heusler layer in a MRAM stack. While the present disclosure is not necessarily limited to such applications, various aspects of the disclosure may be appreciated through a discussion of various examples using this context.

It will be readily understood that the components of the present embodiments, as generally described and illustrated in the Figures herein, may be arranged and designed in a wide variety of different configurations. Thus, the following details description of the embodiments of the apparatus, system, method, and computer program product of the present embodiments, as presented in the Figures, is not intended to limit the scope of the embodiments, as claimed, but is merely representative of selected embodiments.

Reference throughout this specification to "a select embodiment," "at least one embodiment," "one embodiment," "another embodiment," "other embodiments," or "an embodiment" and similar language means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, appearances of the phrases "a select embodiment," "at least one embodiment," "in one embodiment," "another embodiment," "other embodiments," or "an embodiment" in various places throughout this specification are not necessarily referring to the same embodiment.

The illustrated embodiments will be best understood by reference to the drawings, wherein like parts are designated by like numerals throughout. The following description is intended only by way of example, and simply illustrates certain selected embodiments of devices, systems, and processes that are consistent with the embodiments as claimed herein.

As used herein, "facilitating" an action includes performing the action, making the action easier, helping to carry the action out, or causing the action to be performed. Thus, by way of example and not limitation, instructions executing on one processor might facilitate an action carried out by semiconductor processing equipment, by sending appropriate data or commands to cause or aid the action to be performed. Where an actor facilitates an action by other than performing the action, the action is nevertheless performed by some entity or combination of entities.

Many known magnetic memory devices, for example, magnetic random access memory (MRAM) devices, are storage elements that store information utilizing magnetic materials as the information storage medium. At least some of these known MRAM devices are configured as a layered stack, where at least a portion of the stack is fabricated through known deposition and templating methods. Referencing a stack configuration, the terms "up" and "down," "lower" and "upper," and "top" and "bottom" are frequently used. Many of these known MRAM devices include a magnetic tunneling junction (MTJ) that is typically a structure that includes three distinct layers, i.e., a magnetic reference layer and a magnetic free layer (sometimes referred to as a "storage layer") with an insulating tunneling barrier therebetween. When electric current is transmitted through the MRAM device, the resistance of the MTJ depends on the magnetic orientation of the two magnetic layers, and the relative change in resistance between the parallel and anti-parallel orientations of the magnetization is referred to as the tunnel magnetoresistance (TMR), which in some cases is expressed in units of percentage change. In most applications, a higher TMR is preferred over a lower TMR.

Some MTJs employ a spin-transfer torque (STT) effect, and are also non-volatile STT-MRAM devices that have lower power consumption advantages over charge-based memory devices, such as static RAM (SRAM) and dynamic RAM (DRAM). The STT effect facilitates the toggling of magnetic orientation of the free layer of the MTJ. More specifically, the magnetic moment of the reference layer is generally fixed, or pinned, in a particular direction. The free layer has a changeable magnetic moment and is used to store information with the data state of either a "<NUM>" or a "<NUM>. " The electrons that define an electric current have the intrinsic quantum mechanics property of spin that is associated with the spin angular momentum of the electrons. The electron spin will have one of two distinct quantum states, i.e., spin-up and spin-down. In general, an electric current is unpolarized, i.e., consisting of approximately <NUM>% spin-up electrons and approximately <NUM>% spin-down electrons. A spin-polarized current is one with more electrons of either spin state. By passing electrons through the fixed reference layer, a spin-polarized current is produced, where the current has a spin-polarized angular momentum. When this spin-polarized current is directed into the free layer, the polarized angular momentum is transferred to the free layer, thereby applying a torque to the free layer and changing, i.e., flipping (toggling or switching) the orientation of the respective magnetic field. Flipping the orientation of the magnetic field will flip the data state of the free layer. As described further herein, this description explains the change in magnetization of the free layer when it is anti-parallel to the reference layer, and to change the magnetization from the parallel to anti-parallel state, the direction of the electron flow is reversed.

The TMR is related to the spin polarization, i.e., typically high spin polarization leads to high TMR. High spin polarization, and thus high TMR, is desirable, since the higher TMR provides a higher ON/OFF ratio. The direction of the current flow through the stack is typically reversible. Specifically, the electrical conductivity features of the stack above and below the MTJ are used to drive current through the MTJ in a current-perpendicular-to-plane (CPP) direction. Therefore, it is advantageous for such MTJs, and more specifically, the magnetic layers, to have perpendicular magnetic anisotropy (PMA) as smaller switching currents are required as compared to in-plane magnetized MTJs. As such, for MTJs for MRAM applications, it is desirable that substantially all the magnetic elements have their moments perpendicular to the layer itself, i.e., magnetization perpendicular to the film plane and the PMA arising from the crystalline structure, with the magnetic moments of the magnetic layer perpendicular to the layer. For example, in the case of MTJs with a positive tunnel magnetoresistance (TMR), i.e., when a sufficient current is driven in a top-to-bottom CPP direction, where the free layer is above the tunnel barrier with the reference layer below the tunnel barrier, and, by convention, the current direction is opposite to the electron flow direction and the initial state of the MTJ device is anti-parallel state, the free layer magnetic moment switches to be parallel to that of the reference layer, thereby defining a low resistance to current flow within the MTJ device. In the parallel configuration, the two magnetic layers have their magnetizations aligned with each other, and the resistance is typically lower in this state relative to the anti-parallel configuration, discussed as follows.

When a sufficient current is driven in the opposite direction (e.g., bottom to top), the free layer magnetic moment switches to be anti-parallel to that of the reference layer, thereby defining a high resistance to current flow within the MTJ device. In the anti-parallel state, the magnetic layers do not have their magnetizations aligned with each other, and the resistance is typically higher in this state relative to the parallel configuration. Therefore, the magnetic state of the MTJ is changed by passing an electric current through it. The current delivers spin angular momentum, so that once a threshold current is exceeded, the direction of the memory layer moment is switched. Accordingly, different current directions define different spin-polarized currents to generate different magnetic configurations corresponding to different magnetoresistance states and thus different logical states, e.g., a logical "<NUM>" and a logical "<NUM>" of the MTJ.

In at least some known MTJs, the free layer is formed from a Heusler compound (or alloy). Reference herein to Heusler or Heuslers without the term "half" is intended to reference full-Heuslers. Some Heusler compounds are magnetic intermetallic substances and a subset of these have a tetragonal configuration, a relatively large volume PMA, and a low magnetic moment that requires lower switching currents. One such Heusler compound is manganese-germanium (Mn<NUM>Ge). One known method of inducing PMA in a magnetic Heusler compound includes modifying the compound from an originally cubic crystalline configuration to a tetragonal crystalline configuration. Therefore, instead of having all three unit cell lattice parameters to be of the same length, if one of the lattice parameters is a little longer (or shorter), then, because of breaking of the crystal symmetry, the magnetization can be tuned to be perpendicular.

In the tetragonal case, for example, where some Heusler compounds have a tetragonal ground state (e.g., Mn<NUM>Ge), the compound shows PMA if the tetragonal axis of the compound is along the Z-axis, i.e., perpendicular to the film plane, where an out-of-plane lattice parameter is longer (or shorter) than the in-plane lattice parameters. In addition, it may be desirable that magnetic materials have volume PMA rather than surface (interfacial) PMA, as this enables scaling of devices to smaller sizes (typically smaller diameter). As device size is reduced, the devices become less thermally stable. However, for devices with volume anisotropy, it is advantageously possible to compensate for the lowering of thermal stability by increasing the thickness. The switching current is proportional to the product (Ms * V * Hk), where Ms is saturation magnetization, V is volume, and Hk is the anisotropy field. Low moment (i.e., low Ms) Heusler compounds need lower switching currents, unless the increase in Hk overwhelms the lower Ms. In the tetragonal case, the Z (vertical) axis is "stretched" (shrinking is also possible in alternative approaches) relative to the cubic case. Because of the bulk anisotropy, the magnetization tends to be perpendicular to the film (i.e., along the Z axis). If the Heusler layer is grown with a Z-axis perpendicular to the (x-y) plane of the film, on a suitable templating layer, the Heusler layer will have a moment which is perpendicular to the (x-y) plane of the film. Accordingly, the tetragonality and the associated PMA facilitates suitability for use in perpendicular MTJs.

One additional known method of enhancing the TMR of the Heusler compounds include using templating materials, such as materials with a CsCl-like (cesium-chloride-like) structure, i.e., a crystalline structure that defines a substantially continuous lattice with each cubical unit including a cesium atom surrounded by <NUM> chlorine atoms, i.e., one Cl atom at each corner of the cube, to further define a body-centered cubic (BCC) unit cell structure. The CsCl-like templating materials grown with (<NUM>) orientation have alternating layers of Cs and Cl. Two examples of such CsCl-like chemical templating layers (CTL) includes cobalt-aluminum (CoAl) and iridium-aluminum (IrAl) alloys, or together defining bi-layer templating materials. The templating materials may include a single layer structure and a multi-layered structure.

During fabrication of MRAM stacks, i.e., deposition and patterning of the various layers of the MRAM stacks (or pillars), a thin layer of a material coating may form on the outside wall of the pillar. This coating may provide an external conduction path that may shunt the tunnel barrier (e.g., the MgO layer as discussed further herein) is often removed through methods that include etching. However, depending on the materials used in the pillar, etching may not always be an option to effectively remove the coating. Therefore, in some instances, oxidizing the external coating to make the coating insulating is an option. However, Ir does not always oxidize well in these circumstances. Accordingly, a substitute for the IrAl layer is desired.

As described above, high TMR is desirable since the higher TMR provides a higher ON/OFF ratio and a resultant higher signal-to-noise ratio for determination of the MTJ device state. Therefore, there is a need to implement further upward improvements of the TMR of the Heusler compounds to enhance the performance of the MTJs to further reduce the power consumption of the MRAM devices. Accordingly, fabrication enhancements to the memory stacks to overcome the technical limitations present in the state-of-the-art memory stack fabrication processes to enhance the polarization of the electron spin is desirable.

Some known methods of enhancing uniaxial anisotropy in the full-Heusler compound Co<NUM>FeAl<NUM>Si<NUM> (CFAS) includes using various combinations of magnesium-oxide (MgO) and chromium (Cr) as seed layers (see the non-patent literature (NPL) titled "Magneto-optical characterization of single crystalline Co<NUM>FeAl<NUM>Si<NUM> thin films on MgO(<NUM>) substrates with Cr and MgO" authored by Ruiz-Calaforra et al. In addition, some known methods of enhancing the thermoelectric conversion properties of Heusler alloys, such as Fe<NUM>VAl, through an MgO substrate and a laminate with placement of a metal layer in between layers of zirconium oxide/yttrium oxide and MgO (see <CIT>). However, in both cases, the aforementioned Heusler compounds have a cubic structure and the magnetization thereof is parallel to the Heusler film, in contrast to the desired perpendicular magnetic anisotropy (PMA). Also, in some instances, the parallel magnetic anisotropy may be controlled (see <CIT>).

Some known methods of forming optional seed layers in non-Heusler devices include single layer structures or may comprise two, three, four, or more sublayers formed adjacent to each other. One or more of the single layer and the multiple sublayers of the seed layer comprise one or more of the following elements: B, Mg, Ti, Zr, Hf, V, Nb, Ta, Cr, Mo, W, Mn, Re, Fe, Ru, Os, Co, Rh, Ir, Ni, Pd, Pt, Cu, Ag, Au, Al, Si, Ge, Ga, O, N, and C. For example, the seed layer <NUM> may include a layer of MgO, Ta, Hf, W, Mo, Ru, Pt, Pd, NiCr, NiTa, NiTi, or TaNx. Alternatively, the seed layer <NUM> may include a bilayer structure (Ru/Ta) comprising a Ta sublayer formed adjacent to one of the magnetic layers and a Ru sublayer formed beneath the Ta sublayer. Other exemplary bilayer structures (bottom/top), such as Ta/Ru, Ta/Hf, Hf/Ta, Ta/W, W/Ta, W/Hf, Hf/W, Mo/Ta, Ta/Mo, Mo/Hf, Hf/Mo, Ru/W, W/Ru, MgO/Ta, Ta/MgO, Ru/MgO, Hf/MgO, and W/MgO, may also be used for the seed layer. Still alternatively, the seed layer may include a bilayer structure comprising an oxide sublayer, such as MgO, formed adjacent to one of the magnetic layers and an underlying, thin conductive sublayer, such as CoFeB which may be non-magnetic or amorphous or both. Additional seed sublayers may further form beneath the exemplary CoFeB/MgO seed layer to form other seed layer structures, such as but not limited to Ru/CoFeB/MgO, Ta/CoFeB/MgO, W/CoFeB/MgO, Hf/CoFeB/MgO, Ta/Ru/CoFeB/MgO, Ru/Ta/CoFeB/MgO, W/Ta/CoFeB/MgO, Ta/W/CoFeB/MgO, W/Ru/CoFeB/MgO, Ru/W/CoFeB/MgO, Hf/Ta/CoFeB/MgO, Ta/Hf/CoFeB/MgO, W/Hf/CoFeB/MgO, Hf/W/CoFeB/MgO, Hf/Ru/CoFeB/MgO, Ru/Hf/CoFeB/MgO, Ta/W/Ru/CoFeB/MgO, Ta/Ru/W/CoFeB/MgO, and Ru/Ta/Ru/CoFeB/MgO. Still alternatively, the seed layer may include a multilayer structure formed by interleaving seed sublayers of a first type with seed sublayers of a second type. One or both types of the seed sublayers may comprise one or more ferromagnetic elements, such as Co, Fe, and Ni. For example, the seed layer may be formed by interleaving layers of Ni with layers of a transition metal, such as but not limited to Ti, Zr, Hf, V, Nb, Ta, Cr, Mo, W, or any combination thereof. One or both types of seed sublayers may be amorphous or non-crystalline. For example, the first and second types of sublayers may respectively be made of Ta and CoFeB, both of which may be amorphous (see <CIT>).

Some known methods of manufacturing a STT-MRAM device with a MTJ include placing a layer of tantalum (Ta) below a cobalt/ nickel [CoNi]x layer for obtaining a perpendicular magnetic anisotropy and using high pressure argon to prevent damage to the interface between the Co and Ni (see <CIT>). Yet another known method of manufacturing a STT-MRAM device with a MTJ for obtaining a perpendicular magnetic anisotropy with a free layer includes forming a stack with a sequence of materials that includes a substrate, a lower electrode, a first buffer layer, a seed layer, a composite exchangeable ferromagnetic layer, a capping layer, a pinned layer, a tunnel barrier, a free layer, a second buffer layer, and an upper electrode. The seed layer may be formed of tantalum (Ta), ruthenium (Ru), titanium (Ti), palladium (Pd), platinum (Pt), magnesium (Mg), cobalt (Co), or an alloy thereof. Preferably, the seed layer <NUM> may be formed of platinum (Pt), and may be formed to a thickness of <NUM> to <NUM> (see <CIT>).

Yet another known method of manufacturing a STT-MRAM device with a MTJ for obtaining a perpendicular magnetic anisotropy with a free layer includes forming a stack with a sequence of materials that includes a substrate, a lower electrode, a buffer layer, a seed layer, a free layer, a tunnel barrier, a pinned layer, a capping layer, a composite exchangeable magnetic layer, and an upper electrode, where the free layer, the tunnel barrier, and the pinned layer form a magnetic tunnel junction. The seed layer may be formed of at least two layers, for example, a laminate structure of the first seed layer and the second seed layer. The first and second seed layers may be formed of a polycrystalline material. In addition, the first seed layer is formed of a material capable of self-crystallization at bcc (body center cubic), and the second seed layer is formed of a material having a bcc structure. For example, the first seed layer may be formed of magnesium oxide (MgO), aluminum oxide (Al<NUM>O<NUM>), silicon oxide (SiO<NUM>), tantalum oxide (Ta<NUM>O<NUM>), silicon nitride (SiNx) and may be preferably formed of magnesium oxide. In addition, the second seed layer <NUM> may be formed of, for example, tungsten (W) (see <CIT>).

A known spin transfer torque (STT) device has a free ferromagnetic layer that includes a Heusler alloy layer and a template layer beneath and in contact with the Heusler alloy layer. The template layer may be a ferromagnetic alloy comprising one or more of Co, Ni and Fe and the element X, where X is selected from one or more of Ta, B, Hf, Zr, W, Nb and Mo. A CoFe nanolayer may be formed below and in contact with the template layer. The STT device may also be a STT in-plane or perpendicular magnetic tunnel junction (MTJ) cell for magnetic random access memory (MRAM) (see <CIT>). Other examples of prior art may be found in documents <CIT>; "<NPL>); <CIT>.

Referring to <FIG>, a block schematic diagram is presented illustrating a spin-transfer torque (STT) switchable magnetic random access memory (MRAM) stack <NUM> (referred to as the MRAM stack <NUM> herein), in accordance with some embodiments of the present disclosure. For purposes of clarity, the components illustrated in <FIG> are not drawn to scale. In some embodiments, the MRAM stack <NUM> is approximately <NUM> nanometers (nm) in height, where, in general, the height is a non-limiting factor with respect to performance thereof, and, therefore, the MRAM stack <NUM> has any height that enables operation as described herein. As used herein, "in-plane" is substantially within or parallel to the plane of one or more of the layers of a magnetic tunnel junction. Conversely, "perpendicular" and "perpendicular-to-plane" corresponds to a direction that is substantially orthogonal to one or more of the layers of the magnetic tunnel junction. The method and system are also described in the context of certain alloys. However, unless otherwise specified, these listings of alloys are non-limiting, and if specific concentrations of the alloy are not mentioned, any stoichiometry that enables operation of the embodiments of the MRAM stack <NUM> as described herein that is not inconsistent with such embodiments may be used.

Also referring to <FIG>, a simplified block schematic diagram is presented illustrating portions of the MRAM stack <NUM> (shown as the MRAM stack <NUM> in <FIG>) and the respective magnetic moments, in accordance with some embodiments of the present disclosure. Similar components in both <FIG> and <FIG> have similar numbering.

In one or more embodiments, the MRAM stack <NUM> includes a silicon-based substrate layer <NUM> (shown as "Substrate <NUM>" in <FIG>) that is typically held at approximately room temperature, i.e., at approximately <NUM> degrees Celsius (°C) to approximately <NUM>. The substrate layer <NUM> is configured to provide the proper electrical conductivity for the MRAM stack <NUM> as described further herein. In some embodiments, the substrate layer <NUM> includes one or more of silicon oxide (SiO<NUM>), tantalum (Ta), and ruthenium (Ru). In some embodiments, the Si/SiO<NUM> portion (not shown) of the substrate layer <NUM> has any thickness, the Ta portion (not shown) of the substrate layer <NUM> is approximately <NUM> angstroms (Å) in thickness, and the Ru portion (not shown) of the substrate layer <NUM> is approximately <NUM>Å in thickness, where the thicknesses are presented in the vertical direction in <FIG>. In some embodiments, the thicknesses of the Si, SiO<NUM>, Ta, and Ru portions of the substrate layer <NUM> are any values that enable operation of the MRAM stack <NUM> as described herein.

In at least some embodiments, the MRAM stack <NUM> includes a plurality of seed (chemical templating) layers <NUM> (shown as <NUM> in <FIG>), at least some that are deposited at approximately room temperature. In some embodiments, the seed layers <NUM> include a lower Ta layer <NUM> with a thickness of approximately <NUM>Å to approximately <NUM>Å that is formed to extend over the substrate layer <NUM>, and with a thickness to extend in the vertical direction. In some embodiments, the lower Ta layer <NUM> is not a portion of the seed layers <NUM>. In addition, in some embodiments, the MRAM stack <NUM> includes a lower amorphous cobalt-iron-boron alloy (CoFeB) layer <NUM> formed to extend over the lower Ta layer <NUM>, and with a thickness to extend in the vertical direction, at approximately room temperature. In at least some embodiments, the CoFeB layer <NUM> is structured such that approximately <NUM>% of the atoms in the compound are a CoFe alloy and approximately <NUM>% of the atoms are boron, and is herein referred to as (CoFe)<NUM>B<NUM>. The boron (B) content of the lower (CoFe)<NUM>B<NUM> <NUM> layer is not restricted to approximately <NUM>% but can be varied and is typically in the range from approximately <NUM>% to approximately <NUM>%. This (CoFe)<NUM>B<NUM> layer <NUM> is non-magnetic, at least partially as a consequence of it being ultra-thin. In some embodiments, the lower (CoFe)<NUM>B<NUM> layer <NUM> has a thickness of approximately <NUM>Å. In some embodiments, the lower (CoFe)<NUM>B<NUM> layer <NUM> is not a portion of the seed layers <NUM>. In some embodiments, other known amorphous materials are substituted for the lower (CoFe)<NUM>B<NUM> layer <NUM>.

Further, in at least some embodiments, the seed layers <NUM> include a manganese nitride (MnxN) layer <NUM> that is formed to extend over the lower (CoFe)<NUM>B<NUM> layer <NUM>, and with a thickness to extend in the vertical direction, at approximately room temperature. In some embodiments, x (the number of Mn atoms) generally has a value within a range of approximately <NUM> to approximately <NUM>. In some embodiments, x generally has a value of at least <NUM> and not more than <NUM>. In some embodiments, the MnxN is deposited by reactive sputtering from a Mn target with a sputter gas containing an Ar-N<NUM> mixture with the Ar-to-N<NUM> ratio of approximately <NUM>:<NUM>. In some embodiments, the MnxN layer <NUM> has a thickness of approximately <NUM>Å to approximately <NUM>Å. In some embodiments the MnxN layer <NUM> is formed with the desired Miller indices directional value of (<NUM>) for the orientation, i.e., the planes of the atoms in the crystalline structure are oriented to form successive layers of atoms that sequentially extend in the vertical direction (see <FIG>).

The MnxN layer <NUM> facilitates forming, i.e. depositing, a CsCl-like chemical templating layer (CTL), or more specifically, a binary alloy with CsCl structure as represented by A<NUM>-xEx, where A is a transition metal element and E is a main group element. In some embodiments, A is cobalt (Co) and E includes at least one other element that includes aluminum (Al), with x being in a range from <NUM> to <NUM>. Therefore, at least one strongly-textured crystalline cobalt-aluminum (CoAl) layer (two are shown in <FIG>, i.e., a first CoAl layer <NUM> and a second CoAl layer <NUM>), as discussed further herein, above the MnxN layer <NUM>, thereby defining a (<NUM>) texture of the CoAl. The amorphous lower (CoFe)<NUM>B<NUM> layer <NUM> facilitates breaking any texture of the underlying layers, i.e., the MnxN layer <NUM> grows over the (CoFe)<NUM>B<NUM> layer <NUM> with the (<NUM>) orientation, thereby facilitating directional and texture values of (<NUM>) in the layers above the MnxN layer <NUM>. While it is important that the (CoFe)<NUM>B<NUM> be amorphous, the composition of the (CoFe)<NUM>B<NUM> is not critical, i.e., the Co-to-Fe ratio is not restricted to any particular range of values. Moreover, the B content of this amorphous CoFeB alloy may be varied. Accordingly, the MnxN layer <NUM> is employed for promoting ordered growth of the first and second CoAl layers <NUM> and <NUM>, respectively, and other layers above, where both of the ordered CoAl layers <NUM> and <NUM> have alternating planes of cobalt atoms and aluminum atoms.

In one or more embodiments, the seed layers <NUM> include the CoAl layer <NUM> that is formed to extend over MnxN layer <NUM>, and with a thickness to extend in the vertical direction, and deposited at approximately room temperature. In some embodiments, the thickness of the CoAl layer <NUM> is within a range between approximately <NUM>Å to approximately <NUM>Å, and in some embodiments, has a thickness of approximately <NUM>Å.

In at least some embodiments, a tungsten-aluminum (WAl) layer <NUM> is formed to extend over the first CoAl layer <NUM>, and with a thickness to extend in the vertical direction, where the WAl layer <NUM> also has a crystalline structure, and is deposited at approximately room temperature. In some embodiments, the WAl layer <NUM> is formed through co-sputtering of the W and Al targets to attain the desired composition of the WAl layer <NUM>. In some embodiments, the composition of the WAl layer <NUM> is W<NUM>-xAlx, with x being in a range from approximately <NUM> to approximately <NUM>. In some embodiments, the thickness of the WAl layer <NUM> is in the range from approximately <NUM>Å to <NUM>Å, and in some embodiments, has a thickness of approximately <NUM>Å. The second CoAl layer <NUM> is formed to extend over the WAl layer <NUM>, and with a thickness to extend in the vertical direction, and is deposited at approximately room temperature. In some embodiments, the thickness of the second CoAl layer <NUM> is within a range between approximately <NUM>Å to approximately <NUM>Å, and in some embodiments, has a thickness of approximately <NUM>Å. The WAl layer <NUM> and the second CoAl layer <NUM> together define a templating bi-layer <NUM> (discussed further herein). The templating layer is not necessarily limited to a bi-layered structure and in some embodiments is a single layer structure of CsCl-like chemical templating compounds, and in some embodiments is a multilayer structure of CsCl-like chemical templating compounds, such as, and without limitation, CoAl, CoGa, CoGe, IrAl, RuAl, and the like. As discussed further herein, the templating bi-layer <NUM> is employed to enhance the TMR of the MRAM stack <NUM>. In some embodiments, a layer of chromium (Cr) is use as a substitute for the second CoAl layer <NUM>.

In one or more embodiments, the seed layers <NUM> define a crystalline structure thereof that is employed to template a manganese-germanium layer, i.e., a Mn<NUM>Ge layer <NUM>, where the Mn<NUM>Ge layer <NUM> is a crystalline Heusler compound (or alloy). The Heusler compound Mn<NUM>Ge is described in its stoichiometric form here; however, it is possible to vary the stoichiometry over a limited range as described for some embodiments further herein. In some embodiments, the templating is executed through epitaxially growing the Mn<NUM>Ge layer <NUM>. The Mn<NUM>Ge layer <NUM> is sometimes referred to as the "Heusler layer" (shown as <NUM> in <FIG>). In addition, the Mn<NUM>Ge layer <NUM> is sometimes referred to as the lower magnetic layer of a magnetic tunneling junction (MTJ) <NUM>. Moreover, the Mn<NUM>Ge layer <NUM> is sometimes referred to as the "free layer. " Furthermore, the Mn<NUM>Ge layer <NUM> is sometimes referred to as the "storage layer. " Furthermore, the Mn<NUM>Ge layer <NUM> is sometimes referred to as the "switchable magnetic layer.

In general, the Mn<NUM>Ge layer <NUM> is a magnetic intermetallic substance that has a tetragonal crystal configuration, a relatively large volume perpendicular magnetic anisotropy (PMA), and a low magnetic moment (not shown in <FIG>) that requires lower switching currents. The Mn<NUM>Ge layer <NUM> is configured to drive current through the MTJ <NUM> in a current-perpendicular-to-plane (CPP) direction. In some embodiments, the thickness of the Mn<NUM>Ge layer <NUM> is less than approximately <NUM> nanometers (nm), i.e., less than approximately <NUM>Å. In some embodiments, the thickness of the Mn<NUM>Ge layer <NUM> is at least approximately <NUM> thick, i.e., approximately <NUM>Å. In some embodiments, the thickness of the Mn<NUM>Ge layer <NUM> is within a range of approximately <NUM>Å and approximately <NUM>Å. In some embodiments, the Heusler layer <NUM> may be a multilayer object that includes one or more Heusler compounds and/or other materials. In some embodiments, the Mn<NUM>Ge layer <NUM> is templated at approximately room temperature by the templating layer which may include the bi-layer <NUM> and then subsequently annealed at temperatures within the range between approximately <NUM> to approximately <NUM>, and in some embodiments, at approximately <NUM>.

While the one embodiment described above includes the use of Mn<NUM>Ge as the selected Heusler compound, there are a number of alternative Heusler compounds as well. In general, tetragonal Heusler compounds include Mn<NUM>Z, where Z= germanium (Ge), tin (Sn), and antimony (Sb), since they all have the relatively large volume PMA, and have a low magnetic moment. In some embodiments the composition is selected from Mn<NUM>-xGe, Mn<NUM>-xSn, and Mn<NUM>-xSb, with x being in a range from <NUM> to not more than <NUM>. In some embodiments, the Heusler compound is a ternary Heusler compound, e.g., selected from the manganese-cobalt-tin group including one of Mn<NUM>-xCo<NUM>-ySn, in which x ≤ <NUM> and y ≤ <NUM>. Moreover, in some embodiments, the Heusler compound is chosen from Mn<NUM>Al, Mn<NUM>Ga, Mn<NUM>In, Mn<NUM>FeSb, Mn<NUM>CoAl, Mn<NUM>CoGe, Mn<NUM>CoSi, Mn<NUM>CuSi, Mn<NUM>CoSn, Co<NUM>CrAl, Co<NUM>CrSi, Co<NUM>MnSb, and Co<NUM>MnSi. Further discussion on the use of Heusler compounds herein will be limited to Mn<NUM>Ge.

The cooperation of the MnxN layer <NUM>, the first CoAl layer <NUM>, the WAl layer <NUM>, and the second CoAl layer <NUM> enhances the value of the TMR for the MRAM stack <NUM>. In general, increasing the operational TMR of the MRAM stack <NUM> is at least partially through enhancing the spin polarization of the Mn<NUM>Ge layer <NUM>. As described above, the MnxN layer <NUM> is employed for promoting ordered growth of the first and second CoAl layers <NUM> and <NUM>, respectively.

The TMR of the bulk-like Mn<NUM>Ge layer <NUM>, with little to no engineering thereof, is limited by the compensation effect due to the structure of the Heusler material, i.e., the compensation in the tunnelling spin current polarization from atomic layer variations of the electrode surface termination at the tunnel barrier interface, where this is an inevitable consequence of ferrimagnets with layer-by-layer alternation of magnetization, and the spin polarizations of these layers compensate each other. The use of templating layers, such as the CoAl layer <NUM>, with an in-plane lattice constant a = <NUM>Å (<NUM> degrees in-plane rotated) determines tetragonal distortion of the Mn<NUM>Ge layer <NUM> so that the compensation effect is no longer applicable and the TMR is higher than observed for the bulk-like Mn<NUM>Ge films. As described above, the CoAl templating layer <NUM> needs to have the (<NUM>) orientation and texture for inducing the requisite PMA energy in the Heusler film. Also, as described above, this (<NUM>) orientation and texture of the CoAl layer <NUM> is achieved by deposition of the CoAl layer <NUM> on the MnxN layer <NUM>. The TMR of the Mn<NUM>Ge layer <NUM> is further enhanced through the addition of the WAl layer <NUM>, such that the combination of the CoAl layer <NUM> and the WAl layer <NUM>, as the templating bi-layer <NUM>, further enhances the TMR of the Mn<NUM>Ge layer <NUM>.

The TMR of a substance is the ratio of the difference in the electrical resistance between the anti-parallel state and the resistance of the parallel state to the resistance in the parallel state and is typically reported as a percentage. The TMR of the Mn<NUM>Ge layer <NUM> is measured when the thickness of the WAl layer <NUM> is varied between approximately <NUM>Å and approximately <NUM>Å with the thickness of the CoAl layer <NUM> held constant at approximately <NUM>Å. Similarly, the TMR of the Mn<NUM>Ge layer <NUM> is measured when the thickness of the CoAl layer <NUM> is varied between approximately <NUM>Å and approximately <NUM>Å with the thickness of the WAl layer <NUM> held constant at approximately <NUM>Å. Notably, in some embodiments, e.g., and without limitation, an improvement of the TMR values in excess of <NUM>%, including, in some instances, in excess of approximately <NUM>%, have been experienced with the thickness of the WAl layer <NUM> within a range of approximately <NUM>Å to approximately <NUM>Å (as compared to a range of approximately <NUM>Å to approximately <NUM>Å), and the thickness of the CoAl layer <NUM> at approximately <NUM>Å for both ranges of the WAl layer <NUM> thickness. The improvement of the TMR associated with the Mn<NUM>Ge Layer <NUM> is most likely due to the increased ordering of the Heusler compound therein.

In some embodiments, the MTJ <NUM> includes an optional polarization enhancement layer <NUM> (shown as <NUM> in <FIG>) that is configured to enhance the polarization of the different spin-polarized currents to further enhance the TMR of the MTJ <NUM>. The materials of the polarization enhancement layer <NUM> have one or more high spin polarization features where the materials include, without limitation, one or more of Fe, CoFe, and (CoFe)<NUM>B<NUM>. As shown in <FIG>, in some embodiments, the polarization enhancement layer <NUM> is positioned between the Mn<NUM>Ge layer <NUM> and a MgO layer <NUM> (discussed further herein). In some embodiments, the polarization enhancement layer <NUM> is positioned between the MgO layer <NUM> an upper (CoFe)<NUM>B<NUM> layer <NUM> (discussed further herein). In some embodiments, the polarization enhancement layer <NUM> is positioned on both sides of the MgO layer <NUM>.

In at least some embodiments, the MTJ <NUM> includes the MgO layer <NUM>, that is also referred to as the tunnel barrier <NUM> (shown as <NUM> in <FIG>), formed from crystalline MgO. In some embodiments, the MgO layer <NUM> is in direct contact with the Mn<NUM>Ge layer <NUM> (lower magnetic layer) and the upper (CoFe)<NUM>B<NUM> layer <NUM> (upper magnetic layer). Therefore, in such embodiments, the tunnel barrier is thereby positioned between, and in contact with, the first magnetic layer (i.e., the Mn<NUM>Ge layer <NUM>, or the lower magnetic layer) and the second magnetic layer (i.e., the upper (CoFe)<NUM>B<NUM> layer <NUM>, or the upper magnetic layer). In some embodiments, the MgO layer <NUM> is separated from one of the Mn<NUM>Ge layer <NUM> and the upper (CoFe)<NUM>B<NUM> layer <NUM> through the optional polarization enhancement layer <NUM>. The resistance of the MTJ device <NUM> across the MgO layer <NUM> is high if the magnetic moments of the Mn<NUM>Ge layer <NUM> and the upper (CoFe)<NUM>B<NUM> layer <NUM> are anti-parallel and low if such magnetic moments are parallel. In some embodiments, the MgO layer <NUM> is formed to extend directly over the Mn<NUM>Ge layer <NUM> in the vertical direction at approximately room temperature and in some embodiments, there is an optional polarization enhancement layer <NUM> therebetween (as shown in <FIG>). The thickness of the MgO layer <NUM> determines the RA of the MTJ device <NUM> and is typically in the range from approximately <NUM>Å to approximately <NUM>Å. In some embodiments, the thickness of the MgO layer <NUM> is approximately <NUM>Å.

In one or more embodiments, the tunnel barrier <NUM> is formed from MgAl<NUM>O<NUM> where the lattice spacing is tuned (engineered) by controlling the Mg-Al composition to result in better lattice matching with the Heusler compounds (as listed above), e.g., and without limitation, the composition of this tunnel barrier <NUM> can be represented as Mg<NUM>-zAl<NUM>+(<NUM>/<NUM>)zO<NUM>, where -<NUM> < z < <NUM>.

In at least some embodiments, the MTJ <NUM> includes the upper (CoFe)<NUM>B<NUM> layer <NUM> (shown as <NUM> in <FIG>) that is formed to extend over the tunnel barrier <NUM>, and with a thickness to extend in the vertical direction, at approximately room temperature. In some embodiments, the optional polarization enhancement layer <NUM> is positioned between the upper (CoFe)<NUM>B<NUM> layer <NUM> and the tunnel barrier <NUM>. In some embodiments, the upper (CoFe)<NUM>B<NUM> layer <NUM> has a thickness in a range from approximately <NUM>Å to <NUM>Å, and in some embodiments, with a value of approximately <NUM>Å. In some embodiments, the upper (CoFe)<NUM>B<NUM> layer <NUM> is a reference layer that defines a reference layer magnetic moment (not shown in <FIG>). The magnetic moment of the upper (CoFe)<NUM>B<NUM> layer <NUM> is generally fixed, or pinned, in a particular direction perpendicular-to-plane. Moreover, in some embodiments, the upper (CoFe)<NUM>B<NUM> layer <NUM> includes a bilayer of CoFeB compounds for different B content which ranges between approximately <NUM> to approximately <NUM>%. Therefore, the upper (CoFe)<NUM>B<NUM> layer <NUM> is sometimes referred to as the upper magnetic layer.

In some embodiments, the MRAM stack <NUM> includes an upper Ta layer <NUM> with a thickness of approximately <NUM>Å to approximately <NUM>Å that is formed to extend over the upper (CoFe)<NUM>B<NUM> layer <NUM>, and with a thickness to extend in the vertical direction, at approximately room temperature. In some embodiments, the upper (CoFe)<NUM>B<NUM> layer <NUM> is annealed at approximately <NUM>.

In some embodiments, the MRAM stack <NUM> includes an optional synthetic anti-ferromagnet (SAF) tri-layer <NUM> (shown as <NUM> in <FIG>) positioned to extend over the upper Ta layer <NUM>. In such embodiments, the Ta thickness is chosen to provide optimal magnetic coupling between the SAF tri-layer <NUM> and the upper (CoFe)<NUM>B<NUM> layer <NUM>. The SAF tri-layer <NUM> includes a lower cobalt/platinum (Co/Pt) layer <NUM> that includes three sequential bi-layers of approximately <NUM>Å of Co and approximately <NUM>Å of Pt, and a single layer of Co that is approximately <NUM>Å thick. The SAF tri-layer <NUM> also includes a Ru layer <NUM> on top of the Co/Pt layer <NUM> that is approximately <NUM>Å thick. The SAF tri-layer <NUM> further includes an upper Co/Pt layer <NUM> on top of the Ru layer <NUM> that includes a single layer of Co that is approximately <NUM>Å thick and also includes four sequential bi-layers of approximately <NUM>Å of Co and approximately <NUM>Å of Pt. The SAF tri-layer <NUM> facilitates stabilizing the magnetic moment of the upper (CoFe)<NUM>B<NUM> layer <NUM> (i.e., the reference electrode) to a high magnetic field thus making the coercivity of the upper (CoFe)<NUM>B<NUM> layer <NUM> significantly higher than the coercivity of the Mn<NUM>Ge layer <NUM> (the lower, switchable magnetic layer).

In one or more embodiments, the MRAM stack <NUM> includes a cap layer <NUM> (shown as <NUM> in <FIG>) that is formed from either Ru or a combination of Pt and Ru to extend over either the upper Ta layer <NUM> or the SAF tri-layer <NUM> in the vertical direction at approximately room temperature. In some embodiments, the cap layer <NUM> is formed from approximately <NUM>Å of Ru. Also, in some embodiments, the capping layer <NUM> includes one of, or compounds of more than one of, Mo, W, Ta, and Ru.

Referring to <FIG>, the magnetic layer <NUM> (shown as the upper (CoFe)<NUM>B<NUM> layer <NUM> in <FIG>) is shown with the respective magnetic moment <NUM>. The spin-transfer torque (STT) effect facilitates the switching of the MTJ <NUM> (shown as <NUM> in <FIG>). More specifically, the magnetic moment <NUM> of the magnetic layer <NUM> (also referred to as the upper reference layer and the upper (CoFe)<NUM>B<NUM> layer <NUM> (see <FIG>)) is generally fixed, or pinned, in a particular direction. The magnetic layer <NUM> has a perpendicular magnetic anisotropy (PMA) energy that exceeds the out-of-plane demagnetization energy. Consequently, the magnetic moment <NUM> is shown as perpendicular to plane. The magnetic moment <NUM> of the reference layer <NUM> is stable in the embodiment shown. Therefore, the magnetic moment <NUM> is shown as a single-headed arrow. Although shown in a particular direction (toward the top of the page), the magnetic moment <NUM> may be stable in another direction (e.g., toward the bottom of the page).

The lower free layer, i.e., the Heusler layer <NUM> (also referred to as the Mn<NUM>Ge layer <NUM> in <FIG> (the lower, switchable magnetic layer)) has a changeable magnetic moment <NUM>. In the embodiment shown, the Heusler layer <NUM> also has a PMA energy that exceeds the out-of-plane demagnetization energy. Consequently, the magnetic moment <NUM> is shown as perpendicular to plane. The magnetic moment <NUM> is programmed to be in one of multiple stable states. Therefore, the magnetic moment <NUM> is shown as dual-headed arrow. The Heusler layer <NUM> is used to store information with the data state of either a "<NUM>" or a "<NUM>," therefore the Heusler layer <NUM> is sometimes referred to as "the storage layer.

The electrons that define an electric current have the intrinsic quantum mechanics property of spin that is associated with the spin angular momentum of the electrons. To take advantage of the STT effect. the electron spin will have one of two distinct quantum states, i.e., spin-up and spin-down. In general, an electric current is unpolarized, i.e., consisting of approximately <NUM>% spin-up electrons and approximately <NUM>% spin-down electrons. A spin-polarized current is one with more electrons of either spin state. The electrical conductivity features of the MRAM stack <NUM> above and below the MTJ <NUM> are used to drive current through the MTJ <NUM> in a current-perpendicular-to-plane (CPP) direction. Therefore, such MTJs <NUM> having PMA are advantageous as they require smaller switching currents as compared to in-plane magnetized MTJs.

By passing a current, e.g., current <NUM> from the substrate <NUM> through the cap layer <NUM> and, therefore, through the fixed magnetic layer <NUM>, a spin-polarized current <NUM> is produced, where the spin-polarization is in the direction of the magnetic moment <NUM>, and where the spin-polarized current <NUM> has a polarized spin angular momentum. Note that, by convention, the electron flow direction is opposite to the current direction. When this spin-polarized current <NUM> is directed into the Heusler layer <NUM>, the polarized spin angular momentum is transferred to the Heusler layer <NUM> such that both magnetic layers, i.e., the fixed magnetic layer <NUM> and the Heusler layer <NUM> have the same orientation of the magnetic moment. As such, a torque is applied to the Heusler layer <NUM> thereby changing its magnetization direction from anti-parallel state to the parallel state if the current flow exceeds the threshold value, i.e., flipping the orientation of the respective magnetic field, i.e., the magnetic moment <NUM>. Flipping the orientation of the magnetic moment <NUM> from one direction of the arrow <NUM> to the opposite direction will flip the data state of the Heusler layer <NUM>, sometimes referred to "toggling the Heusler layer upward. " In the present case, the resulting orientation of the magnetic moment <NUM> of the Heusler layer <NUM> will be upward, i.e., parallel to that of the fixed magnetic moment <NUM>, thereby defining a low resistance to current flow in the Heusler layer <NUM>.

The direction of the current flow through the MRAM stack <NUM> is typically reversible, e.g., as shown by current <NUM>. By passing the current <NUM> from the cap layer <NUM> towards the substrate <NUM> and, therefore, through the fixed magnetic layer <NUM>, a spin-polarized current <NUM> is produced, where the spin-polarization is opposite to the direction of the magnetic moment <NUM>, and where the spin-polarized current <NUM> has a polarized spin angular momentum opposite to that for the spin-polarized current <NUM>. When this spin-polarized current <NUM> is directed into the Heusler layer <NUM>, the polarized spin angular momentum is transferred to the Heusler layer <NUM>, both magnetic layers, i.e., the fixed magnetic layer <NUM> and the Heusler layer <NUM> have opposite orientation of the magnetic moment. As such, a torque is applied to the Heusler layer <NUM> thereby changing its magnetization direction from the parallel state to the anti-parallel state if the current flow exceeds the threshold value, i.e., flipping the orientation of the respective magnetic field, i.e., the magnetic moment <NUM>. Flipping the orientation of the magnetic moment <NUM> from one direction of the arrow <NUM> to the opposite direction will flip the data state of the Heusler layer <NUM>, sometimes referred to "toggling the Heusler layer downward. " In the present case, the resulting orientation of the magnetic moment <NUM> of the will be downward, i.e., anti-parallel to that of the fixed magnetic moment <NUM>, thereby defining a high resistance to current flow in the Heusler layer <NUM>. Accordingly, different current directions define different spin-polarized currents to generate different magnetic configurations corresponding to different resistances and thus different logical states, e.g., a logical "<NUM>" and a logical "<NUM>" of the MTJ <NUM>.

Referring to <FIG>, a simplified block schematic diagram is presented illustrating portions of the MRAM stack <NUM> (shown as the MRAM stack <NUM> and <NUM> in <FIG> and <FIG>, respectively) and the respective magnetic moments, in accordance with some embodiments of the present disclosure. Similar components in <FIG>, <FIG>, and <FIG> have similar numbering, and the unaffected components of <FIG> retain the numbering from <FIG>.

In at least some embodiments, the MRAM stack <NUM> of <FIG> differs from the MRAM stack <NUM> of <FIG> in that the MTJ <NUM> is modified. Specifically, the Heusler layer <NUM> is the set reference layer with the set magnetic moment <NUM> and the magnetic layer <NUM> is the switchable magnetic layer with the switchable magnetic moment <NUM>, and therefore, the magnetic layer <NUM> assumes the role of the storage layer. As such, the directions of the spin-polarized current <NUM> and the spin-polarized current <NUM> are reversed from their counterparts of spin-polarized current <NUM> and the spin-polarized current <NUM>, respectively, from <FIG>. Otherwise, the operation of the MRAM stack <NUM> is substantially similar to that for the MRAM stack <NUM> (see <FIG>) subject to the reversal of the roles of the magnetic layer <NUM>/<NUM> and the Heusler layer <NUM>/<NUM> as indicated through the directions of the arrows for magnetic moments <NUM> and <NUM> in comparison with the magnetic moments <NUM> and <NUM>, respectively.

Accordingly, referring to <FIG> and <FIG>, regardless of the configuration of which magnetic layer is the storage layer and which magnetic layer is the reference layer, the desired increases in TMR is at least partially due to the enhancements to the spin polarization of the Heusler layer <NUM>.

Referring to <FIG>, a flowchart is presented illustrating a process <NUM> for fabricating <NUM> a MRAM stack <NUM> (see <FIG>), in accordance with some embodiments of the present disclosure. Also referring to <FIG>, one or more seed layers <NUM> are formed <NUM>, including forming <NUM> a multi-layer templating structure <NUM> that is not necessarily limited to a bi-layered structure and in some embodiments is a single layer structure and in some embodiments is a multilayer structure of CsCl-like chemical templating compounds, including a crystalline structure. In some embodiments, the forming <NUM> the multi-layer templating structure <NUM> includes positioning the multi-layer templating structure <NUM> above the substrate <NUM>. The multi-layer templating structure <NUM> includes a crystalline structure configured to enhance the tunnel magnetoresistance (TMR) of the MRAM stack <NUM>. The forming step <NUM> includes forming <NUM> a layer <NUM> of a first binary alloy including tungsten-aluminum (WAl), and forming <NUM> a layer of a second binary alloy having a cesium-chloride (CsCl) structure, wherein the second binary alloy overlays the first binary alloy, i.e., the CoAl layer <NUM> overlays the WAl layer <NUM>.

In at least some embodiments, the process <NUM> for fabricating <NUM> a MRAM stack <NUM> also includes forming <NUM> the first magnetic layer <NUM>. Forming <NUM> the first magnetic layer <NUM> includes templating <NUM> a Heusler compound through the templating structure <NUM>. The Heusler compound has a perpendicular magnetic anisotropy (PMA) energy exceeding an out-of-plane demagnetization energy, and is configured to enhance the TMR of the MRAM stack <NUM> through enhancement of the spin polarization of the Heusler compound. Moreover, the forming <NUM> the first magnetic layer <NUM> further includes templating <NUM> the Heusler compound over the templating structure <NUM>.

The process <NUM> for fabricating <NUM> a MRAM stack <NUM> further includes forming <NUM> a tunnel barrier <NUM> over the first magnetic layer <NUM>, and forming <NUM> a second magnetic layer <NUM> over the tunnel barrier <NUM>, thereby positioning the tunnel barrier <NUM> between, and in contact with, the first magnetic layer <NUM> and the second magnetic layer <NUM>. Additional details of the fabrication process <NUM> are presented in the discussion of the individual layers of the MRAM stack <NUM> with respect to <FIG>.

Referring to <FIG>, a block schematic diagram is presented illustrating a MRAM array <NUM>, in accordance with some embodiments of the present disclosure. Specifically, <FIG> presents an array <NUM> of MRAM cells <NUM>, where only three of the nine shown MRAM cells <NUM> are labeled for clarity. In some embodiments, the plurality of MRAM cells <NUM> are arranged in respective cell locations <NUM>. In some embodiments, each MRAM cell <NUM> includes one or more MRAM stacks <NUM> (see <FIG>). Each MRAM cell <NUM> is connected to a respective transistor <NUM> that controls reading and writing, where only three of the nine shown transistors <NUM> are labeled for clarity. In one or more embodiments, a word line <NUM> provides data to write to the MRAM cells <NUM>, while a bit line <NUM> and a bit line complement <NUM> read data from the MRAM cell <NUM>. In this manner, a large array <NUM> of MRAM cells <NUM> can be implemented on a single chip (not shown). An arbitrarily large number of MRAM cells <NUM> can be employed, within the limits of the manufacturing processes and design specifications.

In some embodiments, the operation of the MRAM array <NUM> includes writing data to a MRAM cell <NUM> includes passing a current (not shown) through the MRAM cell <NUM>. This current causes the direction of magnetization to switch between a parallel or anti-parallel state, which has the effect of switching between low resistance and high resistance states. Because this effect can be used to represent the subsets of ones and zeroes of digital information, the MRAM cells <NUM> can be used as a non-volatile memory (see <FIG>).

Also, referring to <FIG>, <FIG>, and <FIG>, passing the current in one direction through the MRAM cell <NUM> causes the magnetization of the free layer <NUM>/<NUM>/<NUM> to be parallel with that of the reference layer <NUM>/<NUM>/<NUM>, while passing the current in the opposite direction through the MRAM cell <NUM> causes the magnetization of the free layer <NUM>/<NUM>/<NUM> to be anti-parallel to that of the reference layer <NUM>/<NUM>/<NUM>. Reading the bit stored in a MRAM cell <NUM> involves applying a voltage (lower than that used for writing information) to the MRAM cell <NUM> to discover whether the cell offers high resistance to current ("<NUM>") or low resistance ("<NUM>").

In at least some embodiments, the plurality of bit lines <NUM> and a plurality of complementary bit lines <NUM> defines a plurality of bit line-complementary bit line pairs <NUM>. A plurality of word lines <NUM> intersect the plurality of bit line pairs <NUM> at a plurality of cell locations <NUM>. The plurality of MRAM cells <NUM> are located at one of each of the plurality of cell locations <NUM>. Each of the MRAM cells <NUM> is electrically connected to a corresponding bit line <NUM> and selectively interconnected to a corresponding one of the complementary bit lines <NUM> under control of a corresponding one of the word lines <NUM>. In some embodiments, e.g., without limitation, a respective transistor <NUM> is a field effect transistor turned off or on by a signal from the respective word line <NUM> applied to its gate, which controls reading and writing and whether the cell is coupled to the complementary bit lines <NUM>. Accordingly, each word line <NUM> of the plurality of word lines <NUM> is configured to receive one or more signals to cause a first subset of the plurality of MRAM cells <NUM> to store logical ones and a second subset of the plurality of cells to store logical zeroes. Also, accordingly, each bit line-complementary bit line pair <NUM> of the plurality of bit line-complementary bit line pairs <NUM> is configured to read the stored logical ones and stored logical zeroes resident within the respective subsets.

Referring now to <FIG>, a block schematic diagram is provided illustrating a computing system <NUM> that may be used in implementing one or more of the methods, tools, and modules, and any related functions, described herein (e.g., using one or more processor circuits or computer processors of the computer), in accordance with some embodiments of the present disclosure. In some embodiments, the major components of the computer system <NUM> may comprise one or more CPUs <NUM>, a memory subsystem <NUM>, a terminal interface <NUM>, a storage interface <NUM>, an I/O (Input/Output) device interface <NUM>, and a network interface <NUM>, all of which may be communicatively coupled, directly or indirectly, for inter-component communication via a memory bus <NUM>, an I/O bus <NUM>, and an I/O bus interface unit <NUM>.

The computer system <NUM> may contain one or more general-purpose programmable central processing units (CPUs) <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-N, herein collectively referred to as the CPU <NUM>. In some embodiments, the computer system <NUM> may contain multiple processors typical of a relatively large system; however, in other embodiments the computer system <NUM> may alternatively be a single CPU system. Each CPU <NUM> may execute instructions stored in the memory subsystem <NUM> and may include one or more levels of on-board cache.

System memory <NUM> may include computer system readable media in the form of volatile memory, such as random access memory (RAM) <NUM> or cache memory <NUM>. Computer system <NUM> may further include other removable/non-removable, volatile/non-volatile computer system storage media. By way of example only, storage system <NUM> can be provided for reading from and writing to a non-removable, non-volatile magnetic media, such as a "hard drive. " Although not shown, a magnetic disk drive for reading from and writing to a removable, non-volatile magnetic disk (e.g., a "floppy disk"), or an optical disk drive for reading from or writing to a removable, non-volatile optical disc such as a CD-ROM, DVD-ROM or other optical media can be provided. In addition, memory <NUM> can include flash memory, e.g., a flash memory stick drive or a flash drive. Moreover, the non-volatile STT-MRAM devices as described herein are included as a portion of the described suite of memory devices. Memory devices can be connected to memory bus <NUM> by one or more data media interfaces. The memory <NUM> may include at least one program product having a set (e.g., at least one) of program modules that are configured to carry out the functions of various embodiments.

Although the memory bus <NUM> is shown in <FIG> as a single bus structure providing a direct communication path among the CPUs <NUM>, the memory subsystem <NUM>, and the I/O bus interface <NUM>, the memory bus <NUM> may, in some embodiments, include multiple different buses or communication paths, which may be arranged in any of various forms, such as point-to-point links in hierarchical, star or web configurations, multiple hierarchical buses, parallel and redundant paths, or any other appropriate type of configuration. Furthermore, while the I/O bus interface <NUM> and the I/O bus <NUM> are shown as single respective units, the computer system <NUM> may, in some embodiments, contain multiple I/O bus interface units <NUM>, multiple I/O buses <NUM>, or both. Further, while multiple I/O interface units are shown, which separate the I/O bus <NUM> from various communications paths running to the various I/O devices, in other embodiments some or all of the I/O devices may be connected directly to one or more system I/O buses.

In some embodiments, the computer system <NUM> may be a multi-user mainframe computer system, a single-user system, or a server computer or similar device that has little or no direct user interface, but receives requests from other computer systems (clients). Further, in some embodiments, the computer system <NUM> may be implemented as a desktop computer, portable computer, laptop or notebook computer, tablet computer, pocket computer, telephone, smart phone, network switches or routers, or any other appropriate type of electronic device.

It is noted that <FIG> is intended to depict the representative major components of an exemplary computer system <NUM>. In some embodiments, however, individual components may have greater or lesser complexity than as represented in <FIG>, components other than or in addition to those shown in <FIG> may be present, and the number, type, and configuration of such components may vary.

One or more programs/utilities <NUM>, each having at least one set of program modules <NUM> may be stored in memory <NUM>. The programs/utilities <NUM> may include a hypervisor (also referred to as a virtual machine monitor), one or more operating systems, one or more application programs, other program modules, and program data. Each of the operating systems, one or more application programs, other program modules, and program data or some combination thereof, may include an implementation of a networking environment. Programs <NUM> and/or program modules <NUM> generally perform the functions or methodologies of various embodiments.

The embodiments as disclosed and described herein are configured to provide an improvement to computer technology. Materials, operable structures, and techniques as disclosed herein can provide substantial beneficial technical effects. Some embodiments may not have all of these potential advantages and these potential advantages are not necessarily required of all embodiments. By way of example only, and without limitation, one or more embodiments may provide enhancements of the value of the tunnel magnetoresistance (TMR) for the respective MRAM stacks through the cooperation of the MnxN layer, the WAl layer, and the CoAl layer.

As described above, high TMR is desirable since the higher TMR provides a higher ON/OFF ratio and a greater signal-to-noise ratio of the respective memory cells. At least some of the embodiments described herein are directed toward fabrication enhancements to the memory stacks to enhance the polarization of the electron spin by overcoming the technical limitations present in the state-of-the-art memory stack fabrication processes. Such spin polarization enhancements of the Heusler compound also enhance the associated TMR as well. In some embodiments, the templating layer has a bi-layer structure, e.g., the WAl layer and the CoAl layer. However, the templating layer is not necessarily limited to a bi-layered structure and in some embodiments is a single layer structure and in some embodiments is a multilayer structure of CsCl-like chemical templating compounds, such as, and without limitation, CoAl, CoGa, CoGe, IrAl, RuAl, and the like. Accordingly, as disclosed herein in at least some of the embodiments, upward improvements of the TMR of the Heusler compounds are implemented to enhance the performance of the MTJs.

In addition, substituting W for Ir in the bi-layered structure results in a material layer of WAl that is functionally similar to a layer of IrAl with respect to enhancing the TMR of the MRAM stack over that of CoAl alone, where W is relatively inexpensive and readily available and is more "fabrication friendly" than Ir (as previously described herein).

In addition, further improvement of computer technology is achieved through using fabricating multiple MRAM stacks to define a MRAM cell, where a plurality of MRAM cells further define a MRAM array. The MRAM arrays are a used to build a non-volatile MRAM device, and one or more MRAM devices will define a computing system. The overall effect of an extremely large number of MRAM stacks drawing less electrical energy due to their non-volatility (i.e., no power needed to maintain the stored state) will result in a reduction in power consumption of the computer systems.

The present disclosure may be a system, a method, and/or a computer program product at any possible technical detail level of integration.

Computer readable program instructions for carrying out operations of the present disclosure may be assembler instructions, instruction-set-architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state-setting data, configuration data for integrated circuitry, or either source code or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C++, or the like, and procedural programming languages, such as the "C" programming language or similar programming languages. In some embodiments, electronic circuitry including, for example, programmable logic circuitry, field-programmable gate arrays (FPGA), or programmable logic arrays (PLA) may execute the computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry, in order to perform aspects of the present disclosure.

Claim 1:
A magnetic random access memory, MRAM, stack (<NUM>) comprising
a first magnetic layer (<NUM>) comprising a Heusler compound; and
one or more seed layers (<NUM>) comprising: a multi-layer templating structure (<NUM>) comprising a crystalline structure configured to template the Heusler compound and enhance a tunnel magnetoresistance, TMR, of the MRAM stack, wherein the first magnetic layer is formed over the multi-layer templating structure, characterized by the multi-layer templating structure comprising:
a layer of a first binary alloy (<NUM>) comprising tungsten-aluminum. WAl; and
a layer of a second binary alloy (<NUM>) having a cesium-chloride, CsCl, structure, wherein the second binary alloy overlays the first binary alloy.