Patent Description:
Data may be transmitted between devices using standardized communication frames. The frames may arrive at a receiving device with varying levels of interference and at varying levels of signal strength or power. The received signals necessarily must be distinguished from unrelated signals or from ambient electronic noise. The transmitted communication frames include defined portions having known patterns. The defined portions, such as preambles and frame delimiters, may be identified thereby allowing the remainder of the frame to be demodulated to recover the communicated payload data.

Some devices utilize shorter defined-pattern portions to allow for a reduction in expended power to transmit the non-data portions of the frame. Accordingly, more robust techniques need to be employed to identify frame portions when the portions are shortened.

October <NUM> discloses searching in a plurality of received symbols for a preamble match with a known preamble pattern, then searching in the plurality of symbols for a frame delimiter match with a known frame delimiter pattern when the preamble match is identified. If the search for the frame delimiter is is not successful within a fixed length of time after the first detected preamble, the search for a preamble is re-started.

Additional objects and features of the invention will be more readily apparent from the following detailed description and appended claims when taken in conjunction with the drawings. Although several embodiments are illustrated and described, like reference numerals identify like parts in each of the figures, in which:.

It should be understood that the figures are merely schematic and are not drawn to scale. It should also be understood that the same reference numerals may be used throughout the figures to indicate the same or similar parts.

The disclosed embodiments find application to protocols that use packets with a short preamble pattern combined with a variable pattern frame delimiter of sufficient length. The embodiments combine an incoming signal power estimation, phase-domain (PD) preamble detection with a frequency-domain (FD) synchronization frame delimiter (SFD) detection. The combination provides performance not feasible using either of a preamble detector (PD) nor a frequency-domain (FD) synchronization frame delimiter (SFD) detector alone.

Acquisition detectors provide both timing estimation (symbol and frame timing) and frequency estimation (local oscillator (LO) estimation). An advantage is realized by utilizing short preambles (e.g., <NUM>-<NUM> octet as used by Bluetooth-LE, ANT, IEEE <NUM>. <NUM> (FSK/GFSK/MSK PHYs) and other protocols) and a long frame delimiter ( ≥ <NUM> octet synchronization pattern). One advantage of detecting a short preamble is the ability to more quickly declare that a packet is found which enables an earlier performance of a clear channel assessment (CCA) and determination. Once a packet has been declared as found, then timing and frequency estimations may be subsequently performed using a frame delimiter.

The disclosed embodiments are able to quickly determine the packet presence, which may be useful for automatic gain control (AGC) and CSMA/CA. The packet detection also may be agnostic to a frame delimiter address for CSMA/CA and CCA channel assessment. Further, the frame delimiter detection may implemented in FM domain (which allows an efficient implementation of the correlation circuit and the possibility of estimating CFO).

Also, the preamble detector cannot be implemented in FM domain as correlation is highly unreliable on short correlation windows. The method and system described herein provides advantages over an FM domain preamble detector by performing the preamble detection in the PM domain.

A method of frame synchronization in a communication system is disclosed. The method includes receiving an input signal including a plurality of symbols of a communication frame, and searching in the plurality of symbols for a preamble match with a known preamble pattern when a power level of the input signal exceeds a determined noise threshold.

The method further includes searching in the plurality of symbols for a frame delimiter match with a known frame delimiter pattern when the preamble match is identified and the power level of the input signal exceeds a determined noise threshold. A remaining portion of the plurality of symbols is then demodulated when the frame delimiter match is identified and the power level of the input signal exceeds a determined noise threshold.

The method continuously detects the power level of the input signal during acquisition of the communication frame, and generating a signal present signal when the power level exceeds the predetermined power level. Such continuous detection of the power level provides a further advantage of allowing an acquisition detector, including a preamble detector and a frame delimiter detector, to remain powered off until a valid power level is detected. Also, the method may include continuously searching in the plurality of symbols for the preamble match while the searching in the plurality of symbols for the frame delimiter match occurs.

Further, when another preamble match is identified during the searching for the frame delimiter match, the method resets a frame delimiter search timer and continue the searching in the plurality of symbols for the frame delimiter match with the known frame delimiter pattern. Further, when another preamble match is not identified before the frame delimiter search timer expires, ceasing searching in the plurality of symbols for a frame delimiter match.

The method may also include using a phase signal of the plurality of symbols with the input signal normalized in polar coordinates when searching in the plurality of symbols for the preamble match is performed. Also, using a dot product of an IQ signal formed from a phase signal of the plurality of symbols and the known frame delimiter pattern when the searching in the plurality of symbols for the frame delimiter match is performed.

Further, the method may include generating a timing correction signal from a magnitude portion of the dot product wherein the timing correction signal configured to adjust timing of the communication frame, and generating a carrier frequency correction signal from a phase portion of the dot product, wherein the carrier frequency correction signal configured to adjust a frequency for downconverting the input signal.

A system includes an acquisition detector configured to receive an input signal including a plurality of symbols of a communication frame. The acquisition detector may include a preamble detector configured to search in the plurality of symbols for a preamble match with a known preamble pattern when a power level of the input signal exceeds a determined noise threshold.

The acquisition detector includes a frame delimiter detector configured to search in the plurality of symbols for a frame delimiter match with a known frame delimiter pattern when the preamble match is identified and the power level of the input signal exceeds a determined noise threshold. The system may further include a demodulator configured to demodulate a remaining portion of the plurality of symbols when the frame delimiter match is identified and the power level of the input signal exceeds a determined noise threshold.

The system may further include a power detector configured to continuously detect the power level of the input signal during acquisition of the communication frame, and generate a signal present signal when the power level of the input signal exceeds the predetermined power level. The preamble detector and the frame delimiter detector may be deactivated when the power level of the input signal does not exceed the predetermined power level. Further, the preamble detector may be further configured to continuously search in the plurality of symbols for the preamble match while the frame delimiter detector continues to search in the plurality of symbols for the frame delimiter match.

The acquisition detector includes a frame delimiter search timer configured to reset and continue the search by the frame delimiter detector when another preamble match is found by the preamble detector, and the frame delimiter search timer may be further configured to cease searching in the plurality of symbols for a frame delimiter match when another preamble match is not identified before the frame delimiter search timer expires.

The preamble detector of the system may further be configured to search for the preamble match using a phase signal of the plurality of symbols with the input signal normalized in polar coordinates. The frame delimiter may be further configured to search for the frame delimiter match using a dot product of an IQ signal formed from a phase signal of the plurality of symbols and the known frame delimiter pattern.

Further, the frame delimiter detector may be configured to generate a timing correction signal from a magnitude portion of the dot product, with the timing correction signal configured to adjust timing of the communication frame. Also, the frame delimiter detector may be further configured to generate a carrier frequency correction signal from a phase portion of the dot product, the carrier frequency correction signal configured to adjust a frequency for downconverting the input signal.

In a further embodiment, an acquisition detector includes a preamble detector and a frame delimiter detector. The preamble detector may be configured to search in a plurality of symbols for a preamble match with a known preamble pattern when a power level of the input signal exceeds a determined noise threshold The frame delimiter detector may be configured to search in the plurality of symbols for a frame delimiter match with a known frame delimiter pattern when the preamble match is identified and the power level of the input signal exceeds a determined noise threshold. Further, the preamble detector may be configured to determine the preamble match based on a comparison in a phase domain, and the frame delimiter detector may be configured to determine the frame delimiter match in a frequency domain.

<FIG> illustrates a communication system <NUM> configured to operate according to a communication standard, and example of which may be IEEE <NUM>. The system <NUM> includes a receiver <NUM> controlled by a processor <NUM>. The system <NUM> may include a receiver front-end (not shown) that is coupled to an antenna (not shown) and configured to receive a radio frequency (RF) input signal and downconvert the RF input signal into a baseband signal illustrated as input signal <NUM>.

The receiver <NUM> may further include an acquisition detector <NUM> configured to receive the input signal <NUM> and generate various detect signals described below. The acquisition detector <NUM> may be configured to perform various functions described herein including preamble detection and frame delimiter detection. The acquisition detector <NUM>, in response to preamble detection, may generate a preamble detect signal for use by other circuits such as automatic gain control (AGC) of the receiver front-end (not shown) and link layer (LL) processes (not shown). The acquisition detector <NUM>, in response to detection of the frame delimiter, may generate signals such as a carrier frequency offset (CFO) estimate signal (not shown) and a fractional timing estimate signal (not shown) for use by other circuits.

The receiver <NUM> further includes a demodulator <NUM> configured to generate bit log-likelihood ratios (LLRs) for received symbols. The receiver <NUM> further includes a decoder <NUM>. The decoder <NUM>, which may, for example, be implemented as a Viterbi decoder, functions to decode received symbols.

It should be appreciated that components of the receiver <NUM> that are not deemed desirable for understanding the disclosed subject matter have been omitted for the sake of brevity. It should be understood that system <NUM> also includes a transmitter and other components (e.g., a monitoring device, input/output (I/O), and control circuitry), which have also been omitted for the sake of brevity.

<FIG> illustrates a data frame <NUM> as exchanged between a transmitter and a receiver. The data frame <NUM> includes a preamble <NUM>, a frame delimiter <NUM>, and a payload data unit (PDU) <NUM>. The various embodiments described herein illustrate an acquisition detector <NUM> which provides both time (symbol & frame timing) and frequency (LO error estimation) estimation.

One targeted use case may include a short preamble (e.g., <NUM>-<NUM> octet as used by Bluetooth-LE, ANT, IEEE <NUM>. <NUM> (FSK/GFSK/MSK PHYs), as well as other protocols. The use case may also include a long frame delimiter (e.g., ≥ <NUM> octet synchronization pattern). The preamble <NUM> may be of varying lengths, however, the preamble <NUM> is illustrated as a short preamble <NUM> of repetitive symbols. The frame delimiter <NUM> may be a long frame delimiter.

Further, the acquisition detector <NUM> may be configured to determine the packet presence as quickly as possible (for AGC and CSMA/CA). Yet further, the packet detection of the acquisition detector <NUM> needs to be agnostic to the frame delimiter address, for CSMA/CA and CCA channel assessment. The frame delimiter detection is implemented in the FM domain, which allows for an efficient implementation of the correlation circuit and the possibility of estimating CFO. The preamble detector is not implemented in the FM domain as correlation is typically highly unreliable on short correlation windows.

<FIG> illustrates an acquisition detector, in accordance with an embodiment. An acquisition detector <NUM> may correspond to the acquisition detector <NUM> of <FIG>. The acquisition detector <NUM> operates according to protocols that use packets with a short preamble pattern combined with a variable pattern frame delimiter of adequate length. The acquisition detector <NUM> may use a combination of an incoming signal power estimation, phase-domain (PD) preamble detection with a frequency-domain (FD) synchronization frame delimiter (SFD) detection to reap the salient benefits of each engine.

The acquisition detector <NUM> includes a preamble detector <NUM> and a frame delimiter detector <NUM>, both controlled by a state machine <NUM>. The preamble detector <NUM> operates on a phase domain input signal <NUM> determined from the input signal <NUM> of <FIG>. The phase domain input signal <NUM> may be formed by generating a polar equivalent, including a unit magnitude signal and phase signal, of the input signal <NUM>. The phase signal is then used for the phase input signal <NUM> as the magnitude signal was normalized. The phase domain input signal <NUM> couples to both the preamble detector <NUM> and the frame delimiter detector <NUM>.

The state machine <NUM> generates control or enable signals for respectively enabling the preamble detector <NUM> and the frame delimiter detector <NUM>. Specifically, the state machine <NUM> generates a preamble detector control signal <NUM> for enabling and disabling the preamble detector <NUM> to minimize power consumed by the preamble detector <NUM>.

Similarly, the state machine <NUM> generates a frame delimiter control signal <NUM> for enabling and disabling the frame delimiter detector <NUM> to minimize power consumed by the frame delimiter detector <NUM>. Significant power may be conserved by preventing the more complex and hence power-intense circuits of the frame delimiter detector <NUM> from being unnecessarily activated.

The acquisition detector <NUM> further includes a power detector <NUM> configured to monitor the input signal and generate a signal present signal <NUM> when a power level of the received signal exceeds a signal level threshold. More specifically, the power detector <NUM> receives an IQ input signal <NUM> which may be in an IQ format for providing a preferred representation for power measurement.

When the measured power of the IQ input signal <NUM> exceeds the signal level threshold, then the signal present signal <NUM> is generated to signify detection of an actual signal rather than just the presence of noise or unrelated signals. The signal present signal <NUM> is then used by both the preamble detector <NUM> and the frame delimiter detector <NUM> to prevent false detection of preambles or frame delimiters that may result from unrelated signals.

The acquisition detector <NUM> further includes a frequency and timing correction module <NUM> configured to receive a CFO estimate signal <NUM> and a fractional timing estimate signal <NUM> generated by the frame delimiter detector <NUM>. Both CFO estimate signal <NUM> and the fractional timing estimate signal <NUM> extracted from the frame delimiter detector <NUM> have improved quality over legacy preamble-based estimation methods.

In operation, the preamble detector <NUM> operates on the phase portion, phase domain input signal <NUM>, of a polar domain input signal and generates the preamble detected signal <NUM> in response to a correlation pattern match with a preamble pattern <NUM>. In contrast, the frame delimiter detector <NUM> operates on a frequency modulated (FM) signal by receiving the phase domain input signal <NUM> and converting the phase input signal into an FM input signal.

The frame delimiter detector <NUM> generates the frame delimiter detected signal <NUM> in response to a correlation pattern match with a frame delimiter pattern <NUM>. As stated, the preamble detector <NUM> and the frame delimiter detector <NUM> are each enabled by the signal present signal <NUM> generated from the detection of the input signal <NUM>.

<FIG> illustrates a block diagram of a preamble detector, in accordance with an embodiment. A preamble detector <NUM> may correspond with the preamble detector <NUM> of <FIG>. The preamble detector <NUM> receives a phase input signal <NUM>, which may be a received signal converted to baseband and corresponding to symbols in a polar domain, as described with respect to input signal <NUM>. The preamble detector <NUM> further includes a buffer <NUM> configured to receive the a plurality of symbols as provided by the phase input signal <NUM>. By way of example, the buffer <NUM> may be configured to store six symbols, although the buffer <NUM> may be configured to store a greater or less than quantity of symbols.

The preamble detector <NUM> may further include a first forward path <NUM> including a first correlator <NUM> coupled to a buffered symbol signal <NUM> and a preamble pattern signal <NUM> generated by a preamble pattern <NUM>. The first correlator <NUM> compares the buffered symbols against a stored or known preamble pattern to generate a preamble match signal <NUM>. The preamble detector <NUM> further includes a second forward path <NUM> for providing differentiation of the input signal.

The second forward path <NUM> includes a differentiation and averaging module <NUM> for receiving the buffered symbol signal <NUM> and generating a CFO bias signal <NUM>. The second forward path <NUM> further includes a correction module <NUM> configured to provide a integration of the CFO bias signal <NUM>. The correction module <NUM> generates a correction CFO bias signal <NUM>. The correction CFO bias signal <NUM> and the preamble match signal <NUM> are correlated by second correlator <NUM> which results in a single correlation output signal <NUM>. The correlation output signal <NUM> is a signal in the phase domain.

The preamble detector <NUM> further includes a polar-to-Cartesian converter <NUM> for converting the correlator output signal <NUM> into IQ correlator output signal <NUM>. The IQ correlator output signal <NUM> couples to an averaging module <NUM> configured to average the samples and generate an averaged IQ correlator output signal <NUM>. A magnitude module <NUM> generates a magnitude correlator output signal <NUM> that is then compared at a comparator <NUM> with a preamble detect threshold signal <NUM>.

When the magnitude correlator output signal <NUM> is greater than the preamble detect threshold signal <NUM>, and the signal present signal <NUM> is asserted from the power detector <NUM> of <FIG>, then the comparator <NUM> generates a preamble detect signal <NUM>, which may correspond with the preamble detect signal <NUM> of <FIG>.

It is noted that in preamble detection, a first assessment is performed by the power detector <NUM> of <FIG> which provides an assessment that the input signal level is above a threshold. Such an evaluation generates a signal present signal <NUM> and avoids the issue of the preamble detector falsely detecting noise samples and allows the detection thresholds to be tuned for higher detection sensitivity. Further, the signal energy detection by the power detector <NUM> may also allow the preamble detector and the frame delimiter detector to remain in a low power state in the absence of a viable input signal.

<FIG> illustrates a block diagram of the frame delimiter detector, in accordance with an embodiment. A frame delimiter detector <NUM> may correspond to the frame delimiter detector <NUM> of <FIG>. The frame delimiter detector <NUM> receives a phase input signal <NUM>, which may be a received signal converted to baseband and corresponding to symbols in a polar domain.

The frame delimiter detector <NUM> includes a phase-to-FM converter <NUM> configured to convert the received symbols into the frequency domain as FM input signal <NUM>. The frame delimiter detector <NUM> further includes a buffer <NUM> configured to receive the a plurality of symbols as provided by the phase input signal <NUM> and converted by the phase-to-FM converter <NUM>.

By way of example, the buffer <NUM> may be configured to store thirty-two symbols, although the buffer <NUM> may be configured to store a greater or less than quantity of symbols. The buffer <NUM> outputs buffered symbols <NUM> which are converted from polar-to-Cartesian format by a polar-to-cartesian converter <NUM> which outputs IQ signal <NUM>.

A dot product module <NUM> then performs a dot product operation with the IQ signal <NUM> and a frame delimiter pattern <NUM> resulting in a dot product <NUM> comprising a magnitude component <NUM> and an angle component <NUM>. The magnitude component <NUM> may be used to estimate the fractional timing error resulting in a fractional timing estimate signal <NUM>. The magnitude component <NUM> may also be compared at comparator <NUM> against a threshold signal <NUM>. When the magnitude component <NUM> exceeds the threshold signal <NUM>, and the signal present signal <NUM> is asserted from the power detector <NUM> of <FIG>, then the comparator <NUM> generates a frame delimiter detected signal <NUM>. Further, the angle component <NUM> may be used to generate the CFO estimate signal <NUM>.

In operation, the preamble detector has to be able to detect a short preamble, which is better performed using correlation in the phase domain. Phase domain correlation is intrinsically more complex than the FM domain correlator (for the same number of correlation taps). Accordingly, phase domain correlation allows getting observable correlation peaks when the correlation window is small (i.e., phase domain correlation is suitable for the detection of the short preamble).

The purpose of the preamble detector is to detect an incoming packet where no synchronization information is used due to the low reliability, which provides an early indication of a packet arrival which is particularly useful for receiver automatic gain control and link layer assessments.

In contrast, the frame delimiter detector uses a frequency domain correlator which correlates the longer frame delimiter pattern using a differentiated phase-domain (FM)correlator. The FM domain correlation presents good cross-correlation properties only when the correlation window is long and is suitable for the detection of the long frame delimiter. Accordingly, using the FM domain correlator on the frame delimiter pattern allows estimating CFO thus avoiding the need of using the short preamble for that purpose.

The disclosed embodiment provides a more power efficient approach since even if the PM preamble detector is more power consuming, the overall method is power efficient because the PNffM domains operations are matched for their efficiencies, and when the preamble detector is searching for the preamble, then the frame delimiter detector is disabled. Further, the power detector is utilized to prevent unnecessary operation of the preamble detector and the frame delimiter detector.

<FIG> illustrates a flow diagram <NUM> of the acquisition detector <NUM>, in accordance with embodiments. The flow diagram <NUM> illustrates the operation of both the preamble detector <NUM> and the frame delimiter detector <NUM>, both of <FIG>. The flow starts from a physical reset <NUM> causing transition to an initialization state <NUM>. The operation exits the initialization state <NUM> in a flow <NUM> when the signal energy as determined by power detector <NUM> is above a threshold designating a detected signal above a noise floor.

The analysis of the received signal includes an acquisition process <NUM> and a demodulation process <NUM>. The acquisition process <NUM> includes a preamble search state <NUM> where the acquisition detector <NUM> operates the preamble detector <NUM> to search for a pattern match corresponding to the preamble pattern. The preamble detector <NUM> continues to search for preamble patterns and when a match is identified, then a preamble found flow <NUM> is traversed to a preamble search and frame delimiter search state <NUM> is reached. In the preamble search and frame delimiter search state <NUM>, the frame delimiter detector <NUM> is activated and the preamble detector <NUM> remains activated.

During the preamble search and frame delimiter search state <NUM>, the preamble detector <NUM> continues to search for subsequent preambles while the frame delimiter detector <NUM> begins the search for a match between the frame delimiter signals and a stored frame delimiter pattern. When the preamble detector detects a subsequent preamble, then a flow <NUM> resets the frame delimiter search timer <NUM>, and the preamble detector <NUM> and the frame delimiter detector <NUM> continue to search for pattern matches.

When the frame delimiter search timer <NUM> times out, then processing reverts over flow <NUM> to the preamble search state <NUM>. When the frame delimiter search timer <NUM> has not timed out and the frame delimiter detector <NUM> identifies a frame delimiter pattern match with the input signal and a frame delimiter pattern <NUM>, then a flow <NUM> transitions the operation to the demodulation process <NUM>. In the demodulation process <NUM>, the payload in the frame is demodulated by process <NUM>.

<FIG> illustrates a timing diagram <NUM>, in accordance with embodiments. The timing diagram <NUM> corresponds to the various states and flows of the flow diagram of <FIG>. The timing diagram <NUM> includes a plot <NUM> of a data frame <NUM>, corresponding to the data frame <NUM> of <FIG>. The data frame <NUM> includes a preamble <NUM>, a frame delimiter <NUM>, and a payload data unit (PDU) <NUM>, which respectively correspond to the preamble <NUM>, a frame delimiter <NUM>, and a payload data unit (PDU) <NUM>, of <FIG>.

The timing diagram <NUM> further includes a plot <NUM> of the measured energy <NUM> received at the IQ input signal <NUM> of the power detector <NUM>, of <FIG>. As noted in <FIG>, prior to receipt of the preamble <NUM>, the measured energy <NUM> level is below a threshold <NUM>. When the preamble <NUM> arrives at the input of the power detector <NUM>, then the measured energy <NUM> of the input signal exceeds the threshold <NUM> and stays exceeding that level for at least the duration of the data frame <NUM>.

The timing diagram <NUM> further includes a plot <NUM> identifying preamble and frame delimiter matches. The timing diagram <NUM> further includes a plot <NUM> identifying the various states of operation, as described with respect to <FIG>. During a state <NUM>, the preamble detector <NUM> is activated and continuously looks for a preamble pattern match. When a match is found, then the preamble detector <NUM> issues a preamble detected signal 752A. When a preamble is detected, then the operations transition to the preamble and frame delimiter search state <NUM>.

During the frame delimiter search state <NUM>, the preamble detector <NUM> continues to search the input signal for a preamble pattern match, and when discovered, causes a subsequent new issue of a preamble detected signals 752B and 752N. Further, when the operations in frame delimiter search state <NUM> identify a frame delimiter, then a frame delimiter detected signal <NUM> is issued, and the operations transitions to the state <NUM>.

A system and method have been described herein that provide benefits and advantages. For protocols that utilized short preambles combined with a variable length frame delimiter, advantages include maintaining the preamble detector and the frame delimiter detector powered off until a viable incoming input signal is detected results in the conservation of power in the communication device. Further, the disclosed system and method provide the advantage of early packet detection by performing preamble detection on a phase domain input signal. Such early detection of a preamble provides the advantage of providing feedback to the AGC of the receiver that can hold or maintain the gains in the receiver.

Further, in multiple access embodiments such as CSMA-CA as utilized in IEEE <NUM> applications, timely detection of a preamble reduces collisions resulting from detection of a CCA prior to the detection of an incoming packet. Yet further, the system and method described herein provide an advantage of a robust and higher resolution of time and frequency via FM domain frame delimiter detection because both the time and frequency estimates extracted from the frequency domain (FD) frame delimiter have improved quality with respect to legacy preamble-based estimation methods.

An acquisition detector and method include a preamble detector configured to search in a plurality of symbols for a preamble match with a known preamble pattern when a power level of the input signal exceeds a determined noise threshold. The acquisition detector further includes a frame delimiter detector configured to search in the plurality of symbols for a frame delimiter match with a known frame delimiter pattern when the preamble match is identified and the power level of the input signal exceeds a determined noise threshold.

The descriptions and drawings illustrate the principles of various example embodiments. It will thus be appreciated that those skilled in the art will be able to devise various arrangements that, although not explicitly described or shown herein, embody the principles of the invention and are included within its scope.

Furthermore, all examples recited herein are principally intended expressly to be for pedagogical purposes to aid the reader in understanding the principles of the invention and the concepts contributed by the inventor(s) to furthering the art and are to be construed as being without limitation to such specifically recited examples and conditions. Additionally, the term, "or," as used herein, refers to a non-exclusive or (i.e., and/or), unless otherwise indicated (e.g., "or else" or "or in the alternative").

Claim 1:
A method (<NUM>) of frame synchronization in a communication system, comprising:
receiving (<NUM>) an input signal including a plurality of symbols of a communication frame;
searching (<NUM>) in the plurality of symbols for a preamble match with a known preamble pattern when a power level of the input signal exceeds a determined noise threshold;
searching (<NUM>) in the plurality of symbols for a frame delimiter match with a known frame delimiter pattern when the preamble match is identified and the power level of the input signal exceeds a determined noise threshold and
continue searching (<NUM>) in the plurality of symbols for a subsequent preamble match while the searching (<NUM>) in the plurality of symbols for the frame delimiter match occurs, wherein when the subsequent preamble match is identified (<NUM>) during the searching (<NUM>) for the frame delimiter match, resetting a frame delimiter search timer (<NUM>) and continue the searching (<NUM>) in the plurality of symbols for the frame delimiter match with the known frame delimiter pattern; and
demodulating a remaining portion of the plurality of symbols when the frame delimiter match is identified and the power level of the input signal exceeds a determined noise threshold; and wherein
when the subsequent preamble match is not identified before the frame delimiter search timer (<NUM>) expires, ceasing searching (<NUM>) in the plurality of symbols for a frame delimiter match.