Patent Description:
Accordingly, it may be understood that these statements are to be read in this light, and not as admissions of prior art.

Programmable logic devices are a class of integrated circuits that can be programmed to perform a wide variety of operations. A programmable logic device may include programmable logic elements programmed by a form of memory known as configuration random access memory (CRAM). Thus, to program a circuit design into a programmable logic device, the circuit design may be compiled into a bitstream and programmed into CRAM cells. The values programmed into the CRAM cells define the operation of programmable logic elements of the programmable logic device.

The highly flexible nature of programmable logic devices makes them an excellent fit for accelerating many computing tasks. Thus, programmable logic devices are increasingly used as accelerators for machine learning, video processing, voice recognition, image recognition, and many other highly specialized tasks, particularly those that would be too slow or inefficient in software running on a processor.

In some cases, an integrated circuit that contains programmable logic devices provides a highly flexible platform that can be configured after manufacturing with a custom circuit design. The flexibility and variability in the possible designs that may be programmed into this type of integrated circuit, however, also provides for different sectors of the integrated circuit to be used for different purposes and functions. As the integrated circuit is programmed to perform various operations, different sectors of the integrated circuit may be active or consuming dynamic power at different times. However, the integrated circuit often consumes static power even when a respective sector of the integrated circuit is not performing an operation. As such, it may be useful to control the power provided to different sectors of the integrated circuit based on a respective operation of each respective sector.

<CIT> discloses an integrated circuit system comprising a plurality of IC's on an interposer, the interposer comprising an array of voltage regulators connected to the IC's and an array of thermal sensors and a controller for providing dynamic thermal management of the integrated circuit system.

<CIT> discloses a system-on-chip (SoC) with management module to monitor and dynamically control processor core operating voltages. The SoC is provided with a plurality of processor cores, a plurality of voltage regulators, an internal management module, and at least one temperature sensor. The management module compares monitored temperatures to threshold values, and in response generates voltage commands. The management module sends the voltage commands to the voltage regulators. Each voltage regulator adjusts the operating voltage supplied to a corresponding processor core in response to the voltage commands.

<CIT> discloses an integrated circuit mounted on an interposer. The interposer includes a power gating circuitry operated at first and second power gating granularity settings. The package allows an offloading programmable power gating circuitry in a single-chip package arrangement to reduce resources in an on-interposer die, thus reducing manufacturing cost and designing time.

It may be appreciated that in the development of any such actual implementation, as in any engineering or design project, numerous implementation-specific decisions must be made to achieve the developers' specific goals, such as compliance with system-related and business-related constraints, which may vary from one implementation to another. Moreover, it may be appreciated that such a development effort might be complex and time consuming, but would nevertheless be a routine undertaking of design, fabrication, and manufacture for those of ordinary skill having the benefit of this disclosure.

An integrated circuit consumes power when in operation, such as when implementing a design programmed in the integrated circuit. Generally, the integrated circuit will become less expensive to operate as it consumes less power. Moreover, less power consumption results in less heat dissipation, enabling the integrated circuit to operate at a cooler temperature. As a result, manufacturers may include more components on the integrated circuit and/or more tightly pack components on the integrated circuit. Furthermore, cooler operating temperatures increase the lifetime of the integrated circuit. Additionally, in cases where the power source of the integrated circuit is a battery, lower power consumption translates to longer battery life and/or smaller footprint of the battery (e.g., on a printed circuit board).

With this in mind, to reduce the power consumed by an integrated circuit, it may be useful to power down different regions of the integrated circuit that may not be in use. By way of example, an integrated circuit may be divided into multiple sectors, such that different sectors may be used to perform a variety of operations. To program each sector of the integrated circuit, configuration data may be routed to each sector via a configuration routing system to implement various designs in various sectors of the integrated circuit. In addition, because each sector may be employed for different operations, the integrated circuit may include one or more routed paths (e.g., circuit paths that connect components of the integrated circuit together using connective components such as wires) that allows for communication of user logic data from certain sectors of the integrated circuit to other sectors in the integrated circuit, components that may be accessible via the periphery of the integrated circuit, and the like. With this in mind, if a collection of sectors or sector group is powered by a voltage regulator disposed on the integrated circuit, communicating configuration data and/or user logic data between sectors, components, and the like may become challenging when the sector group is powered down. That is, since data may not be transmitted via sectors located in a powered down sector group, the data may be transmitted to its destination when an alternate communication route has been identified or is present.

With this in mind, this disclosure relates generally to integrating one or more voltage regulators (e.g., fully integrated voltage regulator (FIVR)) and one or more thermal sensors controller into an integrated circuit, such that each sector or a collection of sectors within the integrated circuit may be operated according to different power management schemes (e.g., power down regions, voltage frequency scaling, dynamic voltage frequency scaling, temperature margin recovery). That is, one voltage regulator may be electrically coupled to one or more sectors of an integrated circuit to provide power to the respective one or more sectors.

To provide different types of power management operations to each sector or a collection of sectors (i.e., sector group) in an integrated circuit, multiple voltage regulators may be incorporated into a single integrated circuit. In some cases, these voltage regulators may be positioned at the edges of the integrated circuit, such that one voltage regulator may provide voltage to one or more adjacent sectors in the integrated circuit. Although the placement of these voltage regulators at the edge of the integrated circuit may improve the ability of different sectors in the integrated circuit to communicate with each other without routing data around a voltage regulator, the performance of the integrated circuit may be reduced. Moreover, the placement of voltage regulators at the edge of the integrated circuit also makes communication between sectors in the integrated circuit more difficult in situations when certain sectors are powered down by a respective voltage regulator. In the same manner, when certain sectors of the integrated circuit are powered down by a respective voltage regulator, the ability of the integrated circuit to use different sectors for performance scaling becomes less viable if the respective sectors are separated by unpowered sectors.

With the foregoing in mind, in certain embodiments of the present disclosure, one or more voltage regulators may be embedded into a separate interposer device that may be disposed above or below the integrated circuit. The interposer device may include one voltage regulator per sector of the integrated circuit or one voltage regulator per sector group of the integrated circuit. In either case, by positioning the voltage regulators on the interposer device, as opposed to the integrated circuit, the sectors of the integrated circuit may have increased flexibility in communicating and distributing power with each other due to more granularly dispersed voltage regulators. That is, instead of controlling the power provided to sectors of the integrated circuit based on the location of a respective voltage regulator on the integrated circuit, more voltage regulators may be placed on the interposer device to provide voltage to more sectors or group of sectors without being limited to distributing voltage to sectors positioned within a proximity of a respective edge of the integrated circuit. In other words, since the interposer device provides an additional plane in which multiple voltage regulators may be electrically coupled to different sectors or sector groups to improve the reachability of the voltage regulator to their respective sectors or sector groups without inhibiting the communication of configuration data or user data between sectors of the integrated circuit.

It should be noted that the respective sectors may include circuit components between each other to isolate the power to a respective sector, perform dynamic voltage frequency scaling (DVFS) operations, and the like. For example, circuits that isolate and/or level shifters may be positioned between sectors to allow inter-sector wires to operation under various voltage operations (e.g., power down, frequency scaling). In some embodiments, performance monitoring circuits may track the operations of each sector and control the voltage frequency scaling operations, the power down operations, and the isolation circuit operations based on the properties of a respective sector.

In addition to incorporating the voltage regulators into the interposer device, in some embodiments, thermal sensor circuitry may also be incorporated into the interposer device to monitor the temperature of the sectors in the integrated circuit. That is, one or more thermal sensors may be disposed on the integrated circuit to measure the temperature of one or more sectors or one or more sector groups positioned adjacent to the thermal sensors. In some embodiments, based on the temperature measurements received via the thermal sensors, a thermal sensor controller of the thermal sensor circuitry may adjust the operations of a respective voltage regulator coupled to the respective sector or sector group to improve the operations of the integrated circuit.

Keeping the foregoing in mind, in certain embodiments, multiple voltage regulators may be incorporated into an interposer device that may be coupled to the integrated circuit to provide power (e.g., voltage) to different sectors or sector groups in the integrated circuit. As such, voltage regulators may be used to control more sectors or sector groups, as compared to voltage regulators disposed on the integrated circuit itself. The additional voltage regulators may enable the integrated circuit to control power operations (e.g., power down, voltage frequency scaling, dynamic voltage frequency scaling) to additional sectors of the integrated circuit, as compared to the voltage regulators disposed on the integrated circuit itself.

The increased density of voltage regulators available to control voltage operations to a number of sectors in the integrated circuit provide for improved power management capabilities for the integrated circuit. Moreover, the ability to control the power provided to each sector of the integrated circuit may enable the integrated circuit to enable certain sectors to operate at higher voltages as compared to other sectors within the integrated circuit to provide improved performance for the respective operations performed by the certain sectors.

As discussed above, in addition to the increased availability of voltage regulators, in certain embodiments, the interposer device may include thermal sensor circuitry for each sector or for each of a number of sector groups in the integrated circuit to monitor the temperature of the respective sector or respective sector group. By including the thermal sensor circuitry on the same interposer device as the voltage regulators, a controller of the thermal sensor circuitry may control operations of a respective voltage regulator based on the temperature of the respective sector or respective sector group. As a result, the integrated circuit may have improved thermal management by ensuring that different sectors or sector groups operate within a desired temperature range. Additional details with regard to the embodiments described above will be provided below with reference to <FIG>.

By way of introduction, <FIG> illustrates a block diagram of a system <NUM> that may program an integrated circuit <NUM> based on a design programmed received by the integrated circuit <NUM>, in accordance with an embodiment of the present disclosure. The integrated circuit <NUM> may be reconfigurable program logic device (e.g., a field programmable gate array (FPGA)) that has separate die for programmable logic fabric and fabric support circuitry. A user may implement a circuit design to be programmed onto the integrated circuit <NUM> using design software <NUM>, such as a version of Quartus® by Intel.

The design software <NUM> may be executed by one or more processors <NUM> of a computing system <NUM>. The computing system <NUM> may include any suitable device capable of executing the design software <NUM>, such as a desktop computer, a laptop, a mobile electronic device, a server, and the like. The computing system <NUM> may access, configure, and/or communicate with the integrated circuit <NUM>. The processor(s) <NUM> may include multiple microprocessors, one or more other integrated circuits (e.g., application specific integrated circuits, field programmable gate arrays, reduced instruction set processors, and the like), or some combination thereof.

One or more memory devices <NUM> may store the design software <NUM>. In addition, the memory device(s) <NUM> may store information related to the integrated circuit <NUM>, such as control software, configuration software, look up tables, configuration data, etc. In some embodiments, the processor(s) <NUM> and/or the memory device(s) <NUM> may be external to the computing system <NUM>. The memory device(s) <NUM> may include a tangible, non-transitory, machine-readable-medium, such as a volatile memory (e.g., a random-access memory (RAM)) and/or a nonvolatile memory (e.g., a read-only memory (ROM)). The memory device(s) <NUM> may store a variety of information and be used for various purposes. For example, the memory device(s) <NUM> may store machine-readable and/or processor-executable instructions (e.g., firmware or software) for the processor(s) <NUM> to execute, such as instructions to determine a speed of the integrated circuit <NUM> or a region of the integrated circuit <NUM>, determine a criticality of a path of a design programmed in the integrated circuit <NUM> or a region of the integrated circuit <NUM>, programming the design in the integrated circuit <NUM> or a region of the integrated circuit <NUM>, and the like. The memory device(s) <NUM> may include one or more storage devices (e.g., nonvolatile storage devices) that may include read-only memory (ROM), flash memory, a hard drive, or any other suitable optical, magnetic, or solid-state storage medium, or any combination thereof.

The design software <NUM> may use a compiler <NUM> to generate a low-level circuit-design program <NUM> (bitstream), sometimes known as a program object file and/or configuration program, that programs the integrated circuit <NUM>. That is, the compiler <NUM> may provide machine-readable instructions representative of the circuit design to the integrated circuit <NUM>. For example, the integrated circuit <NUM> may receive one or more programs <NUM> (bitstreams) that describe the hardware implementations that should be stored in the integrated circuit <NUM>. The programs <NUM> (bitstreams) may programmed into the integrated circuit <NUM> as a program configuration <NUM>. The program configuration <NUM> may be represented as "configuration data" that is routed to various sectors of the programmable logic device, even when one or more of those sectors are powered down. The program configuration <NUM> may, in some cases, represent an accelerator function to perform for machine learning, video processing, voice recognition, image recognition, or other highly specialized task.

In one embodiment, the integrated circuit <NUM> may be part of a fabric die, which will be discussed in greater detail below with reference to <FIG>. The integrated circuit <NUM> electrically coupled to an interposer circuit <NUM>, which may be part of a fabric die support that will be discussed below with reference to <FIG>. The interposer circuit <NUM> may be a silicon interposer that includes a number of circuit components that may provide power, data, control commands, and the like to sectors on the integrated circuit <NUM>. As such, the interposer circuit <NUM> may be positioned substantially parallel to the integrated circuit <NUM> and may be electrically coupled to the integrated circuit <NUM> via micro bumps disposed between the interposer circuit <NUM> and the integrated circuit <NUM>. As will be discussed below, the micro bumps may enable different circuit components on the interposer circuit <NUM> to be coupled to specific circuit components on the integrated circuit <NUM>.

By way of example, the circuit components disposed on the interposer circuit <NUM> may include one or more voltage regulators <NUM>, one or more thermal sensor circuits <NUM>, and the like. The voltage regulators <NUM> may include voltage sources that provide voltage to one or more sectors in the integrated circuit <NUM>. In one embodiment, the voltage regulator <NUM> may include a fully-integrated voltage regulator (FIVR) circuit that provides for control of the voltage applied to a respective sector of the integrated circuit <NUM>. As such, the voltage regulator <NUM> may provide power, voltage frequency changes, action voltage recovery margin operations, dynamic voltage frequency scaling, and other voltage signals to the sectors of the integrated circuit <NUM>.

The thermal sensor circuits <NUM> may include one or more thermal sensors that measure a temperature or an amount of heat generated from a sector or a portion of the integrated circuit or a portion of the interposer circuit <NUM>. In addition, the thermal sensor circuits <NUM> may include a controller that may receive data from the thermal sensor and send signals that control the operation of the voltage regulators <NUM>. For instance, the controller may send commands to the voltage regulator <NUM> to cease operations, increase voltage frequency, decrease voltage frequency, and the like.

By including the voltage regulators <NUM> and the thermal sensor circuits <NUM> on the interposer circuit <NUM> that lies on a separate plane as compared to the integrated circuit <NUM>, the system <NUM> may include more voltage regulators <NUM> and thermal sensor circuits <NUM>, as compared to incorporating these components in the integrated circuit <NUM>. As a result, the voltage regulators <NUM> may provide voltage and control voltage operations of more sectors in the integrated circuit <NUM>. Indeed, in some embodiments, each sector of the integrated circuit <NUM> may include a dedicated voltage regulator <NUM> and thermal sensor circuit <NUM> couple thereto via the interposer circuit <NUM>. In this way, each individual sector or a collection of sectors (i.e., sector group) may be powered down, have their respective voltage signals adjusted, and the like.

By using the voltage regulators <NUM> disposed on the interposer circuit <NUM> to manage the power provides to each sector of the integrated circuit <NUM>, the integrated circuit <NUM> may provide additional routes in which data may be communicated between sectors of the integrated circuit <NUM>, as compared to when voltage regulators <NUM> are disposed on the integrated circuit <NUM> itself. That is, due to the limited space available on the integrated circuit <NUM>, any particular voltage regulator <NUM> disposed thereon may control multiple sectors that render a region or certain area of the integrated circuit <NUM> inaccessible when powered down. In contrast, by individually managing the power provided to individual sectors in the integrated circuit <NUM> via the interposer circuit <NUM>, the integrated circuit <NUM> may avoid powering down entire regions or portions of the integrated circuit <NUM>. Instead, the powered down sectors may be dispersed across the integrated circuit or selected based on a provision to maintain connectivity in any particular direction across certain sectors in the integrated circuit <NUM>. In addition, in some embodiments, a network-on-chip (NOC) may be integrated into the interposer circuit <NUM>, such that the NOC is continuously powered to provide configuration and/or user data to any sector of the integrated circuit.

The thermal sensor circuits <NUM> may also provide similar advantages in monitoring the temperature of different individual sectors in the integrated circuit <NUM>. Moreover, the controllers of the thermal sensor circuits <NUM> may control the power provided to the sectors of the integrated circuit <NUM> by controlling the respective voltage regulators <NUM>. By using the temperature data to control the operations of the voltage regulators and thus the sectors of the integrated circuit <NUM>, the integrated circuit <NUM> may reduce the amount of power used by the integrated circuit <NUM>. For example, the integrated circuit <NUM> may suspend certain operations when the sectors performing those operations are operating at a temperature above a threshold. In addition, if the sector temperature is above a threshold, the integrated circuit <NUM> or a controller that manages the operations of the sectors in the integrated circuit <NUM> may shift the operations performed by the high temperature sector to another sector. As such, the integrity and lifespan of the integrated circuit <NUM> may be extended by preventing certain sectors from operating at high temperatures. The integrated circuit <NUM> may represent any integrated circuit device that includes a programmable logic device with two separate integrated circuit die where at least some of the programmable logic fabric is separated from at least some of the fabric support circuitry that operates the programmable logic fabric. One example of the programmable logic device <NUM> is shown in <FIG>, but it should be understood that this disclosure is intended to encompass any suitable integrated circuit <NUM> where programmable logic fabric and fabric support circuitry are at least partially separated on different integrated circuit die. Indeed, in the example of <FIG>, the integrated circuit <NUM> includes a fabric die <NUM> and a base die <NUM> that are connected to one another via microbumps <NUM>. Although the fabric die <NUM> and base die <NUM> appear in a one-to-one relationship or a two-to-one relationship in <FIG>, other relationships may be used. For example, a single base die <NUM> may attach to several fabric die <NUM>, or several base die <NUM> may attach to a single fabric die <NUM>, or several base die <NUM> may attach to several fabric die <NUM> (e.g., in an interleaved pattern along the x- and/or y- direction). Peripheral circuitry <NUM> may be attached to or embedded within, and/or disposed on top of the base die <NUM>, and heat spreaders <NUM> may be used to reduce an accumulation of heat on the integrated circuit <NUM>. The heat spreaders <NUM> may appear above, as pictured, and/or below the package (e.g., as a double-sided heat sink). The base die <NUM> may attach to a package substrate <NUM> via C4 bumps <NUM>. In the example of <FIG>, two pairs of fabric die <NUM> and base die <NUM> are shown communicatively connected to one another via a silicon bridge <NUM> (e.g., an embedded multi-die interconnect bridge (EMIB)) and microbumps at a silicon bridge interface <NUM>.

In combination, the fabric die <NUM> and base die <NUM> may operate as a programmable logic device, such as a field programmable gate array (FPGA). For example, the fabric die <NUM> and the base die <NUM> may operate in combination as an FPGA <NUM>, shown in <FIG>. It should be understood that the FPGA <NUM> shown in <FIG> is meant to represent the type of circuitry and/or a logical arrangement of a programmable logic device when the both the fabric die <NUM> and the base die <NUM> operate in combination. In other words, some of the circuitry of the FPGA <NUM> shown in <FIG> may be found in the fabric die <NUM> and some of the circuitry of the FPGA <NUM> shown in <FIG> may be found in the base die <NUM>. Moreover, for the purposes of this example, the FPGA <NUM> is referred to as an FPGA, though it should be understood that the device may be any suitable type of programmable logic device (e.g., an application-specific integrated circuit and/or application-specific standard product).

In the example of <FIG>, the FPGA <NUM> may include transceiver circuitry (HSSI) <NUM> for driving signals off of the FPGA <NUM> and for receiving signals from other devices. The transceiver circuitry (HSSI) may be part of the fabric die <NUM>, the base die <NUM>, or a separate die altogether. Interconnection resources <NUM> may be used to route signals, such as clock or data signals, through the FPGA <NUM>. The FPGA <NUM> of <FIG> is shown to be sectorized, meaning that programmable logic resources may be distributed through a number of discrete programmable logic sectors <NUM>. Each programmable logic sector <NUM> may include a number of programmable logic elements <NUM> having operations defined by configuration memory <NUM> (e.g., configuration random access memory (CRAM)). The programmable logic elements <NUM> may include combinational or sequential logic circuitry. For example, the programmable logic elements <NUM> may include look-up tables, registers, multiplexers, routing wires, and so forth. A designer may program the programmable logic elements <NUM> to perform a variety of desired functions. A power supply <NUM> may provide a source of voltage and current to a power distribution network (PDN) <NUM> that distributes electrical power to the various components of the FPGA <NUM>. Operating the circuitry of the FPGA <NUM> causes power to be drawn from the power distribution network <NUM>.

There may be any suitable number of programmable logic sectors <NUM> on the FPGA <NUM>. Indeed, while <NUM> programmable logic sectors <NUM> are shown here, it should be appreciated that more or fewer may appear in an actual implementation (e.g., in some cases, on the order of <NUM>, <NUM>, or <NUM> sectors or more). Each programmable logic sector <NUM> may include a sector controller (SC) <NUM> that controls the operation of the programmable logic sector <NUM>. Each sector controller <NUM> may be in communication with a device controller (DC) <NUM>. Each sector controller <NUM> may accept commands and data from the device controller <NUM>, and may read data from and write data into its configuration memory <NUM> based on control signals from the device controller <NUM>. In addition to these operations, the sector controller <NUM> and/or device controller <NUM> may be augmented with numerous additional capabilities. Such capabilities may include coordinating memory transactions between local fabric memory (e.g., local fabric memory or CRAM being used for data storage) and sector-aligned memory associated with that particular programmable logic sector <NUM>, decrypting configuration programs (bitstreams) <NUM>, and locally sequencing reads and writes to implement error detection and correction on the configuration memory <NUM> and sequencing test control signals to effect various test modes.

The sector controllers <NUM> and the device controller <NUM> may be implemented as state machines and/or processors. For example, each operation of the sector controllers <NUM> or the device controller <NUM> may be implemented as a separate routine in a memory containing a control program. This control program memory may be fixed in a read-only memory (ROM) or stored in a writable memory, such as random access memory (RAM). The ROM may have a size larger than would be used to store only one copy of each routine. This may allow each routine to have multiple variants depending on "modes" the local controller may be placed into. When the control program memory is implemented as random access memory (RAM), the RAM may be written with new routines to implement new operations and functionality into the programmable logic sectors <NUM>. This may provide usable extensibility in an efficient and easily understood way. This may be useful because new commands could bring about large amounts of local activity within the sector at the expense of only a small amount of communication between the device controller <NUM> and the sector controllers <NUM>.

Each sector controller <NUM> thus may communicate with the device controller <NUM>, which may coordinate the operations of the sector controllers <NUM> and convey commands initiated from outside the FPGA device <NUM>. To support this communication, the interconnection resources <NUM> may act as a network between the device controller <NUM> and each sector controller <NUM>. The interconnection resources may support a wide variety of signals between the device controller <NUM> and each sector controller <NUM>. In one example, these signals may be transmitted as communication packets.

The FPGA <NUM> may be electrically programmed. With electrical programming arrangements, the programmable elements <NUM> may include one or more logic elements (wires, gates, registers, etc.). For example, during programming, configuration data is loaded into the configuration memory <NUM> using pins and input/output circuitry. In one example, the configuration memory <NUM> may be implemented as configuration random-access-memory (CRAM) cells. The use of configuration memory <NUM> based on RAM technology is described herein is intended to be only one example. Moreover, configuration memory <NUM> may be distributed (e.g., as RAM cells) throughout the various programmable logic sectors <NUM> the FPGA <NUM>. The configuration memory <NUM> may provide a corresponding static control output signal that controls the state of an associated programmable logic element <NUM> or programmable component of the interconnection resources <NUM>. The output signals of the configuration memory <NUM> may be applied to the gates of metal-oxide-semiconductor (MOS) transistors that control the states of the programmable logic elements <NUM> or programmable components of the interconnection resources <NUM>.

As stated above, the logical arrangement of the FPGA <NUM> shown in <FIG> may result from a combination of the fabric die <NUM> and base die <NUM>. The circuitry of the fabric die <NUM> and base die <NUM> may be divided in any suitable manner. In one example, shown in block diagram form in <FIG>, the fabric die <NUM> contains primarily programmable logic fabric resources, such as the programmable logic elements <NUM> and configuration memory <NUM>. In some cases, this may also entail certain fabric control circuitry such as the sector controller (SC) <NUM> or device controller (DC) <NUM>. The base die <NUM> may include supporting circuitry to operate the programmable logic elements <NUM> and configuration memory <NUM>. Shown here, the base die <NUM> includes sector <NUM> support circuitry 90A and sector <NUM> support circuitry 90B to support two corresponding sectors of the programmable logic elements <NUM> and configuration memory <NUM> of the fabric die <NUM>. The base die <NUM> may also include support circuitry for other sectors of the fabric die <NUM>.

The fabric die <NUM> and the base die <NUM> may collectively hold any suitable circuitry that may encompass the integrated circuit <NUM>. Thus, in one example, the fabric die <NUM> may include primarily programmable logic fabric resources, such as the programmable logic elements <NUM> and configuration memory <NUM>, the base die <NUM> may include, among other things, a device controller (DC) <NUM>, a sector controller (SC) <NUM>, a configuration network on chip (CNOC), a network-on-chip (NOC) data routing circuitry, sector-aligned memory used to store and/or cache configuration programs (bitstreams) or data, memory controllers used to program the programmable logic fabric, input/output (I/O) interfaces or modules for the programmable logic fabric, external memory interfaces (e.g., for a high bandwidth memory (HBM) device), an embedded processor (e.g., an embedded Intel® Xeon® processor by Intel Corporation of Santa Clara, California) or an interface to connect to a processor (e.g., an interface to an Intel® Xeon® processor by Intel Corporation of Santa Clara, California), voltage control circuitry, thermal monitoring circuitry, decoupling capacitors, power clamps, and/or electrostatic discharge (ESD) circuitry, to name just a few elements that may be present on the base die <NUM>. It should be understood that some of these elements that may be part of the fabric support circuitry of the base die <NUM> may additionally or alternatively be a part of the fabric die <NUM>. For example, the device controller (DC) <NUM> and/or the sector controllers (SC) <NUM> may be part of the fabric die <NUM>.

One physical arrangement of the fabric die <NUM> is shown in <FIG>. The fabric die <NUM> may contain an array of fabric sectors <NUM> that include fabric resources <NUM> (e.g., programmable elements programmed by CRAM and/or certain fabric control circuitry such as the sector controller (SC) <NUM> or device controller (DC) <NUM>) and interface circuitry <NUM>. The interface circuitry <NUM> may include data routing and/or clocking resources, and may contain a micro-bump (ubump) interface to connect to the base die <NUM>.

<FIG> provides a complementary arrangement of the base die <NUM>. The base die <NUM> may represent an active interposer with several sectors <NUM> surrounded by peripheral circuitry <NUM> and the silicon bridge interface <NUM>. Each sector <NUM> may include a variety of fabric support circuitry, such as sector-aligned memory <NUM>, memory control circuitry <NUM>, non-user input control circuitry <NUM>, non-user output control circuitry <NUM>, a voltage regulator such as a fully integrated voltage regulator (FIVR) <NUM>, one or more thermal sensors <NUM>, data and configuration routers <NUM>, and/or data pathways <NUM> and configuration pathways <NUM>. The memory control circuitry <NUM> may be used to program the sector-aligned memory <NUM>, the CRAM of the fabric die <NUM>, or both. The non-user input control circuitry <NUM> and non-user output control circuitry <NUM> may allow the circuitry of the sectors <NUM> to exchange data and/or control signals (e.g., via a configurable data routing network-on-chip (NOC) or a configuration network on chip (CNOC)). In one example, the non-user input control circuitry <NUM> and non-user output control circuitry <NUM> may operate as the sector controller (SC) <NUM> for a corresponding fabric sector <NUM> (as shown in <FIG>). The FIVR <NUM> and the one or more thermal sensors <NUM> may be used to provide a desired voltage to the corresponding fabric sector <NUM> (as shown in <FIG>), enabling the voltage to be selectively scaled up or down, or removed, depending on power and thermal specifications (e.g., based at least in part on temperature as measured by a thermal sensor <NUM> and/or in accordance with a dynamic voltage and frequency scaling (DVFS) scheme). Even though the thermal sensors <NUM> are in a separate die from that of the programmable logic fabric elements, when the base die <NUM> is directly adjacent to the fabric die <NUM> as in this example, the temperature measured by the thermal sensor in the base die <NUM> may correspond well enough to the fabric die <NUM> to allow for temperature-based operations (e.g., turn off power to the corresponding fabric sector <NUM> to prevent a permanent-denial-of-service (PDOS) condition). While the physical arrangement shown in <FIG> and <FIG> represent one example of the division of programmable logic device circuitry between the fabric die <NUM> and the base die <NUM>, there are many suitable arrangements.

With the foregoing in mind, <FIG> is a diagram of a system <NUM> that illustrates sectors <NUM> of the integrated circuit <NUM> of <FIG>, in accordance with an embodiment of the present disclosure. In addition to the integrated circuit <NUM> that may be part of the fabric die <NUM>, the system <NUM> may also include the interposer circuit <NUM>, as described above. The interposer circuit <NUM> may be part of the base die <NUM>. In certain embodiments, the interposer circuit <NUM> may include a number of voltage regulators <NUM> and thermal sensor circuits <NUM> disposed across the interposer circuit <NUM>, such that each respective voltage regulator <NUM> and thermal sensor circuit <NUM> may be positioned above or below a respective sector <NUM> or group of sectors <NUM>. As such, each respective voltage regulator <NUM> may provide voltage to a respective sector <NUM> via circuit connections disposed between the voltage regulator <NUM> and the respective sector <NUM> via micro bumps or the like. In any case, since the voltage regulator <NUM> may be positioned above or below a corresponding sector <NUM>, the system <NUM> may avoid routing voltage in a variety of directions to reach the respective sector <NUM>. Indeed, one voltage regulator <NUM> disposed on the interposer circuit <NUM> may provide voltage to a corresponding sector <NUM> or group of sectors <NUM> via electrical connections that traverse in one direction.

With the foregoing in mind, <FIG> illustrates a block diagram of a side profile of an integrated circuit assembly <NUM> that includes a sector array <NUM> within the base die <NUM> positioned over the interposer circuit <NUM> within the fabric die support <NUM>. Although not shown in <FIG>, the interposer circuit <NUM> may include the voltage regulators <NUM> and the thermal sensor circuits <NUM> described above.

The sector array <NUM> may include a number of sectors <NUM> to perform various operations on the integrated circuit <NUM>. In one embodiment, the sector array <NUM> may be electrically coupled to the interposer circuit <NUM> via a number of micro bumps <NUM>. The micro bumps <NUM> may be solder bumps that may be deposited on the sector array <NUM> or the interposer circuit <NUM> to provide an electrical connection between the two. In some embodiments, one voltage regulator <NUM> may be electrically coupled to one sector <NUM> or to a collection of sectors <NUM> via one or more micro bumps <NUM> disposed between the respective voltage regulator <NUM> and the sector <NUM> or sector group.

By way of example, the sector <NUM> may receive user data or data from other components outside the integrated circuit <NUM> or from other sectors <NUM> within the integrated circuit <NUM> from any suitable direction. That is, the sector <NUM> may receive user data from both the vertical and horizontal directions. In addition, the sector <NUM> may receive non-user data or configuration data in a vertical direction as the configuration data is propagated to each configuration memory <NUM> of each sector <NUM>.

The sector array <NUM> may be positioned, in one embodiment, above the interposer circuit <NUM>, as illustrated in <FIG>. With this in mind, one sector array <NUM> and corresponding interposer circuit <NUM> may make up one integrated circuit assembly <NUM>. To communicate between individual integrated circuit assemblies <NUM>, an embedded multi-die interconnect bridge (EMIB) <NUM> may be placed between integrated circuit assemblies <NUM>. The EMIB <NUM> may provide an electrical interconnect between the two integrated circuit assemblies <NUM> or two heterogeneous die in the same package. As such, different integrated circuit assemblies <NUM> may communicate with each other via the respective interposer circuits <NUM>, which may transmit the data to different sectors <NUM> of different sector arrays <NUM>.

To communicate data between different die tiles on the interposer circuit <NUM> that may include different voltage regulators <NUM> and thermal sensor circuits <NUM>, the interposer circuit <NUM> may include a network on chip (NOC) system integrated therein. For example, <FIG> illustrates various components including a NOC system that may be disposed on four die tiles <NUM> that may include the voltage regulators <NUM> and thermal sensor circuits <NUM>.

Referring now to <FIG>, each die tile <NUM> may encompass a portion of the interposer circuit <NUM>. In one embodiment, the die tile <NUM> may include the voltage regulator <NUM> and the thermal sensor circuit <NUM>. In addition, the die tile <NUM> may include memory components, memory controllers, input controllers, and output controllers, as described above with reference to <FIG>. Each of the aforementioned controllers may be accessible via a NOC system <NUM> integrated between each die tile <NUM>.

With the foregoing in mind, the NOC system <NUM> may provide communication paths between each die tile <NUM> via routers <NUM> disposed at the corners of each die tile <NUM>. The routers <NUM> may route user data between die tiles <NUM>, to sectors <NUM>, and the like. Since the interposer circuit <NUM> is separate from the integrated circuit <NUM>, the NOC system <NUM> may be continuously powered on, even when various sectors <NUM> of the integrated circuit <NUM> are powered down. In this way, the NOC system <NUM> of the interposer circuit <NUM> may provide an available route to different sectors <NUM> of the integrated circuit <NUM> regardless of the positions of powered down sectors <NUM>.

In addition to providing alternative routes for user data between sectors <NUM>, the interposer circuit <NUM> may provide voltage or voltage signals to different sectors <NUM> via respective voltage regulators <NUM> disposed on the interposer circuit <NUM>. For example, each die tile <NUM> may correspond to a particular sector <NUM> of the integrated circuit <NUM>. As such, each sector <NUM> of the integrated circuit <NUM> may include a respective voltage regulator <NUM> that provide voltages and voltage signals thereto. Moreover, each sector <NUM> of the integrated circuit <NUM> may also include a respective thermal sensor circuit <NUM> that measures its respective temperature. As a result, power and thermal operations may be managed at an individual sector <NUM> level without being limited by the boundary of any particular die tile <NUM>. That is, since each die tile <NUM> may be associated with a particular sector <NUM>, each individual sector <NUM> may be individually managed with respect to voltage operations and thermal operations.

For example, each sector <NUM> may be individually managed to receive the same voltage level because each sector <NUM> is coupled to one voltage regulator <NUM>. In contrast, when a number of sectors <NUM> were coupled to a single voltage regulator <NUM> disposed on the integrated circuit <NUM>, the voltage received at each sector <NUM> may vary due the impedance between each sector <NUM> and the like. In addition, each sector <NUM> may receive a voltage at a certain frequency (e.g. voltage frequency scaling) from the individual voltage regulator <NUM> associated therewith.

In the same manner, the thermal sensor circuit <NUM> may be positioned underneath or above a respective sector <NUM> of the integrated circuit, thereby acquiring temperature information or data concerning the respective sector <NUM>. That is, the ability to incorporate thermal sensor circuits <NUM> within a close proximity for each sector <NUM> enhances the ability to monitor the temperature of each sector <NUM>. As such, the integrated circuit <NUM> may have more accurate temperature monitoring for each of the sectors <NUM> therein. In addition, the controller of the thermal sensor circuit <NUM> may monitor the temperature of a respective sector <NUM> to determine whether the temperature is above some threshold associated with reduced performance parameters (e.g., speed, efficiency) of the sector <NUM> or reduced life expectancy of the sector <NUM>. If the temperature is above the threshold, the controller may send a signal to the respective voltage regulator <NUM> to reduce the voltage provided to the respective sector <NUM>. In some cases, the controller may send a command to the voltage regulator <NUM> to power down the respective sector <NUM> by removing the voltage provided to the respective sector <NUM>.

In addition, the controller of the thermal sensor circuit <NUM> may monitor the temperature of the respective sector <NUM> to detect a permanent denial of service (PDOS) attack from another circuit or entity. Generally, PDOS attacks may attempt to overwhelm circuit components that may be part of a sector <NUM>. In certain embodiments, the controller may detect a potential PDOS attack when a temperature of a sector <NUM> or a group of sectors <NUM> rises above a threshold, has a rate of rise above a threshold, and the like.

Although the thermal sensor circuit <NUM> is described as being incorporated into the interposer circuit <NUM>, it should be noted that, in some embodiments, the thermal sensor circuit <NUM> may be placed on the integrated circuit <NUM> since the voltage regulators <NUM> will not be present on the integrated circuit <NUM>. By placing the thermal sensor circuit <NUM> on the integrated circuit <NUM>, the thermal sensors may more accurately detect the temperature of a respective sector <NUM> since it is located closer to the respective sector <NUM>.

In addition to providing improved thermal management of sectors <NUM> in the integrated circuit <NUM>, the interposer circuit <NUM> may enable improved power management operations via the voltage regulators <NUM> stored thereon. For example, since each sector <NUM> may be coupled to a respective voltage regulator <NUM>, each sector <NUM> may have tighter or more accurate voltage regulation. That is, since a voltage regulator <NUM> can be dedicated to one sector <NUM>, the voltage (e.g., amplitude, frequency) provided to a particular sector <NUM> may be catered for that specific sector <NUM> while avoid voltage drooping and other power supply issues. In addition, each respective voltage regulator <NUM> may provide per sector <NUM> or per tile <NUM> voltage frequency scaling and power down operations. Moreover, in some embodiments, a controller may use a respective voltage regulator <NUM> to replace a biasgen that may be present on a particular sector <NUM>.

The ability to monitor and control the voltage and thermal properties of a respective sector <NUM> may also enable a controller to use certain sectors <NUM> as turbo sectors. Turbo sectors may be sectors <NUM> that operate with increased throughput by receiving higher voltage levels via the respective voltage regulators <NUM>. In some embodiments, a controller may monitor the temperature of a respective sector <NUM> to determine whether the sector <NUM> is below a threshold temperature. If the temperature is below the threshold, the controller may operate the respective sector <NUM> as a turbo sector by increasing the voltage signal (e.g., amplitude, frequency) provided to the sector <NUM> via the voltage regulator <NUM>.

In addition to monitoring the temperature of a respective sector <NUM>, a controller may monitor the total power dissipation of the integrated circuit <NUM>. More specifically, the controller may monitor the power consumed by each respective sector <NUM> and allow certain sectors <NUM> to use more power (e.g., operate at higher voltage or frequency) while other sectors <NUM> operate with less power. The controller may, in some embodiments, operate certain sectors <NUM> as turbo sectors while ensuring that the total power dissipation of the integrated circuit <NUM> does not exceed some threshold. By employing turbo sectors, the integrated circuit <NUM> may utilize the sectors <NUM> more effectively to perform certain operations more efficiently.

Further, by including the additional voltage regulators <NUM> on the interposer circuit <NUM>, the power delivery network (PDN) of the integrated circuit <NUM> is improved because each sector <NUM> may potentially receive an individual source of power. In this way, the integrated circuit <NUM> may be enabled to perform parallel configuration of the sectors <NUM> more efficiently because power may be delivered to each sector <NUM> while the configuration of the sector <NUM> is occurring. That is, that local regulation of power may provide a more robust response to local power draw used during configuration of the integrated circuit <NUM>. As a result, more sectors <NUM> may be configured in parallel without causing the power distribution network of the integrated circuit to dip below operational levels, thereby improving configuration performance.

Claim 1:
An integrated circuit assembly (<NUM>) comprising:
an integrated circuit (<NUM>; <NUM>) comprising a plurality of sectors (<NUM>), wherein each of the plurality of sectors comprises one or more programmable logic elements (<NUM>);
interposer circuit (<NUM>) disposed above or below the integrated circuit, wherein the interposer circuit comprises one or more voltage regulators (<NUM>) and one or more thermal sensors (<NUM>), wherein each of the one or more voltage regulators is configured to provide the voltage to a respective one or more of the plurality of sectors and wherein each of the one or more thermal sensors is configured to measure the temperature of a respective one of the plurality of sectors; and
a controller configured to control a voltage provided to each of the plurality of sectors via the one or more of voltage regulators based on data acquired by the one or more thermal sensors, said controlling comprising
determining whether a temperature of one of the plurality of sectors is below a threshold based on the data; and
increasing a voltage provided to the one of the plurality of sectors via one of the one or more voltage regulators in response to the temperature being below the threshold, wherein the controller is further configured to:
determine whether a temperature of one of the plurality of sectors is above a threshold based on the data; and
reduce a voltage provided to the one of the plurality of sectors via one of the one or more voltage regulators in response to the temperature being above the threshold, or to:
determine whether a rate of rise of temperature of one of the plurality of sectors is above a threshold based on the data; and
reduce a voltage provided to the one of the plurality of sectors via one of the one or more voltage regulators in response to the rate of rise of temperature being above the threshold;
wherein the interposer circuit (<NUM>) comprises a network on chip, NOC, system (<NUM>) configured to communicate data between one or more tiles (<NUM>) of the interposer circuit (<NUM>), said NOC system (<NUM>) providing communication paths between the one or more tiles (<NUM>) and between the one or more tiles (<NUM>) and the plurality of sectors via routers (<NUM>) disposed at the corners of each tile (<NUM>).