Patent Description:
In a time of flight (ToF) sensor, photodetectors are the basic device and collectively formed as a pixel array to detect the time of arrival of the reflected light to determine the distance between the TOF sensor and the target object. Typically, all photodetectors of this pixel array are directly coupled to a low-dropout voltage generated by a low-dropout regulator (LDO), where the power consumption under this LDO is determined based on its output voltage and loading. In this sense, when the ToF sensor needs high-resolution pixel array, more photodetectors are required to be added under this LDO, this will be inevitably increasing the overall power consumption.

One approach to reduce the power consumption is to minimize the LDO's output voltage. However, this approach will sacrifice the demodulation contrast (Cd) of the photodetector. In addition, to adjust the power consumption by simply decreasing the DC-DC voltage cannot solve the current spike issue, i.e. the max current spike is still high.

In view of the above, there is a need for an optimized solution to reduce the overall power consumption and lower current spikes of a photodetector.

<CIT> discloses a laser time-of-flight (TOF) light radar. The radar includes a transmitting module and a receiving module. The receiving module includes a first photodiode, a second photodiode and a single chip microcomputer. The single chip microcontroller includes a comparator and an analog-to-digital converter. A signal output end of the single chip microcomputer is connected with a signal input end of the transmitting module. The first photodiode and the second photodiode are arranged in parallel. Electrical signals of the first photodiode and the second photodiode are input to the comparator after high-pass filtering. An output end of the comparator is connected with an input end of the analog-to-digital converter after low-pass filtering. The analog-to-digital converter outputs a readable electrical signal. The radar has the advantages that an analog peripheral circuit of the single chip microcomputer is utilized, construction of the laser time-of-flight light radar can be realized simply with a lower efficiency requirement, thus an assembly structure is greatly simplified, and at the same time, volume and costs are reduced.

<CIT> discloses a photodetector, which belongs to a photodetector with a protection circuit. The protection circuit includes a follower circuit, a comparison circuit and an analog switch circuit; the output terminal of the transimpedance amplifier circuit of the photodetector is connected to the input of the follower circuit. The output terminal of the follower circuit is connected to the input terminal of the comparison circuit, the reference voltage signal is connected to the input terminal of the comparison circuit, and the output terminal of the comparison circuit is connected to the control of the analog switch circuit. At the end, ports I and II, III and IV of the analog switch circuit are respectively connected to the circuits for supplying power to the first photodiode and the second photodiode. The invention can effectively protect the operational amplifier and the photodiode in the photodetector from being damaged, and increase the service life of the photodetector.

<CIT> discloses a circuit, including: a photodetector including a first readout terminal and a second readout terminal different than the first readout terminal; a first readout circuit coupled with the first readout terminal and configured to output a first readout voltage; a second readout circuit coupled with the second readout terminal and configured to output a second readout voltage; and a common-mode analog-to-digital converter (ADC) including: a first input terminal coupled with a first voltage source; a second input terminal coupled with a common-mode generator, the common-mode generator configured to receive the first readout voltage and the second readout voltage, and to generate a common-mode voltage between the first and second readout voltages; and a first output terminal configured to output a first output signal corresponding to a magnitude of a current generated by the photodetector.

<CIT> discloses that the resetting of the energy store associated with the receiver prior to every detection interval and/or prior to every exposure period, during which the energy stored in the energy store is to be changed in accordance with the output signal of the receiver so as to use the state of the energy store following the reception interval as information about the object may be avoided by setting the sensitivity of the receiver, which determines the level of the output signal at a specified electromagnetic radiation, higher in at least one instance, and lower in at least one instance between two resetting events, or by varying the sensitivity. The noise contribution provided by the resetting operations is hereby avoided, which is why the benefit of the accumulation and/or integration may be exploited across several reception intervals without this noise contribution.

An objective of the present application is to reduce the overall power consumption and lower current spikes of a photo detector. The following embodiments of the present application are provided to serve the purpose.

An embodiment of the present application provides a photo-detecting apparatus according to claim <NUM>.

An embodiment of the present application provides a current reuse method according to claim <NUM>.

One advantage provided by the present application is that the current-reusing system not only saves power, but also effectively eliminates the current spike problem. Further, the approach and the architecture provided by the present application will not significantly increase the cost, but achieve the goal in an economic way.

Some phrases in the present specification and claims refer to specific elements; however, please note that the manufacturer might use different terms to refer to the same elements. Further, in the present specification and claims, the term "comprising" is open type and should not be viewed as the term "consists of. " The term "electrically coupled" can refer to either direct connection or indirect connection between elements. Thus, if the specification describes that a first device is electrically coupled to a second device, the first device can be directly connected to the second device, or indirectly connected to the second device through other devices or means.

Please refer to <FIG>, which is a diagram illustrating a photo-detecting apparatus <NUM>. The photo-detecting apparatus <NUM> comprises a low-dropout regulator (LDO) <NUM>, a first photodetector <NUM>, a second photodetector <NUM>, a first modulation signal generating circuit <NUM>, a second modulation signal generating circuit <NUM>, an isolation unit <NUM> and a capacitor <NUM>. The LDO <NUM> is configured to generate a first voltage V1 to bias the first modulation signal generating circuit <NUM>. The second voltage V2 configured to bias the second modulation signal generating circuit <NUM> can be generated through the first modulation signal generating circuit <NUM>. More specifically, the present application redirects the output current of odd-column pixels (marked with "Pixel_o") to the even-column pixels (marked with "Pixel_e"), to be used by the even-column pixels (e.g., the current outputted by the photodetector <NUM> can be reused by the photodetector <NUM>. In this way, the peak of the current can be reduced to half. For example, the range of the operational voltage of the odd-column pixels may be <NUM>. 6V, and the range of the operational voltage of the even-column pixels may be <NUM>.

Some modifications based on the above concept shall also fall within the scope of the present application. For example, by setting the range of the operational voltage of the even- column pixels to be higher than that of the odd-column pixels, the current outputted from the even-column pixels will be reused by the odd-column pixels. Accordingly, the range of the operational voltage of the even-column pixels may be <NUM>. 6V, and the range of the operational voltage of the odd-column pixels may be <NUM>.

The isolation unit <NUM> in this embodiment is used to provide pixel-to-pixel isolation, for preventing the leakage current between the pixels. The isolation unit <NUM> can be implemented with doping isolation, back-side deep trench isolation (BDTI), or any other alternative to reach the isolating effect.

The first modulation signal generating circuit <NUM> is configured to generate the modulation signals SI11, SI12 on the input terminals 111A and 111B, wherein the first modulation signal generating circuit <NUM> is operated under a voltage between the first voltage V1 and the second voltage V2. In this embodiment, the LDO <NUM> is coupled to a <NUM>. 8V DC-DC supply power. 6V mid-power rail can be used for the odd/even pixel drivers. For example, the first voltage V1 may be configured as <NUM>. 2V and the second voltage V2 may be configured as <NUM>. In this way, the modulation signals SI11, SI12 can swing between <NUM>. 2V and <NUM>.

In another example, the second voltage V2 can be designed to be the middle level of the first voltage V1 and third voltage V3, e.g. V1=<NUM>. 2V, V2=<NUM>. 6V and V3=0V, or otherwise the second voltage V2 can be to a voltage level between the first voltage V1 and the third voltage V3 other than the middle value, e.g. V1=<NUM>. 2V, V2=<NUM>. 8V and V3=0V, etc..

The second modulation signal generating circuit <NUM> is configured to generate the modulation signals SI21, SI22 on the input terminals 112A, 112B, wherein the second modulation signal generating circuit <NUM> is operated between the second voltage V2 and third voltage V3. In this embodiment, the second voltage V2 may be configured as <NUM>. 6V and the third voltage V3 may be configured as 0V. In this way, the modulation signals SI21, SI22 can swing between <NUM>.

The symbol "C" represents a collection region and "M" represents a modulation region. The input terminals 111A and 111B, 112A and 112B are used to receive the modulation signals SI11, SI12, SI21 and SI22. The output terminals 111C, 111D, 112C and 112D are used to collect the photo-generated electron/hole carriers inside the first photodetector <NUM> and the second photodetector <NUM>, and output the detecting signals SO11, SO12, SO21 and SO22 accordingly. In one example, the input terminals 111A, 111B, 112A and 112B can be doped or un-doped. For example, the input terminals 111A and 111B, 112A, 112B can be doped with N-type or P-type dopants. In one example, the output terminals 111C, 111D, 112C, 112D can be doped. For example, the out terminals 111C, 111D, 112C, 112D can be doped with N-type or P-type dopants.

This embodiment merely shows a two-pixel (2x) stack architecture (e.g., the photo-detecting apparatus <NUM> stacks two pixels on a current path), but the present application is not limited thereto. That is, a higher degree of pixel (>2x) stack design is possible (e.g., 3X or 4X pixel stack). For example, one may design a four-pixel stack architecture under a <NUM>. 2V voltage room, where a first pixel is operated between <NUM>. 9V, a second pixel is operated between <NUM>. 6V, and a third pixel is operated between <NUM>. 3V and forth pixel is operated between <NUM>. 3V-0V; and at least a current flows from the first pixel to the forth pixel.

In one example, the first modulation signal generating circuit <NUM> may comprise the buffer circuits <NUM> and <NUM>, and the second modulation signal generating circuit <NUM> may comprise the buffer circuits <NUM> and <NUM>. In one example, the buffer circuits <NUM>, <NUM>, <NUM> and <NUM> can be implemented by CMOS inverters. In addition, the MOS transistor used in the buffer circuits <NUM>, <NUM>, <NUM> and <NUM> may be triple-well MOS. For example, the triple-well MOS can be implemented by adding a deep N-well.

The first photodetector <NUM> is configured to generate the first detecting signals SO11, <NUM> on the output terminals 111C, 111D according to the first modulation signals SI11, SI12. The second photodetector <NUM> is configured to generate the second detecting signals SO21, SO22 on the output terminals 112C, 112D according to the second modulation signals SI21, SI22.

The modulation signals SI11, SI12, SI21 and SI22 can be clock signals with a predetermined duty cycle (e.g., <NUM>% or less than <NUM>%) and can also be sinusoidal signals. For example, the clock signals CKN and CKP may be arranged to control the duty cycle of be <NUM>% or below <NUM>%. During operations, the current generated from the low-dropout regulator LDO will flow through the first modulation signal generating circuit <NUM>, the input terminals 111A, 111B, the second modulation signal generating circuit <NUM> and the input terminals 111A, 112B. The current path may be indicated by the additional bold line shown in <FIG>. With the above configurations, the current flowing through at least two photodetectors <NUM> and <NUM> and their respective two modulation signal generating circuits <NUM> and <NUM> can be reused.

In addition to above-mentioned elements, the capacitor <NUM> can be further adopted to reduce the voltage ripple/bouncing of the voltage V2. One terminal of the capacitor <NUM> is coupled to terminals of the buffer circuits <NUM> and <NUM>, and the other terminal of the capacitor <NUM> is coupled to ground or a voltage V3.

Please refer to <FIG>, which is a diagram illustrating an architecture <NUM> including the cross-sectional view of the photodetector <NUM> accompanied by a read-out circuit <NUM> and a read-out circuit <NUM> according to an embodiment of the present application. In this embodiment, a current buffer transistor <NUM> can be added between the reset transistor <NUM> and the photodetector <NUM>, for connecting/disconnecting the photodetector <NUM> and the reset transistor <NUM>. The current buffer transistor <NUM> is able to control the operational voltage of the output terminal 111D. The voltage of output terminal 111D of the first photodetector <NUM> may be substantially maintained at a constant voltage during operation.

In one example, the output terminals 111C, 111D can be biased at <NUM>. 6V and the output terminals 112C, 112D can be biased at 1V. In other words, during operation, the voltages generated at the output terminals 111C, 111D of the photodetector <NUM> and the voltages generated at the output terminals 112C, 112D of the photodetector <NUM> can be different. The read-out circuit <NUM> is the same or symmetrical with the read-out circuit <NUM>, the circuit diagram is omitted here for brevity.

According to this embodiment, photodetector <NUM> uses silicon as a light-absorption material. The input terminals 111A and 111B, and output terminals 112A and 112B can be formed in a silicon region <NUM> (e.g., silicon substrate). Similarly, the photodetector <NUM> may also use silicon as a light-absorption material. The input terminals 112A and 112B, and output terminals 112A and 112B can be formed in the silicon region <NUM> (e.g., silicon substrate). According to some implementations, the silicon region <NUM> can be replaced with other materials (e.g., III-V semiconductor materials).

<FIG> is a diagram illustrating the architecture <NUM> including the cross-sectional view of the photodetector <NUM>' accompanied by the read-out circuit <NUM> and the read-out circuit <NUM> according to another embodiment of the present application. In this embodiment, the photodetector <NUM>'uses germanium as a light-absorption material, where the germanium region <NUM> (which can be viewed as a germanium well) is formed/recessed in the silicon region <NUM> (e.g., silicon substrate); and the input terminals 111A and 111B, and output terminals 112A and 112B can be formed in a germanium region <NUM>. Similarly, the photodetector <NUM> may also use germanium as a light-absorption material. The input terminals 112A and 112B, and output terminals 112A and 112B can be formed in another germanium region (not shown in the figure).

According to some implementations, for designing the photodetector <NUM>', the input terminals 111A and 111B can be formed in the germanium region <NUM> and the output terminals can be formed in the silicon region <NUM>. According to some implementations, the germanium region <NUM> can be replaced with other materials (e.g., III-V semiconductor materials).

For the architecture <NUM>, the voltages operated at the input terminals 111A, 111B, 112A and 112B and the output terminals 111C, 111D, 112C and 112D can refer the aforementioned embodiments.

<FIG> is a flowchart illustrating a current reuse method for a photo-detecting apparatus according to an embodiment of the present application. The current reuse method in this embodiment includes the following steps:.

More particularity, in some embodiments, the first photodetector is operated between a first voltage and a second voltage; and the second photodetector is operated between the second voltage and a third voltage, where the second voltage is between the first voltage and the third voltage.

In some embodiments, the voltage difference between the first voltage and the second voltage is equal to the voltage difference between the second voltage and the third voltage.

In some embodiments, the first modulation signals and the second modulation signals are clock signals with a predetermined duty cycle (e.g., <NUM>% or less than <NUM>%) and can also be sinusoidal signals.

In some embodiments, the input terminals of the first photodetector and the output terminals of the first photodetector are embedded in a Silicon region (e.g., silicon substrate).

In some embodiments, the input terminals of the first photodetector and the output terminals of the first photodetector are embedded in a germanium region, and the Germanium region is formed on a Silicon region (e.g., silicon substrate).

The current reuse method for a photo-detecting apparatus may have some other embodiments, which can refer to the embodiments disclosed in above photo-detecting apparatus. The repeated descriptions are hereby omitted.

The present application provides an optimized approach which redirects the current outputted from odd-column pixels to even-column pixels. In addition to saving power, the peak current can also be halved if two pixels are stacked. Furthermore, by adopting the proposed solutions, a ToF system with modulation regions and collection regions may have various improvements such as the peak current can be lowered, so that the power/ground routing requirement can be simplified or reduced. Accordingly, the overall chip area can also be reduced. Moreover, under the same available DC-DC supply voltage, the power consumption can be significantly reduced by adopting the apparatus and method of the present invention.

Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention.

Claim 1:
A photo-detecting apparatus (<NUM>), comprising:
a first modulation signal generating circuit (<NUM>) coupled to a first photodetector (<NUM>) and operated between a first voltage (V1) and a second voltage (V2), the first modulation signal generating circuit (<NUM>) being configured to generate a first modulation signal (SI11, SI12); and
a second modulation signal generating circuit (<NUM>), coupled to a second photodetector (<NUM>) and operated between the second voltage (V2) and a third voltage (V3), the second modulation signal generating circuit being (<NUM>) configured to generate a second modulation signal (SI21, SI22);
the first photodetector (<NUM>), configured to receive the first modulation signal (SI11, SI12) and to generate at least a first detecting signal (SO11, SO12) according to the first modulation signal (SI11, SI12);
the second photodetector (<NUM>), coupled to the first photodetector (<NUM>), the second photodetector (<NUM>) being configured to receive the second modulation signal (SI21, SI22) and to generate a second detecting signal (SO21, SO22) according to the second modulation signal (SI21, SI22);
wherein the second voltage (V2) is between the first voltage (V1) and the third voltage (V3),
wherein a current is generated during operation and flows through the first modulation signal generating circuit (<NUM>), the first photodetector (<NUM>), the second modulation signal generating circuit (<NUM>) and the second photodetector (<NUM>).