Patent Description:
Electronic devices include mobile devices, servers, base stations, and other devices that enable storage, retrieval, and processing of information. As an illustrative example, a server may communicate with a computer or other device using a wired network, such as a local area network (LAN) or the Internet. As another example, a mobile device may use a wireless network to communicate data with a base station or other device. In some circumstances, data received by an electronic device may be subject to noise or interference, which may reduce signal quality of the data or which may cause the data to be retransmitted.

To improve quality of received signals, certain components of a mobile device may be formed on a glass substrate. For example, a circuit component may be formed on a glass substrate to "isolate" the component in order to reduce effects of noise from other components of the mobile device.

In some applications, a size of the glass substrate may limit a number or size of components that may be formed on the glass substrate. For example, in order to comply with a revision of a particular wireless communication protocol, the number or size of the components may be increased. Increasing a size of the glass substrate to accommodate the increased size or number of components may cause the glass substrate to deviate from a design specification, such as if the glass substrate becomes too large to be included in the mobile device.

<CIT> relates to an inductor that can be used with ICs. <CIT> to embedded chips wherewith passive components such as capacitors and filters are incorporated within the Chip package.

In accordance with the present invention, there is provided a method as set out in claim <NUM> and an apparatus as set out in claim <NUM>. Other aspects of the invention can be found in the dependent claims. The invention is defined in the claims. In the following description, any embodiment referred to and not falling within the scope of the claims is merely an example useful to the understanding of the invention.

One particular advantage provided by at least one of the disclosed examples is reduced size of a device. For example, "relocating" a POG device and a semiconductor die to an interior of a glass substrate may enable reduction of material used to enclose or attach the POG device and the semiconductor die to a surface of the substrate.

<FIG> illustrates a cross-sectional view <NUM> of a glass substrate <NUM>, which does not fall within the scope of the claimed invention, but is useful for understanding the invention.

Depending on the particular implementation, the glass substrate <NUM> may correspond to a substrate of a package configured to enclose an integrated circuit, a substrate of an interposer configured to connect integrated circuits or an integrated circuit and a printed circuit board (PCB), or a substrate of a hybrid integrated circuit (HIC), as illustrative examples.

The glass substrate <NUM> includes a passive-on-glass (POG) device <NUM>. The POG device <NUM> is integrated within the glass substrate <NUM>. The POG device <NUM> includes one or more passive components, such as one or more inductors, one or more capacitors, a filter circuit (e.g., a bandpass filter circuit), one or more other components, or a combination thereof.

The glass substrate <NUM> also includes a semiconductor die <NUM> (e.g., a silicon semiconductor die). The semiconductor die <NUM> is integrated within the glass substrate <NUM>. The semiconductor die <NUM> includes one or more active components, such as one or more transistors. In an illustrative example, the semiconductor die <NUM> includes multiple switches each including a transistor. The semiconductor die <NUM> is coupled to the POG device <NUM>. For example, an output of the POG device <NUM> may be coupled to an input of the semiconductor die <NUM> via one or more traces or wires, as an illustrative example.

In some examples, the POG device <NUM> and the semiconductor die <NUM> are "relocated" from a surface <NUM> of the glass substrate <NUM> (e.g., in connection with a first design of the glass substrate <NUM>) to an interior of the glass substrate <NUM> (e.g., to create a second design of the glass substrate <NUM>). As a result, circuitry attached to the surface <NUM> may be reduced or eliminated, enabling reduced thickness of the glass substrate <NUM>. Further, a molding material used to enclose the circuitry may also be reduced or eliminated, further reducing thickness of the glass substrate <NUM>.

To further illustrate, <FIG> also depicts an illustrative example of a circuit diagram of a system <NUM> that includes the glass substrate <NUM>. The system <NUM> further includes an antenna <NUM> coupled to the POG device <NUM>. For example, the antenna <NUM> may be coupled to an input of the POG device <NUM>.

In the example of the system <NUM>, the POG device <NUM> includes a multiband bandpass filter <NUM>. The multiband bandpass filter <NUM> may include multiple bandpass filter circuits in accordance with a carrier aggregation technique. For example, the POG device <NUM> may include a triplexer (TPX) circuit, and the TPX circuit may include multiple bandpass filter circuits, such as a low-band filter circuit, a high-band filter circuit, and a middle-band filter circuit. The multiband bandpass filter <NUM> may be configured to operate in accordance with a carrier aggregation technique that selectively combines multiple channels (e.g., downlink channels). An input of the multiband bandpass filter <NUM> is coupled to the antenna <NUM>. The POG device <NUM> includes multiple outputs, such as a first output <NUM>, a second output <NUM>, and a third output <NUM>.

The POG device <NUM> includes one or more other components, such as one or more inductors, one or more capacitors, one or more other components, or a combination thereof. For example, the multiband bandpass filter <NUM> may be coupled to a capacitor <NUM> and to an inductor <NUM>. As another example, the multiband bandpass filter <NUM> may be coupled to a capacitor <NUM> and to an inductor <NUM>.

The semiconductor die <NUM> includes a plurality of switches. For example, the plurality of switches may include metal-oxide-semiconductor field-effect transistors (MOSFETs) formed within the semiconductor die <NUM>. The plurality of switches may include a first set of one or more switches <NUM> coupled to the first output <NUM> and may further include a second set of one or more switches <NUM> coupled to the second output <NUM>. The semiconductor die <NUM> may include one or more output terminals (e.g., an output terminal <NUM>), such as a terminal of an input/output (I/O) interface of the semiconductor die <NUM>.

During operation, the system <NUM> receives a signal (e.g., a radio frequency (RF) signal) using the antenna <NUM>. The antenna <NUM> may provide the signal to the POG device <NUM> (e.g., to the multiband bandpass filter <NUM>). The signal may be received in accordance with a carrier aggregation technique (e.g., using multiple carriers of a wireless network).

The multiband bandpass filter <NUM> is configured to generate multiple signals based on the signal from the antenna <NUM>. In an illustrative example, the POG device <NUM> is configured to generate a high-band (HB) signal at the first output <NUM>, to generate a middle band (MB) signal at the second output <NUM>, and to generate a low-band (LB) signal at the third output <NUM>. The HB signal, the MB signal, and the LB signal may correspond to a signal sent by a transmitter in a wireless communication system using a carrier aggregation technique. In the illustrative example of <FIG>, the third output <NUM> is not connected to a switch. In this case, the LB signal may correspond to signal that is utilized during operation within multiple wireless networks. In other implementations, the third output <NUM> may be coupled to one or more switches of the semiconductor die <NUM>.

The semiconductor die <NUM> is configured to receive one or more signals from the POG device <NUM>. For example, the first set of one or more switches <NUM> may be configured to receive the HB signal and to selectively enable or disable the HB signal. As another example, the second set of one or more switches <NUM> may be configured to receive the MB signal and to selectively enable or disable the MB signal. In an illustrative example, the first set of one or more switches <NUM> and the second set of one or more switches <NUM> are coupled to a controller or a processor that controls activation and deactivation of the first set of one or more switches <NUM> and the second set of one or more switches <NUM>.

To further illustrate, in a first mode of operation (e.g., a non-aggregation mode), the LB signal may be output by the system <NUM>. In this example, the sets of switches <NUM>, <NUM> may be deactivated, such as by receiving a first control signal having a first value at the first set of one or more switches <NUM> and by receiving a second control signal having the first value at the second set of one or more switches <NUM>. In a second mode of operation (e.g., a duplexing carrier aggregation mode), the LB signal and the HB signal may be output by the system <NUM>. In this example, the first set of one or more switches <NUM> may be activated and the second set of one or more switches <NUM> may be deactivated, such as by receiving the first control signal having a second value at the first set of one or more switches <NUM> and by receiving the second control signal having the first value at the second set of one or more switches <NUM>. In a third mode of operation (e.g., another duplexing carrier aggregation mode), the LB signal and the MB signal may be output by the system <NUM>. In this example, the first set of one or more switches <NUM> may be deactivated and the second set of one or more switches <NUM> may be activated, such as by receiving the first control signal having the first value at the first set of one or more switches <NUM> and by receiving the second control signal having the second value at the second set of one or more switches <NUM>. In a fourth mode of operation (e.g., a triplexing carrier aggregation mode), the LB signal, the HB signal, and the MB signal may be output by the system <NUM>. In this example, the sets of switches <NUM>, <NUM> may be activated, such as by receiving the first control signal having the second value at the first set of one or more switches <NUM> and by receiving the second control signal having the second value at the second set of one or more switches <NUM>.

The semiconductor die <NUM> may provide one or more selected signals to another device. For example, the semiconductor die may provide one or more of the HB signal, the MB signal, and the LB signal to a particular device component, such as to a low noise amplifier (LNA) of a receiver device, as an illustrative example.

One or more aspects of <FIG> may reduce a size of a device. For example, by relocating the POG device <NUM> and the semiconductor die <NUM> from the surface <NUM> of the glass substrate <NUM> to an interior of the glass substrate <NUM>, circuitry attached to the surface <NUM> may be reduced or eliminated, enabling reduced thickness of the glass substrate <NUM>. Further, a molding material used to enclose the circuitry may also be reduced or eliminated, further reducing thickness of the glass substrate <NUM>.

Further, one or more aspects of <FIG> may improve performance of a device. For example, in an illustrative implementation, "extra" thickness of the glass substrate <NUM> (as a result of removing the circuitry and/or the molding) may be allocated to a three-dimensional (3D) inductor formed in the POG device <NUM> within the glass substrate <NUM>. The 3D inductor may have a greater quality factor (Q factor) as compared to a planar inductor, yielding improved device performance, as described further with reference to <FIG>.

<FIG> depicts a cross section <NUM> of a first example, which does not fall within the scope of the claimed invention, but is useful for understanding the invention, of the glass substrate <NUM> of <FIG>. In <FIG>, the glass substrate <NUM> includes a glass material <NUM>. Unshaded regions within the glass substrate <NUM> of <FIG> may indicate an organic material or a polymer material, such as a polymer material <NUM>. The glass substrate <NUM> may further include a dielectric material <NUM>.

The glass substrate <NUM> includes a conductive loop <NUM>. In some implementations, the conductive loop <NUM> may include a through-glass via (TGV) or other structure. The conductive loop <NUM> may be included in a passive device, such as the POG device <NUM> of <FIG>. In an illustrative example, the conductive loop is included in a capacitor, such as the capacitor <NUM> or the capacitor <NUM>. In another example, the conductive loop <NUM> is included in a 3D inductor of the multiband bandpass filter <NUM> of <FIG>. In another example, the conductive loop <NUM> may be included in the inductor <NUM>, the inductor <NUM>, or another inductor.

The glass substrate <NUM> may further include a TGV <NUM>. In an illustrative example, the TGV <NUM> is coupled to an I/O interface of the semiconductor die <NUM>. The TGV <NUM> may connect the semiconductor die <NUM> to one or more other components, such as to an LNA of a receiver device, as an illustrative example.

The glass substrate <NUM> may further include one or more capacitors, such as a metal-insulator-metal (MIM) capacitor <NUM>. In some examples, the MIM capacitor <NUM> corresponds to the capacitor <NUM> or the capacitor <NUM>. The MIM capacitor <NUM> may include a dielectric region <NUM>, such as an aluminum oxide (AlOx) material, a silicon nitride (SiNx) material, another material, or a combination thereof. The MIM capacitor <NUM> includes a first electrode <NUM> and a second electrode that includes an upper surface of the conductive loop <NUM>. The dielectric region <NUM> is disposed between the first electrode <NUM> and the second electrode.

The glass substrate <NUM> may further include one or more contacts, such as a contact <NUM>. The contact <NUM> may adjoin the first electrode <NUM> of the MIM capacitor <NUM>. The contact <NUM> may be formed by drilling the polymer material <NUM> to create a cavity and by filling the cavity with a metal (e.g., copper), as an illustrative example.

Although the example of <FIG> depicts that the TGV <NUM> is positioned above the semiconductor die <NUM>, in other implementations, the MIM capacitor <NUM> is positioned above the semiconductor die <NUM>. For example, the dielectric region <NUM> may be formed on or above the semiconductor die <NUM>, and the MIM capacitor <NUM> may be formed on the dielectric region <NUM>.

One or more aspects of <FIG> may improve performance of a device. For example, in an illustrative implementation, "extra" thickness of the glass substrate <NUM> (as a result of removing circuitry and/or molding from a surface of the glass substrate <NUM>) may be allocated to a 3D inductor formed within the glass substrate <NUM>. The 3D inductor may have a greater quality factor (Q factor) as compared to a planar inductor, yielding improved device performance. Further, in some implementations, the 3D inductor has a "wrap-around" configuration (e.g., to wrap around the semiconductor die <NUM>) to further increase device packing density, as described further with reference to <FIG>.

<FIG> illustrates a cross section <NUM> of a second example, which falls within the scope of the claimed invention, of the glass substrate <NUM>. In this example, the glass substrate <NUM> includes a 3D inductor <NUM> having a wrap-around configuration that at least partially surrounds the semiconductor die <NUM>, which may increase device packing density of a device that includes the glass substrate <NUM>.

The 3D inductor <NUM> may include one or more TGVs, such as TGVs <NUM>, <NUM>. The 3D inductor <NUM> may be in contact with the glass material <NUM> and the polymer material <NUM>. The 3D inductor <NUM> includes a trace <NUM> (e.g., a first planar metallic region) disposed at a first side of the semiconductor die <NUM> and further includes a trace <NUM> (e.g., a second planar metallic region) disposed at a second side of the semiconductor die <NUM>. Additional illustrative aspects of the 3D inductor <NUM> are described further with reference to <FIG>.

Referring to <FIG>, an illustrative example, which falls within the scope of the claimed invention, of a process is depicted and generally designated <NUM>. <FIG> depicts an overhead view of illustrative aspects of the glass substrate <NUM> during the process <NUM>, at <NUM> and at <NUM>. <FIG> also depicts a perspective view of illustrative aspects of the glass substrate <NUM> during the process <NUM>, at <NUM>.

The process <NUM> includes performing a forming a plurality of holes in the glass substrate <NUM>, at <NUM>. For example, a drilling process may be used to form the plurality of holes, such as a hole <NUM>. The plurality of holes includes a first subset <NUM> and a second subset that is distinct from the first subset <NUM>. A distance between holes of the first subset <NUM> may be less than a distance between holes of the second subset (e.g., the first subset <NUM> may be "packed" more closely as compared to holes of the second subset). The first subset <NUM> may correspond to a perimeter of a cavity to be formed in the glass substrate <NUM>. The second subset may correspond to a set of TGVs to be formed in the glass substrate <NUM>, such as TGVs of one or more of the inductors <NUM>, <NUM>, and <NUM>.

The process <NUM> further includes performing an etch process, at <NUM>. In a particular illustrative example, the etch process is a wet etch. In other examples, another etch process may be used, such as a dry etch. Performing the etch process removes material from the glass substrate <NUM>. For example, performing the etch process may enlarge a diameter of one or more holes formed in the glass substrate <NUM>, such as by enlarging a first diameter of the hole <NUM> to a second diameter (e.g., from approximately <NUM> microns to approximately <NUM> microns, as an illustrative example). Removing material from the glass substrate <NUM> using the etch process may "punch through" the first subset <NUM> to form a cavity <NUM>.

The process <NUM> further includes integrating the semiconductor die <NUM> within the cavity <NUM> and forming one or more inductors using the second subset of the plurality of holes, at <NUM>. To illustrate, <FIG> depicts that holes formed in the glass substrate <NUM> may be filled to form TGVs of a 3D inductor <NUM>, such as using one or more of a deposition process, a patterning process, or a plating process, as illustrative examples. As a particular illustrative example, the hole <NUM> may be filled with a copper material to form a TGV <NUM> of the 3D inductor <NUM>. TGVs of the 3D inductor <NUM> may be connected using traces, such as a trace <NUM>. The trace <NUM> may be coupled to one or more device components, such as to the antenna <NUM>, the semiconductor die <NUM>, or another device component. Depending on the particular example, the 3D inductor <NUM> may correspond to the inductor <NUM>, the inductor <NUM>, an inductor included in the multiband bandpass filter <NUM>, or another inductor.

<FIG> also illustrates that the 3D inductor <NUM> may have a wrap-around configuration that wraps around the semiconductor die <NUM>. To illustrate, the trace <NUM> may be disposed above a first surface (e.g., a top surface) of the semiconductor die <NUM>, and the trace <NUM> may be disposed below a second surface (e.g., a bottom surface) of the semiconductor die <NUM>. The TGV <NUM> may be disposed next to a first side of the semiconductor die <NUM>, and the TGV <NUM> may be disposed next to a second side of the semiconductor die <NUM>.

In some implementations, a drilling process performed at <NUM> of <FIG> and an etch process performed at <NUM> of <FIG> may correspond to a two-stage process that enables formation of the cavity <NUM> without use of a special purpose tool or process. For example, the two-stage process may "punch through" the first subset <NUM> to form the cavity <NUM> without use of a special purpose mask. As a result, the semiconductor die <NUM> may be integrated within the glass substrate <NUM> without use of a special purpose tool or process, thus reducing cost of fabrication of the glass substrate <NUM>.

Referring to <FIG>, an illustrative method of fabrication, which does not fall within the scope of the claimed invention, but is useful for understanding the invention, of a device is depicted and generally designated <NUM>. The method <NUM> may be performed during fabrication of the glass substrate <NUM>, as an illustrative example. In some implementations, the method <NUM> may be performed on a glass panel that includes multiple glass substrates corresponding to the glass substrate <NUM> (e.g., to create multiple glass substrates corresponding to the glass substrate <NUM>).

The method <NUM> includes defining a plurality of holes in a glass substrate (e.g., using a drilling process, such as a laser drilling process), at <NUM>. The plurality of holes includes at least a first subset corresponding to a cavity to be formed in the glass substrate. For example, <FIG> illustrates that a plurality of holes may be formed in the glass substrate <NUM>. The plurality of holes may include the first subset <NUM> corresponding to the cavity <NUM> to be formed in the glass substrate <NUM>.

The method <NUM> further includes removing material (e.g., using a wet etch process) defining the first subset to define the cavity, at <NUM>. In an illustrative implementation, the material is removed using an etch process, such as a wet etch process. The etch process may "punch" through the first subset <NUM> to define the cavity <NUM> and may enlarge diameters of a second subset of the plurality of holes (e.g., by enlarging a diameter of the hole <NUM>, as illustrated at <NUM> and at <NUM> in <FIG>).

The method <NUM> further includes forming a passive device using a second subset of the plurality of holes, at <NUM>. For example, the passive device may be formed using a patterning process and a plating process, such as a copper plating process. The passive device may include one or more 3D inductors, such as the 3D inductor <NUM>, the 3D inductor <NUM>, another component, or a combination thereof. The plating process may include filling the hole <NUM> to form the TGV <NUM>. The plating process may also include forming the TGVs <NUM>, <NUM>. The plating process may be performed at multiple sides of the glass substrate <NUM>. For example, the plating process may be performed at a first side (e.g., a bottom side) of the glass substrate <NUM> to form the trace <NUM> and may be performed at a second side (e.g., a top side) of the glass substrate <NUM> to form the traces <NUM>, <NUM>.

The method <NUM> may include forming a capacitor (e.g., the MIM capacitor <NUM>) in the glass substrate, at <NUM>. As an illustrative example, a MIM capacitor process may be performed to create the dielectric region <NUM> of <FIG> and <FIG>, such as by depositing and patterning an insulator material on an upper surface of the conductive loop <NUM>. The insulator material may include an AlOx material, a SiNx material, another material, or a combination thereof. The MIM capacitor process may also include forming the first electrode <NUM> (e.g., by depositing and patterning a copper material).

The method <NUM> further includes integrating a semiconductor die within the cavity, at <NUM>. For example, the semiconductor die <NUM> may be inserted in the cavity <NUM>. In some implementations, an adhesive material (e.g., adhesive tape) may be applied to one or more surfaces of the glass substrate <NUM> that define the cavity <NUM>. For example, an adhesive material may be applied to a bottom surface of the glass substrate <NUM> (e.g., by applying the adhesive material to mask or "cover" the cavity <NUM>), and the semiconductor die <NUM> may be positioned in the cavity <NUM> and connected to the adhesive material.

The method <NUM> may include performing a lamination process (e.g., using a polymer material), at <NUM>. The lamination process may include applying one or more of a curable material, an organic material, a polymer material, a "pre-preg" material, an epoxy material, or another material to the glass substrate <NUM>. For example, the lamination process may include forming the polymer material <NUM> (e.g., to enclose or "seal" the semiconductor die <NUM> within the cavity <NUM>). In an illustrative example, the lamination process is performed at a first surface (e.g., a top surface) of the glass substrate <NUM> prior to performing the lamination process at a second surface (e.g., a bottom surface) of the glass substrate <NUM>. An adhesive material used to secure the semiconductor die <NUM> may be removed after lamination of the first surface. After removing the adhesive material, the lamination process may be performed at the second surface (e.g., after rotating the glass substrate <NUM> to expose the second surface).

The method <NUM> may include performing a drilling process (e.g., a laser drilling process) to define at least one region for an interconnect, at <NUM>. For example, the drilling process may be applied to form a region for the TGV <NUM>.

The method <NUM> may include forming the interconnect (e.g., using a metallization process), at <NUM>. For example, the metallization process may include depositing a copper material to form the TGV <NUM>.

The method <NUM> may include performing a passivation process, at <NUM>. For example, the passivation process may be performed to create the dielectric material <NUM>.

It is noted that certain operations of the method <NUM> may be performed in a different order than as illustrated in the example of <FIG>. For example, in some cases, the semiconductor die <NUM> may be integrated within the cavity <NUM> prior to forming one or more components of the passive device, at <NUM>, prior to forming the capacitor, at <NUM>, or prior to both. As a particular illustrative example, in a "wraparound" implementation, the semiconductor die <NUM> may be integrated within the cavity <NUM> prior to forming one or both of the traces <NUM>, <NUM>, prior to forming one or both of the TGVs <NUM>, <NUM>, or a combination thereof. As an additional illustrative example, in some implementations, the MIM capacitor <NUM> may be formed above the semiconductor die <NUM> after the semiconductor die <NUM> is integrated within the cavity <NUM> and after performing the lamination process, at <NUM> and at <NUM>.

Referring to <FIG>, an illustrative example of a method falling within the scope of the claimed invention is depicted and generally designated <NUM>. The method <NUM> may be performed during operation of an electronic device that includes the glass substrate <NUM>.

The method <NUM> includes receiving a signal at a multiband bandpass filter within a glass substrate, at <NUM>. For example, a signal may be received by the multiband bandpass filter <NUM> from the antenna <NUM>. The multiband bandpass filter <NUM> is integrated within the glass substrate <NUM>.

The method <NUM> further includes generating a set of output signals by the multiband bandpass filter based on the signal (e.g., using a multiband pass filtering technique), at <NUM>. For example, the set of output signals may include one or more of the HB signal, the MB signal, or the LB signal.

The method <NUM> further includes selecting one or more output signals of the set of output signals using a set of switches included within the glass substrate, at <NUM>. For example, the first set of one or more switches <NUM> may be activated to select the HB signal. As another example, the second set of one or more switches <NUM> may be activated to select the MB signal.

Referring to <FIG>, a block diagram of a particular illustrative example of an electronic device is depicted and generally designated <NUM>. The electronic device <NUM> may correspond to a mobile device (e.g., a cellular phone), a computer (e.g., a server, a laptop computer, a tablet computer, or a desktop computer), an access point, a base station, a wearable electronic device (e.g., a personal camera, a headmounted display, or a watch), a vehicle control system or console, an autonomous vehicle (e.g., a robotic car or a drone), a home appliance, a set top box, an entertainment device, a navigation device, a personal digital assistant (PDA), a television, a monitor, a tuner, a radio (e.g., a satellite radio), a music player (e.g., a digital music player or a portable music player), a video player (e.g., a digital video player, such as a digital video disc (DVD) player or a portable digital video player), a robot, a healthcare device, another electronic device, or a combination thereof.

The electronic device <NUM> includes one or more processors, such as a processor <NUM>. The processor <NUM> may include a digital signal processor (DSP), a central processing unit (CPU), a graphics processing unit (GPU), another processing device, or a combination thereof.

The electronic device <NUM> may further include one or more memories, such as a memory <NUM>. The memory <NUM> may be coupled to the processor <NUM>. The memory <NUM> may include random access memory (RAM), magnetoresistive random access memory (MRAM), flash memory, read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), one or more registers, a hard disk, a removable disk, a compact disc read-only memory (CD-ROM), another memory device, or a combination thereof.

The instructions <NUM> are executable by the processor <NUM> to initiate, control, or perform one or more operations, such as operations of the method <NUM> of <FIG>.

A coder/decoder (CODEC) <NUM> can also be coupled to the processor <NUM>. The CODEC <NUM> may be coupled to one or more microphones, such as a microphone <NUM>. <FIG> also shows a display controller <NUM> that is coupled to the processor <NUM> and to a display <NUM>. A speaker <NUM> may be coupled to the CODEC <NUM>.

<FIG> also indicates that a radio frequency (RF) device <NUM> may be coupled to the system <NUM> of <FIG>. The RF device <NUM> may include a transceiver, as an illustrative example. Alternatively or in addition, the RF device <NUM> may include one or more LNAs coupled to the semiconductor die <NUM>. Alternatively or in addition, the RF device <NUM> may include a wireless controller configured to selectively activate and deactivate the sets of switches <NUM>, <NUM>. As an illustrative example, the RF device <NUM> may include a wireless controller configured to selectively activate and deactivate the sets of switches <NUM>, <NUM> in response to commands from the processor <NUM> based on a carrier aggregation mode used in a wireless network.

In the example of <FIG>, the POG device <NUM> includes a triplexer (TPX) circuit <NUM>. The TPX circuit <NUM> is an example of a filter that may correspond to the multiband bandpass filter <NUM> of <FIG>. In other implementations, the POG device <NUM> may include another device, such as a diplexer (DPX) circuit or a quadplexer (QPX) circuit, as illustrative examples.

In a particular example, the processor <NUM>, the memory <NUM>, the display controller <NUM>, the CODEC <NUM>, and the RF device <NUM> are included in a system-on-chip (SoC) device <NUM>. Further, an input device <NUM> and a power supply <NUM> may be coupled to the SoC device <NUM>. Moreover, in a particular example, as illustrated in <FIG>, the system <NUM>, the display <NUM>, the input device <NUM>, the speaker <NUM>, the microphone <NUM>, the antenna <NUM>, and the power supply <NUM> are external to the SoC device <NUM>. However, each of the system <NUM>, the display <NUM>, the input device <NUM>, the speaker <NUM>, the microphone <NUM>, the antenna <NUM>, and the power supply <NUM> can be coupled to a component of the SoC device <NUM>, such as to an interface or to a controller.

In some examples, the glass substrate <NUM> corresponds to a substrate of a package that includes the SoC device <NUM>. In another example, the glass substrate <NUM> corresponds to an interposer coupled to the SoC device <NUM> and to one or more other components, such as a printed circuit board (PCB) or another integrated circuit. In another example, the glass substrate <NUM> corresponds to a substrate of a HIC that includes or that is coupled to the SoC device <NUM>.

Although certain examples have been described with reference to a receiver implementation, aspects of the disclosure may be used in connection with a transmitter implementation (alternatively or in addition to a receiver implementation). To illustrate, in an illustrative example of a transmitter implementation of the RF device <NUM>, the POG device <NUM> may include a multiplexing device configured to combine multiple signals of different frequencies received from the semiconductor die <NUM> and to generate an output signal that is transmitted via a wireless network using the antenna <NUM> (e.g., in accordance with a carrier aggregation technique).

In addition, although three signals have been described with reference to <FIG> (the HB signal, the MB signal, and the LB signal), in other implementations, a different number of signals may be used (e.g., one signal, four signals, or another number of signals). To further illustrate, a diplexer (DPX) circuit may be implemented in place of the TPX circuit <NUM>, such as in connection with a two-signal implementation or in connection with a three-signal implementation (e.g., using a dual-stage DPX circuit).

In connection with the described examples, an apparatus includes means for bandpass filtering (e.g., the POG device <NUM>, the multiband bandpass filter <NUM>, or both) a signal (e.g., a signal from the antenna <NUM>). The means for filtering is integrated within a glass substrate, such as the glass substrate <NUM>. The apparatus further includes means (e.g., the semiconductor die <NUM>, the first set of one or more switches <NUM>, the second set of one or more switches <NUM>, or a combination thereof) for selecting one or more output signals of a set of output signals generated by the means for bandpass filtering. The means for selecting is integrated within the glass substrate.

The foregoing disclosed devices and functionalities may be designed and represented using computer files (e.g. RTL, GDSII, GERBER, etc.). The computer files may be stored on computer-readable media. Some or all such files may be provided to fabrication handlers who fabricate devices based on such files. Resulting products include wafers that are then cut into die and packaged into integrated circuits (or "chips"). The chips are then employed in electronic devices, such as the electronic device <NUM> of <FIG>.

The various illustrative logical blocks, configurations, modules, circuits, and algorithm steps described in connection with the examples disclosed herein may be implemented as electronic hardware, computer software executed by a processor, or combinations of both. Various illustrative components, blocks, configurations, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or processor executable instructions depends upon the particular application and design constraints imposed on the overall system.

Claim 1:
A method of operation of a device, the method comprising:
receiving (<NUM>) a signal using a multiband bandpass filter and a three-dimensional, 3D, inductor (<NUM>) having a wrap-around configuration that are included within a glass substrate (<NUM>);
based on the signal, generating (<NUM>) a set of output signals by the multiband bandpass filter; and
selecting (<NUM>) one or more output signals of the set of output signals using an integrated circuit (<NUM>) which includes one or more switches included within the glass substrate, wherein the 3D inductor at least partially surrounds the integrated circuit.