Patent Description:
<NPL>, describes a decoder-side intra mode derivation (DIMD) approach based on JEM. The DIMD approach derives the intra prediction mode and reduces the overhead of intra mode signaling. Because no mode signaling is needed in DIMD, intra prediction can be performed at higher granularity than in JEM.

<CIT> describes systems and methods related to video encoding and decoding using decoder-side intra mode derivation (DIMD). In a method of coding samples in a block in a video, an intra coding mode is selected based on a plurality of reconstructed samples in a template region adjacent to the block, and the samples in the block are predicted with intra prediction using the selected intra coding mode. The intra coding mode may be selected by testing a plurality of candidate intra coding modes for cost (e.g., distortion) of predicting the template region from a set of reconstructed reference samples. The mode with the lowest cost is used for prediction. Explicit signaling of the intra mode is not required.

The article "<NPL> describes an intra coding algorithm for the Versatile Video Coding Test Model that skips the mode signaling at the encoder side and leaves it to be derived at the decoder side. A Histogram of Gradient (HoG) is computed form the texture of the previously reconstructed pixels and processed to derive the intra mode. The proposed method is tuned to minimize its side-effects on the existing intra coding tools.

The invention is defined in the appended independent claims. Optional features are defined in the dependent claims.

In general, this disclosure describes techniques for coding video data using derived intra mode deviation (DIMD). To perform intra mode coding without DIMD, a video coder (e.g., a video encoder and/or a video decoder) may construct a list of intra mode candidates (e.g., a most probable mode (MPM) list) and signal which candidate from the list is used as the intra mode for the current block. To perform intra mode coding with DIMD, a video decoder may implicitly derive intra modes for a current block based on reconstructed samples of neighboring blocks and predict the current block based on a blending of the derived intra modes. The video encoder may determine whether to predict the current block using DIMD or not and signal a syntax element that indicates whether the current block is predicted using DIMD or predicted using the list (e.g., not predicted using DIMD). However, implementations of DIMD may present various disadvantages. For instance, implementations of DIMD prediction may involve a video encoder determining whether to perform intra prediction using a blended prediction from a plurality of DIMD derived modes or from a single mode. Such implementations may sacrifice robustness wherein the optimal prediction mode is one of the DIMD derived modes, but optimal prediction might be from a single prediction only (e.g., as opposed to blended prediction from the DIMD derived modes).

Unless explicitly indicated as "embodiment according to the claimed invention", any embodiment [example, aspect, implementation,. ] in the description may include some but not all features as literally defined in the claims and are present for illustration purposes only. Video coding standards include ITU-T H. <NUM>, ISO/IEC MPEG-<NUM> Visual, ITU-T H. <NUM> or ISO/IEC MPEG-<NUM> Visual, ITU-T H. <NUM>, ISO/IEC MPEG-<NUM> Visual (MPEG-<NUM> Part <NUM>), ITU-T H. <NUM> (also known as ISO/IEC MPEG-<NUM> AVC), including its Scalable Video Coding (SVC) and Multiview Video Coding (MVC) extensions, ITU-T H. <NUM> (also known as ISO/IEC MPEG-<NUM> HEVC) with its extensions, and Video Coding (VVC) standardization activity (also known as ITU-T H.

In <NPL>), <NPL>), <NPL>), <NPL> ), decoder side intra mode derivation (DIMD) is proposed as a coding tool for intra prediction. A difference from existing intra prediction tools is that, when performing DIMD, a video coder may not explicitly signal intra mode. Instead, the video coder may implicitly derive intra mode using reconstructed samples of neighboring blocks. The purpose is for coding efficient improvement by saving signalling of intra mode. Note that DIMD may only apply to luma. For chroma, classical intra coding mode may apply.

In some examples, to perform DIMD for a current block, a video coder may perform gradient calculation to derive one or more possible modes (e.g., M1 and M2). The video coder may then predict the current block using each of the derived one or more possible modes to generate intermediate prediction blocks, and generate an output prediction as a function of the intermediate prediction blocks. Details of an example DIMD workflow are as follows:.

A video coder may perform gradient calculation of reconstructed samples of neighboring blocks. To derive the intra prediction mode for a block, the video coder may select a set of neighboring pixels from neighboring reconstructed luma samples as shown in <FIG>. The video coder may then apply gradient calculation to the center pixel of every 3x3 window formed by the set of neighboring pixels. Note that if a neighboring pixel is not reconstructed, its gradient values may not be calculated.

The video coder may perform gradient calculation using Sobel filters (denoted as "Mx", "My"). Dot production between these <NUM> filters and each 3x3 window (denoted as "W") may be performed to derive horizontal and vertical gradients (denoted as "Gx", "Gy") respectively. The following may be examples of such filters: <MAT> Gx = Mx*W and Gy = My*W.

The video coder may map gradient values to a direction. For instance, the video coder may derive the intensity (G) and the orientation (O) for each window using Gx and Gy: <MAT>.

In some examples, to reduce the computational cost of the operation arctangent ("atan"), the orientation may be represented by an index value (in range of <NUM> to <NUM>) using a mapping table "atan", and it may be estimated by comparing the mapping table and Gy/Gx; if Gy/Gx falls into the range of (atan[i], atan[i+<NUM>]), the orientation is assigned value "i". Note that intensity G is <NUM>, O is assigned to <NUM> (planar mode) by default. <FIG> is a graph illustrating an example of orientation index mapping using horizontal and vertical gradients.

In the example of <FIG>, for a given 3x3 window, it (e.g., the index value) satisfies: <MAT>.

The orientation may be mapped to prediction direction <NUM>.

The video coder may perform selection of two most possible modes. The video coder may accumulate the intensity values for each orientation index of all 3x3 windows. The video coder may select the top two directions with highest sum as two most possible modes (denote mode of highest sum as a first mode "M1" and second highest as a second mode "M2"). Note that If values are all zero, planar mode will be selected. <FIG> is a graph illustrating a selection of two most possible prediction modes. In the example of <FIG>, the video coder may select mode <NUM> at the first mode M1 and mode <NUM> as the second mode M2 as <NUM> and <NUM> are, respectively, the first and second highest sums of amplitudes.

The video coder may perform prediction of DIMD. As shown in <FIG>, if sum of amplitudes of second most possible mode is <NUM> (e.g., if Σamplitude[M2] == <NUM>), the video coder may perform normal intra prediction may be performed with mode M1; otherwise, the video coder may generate an output prediction block as a weighted sum of three prediction blocks (M1, M2, and Planar mode). This may be referred to as performing a blended prediction (e.g., as the modes are blended to generate a single prediction). As one example, the video coder may generate a weight for each of the prediction blocks (e.g., ω<NUM> for M1, ω<NUM> for M2, and ω<NUM> for Planar mode) in accordance with the following equations: <MAT> <MAT> <MAT>.

The video coder may generate intermediate prediction blocks (e.g., Pred<NUM> for M1, Pred<NUM> for M2, and Pred<NUM> for Planar mode) based on reference pixels. The video coder may apply the weights to the intermediate prediction blocks to generate the output prediction block in accordance with the following equation: <MAT>.

The video coder may perform signalling of DIMD mode. <FIG> is a flow diagram illustrating an example Intra coding process of VVC, and <FIG> modifications to the process of <FIG> when DIMD is included. As shown in <FIG>, a video decoder may parse a DIMD flag. If the DIMD flag is true (e.g., has a value of <NUM>), the video decoder may derive the intra prediction modes and perform prediction as explained above. If the DIMD flag is false (e.g., has a value of <NUM>), the video decoder may parse the intra prediction mode from the bitstream (e.g., construct a MPM list and signal an index into the MPM list) and perform prediction accordingly. As such, in the example of <FIG>, where the DIMD flag is false, the video decoder may not perform DIMD intra mode derivation.

The aforementioned DIMD mechanism may present one or more disadvantages. For instance, the potential of DIMD may not be fully utilized for a number of reasons. As one example, DIMD prediction implicitly determines whether the prediction shall be a blended prediction from a plurality of modes or from a single mode. The aforementioned DIMD mechanism might sacrifice robustness wherein the optimal prediction mode is DIMD derived mode but optimal prediction might be from a single prediction only. As another example, in other cases, the optimal intra mode intra mode might be different from DIMD derived mode but the difference is small (<NUM> or <NUM> index differences). Using normal mode index coding costs more bits but using DIMD derived mode does not leads to best RD performance.

In accordance with one or more techniques of this disclosure, a video coder (e.g., a video encoder and/or a video decoder) may insert DIMD derived modes into a MPM list. As such, a video coder may code a block using DIMD derived mode in MPM list for intra prediction.

<FIG> is a flow diagram illustrating an example technique for intra block decoding with DIMD most probable mode (MPM) list construction, in accordance with one or more techniques of this disclosure. A comparison of <FIG> and <FIG> yields several differences. For instance, compared with JVET DIMD design (<FIG>), a video coder performing the techniques of this disclosure (<FIG>) may perform DIMD mode derivation regardless whether current block is predicted using DIMD mode, and the derived modes are added into MPM list (MPM list construction process is therefore postponed after DIMD process).

For blocks with DIMD flag equal to true, the video coder may perform DIMD prediction as explained above. For blocks with DIMD flag equal to false, the video coder may perform normal intra prediction, and add DIMD derived mode into MPM list. As such, the video coder may use DIMD derived mode for prediction for a block with MPM flag equal to true.

By performing the technique of <FIG>, a video coder may further extend the potential of DIMD and may contribute to coding efficiency improvement, a block might use DIMD derived mode and perform normal prediction by selecting DIMD derived mode (or DIMD derived mode with an offset) in MPM list.

<FIG> is a flow diagram illustrating an example technique of MPM list construction / derivation, in accordance with one or more techniques of this disclosure. The techniques of <FIG> may be performed by a video coder, such as video encoder <NUM> and/or video decoder <NUM>.

As shown in <FIG>, in step <NUM> (<NUM>), the video coder may derive a list of intra modes using reconstructed samples of neighboring blocks by DIMD. In step <NUM> (<NUM>), the video coder may add prediction modes from neighboring blocks into MPM list. In step <NUM> (<NUM>), the video coder may add the list of intra modes derived by DIMD into MPM list. In step <NUM> (<NUM>), the video coder may add more candidates into MPM list using the list of candidates. An example method is to add a plurality of offsets (in range of -<NUM> to <NUM>) to all the candidates in the list, or some of the candidates in the list (for example, first <NUM> candidates). In step <NUM> (<NUM>), the video coder may add default intra modes (DC, planar, horizontal, vertical etc. modes) into MPM list (e.g., insert.

As such, steps <NUM> and/or <NUM> of <FIG> illustrates steps in which the video coder may insert, into the MPM list and after the at least one intra mode from the derived list of intra modes, additional intra mode candidates, which may be one or more default candidates. Additionally or alternatively, step <NUM> may illustrate a step in which the video coder may insert into the MPM list and before the at least one intra mode from the derived list of intra modes, one or more intra mode candidates that are prediction modes from neighboring blocks of the current block.

<FIG> is a flow diagram illustrating an example technique of deriving a list of intra mode by DIMD, in accordance with one or more techniques of this disclosure. The techniques of <FIG> may be performed by a video coder, such as video encoder <NUM> and/or video decoder <NUM>. The technique of <FIG> may be an example of step <NUM> (<NUM>) of the technique of <FIG>.

In <NUM>, the video coder may calculate horizontal and vertical gradient values of each window of neighboring blocks as Gx and Gy. <FIG> illustrates an example window. In <NUM>, for each set of horizontal and vertical gradient values, the video coder may derive the intensity (|Gx|+|Gy|) and orientation values (Gy/Gx) and map each orientation to an intra mode in range of <NUM> to <NUM> (example process is given above). The video coder may also calculate the intensity value as sum of absolute values of horizontal and vertical gradient values, the intensity value may also be calculated as sum of square values of horizontal and vertical gradient values. In <NUM>, for each intra mode, the video coder may accumulate its corresponding intensity values. In <NUM>, the video coder may sort the intra modes according to the accumulated intensity values from high to low. The DIMD list may be the sorted list of intra modes, or only contain partial of the list. The DIMD list can exclude intra modes with sum of intensity values equal to <NUM>. The DIMD list can exclude intra modes with sum of intensity values less than a threshold. The size of the list can be <NUM>, <NUM>, <NUM>, or more. The first candidate can be set to DC or planar mode if all sum of intensity values are <NUM>.

As shown above in <FIG>, in <NUM>, the video coder may add intra prediction modes of neighboring blocks into MPM lists. Example neighboring blocks are left, above, above left, above right and below left blocks as shown in <FIG>.

<FIG> is a flow diagram illustrating a technique of adding DIMD derived modes into MPM list according to the claimed invention. The techniques of <FIG> may be performed by a video coder, such as video encoder <NUM> and/or video decoder <NUM>. The technique of <FIG> may be an example of step <NUM> (<NUM>) of the technique of <FIG>.

In <NUM>, the video coder may add the first candidate with highest sum of intensity (denoted as "M1" as explained above) into MPM list. In <NUM>, the video coder may determine whether the second candidate's sum of intensity is <NUM> (denoted as "M2" as explained above), if it is determined to be <NUM>, the second candidate may be skipped; otherwise, <NUM> will be performed. In <NUM>, the video coder adds the second candidate into MPM list.

Some example variations and/or alternatives follow:.

Some other example variations and/or alternatives follow:.

<FIG> is a block diagram illustrating an example video encoding and decoding system <NUM> that may perform the techniques of this disclosure. The techniques of this disclosure are generally directed to coding (encoding and/or decoding) video data. In general, video data includes any data for processing a video. Thus, video data may include raw, unencoded video, encoded video, decoded (e.g., reconstructed) video, and video metadata, such as signaling data.

As shown in <FIG>, system <NUM> includes a source device <NUM> that provides encoded video data to be decoded and displayed by a destination device <NUM>, in this example. In particular, source device <NUM> provides the video data to destination device <NUM> via a computer-readable medium <NUM>. Source device <NUM> and destination device <NUM> may comprise any of a wide range of devices, including desktop computers, notebook (i.e., laptop) computers, mobile devices, tablet computers, set-top boxes, telephone handsets such as smartphones, televisions, cameras, display devices, digital media players, video gaming consoles, video streaming device, broadcast receiver devices, or the like. In some cases, source device <NUM> and destination device <NUM> may be equipped for wireless communication, and thus may be referred to as wireless communication devices.

In the example of <FIG>, source device <NUM> includes video source <NUM>, memory <NUM>, video encoder <NUM>, and output interface <NUM>. Destination device <NUM> includes input interface <NUM>, video decoder <NUM>, memory <NUM>, and display device <NUM>. In accordance with this disclosure, video encoder <NUM> of source device <NUM> and video decoder <NUM> of destination device <NUM> may be configured to apply the techniques for intra mode derivation for most probably mode list construction. Thus, source device <NUM> represents an example of a video encoding device, while destination device <NUM> represents an example of a video decoding device. In other examples, a source device and a destination device may include other components or arrangements. For example, source device <NUM> may receive video data from an external video source, such as an external camera. Likewise, destination device <NUM> may interface with an external display device, rather than include an integrated display device.

System <NUM> as shown in <FIG> is merely one example. In general, any digital video encoding and/or decoding device may perform techniques for intra mode derivation for most probably mode list construction. Source device <NUM> and destination device <NUM> are merely examples of such coding devices in which source device <NUM> generates coded video data for transmission to destination device <NUM>. This disclosure refers to a "coding" device as a device that performs coding (encoding and/or decoding) of data. Thus, video encoder <NUM> and video decoder <NUM> represent examples of coding devices, in particular, a video encoder and a video decoder, respectively. In some examples, source device <NUM> and destination device <NUM> may operate in a substantially symmetrical manner such that each of source device <NUM> and destination device <NUM> includes video encoding and decoding components. Hence, system <NUM> may support one-way or two-way video transmission between source device <NUM> and destination device <NUM>, e.g., for video streaming, video playback, video broadcasting, or video telephony.

In general, video source <NUM> represents a source of video data (i.e., raw, unencoded video data) and provides a sequential series of pictures (also referred to as "frames") of the video data to video encoder <NUM>, which encodes data for the pictures. Video source <NUM> of source device <NUM> may include a video capture device, such as a video camera, a video archive containing previously captured raw video, and/or a video feed interface to receive video from a video content provider. As a further alternative, video source <NUM> may generate computer graphics-based data as the source video, or a combination of live video, archived video, and computer-generated video. In each case, video encoder <NUM> encodes the captured, pre-captured, or computer-generated video data. Video encoder <NUM> may rearrange the pictures from the received order (sometimes referred to as "display order") into a coding order for coding. Video encoder <NUM> may generate a bitstream including encoded video data. Source device <NUM> may then output the encoded video data via output interface <NUM> onto computer-readable medium <NUM> for reception and/or retrieval by, e.g., input interface <NUM> of destination device <NUM>.

Memory <NUM> of source device <NUM> and memory <NUM> of destination device <NUM> represent general purpose memories. In some examples, memories <NUM>, <NUM> may store raw video data, e.g., raw video from video source <NUM> and raw, decoded video data from video decoder <NUM>. Additionally or alternatively, memories <NUM>, <NUM> may store software instructions executable by, e.g., video encoder <NUM> and video decoder <NUM>, respectively. Although memory <NUM> and memory <NUM> are shown separately from video encoder <NUM> and video decoder <NUM> in this example, it should be understood that video encoder <NUM> and video decoder <NUM> may also include internal memories for functionally similar or equivalent purposes. Furthermore, memories <NUM>, <NUM> may store encoded video data, e.g., output from video encoder <NUM> and input to video decoder <NUM>. In some examples, portions of memories <NUM>, <NUM> may be allocated as one or more video buffers, e.g., to store raw, decoded, and/or encoded video data.

Computer-readable medium <NUM> may represent any type of medium or device capable of transporting the encoded video data from source device <NUM> to destination device <NUM>. In one example, computer-readable medium <NUM> represents a communication medium to enable source device <NUM> to transmit encoded video data directly to destination device <NUM> in real-time, e.g., via a radio frequency network or computer-based network. Output interface <NUM> may modulate a transmission signal including the encoded video data, and input interface <NUM> may demodulate the received transmission signal, according to a communication standard, such as a wireless communication protocol. The communication medium may comprise any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form part of a packet-based network, such as a local area network, a wide-area network, or a global network such as the Internet. The communication medium may include routers, switches, base stations, or any other equipment that may be useful to facilitate communication from source device <NUM> to destination device <NUM>.

In some examples, source device <NUM> may output encoded data from output interface <NUM> to storage device <NUM>. Similarly, destination device <NUM> may access encoded data from storage device <NUM> via input interface <NUM>. Storage device <NUM> may include any of a variety of distributed or locally accessed data storage media such as a hard drive, Blu-ray discs, DVDs, CD-ROMs, flash memory, volatile or non-volatile memory, or any other suitable digital storage media for storing encoded video data.

In some examples, source device <NUM> may output encoded video data to file server <NUM> or another intermediate storage device that may store the encoded video data generated by source device <NUM>. Destination device <NUM> may access stored video data from file server <NUM> via streaming or download.

File server <NUM> may be any type of server device capable of storing encoded video data and transmitting that encoded video data to the destination device <NUM>. File server <NUM> may represent a web server (e.g., for a website), a server configured to provide a file transfer protocol service (such as File Transfer Protocol (FTP) or File Delivery over Unidirectional Transport (FLUTE) protocol), a content delivery network (CDN) device, a hypertext transfer protocol (HTTP) server, a Multimedia Broadcast Multicast Service (MBMS) or Enhanced MBMS (eMBMS) server, and/or a network attached storage (NAS) device. File server <NUM> may, additionally or alternatively, implement one or more HTTP streaming protocols, such as Dynamic Adaptive Streaming over HTTP (DASH), HTTP Live Streaming (HLS), Real Time Streaming Protocol (RTSP), HTTP Dynamic Streaming, or the like.

Destination device <NUM> may access encoded video data from file server <NUM> through any standard data connection, including an Internet connection. This may include a wireless channel (e.g., a Wi-Fi connection), a wired connection (e.g., digital subscriber line (DSL), cable modem, etc.), or a combination of both that is suitable for accessing encoded video data stored on file server <NUM>. Input interface <NUM> may be configured to operate according to any one or more of the various protocols discussed above for retrieving or receiving media data from file server <NUM>, or other such protocols for retrieving media data.

Output interface <NUM> and input interface <NUM> may represent wireless transmitters/receivers, modems, wired networking components (e.g., Ethernet cards), wireless communication components that operate according to any of a variety of IEEE <NUM> standards, or other physical components. In examples where output interface <NUM> and input interface <NUM> comprise wireless components, output interface <NUM> and input interface <NUM> may be configured to transfer data, such as encoded video data, according to a cellular communication standard, such as <NUM>, <NUM>-LTE (Long-Term Evolution), LTE Advanced, <NUM>, or the like. In some examples where output interface <NUM> comprises a wireless transmitter, output interface <NUM> and input interface <NUM> may be configured to transfer data, such as encoded video data, according to other wireless standards, such as an IEEE <NUM> specification, an IEEE <NUM> specification (e.g., ZigBee™), a Bluetooth™ standard, or the like. In some examples, source device <NUM> and/or destination device <NUM> may include respective system-on-a-chip (SoC) devices. For example, source device <NUM> may include an SoC device to perform the functionality attributed to video encoder <NUM> and/or output interface <NUM>, and destination device <NUM> may include an SoC device to perform the functionality attributed to video decoder <NUM> and/or input interface <NUM>.

Input interface <NUM> of destination device <NUM> receives an encoded video bitstream from computer-readable medium <NUM> (e.g., a communication medium, storage device <NUM>, file server <NUM>, or the like). The encoded video bitstream may include signaling information defined by video encoder <NUM>, which is also used by video decoder <NUM>, such as syntax elements having values that describe characteristics and/or processing of video blocks or other coded units (e.g., slices, pictures, groups of pictures, sequences, or the like). Display device <NUM> displays decoded pictures of the decoded video data to a user. Display device <NUM> may represent any of a variety of display devices such as a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or another type of display device.

Video encoder <NUM> and video decoder <NUM> may operate according to a video coding standard, such as ITU-T H. <NUM>, also referred to as High Efficiency Video Coding (HEVC) or extensions thereto, such as the multi-view and/or scalable video coding extensions. Alternatively, video encoder <NUM> and video decoder <NUM> may operate according to other proprietary or industry standards, such as ITU-T H. <NUM>, also referred to as Versatile Video Coding (VVC). A draft of the VVC standard is described in <NPL> (hereinafter "VVC Draft <NUM>"). The techniques of this disclosure, however, are not limited to any particular coding standard.

As another example, video encoder <NUM> and video decoder <NUM> may be configured to operate according to VVC. According to VVC, a video coder (such as video encoder <NUM>) partitions a picture into a plurality of coding tree units (CTUs). Video encoder <NUM> may partition a CTU according to a tree structure, such as a quadtree-binary tree (QTBT) structure or Multi-Type Tree (MTT) structure. The QTBT structure removes the concepts of multiple partition types, such as the separation between CUs, PUs, and TUs of HEVC. A QTBT structure includes two levels: a first level partitioned according to quadtree partitioning, and a second level partitioned according to binary tree partitioning. A root node of the QTBT structure corresponds to a CTU. Leaf nodes of the binary trees correspond to coding units (CUs).

In an MTT partitioning structure, blocks may be partitioned using a quadtree (QT) partition, a binary tree (BT) partition, and one or more types of triple tree (TT) (also called ternary tree (TT)) partitions. A triple or ternary tree partition is a partition where a block is split into three sub-blocks. In some examples, a triple or ternary tree partition divides a block into three sub-blocks without dividing the original block through the center. The partitioning types in MTT (e.g., QT, BT, and TT), may be symmetrical or asymmetrical.

In some examples, a CTU includes a coding tree block (CTB) of luma samples, two corresponding CTBs of chroma samples of a picture that has three sample arrays, or a CTB of samples of a monochrome picture or a picture that is coded using three separate color planes and syntax structures used to code the samples. A CTB may be an NxN block of samples for some value of N such that the division of a component into CTBs is a partitioning. A component is an array or single sample from one of the three arrays (luma and two chroma) that compose a picture in <NUM>:<NUM>:<NUM>, <NUM>:<NUM>:<NUM>, or <NUM>:<NUM>:<NUM> color format or the array or a single sample of the array that compose a picture in monochrome format. In some examples, a coding block is an MxN block of samples for some values of M and N such that a division of a CTB into coding blocks is a partitioning.

The blocks (e.g., CTUs or CUs) may be grouped in various ways in a picture. As one example, a brick may refer to a rectangular region of CTU rows within a particular tile in a picture. A tile may be a rectangular region of CTUs within a particular tile column and a particular tile row in a picture. A tile column refers to a rectangular region of CTUs having a height equal to the height of the picture and a width specified by syntax elements (e.g., such as in a picture parameter set). A tile row refers to a rectangular region of CTUs having a height specified by syntax elements (e.g., such as in a picture parameter set) and a width equal to the width of the picture.

In some examples, a tile may be partitioned into multiple bricks, each of which may include one or more CTU rows within the tile. A tile that is not partitioned into multiple bricks may also be referred to as a brick. However, a brick that is a true subset of a tile may not be referred to as a tile.

The bricks in a picture may also be arranged in a slice. A slice may be an integer number of bricks of a picture that may be exclusively contained in a single network abstraction layer (NAL) unit. In some examples, a slice includes either a number of complete tiles or only a consecutive sequence of complete bricks of one tile.

Some examples of VVC also provide an affine motion compensation mode, which may be considered an inter-prediction mode. In affine motion compensation mode, video encoder <NUM> may determine two or more motion vectors that represent non-translational motion, such as zoom in or out, rotation, perspective motion, or other irregular motion types.

To perform intra-prediction, video encoder <NUM> may select an intra-prediction mode to generate the prediction block. Some examples of VVC provide sixty-seven intra-prediction modes, including various directional modes, as well as planar mode and DC mode. In general, video encoder <NUM> selects an intra-prediction mode that describes neighboring samples to a current block (e.g., a block of a CU) from which to predict samples of the current block. Such samples may generally be above, above and to the left, or to the left of the current block in the same picture as the current block, assuming video encoder <NUM> codes CTUs and CUs in raster scan order (left to right, top to bottom).

As noted above, following any transforms to produce transform coefficients, video encoder <NUM> may perform quantization of the transform coefficients. Quantization generally refers to a process in which transform coefficients are quantized to possibly reduce the amount of data used to represent the transform coefficients, providing further compression. By performing the quantization process, video encoder <NUM> may reduce the bit depth associated with some or all of the transform coefficients. For example, video encoder <NUM> may round an n-bit value down to an m-bit value during quantization, where n is greater than m. In some examples, to perform quantization, video encoder <NUM> may perform a bitwise right-shift of the value to be quantized.

Following quantization, video encoder <NUM> may scan the transform coefficients, producing a one-dimensional vector from the two-dimensional matrix including the quantized transform coefficients. The scan may be designed to place higher energy (and therefore lower frequency) transform coefficients at the front of the vector and to place lower energy (and therefore higher frequency) transform coefficients at the back of the vector. In some examples, video encoder <NUM> may utilize a predefined scan order to scan the quantized transform coefficients to produce a serialized vector, and then entropy encode the quantized transform coefficients of the vector. In other examples, video encoder <NUM> may perform an adaptive scan. After scanning the quantized transform coefficients to form the one-dimensional vector, video encoder <NUM> may entropy encode the one-dimensional vector, e.g., according to context-adaptive binary arithmetic coding (CABAC). Video encoder <NUM> may also entropy encode values for syntax elements describing metadata associated with the encoded video data for use by video decoder <NUM> in decoding the video data.

In general, video decoder <NUM> performs a reciprocal process to that performed by video encoder <NUM> to decode the encoded video data of the bitstream. For example, video decoder <NUM> may decode values for syntax elements of the bitstream using CABAC in a manner substantially similar to, albeit reciprocal to, the CABAC encoding process of video encoder <NUM>. The syntax elements may define partitioning information for partitioning of a picture into CTUs, and partitioning of each CTU according to a corresponding partition structure, such as a QTBT structure, to define CUs of the CTU. The syntax elements may further define prediction and residual information for blocks (e.g., CUs) of video data.

This disclosure may generally refer to "signaling" certain information, such as syntax elements. The term "signaling" may generally refer to the communication of values for syntax elements and/or other data used to decode encoded video data. That is, video encoder <NUM> may signal values for syntax elements in the bitstream. In general, signaling refers to generating a value in the bitstream. As noted above, source device <NUM> may transport the bitstream to destination device <NUM> substantially in real time, or not in real time, such as might occur when storing syntax elements to storage device <NUM> for later retrieval by destination device <NUM>.

In accordance with one or more techniques of this disclosure, encoder <NUM> and/or decoder <NUM> may insert one or more derived DIMD modes into an MPM list. For instance, encoder <NUM> and/or decoder <NUM> may perform the technique of <FIG>.

<FIG> are conceptual diagrams illustrating an example quadtree binary tree (QTBT) structure <NUM>, and a corresponding coding tree unit (CTU) <NUM>. The solid lines represent quadtree splitting, and dotted lines indicate binary tree splitting. In each split (i.e., non-leaf) node of the binary tree, one flag is signaled to indicate which splitting type (i.e., horizontal or vertical) is used, where <NUM> indicates horizontal splitting and <NUM> indicates vertical splitting in this example. For the quadtree splitting, there is no need to indicate the splitting type, because quadtree nodes split a block horizontally and vertically into <NUM> sub-blocks with equal size. Accordingly, video encoder <NUM> may encode, and video decoder <NUM> may decode, syntax elements (such as splitting information) for a region tree level of QTBT structure <NUM> (i.e., the solid lines) and syntax elements (such as splitting information) for a prediction tree level of QTBT structure <NUM> (i.e., the dashed lines). Video encoder <NUM> may encode, and video decoder <NUM> may decode, video data, such as prediction and transform data, for CUs represented by terminal leaf nodes of QTBT structure <NUM>.

In one example of the QTBT partitioning structure, the CTU size is set as 128x128 (luma samples and two corresponding 64x64 chroma samples), the MinQTSize is set as 16x16, the MaxBTSize is set as 64x64, the MinBTSize (for both width and height) is set as <NUM>, and the MaxBTDepth is set as <NUM>. The quadtree partitioning is applied to the CTU first to generate quad-tree leaf nodes. The quadtree leaf nodes may have a size from 16x16 (i.e., the MinQTSize) to 128x128 (i.e., the CTU size). If the quadtree leaf node is 128x128, the leaf quadtree node will not be further split by the binary tree, because the size exceeds the MaxBTSize (i.e., 64x64, in this example). Otherwise, the quadtree leaf node will be further partitioned by the binary tree. Therefore, the quadtree leaf node is also the root node for the binary tree and has the binary tree depth as <NUM>. When the binary tree depth reaches MaxBTDepth (<NUM>, in this example), no further splitting is permitted. A binary tree node having a width equal to MinBTSize (<NUM>, in this example) implies that no further vertical splitting (that is, dividing of the width) is permitted for that binary tree node. Similarly, a binary tree node having a height equal to MinBTSize implies no further horizontal splitting (that is, dividing of the height) is permitted for that binary tree node. As noted above, leaf nodes of the binary tree are referred to as CUs, and are further processed according to prediction and transform without further partitioning.

<FIG> is a block diagram illustrating an example video encoder <NUM> that may perform the techniques of this disclosure. <FIG> is provided for purposes of explanation and should not be considered limiting of the techniques as broadly exemplified and described in this disclosure. For purposes of explanation, this disclosure describes video encoder <NUM> according to the techniques of VVC (ITU-T H. <NUM>, under development), and HEVC (ITU-T H. However, the techniques of this disclosure may be performed by video encoding devices that are configured to other video coding standards.

In the example of <FIG>, video encoder <NUM> includes video data memory <NUM>, mode selection unit <NUM>, residual generation unit <NUM>, transform processing unit <NUM>, quantization unit <NUM>, inverse quantization unit <NUM>, inverse transform processing unit <NUM>, reconstruction unit <NUM>, filter unit <NUM>, decoded picture buffer (DPB) <NUM>, and entropy encoding unit <NUM>. Any or all of video data memory <NUM>, mode selection unit <NUM>, residual generation unit <NUM>, transform processing unit <NUM>, quantization unit <NUM>, inverse quantization unit <NUM>, inverse transform processing unit <NUM>, reconstruction unit <NUM>, filter unit <NUM>, DPB <NUM>, and entropy encoding unit <NUM> may be implemented in one or more processors or in processing circuitry. For instance, the units of video encoder <NUM> may be implemented as one or more circuits or logic elements as part of hardware circuitry, or as part of a processor, ASIC, or FPGA. Moreover, video encoder <NUM> may include additional or alternative processors or processing circuitry to perform these and other functions.

The various units of <FIG> are illustrated to assist with understanding the operations performed by video encoder <NUM>. The units may be implemented as fixed-function circuits, programmable circuits, or a combination thereof. Fixed-function circuits refer to circuits that provide particular functionality, and are preset on the operations that can be performed. Programmable circuits refer to circuits that can be programmed to perform various tasks, and provide flexible functionality in the operations that can be performed. For instance, programmable circuits may execute software or firmware that cause the programmable circuits to operate in the manner defined by instructions of the software or firmware. Fixed-function circuits may execute software instructions (e.g., to receive parameters or output parameters), but the types of operations that the fixed-function circuits perform are generally immutable. In some examples, one or more of the units may be distinct circuit blocks (fixed-function or programmable), and in some examples, one or more of the units may be integrated circuits.

Video encoder <NUM> may include arithmetic logic units (ALUs), elementary function units (EFUs), digital circuits, analog circuits, and/or programmable cores, formed from programmable circuits. In examples where the operations of video encoder <NUM> are performed using software executed by the programmable circuits, memory <NUM> (<FIG>) may store the instructions (e.g., object code) of the software that video encoder <NUM> receives and executes, or another memory within video encoder <NUM> (not shown) may store such instructions.

Mode selection unit <NUM> includes a motion estimation unit <NUM>, a motion compensation unit <NUM>, and an intra-prediction unit <NUM>. Mode selection unit <NUM> may include additional functional units to perform video prediction in accordance with other prediction modes. As examples, mode selection unit <NUM> may include a palette unit, an intra-block copy unit (which may be part of motion estimation unit <NUM> and/or motion compensation unit <NUM>), an affine unit, a linear model (LM) unit, or the like.

Video encoder <NUM> may partition a picture retrieved from video data memory <NUM> into a series of CTUs, and encapsulate one or more CTUs within a slice. Mode selection unit <NUM> may partition a CTU of the picture in accordance with a tree structure, such as the QTBT structure or the quad-tree structure of HEVC described above. As described above, video encoder <NUM> may form one or more CUs from partitioning a CTU according to the tree structure. Such a CU may also be referred to generally as a "video block" or "block.

Motion estimation unit <NUM> may form one or more motion vectors (MVs) that defines the positions of the reference blocks in the reference pictures relative to the position of the current block in a current picture. Motion estimation unit <NUM> may then provide the motion vectors to motion compensation unit <NUM>. For example, for uni-directional inter-prediction, motion estimation unit <NUM> may provide a single motion vector, whereas for bi-directional inter-prediction, motion estimation unit <NUM> may provide two motion vectors. Motion compensation unit <NUM> may then generate a prediction block using the motion vectors. For example, motion compensation unit <NUM> may retrieve data of the reference block using the motion vector. As another example, if the motion vector has fractional sample precision, motion compensation unit <NUM> may interpolate values for the prediction block according to one or more interpolation filters. Moreover, for bi-directional inter-prediction, motion compensation unit <NUM> may retrieve data for two reference blocks identified by respective motion vectors and combine the retrieved data, e.g., through sample-by-sample averaging or weighted averaging.

Mode selection unit <NUM> provides the prediction block to residual generation unit <NUM>. Residual generation unit <NUM> receives a raw, unencoded version of the current block from video data memory <NUM> and the prediction block from mode selection unit <NUM>. Residual generation unit <NUM> calculates sample-by-sample differences between the current block and the prediction block. The resulting sample-by-sample differences define a residual block for the current block. In some examples, residual generation unit <NUM> may also determine differences between sample values in the residual block to generate a residual block using residual differential pulse code modulation (RDPCM). In some examples, residual generation unit <NUM> may be formed using one or more subtractor circuits that perform binary subtraction.

In examples where mode selection unit <NUM> does not further partition a CU into PUs, each CU may be associated with a luma coding block and corresponding chroma coding blocks. As above, the size of a CU may refer to the size of the luma coding block of the CU. The video encoder <NUM> and video decoder <NUM> may support CU sizes of 2Nx2N, 2NxN, or Nx2N.

For other video coding techniques such as an intra-block copy mode coding, an affine-mode coding, and linear model (LM) mode coding, as some examples, mode selection unit <NUM>, via respective units associated with the coding techniques, generates a prediction block for the current block being encoded. In some examples, such as palette mode coding, mode selection unit <NUM> may not generate a prediction block, and instead generate syntax elements that indicate the manner in which to reconstruct the block based on a selected palette. In such modes, mode selection unit <NUM> may provide these syntax elements to entropy encoding unit <NUM> to be encoded.

Quantization unit <NUM> may quantize the transform coefficients in a transform coefficient block, to produce a quantized transform coefficient block. Quantization unit <NUM> may quantize transform coefficients of a transform coefficient block according to a quantization parameter (QP) value associated with the current block. Video encoder <NUM> (e.g., via mode selection unit <NUM>) may adjust the degree of quantization applied to the transform coefficient blocks associated with the current block by adjusting the QP value associated with the CU. Quantization may introduce loss of information, and thus, quantized transform coefficients may have lower precision than the original transform coefficients produced by transform processing unit <NUM>.

Filter unit <NUM> may perform one or more filter operations on reconstructed blocks. For example, filter unit <NUM> may perform deblocking operations to reduce blockiness artifacts along edges of CUs. Operations of filter unit <NUM> may be skipped, in some examples.

Video encoder <NUM> stores reconstructed blocks in DPB <NUM>. For instance, in examples where operations of filter unit <NUM> are not performed, reconstruction unit <NUM> may store reconstructed blocks to DPB <NUM>. In examples where operations of filter unit <NUM> are performed, filter unit <NUM> may store the filtered reconstructed blocks to DPB <NUM>. Motion estimation unit <NUM> and motion compensation unit <NUM> may retrieve a reference picture from DPB <NUM>, formed from the reconstructed (and potentially filtered) blocks, to inter-predict blocks of subsequently encoded pictures. In addition, intra-prediction unit <NUM> may use reconstructed blocks in DPB <NUM> of a current picture to intra-predict other blocks in the current picture.

In some examples, operations performed with respect to a luma coding block need not be repeated for the chroma coding blocks. As one example, operations to identify a motion vector (MV) and reference picture for a luma coding block need not be repeated for identifying a MV and reference picture for the chroma blocks. Rather, the MV for the luma coding block may be scaled to determine the MV for the chroma blocks, and the reference picture may be the same. As another example, the intra-prediction process may be the same for the luma coding block and the chroma coding blocks.

Video encoder <NUM> represents an example of a device configured to encode video data including a memory configured to store video data, and one or more processing units implemented in circuitry and configured to derive, for a current block of video data and using decoder side intra mode derivation (DIMD), a list of intra modes using reconstructed samples of neighboring blocks; construct, for the current block, a most possible mode (MPM) list that includes at least one intra mode from the derived list of intra modes; and predict, using a candidate selected from the constructed MPM list, the current block.

<FIG> is a block diagram illustrating an example video decoder <NUM> that may perform the techniques of this disclosure. <FIG> is provided for purposes of explanation and is not limiting on the techniques as broadly exemplified and described in this disclosure. For purposes of explanation, this disclosure describes video decoder <NUM> according to the techniques of VVC (ITU-T H. <NUM>, under development), and HEVC (ITU-T H. However, the techniques of this disclosure may be performed by video coding devices that are configured to other video coding standards.

In the example of <FIG>, video decoder <NUM> includes coded picture buffer (CPB) memory <NUM>, entropy decoding unit <NUM>, prediction processing unit <NUM>, inverse quantization unit <NUM>, inverse transform processing unit <NUM>, reconstruction unit <NUM>, filter unit <NUM>, and decoded picture buffer (DPB) <NUM>. Any or all of CPB memory <NUM>, entropy decoding unit <NUM>, prediction processing unit <NUM>, inverse quantization unit <NUM>, inverse transform processing unit <NUM>, reconstruction unit <NUM>, filter unit <NUM>, and DPB <NUM> may be implemented in one or more processors or in processing circuitry. For instance, the units of video decoder <NUM> may be implemented as one or more circuits or logic elements as part of hardware circuitry, or as part of a processor, ASIC, or FPGA. Moreover, video decoder <NUM> may include additional or alternative processors or processing circuitry to perform these and other functions.

Prediction processing unit <NUM> includes motion compensation unit <NUM> and intra-prediction unit <NUM>. Prediction processing unit <NUM> may include additional units to perform prediction in accordance with other prediction modes. As examples, prediction processing unit <NUM> may include a palette unit, an intra-block copy unit (which may form part of motion compensation unit <NUM>), an affine unit, a linear model (LM) unit, or the like. In other examples, video decoder <NUM> may include more, fewer, or different functional components.

CPB memory <NUM> may store video data, such as an encoded video bitstream, to be decoded by the components of video decoder <NUM>. The video data stored in CPB memory <NUM> may be obtained, for example, from computer-readable medium <NUM> (<FIG>). CPB memory <NUM> may include a CPB that stores encoded video data (e.g., syntax elements) from an encoded video bitstream. Also, CPB memory <NUM> may store video data other than syntax elements of a coded picture, such as temporary data representing outputs from the various units of video decoder <NUM>. DPB <NUM> generally stores decoded pictures, which video decoder <NUM> may output and/or use as reference video data when decoding subsequent data or pictures of the encoded video bitstream. CPB memory <NUM> and DPB <NUM> may be formed by any of a variety of memory devices, such as DRAM, including SDRAM, MRAM, RRAM, or other types of memory devices. CPB memory <NUM> and DPB <NUM> may be provided by the same memory device or separate memory devices. In various examples, CPB memory <NUM> may be on-chip with other components of video decoder <NUM>, or off-chip relative to those components.

Additionally or alternatively, in some examples, video decoder <NUM> may retrieve coded video data from memory <NUM> (<FIG>). That is, memory <NUM> may store data as discussed above with CPB memory <NUM>. Likewise, memory <NUM> may store instructions to be executed by video decoder <NUM>, when some or all of the functionality of video decoder <NUM> is implemented in software to be executed by processing circuitry of video decoder <NUM>.

The various units shown in <FIG> are illustrated to assist with understanding the operations performed by video decoder <NUM>. The units may be implemented as fixed-function circuits, programmable circuits, or a combination thereof. Similar to <FIG>, fixed-function circuits refer to circuits that provide particular functionality, and are preset on the operations that can be performed. Programmable circuits refer to circuits that can be programmed to perform various tasks, and provide flexible functionality in the operations that can be performed. For instance, programmable circuits may execute software or firmware that cause the programmable circuits to operate in the manner defined by instructions of the software or firmware. Fixed-function circuits may execute software instructions (e.g., to receive parameters or output parameters), but the types of operations that the fixed-function circuits perform are generally immutable. In some examples, one or more of the units may be distinct circuit blocks (fixed-function or programmable), and in some examples, one or more of the units may be integrated circuits.

After inverse quantization unit <NUM> forms the transform coefficient block, inverse transform processing unit <NUM> may apply one or more inverse transforms to the transform coefficient block to generate a residual block associated with the current block. For example, inverse transform processing unit <NUM> may apply an inverse DCT, an inverse integer transform, an inverse Karhunen-Loeve transform (KLT), an inverse rotational transform, an inverse directional transform, or another inverse transform to the transform coefficient block.

Filter unit <NUM> may perform one or more filter operations on reconstructed blocks. For example, filter unit <NUM> may perform deblocking operations to reduce blockiness artifacts along edges of the reconstructed blocks. Operations of filter unit <NUM> are not necessarily performed in all examples.

Video decoder <NUM> may store the reconstructed blocks in DPB <NUM>. For instance, in examples where operations of filter unit <NUM> are not performed, reconstruction unit <NUM> may store reconstructed blocks to DPB <NUM>. In examples where operations of filter unit <NUM> are performed, filter unit <NUM> may store the filtered reconstructed blocks to DPB <NUM>. As discussed above, DPB <NUM> may provide reference information, such as samples of a current picture for intra-prediction and previously decoded pictures for subsequent motion compensation, to prediction processing unit <NUM>. Moreover, video decoder <NUM> may output decoded pictures (e.g., decoded video) from DPB <NUM> for subsequent presentation on a display device, such as display device <NUM> of <FIG>.

In this manner, video decoder <NUM> represents an example of a video decoding device including a memory configured to store video data, and one or more processing units implemented in circuitry and configured to derive, for a current block of video data and using decoder side intra mode derivation (DIMD), a list of intra modes using reconstructed samples of neighboring blocks; construct, for the current block, a most possible mode (MPM) list that includes at least one intra mode from the derived list of intra modes; and predict, using a candidate selected from the constructed MPM list, the current block.

<FIG> is a flowchart illustrating an example method for encoding a current block in accordance with the techniques of this disclosure. The current block may comprise a current CU. Although described with respect to video encoder <NUM> (<FIG> and <FIG>), it should be understood that other devices may be configured to perform a method similar to that of <FIG>.

In this example, video encoder <NUM> initially predicts the current block (<NUM>). For example, video encoder <NUM> may form a prediction block for the current block. Video encoder <NUM> may then calculate a residual block for the current block (<NUM>). To calculate the residual block, video encoder <NUM> may calculate a difference between the original, unencoded block and the prediction block for the current block. Video encoder <NUM> may then transform the residual block and quantize transform coefficients of the residual block (<NUM>). Next, video encoder <NUM> may scan the quantized transform coefficients of the residual block (<NUM>). During the scan, or following the scan, video encoder <NUM> may entropy encode the transform coefficients (<NUM>). For example, video encoder <NUM> may encode the transform coefficients using CAVLC or CABAC. Video encoder <NUM> may then output the entropy encoded data of the block (<NUM>).

<FIG> is a flowchart illustrating an example method for decoding a current block of video data in accordance with the techniques of this disclosure. The current block may comprise a current CU. Although described with respect to video decoder <NUM> (<FIG> and <FIG>), it should be understood that other devices may be configured to perform a method similar to that of <FIG>.

Video decoder <NUM> may receive entropy encoded data for the current block, such as entropy encoded prediction information and entropy encoded data for transform coefficients of a residual block corresponding to the current block (<NUM>). Video decoder <NUM> may entropy decode the entropy encoded data to determine prediction information for the current block and to reproduce transform coefficients of the residual block (<NUM>). Video decoder <NUM> may predict the current block (<NUM>), e.g., using an intra- or inter-prediction mode as indicated by the prediction information for the current block, to calculate a prediction block for the current block. Video decoder <NUM> may then inverse scan the reproduced transform coefficients (<NUM>), to create a block of quantized transform coefficients. Video decoder <NUM> may then inverse quantize the transform coefficients and apply an inverse transform to the transform coefficients to produce a residual block (<NUM>). Video decoder <NUM> may ultimately decode the current block by combining the prediction block and the residual block (<NUM>).

<FIG> is a flowchart illustrating an example technique for encoding video data using DIMD, in accordance with one or more techniques of this disclosure. Although described with respect to video encoder <NUM> (<FIG> and <FIG>), it should be understood that other devices may be configured to perform a method similar to that of <FIG>.

Video encoder <NUM> may derive, for a current block of video data, a list of decoder side intra mode derivation (DIMD) intra modes using reconstructed samples of neighboring blocks (<NUM>). For instance, intra-prediction unit <NUM> may derive the DIMD intra modes using the technique discussed above with reference to <FIG> to obtain a first DIMD intra mode M1 and a second DIMD intra mode M2.

Video encoder <NUM> may construct, for the current block, a most probable mode (MPM) list that includes at least one intra mode from the DIMD modes (<NUM>). For instance, intra-prediction unit <NUM> may construct the MPM list using the technique discussed above with reference to <FIG>. The constructed MPM list may include one or both of the first DIMD intra mode M1 and the second DIMD intra mode M2.

Video encoder <NUM> may determine whether to predict the current block using DIMD (<NUM>). For instance, mode selection unit <NUM> may perform analysis to determine an optimal encoding mode for the current block (e.g., a coding mode that uses the fewest bits to represent the current block). To determine the optimal encoding mode, mode selection unit <NUM> may test encoding the current block using various modes. Where mode selection unit <NUM> determines that encoding the current block using DIMD is optimal, mode selection unit <NUM> may determine to encode the current block using DIMD. Similarly, where mode selection unit <NUM> determines that encoding the current block using one of the derived DIMD modes in the MPM list, mode selection unit <NUM> may determine not the encode the current block using DIMD.

Video encoder <NUM> may encode an indication of whether the current block is predicted using DIMD. For instance, entropy encoding unit <NUM> may encode, for the current block, a DIMD flag having a value that indicates whether DIMD is enabled for the current block of video data. As one example, responsive to determining not to predict the current block using DIMD ("No" branch of <NUM>), video encoder <NUM> may encode the DIMD flag with a false (e.g., <NUM>) value to indicate that the current block is not predicted using DIMD (<NUM>). As another example, responsive to determining to predict the current block using DIMD ("Yes" branch of <NUM>), video encoder <NUM> may encode the DIMD flag with a true (e.g., <NUM>) value to indicate that the current block is predicted using DIMD (<NUM>).

Video encoder <NUM> may encode one or more syntax elements indicating a selected intra mode from the MPM list (<NUM>). For instance, entropy encoding unit <NUM> may encode a syntax element having a value that indicates an index in the MPM list of the selected intra mode.

In some examples, as discussed above, video encoder <NUM> may include a reconstruction loop in which blocks of video data a reconstructed to be used as reference when predicting subsequent blocks. As one example, where the current block is not predicted using DIMD, video encoder <NUM> may predict the current block using the selected intra mode (<NUM>). For instance, intra-prediction unit <NUM> may generate a prediction block using samples in the direction specified by the selected intra mode. As another example, where the current block is predicted using DIMD, video encoder <NUM> may predict the current block using DIMD (<NUM>). For instance, intra-prediction unit <NUM> may predict the current block using the technique described above with reference to <FIG>.

<FIG> is a flowchart illustrating an example technique for decoding video data using DIMD, in accordance with one or more techniques of this disclosure. Although described with respect to video decoder <NUM> (<FIG> and <FIG>), it should be understood that other devices may be configured to perform a method similar to that of <FIG>.

Video decoder <NUM> may derive, for a current block of video data, a list of decoder side intra mode derivation (DIMD) intra modes using reconstructed samples of neighboring blocks (<NUM>). For instance, intra-prediction unit <NUM> may derive the DIMD intra modes using the technique discussed above with reference to <FIG> to obtain a first DIMD intra mode M1 and a second DIMD intra mode M2.

Video decoder <NUM> may construct, for the current block, a most probable mode (MPM) list that includes at least one intra mode from the DIMD modes (<NUM>). For instance, intra-prediction unit <NUM> may construct the MPM list using the technique discussed above with reference to <FIG>. The constructed MPM list may include one or both of the first DIMD intra mode M1 and the second DIMD intra mode M2.

Video decoder <NUM> may determine whether to predict the current block using DIMD (<NUM>). For instance, entropy decoding unit <NUM> may decode, for the current block, a DIMD flag having a value that indicates whether DIMD is enabled for the current block of video data. Based on the value of the DIMD flag, intra-prediction unit <NUM> may determine whether to predict the current block using DIMD. As one example, where the value of the flag is true (e.g., <NUM>), intra-prediction unit <NUM> may determine to predict the current block using DIMD. As another example, where the value of the flag is false (e.g., <NUM>), intra-prediction unit <NUM> may determine not to predict the current block using DIMD. As noted above, in some examples, video decoder <NUM> may derive the list of DIMD intra modes regardless of the value of the DIMD flag.

Where video decoder <NUM> determines to not predict the current block using DIMD ("No" branch of <NUM>), entropy decoding unit <NUM> may decode one or more syntax elements indicating a selected intra mode from the MPM list (<NUM>) (e.g., indicating an index in the MPM list). For example, entropy decoding unit <NUM> may decode a intra_luma_mpm_idx syntax element that specifies the index in the MPM list of the selected intra mode.

Video decoder <NUM> may predict, using the candidate selected from the constructed MPM list, the current block (<NUM>). For instance, intra-prediction unit <NUM> may generate a prediction block for the current block using the selected intra mode from the MPM list. Reconstruction unit <NUM> may combine the prediction block with a residual block (e.g., similar to <NUM> of <FIG>).

Where video decoder <NUM> determines to predict the current block using DIMD ("Yes" branch of <NUM>), entropy decoding unit <NUM> may predict the current block using DIMD (<NUM>). For instance, intra-prediction unit <NUM> may predict the current block using the technique described above with reference to <FIG>.

Instructions may be executed by one or more processors, such as one or more DSPs, general purpose microprocessors, ASICs, FPGAs, or other equivalent integrated or discrete logic circuitry. Accordingly, the terms "processor" and "processing circuitry," as used herein may refer to any of the foregoing structures or any other structure suitable for implementation of the techniques described herein.

Claim 1:
A method of decoding video data, the method comprising:
deriving (<NUM>), for a current block of video data and using decoder side intra mode derivation, DIMD, a list of intra modes using reconstructed samples of neighboring blocks;
constructing, for the current block, a most probable mode, MPM, list, wherein constructing the MPM list comprises inserting (<NUM>), into the MPM list, at least one intra mode from the derived list of intra modes, wherein inserting the at least one intra mode from the derived list of intra modes into the MPM list comprises:
inserting, into the MPM list, a first candidate from the list of intra modes derived using DIMD; and
selectively inserting, in to the MPM list, a second candidate from the list of intra modes derived using DIMD; and
predicting, using a candidate selected from the constructed MPM list, the current block.