Patent Description:
The present disclosure relates to a display apparatus including a back-light unit in which a light-source module includes light-emitting chips disposed side by side on a light-source substrate.

Generally, a display apparatus provides an image to user. For example, the display apparatus may include a liquid crystal panel on a back-light unit. The back-light unit may supply light to the liquid crystal panel. For example, the back-light unit may have a stacked structure of a light-source module and an optical sheet.

The light-source module may include light-emitting chips. Each of the light-emitting chips may emit light. For example, the light-emitting chips may be disposed side by side on a light-source substrate. A driving voltage line, a ground voltage line, and a driving chip may be disposed on the light-source substrate. The driving chip may be electrically connected to the ground voltage line. Each of the light-emitting chips may be electrically connected between the driving voltage line and the driving chip by emission connecting lines.

However, in the back-light unit and the display apparatus including the same, a driving voltage applied to each light-emitting chip or a ground voltage applied to the driving chip may be changed by the resistance of the driving voltage line and/or the resistance of the ground voltage line. Thus, in the back-light unit and the display apparatus including the same, the luminance difference of each light-emitting chip may occur.

<CIT> describes a light-emitting substrate and a display device. The light-emitting substrate comprises a plurality of light-emitting units, a plurality of first voltage lines, and a plurality of first transmission lines. The plurality of light-emitting units are arranged in an array of N*M, and each of the plurality of light-emitting units comprises a first voltage end. The plurality of first voltage lines have one-to-one correspondence to multiple columns of light-emitting units. The first voltage line comprises a first part, a first connecting portion, and a second part. The first part is electrically connected to first voltage ends of the first to Y-th rows of light-emitting units of a corresponding column. The extension direction of the second part of at least one first voltage line has an angle with the first direction and the second direction, respectively. The first connecting portion is located at the junction of the Y-th row of light-emitting units and the (Y+<NUM>)-th row of light-emitting units. The plurality of first transmission lines have one-to-one correspondence to multiple columns of light-emitting units. The first transmission lines are electrically connected to first voltage ends of the (Y+<NUM>)-th to N-th rows of light-emitting units of the corresponding column, and are electrically connected to first connecting portions of the first voltage lines corresponding to the of light-emitting units of the corresponding column.

<CIT> describes a method of manufacturing a flexible device which includes: forming a photosensitive film on a hard base substrate, the photosensitive film including a photosensitive resin material containing azide; forming a base including an inorganic material on the photosensitive film; forming an electronic device functional layer on the base; forming an encapsulation layer on the electronic device functional layer; irradiating the photosensitive film at a side of the base substrate away from the encapsulation layer; and peeling off an entire structure including the base, and the electronic device functional layer and the encapsulation layer that have been formed on the base from the photosensitive film.

The present invention is set out in the independent claim. Accordingly, the present disclosure is directed to a display apparatus that substantially obviates one or more problems due to limitations and disadvantages of the related art.

An object of the present disclosure is to provide a display apparatus capable of preventing or at least reducing the luminance difference of each light-emitting chip.

Another object of the present disclosure is to provide a display apparatus capable of reducing the resistance of the driving voltage line and optionally the resistance of the ground voltage line, without lowering the process efficiency.

Additional advantages, objects, and features of the disclosure will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the disclosure. The objectives and other advantages of the disclosure may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

To achieve these objects and other advantages and in accordance with the purpose of the present disclosure, as embodied and broadly described herein, there is provided a display apparatus which comprises: a back-light unit including a light-source module configured to emit light and an optical sheet on the light-source module; and a liquid crystal panel on the optical sheet of the back-light unit, wherein the light-source module includes: a driving voltage line on a light-source substrate; a lower insulating layer on the driving voltage line; a plurality of light-emitting chips on the lower insulating layer; a driving chip spaced apart from the plurality of light-emitting chips; a plurality of emission connecting lines electrically connecting each of the plurality of light-emitting chips to the driving voltage line and the driving chip; and a driving dummy pattern between the plurality of light-emitting chips and the plurality of emission connecting lines, wherein the plurality of light-emitting chips are non-overlapping with the driving voltage line, and the driving voltage line is electrically connected to the driving dummy pattern; wherein the light-source module further includes an upper insulating layer on the plurality of emission connecting lines and the driving dummy pattern, the upper insulating layer surrounding the plurality of light-emitting chips; and wherein the optical sheet includes a reflective plate on the upper insulating layer, the reflective plate comprising a reflective pattern having a conductive material and electrically connected to the driving dummy pattern, and a scattering layer that covers the reflecting pattern.

The accompanying drawings, which are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the present disclosure and together with the description serve to explain the principle of the present disclosure. In the drawings:.

Hereinafter, details related to the above objects, technical configurations, and operational effects of the embodiments of the present disclosure will be clearly understood by the following detailed description with reference to the drawings, which illustrate some embodiments of the present disclosure. Here, the embodiments of the present disclosure are provided in order to allow the present disclosure to be satisfactorily transferred to those skilled in the art, and thus the present disclosure may be embodied in other forms and is not limited to the embodiments described below.

In addition, the same or extremely similar elements may be designated by the same reference numerals throughout the specification, and in the drawings, the lengths and thickness of layers and regions may be exaggerated for convenience. It will be understood that, when a first element is referred to as being "on" a second element, although the first element may be disposed on the second element so as to come into contact with the second element, a third element may be interposed between the first element and the second element. When a first element is described as being disposed on a second element, this may be used to indicate that the first element is disposed above or over the second element, for example disposed in a layer above the second element, either in direct contact with the second element or with another element therebetween. As used herein, the first element being disposed above or over the second element may be used to indicate that the first element is above or over the second element in a vertical direction in a cross-sectional view, i.e. that the first element is closer to a front (display) surface of the display unit or to a front surface of the back-light unit from which light is emitted.

Here, terms such as, for example, "first" and "second" may be used to distinguish any one element with another element. However, the first element and the second element may be arbitrary named according to the convenience of those skilled in the art without departing from the present disclosure.

The terms used in the specification of the present disclosure are merely used in order to describe particular embodiments, and are not intended to limit the scope of the present disclosure. For example, an element described in the singular form is intended to include a plurality of elements unless the context clearly indicates otherwise. In addition, in the specification of the present disclosure, it will be further understood that the terms "comprises" and "includes" specify the presence of stated features, integers, steps, operations, elements, components, and/or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or combinations thereof.

It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and should not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

<FIG> is a view schematically showing a display apparatus according to an embodiment of the present disclosure. <FIG> is a view showing a portion of a light-source module in the display apparatus according to an embodiment of the present disclosure. <FIG> is a view taken along I-I' of <FIG> according to an embodiment of the present disclosure.

Referring to <FIG>, the display apparatus according to the embodiment of the present disclosure includes a back-light unit BL and a liquid crystal panel LP. The liquid crystal panel LP may generate an image displayed to a user using light supplied from the back-light unit BL. For example, the liquid crystal panel LP may include a first substrate in which a plurality of pixel electrodes are formed, a second substrate in which a common electrode is formed, and a liquid crystal layer between the first substrate and the second substrate.

The back-light unit BL may supply the light to the entire area of the liquid crystal panel LP. The back-light unit BL has a stacked structure of a light-source module <NUM> and an optical sheet <NUM>.

The light-source module <NUM> may generate the light supplied to the liquid crystal panel LP. The light-source module <NUM> includes light-emitting chips <NUM> on a light-source substrate <NUM>. The light-source substrate <NUM> may support the light-emitting chips <NUM>. The light-source substrate <NUM> includes an insulating material. For example, the light-source substrate <NUM> may include glass or plastic. Each of the light-emitting chips <NUM> emits light. For example, each of the light-emitting chips <NUM> may include a light-emitting diode (LED). The light-emitting chips <NUM> may be disposed side by side on the light-source substrate <NUM>. For example, the back-light unit of the display apparatus according to the embodiment of the present disclosure may be a direct light type.

A ground voltage line <NUM> transmitting a ground voltage, a driving voltage line <NUM> supplying a driving voltage to the light-emitting chips <NUM>, and a driving chip <NUM> controlling a turn on or turn off of the light-emitting chips <NUM> are disposed on the light-source substrate <NUM>. Thus, the light-emitting chips <NUM> are electrically connected to the driving voltage line <NUM> and the ground voltage line <NUM>. As shown in <FIG>, the driving voltage line <NUM> may be on a first portion of the light-source substrate <NUM> and the ground voltage line <NUM> may be on a second portion of the light-source substrate <NUM> that is different from the first portion.

The ground voltage line <NUM> includes a conductive material. The ground voltage line <NUM> may include a material having a relative low resistance. For example, the ground voltage line <NUM> may include a metal, such as copper (Cu), nickel (Ni), silver (Ag), gold (Au), platinum (Pt), and aluminum (Al). The ground voltage line <NUM> may extend in a direction.

The driving voltage line <NUM> includes a conductive material. The driving voltage line <NUM> may include a material having a relative low resistance. For example, the driving voltage line <NUM> may include a metal, such as copper (Cu), nickel (Ni), silver (Ag), gold (Au), platinum (Pt), and aluminum (Al). The driving voltage line <NUM> may include the same material as the ground voltage line <NUM>. The driving voltage line <NUM> may be formed in the same process as the ground voltage line <NUM>. For example, the driving voltage line <NUM> may be formed simultaneously with the ground voltage line <NUM>. The driving voltage line <NUM> may be disposed on the same layer as the ground voltage line <NUM>. The driving voltage line <NUM> may be spaced away from the ground voltage line <NUM>. For example, the driving voltage line <NUM> may extend in parallel with the ground voltage line <NUM>.

The driving chip <NUM> may include a first input terminal I1 to which an address signal is input, a second input terminal I2 to which the ground voltage is input, and a first output terminal O1 from which a control signal for controlling the operation of the light-emitting chips <NUM> is output. For example, the second input terminal I2 of the driving chip <NUM> may be electrically connected to the ground voltage line <NUM>. Each of the light-emitting chips <NUM> may be electrically connected between the driving voltage line <NUM> and the first output terminal O1 of the driving chip <NUM>. For example, each of the light-emitting chips <NUM> may include a first chip pad 150a to which the driving voltage is applied by the driving voltage line <NUM>, and a second chip pad 150b to which the control signal is applied by the driving chip <NUM>.

The driving chip <NUM> and the light-emitting chips <NUM> may be disposed on a layer different from the ground voltage line <NUM> and the driving voltage line <NUM>. A lower insulating layer <NUM> covering the ground voltage line <NUM> and the driving voltage line <NUM> is disposed on the light-source substrate <NUM>, and the driving chip <NUM> and the light-emitting chips <NUM> are disposed on the lower insulating layer <NUM>. The lower insulating layer <NUM> includes an insulating material. For example, the lower insulating layer <NUM> may be an inorganic layer made of an inorganic insulating material, such as silicon oxide (SiOx) and silicon nitride (SiNx). The lower insulating layer <NUM> may have a multi-layer structure. For example, the lower insulating layer <NUM> may have a stacked structure of an inorganic layer made of silicon oxide (SiOx) and an inorganic layer made of silicon nitride (SiNx). Thus, in the display apparatus according to the embodiment of the present disclosure, the diffusion and/or the movement of the metal constituting the ground voltage line <NUM> and the metal constituting the driving voltage line <NUM> through adjacent components may be prevented or at least reduced. That is, in the display apparatus according to the embodiment of the present disclosure, the migration of the metal constituting the ground voltage line <NUM> and the metal constituting the driving voltage line <NUM> may be prevented or at least reduced.

The light-emitting chips <NUM> are disposed outside the ground voltage line <NUM> and the driving voltage line <NUM>. That is, the light-emitting chips <NUM> are non-overlapping with each of the ground voltage line <NUM> and the driving voltage line <NUM>. For example, the ground voltage line <NUM> and the driving voltage line <NUM> may extend in a direction between the light-emitting chips <NUM>. The light-emitting chips <NUM> may be spaced away from the ground voltage line <NUM> and the driving voltage line <NUM>. For example, as shown in <FIG>, the light emitting chip <NUM> is between the ground voltage line <NUM> and the driving voltage line <NUM> in a horizontal direction. In other words, the plurality of light emitting chip(s) <NUM> may be spaced apart from the ground voltage line <NUM> and the driving voltage line <NUM> in a direction parallel to a front (display) surface of the display apparatus, i.e. in a direction parallel to a front surface of the back-light unit from which light is emitted. Thus, in the display apparatus according to the embodiment of the present disclosure, the malfunction of the light-emitting chips <NUM> due to parasitic capacitance formed between the ground voltage line <NUM> and the light-emitting chips <NUM> and/or between the driving voltage line <NUM> and the light-emitting chips <NUM> may be prevented or at least reduced.

Each of the light-emitting chips <NUM> may be controlled differently from an adjacent light-emitting chip <NUM>. For example, in the back-light unit BL of the display apparatus according to the embodiment of the present disclosure, the light source substrate <NUM> may be divided into a plurality of light-emitting blocks LB, and the light-emitting chips <NUM> in each light-emitting block LB may be simultaneously controlled by one driving chip <NUM>. Thus, in the display apparatus according to the embodiment of the present disclosure, the local dimming in which light having different luminance for each area is provided to the liquid crystal panel LP by the back-light unit BL may be implemented. The driving chip <NUM> of each light-emitting block LB may transmit the address signal to the driving chip <NUM> of adjacent light-emitting block LB. For example, the driving chip <NUM> of each light-emitting block LB may include a second output terminal O2 for transmitting the address signal, and the first input terminal I1 of one of the driving chips <NUM> may be electrically connected to the second output terminal O2 of adjacent driving chip <NUM> by an address connecting line <NUM>. The address connecting line <NUM> may include a conductive material. The address connecting line <NUM> may include a material having a relative low resistance. For example, the address connecting line <NUM> may include a metal, such as copper (Cu), nickel (Ni), silver (Ag), gold (Au), platinum (Pt), and aluminum (Al). The address connecting line <NUM> may be disposed on the lower insulating layer <NUM>.

The light-emitting chips <NUM> may be connected to each other by emission connecting lines <NUM>. For example, the light-emitting chips <NUM> in each light-emitting block LB may be connected in series between the driving voltage line <NUM> and the driving chip <NUM> by the emission connecting lines <NUM>. The emission connecting lines <NUM> include a conductive material. The emission connecting lines <NUM> may include a material having a relative low resistance. For example, the emission connecting lines <NUM> may include a metal, such as copper (Cu), nickel (Ni), silver (Ag), gold (Au), platinum (Pt), and aluminum (Al). The emission connecting lines <NUM> may be disposed on the lower insulating layer <NUM>. For example, each of the emission connecting lines <NUM> between the light-emitting chips <NUM> may include a first end 161a being in contact with the first chip pad 150a of one of the light-emitting chips <NUM>, and a second end 161b being in contact with the second chip pad 150b of one of the light-emitting chips <NUM>. The emission connecting lines <NUM> may include the same material as the address connecting line <NUM>. The emission connecting lines <NUM> may be formed in the same process as the address connecting line <NUM>. For example, the emission connecting lines <NUM> may be formed simultaneously with the address connecting line <NUM>. The emission connecting lines <NUM> may be disposed on the same layer as the address connecting line <NUM>.

A ground dummy pattern <NUM> and a driving dummy pattern <NUM> are disposed between the light-emitting chips <NUM> and the emission connecting lines <NUM>. The ground dummy pattern <NUM> and the driving dummy pattern <NUM> include a conductive material. The ground dummy pattern <NUM> and the driving dummy pattern <NUM> may include a material having a relative low resistance. For example, the ground dummy pattern <NUM> and the driving dummy pattern <NUM> may include a metal, such as copper (Cu), nickel (Ni), silver (Ag), gold (Au), platinum (Pt), and aluminum (Al).

The ground dummy pattern <NUM> may be electrically connected to the ground voltage line <NUM>. The ground dummy pattern <NUM> may overlap the ground voltage line <NUM>. For example, the lower insulating layer <NUM> may include at least one ground contact hole partially exposing the ground voltage line <NUM>. The ground dummy pattern <NUM> may be in direct contact with the ground voltage line <NUM> through the ground contact hole. Thus, in the display apparatus according to the embodiment of the present disclosure, the resistance of the ground voltage line <NUM> may be reduced. As used herein, references to a first element overlapping a second element may be used to indicate that the first element overlaps the second element vertically in a cross-sectional view, i.e. that the first element is aligned with the second element in a direction between the back surface of the display apparatus and the front (display) surface of the display apparatus or between the back surface of the back-light unit and the front surface of the back-light unit from which light it emitted.

The ground dummy pattern <NUM> may include the same material as the emission connecting lines <NUM>. The ground dummy pattern <NUM> may be formed in the same process as the emission connecting lines <NUM>. For example, the ground dummy pattern <NUM> may be formed simultaneously with the emission connecting lines <NUM>. The ground dummy pattern <NUM> may be disposed on the same layer as the emission connecting lines <NUM>. Thus, in the display apparatus according to the embodiment of the present disclosure, the resistance of the ground voltage line <NUM> may be reduced, without lowering the process efficiency.

The driving dummy pattern <NUM> is electrically connected to the driving voltage line <NUM>. The driving dummy pattern <NUM> may overlap the driving voltage line <NUM>. For example, the lower insulating layer <NUM> may include at least one driving contact hole partially exposing the driving voltage line <NUM>. The driving dummy pattern <NUM> may be in direct contact with the driving voltage line <NUM> through the driving contact hole. Thus, in the display apparatus according to the embodiment of the present disclosure, the resistance of the driving voltage line <NUM> may be reduced.

The driving dummy pattern <NUM> may include the same material as the ground dummy pattern <NUM>. For example, the driving dummy pattern <NUM> may be formed simultaneously with the ground dummy pattern <NUM>. The driving dummy pattern <NUM> may be disposed on the same layer as the ground dummy pattern <NUM>. Thus, in the display apparatus according to the embodiment of the present disclosure, the resistance of the driving voltage line <NUM> may be reduced, without lowering the process efficiency.

An upper insulating layer <NUM> is disposed on the emission connecting lines <NUM>, the address connecting line <NUM>, the ground dummy pattern <NUM> and the driving dummy pattern <NUM>. The upper insulating layer <NUM> includes an insulating material. For example, the upper insulating layer <NUM> may be an inorganic layer made of an inorganic insulating material, such as silicon oxide (SiOx) and silicon nitride (SiNx). The upper insulating layer <NUM> may have a multi-layer structure. For example, the upper insulating layer <NUM> may have a stacked structure of an inorganic layer made of silicon oxide (SiOx) and an inorganic layer made of silicon nitride (SiNx).

Thus, in the display apparatus according to the embodiment of the present disclosure, the diffusion and/or the movement of the metal constituting the emission connecting lines <NUM>, the metal constituting the address connecting line <NUM>, the metal constituting the ground dummy pattern <NUM>, and the metal constituting the driving dummy pattern <NUM> through adjacent components may be prevented or at least reduced. That is, in the display apparatus according to the embodiment of the present disclosure, the migration of the metal constituting the emission connecting lines <NUM>, the metal constituting the address connecting line <NUM>, the metal constituting the ground dummy pattern <NUM>, and the metal constituting the driving dummy pattern <NUM> may be prevented or at least reduced. The upper insulating layer <NUM> surrounds the light-emitting chips <NUM>. For example, the first end 161a and the second end 161b of each emission connecting line <NUM> may be disposed outside the upper insulating layer <NUM>. The ground dummy pattern <NUM> and the driving dummy pattern <NUM> are covered by the upper insulating layer <NUM>. Therefore, in the display apparatus according to the embodiment of the present disclosure, the electrical connection between the emission connecting lines <NUM> and the ground dummy pattern <NUM> and/or between the emission connecting lines <NUM> and the driving dummy pattern <NUM> may be prevented or at least reduced.

The optical sheet <NUM> may uniformly supply the light emitted from the light-source module <NUM> to the entire area of the liquid crystal panel LP. The optical sheet <NUM> includes a reflective plate <NUM> and may further include a diffusion plate <NUM>, a phosphor sheet <NUM>, and a prism sheet <NUM>. The liquid crystal panel LP is disposed on the optical sheet <NUM> of the back-light unit BL.

The reflective plate <NUM> may re-reflect light reflected by the diffusion plate <NUM>, the phosphor sheet <NUM> and the prism sheet <NUM> in a direction of the liquid crystal panel LP. The reflective plate <NUM> includes a reflecting pattern <NUM> (e.g., a reflecting layer). The reflecting pattern <NUM> may include a material having high reflectivity. For example, the reflecting pattern <NUM> may include a metal, such as aluminum Al and silver Ag.

The reflective plate <NUM> may reflect the light emitted through a side of each light-emitting chip <NUM> in a direction of the liquid crystal panel LP. For example, the reflecting pattern <NUM> may be in contact with the upper insulating layer <NUM> of the light-source module <NUM>, and the reflective plate <NUM> includes a scattering layer <NUM> covering the reflecting pattern <NUM>. The scattering layer <NUM> may surround the side of each light-emitting chip <NUM>. For example, the reflective plate <NUM> may include penetrating holes <NUM> into which the light-emitting chips <NUM> are inserted. Thus, in the display apparatus according to the embodiment of the present disclosure, the light emitted through the side of each light-emitting chip <NUM> may be scattered by the scattering layer <NUM>, and the light scattered by the scattering layer <NUM> may be reflected in the direction of the liquid crystal panel LP by the reflecting pattern <NUM>. That is, in the display apparatus according to the embodiment of the present disclosure, the efficiency of the light-source module <NUM> may be improved. The scattering layer <NUM> may include an insulating material. Therefore, in the display apparatus according to the embodiment of the present disclosure, the electrically connection between the light-emitting chips <NUM> due to the reflective plate <NUM> may be prevented or at least reduced.

The diffusion plate <NUM> may diffuse the light emitted by each light-emitting chip <NUM>. The phosphor sheet <NUM> may realize various colors using the light emitted by the light-emitting chips <NUM>. For example, the light supplied to the liquid crystal panel LP passing through the phosphor sheet <NUM> may be white light. The prism sheet <NUM> may improve the luminance of the light supplied to the liquid crystal panel LP by condensing light.

<FIG> are views schematically showing a method of forming a back-light unit in the display apparatus of the present disclosure.

The method of forming the back-light unit in the display apparatus of the present disclosure will be described with reference to <FIG>. First, the method of forming the back-light unit in the display apparatus may include a step of forming the ground voltage line <NUM> and the driving voltage line <NUM> on the light-source substrate <NUM>, as shown in <FIG>.

The ground voltage line <NUM> and the driving voltage line <NUM> may be formed of a conductive material. The ground voltage line <NUM> and the driving voltage line <NUM> may be formed of a material having a relative low resistance. For example, the ground voltage line <NUM> and the driving voltage line <NUM> may be formed of a metal, such as copper (Cu), nickel (Ni), silver (Ag), gold (Au), platinum (Pt), and aluminum (Al). The driving voltage line <NUM> may be formed of the same material as the ground voltage line <NUM>. The driving voltage line <NUM> may be formed by the same process as the ground voltage line <NUM>. The driving voltage line <NUM> may be formed simultaneously with the ground voltage line <NUM>. For example, the step of forming the ground voltage line <NUM> and the driving voltage line <NUM> may include a step of forming a metal layer on the light-source substrate <NUM>, and a step of patterning the metal layer. The ground voltage line <NUM> and the driving voltage line <NUM> may be formed on the same layer.

The method of forming the back-light unit in the display apparatus may include a step of forming the lower insulating layer <NUM> on the light-source substrate <NUM> in which the ground voltage line <NUM> and the driving voltage line <NUM> are formed, and a step of forming a ground contact hole h1 partially exposing the ground voltage line <NUM> and a driving contact hole h2 partially exposing the driving voltage line <NUM> in the lower insulating layer <NUM>, as shown in <FIG>.

The lower insulating layer <NUM> may be formed of an insulating material. For example, the lower insulating layer <NUM> may be formed of an inorganic insulating material, such as silicon oxide (SiOx) and silicon nitride (SiNx). The ground voltage line <NUM> and the driving voltage line <NUM> may be covered by the lower insulating layer <NUM>.

The method of forming the back-light unit in the display apparatus may include a step of forming the emission connecting lines 161b, the ground dummy pattern <NUM> and driving dummy pattern <NUM> on the lower insulating layer <NUM>, as shown in <FIG>.

The emission connecting lines <NUM>, the ground dummy pattern <NUM> and the driving dummy pattern <NUM> may be formed of a conductive material. The emission connecting lines <NUM>, the ground dummy pattern <NUM> and the driving dummy pattern <NUM> may be formed of a material having a relative low resistance. For example, the emission connecting lines <NUM>, the ground dummy pattern <NUM> and the driving dummy pattern <NUM> may be formed of a metal, such as copper (Cu), nickel (Ni), silver (Ag), gold (Au), platinum (Pt), and aluminum (Al). The emission connecting lines <NUM>, the ground dummy pattern <NUM> and the driving dummy pattern <NUM> may be formed of the same material. The emission connecting lines <NUM>, the ground dummy pattern <NUM> and the driving dummy pattern <NUM> may be formed by the same process. The emission connecting lines <NUM>, the ground dummy pattern <NUM> and the driving dummy pattern <NUM> may be simultaneously formed. For example, the step of forming the emission connecting lines <NUM>, the ground dummy pattern <NUM> and the driving dummy pattern <NUM> may include a step of forming a metal layer on the lower insulating layer <NUM> and a step of patterning the metal layer. The emission connecting lines <NUM>, the ground dummy pattern <NUM> and the driving dummy pattern <NUM> may be formed on the same layer.

The emission connecting lines <NUM> may be formed between the ground voltage line <NUM> and the driving voltage line <NUM>. For example, the emission connecting lines <NUM> may be spaced away from the ground voltage line <NUM> and the driving voltage line <NUM>. The ground dummy pattern <NUM> may be formed on the ground voltage line <NUM>. For example, the ground dummy pattern <NUM> may be electrically connected to the ground voltage line <NUM> through the ground contact hole. The ground dummy pattern <NUM> may overlap the ground voltage line <NUM>. The driving dummy pattern <NUM> may be formed on the driving voltage line <NUM>. For example, the driving dummy pattern <NUM> may be electrically connected to the driving voltage line <NUM>. The driving dummy pattern <NUM> may overlap the driving voltage line <NUM>.

The method of forming the back-light unit in the display apparatus may include a step of forming the upper insulating layer <NUM> on the light-source substrate <NUM> in which the emission connecting lines <NUM>, the ground dummy pattern <NUM> and the driving dummy pattern <NUM> is formed, as shown in <FIG>.

The upper insulating layer <NUM> may be formed of an insulating material. For example, the upper insulating layer <NUM> may be formed of an inorganic insulating material, such as silicon oxide (SiOx) and silicon nitride (SiNx). The ground dummy pattern <NUM> and the driving dummy pattern <NUM> may be covered by the upper insulating layer <NUM>. The upper insulating layer <NUM> may expose both ends of each emission connecting line 161a and 161b. For example, the upper insulating layer <NUM> may surround a region in which the light emitting chips <NUM> are arranged by a subsequent process.

The method of forming the back-light unit in the display apparatus may include a step of bonding the light-emitting chips <NUM> on the light-source substrate <NUM> in which the upper insulating layer <NUM> is formed, as shown in <FIG>.

Each of the light-emitting chips <NUM> may include the first chip pad 150a and the second chip pad 150b. For example, the first chip pad 150a of each light-emitting chip <NUM> may be connected to the first end 161a of one of the emission connecting lines <NUM>, and the second chip pad 150b of each light-emitting chip <NUM> may be connected to the second end 161b of one of the emission connecting lines <NUM>. Thus, in method of forming the back-light unit in the display apparatus, the light-emitting chips <NUM> may be connected to each other by the emission connecting lines <NUM>.

The method of forming the back-light unit in the display apparatus may include a step of arranging the reflective plate <NUM> including penetrating holes <NUM> corresponding to the light-emitting chips <NUM> on the upper insulating layer <NUM>, as shown in <FIG>. The penetrating hole <NUM> is an opening in which a corresponding light-emitting chip <NUM> is disposed.

Accordingly, in the display apparatus according to the embodiment of the present disclosure, the light-source module <NUM> of the back-light unit BL includes the lower insulating layer <NUM> covering the ground voltage line <NUM> and the driving voltage line <NUM>, the light-emitting chips <NUM> disposed on the lower insulating layer <NUM>, the emission connecting lines <NUM> connecting between the light-emitting chips <NUM>, may include the ground dummy pattern <NUM> overlapping with the ground voltage line <NUM>, and includes the driving dummy pattern <NUM> overlapping with the driving voltage line <NUM>, wherein the ground dummy pattern <NUM> and the driving dummy pattern <NUM> are disposed between the light-emitting chips <NUM> and the emission connecting lines <NUM>, wherein the ground dummy pattern <NUM> may be electrically connected to the ground voltage line <NUM> by penetrating the lower insulating layer <NUM>, and wherein driving dummy pattern <NUM> are electrically connected to the driving voltage line <NUM>, optionally by penetrating the lower insulating layer <NUM>. Thus, in the display apparatus according to the embodiment of the present disclosure, the resistance of the ground voltage line <NUM> and the resistance of the driving voltage line <NUM> may be reduced. And, in the display apparatus according to the embodiment of the present disclosure, the ground dummy pattern <NUM> and the driving dummy pattern <NUM> may be formed by the same process as the emission connecting lines <NUM>. For example, in the display apparatus according to the embodiment of the present disclosure, the ground dummy pattern <NUM> and the driving dummy pattern <NUM> may be formed simultaneously with the emission connecting lines <NUM>. Therefore, in the display apparatus according to the embodiment of the present disclosure, the luminance difference of the light-emitting chips <NUM> may be prevented or at least reduced, without lowering the process efficiency.

Furthermore, in the display apparatus according to the embodiment of the present disclosure, the ground dummy pattern <NUM> and the driving dummy pattern <NUM> are formed between the light-emitting chips <NUM> and the emission connecting lines <NUM>. Thus, in the display apparatus according to the embodiment of the present disclosure, the resistance of the ground voltage line <NUM> and the resistance of the driving voltage line <NUM> may be reduced, without increasing a non-emission area in which the light-emitting chips <NUM> are not disposed. That is, in the display apparatus according to the embodiment of the present disclosure, the size of a light-emitting area in which the light is emitted by the light-emitting chips <NUM> is maintained, and the luminance difference of the light-emitting chips <NUM> may be prevented or at least reduced. Therefore, in the display apparatus according to the embodiment of the present disclosure, the quality of the image provided to the user may be effectively improved.

The display apparatus according to the embodiment of the present disclosure is described that the second output terminal O2 of each driving chip <NUM> is connected to the first input terminal I1 of adjacent driving chip <NUM> in the first direction by the address connecting line <NUM>. That is, in the display apparatus according to the embodiment of the present disclosure, an address wire to which the address signal is applied from the outside through a pad part may be connected to the first input terminals I1 of the driving chip <NUM> arranged at the outermost side among the driving chips <NUM> which are disposed side by side in the first direction. However, in the display apparatus according to another embodiment of the present disclosure, the first input terminal I1 of each driving chip <NUM> may be individually connected to the address wire. For example, in the display apparatus according to another embodiment of the present disclosure, the first input terminal I1 of each driving chip <NUM> may be connected to the address wire different from the first input terminal I1 of adjacent driving chip <NUM> in the first direction. In the display apparatus according to another embodiment of the present disclosure, the address connecting line <NUM> and the second output terminal O2 of each driving chip <NUM> may be omitted. Thus, in the display apparatus according to another embodiment of the present disclosure, turn on and turn off and luminance of each light-emitting block LB may be independently controlled. Therefore, in the display apparatus according to another embodiment of the present disclosure, the local dimming may be effectively implemented.

The display apparatus according to the embodiment of the present disclosure is described that a signal applied by the driving voltage line <NUM> electrically connected to the light-emitting chips <NUM> is different from a signal applied to the ground voltage line <NUM> electrically connected to the driving chip <NUM>. However, in the display apparatus according to another embodiment of the present disclosure, the driving voltage line <NUM> may be electrically connected to the ground voltage line <NUM>. For example, in the display apparatus according to another embodiment of the present disclosure, a driving voltage corresponding to the luminance of each light-emitting chip <NUM> may be generated/applied by the driving chip <NUM>.

The display apparatus according to the embodiment of the present disclosure is described that the ground dummy pattern <NUM> and the driving dummy pattern <NUM> are disposed on the lower insulating layer <NUM>. However, in the display apparatus according to another embodiment of the present disclosure, only the driving dummy pattern <NUM> may be formed. Thus, in the display apparatus according to another embodiment of the present disclosure, the degree of freedom for the configuration of the light-source module <NUM> may be improved.

The display apparatus according to the embodiment of the present disclosure is described that the lower insulating layer <NUM> is made of an inorganic insulating material, such as silicon oxide (SiOx) and silicon nitride (SiNx). However, in the display apparatus according to another embodiment of the present disclosure, the lower insulating layer <NUM> may have a multi-layer structure of an inorganic layer made of an inorganic insulating material and an organic layer made of an organic insulating material, as shown in <FIG>. For example, in the display apparatus according to another embodiment of the present disclosure, the lower insulating layer <NUM> may have a stacked structure of a first lower layer 111a, a second lower layer 111b and a third lower layer 111c, as shown in <FIG>. The second lower layer 111b may include a material different from the first lower layer 111a and the third lower layer 111c. For example, the first lower layer 111a, which is the lowest layer of the lower insulating layer <NUM> disposed closest to the ground voltage line <NUM> and the driving voltage line <NUM>, and the third lower layer 111c, which is the uppermost layer of the lower insulating layer <NUM> disposed close to the ground dummy pattern <NUM> and the driving dummy pattern <NUM> may be the inorganic layer made of an inorganic insulating material, such as silicon oxide (SiOx) and silicon nitride (SiNx), and the second lower layer 111b disposed between the first lower layer 111a and the third lower layer 111c may be an organic layer made of an organic insulating material. Thus, in the display apparatus according to another embodiment of the present disclosure, the diffusion of the metal constituting the ground voltage line <NUM>, the metal constituting the driving voltage line <NUM>, the metal constituting the ground dummy pattern <NUM>, and the metal constituting the driving dummy pattern <NUM> through the second lower layer 111b, which is an organic layer, may be prevented or at least reduced.

In the display apparatus according to the claimed invention, the reflecting pattern <NUM> includes a conductive material and is electrically connected to the ground dummy pattern <NUM> and the driving dummy pattern <NUM>, optionally by penetrating the upper insulating layer <NUM>, as shown in <FIG>. Thus, in the display apparatus according to the claimed invention, the resistance of the ground voltage line <NUM> and the resistance of the driving voltage line <NUM> may be greatly reduced. Therefore, in the display apparatus according to the the claimed invention, the luminance difference of the light-emitting chips <NUM> may be effectively prevented or at least reduced.

Claim 1:
A display apparatus comprising:
a back-light unit (BL) including:
a light-source module (<NUM>) configured to emit light and comprising:
a driving voltage line (<NUM>) on a light-source substrate (<NUM>);
a lower insulating layer (<NUM>) on the driving voltage line (<NUM>);
a plurality of light-emitting chips (<NUM>) on the lower insulating layer (<NUM>);
a driving chip (<NUM>) spaced apart from the plurality of light-emitting chips (<NUM>);
a plurality of emission connecting lines (<NUM>) electrically connecting respective light-emitting chips of the plurality of light-emitting chips (<NUM>) to the driving voltage line (<NUM>) and the driving chip (<NUM>); and
a driving dummy pattern (<NUM>) between light-emitting chips of the plurality of light-emitting chips (<NUM>) and between emission connecting lines of the plurality of emission connecting lines (<NUM>),
wherein the plurality of light-emitting chips (<NUM>) are non-overlapping with the driving voltage line (<NUM>), and the driving voltage line (<NUM>) is electrically connected to the driving dummy pattern (<NUM>); and
an optical sheet (<NUM>) on the light-source module; and
a liquid crystal panel (LP) on the optical sheet (<NUM>) of the back-light unit (BL),
wherein the light-source module (<NUM>) further includes:
an upper insulating layer (<NUM>) on the plurality of emission connecting lines (<NUM>) and the driving dummy pattern (<NUM>), the upper insulating layer (<NUM>) surrounding the plurality of light-emitting chips (<NUM>),
wherein the optical sheet (<NUM>) includes a reflective plate (<NUM>) on the upper insulating layer (<NUM>), the reflective plate (<NUM>) comprising a reflecting pattern (<NUM>) having a conductive material and electrically connected to the driving dummy pattern (<NUM>), and a scattering layer (<NUM>) that covers the reflecting pattern (<NUM>).