Patent Description:
A diode (diode) is a common semiconductor device that can be used as a power device in power electronics. In particular, a fast recovery diode (FRD) has advantages such as high on-state current density, low loss, and good stability, and is widely used in fields such as power grid, transportation, communication, photovoltaic, and household appliances. For example, the fast recovery diode may be combined with an insulated gate bipolar transistor (IGBT) to be used as a switching element in an inverter circuit, to convert a direct current into an alternating current, thereby driving a motor (motor) to operate.

<FIG> shows a conventional structure of a diode. When the diode is positively conducted (energized), a P-type anode layer injects a large quantity of holes into a drift layer (drift layer), and an N-type cathode layer injects a large quantity of electrons into the drift layer. Therefore, during conduction, the drift layer stores a large quantity of electron-hole pairs. When the diode is off (cut off), the holes stored in the drift layer are extracted through the P-type anode layer. A large quantity of holes stored in a terminal region of the drift layer are extracted through a curved edge of the P-type anode layer. As a result, currents of the curved edge are concentrated, so that a temperature of the curved edge rises sharply. In addition, curvature effect existing in the curved edge causes an electric field to concentrate, thereby generating an avalanche, so that currents of the curved edge are further concentrated, and the temperature of the curved edge is further increased. Therefore, the curved edge is easily burnt, and the diode fails. <CIT> describes a semiconductor device which includes a semiconductor body including a first surface, an inner region and an edge region, a first doped device region of a first doping type in the inner region and the edge region, a second device region forming a device junction in the inner region with the first device region, and a plurality of at least two dielectric regions extending from the first surface into the semiconductor body. <CIT> describes a semiconductor device which includes a first semiconductor layer of a first conductivity type having first and second main surfaces, a second semiconductor layer of a second conductivity type selectively formed on the first main surface of the first semiconductor layer, the second semiconductor layer including a first region having a relatively high injection efficiency and a second region having a relatively low injection efficiency. <CIT> describes an anode electrode metal layer composed of aluminum formed in a region on the inner side than an anode layer formed on a main surface of a semiconductor substrate, a structure similar to the one shown in <FIG> of the present application. <CIT> describes a semiconductor device, such as a power MOSFET, Schottky rectifier or p-n rectifier, which has a voltage-sustaining zone between a first and second device regions adjacent to respective first and second opposite surfaces of a semiconductor body. <CIT> describes an insulation film which includes a first opening portion in at least one of a cell region and a termination region, and a second opening portion in an interface region.

Embodiments of this application provide a diode and a power circuit. The diode has a low burning risk and high reliability, and further improves reliability of the power circuit.

According to a first aspect, a diode according to claim <NUM> is provided.

The first electrode layer may be used as a cathode region of the diode, and the second electrode layer may be used as an anode region of the diode. Alternatively, the first electrode layer may be used as an anode region of the diode, and the second electrode layer may be used as a cathode region of the diode.

Doped impurities of a same property means that types of doped impurities are the same. It may be understood that, for a semiconductor, impurities may be classified into an N (negative) type impurity used to provide an electron and a P (positive) type impurity used to provide a hole. The doped impurities of a same property means that doped impurities of the same property or type, and are both the N-type impurity or P-type impurity. The drift layer and the first electrode layer being doped with impurities of a same property means that the drift layer is doped with the N-type impurity, and the first electrode layer is doped with the N-type impurity, or the drift layer is doped with the P-type impurity, and the first electrode layer is doped with the P-type impurity. Relatively, doped impurities of different properties means that types of doped impurities are different. Specifically, when the drift layer and the electrode layer are doped with impurities of different properties, if one of the drift layer and the first electrode layer is doped with the N-type impurity, the other is doped with the P-type impurity, or if one of the drift layer and the first electrode layer is doped with the P-type impurity, the other is doped with the N-type impurity.

The terminal region is a part of the drift layer of the diode that surrounds the active region. That is, the drift layer of the diode includes an active region and a terminal region, where the terminal region surrounds the active region. The terminal region may be used to alleviate curvature effect of an electric field at an edge of the active region, and increase a breakdown voltage of the diode.

The first conductor and the second conductor refer to two objects that have low resistivity and are easy to conduct a current, for example, metals and the like. A specific material of the first conductor and a specific material of the second conductor may be the same, for example, both are tungsten. A specific material of the first conductor and a specific material of the second conductor may also be different. For example, the material of the first conductor is tungsten, and the material of the second conductor is aluminum. The first conductor and the second conductor are located at different positions in the diode. Specifically, the first conductor is located above the first region, and is configured to implement a connection between the first region and the power supply. The second conductor is located above the second region, and is configured to implement a connection between the second region and the power supply, where the connection between the second region and the power supply is specifically that the second region is connected to the power supply through the second conductor, the first resistor, and the first conductor sequentially.

In the diode, the first region and the second region in the second electrode layer are separated by an insulation trench. The first region may be connected to a power supply through the first conductor, to ensure a conduction characteristic of the diode. The second region is connected to the power supply through the second conductor, the first resistor, and the first conductor sequentially, so that when the diode is on, the first resistor may reduce an electric potential of the second region, that is, the electric potential of the second region is lower than an electric potential of the first region. Therefore, efficiency of injecting a carrier into the drift layer through the second region is reduced, so that when the diode is off, a quantity of carriers that are extracted through the second region is small, current density of the second region is reduced, and current concentration in the second region is suppressed. Further, a risk that the diode is burned caused by the current concentration in the second region is suppressed, and reliability of the diode is improved.

In addition, when the diode is off, and when a carrier passes through the second region and flows through the first resistor, an electric potential of the first resistor may be increased. Therefore, an electric potential difference between the second region and the first electrode layer is reduced, and the carrier that passes through the second region is further reduced. Further, a risk that the diode is burned caused by the current concentration in the second region is further suppressed, and reliability of the diode is improved.

In addition, the second region is connected to the power supply by the first resistor. A material and/or a wiring length of the first resistor may be selected to adjust a capability of the first resistor to block the carrier. Therefore, the capability of the first resistor to block the carrier can be improved without occupying an excessively much area of the second electrode layer, thereby ensuring an area of the first region, and further ensuring the conduction characteristic of the diode.

In a possible implementation, a depth by which the second region extends into the active region is greater than a depth by which the first region extends into the active region.

In this implementation, a junction depth of the second region is greater than a junction depth of the first region, that is, the junction depth of the second region is large, an interface between the second region and the drift layer is increased, an electric field at the interface between the second region and the drift layer may be dispersed, and current concentration at the interface between the second region and the drift layer is reduced. Therefore, heat generation at the interface between the second region and the drift layer is suppressed, a risk that the diode is burned is reduced, and diode reliability is further improved.

In a possible implementation, the first region includes a plurality of third regions on the active region, and adjacent third regions in the plurality of third regions are separated by a second insulation trench, where a depth by which the second insulation trench extends into the active region is greater than a depth by which the third region extends into the active region.

In this implementation, the first region is divided into a plurality of third regions by a second insulation trench, and a depth by which the second insulation trench extends into the active region is greater than a depth by which the third region extends into the active region. Therefore, when the diode is in an on state, the second insulation trench may block or slow down migration of a carrier in the third region to the terminal region, thereby reducing a quantity of carriers in the terminal region. Therefore, when the diode is off, a quantity of carriers that are extracted through the second region is also small, current concentration in the second region is further reduced, and heat generation in the second region is suppressed, so that a risk that the diode is burned is reduced, and reliability of the diode is further improved.

In a possible implementation, a barrier layer is disposed between the first region and the active region, and the barrier layer is configured to slow down migration of the carrier between the first region and the active region.

In this implementation, a barrier layer is disposed between the first region and the active region. When the diode is in an on state, the barrier layer may slow down migration of the carrier in the first region to the active region, thereby reducing the carrier diffused to the terminal region, and reducing a quantity of carriers in the terminal region. Therefore, when the diode is off, a quantity of carriers that are extracted through the second region is also small, current concentration in the second region is further reduced, and heat generation in the second region is suppressed, so that a risk that the diode is burned is reduced, and reliability of the diode is further improved.

In a possible implementation, the first resistor is polycrystalline silicon.

In this implementation, the first resistor may be prepared by using polycrystalline silicon. A preparation process is simple, and an electric potential of the second region may be effectively reduced.

In a possible implementation, a first semiconductor layer is disposed between the drift layer and the first electrode layer, where the drift layer and the first semiconductor layer are doped with impurities of a same property, and a doping concentration of the first semiconductor layer is between the doping concentration of the drift layer and the doping concentration of the first electrode layer.

In this implementation, the first semiconductor layer may be used as a field cut-off layer to prevent an electric field in the drift layer from extending to the first electrode layer, and may avoid electric leakage of the diode at the first electrode layer, thereby reducing a risk of breakdown of the diode, and improving reliability of the diode.

In a possible implementation, the first region and the second region are doped with an acceptor impurity, and the first electrode layer and the drift layer are doped with a donor impurity; or the first region and the second region are doped with a donor impurity, and the first electrode layer and the drift layer are doped with an acceptor impurity.

In this implementation, regardless of a property of the impurity doped in the first region and the second region, a structure of the diode provided in this application may disperse a current in the second region, thereby improving reliability of the diode. In other words, the structure of the diode has high universality.

In a possible implementation, at least one field limiting ring is disposed at an upper portion of the terminal region.

In this implementation, a field limiting ring is disposed at an upper portion of the terminal region, and the field limiting ring may be embedded into the terminal region from an upper surface of the terminal region. The field limiting ring may be used as a voltage divider of the second electrode layer, so that a breakdown voltage of the second electrode layer may be increased, thereby improving reliability of the diode. Specifically, when a voltage V1 applied to the second electrode layer is lower than a breakdown voltage Vb of the second electrode layer, the electric field may be extended to the field limiting ring. When the voltage V1 applied to the second electrode layer increases, the increased voltage is borne by the field limiting ring. In this way, the breakdown voltage of the second electrode layer may be increased.

In a possible implementation, a metal field plate is disposed above the field limiting ring.

In this implementation, a metal field plate may increase a breakdown voltage of the second electrode layer. In particular, when silicon dioxide is used as a protective layer on the upper surface of the terminal region, because a movable charge and trap exist in a silicon dioxide layer, a positive charge exists on an interface between the silicon dioxide layer and the terminal region, and another charge may also be attached to a surface of the silicon dioxide layer. These charges cause concentration and instability of an electric field on a surface of the terminal region, thereby affecting a withstand voltage characteristic of the second electrode layer. The metal field plate may disperse the electric field of on a surface of the terminal region, so as to improve a withstand voltage level of the second electrode layer. In other words, the metal field plate may increase the breakdown voltage of the second electrode layer.

In a possible implementation, the diode further includes a resistive field plate surrounding the metal field plate.

In this implementation, the electric field of on a surface of the terminal region may be dispersed by a resistive field plate, so that the breakdown voltage of the second electrode layer may be increased.

In a possible implementation, the diode further includes a cut-off ring surrounding an upper portion of the terminal region.

The cut-off ring is a semiconductor layer doped with an impurity surrounding the upper portion of the terminal region, a property or type of the impurity doped into the cut-off ring is the same as that of the impurity doped into the terminal region, and a doping concentration of the cut-off ring is greater than a doping concentration of the terminal region. The cut-off ring is configured to cut off an electric field in the terminal region that passes through a side wall of the terminal region, so as to avoid electric leakage of the diode at a side wall of the terminal region, thereby reducing a risk of breakdown of the diode, and improving reliability of the diode.

In this implementation, the diode has the cut-off ring, and may be configured to cut off the electric field in the terminal region that passes through the side wall of the terminal region, so as to avoid the electric leakage of the diode at the side wall of the terminal region, thereby reducing the risk of breakdown of the diode, and improving reliability of the diode.

According to a second aspect, a power circuit is provided, including the diode provided in the first aspect and an insulated gate bipolar transistor.

The diode and the power circuit provided in the embodiments of this application may reduce a risk that the diode is burned, while ensuring the conduction characteristic of the diode, and have high reliability.

The following describes technical solutions of the embodiments in this application with reference to accompanying drawings. It is clear that the described embodiments are merely some but not all of embodiments of this application.

A diode is widely used, is an important power element, and may be applied to a plurality of power circuits, such as an inverter circuit, a rectifier circuit, and a freewheeling circuit.

<FIG> shows a power circuit that can convert a direct current into an alternating current. The power circuit may be a three-phase inverter circuit that includes three bridge arms. The three bridge arms are configured to generate a U phase, a V phase, and a W phase. Two switching elements may be disposed on each bridge arm in series. By controlling connection and disconnection of the switching elements on different bridge arms, a direct current may be converted into an alternating current, so that an alternating current motor may be driven. The switching element on the bridge arm generally includes a diode and an IGBT. In other words, the diode is one of critical components of the power circuit.

It may be understood that <FIG> is merely used as an example to describe a purpose of the diode, but does limit the purpose of the diode. There are other purposes of the diode, which are not enumerated herein.

When the diode changes from an on state to an off state, under an action of a reverse voltage, a large quantity of carriers stored in a terminal region are extracted through an electrode layer. A hole is extracted through a P-type anode layer, and an electron is extracted through an N-type cathode layer. Due to factors such as diffusion of a P-type impurity, an edge of the P-type anode layer is curve-shaped. The curved edge is closer to the terminal region, and therefore a large quantity of holes in the terminal region are extracted through the curved edge, resulting in high current density and a large amount of heat. In addition, curvature effect of the curved edge causes an electric field to concentrate, thereby generating an avalanche, so that currents of the curved edge are further concentrated, thereby generating more heat. The heat may burn the diode.

The reverse voltage refers to a voltage at which the diode is in an off state. In other words, the reverse voltage is applied to the diode, and the diode enters the off state. A forward voltage is opposite to the reverse voltage. When the forward voltage is applied to the diode, the diode enters an on state. A carrier is a particle with a charge that may move freely. In the field of semiconductors, the carrier generally refers to an electron and a hole. In other words, the electron and the hole may be collectively referred to as a carrier, the electron is one type of the carrier, and the hole is another type of the carrier. The hole is also referred to as an electron hole (electron hole), and is a vacancy left on a covalent bond after one electron is lost on the covalent bond.

<FIG> shows a solution. In this solution, an outer region of a P-type anode layer does not cover a metal electrode. When a diode is on, an electric potential of the outer region is lower than an electric potential of a central region, efficiency of injecting carriers into a terminal region through the outer region is low, and fewer carriers are injected. When the diode is off, a small quantity of carriers are extracted through the outer region, so as to avoid a risk of burning caused by current concentration in the outer region. In this manner, if a width of the outer region covering the metal electrode is small, effect of suppressing current concentration in the outer region is not obvious. A risk of burning caused by current concentration still exists. If the width of an outer region covering the metal electrode is large, an area of the central region covering the metal electrode is small, so that a conduction characteristic of the diode is affected.

Referring to <FIG>, an embodiment of this application provides a diode, including an electrode layer <NUM> and a drift layer <NUM> disposed on one side of the electrode layer <NUM>. For ease of description, a direction of a side of the electrode layer <NUM> facing the drift layer <NUM> may be referred to as an upper direction of the electrode layer <NUM>, that is, the drift layer <NUM> is located above the electrode layer <NUM>. Correspondingly, a direction of a side of the electrode layer <NUM> away from the drift layer <NUM> may be referred to as a lower direction of the electrode layer <NUM>. In addition, in the following description, for layers or components located above the electrode layer <NUM>, an upper direction of the layers or components refers to a direction away from the electrode layer <NUM>, and a lower direction refers to a direction close to the electrode layer <NUM>.

As shown in <FIG>, the drift layer <NUM> includes an active region <NUM> and a terminal region <NUM>. The terminal region <NUM> surrounds the active region <NUM>. In other words, the active region <NUM> is a central region of the drift layer <NUM>, and the terminal region <NUM> is an edge region of the active region <NUM>.

An electrode layer <NUM> is disposed at an upper portion of the active region <NUM>. The electrode layer <NUM> may be divided into a region <NUM> and a region <NUM>. The region <NUM> surrounds the region <NUM>, or the region <NUM> is located around the region <NUM>. In other words, the region <NUM> is a central region of the electrode layer <NUM>, and the region <NUM> is an edge region of the electrode layer <NUM>. The upper portion of the active region <NUM> refers to an end of the active region <NUM> away from the electrode layer <NUM>.

As shown in <FIG>, an insulation trench <NUM> is disposed between the region <NUM> and the region <NUM>. In other words, the region <NUM> and the region <NUM> are separated by an insulation trench <NUM>. The insulation trench <NUM> is insulated. In an example, a depth of the insulation trench <NUM> is from <NUM> to <NUM>.

As shown in <FIG>, the insulation trench <NUM> may include an insulation layer <NUM>. The insulation layer <NUM> forms a periphery of the insulation trench <NUM>, so that the insulation trench <NUM> is insulated. In this way, an electric field of the region <NUM> may be prevented from extending into the region <NUM>. In some embodiments, the insulation layer <NUM> may be made of silicon dioxide.

A conductor <NUM> is disposed at an upper portion of the region <NUM>. The conductor <NUM> is in contact with the region <NUM>, so that the region <NUM> may be connected to a power supply A1 (not shown) through the conductor. A conductor <NUM> is disposed at an upper portion of the region <NUM>. The conductor <NUM> is in contact with the region <NUM>. There is a resistor <NUM> between the conductor <NUM> and the conductor <NUM>. In other words, the conductor <NUM> and the conductor <NUM> are connected by the resistor <NUM>. The conductor <NUM> is not directly connected to the power supply A1, but is connected to the power supply A1 through the resistor <NUM> and the conductor <NUM>. Therefore, the region <NUM> is connected to the power supply A1 through the conductor <NUM>, the resistor <NUM>, and the conductor <NUM> sequentially.

When the diode is on, the resistor <NUM> enables an electric potential of the region <NUM> to be lower than an electric potential of the region <NUM>, that is, the resistor <NUM> may reduce the electric potential of the region <NUM>. In this way, efficiency of injecting carriers into the terminal region <NUM> by the region <NUM> is low. Therefore, when the diode is off, fewer carriers flow through the region <NUM>, thereby suppressing current concentration in the region <NUM>, and suppressing a risk of burning caused by current concentration in the region <NUM>. In addition, when the diode is off, the carriers flow through the resistor <NUM> through the region <NUM>, and an electric potential of the resistor <NUM> is increased, thereby reducing an electric potential difference between the region <NUM> and the electrode layer <NUM>, further reducing the carriers that flow through the region <NUM>, and reducing a risk of burning caused by current concentration in the region <NUM>. In addition, a capability of the resistor <NUM> for blocking a carrier or a resistance value of the resistor <NUM> may be adjusted by a material or a wiring length of the resistor <NUM>, without occupying an excessive area of the electrode layer <NUM>, so that an area of the region <NUM> may be ensured, and impact on a conduction characteristic of the diode is small.

In this embodiment of this application, the resistor <NUM> is an object whose resistivity is between a conductor and an insulator. The resistor has a large resistivity, which may block a current from passing through, but not completely block the current from passing through. In some embodiments, the resistor <NUM> may be specifically polycrystalline silicon. In this embodiment of this application, a conductor (for example, the conductor <NUM> or the conductor <NUM>) is an object that has an extremely low resistivity and is easy to conduct a current. In some embodiments, the conductor may be a metal or a metal electrode, such as a tungsten electrode or an aluminum electrode. In other embodiments, the conductor may be another object having a good conductivity. A material of the conductor is not specifically limited in this embodiment of this application.

In addition, in the embodiments of this application, "contact" may be understood as "adjacent", and generally means that two objects in a block shape or a sheet shape are adjacent to each other, or one of the two objects is located on a surface of the other object. In addition, in this embodiment of this application, "connection" may mean direct contact of two objects. The "connection" may also mean that two objects are connected by a third object, that is, one side or one end of the third object is in contact with one of the two objects, and the other side or the other end of the third object is in contact with the other one of the two objects.

In some embodiments, referring to <FIG>, a part of the conductor <NUM> that is in contact with the resistor <NUM> is staggered with the conductor <NUM> in a thickness direction, and has a preset distance. Accordingly, the resistor <NUM> may have a length in the thickness direction. Therefore, in a case in which a small area of the electrode layer <NUM> is occupied, a wiring length of the resistor <NUM> connecting the conductor <NUM> and the conductor <NUM> may be increased, and a capability of the resistor <NUM> for blocking a carrier or a resistance value of the resistor <NUM> is increased.

The vertical direction shown in <FIG> may correspond to a y-axis direction in a three-dimensional coordinate system, a width direction corresponds to an x-axis direction in the three-dimensional coordinate system, and the thickness direction shown in <FIG> corresponds to a z-axis direction in the three-dimensional coordinate system.

The conductor <NUM> may be used as an electrode B1 of the diode. A conductor <NUM> located below the electrode layer <NUM> may be used as an electrode B2 of the diode. The electrode B1 may be an anode (anode) of the diode, and the electrode B2 may be a cathode (cathode) of the diode. Alternatively, the electrode B1 may be a cathode (cathode) of the diode, and the electrode B2 may be an anode (anode) of the diode. That is, the electrode B1 may be an anode or a cathode; and the electrode B2 may be an anode or a cathode. When the electrode B1 is an anode, the electrode B2 is a cathode; and when the electrode B2 is an anode, the electrode B1 is a cathode.

In some embodiments, the electrode B1 is an anode, and the electrode B2 is a cathode. In this case, the electrode layer <NUM> may be a P (positive) semiconductor, and is used as a P-type anode region. The P-type semiconductor refers to a semiconductor doped with a P-type impurity. The P-type impurity may also be referred to as an acceptor impurity (acceptor impurity), and is an impurity that may provide a hole for a semiconductor material, for example, a group III element such as B, Al, Ga, and In.

The electrode layer <NUM> may be an N (negative) semiconductor, and is used as an N-type cathode region. The N-type semiconductor refers to a semiconductor doped with an N-type impurity. The N-type impurity may also be referred to as a donor impurity (donor impurity), and is an impurity that may provide an electron for a semiconductor material, for example, a group V element such as phosphorus, arsenic, and antimony.

In some embodiments, the electrode B2 is an anode, and the electrode B1 is a cathode. In this case, the electrode layer <NUM> is an N-type semiconductor, and is used as an N-type cathode region. The electrode layer <NUM> is a P-type semiconductor layer, and is used as a P-type anode region.

Properties of an impurity doped into the drift layer <NUM> and an impurity doped into the electrode layer <NUM> are the same. That is, when the electrode layer <NUM> is a P-type semiconductor, the drift layer <NUM> is also a P-type semiconductor. That is, when the electrode layer <NUM> is an N-type semiconductor, the drift layer <NUM> is also an N-type semiconductor. A doping concentration of the impurity in the drift layer <NUM> is lower than a doping concentration of the impurity in the electrode layer <NUM>. In other words, the drift layer <NUM> is a lightly doped semiconductor, and the electrode layer <NUM> is a heavily doped semiconductor. Light doping means that less impurities are doped into a semiconductor. Heavy doping, corresponding to the light doping, means that a large quantity of impurities is doped into a semiconductor. In other words, doping may be classified into light doping and heavy doping based on a quantity of impurities to be doped.

In some embodiments, there is a semiconductor layer <NUM> between the drift layer <NUM> and the electrode layer <NUM>. Properties of an impurity doped into the semiconductor layer <NUM> and an impurity doped into the electrode layer <NUM> are the same. That is, when the electrode layer <NUM> is a P-type semiconductor, the semiconductor layer <NUM> is also a P-type semiconductor. That is, when the electrode layer <NUM> is an N-type semiconductor, the semiconductor layer <NUM> is also an N-type semiconductor. A doping concentration of the impurity in the semiconductor layer <NUM> is lower than the doping concentration in the electrode layer <NUM>, but is higher than the doping concentration in the drift layer <NUM>. That is, the doping concentration of impurities in the electrode layer <NUM>, the doping concentration of impurities in the semiconductor layer <NUM>, and the doping concentration of impurities in the drift layer <NUM> decreases sequentially.

The semiconductor layer <NUM> may also be referred to as a field stop layer, and may prevent an electric field in the drift layer <NUM> from extending to the electrode layer <NUM>, thereby avoiding electric leakage of the diode at the electrode layer <NUM>, reducing a risk of breakdown of the diode, and improving reliability of the diode.

Returning to <FIG>, in some embodiments, at least one field limiting ring (FLR) <NUM> is disposed at an upper portion of the terminal region <NUM>. The at least one field limiting ring <NUM> is embedded into the terminal region <NUM> from an upper surface of the terminal region. The field limiting ring <NUM> is also used as a field limiting ring junction of the electrode layer <NUM>. Correspondingly, the electrode layer <NUM> is used as a main junction of the field limiting ring <NUM>. Properties of an impurity doped into the field limiting ring <NUM> and an impurity doped into the electrode layer <NUM> are the same. That is, when the electrode layer <NUM> is a P-type semiconductor, the field limiting ring <NUM> is also a P-type semiconductor. That is, when the electrode layer <NUM> is an N-type semiconductor, the field limiting ring <NUM> is also an N-type semiconductor. The field limiting ring <NUM> may increase a breakdown voltage of the electrode layer <NUM>. Specifically, when a reverse voltage V1 applied to the electrode layer <NUM> is lower than a breakdown voltage Vb of the electrode layer <NUM>, the electric field may be extended to the field limiting ring. When the reverse voltage V1 applied to the electrode layer <NUM> increases, the increased voltage is borne by the field limiting ring <NUM>. In this way, the field limiting ring <NUM> is equivalent to a voltage divider of the electrode layer <NUM>, and may increase the breakdown voltage of the electrode layer <NUM>.

Still referring to <FIG>, in some embodiments, a field plate (FP) <NUM> is disposed above the field limiting ring <NUM>. For example, a field plate <NUM> may be a metal field plate (MFP). The field plate <NUM> may increase the breakdown voltage of the electrode layer <NUM>. Specifically, silicon dioxide is used as a protective layer on an upper surface of the terminal region <NUM>, that is, the upper surface is covered with a silicon dioxide layer. Because there are movable charges and traps in the silicon dioxide layer, there is a positive charge on an interface between the silicon dioxide layer and the terminal region <NUM>, and another charge may also be attached to a surface of the silicon dioxide layer. These charges cause concentration and instability of an electric field on a surface of the terminal region <NUM>, thereby affecting a withstand voltage characteristic of the electrode layer <NUM>. The field plate <NUM> may disperse an electric field of a surface of the terminal region <NUM>, thereby improving a withstand voltage level of the electrode layer <NUM>, that is, increasing the breakdown voltage of the electrode layer <NUM>.

On the surface of the terminal region <NUM>, a dielectric layer <NUM> is covered between adjacent field plates <NUM>. The dielectric layer <NUM> may also be referred to as an insulation layer, and may be used as a protective layer on the surface of the terminal region <NUM>. In some embodiments, the dielectric layer <NUM> may be made of silicon dioxide.

Still referring to <FIG>, in some embodiments, the field plate <NUM> is surrounded by a field plate <NUM>, that is, the field plate <NUM> is disposed around the field plate <NUM>. For example, the field plate <NUM> may be a resistive field plate (RFP). For example, the field plate <NUM> may be made of polycrystalline silicon. The field plate <NUM> may also disperse the electric field on the surface of the terminal region <NUM>, thereby increasing the breakdown voltage of the electrode layer <NUM>.

In some embodiments, a cut-off ring <NUM> is disposed at an outer edge of an upper portion of the terminal region <NUM>. That is, the cut-off ring <NUM> surrounds the upper portion of the terminal region <NUM>. Properties of an impurity doped into the cut-off ring <NUM> and an impurity doped into the terminal region <NUM> are the same. That is, when the terminal region <NUM> is an N-type semiconductor, the cut-off ring <NUM> is an N-type semiconductor. That is, when the terminal region <NUM> is a P-type semiconductor, the cut-off ring <NUM> is a P-type semiconductor. In addition, a doping concentration of the cut-off ring <NUM> is greater than a doping concentration of the terminal region <NUM>. The cut-off ring <NUM> may increase a breakdown voltage of the terminal region <NUM>. Specifically, the cut-off ring <NUM> may cut off an electric field in the terminal region <NUM> that passes through a side wall of the terminal region <NUM>, so as to avoid leakage of the diode at the side wall of the terminal region <NUM>, thereby reducing a risk of breakdown of the diode, and improving reliability of the diode.

The structure of the diode is described above with reference to <FIG> and <FIG>. Next, a solution for preparing the semiconductor device shown in <FIG> is described by using an example.

A silicon wafer (for example, float-zone silicon (float-zone silicon)) having a thickness and a certain doping concentration may be selected as the drift layer <NUM>.

An upper surface structure of the drift layer <NUM> may be prepared first. Specifically, the field limiting ring <NUM>, the cut-off ring <NUM>, and the electrode layer <NUM> may be prepared by an ion implantation doping process and a push knot process. Then, an oxide layer (for example, a silicon dioxide layer) is deposited on an upper surface of the drift layer <NUM> to be used as a mask. Etching is performed in a region corresponding to the insulation trench <NUM> to obtain a U-shaped groove, and an oxide layer on a surface of the region <NUM> is etched off. Then, a U-shaped insulation layer is prepared in a U-shaped groove in a thermal growth manner, and an insulation layer is prepared on a surface of the region <NUM>, so as to obtain an insulation layer <NUM>. A resistor <NUM> (for example, polycrystalline silicon) is then deposited on the insulation layer <NUM>. Afterwards, an insulation layer is deposited on the resistor <NUM>. The oxide layer corresponding to the conductor <NUM> in the region <NUM> and the oxide layer corresponding to the conductor <NUM> in the region <NUM> are etched off, and the oxide layer or the insulation layer corresponding to the conductor in the resistor <NUM> is etched off. Finally, the conductor <NUM> and the conductor <NUM> are deposited in a corresponding region. The "corresponding conductor" refers to a position that needs to or is to contact the conductor.

In addition, for preparation processes of the field plate <NUM>, the field plate <NUM>, and the dielectric layer <NUM>, reference may be made to the description in the prior art.

In this way, the upper surface structure of the drift layer <NUM> may be prepared.

Then, the drift layer <NUM> may be flipped over to prepare a lower surface structure of the drift layer <NUM>. Specifically, impurities may be injected into a lower end of the drift layer <NUM> by an ion implantation doping process and a push knot, to prepare the semiconductor layer <NUM> and the electrode layer <NUM>. Energy of an ion beam used to prepare the semiconductor layer <NUM> is higher than that of an ion beam used to prepare the electrode layer <NUM>. Then, the conductor <NUM> may be prepared on a side that is of the electrode layer <NUM> and that is away from the drift layer <NUM>.

Therefore, the diode shown in <FIG> may be prepared.

In addition, the foregoing describes only an example of a preparation process of the diode shown in <FIG>, and does not constitute a limitation. In another embodiment, the diode shown in <FIG> may be prepared by using another process.

Referring to <FIG>, an embodiment of this application further provides a diode. The diode includes an electrode layer <NUM>, and a drift layer <NUM> disposed on one side of the electrode layer <NUM>. The drift layer <NUM> includes an active region <NUM> and a terminal region <NUM>. The terminal region <NUM> surrounds the active region <NUM>. An electrode layer <NUM> is disposed at an upper portion of the active region <NUM>. The electrode layer <NUM> may be divided into a region <NUM> and a region <NUM>. The region <NUM> surrounds the region <NUM>. An insulation trench <NUM> is disposed between the region <NUM> and the region <NUM>.

A conductor <NUM> is disposed at an upper portion of the region <NUM>. The conductor <NUM> is in contact with the region <NUM>, so that the region <NUM> may be connected to a power supply A1 through the conductor. A conductor <NUM> is disposed at an upper portion of the region <NUM>. The conductor <NUM> is in contact with the region <NUM>. There is a resistor <NUM> between the conductor <NUM> and the conductor <NUM>. The conductor <NUM> is not directly connected to the power supply A1, but is connected to the power supply A1 through the resistor <NUM> and the conductor <NUM>. Therefore, the region <NUM> is connected to the power supply A1 through the conductor <NUM>, the resistor <NUM>, and the conductor <NUM> sequentially.

Still referring to <FIG>, in some embodiments, a semiconductor layer <NUM> is disposed between the electrode layer <NUM> and the drift layer <NUM>.

In some embodiments, at least one field limiting ring <NUM> is disposed at an upper portion of the terminal region <NUM>. A field plate <NUM> is disposed above the field limiting ring <NUM>. On the surface of the terminal region <NUM>, a dielectric layer <NUM> is covered between adjacent field plates <NUM>. The field plate <NUM> is surrounded by a field plate <NUM>. A cut-off ring <NUM> is disposed at an outer edge of an upper portion of the terminal region <NUM>.

For specific implementations and functions of the components in the diode shown in <FIG>, reference may be made to the foregoing descriptions of the diode shown in <FIG>.

Different from the diode shown in <FIG>, in the diode shown in <FIG>, a depth by which the region <NUM> extends into the active region <NUM> is greater than a depth by which the region <NUM> extends into the active region <NUM>. Referring to <FIG>, a direction of an extension depth is downward in a vertical direction. The extension depth specifically refers to a degree of downward depth along the vertical direction. An extension depth of the region in the active region <NUM> may also be understood as a degree to which a lower end of the region is close to the electrode layer <NUM>. As an extension depth of the region in the active region <NUM> is larger, a lower end of the region is closer to the electrode layer <NUM>. The extension depth may be referred to as a junction depth for short. The lower end of the region is an end of the region closest to the electrode layer <NUM>. In the diode shown in <FIG>, a junction depth of the region <NUM> is large, and an interface between the region <NUM> and the drift layer <NUM> is large, so that an electric field of the interface may be dispersed, thereby suppressing generation of heat, reducing a risk that the diode is burned, and improving reliability of the diode.

In addition, the diode shown in <FIG> may be prepared with reference to a preparation process of the diode shown in <FIG>. A difference is that when the diode shown in <FIG> is prepared, duration of push knot processing performed on the region <NUM> is greater than duration of push knot processing performed on the region <NUM>, so that a junction depth of the region <NUM> is greater than a junction depth of the region <NUM>.

Referring to <FIG> and <FIG>, an embodiment of this application further provides a diode. The diode includes an electrode layer <NUM>, and a drift layer <NUM> disposed on one side of the electrode layer <NUM>. The drift layer <NUM> includes an active region <NUM> and a terminal region <NUM>. The terminal region <NUM> surrounds the active region <NUM>. An electrode layer <NUM> is disposed at an upper portion of the active region <NUM>. The electrode layer <NUM> may be divided into a region <NUM> and a region <NUM>. The region <NUM> surrounds the region <NUM>. An insulation trench <NUM> is disposed between the region <NUM> and the region <NUM>. For example, a depth by which the region <NUM> extends into the active region <NUM> is greater than a depth by which the region <NUM> extends into the active region <NUM>.

For specific implementations and functions of the components in the diode shown in <FIG>, reference may be made to the foregoing descriptions of the diode shown in <FIG> or <FIG>.

Different from the diode shown in <FIG>, in the diode shown in <FIG>, the region <NUM> includes a plurality of regions <NUM>, and two adjacent regions <NUM> in the plurality of regions <NUM> are separated by an insulation trench <NUM>. In addition, as shown in <FIG>, a depth by which the insulation trench <NUM> extends into the active region <NUM> is greater than a depth by which the region <NUM> extends into the active region <NUM>. In this way, when the diode is in an on state, the insulation trench <NUM> may block or slow down migration of carriers in the region <NUM> to the terminal region <NUM>, thereby reducing a quantity of carriers in the terminal region <NUM>. Therefore, when the diode is off, a quantity of carriers that are extracted through the region <NUM> is also small, thereby further reducing current density of the region <NUM>, suppressing heat generation, reducing a risk that the diode is burned, and improving reliability of the diode.

In addition, the diode shown in <FIG> may be prepared with reference to a preparation process of the diode shown in <FIG>. A difference is that when the diode shown in <FIG> is prepared, the insulation trench <NUM> is also prepared while the insulation trench <NUM> is prepared, so as to divide the region <NUM> into a plurality of regions <NUM>. A preparation process of the insulation trench <NUM> is the same as that of the insulation trench <NUM>. In some embodiments, when the diode shown in <FIG> is prepared, the duration of the push-junction processing of the region <NUM> is greater than the duration of the push-junction processing of the region <NUM>, so that the junction depth of the region <NUM> is greater than the junction depth of the region <NUM>.

Referring to <FIG>, an embodiment of this application further provides a diode. The diode includes an electrode layer <NUM>, and a drift layer <NUM> disposed on one side of the electrode layer <NUM>. The drift layer <NUM> includes an active region <NUM> and a terminal region <NUM>. The terminal region <NUM> surrounds the active region <NUM>. An electrode layer <NUM> is disposed at an upper portion of the active region <NUM>. The electrode layer <NUM> may be divided into a region <NUM> and a region <NUM>. The region <NUM> surrounds the region <NUM>. An insulation trench <NUM> is disposed between the region <NUM> and the region <NUM>. For example, a depth by which the region <NUM> extends into the active region <NUM> is greater than a depth by which the region <NUM> extends into the active region <NUM>.

For specific implementations and functions of the components in the diode shown in <FIG>, reference may be made to the foregoing descriptions of the diode shown in <FIG>, <FIG>, or <FIG>.

Different from the diode shown in <FIG>, in the diode shown in <FIG>, a barrier layer <NUM> is disposed below the region <NUM>, that is, the barrier layer <NUM> is disposed between the region <NUM> and the active region <NUM>. Properties of an impurity doped into the barrier layer <NUM> and an impurity doped into the region <NUM> are different. Specifically, when the region <NUM> is doped with a P-type impurity, the barrier layer <NUM> is doped with an N-type impurity. When the region <NUM> is doped with an N-type impurity, the barrier layer <NUM> is doped with a P-type impurity. A property of the impurity doped into the barrier layer <NUM> is different from a property of the impurity doped into the region <NUM>. In other words, a property of the impurity doped into the barrier layer <NUM> is the same as a property of the impurity doped into the drift layer <NUM>. Compared with a doping concentration of the drift layer <NUM>, a doping concentration of the barrier layer <NUM> is higher.

In some embodiments, as shown in <FIG>, the region <NUM> includes a plurality of regions <NUM>, and two adjacent regions <NUM> in the plurality of regions <NUM> are separated by an insulation trench <NUM>. In addition, a barrier layer <NUM> is disposed below the region <NUM>.

When the diode is in an on state, the barrier layer <NUM> may slow down migration of carrier in the region <NUM> or the region <NUM> to the active region <NUM>, thereby reducing carriers diffused to the terminal region <NUM>, and reducing a quantity of carriers in the terminal region <NUM>. Therefore, when the diode is off, a quantity of carriers that are extracted through the region <NUM> is also small, thereby further reducing current density of the region <NUM>, suppressing heat generation, reducing a risk that the diode is burned, and improving reliability of the diode.

In addition, when the diode shown in <FIG> is prepared, when an upper surface structure of the drift layer <NUM> is prepared, the barrier layer <NUM> may be prepared at a corresponding position of the drift layer <NUM> first. For example, the barrier layer <NUM> is prepared by an ion implantation doping process. Then, a field limiting ring <NUM>, a cut-off ring <NUM>, an electrode layer <NUM>, and the like are prepared. For details, reference may be made to the foregoing descriptions of the diode preparation process shown in <FIG>.

In some embodiments, when the diode shown in <FIG> is prepared, the insulation trench <NUM> is also prepared while the insulation trench <NUM> is being prepared, so as to divide the region <NUM> into a plurality of regions <NUM>.

In some embodiments, when the diode shown in <FIG> is prepared, the duration of the push knot processing of the region <NUM> is greater than the duration of the push knot processing of the region <NUM>, so that the junction depth of the region <NUM> is greater than the junction depth of the region <NUM>.

The insulation trench <NUM> may be prepared first. Then, by the ion implantation doping process, an impurity C1 is injected into a region in which the barrier layer <NUM> is located, to prepare the barrier layer <NUM>, and an impurity C2 is injected into the region <NUM>. Then, a region above the barrier layer <NUM> is etched off, and the region <NUM> is deposited, to prepare the region <NUM>. Alternatively, the insulation trench <NUM> and the insulation trench <NUM> may be prepared first. Then, the impurity C1 is injected into the region in which the barrier layer <NUM> is located by the ion implantation doping process, to prepare the barrier layer <NUM>, and the impurity C2 is injected into the region <NUM>. Then, the region on the barrier layer <NUM> is etched off, and the region <NUM> is deposited, to prepare the region <NUM>. Properties of the impurity C1 and the impurity C2 are different.

Then, in the insulation trench <NUM> and the insulation trench <NUM> and on the upper surfaces of the region <NUM> and the region <NUM>, an insulator is deposited in an epitaxial growth manner. Afterwards, the insulator is etched, and a resistor is deposited in the etched insulator in an epitaxial growth manner, so as to prepare an insulation layer <NUM> and a resistor <NUM>. Next, the insulator on the upper surface of the region <NUM> is etched off, and then the conductor <NUM> is prepared.

For a preparation process of another component in the diode shown in <FIG>, reference may be made to the foregoing descriptions of the preparation process of the diode shown in <FIG>.

In the description of the embodiments of this application, the described specific features, structures, materials, or characteristics may be combined in a suitable manner in any one or more of the embodiments or examples.

It may be understood that in the descriptions of the embodiments of this application, words such as "exemplary", "example", or "for example" are used to represent giving an example, an illustration, or a description. Any embodiment or design scheme described by "exemplary", "example" or "for example" in embodiments of this application should not be explained as being more preferred or having more advantages than another embodiment or design scheme. To be precise, the words such as "exemplary", "example", or "for example" are intended to present a related concept in a specific manner.

In the descriptions of the embodiments of this application, the term "and/or" describes only an association relationship for describing associated objects and represents that three relationships may exist. For example, A and/or B may represent the following three cases: only A exists, only B exists, and both A and B exist. In addition, unless otherwise specified, the term "a plurality of" means two or more. For example, a plurality of systems refer to two or more systems, and a plurality of terminals refer to two or more terminals.

In addition, the terms "first" and "second" are merely intended for a purpose of description, and shall not be understood as an indication or implication of relative importance or implicit indication of serial numbers of indicated technical features. Therefore, a feature limited by "first" or "second" may explicitly or implicitly include one or more features. The terms "include", "comprise", "have" and their variants mean "including but not limited to" unless specifically emphasized otherwise.

It can be understood that, the foregoing embodiments are merely intended for describing the technical solutions of this application, but for limiting this application. Although this application is described in detail with reference to the foregoing embodiments, a person of ordinary skill in the art should understand that modifications to the technical solutions recorded in the foregoing embodiments or equivalent replacements to some technical features thereof may still be made, without departing from the scope of the technical solutions of embodiments of this application.

Claim 1:
A diode, comprising:
a first electrode layer (<NUM>);
a drift layer (<NUM>) located above the first electrode layer, wherein a doping concentration of the drift layer is less than a doping concentration of the first electrode layer, and the drift layer comprises an active region (<NUM>) and a terminal region (<NUM>) surrounding the active region;
a first region (<NUM>) and a second region (<NUM>) surrounding the first region, wherein the first region and the second region are disposed at an upper portion of
the active region and the first region and the second region are separated by and adjoining a first insulation trench (<NUM>); and
a first conductor (<NUM>) disposed above the first region, a second conductor (<NUM>) disposed above the second region, and a first resistor (<NUM>) disposed between the first conductor and the second conductor, wherein
the first region is connected to a power supply through the first conductor, and the second region is connected to the power supply through the second conductor, the first resistor, and the first conductor sequentially;
wherein the first region and the second region are doped with acceptor impurities, and the first electrode layer and the drift layer are doped with donor impurities; or the first region and the second region are doped with donor impurities, and the first electrode layer and the drift layer are doped with acceptor impurities.