Patent Description:
Quantum computing is a relatively new computing method that takes advantage of quantum effects, such as superposition of basis states and entanglement to perform certain computations more efficiently than a classical digital computer. In contrast to a digital computer, which stores and manipulates information in the form of bits (e.g., a "<NUM>" or "<NUM>"), quantum computing systems can manipulate information using qubits. A qubit can refer to a quantum device that enables the superposition of multiple states (e.g., data in both the "<NUM>" and "<NUM>" state) and/or to the superposition of data, itself, in the multiple states. In accordance with conventional terminology, the superposition of a "<NUM>" and "<NUM>" state in a quantum system may be represented, e.g., as α |<NUM>> + β |<NUM>>. The "<NUM>" and "<NUM>" states of a digital computer are analogous to the |<NUM>> and |<NUM>> basis states, respectively of a qubit. The value | α |<NUM> represents the probability that a qubit is in |<NUM>> state, whereas the value | β |<NUM> represents the probability that a qubit is in the | <NUM>> basis state. In "<NPL> et al present that high qubit coherence (T<NUM>, T<NUM>,echo > <NUM>) is maintained in a flip-chip geometry in the presence of galvanic, capacitive, and inductive coupling between the chips. <FIG> of "3D integrated superconducting qubits" envisages a scheme for control and readout of a large-scale, 3D integrated quantum processor. In this scheme, the qubit, interposer, and readout/interconnect chips are connected using indium bump bonds. Also in this scheme, the qubits are separated from the readout and control layer by an interposer chip through substrate vias that provide input/output (I/O) connectivity to/from the qubits.

The present invention concerns a quantum information processing device and a method of fabricating it as defined in the appended claims.

Quantum computing entails coherently processing quantum information stored in the qubits of a quantum computer. Quantum information processing devices, such as qubits, can be used in performing quantum processing operations. That is, the quantum information processing devices can be configured to make use of quantum-mechanical phenomena, such as superposition and entanglement, to perform operations on data in a non-deterministic manner. Certain quantum information processing devices, such as qubits, can be configured to represent and operate on information in more than one state simultaneously.

In some implementations, quantum information processing devices include circuit elements formed in part from superconducting materials such as, for example, superconducting co-planar waveguides, quantum LC oscillators, flux qubits, superconducting quantum interference devices (SQUIDS) (e.g., RF-SQUID or DC-SQUID), among others. A superconductor (or, alternatively, superconducting) material includes a material that exhibits superconducting properties at or below a corresponding superconducting critical temperature, such as aluminum (e.g., superconducting critical temperature of <NUM> Kelvin) or niobium (e.g., superconducting critical temperature of <NUM> Kelvin).

In certain types of quantum computing processors, such as quantum annealers, the qubits of the quantum processor are coupled together in a controllable manner such that the quantum state of each qubit affects the corresponding quantum states of the other qubits to which it is coupled. Depending on the processor design, the chosen architecture may limit the density and total number of qubits available for coupling, and thus limit the ability of the processor to perform complex problems requiring large numbers of qubits.

To increase qubit density and expand the number of qubits available for coupling in a quantum processor, such as a quantum annealer having superconducting quantum qubits, the processor and associated circuit elements can be constructed using 3D integration. That is, instead of fabricating the circuit elements of the processor within a single plane of a chip that extends along one and/or two dimensions (e.g., x- and/or y- directions), the circuit elements can also be formed in multiple chips that are coupled together along a third dimension (e.g., z-direction). For example, two substrates, each having some portion of a particular quantum information processing device (e.g., a qubit, a qubit measurement resonator, a qubit coupler), can be arranged in a flip-chip geometry. In this arrangement, the surfaces of the two substrates that have circuit element portions are positioned to face one another so that the portions can be brought into physical proximity and electrically coupled.

In general, in some aspects, the use of flip-chip geometries reduces the footprint (e.g., x- and/or y- directions) of the device, allowing for more densely integrated and highly connected qubit systems. In some implementations, the device geometries may also provide a greater degree of freedom in designing the shape and resonance modes of resonant circuit elements (e.g., waveguides, qubits, among other circuit elements).

Superconducting circuit elements such, as qubits and waveguides, may be structured to have frequency resonance modes in the microwave range including between <NUM> and <NUM>, such as, for example between <NUM> and <NUM>. The resonant frequency of such elements (e.g., "resonators") may be determined by the combined inductance and capacitance of its components. These resonators may be understood as having lumped element or distributed element components. Lumped element components are physically discrete, with a localized capacitance and/or inductance such that the current through the conductors connecting the components does not vary. A transmon qubit is an example of a superconductor resonator having lumped element components. Distributed element components are not discrete, but have a distributed capacitance and/or distributed inductance, e.g., the capacitance and/or inductance is distributed along the length of the components, such that current varies along the components and conductors. Such capacitance and/or inductance may therefore be defined by the dimensions of the element. A superconducting co-planar waveguide is an example of a superconductor resonator having distributed element components.

In some implementations, lumped element and distributed element resonators may be combined to form resonant circuit elements. For example, a qubit circuit element may have a number of lumped and/or distributed element components, e.g., a co-planar waveguide flux qubit. Other qubit examples with lumped and/or distributed elements include gmon qubits, fluxonium qubits, charge qubits, quantronium qubit, and zero-pi qubits.

<FIG> is a schematic illustrating a top view of an exemplary superconducting co-planar waveguide <NUM>. The waveguide <NUM> includes a center trace <NUM> surrounded by and in electrical contact with a ground plane <NUM>. Each of trace <NUM> and ground plane <NUM> is formed from a superconducting thin film material using standard thin film fabrication processes on a dielectric substrate. Trace <NUM> is arranged on the substrate as an elongated thin film, in which both ends <NUM> and <NUM> of the thin film are in electrical contact with the ground plane <NUM>. The elongated sides of the trace <NUM> are separated from the ground-plane <NUM> by corresponding and co-extensive gaps <NUM>. In the present example, the width of each respective gap <NUM> is constant along the length of the elongated waveguide, e.g., to avoid unnecessary reflection of the electromagnetic wave. The desired mode profile of a waveguide is the symmetric co-planar waveguide (CPW) mode, with the two ground planes on either side of the center trace <NUM> held to the same voltage. In some implementations, the trace <NUM> may have a length (measured along the elongated sides) of up to about several thousands micrometers, and a width (as measured transverse to the length) of up to about several tens of micrometers. The thickness of the deposited film forming the trace <NUM> (as well as the ground plane <NUM>) may be, e.g., on the order of <NUM> to <NUM>. As the waveguide <NUM> is a distributed element resonator, the overall capacitance and inductance values of the waveguide, and thus its resonant frequency, are determined based on the thin film thickness, width, length, gap spacing to the co-planar ground plane, and substrate.

Each of trace <NUM> and ground-plane <NUM> may be formed from materials exhibiting superconducting properties at or below a superconducting critical temperature, such as aluminum (superconducting critical temperature of <NUM> kelvin) or niobium (superconducting critical temperature of <NUM> kelvin) or titanium nitride. The substrate on which the trace <NUM> and ground-plane <NUM> are formed includes a dielectric material such as, e.g., sapphire, SiO<NUM> or Si. In some implementations, sapphire provides an advantage of low dielectric loss, thus leading to higher decoherence times (e.g., longer time to significant loss of quantum mechanical properties).

The superconducting waveguide <NUM> may have various uses. For example, in some implementations, a terminal portion of the co-planar waveguide <NUM> may be electrically coupled (e.g., capacitively coupled or inductively coupled) to a qubit (not shown) and may be used to change the state of the qubit, to couple that qubit with other qubits ("qubit coupling resonator"), or to probe the qubit to determine the quantum state of the qubit ("qubit readout resonator").

In general, distributed element resonators, such as the co-planar waveguide, tend to have large footprints. It can be difficult to reduce the size of these structures. First, the physical dimensions, such as length, of the structure define the resonant frequency of the structure, and thus must be maintained to retained proper functionality. In addition, attempts to shrink the width of the waveguide tends to concentrate electric fields in the waveguide at lossy interfaces, and increases the loss of the waveguide. Loss of the waveguide can be especially problematic when, e.g., strong coupling between the co-planar waveguide and a qubit is required. For example, strong coupling allows for fast measurement when the waveguide is used as a readout resonator. However, strong coupling also means that any loss or decoherence mechanism associated with the readout resonator may also affect the qubit. Thus, any changes to the coplanar waveguide design must maintain low losses, while retaining the same resonant frequency.

<FIG> are schematics that illustrate top views of an exemplary resonant structure, divided across separate substrates. <FIG> is a schematic illustrating a top view of the exemplary resonant structure <NUM> formed by bonding the substrates of <FIG> together. This arrangement may reduce the footprint of a circuit element, such as a co-planar waveguide, and can be designed to limit losses to the system. In particular, <FIG> is a schematic illustrating a top view of a first portion <NUM> of an exemplary co-planar waveguide on a first substrate <NUM>. <FIG> is a schematic illustrating a top view of a second portion <NUM> of the exemplary co-planar waveguide on a second substrate <NUM>. The first portion <NUM> of the co-planar waveguide includes a first trace <NUM> surrounded by a ground plane <NUM> (as detailed herein, e.g., with respect to waveguide <NUM> in <FIG>) formed on the first substrate <NUM>. The second portion <NUM> of the co-planar waveguide includes a second trace <NUM> surrounded by a ground plane <NUM> formed on the second substrate <NUM>. <FIG> illustrates a top view of a flip chip arrangement where the first substrate <NUM> is bonded to the second substrate <NUM> and the first portion <NUM> electrically connected to the second portion <NUM> through bump bonds <NUM>. In particular, either the first portion <NUM> or the second portion <NUM> is flipped and oriented to face the waveguide-bearing surface (e.g., the "active surface" containing elements to be connected) of the other substrate. <FIG> shows trace <NUM> on substrate <NUM>, and flipped trace <NUM> located in a plane above substrate <NUM>, on substrate <NUM> (not shown). Trace <NUM> is shown as a dashed line to represent the fact that it is on a different plane from trace <NUM>, and is being viewed through substrate <NUM> (not shown). In this configuration, the traces <NUM> and <NUM> can be placed in physical proximity and electrically connected, with bump bond <NUM>, to form one continuous waveguide structure with half the waveguide structure, trace <NUM>, on the first substrate <NUM> and another half of the waveguide structure, trace <NUM>, on the second substrate <NUM> (not shown). The 2D footprint of the structure is smaller than if the entire waveguide structure had been located on a single substrate. In other words, by dividing portions of a waveguide across different substrates, such as in the flip chip configuration shown in <FIG>, space that would otherwise be occupied by portions of the waveguide may be freed up for other uses. This space may be used for qubits or circuit elements, allowing for a quantum processor having a higher number, and therefore greater density of qubits.

In some implementations, traces <NUM> and <NUM> are laterally displaced from one another along the plane of the substrate so that the trace patterns do not uniformly overlap with one another. Without being bound by any particular theory, such lateral displacement may be advantageous in preventing undesired coupling between the waveguides along their length.

The arrangement <NUM> does not require varying the feature size (e.g., trace length) of the co-planar waveguide. Rather, the co-planar waveguide is divided across different substrates while maintaining the same overall trace length. Thus, the desired resonant frequency of the combined waveguide <NUM> may be maintained while avoiding the source of any loss that may result from changing the width and/or length of the structure. Just as with waveguide <NUM>, waveguide <NUM> is circuit element with a microwave frequency resonance mode and its resonant frequency is determined based on its thin film thickness, width, length, gap spacing to the co-planar ground plane, and substrate. Depending on the application, the resonant frequency of waveguide <NUM> may be between, e.g., <NUM> to <NUM>.

<FIG> is a schematic illustrating a cross-sectional view along line A-A of the exemplary resonant structure <NUM> shown in 2C. Each of first substrate <NUM> and second substrate <NUM> has a thin film ground plane <NUM>. Furthermore, first substrate <NUM> and second substrate <NUM> have traces <NUM> and <NUM>, respectively. Bump bond <NUM> electrically connects the first trace <NUM> to the second trace <NUM>. When bump bond <NUM> is formed from a superconductor material, the loss associated with the electrical connection between the first portion and the second portion of the resonant structure <NUM> may be relatively low. By using superconducting bump bonds for coupling, it is possible to achieve a reduction in the energy loss and decoherence that can otherwise occur with lossy non-superconducting materials. Suitable superconducting materials for use as a superconducting bump bond <NUM> include indium, lead, rhenium, palladium, or niobium having a thin gold layer, among others. PCT Application No. <CIT>, provides additional detail about fabrication of such bump bonds.

When superconducting material from the traces <NUM> or <NUM> (e.g., aluminum) is placed in contact with the material of the superconducting bump bonds (e.g., indium), diffusion between indium and aluminum leads to the formation of a non-superconducting alloy that increases decoherence effects. Inter-diffusion of indium and aluminum can also lead to mechanical failures of the devices and other problems, such as voiding and pitting. To avoid the formation of alloys between the superconducting bump bond <NUM> and the traces <NUM> or <NUM>, barrier layers <NUM> may be arranged between the superconducting bump bond <NUM> and the traces. The barrier layers <NUM> include a superconducting material that also serves as an electrically conducting barrier that blocks diffusion of the bump bond material into the waveguides and/or vice-versa.

The superconducting bump bond <NUM> can have a thickness from approximately several hundred nanometers to approximately several tens of microns or more. For example, a thickness of the bump bond <NUM> may be <NUM>, <NUM>, <NUM>, <NUM>, <NUM> micron, <NUM> microns, <NUM> microns, or <NUM> microns, among other thicknesses. The thickness of the bump bond can be set by a variety of factors such as the desire for greater electrical coupling, as coupling strengthens with decreasing distance between the chips. The diffusion barrier layer may be one to several nanometers in thickness, or more.

<FIG> shows a resonant structure <NUM> with portions <NUM> and <NUM> of roughly equal length. Thus, <NUM>% of structure <NUM> is on substrate <NUM> and <NUM>% is on substrate <NUM>. Other apportionments are contemplated, however. In some implementations, the length ratio between the first and second portions may be: <NUM>% on one substrate and <NUM>% on the second substrate; or <NUM>% and <NUM>%; or <NUM>% and <NUM>%.

Although <FIG> shows a single bump bond <NUM> connection (or transition) between the two waveguide portions, multiple bump bond connections are present. Multiple, bump bonds located at approximately the same position, e.g., near the bump bond <NUM> location in <FIG>, add redundancy to the system in case of single bump failures. Multiple bump bonds at a transition may also be used to control impedance of the connection, which depends on the geometry of the connection.

Generally, multiple bump bonds may be used to connect multiple circuit element portions. For example, similar to <FIG>, a first portion of a co-planar waveguide on one substrate may be connected on opposite ends to two separate co-planar waveguide portions on a second substrate, which faces the first substrate. Alternatively, one end of the first portion may be bonded to a co-planar waveguide on a second substrate (e.g., as shown in <FIG>), and the other end may be bonded to other circuit elements located on the second substrate (e.g., on substrate <NUM> in <FIG>).

Furthermore, multiple bump bonds between two or more waveguide portions, where the bumps are located at different positions along the waveguide portions, can be used to achieve novel waveguide modes through various waveguide geometries. These modes may provide improvement for various waveguide functions, such as cross-talk or coupling. They may also add screening to reduce crosstalk (e.g., between one portion to the other). Using a flip chip geometry and multiple bump bonds, certain waveguide portions may be positioned on the two chips so as to be physically distant from other waveguide portions of the same resonator, or other circuit elements to improve screening (e.g., reduction in interference or cross-talk). If cross-talk is desirable, waveguide portions may be positioned to be closer to other circuit elements.

In general, in some implementations, co-planar waveguides are electrically connected to and form part of another resonant circuit element such as, e.g., a distributed element component of a qubit. <FIG> is a schematic illustrating a top view of an exemplary co-planar waveguide flux qubit <NUM> (also known as a "fluxmon qubit"). <FIG> is a close-up view of the co-planar waveguide flux qubit <NUM>. Qubit <NUM> includes a co-planar waveguide trace <NUM> that is coupled to a quantum device <NUM>. The quantum device <NUM> can include, but is not limited to, superconducting quantum interference devices (SQUIDS). In the present example, the quantum device <NUM> is a DC-superconducting quantum interference device (DC-SQUID), though other SQUID devices may be used. The co-planar waveguide trace <NUM> and DC-SQUID <NUM> are surrounded by and are in electrical contact with a ground plane <NUM>. Each of waveguide <NUM>, DC-SQUID <NUM>, and ground plane <NUM> is formed from a superconducting thin film material using standard thin film fabrication processes on a dielectric substrate. Waveguide trace <NUM> is arranged on the substrate as an elongated thin film, in which one end <NUM> of the thin film is in electrical contact with the ground plane <NUM> and another opposite end <NUM> of the thin film is in electrical contact with DC-SQUID <NUM>. DC-SQUID <NUM> includes a loop <NUM> of superconducting material that is interrupted by two Josephson junctions <NUM>, and contact pads <NUM>. For example, the Josephson junctions <NUM> may be formed from a tri-layer of Al/Al<NUM>O<NUM>/Al thin films. Just as in the waveguide <NUM> in <FIG>, the elongated sides of the waveguide <NUM> are separated from the ground-plane <NUM> by corresponding and co-extensive gaps <NUM>. The thickness of the deposited film forming the waveguide <NUM>, ground plane <NUM>, and portions of the DC-SQUID <NUM> may be, e.g., on the order of <NUM> to <NUM>.

<FIG> is a schematic illustrating a close-up view of DC-SQUID <NUM> coupled to waveguide <NUM>. The substrate on which the waveguide <NUM>, DC-SQUID <NUM> and ground-plane <NUM> are formed includes a dielectric material such as, e.g., sapphire, SiO2 or Si. The trace <NUM> also serves as a resonator through which strong and long range coupling to other qubits may be achieved. Further details on the co-planar waveguide flux qubit can be found in PCT Application No. <CIT>, entitled "Programmable Universal Quantum Annealing with Co-Planar Waveguide Flux Qubits".

Co-planar waveguide flux qubit <NUM> is a resonant circuit element, with a resonance frequency determined primarily by the length of the co-planar waveguide, the inductance and capacitance of the Josephson junction, and the flux through the DC-SQUID <NUM> loop. Depending on the application, the resonant frequency of qubit <NUM> may be between, e.g., <NUM> to <NUM>.

<FIG> is a schematic illustrating a top view of a first portion <NUM> of an exemplary quantum information processing device, e.g., a co-planar waveguide flux qubit, on a first substrate. <FIG> is a schematic illustrating a top view of a second portion <NUM> of the exemplary quantum information processing device on a second substrate. <FIG> is a schematic illustrating a top view of the exemplary quantum information processing device <NUM> formed by electrically connecting the first portion <NUM> of <FIG> to the second portion <NUM> of <FIG>. The first portion <NUM> includes a co-planar waveguide trace <NUM> and the second portion <NUM> includes a DC-SQUID <NUM>, as described above for <FIG>. Each of the co-planar waveguide trace <NUM> and DC-SQUID <NUM> are surrounded by and are in electrical contact with a ground plane <NUM>. <FIG> illustrates a flip chip arrangement where the substrate supporting the first portion <NUM> or the substrate supporting the second portion <NUM> of the quantum information processing device is flipped and oriented so the active surfaces of each substrate face one another. In <FIG>, trace <NUM> is located above and approximately parallel to the substrate supporting SQUID <NUM>. Trace <NUM> is shown as a dashed line to represent the fact that it is on a different plane from SQUID <NUM>, and is being viewed through the substrate supporting trace <NUM> (not shown). In this configuration, waveguide trace <NUM> and SQUID <NUM> can be placed in physical proximity and electrically connected with a superconducting bump bond <NUM> to form fluxmon qubit <NUM>.

<FIG> is a close up view of the SQUID <NUM> coupled to the co-planar waveguide trace <NUM> of qubit <NUM> in <FIG>. As shown in <FIG>, waveguide trace <NUM> and SQUID <NUM> are located on different substrates and are coupled with a superconducting bump bond <NUM>. By dividing portions of quantum information processing devices, such as qubits, across different substrates, such as in the flip chip configuration shown in <FIG>, space that would otherwise be occupied by portions of the quantum information processing device (e.g., by the waveguide trace <NUM> or SQUID <NUM> of the fluxmon qubit) may be freed up for other uses. This space may be used for arranging other qubits or circuit elements, allowing for a quantum processor having a higher number, and therefore greater density of qubits.

Similar to qubit <NUM>, co-planar waveguide flux qubits <NUM> is a resonant circuit element, with a resonance frequency determined primarily by the length of the co-planar waveguide, the inductance and capacitance of the Josephson junction, and the flux through the DC-SQUID <NUM> loop. Depending on the application, the resonant frequency of qubit <NUM> may be between, e.g., <NUM> to <NUM>.

In general, in some implementations, multiple bump bonds may be used to electrically connect additional elements to qubit <NUM>. For example, a bump bond at the grounded end of waveguide portion <NUM> in <FIG> may be used to connect waveguide trace <NUM> to circuit elements located on the substrate supporting SQUID <NUM>. For example, trace <NUM> may be used to connect qubit <NUM> to another qubit or to a control circuit for qubit <NUM>. Just as with waveguide resonators described above, multiple bump bonds in a flip chip geometry may generally be used to achieve novel geometries of circuit elements (e.g., via various positioning configurations of circuit element portions between chips). In addition, as described above for waveguide resonators, circuit element portions may also be positioned between the two chips to promote or reduce cross-talk and/or interference with other circuit element portions or other circuit elements.

The embodiments disclosed herein have focused on resonators with distributed element components, such as coplanar waveguide resonators and co-planar waveguide flux qubits. However, lumped element resonators, such as capacitor and inductor elements of a qubit, may also be arranged in flip chip geometries to save space and/or create novel resonance modes.

For example, a transmon qubit, which may be understood as a lumped element qubit, may have portions distributed over different substrates. <FIG> is a schematic illustrating a top view of an exemplary first portion <NUM> of a transmon qubit on a first substrate <NUM>. First portion <NUM> has a thin film ground plane <NUM>, and a number of thin film elements <NUM>, <NUM>, <NUM>, and <NUM> surrounded by a gap <NUM>. The ground plane <NUM> and elements <NUM>, <NUM> and <NUM> include a thin film of superconducting material, such as Al, on the order of, e.g., <NUM> to <NUM>. One of elements <NUM> and <NUM> may be coupled to a positive voltage element (not shown), and element <NUM> may be coupled to a negative voltage element (not shown). Element <NUM> is a Josephson junction, which can be formed from two superconductors separated by a non-superconducting layer. For example, the Josephson junctions <NUM> may be formed from a tri-layer of Al/Al<NUM>O<NUM>/Al thin films.

<FIG> is a schematic illustrating a top view of an exemplary second portion <NUM> of a transmon qubit on a second substrate. Portion <NUM> has a thin film ground plane <NUM>, and a thin film element <NUM> surrounded by a gap <NUM>.

<FIG> is a schematic illustrating a top view of the exemplary quantum information processing device <NUM> formed by electrically connecting the first portion <NUM> of <FIG> to the second portion <NUM> of <FIG> through bump bonds <NUM>. In particular, <FIG> illustrates a flip chip arrangement of transmon qubit <NUM> where the substrate <NUM> supporting the first portion <NUM> or the substrate supporting the second portion <NUM> of the qubit is flipped and oriented so the active surfaces of each substrate face one another. In <FIG>, element <NUM> is located above and approximately parallel to substrate <NUM>, supporting elements <NUM>, <NUM>, <NUM>, and <NUM>. Element <NUM> is shown as a dashed line to represent the fact that it is on a different plane from substrate <NUM>, and is being viewed through the substrate supporting element <NUM> (not shown). In this configuration, waveguide <NUM> and <NUM> can be electrically connected by element <NUM>, with a superconducting bump bonds <NUM>, to form a single positive electrode in trasmon qubit <NUM>. The use of multiple bump bonds <NUM> provides redundancy in the connection in case of single bump bond failure. In this connected state, the qubit includes a capacitor formed between a positive electrode <NUM>/<NUM> and negative electrode <NUM>. Josephson junction <NUM> is thus located between the positive and negative electrodes of the capacitor.

Without wishing to be bound by theory, one advantage of using the flip chip design in forming qubit <NUM> is that the positive electrode may be formed without the use of an air bridge to connect electrodes <NUM> and <NUM>. An air bridge requires additional fabrication steps, one or more of which may increase the loss associated with the components (e.g., through residue left on the device surface).

<FIG> is a cross-sectional view along line A-A of the exemplary transmon qubit structure <NUM> shown in 5C. Substrates <NUM> and <NUM> are formed from a dielectric material, such as silicon or sapphire. Thin film elements <NUM> and <NUM> are located on portions <NUM> and <NUM> respectively, as described above. Superconducting bump bonds <NUM> with diffusion barriers <NUM> electrically connect the elements (as detailed in relation to the discussion of <FIG> above).

Generally, qubits are resonance circuit elements with a resonance frequency that may depend on the effective capacitance between the two terminals of the qubit, the inductance of the Josephson junction or SQUID, and the applied flux through the SQUID loop. Transmon qubit <NUM> is a resonant circuit element with a resonance frequency primarily determined by the effective capacitance between the two terminals of the qubit (<NUM> and <NUM>/<NUM>) and the inductance of the Josephson junction <NUM>. Depending on the application, the resonant frequency of qubit <NUM> may be between, e.g., <NUM> to <NUM>.

<FIG> is a flow chart that illustrates an exemplary process <NUM> for forming portions of circuit elements on different substrates and connecting the different portions with superconducting bump bonds to form a device. This process is applicable to any of the embodiments disclosed herein. In step <NUM>, a first portion of a circuit element (e.g., a quantum information processing device such as a qubit, a qubit measurement resonator or a qubit coupler, among others) is formed on a first substrate. The first portion of the circuit element including, e.g., ground planes, can be formed on the substrate through e-beam deposition, vapor deposition, sputtering, or any other thin film deposition method. The material deposited may include, e.g., a superconductor material, such as aluminum, niobium, and/or titanium nitride. Gaps between regions of the first portion of the circuit element and/or between ground planes may be formed through a combination of photolithography and liftoff or etching techniques. In step <NUM>, a second portion of the circuit element is similarly formed on a second substrate. Typically, a diffusion barrier layer is deposited, e.g., via reactive sputtering, on the areas of the circuit element portions to be connected. Diffusion barriers may be deposited on the circuit element portions in steps <NUM> and <NUM>.

In step <NUM>, the substrates, formed from a dielectric material, such as silicon or sapphire, are arranged in a flip chip orientation. In other words, the active surfaces of the substrates, e.g., those bearing the circuit element portions, are oriented to face one another. The surfaces are thus oriented such that the circuit element portions are in physical proximity, but located on different planes. In step <NUM>, the portions of the circuit element are electrically connected with superconducting bump bonds to form a single resonant circuit element. The superconducting material that will form the bump bonds is then deposited, e.g., via thermal evaporation deposition, on the barrier layers. Finally, the two substrates are brought together and joined to one another at the locations of the bump bond material (e.g., using a bump bonder) to produce a stacked device with electrically coupled bump bond regions, as depicted, for example, in <FIG>.

Embodiments of the quantum subject matter and quantum operations described in this specification can be implemented in suitable quantum circuitry or, more generally, quantum computational systems, including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them. The term "quantum computational systems" may include, but is not limited to, quantum computers, quantum information processing systems, quantum cryptography systems, or quantum simulators.

It is understood that quantum memories are devices that can store quantum data for a long time with high fidelity and efficiency, e.g., light-matter interfaces where light is used for transmission and matter for storing and preserving the quantum features of quantum data such as superposition or quantum coherence.

Quantum circuit elements (also referred to as quantum computing circuit elements and quantum information processing devices) include circuit elements for performing quantum processing operations. That is, the quantum circuit elements are configured to make use of quantum-mechanical phenomena, such as superposition and entanglement, to perform operations on data in a non-deterministic manner. Certain quantum circuit elements, such as qubits, can be configured to represent and operate on information in more than one state simultaneously. Examples of superconducting quantum circuit elements include circuit elements such as quantum LC oscillators, qubits (e.g., flux qubits, phase qubits, or charge qubits), and superconducting quantum interference devices (SQUIDs) (e.g., RF-SQUID or DC-SQUID), among others.

In contrast, classical circuit elements generally process data in a deterministic manner. Classical circuit elements can be configured to collectively carry out instructions of a computer program by performing basic arithmetical, logical, and/or input/output operations on data, in which the data is represented in analog or digital form. In some implementations, classical circuit elements can be used to transmit data to and/or receive data from the quantum circuit elements through electrical or electromagnetic connections. Examples of classical circuit elements include circuit elements based on CMOS circuitry, rapid single flux quantum (RSFQ) devices, reciprocal quantum logic (RQL) devices and ERSFQ devices, which are an energy-efficient version of RSFQ that does not use bias resistors.

Fabrication of the quantum circuit elements and classical circuit elements described herein can entail the deposition of one or more materials, such as superconductors, dielectrics and/or metals. Depending on the selected material, these materials can be deposited using deposition processes such as chemical vapor deposition, physical vapor deposition (e.g., evaporation or sputtering), or epitaxial techniques, among other deposition processes. Processes for fabricating circuit elements described herein can entail the removal of one or more materials from a device during fabrication. Depending on the material to be removed, the removal process can include, e.g., wet etching techniques, dry etching techniques, or lift-off processes. The materials forming the circuit elements described herein can be patterned using known lithographic techniques (e.g., photolithography or e-beam lithography).

During operation of a quantum computational system that uses superconducting quantum circuit elements and/or superconducting classical circuit elements, such as the circuit elements described herein, the superconducting circuit elements are cooled down within a cryostat to temperatures that allow a superconductor material to exhibit superconducting properties. A superconductor (alternatively superconducting) material can be understood as material that exhibits superconducting properties at or below a superconducting critical temperature. Examples of superconducting material include aluminum (superconductive critical temperature of <NUM> kelvin), niobium (superconducting critical temperature of <NUM> kelvin), and titanium nitride (superconducting critical temperature of <NUM> kelvin).

Claim 1:
A quantum information processing device, comprising:
a first substrate comprising a principal surface;
a second substrate comprising a principal surface, wherein the first substrate is bump-bonded to the second substrate such that the principal surface of the first substrate faces the principal surface of the second substrate;
a superconducting circuit element having a microwave frequency resonance mode, wherein a first portion (<NUM>, <NUM>) of the superconducting circuit element is arranged on the principal surface of the first substrate and a second portion (<NUM>, <NUM>) of the superconducting circuit element is arranged on the principal surface of the second substrate;
a first superconductor bump bond (<NUM>, <NUM>) connected to the first portion of the superconducting circuit element and to the second portion of the superconducting circuit element, wherein the first superconductor bump bond provides an electrical connection between the first portion and the second portion; and characterized by:
a second superconductor bump bond (<NUM>, <NUM>) connected to the first portion of the superconducting circuit element and to the second portion of the superconducting circuit element, wherein, by electrically connecting the first portion of the superconducting circuit element and the second portion of the superconducting circuit element, the second superconductor bump bond provides redundancy for the electrical connection provided by the first superconductor bump bond in case of failure of the first superconductor bump bond.