Patent Description:
A GPU is an electronic subsystem (typically a chipset) designed to rapidly process images intended for output to a display device. GPUs are used in embedded systems, mobile phones, personal computers, workstations, digital cameras, game consoles, and other digital systems. The highly parallel structure of the GPU makes it more efficient than a general-purpose central processing unit (CPU) for certain tasks.

A "shader" is a type of computer program that was originally used for shading (that is, the production of appropriate levels of light, darkness, and color within an image), but which now can perform a variety of specialized functions in various fields of computer graphics. Shading languages may be used to program a GPU rendering pipeline. The position, hue, saturation, brightness, and contrast of pixels, vertices, or textures used to construct an output image can be altered on the fly, using algorithms defined in the shader, and can be modified by external variables or textures introduced by the program calling the shader.

<CIT> discusses, according to a machine translation of its abstract, an image processor that includes: an image reading part for reading an original and generating the image data; and an image processing part for performing image processing on the image data.

<CIT> discusses, according to its abstract, a method of measuring the displacement between a reference region of a reference image and a sample region of a sample image. The method spatially varies the reference region using a one-dimensional filter having complex kernel values, wherein a length (radius) and direction (angle or tangent segment) of the filter is a function of position in the reference region. The method then measures a displacement between the reference region and the sample region by comparing the spatially varied reference region and the sample region.

<CIT> discusses, according to its abstract, methods and apparatus for detecting the presence and location of punch holes in a scanned image are described. The punch hole detection methods and apparatus rely at least in some embodiments on whether a portion of the scanned image, referred to as a component, corresponds to a punch hole by comparing one or more characteristics of the component such as its circularity, aspect ratio, black to white pixel ratio, density, height and/or width to one or more thresholds before making a decision as to whether or not the component is a punch hole. In some embodiments the components which pass component-level checks are grouped and one or more group-level checks arc performed on the components to determine if the components are punch holes. Once a punch hole is detected, in some embodiments, the image is processed to remove the detected punch hole.

<CIT> discusses, according to its abstract, an image of a scanned book is segmented using a feature image to map pixels corresponding to a page area and to create page objects and detect borders of the page. A book spine region is detected by locating a plain background area between two of the page objects, analyzing the page borders to detect their shape, and analyzing their shape to detect the book spine end points. Using the page borders, the feature image is examined to detect top-to-bottom and bottom-to-top declines in pixel values to determine the corners of a shadow distortion in the original scanned image. Squeeze and curvature distortion are also detected. A Bezier curve is used to model each of the three distortions detected on the page. The detected distortion is corrected by first defining a trapezoidal correction area. The intensity, squeeze, and curvature corrections are then applied along lines within the trapezoidal correction area.

Aspects are set out in the independent claims. The technology described herein includes computer implemented methods, computer program products, and systems to erase features in fields of objects placed on backgrounds in images. In some examples of the technology, a GPU receives an image comprising an array of pixels. The image depicts features in a field of an object on a background. The features and the background contrasting with the object field, and at least a portion of the object is at the center of the image. In parallel for each particular pixel of a first plurality of the pixels, the GPU sets the color value of the particular pixel to the lightest color value of a second plurality of the pixels
substantially along a line outward from the particular pixel toward an edge of the image. The line is defined by the particular pixel and the image center.

In some examples, a pixel is substantially along the line where the pixel is within a predetermined distance from the line. In some examples the second plurality of pixels comprises a predetermined number of pixels uniformly spaced along the line.

In some examples, receiving an image includes instructing, by a device containing the GPU, a user of the device to position at least a portion of the object over the center of an imaging screen of the device before capturing the image. The captured image is then received.

In some examples, the line extends a predetermined distance from the particular pixel toward the edge of the image. In some examples, the features and the background are each darker than the object field. In some examples the lightness of a color value is determined by converting the value of a pixel from the received image to a grayscale value, wherein grayscale values closer to white correspond to lighter.

In document scanning applications, it is usually necessary to find the edges of the document to be scanned. Document edge detection in images typically is done by finding local regions of the image with large differences in color or lightness - counting on the document field to be lighter than both the document features (for example, text and signatures) and the image background (for example, a non-white table top). However, documents present a problem for this sort of edge detection, in part because the strongest edges in a document may be found between the document field the document features. Document features such as text are meant to contrast sharply with the document field. Edge detection for documents can be made much simpler if there is a way of reliably erasing the document text while preserving the contrast between the document edges and the background behind the document. The present disclosure refers to "objects" as a generalization of "documents" to include objects such as labels affixed to products.

Examples of the technology disclosed herein erase features, such as text, that present high contrast with the object field in images on a GPU, in some instances in a small number O(log N) of fast GPU passes - where "O(*)" represents "on the order of" and "N" is the number of pixels processed. The results are available to other GPU-implemented processes of the image processing pipeline without having to copy the results between the GPU, Central Processing Unit (CPU), and system memory. Such copying is a relatively expensive operation that may introduce undesirable latency in real-time image processing applications. The technology can be employed to perform image processing tasks in a way that makes use of the computing device's resources more efficient.

<FIG> is a block diagram depicting a portion of a simplified communications and processing architecture <NUM> of a typical device offering a graphical user interface (GUI), in accordance with certain examples of the technology disclosed herein. While each element shown in the architecture is represented by one instance of the element, multiple instances of each can be included. While certain aspects of operation of the present technology are presented in examples related to <FIG> to facilitate enablement of the claimed invention, additional features of the present technology, also facilitating enablement of the claimed invention, are disclosed elsewhere herein.

In such an architecture <NUM>, a central processing unit (CPU) <NUM> and a graphics processing unit (GPU) <NUM> share access to system memory <NUM> via a system memory bus <NUM>. The CPU <NUM> and the GPU <NUM> communicate messages and data over a bus <NUM> that may also connect to other processors, sensors, and interface devices (not shown). Each of CPU <NUM> and GPU <NUM> include local memory (CPU local memory <NUM>, GPU local memory <NUM>). Shaders used in examples of the technology disclosed herein can be stored in GPU local memory <NUM>, along with input data to the shaders and output data from the shaders. Local memory can include cache memory. Cache memory stores data (or instructions, or both) so that future requests for that data can be served faster; the data stored in a cache might be the result of an earlier computation or a copy of data stored elsewhere. A cache hit occurs when the requested data can be found in a cache, while a cache miss occurs when it cannot. Cache hits are served by reading data from the cache, which typically is faster than recomputing a result or reading from a slower data store such as system memory <NUM> or transfer between the CPU <NUM> and GPU <NUM>. Thus, the more requests that can be served from the cache, the faster the system performs. The GPU <NUM> typically operates on data from local memory to drive display subsystem <NUM>. Display subsystem <NUM> can be an output-only subsystem or an interactive display subsystem <NUM>. Throughout the discussion of examples, it should be understood that the terms "data" and "information" are used interchangeably herein to refer to text, images, audio, video, or any other form of information that can exist in a computer-based environment.

The architecture <NUM> illustrated is an example, and other means of establishing a communications link between the functional blocks can be used. Moreover, those having ordinary skill in the art having the benefit of the present disclosure will appreciate that the elements illustrated in <FIG> may have any of several other suitable computer system configurations. For example, the architecture <NUM> may be embodied as a mobile phone or handheld computer and may not include all the components described above.

In examples the technology presented herein may be part of any type of computing machine such as, but not limited to, those discussed in more detail with respect to <FIG>. Furthermore, any modules associated with any of these computing machines, such as modules described herein or any other modules (scripts, web content, software, firmware, or hardware) associated with the technology presented herein may be any of the modules discussed in more detail with respect to <FIG>. The computing machines discussed herein may communicate with one another as well as other computer machines or communication systems over one or more networks. The network may include any type of data or communications network, including any of the network technology discussed with respect to <FIG>.

The example methods illustrated in the figures are described hereinafter with respect to the components of the example architecture <NUM>. The example methods also can be performed with other systems and in other architectures involving a GPU <NUM>. The operations described with respect to any of the figures can be implemented as executable code stored on a computer or machine readable non-transitory tangible storage medium (e.g., floppy disk, hard disk, ROM, EEPROM, nonvolatile RAM, CD-ROM, etc.) that are completed based on execution of the code by a GPU <NUM> implemented using one or more integrated circuits; the operations described herein also can be implemented as executable logic that is encoded in one or more non-transitory tangible media for execution (e.g., programmable logic arrays or devices, field programmable gate arrays, programmable array logic, application specific integrated circuits, etc.) by a GPU <NUM>.

Referring to <FIG>, and continuing to refer to <FIG> for context, a representation of an example image of an object (a receipt) upon which the technology disclosed herein operates, in accordance with certain examples of the technology disclosed herein. The image <NUM> is of an object <NUM>, such as a document, a receipt, a product label, a bar code, or any other object of interest. The object <NUM> sits upon an image background <NUM>, for example a table top, a desktop, or a merchant's counter. The object <NUM> includes object features <NUM> such as text, a logo, or a signature (shown in <FIG> as examples). Other object features <NUM> in an image <NUM> can include smudges, folds, creases, stains, stamps, etc. The object features <NUM> sit in an object field <NUM> (typically a light color). Note that both the object features <NUM> and the image background <NUM> contrast with the object field <NUM>.

In a continuing example, the image <NUM> is of a credit card receipt <NUM> sitting on a merchant's counter <NUM>. The features <NUM> are receipt data including a logo, alphanumeric information (for example, "STORE: <NUM>," "ACCT," and "EXP: <NUM>/<NUM>"), and the customer's signature. Note that the object center <NUM> and the image center <NUM> are not in the same place and that the object tilts slightly with respect to the image. Also note that at least a portion of the object <NUM> is over the image center <NUM>.

Referring to <FIG>, and continuing to refer to prior figures for context, methods <NUM> to erase object features in fields of objects placed on backgrounds in images are illustrated in accordance with certain examples. In such methods <NUM>, a GPU <NUM> receives an image <NUM>, comprising an array of pixels, that depicts object features <NUM> in a field <NUM> of an object <NUM> on an image background <NUM> - Block <NUM>. The object features <NUM> and the image background <NUM> contrast with the object field <NUM>, and at least a portion of the object <NUM> is at the image center <NUM>.

The image <NUM> is composed of a two-dimensional array of pixel color values. For example, the color of a pixel can be represented by a vector having components for red, blue, and green color intensities of the pixel. Examples disclosed herein operated on input images of the OpenGL® "RGBA" format but are not restricted to that format. OpenGL is a cross-language, cross-platform application programming interface (API) for rendering graphics. The API is typically used to interact with a GPU <NUM> to achieve hardware-accelerated rendering. OpenGL enables the use of programs called "shaders" to manipulated images. In addition to <NUM>-bit values for each of red, green, and blue, the OpenGL RGBA format uses an <NUM>-bit "A," or "alpha," component. The <NUM>-bit format provides <NUM> discrete values from "<NUM>" to "<NUM>" for each pixel. The alpha component is typically used to represent the transparency of a pixel. Considering the RGBA format as defining a vector space, colors closer to (<NUM>, <NUM>, <NUM>, X) in the vectors space are considered "darker" than colors closer to (<NUM>, <NUM>, <NUM>, X). As another example, lightness = A x (R+B+G)/<NUM> can be used. In this example, the technology uses the average value of the R, G, and B channels, and multiplies it by the value of the A channel. This function treats the pixel as if it is sitting on a black background. The lower the alpha value (that is, the more transparent the pixel is), the lower (darker) the lightness value.

In OpenGL, color values can be stored in one of three ways: normalized integers, floating-point, or integral. Both normalized integer and floating-point formats will resolve, in a shader, to a vector of floating-point values; whereas integral formats will resolve to a vector of integers. Examples presented herein use the integral format for each of "R," "B," "G," and "A. " While the OpenGL RGBA format can represent virtually any color of pixel, examples disclosed herein operate on "grayscale" images. In the OpenGL RGBA format, grayscale pixel values are represented by R=B=G, with any applicable A. For example, the pixel value (<NUM>, <NUM>, <NUM>, A) represents a solid (A = max, solid) medium gray, the pixel value (<NUM>, <NUM>, <NUM>, A) represents solid black, and the pixel value (<NUM>, <NUM>, <NUM>, A) represents solid white.

Referring to <FIG>, and continuing to refer to prior figures for context, methods <NUM> for receiving, by a GPU, an image, comprising an array of pixels, that depicts object features in a field of an object on an image background, with at least a portion of the object is at the image center are shown, in accordance with certain examples. In such examples, the device hosting the GPU <NUM> instruct a user of the device to position at least a portion of the object over the center of an imaging screen of the device before capturing the image - Block <NUM>. For example, an application running on the device CPU <NUM> instructs the user to position a receipt <NUM> such that, while the receipt <NUM> may be tilted with respect to the overall image <NUM> (as in the continuing example), some portion of the receipt is at the center of the imaging screen of the device when the image <NUM> is taken. In yet a further variation on the technology disclosed herein, the device instructs the user to provide, and receives from the user, an indication of at least one point in the image <NUM> that contains the object <NUM>. In such examples, the GPU then receives the captured image comprising an array of pixels, the image depicting features in a field of an object on a background, the features and the background contrasting with the object field - Block <NUM>.

Referring again to <FIG>, in parallel for each particular pixel of a first plurality of the pixels, using a shader the GPU sets the color value of the particular pixel to the lightest color value of a second plurality of the pixels substantially along a line outward from the particular pixel toward an edge of the image, the line defined by the particular pixel and the image center - Block <NUM>. Referring to <FIG>, and continuing to refer to previous figures for context, an image <NUM> of the receipt <NUM> of <FIG> is shown with a line <NUM> drawn from the image center <NUM> through a particular pixel <NUM>, in accordance with certain examples of the technology disclosed herein.

In the continuing example, the size of the particular pixel <NUM> is exaggerated for ease of illustration, as is each other pixel illustrated in the drawings. The portion of line <NUM> extending outward from the particular pixel <NUM> toward the top image edge <NUM> is shown in <FIG> as solid and with non-zero thickness. Note that the solid portion of the line <NUM> passes: (i) through (<NUM>, <NUM>, <NUM>, A) white pixels (not explicitly shown in <FIG>), for example, between the "REGISTER: <NUM>" line and the "logo;" (ii) through (<NUM>, <NUM>, <NUM>, A) black pixels (not explicitly shown in <FIG>), for example, in the "<NUM>" of "logo;" and (iii) through (<NUM>, <NUM>, <NUM>, A) gray pixels (not explicitly shown in <FIG>), for example, in the image background <NUM>.

Referring to <FIG>, and continuing to refer to previous figures for context, an image <NUM> of the receipt <NUM> of <FIG> is shown with pixels 630a - 630d from a second plurality of pixels distributed substantially along line <NUM> outward from particular pixel <NUM> through particular pixel <NUM> and the image center <NUM>, in accordance with certain examples of the technology disclosed herein. The initial color of second plurality pixel 630a is (<NUM>, <NUM>, <NUM>, A) white given that pixel 630a is part of the object field <NUM>. The initial color of second plurality pixel 630b just to the right of line <NUM> is (<NUM>, <NUM>, <NUM>, A) black -though in this case, the color of the horizontally adjacent pixel directly on the line is also (<NUM>, <NUM>, <NUM>, A) black given that pixel 630b is part of the first "o" of "logo. " The initial color of second plurality pixel 630c on line <NUM> just inside the edge of the receipt <NUM> is (<NUM>, <NUM>, <NUM>, A) white. The initial color of second plurality pixel 630d just to the left of line <NUM> just inside the edge of the image <NUM> in the image background <NUM> is (<NUM>, <NUM>, <NUM>, A) gray. In <FIG>, the pixel outline for non-white pixels is illustrated as white, while the pixel outline for white pixels is illustrated as black. The outlines are shown for illustration purposes and are not part of an actual pixel. The GPU <NUM> sets the color value of the particular pixel <NUM> to the lightest color value of pixels 630a - 630d. In the continuing example, that color remains (<NUM>, <NUM>, <NUM>, A) white because particular pixel <NUM> is already at the lightest color of pixels sampled outward from pixel <NUM> along a line that includes pixel <NUM> and the image center <NUM>.

Referring to <FIG>, and continuing to refer to previous figures for context, an image <NUM> of the receipt <NUM> of <FIG> is shown with pixels 730a - 730b from a second plurality of pixels distributed substantially along line <NUM> outward from particular pixel through the particular pixel and the image center <NUM>, in accordance with certain examples of the technology disclosed herein. The initial color of second plurality pixel 730a is (<NUM>, <NUM>, <NUM>, A) white given that pixel 730a is part of the object field <NUM>. The initial color of second plurality pixel 730d just to the left of line <NUM> just inside the edge of the image <NUM> in the image background <NUM> is (<NUM>, <NUM>, <NUM>, A) gray. The GPU <NUM> sets the color value of the particular pixel <NUM> to the lightest color value of pixels 730a - 730b. In the continuing example, that color is changed from (<NUM>, <NUM>, <NUM>, A) black to (<NUM>, <NUM>, <NUM>, A) white because second plurality pixel 730a is the lightest color, (<NUM>, <NUM>, <NUM>, A) white, of pixels sampled outward from particular pixel <NUM> along a line that includes particular pixel <NUM> and the image center <NUM>. <FIG> illustrates particular pixel <NUM> changed to (<NUM>, <NUM>, <NUM>, A) white. <FIG> illustrates an image of the receipt <NUM> with object features erased, in accordance with certain examples of the technology disclosed herein, after each particular pixel the image has been processed. The technology described herein is less computationally intensive and faster than other kernel-based methods, thereby reducing computational burden and latency in image processing over such methods.

Each of the operations described above for the particular pixel are performed in parallel by the GPU for each of the first plurality of pixels. In some examples, the first plurality of pixels is the entirety of pixels in the image. In other examples, less than all the pixels in the image are processed in a first parallel group.

As can be seen from the continuing example, with even a small number of second plurality pixels sampled outward along a line (or near the line) that includes the image center <NUM> and a particular pixel, each particular pixel in object <NUM> will be set to (<NUM>, <NUM>, <NUM>, A) white, and each particular pixel outside object <NUM> in image background <NUM> will be set to (<NUM>, <NUM>, <NUM>, A) gray.

While the image center presents a straightforward reference point (that can be readily determined once) to define a line that intersects the image edge along with any particular point, any point that is inside the object <NUM> can serve the same purpose as the image center. Such a point can be solicited from a device user via the display system <NUM>.

While a small number of second plurality points were used in the continuing example for ease of illustration, sixteen second plurality points evenly spaced along the line have proven enough to erase object features to a practical extent that facilitates object edge detection. Increasing the number of points, using a distribution of sampled second plurality points other than evenly space may increase the degree of erasure, but would also increase the processing required and thus introduce latency without a substantial gain in effectiveness.

Various methods of determining the "lightness" of a given pixel can be used with the technology disclosed herein without substantially changing the effectiveness of the technology. For example, cosine distance in the vector space between a given color and (<NUM>, <NUM>, <NUM>, A) white can be used to determine lightness, or the sum of the R, G, and B channels can be used, with higher sums being considered lighter. In some examples, the lightness of a color value is determined by converting the value of a pixel from the received image to a grayscale value, wherein grayscale values closer to white correspond to lighter. While the continuing example is directed to grayscale colors, the technology disclosed herein works with images having other colors in the RGBA spectrum.

The distance between the line and a sampled pixel can be limited to a predetermined distance, which can be measured in physical distance based on the full size of the image, or as pixels (either horizontally, vertically, or a combined function thereof). In some example of the technology disclosed herein, all second plurality pixels are directly on line <NUM>.

While in the continuing example, the features and the background are each darker than the object field, the technology disclosed herein can work in the obverse - meaning on objects with fields darker than the object fields and image background. In such cases, each particular pixel is set to the darkest pixel sampled on the line toward the image edge.

While in the continuing example the line containing the particular pixel and the image center <NUM> extends outward to the edge of the image <NUM>, in other examples the line extends a predetermined distance less than to the edge of the image, or a predetermined proportion of the distance toward the edge of the image <NUM>. For example, for text erasure, roughly twice the expected height of the text characters in pixel can be used for the predetermined distance. The precise value depends on the expected text size, the camera resolution, and the camera's expected distance from the document.

<FIG> depicts a computing machine <NUM> and a module <NUM> in accordance with certain examples. The computing machine <NUM> may correspond to any of the various computers, servers, mobile devices, embedded systems, or computing systems presented herein. The module <NUM> may comprise one or more hardware or software elements configured to facilitate the computing machine <NUM> in performing the various methods and processing functions presented herein. The computing machine <NUM> may include various internal or attached components such as a processor <NUM>, system bus <NUM>, system memory <NUM>, storage media <NUM>, input/output interface <NUM>, and a network interface <NUM> for communicating with a network <NUM>.

The computing machine <NUM> may be implemented as a conventional computer system, an embedded controller, a laptop, a server, a mobile device, a smartphone, a set-top box, a kiosk, a router or other network node, a vehicular information system, one or more processors associated with a television, a customized machine, any other hardware platform, or any combination or multiplicity thereof. The computing machine <NUM> may be a distributed system configured to function using multiple computing machines interconnected via a data network or bus system.

The processor <NUM> may be configured to execute code or instructions to perform the operations and functionality described herein, manage request flow and address mappings, and to perform calculations and generate commands. The processor <NUM> may be configured to monitor and control the operation of the components in the computing machine <NUM>. The processor <NUM> may be a general purpose processor, a processor core, a multiprocessor, a reconfigurable processor, a microcontroller, a digital signal processor ("DSP"), an application specific integrated circuit ("ASIC"), a graphics processing unit ("GPU"), a field programmable gate array ("FPGA"), a programmable logic device ("PLD"), a controller, a state machine, gated logic, discrete hardware components, any other processing unit, or any combination or multiplicity thereof. The processor <NUM> may be a single processing unit, multiple processing units, a single processing core, multiple processing cores, special purpose processing cores, co-processors, or any combination thereof. According to certain examples, the processor <NUM> along with other components of the computing machine <NUM> may be a virtualized computing machine executing within one or more other computing machines.

The system memory <NUM> may include non-volatile memories such as read-only memory ("ROM"), programmable read-only memory ("PROM"), erasable programmable read-only memory ("EPROM"), flash memory, or any other device capable of storing program instructions or data with or without applied power. The system memory <NUM> may also include volatile memories such as random-access memory ("RAM"), static random-access memory ("SRAM"), dynamic random-access memory ("DRAM"), and synchronous dynamic random-access memory ("SDRAM"). Other types of RAM also may be used to implement the system memory <NUM>. The system memory <NUM> may be implemented using a single memory module or multiple memory modules. While the system memory <NUM> is depicted as being part of the computing machine <NUM>, one skilled in the art will recognize that the system memory <NUM> may be separate from the computing machine <NUM> without departing from the scope of the subject technology. It should also be appreciated that the system memory <NUM> may include, or operate in conjunction with, a non-volatile storage device such as the storage media <NUM>.

The storage media <NUM> may include a hard disk, a floppy disk, a compact disc read only memory ("CD-ROM"), a digital versatile disc ("DVD"), a Blu-ray disc, a magnetic tape, a flash memory, other non-volatile memory device, a solid state drive ("SSD"), any magnetic storage device, any optical storage device, any electrical storage device, any semiconductor storage device, any physical-based storage device, any other data storage device, or any combination or multiplicity thereof. The storage media <NUM> may store one or more operating systems, application programs and program modules such as module <NUM>, data, or any other information. The storage media <NUM> may be part of, or connected to, the computing machine <NUM>. The storage media <NUM> may also be part of one or more other computing machines that are in communication with the computing machine <NUM> such as servers, database servers, cloud storage, network attached storage, and so forth.

The module <NUM> may comprise one or more hardware or software elements configured to facilitate the computing machine <NUM> with performing the various methods and processing functions presented herein. The module <NUM> may include one or more sequences of instructions stored as software or firmware in association with the system memory <NUM>, the storage media <NUM>, or both. The storage media <NUM> may therefore represent examples of machine or computer readable media on which instructions or code may be stored for execution by the processor <NUM>. Machine or computer readable media may generally refer to any medium or media used to provide instructions to the processor <NUM>. Such machine or computer readable media associated with the module <NUM> may comprise a computer software product. It should be appreciated that a computer software product comprising the module <NUM> may also be associated with one or more processes or methods for delivering the module <NUM> to the computing machine <NUM> via the network <NUM>, any signal-bearing medium, or any other communication or delivery technology. The module <NUM> may also comprise hardware circuits or information for configuring hardware circuits such as microcode or configuration information for an FPGA or other PLD.

The input/output ("I/O") interface <NUM> may be configured to couple to one or more external devices, to receive data from the one or more external devices, and to send data to the one or more external devices. Such external devices along with the various internal devices may also be known as peripheral devices. The I/O interface <NUM> may include both electrical and physical connections for operably coupling the various peripheral devices to the computing machine <NUM> or the processor <NUM>. The I/O interface <NUM> may be configured to communicate data, addresses, and control signals between the peripheral devices, the computing machine <NUM>, or the processor <NUM>. The I/O interface <NUM> may be configured to implement any standard interface, such as small computer system interface ("SCSI"), serial-attached SCSI ("SAS"), fiber channel, peripheral component interconnect ("PCI"), PCI express (PCIe), serial bus, parallel bus, advanced technology attached ("ATA"), serial ATA ("SATA"), universal serial bus ("USB"), Thunderbolt, FireWire, various video buses, and the like. The I/O interface <NUM> may be configured to implement only one interface or bus technology. Alternatively, the I/O interface <NUM> may be configured to implement multiple interfaces or bus technologies. The I/O interface <NUM> may be configured as part of, all of, or to operate in conjunction with, the system bus <NUM>. The I/O interface <NUM> may include one or more buffers for buffering transmissions between one or more external devices, internal devices, the computing machine <NUM>, or the processor <NUM>.

The I/O interface <NUM> may couple the computing machine <NUM> to various input devices including mice, touch-screens, scanners, electronic digitizers, sensors, receivers, touchpads, trackballs, cameras, microphones, keyboards, any other pointing devices, or any combinations thereof. The I/O interface <NUM> may couple the computing machine <NUM> to various output devices including video displays, speakers, printers, projectors, tactile feedback devices, automation control, robotic components, actuators, motors, fans, solenoids, valves, pumps, transmitters, signal emitters, lights, and so forth.

The computing machine <NUM> may operate in a networked environment using logical connections through the network interface <NUM> to one or more other systems or computing machines across the network <NUM>. The network <NUM> may include wide area networks (WAN), local area networks (LAN), intranets, the Internet, wireless access networks, wired networks, mobile networks, telephone networks, optical networks, or combinations thereof. The network <NUM> may be packet switched, circuit switched, of any topology, and may use any communication protocol. Communication links within the network <NUM> may involve various digital or an analog communication media such as fiber optic cables, free-space optics, waveguides, electrical conductors, wireless links, antennas, radio-frequency communications, and so forth.

The processor <NUM> may be connected to the other elements of the computing machine <NUM> or the various peripherals discussed herein through the system bus <NUM>. It should be appreciated that the system bus <NUM> may be within the processor <NUM>, outside the processor <NUM>, or both. According to certain examples, any of the processor <NUM>, the other elements of the computing machine <NUM>, or the various peripherals discussed herein may be integrated into a single device such as a system on chip ("SOC"), system on package ("SOP"), or ASIC device.

Examples may comprise a computer program that embodies the functions described and illustrated herein, wherein the computer program is implemented in a computer system that comprises instructions stored in a machine-readable medium and a processor that executes the instructions. However, it should be apparent that there could be many different ways of implementing examples in computer programming, and the examples should not be construed as limited to any one set of computer program instructions. Further, a skilled programmer would be able to write such a computer program to implement an example of the disclosed examples based on the appended flow charts and associated description in the application text. Therefore, disclosure of a particular set of program code instructions is not considered necessary for an adequate understanding of how to make and use examples. Further, those skilled in the art will appreciate that one or more aspects of examples described herein may be performed by hardware, software, or a combination thereof, as may be embodied in one or more computing systems. Moreover, any reference to an act being performed by a computer should not be construed as being performed by a single computer as more than one computer may perform the act.

The examples described herein can be used with computer hardware and software that perform the methods and processing functions described herein. The systems, methods, and procedures described herein can be embodied in a programmable computer, computer-executable software, or digital circuitry. The software can be stored on computer-readable media. For example, computer-readable media can include a floppy disk, RAM, ROM, hard disk, removable media, flash memory, memory stick, optical media, magneto-optical media, CD-ROM, etc. Digital circuitry can include integrated circuits, gate arrays, building block logic, field programmable gate arrays (FPGA), etc..

The example systems, methods, and acts described in the examples presented previously are illustrative, and, in alternative examples, certain acts can be performed in a different order, in parallel with one another, omitted entirely, and/or combined between different examples, and/or certain additional acts can be performed, without departing from the scope of the invention as defined by the appended claims.

Although specific examples have been described above in detail, the description is merely for purposes of illustration. Modifications of the disclosed aspects of the examples, in addition to those described above, can be made by a person of ordinary skill in the art, having the benefit of the present disclosure, without departing from the scope defined in the following claims.

For example, note that at least some of the parallelism in examples of the technology disclosed herein is driven by the output image, not the input image. The GPU can determine each output pixel in parallel. For each output pixel, the technology samples a number of input pixels. However, there are options for speeding up the calculation based on heuristics. For example, by assuming that there is a <NUM>-pixel margin around the object at least two options are available.

Claim 1:
A computer-implemented method (<NUM>) to erase features in fields of objects placed on backgrounds in images, comprising:
in a graphics processing unit, GPU (<NUM>):
receiving (<NUM>) an image (<NUM>) comprising a two-dimensional array of pixels, the image depicting features (<NUM>) in a field (<NUM>) of an object (<NUM>) on a background (<NUM>), the features and the background contrasting with the object field, and at least a portion of the object at a center (<NUM>) of the image; and
in parallel for each particular pixel (<NUM>, <NUM>) of a first plurality of pixels of the array of pixels, setting (<NUM>) a color value of the particular pixel to a determined lightest color value of a second plurality of pixels (630a, 630b, 630c, 630d, 730a, 730b) of the array of pixels, the second plurality of pixels being along a line (<NUM>, <NUM>) outward from the particular pixel toward an edge (<NUM>) of the image, the line defined by the particular pixel and the center of the image.