Patent Description:
The present disclosure relates to a solid-state imaging apparatus and an imaging system. Specifically, the present disclosure relates to a solid-state imaging apparatus and an imaging system in which noise due to a dark current occurs.

In order to reduce the scale and area of a circuit for each semiconductor substrate, a conventional technology of stacking and bonding a plurality of semiconductor substrates has been used in a solid-state imaging apparatus. For example, a solid-state imaging apparatus in which copper electrode pads are exposed on the bonding surfaces of a pair of semiconductor substrates and the electrode pads are bonded to each other for electrical conduction has been proposed (see, for example, <CIT>). The method of joining the copper electrode pads to each other as described above is called Cu (Copper)-Cu bonding. Further, in the above-mentioned solid-state imaging apparatus, pads that are not used for electrical conduction are called dummy pads which are provided on the bonding surfaces below a plurality of pixel circuits. The European Patent Application <CIT> discloses a first semiconductor device to be bonded to a second semiconductor device at a bonding interface, the semiconductor devices having a more reliable bonding surface to suppress occurrence of, for example, a conduction failure, an increase in contact resistance, and the like at a bonding interface between Cu electrodes.

In the above-mentioned existing technology, in addition to the electrode pads, also the dummy pads are bonded to each other to improve the bonding strength. However, a difference occurs between the dark current of the pixel circuit on the electrode pad and the dark current of the pixel circuit on the dummy pad, which causes a problem that noise occurs in the image data due to the difference and the image quality is reduced. The reason why the difference in dark current occurs as described above is presumably because there is a difference between the amount of hydrogen supplied to the pixel circuit on the electrode pad and the amount of hydrogen supplied to the pixel circuit on the dummy pad.

In view of the above-mentioned circumstances, it is desirable to suppress reduction in image quality of image data in a solid-state imaging apparatus in which a plurality of semiconductor substrates are stacked and dummy pads are provided.

According to a first aspect, the disclosure provides an image sensor in accordance with independent claim <NUM>. All further aspects are set forth in the dependent claims, the following description and the drawings. In accordance with a first aspect of the present disclosure, there is provided an image sensor including a first substrate including a plurality of pixels and a plurality of vertical signal lines and a plurality of first wiring layers at one side thereof and a second substrate including a plurality of second wiring layers at one side thereof. The first and second substrates are secured together with a bonding surface between the pluralities of first and second wiring layers. First pads are provided on each side of the bonding surface and between one of the plurality of first wiring layers and one of the plurality of second wiring layers and second pads are provided on each side of the bonding surface and between another of the plurality of first wiring layers and another of the plurality of second wiring layers. First vias are connected to the one of the plurality of first wiring layers and the first pad provided on the first substrate and second vias are connected to the one of the plurality of second wiring layers and the first pad provided on the second substrate. The first pad provided on the first substrate and the second pad provided on the second substrate are connected to each other. Third vias are connected to the another of the plurality of first wiring layers and fourth vias are connected to the another of the plurality of second wiring layers. At least one of the third vias and the fourth vias connect the second pads and at least one of the another of the plurality of first and second wiring layers together. The first pads provide for electrical connection between the one of the plurality of first wiring layers and the one of the plurality of second wiring layers, the first pads are electrically connected to one of the plurality of the vertical signals lines and the second pads do not electrically connect to the plurality of vertical signal lines.

Further, in the first aspect, the first substrate further comprises a pixel circuit and the second substrate further comprises a subsequent circuit.

Further, in the first aspect, pixel signals from the pixel circuit are transferred from the pixel circuit to the subsequent circuit.

Further, in the first aspect, the dummy pads are electrically floating.

Further, in the first aspect, the dummy pads are connected to a fixed potential.

Further, in the first aspect, the first pads are electrode pads and the second pads are dummy pads.

Further, in the first aspect, a number of the first and second vias equals a number of the third and fourth vias.

Further, in the first aspect, a number of the first and second vias is greater than a number of the third and fourth vias.

Further, in the first aspect, a number of the first and second vias is less than a number of the third and fourth vias.

Further, in the first aspect, the third vias and the fourth vias connect the second pads and the another of the plurality of first wiring layers and the another of the plurality of second wiring layers together.

Further, in the first aspect, the third vias connect the second pads and the another of the plurality of first wiring layers together.

Further, in the first aspect, the first and second vias have different sizes than the third and fourth vias.

Further, in the first aspect, a cross sectional shape of the first, second, third and fourth vias is either rectangular, circular or elliptical.

Further, in the first aspect, a number of the third vias is different than a number of the fourth vias.

In accordance with a second aspect of the present disclosure, there is provided an image sensor including a first substrate and a second substrate provided beneath the first substrate. The first substrate includes a first bonding area including electrode pads and a second bonding area including dummy pads. A plurality of first vias extend from the first bonding area of the first substrate and connect to the electrode pads and a plurality of second vias extend from the second bonding area of the first substrate and connect to the dummy pads. A number of the plurality of first vias is greater than a number of the plurality of second vias.

Further, in the second aspect, the electrode pads provide for electrical connection between the first substrate and the second substrate.

Further, in the second aspect, the electrode pads are provided within the first bonding area.

Further, in the second aspect, the dummy pads are provided within the second bonding area.

Further, in the second aspect, the dummy pads are electrically floating.

Further, in the second aspect, the dummy pads are connected to a fixed potential.

In accordance with a third aspect of the present disclosure, there is provided an image sensor including a first substrate and a second substrate provided beneath the first substrate. The first substrate includes a pair of first bonding areas including electrode pads and at least one second bonding area provided between the pair of first bonding areas including dummy pads. A plurality of first vias extend from the pair of first bonding areas of the first substrate and connected to the electrode pads and a plurality of second vias extend from the at least one second bonding area of the first substrate and connected to the dummy pads.

Further, in the third aspect, the at least one second bonding area is provided in a center portion of the first substrate.

Further, in the third aspect, the image sensor further includes another second bonding area provided above one of the pair of first bonding areas and a further second bonding area provided below the other of the pair of first bonding areas.

Further, in the third aspect, the second substrate includes a plurality of pairs of circuit components.

Further, in the third aspect, the plurality of pairs of circuit components are arranged such that first and second circuit components in one pair are transposed in another pair of adjacent circuit components.

Hereinafter, embodiments for carrying out the present disclosure (hereinafter, referred to as embodiments) will be described. The description will be made in the following order.

<FIG> is a block diagram showing a configuration example of an imaging system <NUM> according to a first embodiment of the present disclosure. The imaging system <NUM> is for acquiring image data by imaging, and includes an optical unit <NUM>, a solid-state imaging apparatus <NUM>, and a digital signal processing (DSP) circuit <NUM>. Further, the imaging system <NUM> includes a display unit <NUM>, an operation unit <NUM>, a bus <NUM>, a frame memory <NUM>, a storage unit <NUM>, and a power source unit <NUM>. As the imaging system <NUM>, a camera to be installed in a smartphone, an in-vehicle camera, or the like is assumed.

The optical unit <NUM> collects light from an object and guides the collected light to the solid-state imaging apparatus <NUM>. The solid-state imaging apparatus <NUM> generates image data by photoelectric conversion. The solid-state imaging apparatus <NUM> supplies the generated image data to the DSP circuit <NUM> by way of a signal line <NUM>.

The DSP circuit <NUM> executes predetermined signal processing on the image data. The DSP circuit <NUM> outputs the processed image data to the frame memory <NUM> or the like by way of the bus <NUM>. Note that the DSP circuit <NUM> is an example of a signal processing circuit.

The display unit <NUM> displays the image data. As the display unit <NUM>, for example, a liquid crystal panel or an organic electroluminescence (EL) panel is assumed. The operation unit <NUM> generates an operation signal in accordance with a user operation.

The bus <NUM> is a common path for the optical unit <NUM>, the solid-state imaging apparatus <NUM>, the DSP circuit <NUM>, the display unit <NUM>, the operation unit <NUM>, the frame memory <NUM>, the storage unit <NUM>, and the power source unit <NUM> to transmit/ receive data to/from each other.

The frame memory <NUM> holds the image data. The storage unit <NUM> stores various types of data such as image data. The power source unit <NUM> supplies power to the solid-state imaging apparatus <NUM>, the DSP circuit <NUM>, the display unit <NUM>, and the like.

<FIG> is a diagram showing an example of a stacked structure of the solid-state imaging apparatus <NUM> according to the first embodiment of the present disclosure. The solid-state imaging apparatus <NUM> includes a circuit substrate <NUM>, and a light reception substrate <NUM> stacked on the circuit substrate <NUM>.

Hereinafter, a predetermined axis parallel to the substrate plane of the light reception substrate <NUM> and the circuit substrate <NUM> is defined as an X axis and an axis orthogonal to the substrate plane is defined as a Z axis. Further, an axis orthogonal to the X axis and the Z axis is defined as a Y axis.

A plurality of vertical signal lines VSL is wired on the light reception substrate <NUM> along the Y-axis direction. The vertical signal lines VSL are electrical connected to a circuit in the circuit substrate <NUM> by way of vias by Cu-Cu bonding.

<FIG> is a block diagram showing a configuration example of the solid-state imaging apparatus <NUM> according to the first embodiment of the present disclosure. The solid-state imaging apparatus <NUM> includes a vertical drive circuit <NUM>, a timing control circuit <NUM>, a north horizontal drive circuit <NUM>, a north column signal processing circuit <NUM>, a pixel array unit <NUM>, a south column signal processing circuit <NUM>, and a south horizontal drive circuit <NUM>. In addition, the solid-state imaging apparatus <NUM> further includes a power supply circuit <NUM> and an output unit <NUM>.

A plurality of pixel circuits <NUM> is arranged in a two-dimensional lattice in the pixel array unit <NUM>. Hereinafter, a set of the pixel circuits <NUM> arranged in the X axis direction will be referred to as "row" and a set of the pixel circuits <NUM> arranged in the Y axis will be referred to as "column".

The pixel circuits <NUM> each generate a pixel signal by performing photoelectric conversion on incident light.

The vertical drive circuit <NUM> sequentially selects and drives rows and causes each of the rows to output a pixel signal. The pixel circuits <NUM> in one (e.g., the odd rows) of the odd rows or the even rows each output a pixel signal to the north column signal processing circuit <NUM>, and the other pixel circuits <NUM> (e.g., in the even rows) each output a pixel signal to the south column signal processing circuit <NUM>.

The timing control circuit <NUM> controls the operation timing of each of the vertical drive circuit <NUM>, the north horizontal drive circuit <NUM>, the north column signal processing circuit <NUM>, the south column signal processing circuit <NUM>, and the south horizontal drive circuit <NUM>.

The north column signal processing circuit <NUM> executes signal processing such as analog-to-digital (AD) conversion processing and correlated double sampling (CDS) processing on the pixel signal from the corresponding row (e.g., odd row) for each column. The north column signal processing circuit <NUM> outputs the processed pixel signal to the output unit <NUM> in accordance with control by the north horizontal drive circuit <NUM>.

The south column signal processing circuit <NUM> executes signal processing such as AD conversion processing and CDS processing on the pixel signal from the corresponding row (e.g., even row) for each column. The south column signal processing circuit <NUM> outputs the processed pixel signal to the output unit <NUM> in accordance with control by the south horizontal drive circuit <NUM>.

The north horizontal drive circuit <NUM> controls the north column signal processing circuit <NUM> to sequentially output the pixel signal in the row. The south horizontal drive circuit <NUM> controls the south column signal processing circuit <NUM> to sequentially output the pixel signal in the row.

The power supply circuit <NUM> supplies power to the pixel array unit <NUM> and the like. The output unit <NUM> outputs image data in which pixel signals are arranged.

Further, the pixel array unit <NUM> is disposed on the light reception substrate <NUM>, and circuits such as the vertical drive circuit <NUM> other than the pixel array unit <NUM> are disposed on the circuit substrate <NUM>. The dot-dash line in <FIG>indicates the bonding surface between the substrates. Note that although the pixel array unit <NUM> is disposed on the light reception substrate <NUM> and other circuits are disposed on the circuit substrate <NUM>, the circuits to be disposed on the respective substrates are not limited to this configuration. For example, even components such as comparators in the north column signal processing circuit <NUM> and the south column signal processing circuit <NUM> can be disposed on the light reception substrate <NUM>.

Further, although both the north column signal processing circuit <NUM> and the south column signal processing circuit <NUM> are disposed, only one of the circuits can be disposed. In this case, only corresponding one of the north horizontal drive circuit <NUM> and the south horizontal drive circuit <NUM> is disposed.

<FIG> is a plan view showing an example of the bonding surface of the light reception substrate <NUM> in the first embodiment of the present disclosure. Hereinafter, of both surfaces of the light reception substrate <NUM>, the surface opposed to the bonding surface will be referred to as the "light reception surface". On the light reception surface, the plurality of pixel circuits <NUM> described above is arranged.

On the bonding surface of the light reception substrate <NUM>, drive line bonding areas <NUM> and <NUM>, power line bonding areas <NUM> and <NUM>, a VSL bonding area <NUM>, and dummy areas <NUM> and <NUM> are provided. The VSL bonding area <NUM> can be disposed at the center. In another words, the VSL bonding area <NUM> can be disposed between the dummy areas <NUM> and <NUM>. Further, with the side of the light reception surface as the upper side, the VSL bonding area <NUM> and the dummy areas <NUM> and <NUM> are disposed below the pixel array unit <NUM>. The configuration of the bonding surface of the circuit substrate <NUM> (illustrated in <FIG>) is the same as that of the bonding surface of the light reception substrate <NUM>.

In the VSL bonding area <NUM>, for example, a plurality of electrode pads <NUM> each formed of copper is arranged. The electrode pads <NUM> are disposed below different pixel circuits <NUM>. Further, the electrode pads <NUM> are each connected to a vertical signal line and a power source line by way of a via. Further, the electrode pads <NUM> are bonded to electrode pads on the side of the circuit substrate <NUM>, and the light reception substrate <NUM> and the circuit substrate <NUM> are electrically connected to each other by way of the electrode pads. The north column signal processing circuit <NUM> and the south column signal processing circuit <NUM> are connected to the electrode pads <NUM> of the VSL bonding area <NUM>. Note that the material of the electrode pad is not limited to copper, and another metal material such as gold, a conductive material, or the like may be used. Further, although the diameter of the via is smaller than the diameter of the pad in <FIG> as viewed from the X axis direction, the present disclosure is not limited to this configuration. The diameter of the via may be larger than, the same as, or smaller than the diameter of the pad as viewed from the X axis direction and the Y axis direction.

A plurality of electrode pads is also formed in the drive line bonding areas <NUM> and <NUM>, and the electrode pads are each connected to a drive line by way of a via. Note that the drive line is a signal line for transmitting a drive signal for driving the pixel circuit <NUM>.

A plurality of electrode pads is also formed in the power line bonding areas <NUM> and <NUM>, and the electrode pads are each connected to a power source line and a ground line by way of a via.

A plurality of dummy pads <NUM> each formed of copper is arranged in each of the dummy areas <NUM> and <NUM>. The dummy pads <NUM> are disposed below different pixel circuits <NUM>. Further, although the dummy pads <NUM> are bonded to dummy pads on the side of the circuit substrate <NUM>, the dummy pads <NUM> are not used for electrical connection between the light reception substrate <NUM> and the circuit substrate <NUM> unlike the electrode pads <NUM>. The dummy pads are connected to other than the VSL (e.g., VDD, Ground) and or, are electrically floating. In other words, the dummy pads <NUM> are not used for electrical connection. However, by bonding the dummy pads <NUM> to each other in addition to the electrode pads <NUM>, it is possible to improve the bonding strength and suppress the warpage of the substrate.

<FIG> is a circuit diagram showing a configuration example of the pixel circuit <NUM> on the VSL bonding area <NUM> in the first embodiment of the present disclosure. The pixel circuit <NUM> includes a photoelectric conversion device <NUM>, a transfer transistor <NUM>, a reset transistor <NUM>, a floating diffusion layer <NUM>, an amplification transistor <NUM>, and a selection transistor <NUM>.

Further, on the light reception surface of the pixel array unit <NUM>, a pair of vertical signal lines VSL is wired along the Y axis direction for each column. One of the pair of vertical signal lines VSL is connected to the odd row, and the other of the pair of vertical signal lines VSL is connected to the even row. Further, on the light reception surface of the pixel array unit <NUM>, drive lines <NUM> to <NUM> are wired along the X axis direction for each row.

The photoelectric conversion device <NUM> generates charges by photoelectrically converting incident light. The transfer transistor <NUM> transfers the charges from the photoelectric conversion device <NUM> to the floating diffusion layer <NUM> in accordance with a drive signal TRG. The drive signal TRG is supplied from the vertical drive circuit <NUM> by way of the drive line <NUM>.

The reset transistor <NUM> performs initialization by extracting the charges from the floating diffusion layer <NUM> in accordance with a drive signal RST. The drive signal RST is supplied from the vertical drive circuit <NUM> by way of the drive line <NUM>.

The floating diffusion layer <NUM> accumulates charges and generates a voltage corresponding to the amount of charges. The amplification transistor <NUM> amplifies the voltage of the floating diffusion layer <NUM>.

The selection transistor <NUM> outputs, as a pixel signal, the signal of the amplified voltage to the north column signal processing circuit <NUM> or the south column signal processing circuit <NUM> by way of the vertical signal line VSL in accordance with a drive signal SEL. The drive signal SEL is supplied from the vertical drive circuit <NUM> by way of the drive line <NUM>.

Further, the pixel circuits <NUM> on the VSL bonding area <NUM> are connected to the electrode pads <NUM> by way of the vertical signal lines VSL and vias. The electrode pads <NUM> are bonded to electrode pads <NUM> on the side of the circuit substrate <NUM>. By way of the pads and the vias, one of the pair of vertical signal lines VSL is connected to the north column signal processing circuit <NUM>, and the other vertical signal line VSL is connected to the south column signal processing circuit <NUM>. Note that in the case of providing only one of the north column signal processing circuit <NUM> and the south column signal processing circuit <NUM>, only one vertical signal line VSL is wired for each column.

Further, a connection node between a power source line <NUM> for supplying a power supply voltage VDD and the pixel circuit <NUM> is connected to the power supply circuit <NUM> on the side of the circuit substrate <NUM> by way of a via, the electrode pad <NUM>, and the electrode pad <NUM>.

<FIG> is a circuit diagram showing a configuration example of the pixel circuit <NUM> on a dummy area <NUM> in the first embodiment of the present disclosure. A via is disposed at a connection node between the pixel circuit <NUM> on or above the dummy area <NUM> and the vertical signal line VSL. However, the via in the dummy area <NUM> is not electrically connected to the circuit substrate <NUM> unlike the via in the VSL bonding area <NUM>.

Further, the pixel circuit <NUM> on the dummy area <NUM> is connected to the dummy pad <NUM> by way of the power source line <NUM> and the via. The dummy pad <NUM> is bonded to a dummy pad <NUM> on the side of the circuit substrate <NUM>. Note that the configuration of the pixel circuit <NUM> is not limited to the circuit illustrated in <FIG> or <FIG>. For example, a selection transistor does not necessarily need to be disposed in the pixel circuit <NUM>.

<FIG> is a plan view showing an example of the VSL bonding area <NUM> and the dummy area <NUM> in the first embodiment of the present disclosure. In the VSL bonding area <NUM>, the plurality electrode pads <NUM> is arranged, and a predetermined number (e.g., four) of vias <NUM> is connected to the electrode pads <NUM>. Note that the number of the vias <NUM> for each of the electrode pads <NUM> is not limited to four.

Meanwhile, the plurality of dummy pads <NUM> is arranged in the dummy area <NUM>, and a different number (e.g., two) of the vias <NUM> is connected to each of the dummy pads <NUM>. The number of the vias <NUM> is different from that of the electrode pads <NUM>.

Further, for all the dummy pads <NUM>, the number of vias to be connected is the same. Further, the cross-sectional area and the cross-sectional shape of each of the vias <NUM> and <NUM> are the same. For example, the cross-sectional shape of each via is rectangular.

In the case of a plurality of films stacked on the light reception substrate <NUM>, the films themselves contain hydrogen in some cases. Further, hydrogen is mixed in the hydrogen sintering process in some cases. Depending on the situations, the number of vias of the electrode pads <NUM> or the dummy pads <NUM> is adjusted so that the amount of hydrogen to be supplied to each of the plurality of pixel circuits <NUM> is uniform.

<FIG> is an example of a cross-sectional view of the solid-state imaging apparatus <NUM> according to the first embodiment of the present disclosure. The cross-sectional view in <FIG> is a cross-sectional view if the solid-state imaging apparatus <NUM> cut along the line segment Y1-Y2 in <FIG>.

In the light reception substrate <NUM>, with the side of the light reception surface as the upper side, a wiring layer <NUM> is provided above the electrode pad <NUM>. The wiring layer <NUM> includes a single insulation film or a plurality of insulation films, and a single wiring layer or a plurality of wiring layers. In areas in which the electrode pads are not bonded to each other, the upper and lower insulation films are connected to each other. Further, in the wiring layer <NUM>, a metal wiring <NUM> such as a vertical signal line and a power source line is wired along the Y axis direction, and a transistor <NUM> such as a transfer transistor is disposed. Further, the vertical signal line and the like and the electrode pad <NUM> are connected to each other by way of the via <NUM>. Further, a photodiode <NUM> is formed above the via <NUM>, and a color filter <NUM> is formed above the photodiode <NUM>. An on-chip lens <NUM> is formed above the color filter <NUM>. The photodiode <NUM> and the transistor <NUM> constitute the pixel circuit <NUM>. The wiring layer <NUM> includes the plurality of metal wirings <NUM> and <NUM>. Each of the plurality of the metal wirings <NUM> are connected by way of the vias <NUM>, and each of the plurality of the metal wirings <NUM> are connected by way of the vias <NUM>. Further, the wiring layer <NUM> includes the plurality of metal wirings <NUM> and <NUM>. Each of the plurality of the metal wirings <NUM> are connected by way of the vias <NUM>, and each of the plurality of the metal wirings <NUM> are connected by way of the vias <NUM>.

Meanwhile, the wiring layer <NUM> is provided also above the dummy pad <NUM>. In the wiring layer <NUM>, a metal wiring <NUM> such as a power source line is wired along the Y axis direction or the X axis direction, and a transistor <NUM> such as a transfer transistor is disposed. Further, the power source line and the dummy pad <NUM> are connected to each other by way of the via <NUM>. Further, a photodiode <NUM> is formed above the via <NUM>, and a color filter <NUM> is formed above the photodiode <NUM>. An on-chip lens <NUM> is formed above the color filter <NUM>. The photodiode <NUM> and the transistor <NUM> constitute the pixel circuit <NUM>.

In the circuit substrate <NUM>, with the side of the light reception surface as the upper side, a wiring layer <NUM> is provided below the electrode pad <NUM>. In the wiring layer <NUM>, a metal wiring <NUM> is wired, and a transistor <NUM> is provided. A via <NUM> is connected to the electrode pad <NUM>. Further, a subsequent circuit <NUM> such as an A/D converter (ADC) in the north column signal processing circuit <NUM> is disposed below the via <NUM>. The via <NUM> connects the electrode pad <NUM> and the circuit such as the subsequent circuit <NUM> to each other.

Meanwhile, the wiring layer <NUM> is provided also below the dummy pad <NUM>. In the wiring layer <NUM>, a metal wiring <NUM> is wired, and the transistor <NUM> and a via <NUM> are disposed. However, the via <NUM> is not connected to the dummy pad <NUM>. Further, a subsequent circuit <NUM> such as an ADC in the north column signal processing circuit <NUM> is disposed below the via <NUM>.

As described above, of both surfaces of the light reception substrate <NUM>, on the light reception surface opposed to the bonding surface, the plurality pixel circuits <NUM> is arranged. In the process (hydrogen sintering process or the like) when bonding the light reception substrate <NUM> and the circuit substrate <NUM> to each other, hydrogen or the like is mixed in the vicinity of the bonding surface in some cases. The hydrogen or the like is known to terminate the dangling bond of silicon as disclosed in <CIT>. Due to this property, in the case where the hydrogen or the like is supplied to the semiconductor device (photoelectric conversion device or transistor) in the pixel circuits <NUM>, a dark current that occurs in the pixel circuit <NUM> is suppressed in accordance with the amount of supplied hydrogen or the like.

As illustrated in <FIG>, the via <NUM> connects the electrode pad <NUM> and the pixel circuit <NUM> above the electrode pad <NUM> to each other, and causes a pixel signal to be transmitted through the via <NUM>. The via <NUM> connects the dummy pad <NUM> and the pixel circuit <NUM> above the dummy pad <NUM> to each other. In other words, the via <NUM> connects, by way of the electrode pad <NUM>, the pixel circuit <NUM> above the electrode pad <NUM> and the VSL bonding area <NUM> on the bonding surface to each other, and the via <NUM> connects, by way of the dummy pad <NUM>, the pixel circuit <NUM> above the dummy pad <NUM> and the dummy area <NUM> on the bonding surface to each other.

Since hydrogen is contained in the vicinity of the bonding surface due to the process at the time of bonding, hydrogen is supplied to the pixel circuit <NUM> above the electrode pad <NUM> by way of the via <NUM>, and hydrogen is supplied also to the pixel circuit <NUM> above the dummy pad <NUM> by way of the via <NUM>. As a result, the amount of hydrogen supplied to each of the plurality of pixel circuits <NUM> is constant, and the amount of dark current generated in each circuit is constant. Further, by connecting also the via <NUM> to the dummy pad <NUM>, the uniformity of the opening of the via is improved, and process variations can be suppressed. Further, it is possible to suppress the plasma damage and improve the yield.

Further, the electrode pad for dummy bonding floats if no via is provided. By additionally disposing a via, it is possible to connect the electrode pad (e.g., the dummy pad <NUM>) for dummy bonding to, for example, a fixed potential (VDD), an arbitrary potential, a ground potential (GND), or the like. As a result, it is possible to stabilize the electrode for dummy bonding in potential, and the electrical characteristics are improved. Examples of the method of connecting the electrode pad for dummy bonding to a fixed potential, an arbitrary potential, or a ground potential include a method of directly connecting a via to the potential. Further, by additionally disposing a via, it is possible to connect the electrode pad to another wiring by way of the via. By connecting the wiring connected to a contact terminal opposite to the electrode pad, of contact terminals of the via, to an arbitrary potential, the electrode pad may be connected to the potential by way of the via.

Note that the light reception substrate <NUM> is an example of a first semiconductor substrate, and the circuit substrate <NUM> is an example of a second semiconductor substrate. The pixel circuit <NUM> is an example of a first circuit. The subsequent circuit <NUM> is an example of a second circuit. The electrode pad <NUM> is an example of a first electrode pad. The dummy pad <NUM> is an example of a second electrode pad. The electrode pad <NUM> is an example of a third electrode pad, and the dummy pad <NUM> is an example of a fourth electrode pad. The wiring layer <NUM> is an example of a first wiring layer, and the wiring layer <NUM> is an example of a second wiring layer. The via <NUM> is an example of a first via, and the via <NUM> is an example of a second via. The via <NUM> is an example of a third via.

Further, although hydrogen is assumed as an atom that terminates the dangling bond of silicon, an atom other than hydrogen has a property that terminates the dangling bond of silicon in some cases. For this reason, the number of vias can be adjusted so that the supply amount of the atom other than hydrogen, which terminates the dangling bond of silicon, is uniform. Examples of the atom that terminates the dangling bond of silicon include hydrogen (H), fluorine (F), nitrogen (N), oxygen (O), and carbon (C). Other examples of such an atom include, but not limited to, elements of Group <NUM> to Group <NUM>.

Next, a Comparative Example in which the via <NUM> is not connected to the dummy pad <NUM> will be considered.

<FIG> is an example of a cross-sectional view of a solid-state imaging apparatus according to a Comparative Example. As illustrated in <FIG>, in the case where the via <NUM> is not connected to the dummy pad <NUM>, the amount of hydrogen supplied to the pixel circuit <NUM> above the dummy pad <NUM> is reduced as compared with the amount of hydrogen supplied to the pixel circuit <NUM> above the electrode pad <NUM>. For this reason, the amount of hydrogen supplied to each of the plurality of pixel circuits <NUM> is non-uniform, and a difference occurs in the amount of dark current generated in each circuit. As a result, noise due to the difference in dark current occurs, which reduces the image quality of image data.

<FIG> are enlarged views each showing an example of the vicinity of the bonding surface in the first embodiment of the present disclosure or the Comparative Example. <FIG> is an enlarged view showing an example of the vicinity of the bonding surface in the first embodiment of the present disclosure. <FIG> is an enlarged view showing an example of the vicinity of the bonding surface in the Comparative Example.

As shown in <FIG>, a silicon nitride (SiN) film <NUM> is formed on the bonding surface on the light reception side in order to suppress warpage of the light reception substrate <NUM>. The electrode pad <NUM> is formed by breaking through the SiN film <NUM>. In other words, the electrode pad <NUM> penetrates the SiN film <NUM>.

Similarly, a SiN film <NUM> is formed on the bonding surface on the circuit side, and the electrode pad <NUM> is formed by breaking through the SiN film <NUM>.

As disclosed in <CIT>, the SiN films <NUM> and <NUM> are used for suppressing warpage. However, the SiN film <NUM> and the like each have a property to block hydrogen as disclosed in <CIT>. For this reason, in the case where the SiN film <NUM> is not broken through as illustrated in <FIG>, there is a possibility that hydrogen is not supplied to the pixel circuit <NUM> and a dark current is not sufficiently suppressed. Therefore, in the case of forming a SiN film, it is favorable that the electrode pad breaks through the SiN film.

<FIG> are diagrams that each shows an example of image data in the first embodiment of the present disclosure or the Comparative Example. <FIG> is a diagram showing image data <NUM> obtained by performing imaging in a dark state in the first embodiment of the present disclosure. <FIG> is a diagram showing an example of the image data <NUM> acquired by performing imaging in a dark state in the Comparative Example in which the via is not connected to the dummy pad.

In the case where the via is connected to the dummy pad, hydrogen is supplied also to the pixel circuit <NUM> above the dummy pad by way of the via. For this reason, the amount of hydrogen supplied to each of the plurality of pixel circuits <NUM> is uniform and the amount of dark current generated in each circuit is uniform. As a result, as illustrated in <FIG>, streaking does not occur the image data <NUM>, which makes it possible to improve the image quality.

Meanwhile, in the case where the via is not connected to the dummy pad, hydrogen is not supplied to the pixel circuit <NUM> above the dummy pad. For this reason, the amount of hydrogen supplied to each of the plurality of pixel circuits <NUM> is non-uniform and the amount of dark current generated in each circuit is non-uniform. As a result, as shown in <FIG>, streak noise occurs in the VSL bonding area <NUM> in image data <NUM>, which degrades the image quality.

As described above, in accordance with the first embodiment of the present disclosure, since the vias <NUM> connect the pixel circuits <NUM> and the dummy area <NUM> on the bonding surface to each other by way of the dummy pads <NUM>, it is possible to make the amount of hydrogen supplied to each of the plurality of pixel circuits <NUM> uniform. As a result, the amount of generated dark current becomes uniform, and it is possible to improve the image quality of image data.

The amount of hydrogen to be supplied has been made uniform by using two vias of the dummy pad <NUM> in the above-mentioned first embodiment. However, in the case where the number of vias is two, the amount of supplied hydrogen is excessive in some cases. The solid-state imaging apparatus <NUM> according to a first modified example of the first embodiment is different from the solid-state imaging apparatus <NUM> according to the first embodiment in that the number of vias of the dummy pads <NUM> is reduced to reduce the amount of hydrogen to be supplied.

<FIG> is a plan view showing an example of the VSL bonding area <NUM> and the dummy area <NUM> in the first modified example of the first embodiment of the present disclosure. The solid-state imaging apparatus <NUM> according to the first modified example of the first embodiment is different from that according to the first embodiment in that the number of vias of the dummy pad <NUM> is one. By reducing the number of vias of the dummy pad <NUM> by one, it is possible to reduce the amount of hydrogen to be supplied to the pixel circuit <NUM> above the dummy pad <NUM>.

In accordance with the first modified example of the first embodiment of the present disclosure, since the number of vias of the dummy pad <NUM> is reduced, it is possible to reduce the amount of hydrogen to be supplied to the pixel circuit <NUM> above the dummy pad <NUM>.

The amount of hydrogen to be supplied has been made uniform by using two vias of the dummy pad <NUM> in the above-mentioned first embodiment. However, in the case where the number of vias is two, the amount of supplied hydrogen is insufficient in some cases. The solid-state imaging apparatus <NUM> according to a second modified example of the first embodiment is different from that according to the first embodiment in that the number of vias of the dummy pad <NUM> is increased to increase the amount of hydrogen to be supplied.

<FIG> is a plan view showing an example of the VSL bonding area <NUM> and the dummy area <NUM> in the second modified example of the first embodiment of the present disclosure.

<FIG> is an example of a cross-sectional view of the solid-state imaging apparatus <NUM> according to the second modified example of the first embodiment of the present disclosure.

As illustrated in <FIG> and <FIG>, the solid-state imaging apparatus <NUM> according to the second modified example of the first embodiment is different from that according to the first embodiment in that the number of vias of the dummy pad <NUM> is four which is similar in number to the electrode pad <NUM>. By increasing the number of vias of the dummy pad <NUM>, it is possible to increase the amount of hydrogen to be supplied to the pixel circuit <NUM> above the dummy pad <NUM>.

Note that the number of vias per dummy pad <NUM> is not limited to one, two, or four, and may be three.

As described above, in accordance with the second modified example of the first embodiment of the present disclosure, since the number of vias of the dummy pad <NUM> is increased, it is possible to increase the amount of hydrogen to be supplied to the pixel circuit <NUM> above the dummy pad <NUM>.

The number of vias of the dummy pad <NUM> has been increased to four in the above-mentioned second modified example of the first embodiment. However, in the case where the number of vias is four, the amount of hydrogen is insufficient in some cases. The solid-state imaging apparatus <NUM> according to a third modified example of the first embodiment is different from that according to the second modified example of the first embodiment in that the number of vias of the dummy pad <NUM> is further increased.

<FIG> is a plan view showing an example of the VSL bonding area <NUM> and the dummy area <NUM> in the third modified example of the first embodiment of the present disclosure.

<FIG> is an example of a cross-sectional view of the solid-state imaging apparatus <NUM> according to the third modified example of the first embodiment of the present disclosure.

As illustrated in <FIG> and <FIG>, the solid-state imaging apparatus <NUM> according to the third modified example of the first embodiment is different from that according to the first embodiment in that the number of vias of the dummy pad <NUM> is nine. By increasing the number of vias of the dummy pad <NUM>, it is possible to increase the amount of hydrogen to be supplied to the pixel circuit <NUM> above the dummy pad <NUM>.

Note that the number of vias per dummy pad <NUM> is not limited to four or nine, and may be five to eight.

As described above, in accordance with the third modified example of the first embodiment of the present disclosure, since the number of vias of the dummy pad <NUM> is further increased, it is possible to further increase the amount of hydrogen to be supplied to the pixel circuit <NUM> above the dummy pad <NUM>.

The number of vias to be connected to the dummy pads <NUM> has been the same for all the dummy pads <NUM> in the above-mentioned first embodiment. However, it is unnecessary to provide a via depending on the position of the dummy pad in some cases. The solid-state imaging apparatus <NUM> according to a second embodiment is different from that according to the first embodiment in that a dummy pad to which a via is connected and a dummy pad to which a via is not connected are disposed.

<FIG> is a plan view showing an example of the VSL bonding area <NUM> and the dummy area <NUM> in the second embodiment of the present disclosure. The dummy area <NUM> in the second embodiment is different from that in the first embodiment in that a plurality of dummy pads <NUM> and a plurality of dummy pad <NUM> are arranged.

It is unnecessary to supply hydrogen to each of the dummy pads <NUM> disposed at the respective positions, and a via is not connected to the dummy pad. Meanwhile, it is necessary to supply hydrogen to each of the dummy pads <NUM> disposed at the respective positions, and the number of vias of the dummy pad is four or the like. By adjusting the number of vias as described above, it is possible to make the amount of hydrogen to be supplied uniform.

Note that the dummy pad <NUM> is an example of a first dummy pad, and the dummy pad <NUM> is an example of a second dummy pad.

As described above, in accordance with the second embodiment of the present disclosure, since the dummy pad <NUM> to which a via is not connected and the dummy pad <NUM> to which a via is connected are arranged, it is possible to adjust the amount of hydrogen to be supplied and make it uniform.

A dummy pad to which a via is not connected and a dummy pad to which a via is connected have been arranged in the above-mentioned second embodiment. However, there is a possibility that the amount of hydrogen to be supplied of the dummy pad to which a via is not connected is insufficient. The solid-state imaging apparatus <NUM> according to a modified example of the second embodiment is different from that according to the second embodiment in that two or more types of dummy pads having a different number of vias are arranged.

<FIG> are each plan views showing an example of the dummy area <NUM>, <NUM>, and <NUM>, respectively, in a modified example of the second embodiment of the present disclosure. <FIG> is a plan view showing an example of the dummy area <NUM>. <FIG> is a plan view showing an example of the dummy area <NUM>. <FIG> is a plan view showing an example of the dummy area <NUM>.

The number of vias per dummy pad is adjusted so that the amount of hydrogen to be supplied is uniform. For example, as illustrated in <FIG>, the dummy pads <NUM> and <NUM> are arranged in the dummy area <NUM>. The number of vias to be connected to the dummy pad <NUM> is, for example, four, and the number of vias to be connected to the dummy pad <NUM> is a number (e.g., one) different from the number of vias to be connected to the dummy pad <NUM>.

As illustrated in <FIG>, dummy pads <NUM> and <NUM> are arranged in the dummy area <NUM>. The number of vias to be connected to the dummy pad <NUM> is, for example, one, and the number of vias to be connected to the dummy pad <NUM> is a number (e.g., two) different from the number of vias to be connected to the dummy pad <NUM>.

As illustrated in <FIG>, dummy pads <NUM> and <NUM> are arranged in the dummy area <NUM>. A via is not connected to the dummy pad <NUM>, and the number of vias of the dummy pad <NUM> is, for example, one.

As described above, in accordance with the modified example of the second embodiment of the present disclosure, since a plurality of types of dummy pads to which a different number of vias is connected are arranged, it is possible to make the amount of hydrogen to be supplied uniform by adjusting the number of vias.

The cross-sectional area of the via <NUM> of the electrode pad <NUM> and the cross-sectional area of the via <NUM> of the dummy pad <NUM> have been the same in the above-mentioned first embodiment. In this configuration, the amount of hydrogen of the via to be supplied is non-uniform in some cases. The solid-state imaging apparatus <NUM> according to a third embodiment is different from that according to the first embodiment in that the cross-sectional area of the via <NUM> of the electrode pad <NUM> and the cross-sectional area of the via <NUM> of the dummy pad <NUM> differ.

<FIG> is a plan view showing an example of the VSL bonding area <NUM> and the dummy area <NUM> in the third embodiment of the present disclosure.

<FIG> is an example of a cross-sectional view of the solid-state imaging apparatus <NUM> according to the third embodiment of the present disclosure.

As illustrated in <FIG> and <FIG>, the cross-sectional area of the via <NUM> of the electrode pad <NUM> and the cross-sectional area of the via <NUM> of the dummy pad <NUM> differ. For example, the cross-sectional area of the via <NUM> is larger than that of the via <NUM>. Further, the number of vias of the electrode pad <NUM> is four, and the number of vias of the dummy pad <NUM> is one. The number and cross-sectional area of each of the vias <NUM> and <NUM> are adjusted so that the amount of hydrogen to be supplied is uniform.

As described above, in accordance with the third embodiment of the present disclosure, since the cross-sectional area of the via <NUM> of the electrode pad <NUM> and the cross-sectional area of the via <NUM> of the dummy pad <NUM> differ, it is possible to make the amount of hydrogen to be supplied uniform by adjusting the cross-sectional area.

The via having a rectangular cross-sectional shape has been used in the above-mentioned first embodiment. The cross-sectional shape of the via is not limited to a rectangular shape, and may be a circular shape. The solid-state imaging apparatus <NUM> according to a fourth embodiment is different from that according to the first embodiment in that a via having a circular cross-sectional shape is used.

<FIG> is a plan view showing an example of the VSL bonding area <NUM> and the dummy area <NUM> in the fourth embodiment of the present disclosure. The vias <NUM> and <NUM> in the fourth embodiment are different from those in the first embodiment in that the vias <NUM> and <NUM> each have a circular cross-sectional shape. Note that the cross-sectional shape of the via is not limited to a circular shape or a rectangular shape. For example, the cross-sectional shape of the via may be an elliptical shape.

As described above, in accordance with the fourth embodiment of the present disclosure, since the cross-sectional shape of the via is a circular shape, it is possible to make the dark current uniform by supplying hydrogen by way of the circular via.

The dark current of each of the plurality of pixel circuits <NUM> on the light reception side has been made uniform in the above-mentioned first embodiment. The dark current on the plurality of circuits (e.g., ADCs) on the circuit side is non-uniform in some cases. The solid-state imaging apparatus <NUM> according to a fifth embodiment is different from that according to the first embodiment in that the via on the circuit side and the dummy pad are connected to each other to make the dark current on the circuit side uniform.

<FIG> is an example of a cross-sectional view of the solid-state imaging apparatus <NUM> according to the fifth embodiment of the present disclosure. The solid-state imaging apparatus <NUM> according to the fifth embodiment is different from that according to the first embodiment in that the via <NUM> is not connected to the dummy pad <NUM> on the light reception side and the via <NUM> is connected to the dummy pad <NUM> on the circuit side. Assumption is made that the dark current on the light reception side is uniform even in the case where the via <NUM> is not connected to the dummy pad <NUM> on the light reception side.

On the plane opposed to the bonding surface, of both surfaces of the circuit substrate <NUM>, a plurality of circuits such as the subsequent circuits <NUM> and <NUM> are arranged as described above. The via <NUM> connects the subsequent circuit <NUM> and the electrode pad <NUM> to each other, and the via <NUM> connects the subsequent circuit <NUM> and the dummy pad <NUM> to each other. The subsequent circuits <NUM> and <NUM> are each, for example, an ADC. As a result, it is possible to make the amount of hydrogen to be supplied to each of the subsequent circuit <NUM> and <NUM> and the like on the circuit side uniform, and make the amount of dark current on the circuit side uniform.

As described above, in accordance with the fifth embodiment of the present disclosure, since the via <NUM> on the circuit side connects the subsequent circuit <NUM> and the dummy pad <NUM> to each other, it is possible to make the amount of hydrogen to be supplied to each of the plurality of circuits on the circuit side uniform. As a result, the amount of generated dark current becomes uniform, and it is possible to improve the image quality of image data.

The dummy pad on the circuit side has not been connected to the via in the above-mentioned first embodiment. In this configuration, there is a possibility that the amount of supplied hydrogen is insufficient. The solid-state imaging apparatus <NUM> according to a sixth embodiment is different from that according to the first embodiment in that a via is further connected to the dummy pad on the circuit side to increase the amount of hydrogen to be supplied.

<FIG> is an example of a cross-sectional view of the solid-state imaging apparatus <NUM> according to the sixth embodiment of the present disclosure. The solid-state imaging apparatus <NUM> according to the sixth embodiment is different from that according to the first embodiment in that the via <NUM> is connected also to the dummy pad <NUM> on the circuit side. However, the via <NUM> is not connected to the power supply circuit <NUM>, and the dummy pads <NUM> and <NUM> are not used for electrical connection.

As illustrated in <FIG>, by connecting a via not only to the dummy pad <NUM> on the light reception side but also to the dummy pad <NUM> on the circuit side, it is possible to supply also hydrogen in the circuit substrate <NUM> to the pixel circuit <NUM> above the circuit substrate <NUM>. As a result, it is possible to increase the amount of hydrogen to be supplied as compared with the case where a via is connected to only the dummy pad <NUM> on the light reception side.

Note that the dummy pad <NUM> is an example of a dummy pad on a light reception side, and the dummy pad <NUM> is an example of a dummy pad on a circuit side. Further, the via <NUM> is an example of a fourth via.

As described above, in accordance with the sixth embodiment of the present disclosure, since a via is connected also to the dummy pad <NUM> on the circuit side, it is possible to increase the amount of hydrogen to be supplied as compared with the case where a via is connected to only the dummy pad <NUM> on the light reception side.

The via <NUM> has been directly connected to the dummy pad <NUM> in the above-mentioned first embodiment. However, hydrogen can be supplied by was of a hollow path because hydrogen vaporizes. The solid-state imaging apparatus <NUM> according to a seventh embodiment is different from that according to the first embodiment in that hydrogen is supplied by way of a hollow path.

<FIG> is an example of a cross-sectional view of the solid-state imaging apparatus <NUM> according to the seventh embodiment of the present disclosure. The solid-state imaging apparatus <NUM> according to the seventh embodiment is different from that according to the first embodiment in that the via <NUM> and the dummy pad <NUM> are connected to each other by way of a cavity <NUM> that is a hollow path. In other words, the via <NUM> connects the bonding surface and the pixel circuit <NUM> to each other by way of air (medium that carries hydrogen) in the cavity <NUM> and the dummy pad <NUM>. As a result, it is possible to shorten the length of the via <NUM> by the amount corresponding to the cavity <NUM>. Note that the cavity <NUM> can be filled with a filler such as an organic substance as long as the filler is a medium capable of carrying hydrogen.

As described above, in accordance with the seventh embodiment of the present disclosure, since the via <NUM> connects the bonding surface and the pixel circuit <NUM> to each other by way of the cavity <NUM> and the dummy pad <NUM>, it is possible to shorten the length of the via <NUM> by the amount corresponding to the cavity <NUM>.

Pads have been provided on the bonding surface for each of the pixel circuits <NUM> and the pads have been bonded to each other in the above-mentioned first embodiment. However, in the case where the accuracy of the bonding position is sufficiently high, it is unnecessary to provide pads. The solid-state imaging apparatus <NUM> according to an eighth embodiment is different from that according to the first embodiment in that hydrogen is supplied by way of a via that penetrates the bonding surface, which eliminates the necessity to provide pads.

<FIG> is an example of a cross-sectional view of the solid-state imaging apparatus <NUM> according to the eighth embodiment of the present disclosure. In the eighth embodiment, the via <NUM> on the light reception side is connected to the via <NUM> on the circuit side without going through a dummy pad. Note that an end of the via <NUM> is connected to a power source line on the light reception side, but a circuit is not connected to the other of the via <NUM>. This via is not used for electrical connection.

Further, the via <NUM> on the light reception side is connected to the via <NUM> on the circuit side without going through an electrode pad.

Since a via is disposed on each of the dummy area <NUM> and the VSL bonding area <NUM>, it is possible to uniformly supply hydrogen to the plurality of pixel circuits <NUM> by way of the vias.

As described above, in accordance with the eighth embodiment of the present disclosure, since the via on the light reception side and the via on the circuit side are directly connected to each other, it is possible to make the amount of hydrogen to be supplied uniform without using pads.

The dummy pad <NUM> and the via <NUM> have been disposed in the pixel area in which the pixel circuits <NUM> are disposed in the above-mentioned first embodiment. However, they can be disposed in areas other than the pixel area. The solid-state imaging apparatus <NUM> according to a ninth embodiment is different from that according to the first embodiment in that the dummy pad <NUM> and the via <NUM> are disposed also in the area other than the pixel area.

<FIG> is an example of a cross-sectional view of a solid-state imaging apparatus according to a ninth embodiment of the present disclosure. The configuration of the pixel area in the ninth embodiment is similar to that in the first embodiment. As illustrated in <FIG>, the solid-state imaging apparatus <NUM> according to the ninth embodiment is different from that according to the first embodiment in that the dummy pads441 and the via <NUM> are disposed also in an area other than the pixel area.

As described above, in the ninth embodiment of the present disclosure, the dummy pad <NUM> and the via <NUM> are disposed in an area other than the pixel area.

Although the VSL bonding area <NUM> is disposed in the pixel area in which the pixel circuits <NUM> are disposed in the above-mentioned first embodiment, the present disclosure is not limited to this configuration. The solid-state imaging apparatus <NUM> according to the tenth embodiment is different from that according to the first embodiment in that the VSL bonding area <NUM> is disposed in an area outside the pixel area.

<FIG> is a plan view showing an example of the bonding surface of the light reception substrate in the tenth embodiment of the present disclosure. On the bonding surface of the light reception substrate <NUM> according to the tenth embodiment, power source line/drive line bonding areas <NUM> and <NUM>, the VSL bonding areas <NUM> and <NUM>, and the dummy area <NUM> are provided. Further, with the side of the light reception surface as the upper side, the dummy area <NUM> is disposed below the pixel array unit <NUM> (pixel area). The configuration of the bonding surface of the circuit substrate <NUM> is the same as the bonding surface of the light reception substrate <NUM>.

Further, the VSL bonding areas <NUM> and <NUM> are provided outside the pixel area.

As described above, in the tenth embodiment of the present disclosure, the VSL bonding areas <NUM> and <NUM> are disposed outside the pixel area.

AD conversion has been performed for each column in the above-mentioned first embodiment. However, AD conversion can be performed for each area including the plurality of pixel circuits <NUM>. The solid-state imaging apparatus <NUM> according to an eleventh embodiment is different from that according to the first embodiment in that AD conversion is performed for each area.

<FIG> is a diagram showing a configuration of the solid-state imaging apparatus <NUM> according to the eleventh embodiment of the present disclosure. The embodiment of the present disclosure is applicable to a stacked-type imaging apparatus. The stacked-type imaging apparatus has a configuration in which a chip in which a signal processing circuit is formed is used instead of a support substrate for a pixel part and a pixel part is overlaid on the chip. With such a configuration, it is possible to miniaturize the imaging apparatus.

As shown in <FIG>, on a light reception substrate <NUM>, pixels <NUM> are arranged in a matrix and a pixel drive circuit <NUM> for driving the respective pixels <NUM> is disposed. On the lower substrate <NUM>, ADCs (A/D Converters) <NUM> are arranged in matrix at positions corresponding to the pixels <NUM>. In the example shown in <FIG>, a configuration in which <NUM>×<NUM>=<NUM> pixels are used as one block (area) and one ADC <NUM> processes four pixels <NUM> corresponding to one block is shown. In such a configuration, the ADCs <NUM> are operated in parallel, and each ADC <NUM> performs AD conversion while scanning four pixels.

On the circuit substrate <NUM>, also an output circuit <NUM>, a sense amplifier <NUM>, a V scanning circuit <NUM>, a timing generation circuit <NUM>, and a DAC (D/A Converter) are mounted. The output from the ADC <NUM> is output to the outside by way of the sense amplifier <NUM> and the output circuit <NUM>. Processing related to reading from the pixel <NUM> is executed by the pixel drive circuit <NUM> and the V scanning circuit <NUM>, and controlled at the timing generated by the timing generation circuit <NUM>. Further, the DAC <NUM> is a circuit that generates a ramp signal.

The ramp signal is a signal to be supplied to a comparator of the ADC <NUM>. The internal configuration of the ADC <NUM> will be described with reference to <FIG> is a block diagram showing a configuration of the pixels <NUM> corresponding to one block (area) and the ADC31. The signal from each of the pixels <NUM> corresponding to the one block including <NUM>×<NUM> = <NUM> pixels is compared with the ramp voltage of the ramp signal by a comparator <NUM> of the ADC <NUM>.

The ramp voltage is a voltage that gradually decreases from a predetermined voltage. When the ramp voltage starts dropping and the signal from the pixel <NUM> crosses (when the voltage of the signal from the pixel <NUM> and the ramp voltage become the same voltage), the output of the comparator <NUM> is inverted. The output of the comparator <NUM> is input to a latch circuit <NUM>. A code value indicating the time at that time is input to the latch circuit <NUM>, and a code value when the output of the comparator <NUM> is inverted is held in the latch circuit <NUM> and then read from the latch circuit <NUM>.

<FIG> is a plan view showing an example of the bonding surface of the light reception substrate in the eleventh embodiment of the present disclosure. On the bonding surface, the same number of pads as the number of pixels is arranged for each block (area). In the case where <NUM>×<NUM> pixels are used as one area, four pads are arranged. One of the four pads is the electrode pad <NUM> and the other three are the dummy pads <NUM>.

<FIG> shows a circuit diagram of an imaging apparatus including the ADC <NUM>. In <FIG>, the circuits included in the light reception substrate <NUM> and the circuit substrate <NUM> shown in <FIG> are illustrated. The light reception substrate <NUM> includes the pixels <NUM>, and the circuit of the pixels <NUM> has a configuration as shown on the left side of <FIG>. Now, a configuration in which four pixels share one floating diffusion (FD) will be described as an example.

Photodiodes (PD) <NUM>-<NUM> to <NUM>-<NUM> as photoelectric conversion units are respectively connected to transfer transistors (Trf) <NUM>-<NUM> to <NUM>-<NUM>. Hereinafter, in the case where it is not necessary to individually distinguish the photodiodes <NUM>-<NUM> to <NUM>-<NUM>, they will be referred to simply as the photodiode <NUM>. Another part will be referred to similarly.

The transfer transistors <NUM>-<NUM> to <NUM>-<NUM> are connected to a floating diffusion (FD)<NUM>. The transfer transistor <NUM> transfers, to the floating diffusion <NUM> at the timing when a transfer pulse is given, signal charges that are photoelectrically converted by the photodiode <NUM> and accumulated.

The floating diffusion <NUM> functions as a charge-voltage conversion unit that converts signal charges into a voltage signal. A drain electrode and a source electrode of a reset transistor (Rst) <NUM> are respectively connected to the pixel power source of a power supply voltage Vdd and the floating diffusion <NUM>. Prior to the transfer of signal charges from the photodiode <NUM> to the floating diffusion <NUM>, the reset transistor <NUM> applies a reset pulse RST to the gate electrode and resets the voltage of the floating diffusion <NUM> to a reset voltage.

A gate electrode and a drain electrode of an amplification transistor (Amp) <NUM> are respectively connected to the floating diffusion <NUM> and the pixel power source of the power supply voltage Vdd. The amplification transistor <NUM> outputs, as a reset level, the voltage of the floating diffusion <NUM> reset by the reset transistor <NUM>, and outputs, as a signal level, the voltage of the floating diffusion <NUM> after signal charges are transferred by the transfer transistor <NUM>.

The set of the amplification transistor <NUM> and a load MOS <NUM> provided on the lower substrate <NUM> operates as a source follower, and transfers an analog signal representing the voltage of the floating diffusion <NUM> to the comparator <NUM> of the lower substrate <NUM>.

The comparator <NUM> can includes a differential amplifier circuit. The comparator <NUM> includes a differential transistor pair unit including transistors <NUM> and <NUM>, a load transistor pair unit that includes transistors <NUM> and <NUM> serving as output loads of the differential transistor pair unit and is disposed on the power source side, and a current source unit <NUM> that supplies a constant operation current and is disposed on the ground (GND) side.

The sources of the transistors <NUM> and <NUM> are commonly connected to the drain of the transistor of the current source unit <NUM>. To the drains (output terminals) of the transistors <NUM> and <NUM>, the drains of the corresponding transistors <NUM> and <NUM> of the load transistor pair unit are connected.

The output (drain of the transistor <NUM> in the illustrated example) of the differential transistor unit is sufficiently amplified through a buffer <NUM> and then output to the latch circuit <NUM>.

Pixel signals transferred from the pixel <NUM> are supplied to the gate (input terminal) of the transistor <NUM>, and the ramp signal from a DAC <NUM> is supplied to the gate (input terminal) of the transistor <NUM>.

The latch circuit <NUM> includes <NUM> latch columns <NUM>-<NUM> to <NUM>-<NUM>. Codes D0 to D9 (Hereinafter, referred to as the code values D) are respectively input to the latch columns <NUM>-<NUM> to <NUM>-<NUM>. The code values D0 to D9 are code values indicating the time at that time.

Each latch column <NUM> is a dynamic circuit for miniaturization. Further, the output from the comparator <NUM> is input to the gate of a transistor <NUM> that turns on and off each latch column <NUM>. In such a latch circuit <NUM>, the code value when the output of the comparator <NUM> is inverted is held, and then read and output to the sense amplifier <NUM> (<FIG>).

In such a configuration, the pixels <NUM> are arranged on the light reception substrate <NUM> and the circuit is disposed on the circuit substrate <NUM>. The light reception substrate <NUM> and the circuit substrate <NUM> can be bonded to each other by, for example, Cu-Cu bonding. For the Cu-Cu bonding, the technology disclosed in <CIT>filed early by the present applicant can be used.

In the eleventh embodiment of the present disclosure, since AD conversion is performed for each area as described above, it is possible to improve the reading speed of image data as compared with the first embodiment in which AD conversion is performed for each column.

The solid-state imaging apparatus <NUM> has had a two-layer stacked structure in which circuits are disposed on the light reception substrate <NUM> and the circuit substrate <NUM> in the above-mentioned first embodiment. However, the solid-state imaging apparatus <NUM> may have a three-layer stacked structure. The solid-state imaging apparatus <NUM> according to a twelfth embodiment is different from that according to the first embodiment in that the solid-state imaging apparatus <NUM> has a three-layer stacked structure.

<FIG> is an example of a cross-sectional view of the solid-state imaging apparatus <NUM> according to a twelfth embodiment of the present disclosure. In the twelfth embodiment, a memory substrate <NUM> is inserted between the light reception substrate <NUM> and the circuit substrate <NUM>. The dummy pad and the electrode pad are used for Cu-Cu connection between the light reception substrate <NUM> and the memory substrate <NUM>. Further, a memory that holds image data is disposed on the memory substrate <NUM>.

As described above, in the twelfth embodiment of the present disclosure, a three-layer stacked structure is applied.

The solid-state imaging apparatus <NUM> has had a two-layer stacked structure in which circuits are disposed on the light reception substrate <NUM> and the circuit substrate <NUM> in the above-mentioned first embodiment. However, the solid-state imaging apparatus <NUM> may have a three-layer stacked structure. The solid-state imaging apparatus <NUM> according to a thirteenth embodiment is different from that according to the first embodiment in that the solid-state imaging apparatus <NUM> has a three-layer stacked structure.

<FIG> is an example of a cross-sectional view of the solid-state imaging apparatus <NUM> according to the thirteenth embodiment of the present disclosure. In the thirteenth embodiment, a pixel substrate <NUM> is inserted between the light reception substrate <NUM> and the circuit substrate <NUM>. The dummy pad and the electrode pad are used for Cu-Cu connection between the pixel substrate <NUM> and the circuit substrate <NUM>. Further, a photodiode and an optical system above the photodiode, e.g., the photodiode <NUM>, the color filter <NUM>, and the on-chip lens <NUM>, are disposed on the light reception substrate <NUM>. Various transistors other than the photodiode in the pixel circuits <NUM> are disposed on the pixel substrate <NUM>. The photodiode is connected to a transistor or the like by way of a wiring as illustrated in <FIG>.

As described above, in the thirteenth embodiment of the present disclosure, a three-layer structure is applied.

In the above-mentioned first embodiment, only one vertical drive circuit is disposed in the solid-state imaging apparatus <NUM>. However, more vertical drive circuits can be disposed. The solid-state imaging apparatus <NUM> according to a fourteenth embodiment of the present disclosure is different from that according to the first embodiment in that a plurality of vertical drive circuits is disposed.

<FIG> is an example of a perspective view of the solid-state imaging apparatus <NUM> according to the fourteenth embodiment of the present disclosure. In the circuit substrate <NUM> in the fourteenth embodiment, the vertical drive circuits <NUM> to <NUM>, a plurality of AD units <NUM>, and a plurality of memory units <NUM> are disposed. Moreover, the AD units <NUM> and the memory units <NUM> form pairs of circuit components. As illustrated in <FIG>, memory unit <NUM>-a and AD unit <NUM>-a form a circuit component pair. Likewise, an adjacent circuit component pair includes AD unit <NUM>-b and memory unit <NUM>-b. The memory unit <NUM>-a and the AD unit <NUM>-b are transposed in the adjacent circuit component pair (i.e. AD unit <NUM>-b and memory unit <NUM>-b) since the vertical signal lines VSL are required to first connect to the AD unit <NUM> and then to the memory unit <NUM>. The same structure applies to the AD units <NUM> and the memory units <NUM> illustrated in <FIG>, <FIG> and <FIG> which are discussed below. In the fourteenth embodiment, it is possible that other circuit components such as a control circuit or processing circuit (not shown) are disposed in the circuit substrate <NUM>. Further, the surface between the light reception substrate <NUM> and the circuit substrate <NUM> represents a bonding surface. The plan view of the bonding surface is similar to that illustrated in <FIG>.

A predetermined number of ADCs are disposed in the AD units <NUM>. A predetermined number of memories that hold digital signals from the AD units <NUM> are disposed the memory units <NUM>. As the memories, SRAM (Static Random Access Memory) or the like is used.

As illustrated in <FIG>, by disposing the VSL bonding area <NUM> at the center of the solid-state imaging apparatus <NUM>, it is possible to reduce the difference in capacitance between the end and the center and suppress occurrence of shading. Further, it is also possible to suppress fluctuations in device characteristics. Further, by increasing the number of vertical drive circuits to four, it is possible to perform high-speed driving and complicated driving.

<FIG> is a plan view showing another example of the bonding surface of the light reception substrate <NUM> in the fourteenth embodiment of the present disclosure. As illustrated in <FIG>, the VSL bonding areas <NUM> and <NUM> can be disposed at the center and a dummy area <NUM> can be disposed between the VSL bonding areas <NUM> and <NUM>.

<FIG> is a perspective view corresponding to <FIG>.

<FIG> is a plan view showing another example of the bonding surface of the light reception substrate <NUM> in the fourteenth embodiment of the present disclosure. As illustrated in <FIG>, each of the areas in <FIG> can be divided into two. For example, a dummy area <NUM>-<NUM>, a VSL bonding area <NUM>-<NUM>, a dummy area <NUM>-<NUM>, a VSL bonding area <NUM>-<NUM>, and a dummy area <NUM>-<NUM> can be disposed in the stated order between drive line bonding areas <NUM>-<NUM> and <NUM>-<NUM>. Further, a dummy area <NUM>-<NUM>, a VSL bonding area <NUM>-<NUM>, a dummy area <NUM>-<NUM>, a VSL bonding area <NUM>-<NUM>, and a dummy area <NUM>-<NUM> can be disposed in the stated order between drive line bonding areas <NUM>-<NUM> and <NUM>-<NUM>.

<FIG> is another example of a perspective view of the solid-state imaging apparatus according to the fourteenth embodiment of the present disclosure. As illustrated in <FIG>, two vertical drive circuits can also be disposed.

Now, supplementary description will be given of the bonding surface on which the dummy pad in the first embodiment is disposed. <FIG> are respectively an enlarged view showing an example of the vicinity of the bonding surface on which the dummy pad is disposed in an embodiment of the present disclosure and in a Comparative Example. <FIG> is an enlarged view showing an example of the vicinity of the bonding surface in the first embodiment of the present disclosure. <FIG> is an enlarged view showing an example of the vicinity of the bonding surfaces in the Comparative Example. As illustrated in <FIG>, the dummy pad also is formed by breaking through the SiN film <NUM> similarly to the electrode pad. The same applies to the second embodiment and subsequent embodiments.

As described above, in the fourteenth embodiment of the present disclosure, since the vertical drive circuits <NUM> to <NUM> are disposed, it is possible to perform high-speed driving and complicated driving.

In the above-mentioned first embodiment, the electrode pad is disposed in the pixel array unit <NUM>. However, the electrode pad can be disposed in an area other than the pixel array unit <NUM>. The fifteen the embodiment is different from the first embodiment in that an electrode pad is disposed also in an area other than the pixel array unit <NUM>.

<FIG> is an example of a cross-sectional view of the solid-state imaging apparatus <NUM> according to a fifteenth embodiment of the present disclosure. In the solid-state imaging apparatus <NUM> according to the fifteenth embodiment, the electrode pads <NUM> and <NUM> are disposed also in an area other than the pixel array unit <NUM>. For example, a signal line can be drawn out from the pixel array unit <NUM> to an area outside the pixel array unit <NUM> for wiring.

As described above, in the fifteenth embodiment of the present disclosure, an electrode pad is disposed in also an area other than the pixel array unit <NUM>.

In the above-mentioned first embodiment, the solid-state imaging apparatus <NUM> has a two-layer stacked structure in which circuits are disposed in the light reception substrate <NUM> and the circuit substrate <NUM>. However, the solid-state imaging apparatus <NUM> can also have a three-layer stacked structure. The solid-state imaging apparatus <NUM> according to the sixteenth embodiment is different from that according to the first embodiment in that it has a three-layer stacked structure.

<FIG> is an example of a cross-sectional view of the solid-state imaging apparatus according <NUM> to a sixteenth embodiment of the present disclosure. In the sixteenth embodiment, a memory substrate <NUM> is inserted between the light reception substrate <NUM> and the circuit substrate <NUM>. As illustrated in <FIG>, the substrates are connected to each other by Cu-Cu bonding and TSV (Through Silicon Via). For example, the circuit substrate <NUM> and memory substrate <NUM> are bonded to each other by Cu-Cu bonding. The circuit substrate <NUM> and the light reception substrate <NUM> are connected by a TSV <NUM>, and the circuit substrate <NUM> and memory substrate <NUM> are connected by a TSV <NUM>.

<FIG> is another example of a cross-sectional view of the solid-state imaging apparatus <NUM> according to the sixteenth embodiment of the present disclosure. As illustrated in <FIG>, the substrates can be bonded to each other only by Cu-Cu bonding without TSV.

As described above, in the sixteenth embodiment of the present disclosure, a three-layer stacked structure is applied and substrates are bonded to each other by TSV or the like.

The technology according to the present disclosure (the present technology) is applicable to various products. For example, the technology according to the present disclosure may be realized as an apparatus mounted on any type of moving objects such as an automobile, an electric car, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, and a robot.

The vehicle control system <NUM> includes a plurality of electronic control units connected to each other by way of a communication network <NUM>. In the example depicted in <FIG>, the vehicle control system <NUM> includes a driving system control unit <NUM>, a body system control unit <NUM>, an outside-vehicle information detecting unit <NUM>, an in-vehicle information detecting unit <NUM>, and an integrated control unit <NUM>. In addition, a microcomputer <NUM>, a sound/image output section <NUM>, and a vehicle-mounted network interface (I/F) <NUM> are illustrated as a functional configuration of the integrated control unit <NUM>.

The outside-vehicle information detecting unit <NUM> detects information about the outside of the vehicle including the vehicle control system <NUM>. For example, the outside-vehicle information detecting unit <NUM> is connected with an imaging section <NUM>. The outside-vehicle information detecting unit <NUM> makes the imaging section <NUM> image an image of the outside of the vehicle, and receives the imaged image. On the basis of the received image, the outside-vehicle information detecting unit <NUM> may perform processing of detecting an object such as a human, a vehicle, an obstacle, a sign, a character on a road surface, or the like, or processing of detecting a distance thereto.

The imaging section <NUM> is an optical sensor that receives light, and which outputs an electric signal corresponding to a received light amount of the light. The imaging section <NUM> can output the electric signal as an image, or can output the electric signal as information about a measured distance. In addition, the light received by the imaging section <NUM> may be visible light, or may be invisible light such as infrared rays or the like.

In addition, the microcomputer <NUM> can output a control command to the body system control unit <NUM> on the basis of the information about the outside of the vehicle which information is obtained by the outside-vehicle information detecting unit <NUM>. For example, the microcomputer <NUM> can perform cooperative control intended to prevent a glare by controlling the headlamp so as to change from a high beam to a low beam, for example, in accordance with the position of a preceding vehicle or an oncoming vehicle detected by the outside-vehicle information detecting unit <NUM>.

The sound/image output section <NUM> transmits an output signal of at least one of a sound and an image to an output device capable of visually or auditorily notifying information to an occupant of the vehicle or the outside of the vehicle. In the example of <FIG>, an audio speaker <NUM>, a display section <NUM>, and an instrument panel <NUM> are illustrated as the output device. The display section <NUM> may, for example, include at least one of an on-board display and a head-up display.

The imaging sections <NUM>, <NUM>, <NUM>, <NUM>, and <NUM> are, for example, disposed at positions on a front nose, sideview mirrors, a rear bumper, and a back door of the vehicle <NUM> as well as a position on an upper portion of a windshield within the interior of the vehicle. The imaging section <NUM> provided to the front nose and the imaging section <NUM> provided to the upper portion of the windshield within the interior of the vehicle obtain mainly an image of the front of the vehicle <NUM>. The imaging sections <NUM> and <NUM> provided to the sideview mirrors obtain mainly an image of the sides of the vehicle <NUM>. The imaging section <NUM> provided to the rear bumper or the back door obtains mainly an image of the rear of the vehicle <NUM>. The imaging section <NUM> provided to the upper portion of the windshield within the interior of the vehicle is used mainly to detect a preceding vehicle, a pedestrian, an obstacle, a signal, a traffic sign, a lane, or the like.

Incidentally, <FIG> depicts an example of photographing ranges of the imaging sections <NUM> to <NUM>. An imaging range <NUM> represents the imaging range of the imaging section <NUM> provided to the front nose. Imaging ranges <NUM> and <NUM> respectively represent the imaging ranges of the imaging sections <NUM> and <NUM> provided to the sideview mirrors. An imaging range <NUM> represents the imaging range of the imaging section <NUM> provided to the rear bumper or the back door. A bird's-eye image of the vehicle <NUM> as viewed from above is obtained by superimposing image data imaged by the imaging sections <NUM> to <NUM>, for example.

At least one of the imaging sections <NUM> to <NUM> may have a function of obtaining distance information. For example, at least one of the imaging sections <NUM> to <NUM> may be a stereo camera constituted of a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

For example, the microcomputer <NUM> can determine a distance to each three-dimensional object within the imaging ranges <NUM> to <NUM> and a temporal change in the distance (relative speed with respect to the vehicle <NUM>) on the basis of the distance information obtained from the imaging sections <NUM> to <NUM>, and thereby extract, as a preceding vehicle, a nearest three-dimensional object in particular that is present on a traveling path of the vehicle <NUM> and which travels in substantially the same direction as the vehicle <NUM> at a predetermined speed (for example, equal to or more than <NUM>/hour). Further, the microcomputer <NUM> can set a following distance to be maintained in front of a preceding vehicle in advance, and perform automatic brake control (including following stop control), automatic acceleration control (including following start control), or the like. It is thus possible to perform cooperative control intended for automatic driving that makes the vehicle travel autonomously without depending on the operation of the driver or the like.

In a situation in which the collision risk is equal to or higher than a set value and there is thus a possibility of collision, the microcomputer <NUM> outputs a warning to the driver by way of the audio speaker <NUM> or the display section <NUM>, and performs forced deceleration or avoidance steering by way of the driving system control unit <NUM>.

Claim 1:
An image sensor (<NUM>), comprising:
a first substrate (<NUM>) including a plurality of pixels and a plurality of vertical signal lines (VSL) and a plurality of first wiring layers (<NUM>) at one side thereof;
a second substrate (<NUM>) including a plurality of second wiring layers (<NUM>) at one side thereof,
wherein the first and second substrates (<NUM>, <NUM>) are secured together between the pluralities of first and second wiring layers (<NUM>, <NUM>) facing each other;
electrode pads (<NUM>, <NUM>) provided between one of the plurality of first wiring layers (<NUM>) and one of the plurality of second wiring layers (<NUM>);
dummy pads (<NUM>, <NUM>) provided between another of the plurality of first wiring layers (<NUM>) and another of the plurality of second wiring layers (<NUM>);
first vias (<NUM>) connecting the one of the plurality of first wiring layers (<NUM>) and the electrode pad (<NUM>) provided on the first substrate (<NUM>);
second vias (<NUM>) connecting the one of the plurality of second wiring layers (<NUM>) and the electrode pad (<NUM>) provided on the second substrate (<NUM>),
wherein the electrode and dummy pads (<NUM>, <NUM>) provided on the first substrate (<NUM>) and the electrode and dummy pads (<NUM>, <NUM>) provided on the second substrate (<NUM>) are respectively connected to each other;
third vias (<NUM>) connecting the another of the plurality of first wiring layers (<NUM>); and
fourth vias (<NUM>) connecting the another of the plurality of second wiring layers (<NUM>),
wherein at least one of the third vias (<NUM>) and the fourth vias (<NUM>) connect the dummy pads (<NUM>, <NUM>) and at least one of the another of the plurality of first and second wiring layers (<NUM>, <NUM>) together,
wherein the electrode pads (<NUM>, <NUM>) provide for electrical connection between the one of the plurality of first wiring layers (<NUM>) and the one of the plurality of second wiring layers (<NUM>) and the electrode pads (<NUM>, <NUM>) are electrically connected to one of the plurality of vertical signal lines (VSL), and
wherein the dummy pads (<NUM>, <NUM>) do not electrically connect to the plurality of vertical signal line (VSL); characterised in that
the electrode and dummy pads (<NUM>, <NUM>, <NUM>, <NUM>) are formed by breaking through a SiN film (<NUM>, <NUM>) formed on the bonding surface of both substrates (<NUM>, <NUM>).