Patent Description:
As is known in the art, one type of printed circuit board based Radio Frequency (RF) circuit module includes a multilayer printed circuit board having a plurality of cavities aligned one with the other and of increasing size to receive an RF circuit, such as a Monolithic Microwave Integrated Circuit (MMIC) chip. One such arrangement is shown in <FIG> to include a cold plate having a multilayer printed circuit board (PCB). The multilayer printed circuit board (PCB) has a plurality of stacked layers, here four vertically stacked layers (PCB_1-PCB_4)with vertically aligned cavities to receive a MMIC chip, here mounted to a heat spreader and bonded to the cold plate with a suitable conductive epoxy, as shown. It is noted that the cavity in the layer PCB_2 is larger than the cavity in layer PCB_1. It is also noted that the portion of the layer PCB_1 closest to the MMIC a has a lower ground metal bonded to the cold plate with a conductive epoxy and an upper signal strip conductor, as shown, to form a microstrip transmission line section for coupling RF energy to and from the MMIC by wires connected between contact pads, as indicated while the portion of the portion of the layer PCB_2, having an upper ground metal, together with the underlying portion of PCB_1, provides a stripline transmission line for coupling RF energy to and from the microstrip transmission line section provided by layers PCB_1, PCB_3 and PCB_4 provide structure for enabling DC power to be supplied to the MMIC chip with DC voltage wires between contact pads, as shown. It is noted that the cavities in layer PCB_4 is larger than the cavities in layer PCB_2 and layer PCB_3 to enable the attachment of the DC voltage wires to the DC metal on the upper surface of the layer PCB_3. A top ground metal is provided on the upper surface of layer PCB_4, as shown. These cavities add cost to the module.

For further background, <CIT> describes a stacked module. The stacked module includes a first multilayer substrate including an opening having a stepwise wall face, and a first transmission line including a first grounding conductor layer, a second multilayer substrate supported on a stepped portion of the stepwise wall face and including a second transmission line including a second grounding conductor layer, a first chip mounted on a bottom of the opening and coupled to a third transmission line provided on the first multilayer substrate, and a second chip mounted on the front face of the second multilayer substrate and coupled to the second transmission line. A face to which the second grounding conductor layer or a fourth grounding conductor layer coupled thereto is exposed is joined to the stepped portion to which the first grounding conductor layer or a third grounding conductor layer coupled thereto is exposed, and the first and second grounding conductor layers are coupled.

<CIT> describes an integrated circuit package. The integrated circuit package includes a package substrate, a printed circuit board, an interposer structure and a transmission line bridge interconnect within the interposer. The interposer structure, which includes multiple interposer layers, may be formed on a top surface of the package substrate. The printed circuit board may be coupled to the package substrate through the transmission line bridge interconnect. The transmission line may be formed on at least one of the interposer layers. The transmission line may be utilized to convey signals between the package substrate and the printed circuit board. The transmission line may be a stripline transmission line or a micro-strip transmission line. The transmission line may have a low parasitic inductance and implementation of the transmission line does not introduce large dimensional discontinuity throughout that signal pathway. The integrated circuit package may be part of a circuit system that includes external circuits.

<CIT>, <CIT> and <CIT> disclose various RF circuit modules disposed in cavities.

In accordance with the disclosure, an RF circuit module is provided according to claim <NUM>. Further embodiments of the invention are provided in the dependent claims.

In one embodiment, the circuit board has, in addition to the RF and DC contacts, a conductive layer patterned on the surface to provide portions of microwave transmission lines for coupling RF energy to, and from, the RF component. Portions of the patterned layer closer to the cavity provide strip conductors for microstrip transmission line portions of the microwave transmission lines and other portions of the patterned layer further away from the cavity provide strip conductors for stripline transmission line portions of the microwave transmission lines.

In one embodiment, a ground plane board is provided having a dielectric member and a conductive layer on the bottom surface of the dielectric member, the conductive layer being disposed on portions of a conductive layer on the circuit board. The ground plane board has a cavity exposing the RF and DC contacts of the circuit board and for receiving the plug member. Portions of the conductive layer of the ground plane board disposed over the strip conductors provide an upper ground plane conductor for the stripline transmission lines.

In one embodiment, a shielding layer is provided disposed, and electrically connected to: the conductive ground layer of the ground plane board; and, the portion of electrical conductors disposed on the upper surface of the inner portion of the plug member.

In one embodiment, a component supporting board is provided having a dielectric member and a conductive layer on the bottom of the dielectric member. The electrically conductive layer of the component supporting board is disposed on, and electrically connected to: the conductive layer of the ground plane board; and, the portion of electrical conductors disposed on the upper surface of the inner portion of the plug member.

With such an arrangement, only two cavities are required; a cavity for the RF component and a cavity for RF and DC connections between the RF component and the circuit board. Further, with such arrangement, the x-y surface footprint is reduced by attaching surface amount components above the cavities. This effectively uses the z-dimension to greatly reduce the x-y footprint and therefore the overall cost. This embedded solution has advantages over other embedded options as it permits die level rework, critical in high valued added, complex assemblies. It also enables embedding without sacrificing thermal performance of the prior art (<FIG>). The plug or insert is designed in such a way that dielectric loading is not an issue as it is elevated above the MMIC. Ground fencing is provided to maintain shielding. Further, the structure uses a Ball Grid Array (BGA) on top of the plug for easy connection to the component supporting mating board. The mating board holds all of the Surface Mount components on its topside and has BGA connections on its back side. This is a low cost board with no cavities. Its BGA connections not only connect the DC but also create ground in desired areas. This ground fencing is provided to maintain shielding. Thus, all three parts required for this solution (the RF circuit board, the DC insert and the component supporting mating board) become very low cost components reducing the overall costs.

The details of one or more embodiments of the disclosure are set forth in the accompanying drawings and the description below.

Referring now to <FIG>, <FIG>, and <FIG>, an RF circuit module <NUM> is shown having an electrically and thermally conductive, grounded support <NUM>, here a cold plate; a printed circuit board <NUM> (see also <FIG>) having a lower cavity <NUM> (<FIG> and <FIG>) passing therethrough, shown more clearly in <FIG> and <FIG>, therein exposing a portion 12a (<FIG>) of an upper surface of the support <NUM>. The printed circuit board <NUM> (<FIG>) has a conductive layer <NUM> (<FIG> and <FIG>) on an upper surface of a dielectric 20b of board <NUM>, such conductive layer <NUM> being patterned, as shown more clearly in <FIG>, to provide signal strip conductors 20a and ground plane conductors <NUM>'a on the upper surface of the dielectric 20b. A ground plane conductor 20c , here a copper base, is disposed on the bottom surface of the printed circuit board <NUM>; the bottom surface being bonded to the portion of the surface of the cold plate <NUM> not exposed by the cavity <NUM> with any suitable conductive epoxy, not shown. The portions 21a of the strip conductor 20a adjacent (closest to) the cavity <NUM>, form, with portions of the ground plane conductors <NUM>'a on the upper surface of the dielectric 20b closest to such portions 21a of the strip conductor 20a, coplanar waveguide sections 23a. The next portion 21b of the strip conductors 20a form, with underlying portions of the ground plane conductor 20c, microstrip transmission line sections 23b; it being noted that, as will be described, a third portion 21c of the strip conductors 20a will provide a portion of a stripline transmission line 23c (<FIG> and <FIG>) in a manner to be described. Thus, together, the coplanar waveguide sections 23a, the microstrip transmission line sections 23b and the stripline transmission line 23c provide microwave transmission lines <NUM> for coupling RF energy to and from an RF component <NUM>, shown in <FIG>, here a MMIC chip 28a having a thermal heat spreader 28b under the chip 28a. It is noted that the portions of the strip conductors 20a and ground plane conductors <NUM>'a adjacent to the lower cavity <NUM> also provide RF contact regions <NUM> on an upper surface of the dielectric 20b of the circuit board <NUM>(<FIG>). Also formed on the upper surface of the dielectric 20b of the printed circuit board <NUM> is a plurality of, here for example, four DC contact pads 24a, 24b, 24c and 24d, as shown. Conductive features shown here as ball shaped, conductive contacts 25a-25d are formed on the pads 24a-24d, respectively, as shown.

The RF circuit module <NUM> includes, as noted above, an RF component <NUM>, as shown in <FIG>, here a MMIC chip 28a having a thermal heat spreader 28b under the chip 28a, the RF component <NUM> being disposed in the lower cavity <NUM> (<FIG>, <FIG> and <FIG>) on the exposed portion 12a of the surface of the electrically and thermally conductive support <NUM>. The RF component <NUM>, more particularly the chip 28a has a plurality of RF contact pads 30a-30d, <NUM>'a-<NUM>'d (<FIG>) where contact pads 30a, 30d, <NUM>'a and <NUM>'d are ground pads and contact pads 30b, 30c may be formed as one single, signal contact pad; likewise contact pads <NUM>'b and <NUM>'c may be formed as one single, signal contact pad, on an upper surface of the chip 28a and a plurality of DC contact pads 32a, 32b, 23c and 32d on the upper surface of the chip 28a, as shown in <FIG>, <FIG>, <FIG> and <FIG>.

The RF circuit module <NUM> (<FIG>, <FIG>, <FIG>) includes: a plurality of RF electrical connectors 34a-34d and <NUM>'a-<NUM>'d (<FIG>, <FIG>, <FIG>), here for example conductive wires, bridging the portion of the cavity <NUM> between the circuit board <NUM> and the RF component <NUM>, each one of the plurality of RF electrical connectors 34a-34d and <NUM>'a-<NUM>'d having one end connected to a corresponding one of the RF contact pads 30a-30d, <NUM>'a-<NUM>'d, on the upper surface of the RF component <NUM> and another end of such first plurality of electrical conductors 34a-34d and <NUM>'a-<NUM>'d connected to corresponding ones or pairs of the plurality of RF contact regions <NUM> on the upper surface of the circuit board <NUM>, as shown. A plurality of DC electrical connectors 36a-36d, bridge portion of the cavity <NUM> between the circuit board <NUM> and the RF component <NUM>, each one of the DC electrical connectors 36a-36d having one end connected to a corresponding one of the DC contact pads 32a, 32b, 32c and 32d on the upper surface of the RF component <NUM> and another end of such one of the DC electrical connectors 36a-36d connected to a corresponding one of the DC contact pads 24a-24d on the upper surface of the circuit board <NUM>.

The RF circuit module <NUM> (<FIG>, <FIG> and <FIG>) includes a mating board <NUM> having a dielectric support member <NUM> and an electrical conductor <NUM> on an upper surface of the dielectric support member <NUM>. The bottom surface of the mating board <NUM> is disposed on, and bonded to, the upper surface of the circuit board <NUM>, with any dielectric epoxy, not shown. It is noted that the mating board <NUM> has an upper cavity <NUM> passing through the mating board <NUM> in registration with the lower cavity <NUM>, the upper cavity <NUM> being wider than the lower cavity <NUM>, the upper cavity <NUM> exposing: the entire upper surface of the RF component <NUM> including the RF contacts 30a-30d, <NUM>'a-<NUM>'d of the chip 28a; the DC contact pads 32a-32d of the chip 28a; the RF contact regions <NUM> of the strip conductors 20a on the upper surface of the circuit board <NUM>; the DC contact pads 24a-24d on the upper surface of the circuit board <NUM>; the RF electrical connectors 34a-34d, <NUM>'a-<NUM>'d; and the second electrical connectors 36a-36d.

As described above, and referring also to <FIG>, the portion 21a of the strip conductors 20a adjacent the cavity <NUM> form coplanar waveguide sections 23a. The coplanar waveguide sections 23a are connected to a portion of the strip conductors 21b, which with the portion of the dielectric layer 20b and conductive layer 20c under this portion of the strip conductor 21b form a microstrip transmission line section 23b. The third portion 21c of the strip conductors 20a connected to the microstrip transmission line section 23b provides, with portions of the conductive layer <NUM> over the third portion 21c and the portion of the conductive layer 20c under the third portions 21c, a stripline transmission line 23c. The coplanar waveguide 23a, microstrip transmission line 23b, and stripline transmission lines 23c provide microwave transmission lines for RF signals passing to, and from, the MMIC chip <NUM>. Thus, the electrical conductor <NUM> of the mating board <NUM> provides the upper ground plane conductor of the portion of the conductive layer 20c used to form the stripline transmission line.

The RF circuit module <NUM> includes a plug member, or insert, <NUM>, shown in more detail in <FIG> disposed in the upper cavity <NUM>, as shown in <FIG>, <FIG> and <FIG>. More particularly, and referring to <FIG>, the plug member, or insert, <NUM> is here, has a plurality of, here four, electrical conductors 52a-52d formed thereon, for example by printing or additive manufacturing, as shown. More particularly, the plug member <NUM> has an upper layer 51a for example, a fusion-formed glass, although options may be used and a pair of opposing side members 51b here a printed dielectric, as for example Creative Materials EXP <NUM>-68HV. It could be understood that insert <NUM> may be one integral piece of printed material such as formed by fusion deposition modeling of for example, polyetheretherketone (PEEK). Thus the upper layer 51a of the plug member <NUM> is thinner than the pair of opposing side members 51b. The conductors 52a-52d are formed on the upper surface of the upper layer 51a and wrap around the sides of the side members 51b, as shown, and terminate at electrical contacts 54a-54d , respectively, on the underside of the side members 51b, as shown. It is noted that the conductor 52a is connected to contact 53a and conductors 52b-52c are connected to contact 53b.

Referring again to <FIG>, <FIG>, and <FIG>, after forming the plug member <NUM> (<FIG>), the plug member <NUM> is inserted into the upper cavity <NUM> (<FIG>); it being noted that contacts 54a-54d make contact with DC contacts 24a-24d, more particularly on the electrically conductive features, here for example balls shaped conductive contacts 25a-25d, respectively, as shown. It is noted that the side members 51b elevate the inner region of the plug member <NUM> over the RF module <NUM> and over the wires 34a-34d, <NUM>'a-<NUM>'d and 32a-32d, as shown in <FIG> and <FIG>. After inserting the plug member <NUM> as described, a dielectric gap filling material <NUM>, such as silicone, is injected between the outer edges of the plug member <NUM> and the inner edges of the electrical conductor on mating board <NUM> and sits on a portion 59a of mating board <NUM>; such dielectric gap filling material <NUM> having a coefficient of thermal expansion (CTE) selected to enable expansion and between the plug member <NUM> on the mating board <NUM>. The RF circuit module <NUM> (<FIG>, <FIG> and <FIG>, includes a dielectric component supporting board <NUM> (<FIG>). The supporting board <NUM> includes a dielectric support member <NUM> having a conductive layer <NUM>, patterned as shown in <FIG>, on the bottom surface of the support member <NUM>, as shown in <FIG>, <FIG> and <FIG> and a plurality of electrical components <NUM> disposed on the upper surface of the dielectric component supporting board <NUM>, as shown. It should be understood that these electrical components <NUM> are typically interconnected by patterned conductors, not shown, on the upper surface of the dielectric component supporting board <NUM> using conventional printed circuit techniques. Also formed on the upper surface of the dielectric support member <NUM> is a pair of DC contact pads 67a, 67b which are here connected to two DC voltage sources; VDC_1 and VDC_2 respectively, there coupling VDC_1 to DC contact pad 32a and VDC_2 to DC contact pads 32b, 32c and 32d. As noted above, the conductive layer <NUM> on the bottom of the support layer <NUM> is patterned as shown to have a pair of dielectrically isolated, ball shaped, DC contacts 68a, 68b and a plurality of, here four, ball shaped, electrically ground shielding, or ground fencing, contacts 70a-70d at desired points, as shown. The pair of DC contacts 68a, 68b are electrically connected to contact pads 66a, 66b, respectively as shown through electrically conductive vias 72a, 72b, respectively, passing through the dielectric layer <NUM>, as shown. The balls contacts 68a, 68b of the bottom of the dielectric component supporting board <NUM> are, when assembled (<FIG> and <FIG>), disposed on, and electrically connected to, DC contacts 53a, 53b, respectively as shown in <FIG>, <FIG> and <FIG>.

This design can be further extended to applications where the DC interconnects are too numerous to accommodate direct attachment to the pads 53a, 53b on the top of the DC insert <NUM>. In this case, and referring to <FIG>, a plurality of, here for example, three, conductive traces 80a-80c can be written from the top of the DC insert <NUM>, over the gap filling dielectric material <NUM> and connecting to a corresponding one of a plurality of, here three, BGA pads 82a-82c on layer <NUM> and dielectrically isolated one from another by portions of dielectric <NUM>. More particularly, apertures are formed in the conductive layer <NUM> to expose portions underlying portions of the surface of the dielectric support member <NUM>. The BGA pads 82a-82c are formed on the exposed portions of the dielectric <NUM> and provide additional DC contacts. It is noted that conductive trace 80a is an extension of conductor 52a and thereby connects pad 82a to pad 53a, trace 80b is an extension of conductor 52c and thereby connects pad 82b to pad 53b, and trace 80c is an extension of conductor 52d and thereby connects pad 82c to pad 53b, as shown.

Referring now also to <FIG>, the dielectric component supporting board <NUM> for use with the structure shown in <FIG> and <FIG> is modified to have formed therethrough three additional, electrically isolated, electrically conductive contact pads 88a, 88b and 88c on the top of the dielectric component supporting board <NUM>', such contact pads 88a, 88b and 88c being electrically connected to conductive balls contacts 84a, 84b and 84c, respectively, on the bottom of dielectric component supporting board <NUM>' through electrically conductive vias, not shown, which pass through the dielectric layer <NUM>. It should be understood that the ground plane conductors of the various boards are connected together and to the grounded support <NUM> (<FIG>) by conventional conductive vias, not shown, represented schematically in <FIG> by line GND, as shown.

It is noted that the top of the insert <NUM> has BGA-style pads provided by ball shaped conductive contacts 25a-25d for easy connection to the mating board <NUM>. The mating board <NUM> holds all of the Surface Mount components <NUM> on its topside and has BGA connections <NUM> and <NUM> on its back side. Thus mating board <NUM> is a low cost board with no cavities. Its BGA connections <NUM> and <NUM> here, in this embodiment, create ground shielding, or fencing, connections, as described above, in desired areas.

Claim 1:
A Radio Frequency - RF - circuit module (<NUM>), comprising:
a circuit board (<NUM>) having RF contacts on a surface of the circuit board, the circuit board (<NUM>) having a cavity therein;
an RF component (<NUM>) having RF contacts (30a-30d, <NUM>'a-<NUM>'d) disposed in the cavity of the circuit board (<NUM>);
a plurality of electrical connectors (34a-34d, <NUM>'a-<NUM>'d, 36a-36d) configured to bridge the cavity and connect the RF contacts on the circuit board (<NUM>) to the RF contacts (30a-30d, <NUM>'a-<NUM>'d) on the RF component (<NUM>); and
a plug member (<NUM>), disposed in the cavity, the plug member comprising: a dielectric member with an outer portion (51b) disposed over the RF contacts on the circuit board (<NUM>); an inner portion (51a) elevated above the RF contacts (30a-30d, <NUM>'a-<NUM>'d) on the RF component (<NUM>); and electrical conductors (52a-52c) disposed on an upper surface of the inner portion,
characterized in that:
the circuit board (<NUM>) has DC contacts (24a-24d) on the surface of the circuit board;
the RF component (<NUM>) has DC contacts (32a-32d) disposed in the cavity of the circuit board (<NUM>);
the plurality of electrical connectors is configured to bridge the cavity and connect the DC contacts (24a-24d) on the circuit board (<NUM>) to the DC contacts (32a-32d) on the RF component (<NUM>);
the outer portion of the plug member is disposed over the DC contacts (24a-24d) on the circuit board;
the inner portion (51a) of the plug member (<NUM>) is elevated above the DC contacts (32a-32d) on the RF component (<NUM>), and
the plug member further comprises electrical contacts (54a-54d) disposed under the outer portion on, and electrically connected to, the DC contacts (24a-24d) on the circuit board (<NUM>).