Patent Description:
A combination arc-fault circuit interrupter (CAFI) device provides protection against parallel arcing in a circuit, which occurs when electricity jumps the gap between wires of different voltages. In addition, the CAFI device provides protection against series arcing in the circuit, which occurs when electricity jumps the gap between the strands within the same wire. A dual function (DF) CAFI device adds a ground-fault interrupter (GFI) function, which provides protection against electrical shock from ground-faults, which occur when electrical current passes outside of the circuit wires and through an external object connected to ground. CAFI devices and GFI devices are typically circuit interrupters that are designed to interrupt the electrical current or trip, if an arc-fault or a ground-fault is detected.

Arcing faults are commonly defined as current through ionized gas between two ends of a broken conductor or at a faulty contact or connector, between two conductors supplying a load, or between a conductor and ground. However, arcing fault current levels can be small and may not cause a conventional circuit breaker to trip. Arcing fault current levels may be reduced by branch or load impedance to a level below the trip settings of the circuit breaker. In addition, an arcing fault that does not contact a grounded conductor or person, may not trip a ground-fault interrupter.

In the art of arc-fault detection, it is known to measure high frequency spectral components in the load current signature of an arcing load. If sufficient spectral content is present in certain frequency bands, this can be used to detect the arc-fault with protection software including a signal processing detection algorithm. A difficulty in detecting series arc-faults at a relatively lower amperage, is to correctly measure the amplitude of high frequency components. The amplitude of these high frequency components is reduced at the low arcing current levels of a series arc-fault. This is worsened where inductive loads, such as an electric motor, may be present in series with the arc, since these loads tend to attenuate the amplitude of the high frequency signature. An additional problem may be presented by the presence of electronic equipment that provides capacitive filtering of the power line, effectively shorting out part of the high frequency signal.

Modern DF/CAFI devices include components such as a microprocessor, memories, filters, analog-to-digital converters, and other supporting components. The microprocessor analyzes the current, ground-fault and rise time (di/dt) signals. By means of an arc-fault detection algorithm in the protection software, the microprocessor makes a trip decision, using the presence of broadband noise and the current peaks and current rise time (di/dt). One such arc-fault detection algorithm is described in <CIT>.

As new protection software becomes available for better arc-fault detection, it becomes impossible to update existing DF/CAFI devices in the field. With existing hardware and protection software, the updating of the protection software is not possible unless the device is opened and the microprocessor's debug port is used or if additional pins are wired through the device's housing. If the protection software is inadequate and allows nuisance tripping from new loads coming to market, changing the protection software requires changing the whole device.

<CIT> discloses an adaptive arc fault detection trip decision buffer. <CIT> discloses enhanced circuit breakers.

What is needed is a way to rapidly and conveniently install updated arc-fault detection protection software in a DF/CAFI device without requiring any hardware changes to the device.

In accordance with an example embodiment of the invention, a current interrupting device is operated in a maintenance mode to update its arc-fault detection protection software, by downloading updated protection software over the power line for which it serves as a current interrupter. Information signals are received on the power line, representing the updated arc-fault detection protection software. The information signals are sensed on the power line by a current sensor coupled to a sensor input terminal of the device. In accordance with an example embodiment of the invention, a processor executing maintenance software in the current interrupting device loads the updated arc-fault detection protection software into a memory of the device. The arc-fault detection protection software is updated without requiring any hardware changes to the device. Later, when the current interrupting device is operating in a protection mode, it will interrupt current in the power line in response to an arc-fault identified by the updated arc-fault detection protection software executed by the processor. Examples of the current interrupting device include an arc-fault circuit interrupter (AFCI), a combination arc-fault circuit interrupter (CAFI) device (series arc-fault and parallel arc-fault interrupter), a dual function/combination arc-fault circuit interrupter (DF/CAFI) device, and a ground-fault circuit interrupter (GFCI).

More particularly, an example embodiment of the invention performs updating of arc-fault detection protection software in a dual function/combination arc-fault circuit interrupter (DF/CAFI) device, without requiring any hardware changes to the device. Maintenance software running in a processor in the DF/CAFI device, synchronizes downloading the updated arc-fault detection protection software as packets of modulated data from a host device, downloaded over the power line connected to breaker contacts of the DF/CAFI device. The modulated data on the power line is sensed by the current sensor of the DF/CAFI device, and is filtered, demodulated, and sampled by the device. The maintenance software in the DF/CAFI device then assembles packets of the demodulated and sampled data and loads them into the memory in the DF/CAFI device as the updated arc-fault detection protection software.

The resulting invention installs the updated arc-fault detection protection software in a current interrupting device without requiring any hardware changes to the device.

Example embodiments of the invention are depicted in the accompanying drawings that are briefly described as follows:.

<FIG> is an example functional block diagram of the existing hardware of a current interrupting device, in particular a dual function/combination arc-fault circuit interrupter (DF/CAFI) device <NUM>. The existing hardware of the device <NUM> includes a current sensor, in particular a current transformer <NUM> having the electric power line or branch line <NUM> serving as its primary. The secondary coil of the current transformer <NUM> is connected to a sensor input terminal <NUM> of the DF/CAFI device, in particular to the inputs of three fast recharge accumulator blocks (FRABs) <NUM>, <NUM>, and <NUM>. FRAB <NUM> includes a low frequency band pass filter, FRAB <NUM> includes a medium frequency band pass filter, and FRAB <NUM> includes a high frequency band pass filter. The low, medium, and high frequency components of the current or the information signals sensed by the current transformer <NUM>, are input by the FRABs <NUM>, <NUM>, and <NUM> to the controller <NUM>. The controller <NUM> includes a multiplexor (MUX) <NUM>, a direct memory access (DMA) <NUM>, an analog-to-digital converter (ADC) <NUM>, a general purpose I/O (GPIO) <NUM>, a processor or microprocessor CPU <NUM>, and an associated memory that includes a RAM <NUM>, and a flash memory <NUM>.

In a protection mode, the FRABs <NUM>, <NUM>, and <NUM> are used for detection of High Frequency content in the power line during an arc-fault event and are used to trigger counting potential arc-fault events. In accordance with the invention, in a maintenance mode, the FRABs are used to represent modulated pulses at their carrier frequencies as high or low peaks, which are converted to binary <NUM> and <NUM> by the CPU <NUM>.

With the DF/CAFI device <NUM> operating in protection mode, the breaker contacts <NUM> are closed and power from the main power lines <NUM> and <NUM> is applied by the branch or power lines <NUM>, <NUM> to the load <NUM>. The device <NUM> has an existing version of arc-fault detection protection software stored in the flash memory <NUM>, which is executed by the processor or microprocessor CPU <NUM>, to monitor for arc-faults and ground-faults. In protection mode, the microprocessor CPU <NUM> analyzes the low, medium, and high frequency components of the current sensed by the current transformer <NUM>. By means of an arc-fault detection algorithm in the existing version of the protection software, the microprocessor CPU <NUM> may make a trip decision, using the presence of broadband noise and the current peaks and current rise time (di/dt). If a trip decision is made, a trip signal <NUM> is sent by the controller <NUM> to the breaker contacts <NUM> to disconnect from the main power lines <NUM> and <NUM> and interrupt the current to the load <NUM>.

In accordance with an example embodiment of the invention, to update the existing arc-fault detection protection software stored in the flash memory <NUM>, the DF/CAFI device <NUM> may be switched to the maintenance mode by activating a sequence of push-to-test (PTT) <NUM> and ON/OFF <NUM> switches, as would be commonly understood by those of skill in the art. During the updating process, the breaker contacts <NUM> are open. An example host device <NUM> shown in more detail in <FIG>, may be configured to provide updated arc-fault detection protection software as packets of modulated data over the power line <NUM> to the DF/CAFI device <NUM>.

<FIG> is an example functional block diagram illustrating an example use case, of the DF/CAFI device <NUM> of <FIG>, as a miniature circuit breaker in a panelboard <NUM>. An example host device <NUM> has current transformers <NUM> and <NUM>, such as split-core current transformers, clipped onto the respective branch circuit power line <NUM> and the neutral line <NUM> to the circuit breaker, to provide the updated protection software to the circuit breaker <NUM>.

The example host device <NUM> may include a power line interface <NUM> and a host computer <NUM>. The example host computer <NUM> may be either an integrated microcontroller or a separate computing device, such as a personal computer or smart phone connected by means of a USB port or other connection to the power line interface <NUM>. In either case, the example host computer <NUM> may include a processor and associated memory <NUM> that stores the updated arc-fault detection protection software <NUM> to be provided to the circuit breaker <NUM>. The example host device <NUM> may include a user interface <NUM>, such as graphical user interface (GUI), a memory chip interface (e.g., a thumb drive), or a WiFi internet interface, to receive from the user or a server over the internet, the updated arc-fault detection protection software <NUM>. The size of the updated arc-fault detection protection software <NUM> may range from <NUM> bytes to over <NUM> Megabytes, depending on the complexity of the arc-fault protection algorithm in the software <NUM>.

The example powerline interface <NUM> may include one or more signal generators <NUM>, <NUM>, and <NUM> to provide one or more carrier signals <NUM>, <NUM>, and <NUM>, for example a low frequency carrier <NUM> at <NUM>, a medium frequency carrier <NUM> at <NUM>, and a high frequency carrier <NUM> at <NUM>. The example host computer <NUM> may output the updated arc-fault detection protection software <NUM> from its memory, as one or more component units of data, such as one or more serial strings of four bytes (<NUM> bits) each. The component units of data are referred herein to as "original FRAB data", each of which modulates a respective one or more of the carrier signals <NUM>, <NUM>, and <NUM> by means of respective operational amplifiers <NUM>, <NUM>, and <NUM>. Original FRAB_L data <NUM> output by the host computer <NUM>, modulates the low frequency carrier <NUM> at <NUM> to produce L_modulated FRAB_L data that drives a first one of the current transformers <NUM>. Original FRAB_M data <NUM> output by the host computer <NUM>, modulates the medium frequency carrier <NUM> at <NUM> to produce M_modulated FRAB_M data that drives a second one of the current transformers <NUM>. Original FRAB_H data <NUM> output by the host computer <NUM>, modulates the high frequency carrier <NUM> at <NUM> to produce H_modulated FRAB_H data that drives a third one of the current transformers <NUM>. The updated arc-fault detection protection software <NUM> is transmitted on the power line <NUM> as packets of the L_modulated FRAB_L data, M_modulated FRAB_M data, and H_modulated FRAB_H data, which are sensed by the current transformer <NUM> of the circuit breaker <NUM> and bandpass filtered by the FRABs <NUM>, <NUM>, or <NUM>. An example modulation scheme for the data is pulse amplitude modulation (PAM). However, other possible modulation schemes may be used, depending on the bandwidth and channel isolation between each FRAB <NUM>, <NUM>, or <NUM>.

Returning to <FIG>, the DF/CAFI device <NUM> also includes a ground-fault detecting current transformer <NUM> having both power line <NUM> and neutral line <NUM> serving as its primary and having its secondary coil connected to the terminal of a GFI detector and PING synchronizing signal source <NUM> in the controller <NUM>. With the device <NUM> operating in protection mode, the ground-fault detecting current transformer <NUM> senses when the currents in the power lines <NUM> and <NUM> are not the same magnitude, and outputs a signal to the GFI detector <NUM>, resulting in a trip signal being sent over line <NUM> to the breaker contacts <NUM>. In the software maintenance mode, the GFI detector and PING synchronizing signal source <NUM> is used for feedback acknowledgement (ACK) signaling to the host <NUM>. The PING synchronizing signal <NUM> is generated utilizing a resonance of the current transformer <NUM> to issue a fast rise time current (di/dt), similar to a sharp pulse, on the secondary of the current transformer <NUM>, causing it to start resonating. The host <NUM> may detect the impedance changes on the neutral wire <NUM> due to the resonance of the current transformer <NUM>, resulting in a feedback signal <NUM> to the host <NUM>. The feedback signal <NUM> is used to synchronize downloading from the host device <NUM>, over the power line <NUM> to the DF/CAFI device, the updated arc-fault detection protection software <NUM> as packets of the L_modulated FRAB_L data, M_modulated FRAB_M data, and H_modulated FRAB_H data. Additional details of the how the PING synchronizing signal <NUM> may be generated, are described in <CIT>.

<FIG> is an example network diagram illustrating transmission of packets <NUM> from the example host device <NUM> to the DF/CAFI device <NUM> shown in <FIG> and <FIG>. The packets <NUM> are carrier signals modulated by data representing component units (the original FRAB data <NUM>, <NUM>, <NUM>) of the updated arc-fault detection protection software <NUM>. To maximize data rates for transferring the updated arc-fault detection protection software <NUM> from the host device <NUM> to the DF/CAFI device <NUM>, the example host computer <NUM> may simultaneously output the original FRAB_L data <NUM>, original FRAB_M data <NUM>, and original FRAB_H data <NUM>. This results in the packets <NUM> transmitted on the power line <NUM> having overlapped, modulated carrier signals for the L_modulated FRAB_L data, M_modulated FRAB_M data, and H_modulated FRAB_H data. When the overlapped, modulated carrier signals arrive at the DF/CAFI device <NUM>, they are separated by their carrier frequencies via the respective bandpass filters of the FRABs <NUM>, <NUM>, or <NUM> and separately demodulated. FRAB <NUM> outputs filtered and demodulated FRAB_L output data <NUM>. FRAB <NUM> outputs filtered and demodulated FRAB_M output data <NUM>. And FRAB <NUM> outputs filtered and demodulated FRAB_H output data <NUM>. The FRAB outputs <NUM>, <NUM>, and <NUM> are filtered and demodulated data representing the component units (the original FRAB data <NUM>, <NUM>, <NUM>) of the updated arc-fault detection protection software.

<FIG> is an example timing diagram illustrating the use of the power line frequency by the DF/CAFI device <NUM> of <FIG>, to establish a time base for synchronizing the receipt of the packets <NUM> of carrier signals modulated by the updated protection software, from the host device <NUM>. The power line <NUM> may have an example frequency of <NUM>, which has two zero-crossings (ZX) per cycle, establishing a <NUM> time base. The interval between two consecutive zero-crossings (ZX) is referred to as a FRAB half-cycle. This time base is used for the operation of transferring the packets <NUM> of the updated arc-fault detection protection software <NUM> from the host device <NUM> to the DF/CAFI device <NUM>.

The top waveform in the diagram represents the <NUM> zero-crossing (ZX) of the <NUM> line <NUM>. The bottom waveform in the diagram represents the PING synchronizing signal <NUM> generated by the GFI detector and PING synchronizing signal source <NUM> in the DF/CAFI device <NUM>. After the user activates a sequence of push-to-test (PTT) <NUM> and ON/OFF <NUM> switches, the breaker contacts <NUM> remain open. The DF/CAFI device <NUM> starts by issuing a PING signal <NUM> to the host device <NUM>. The DF/CAFI device <NUM> waits for the next zero-crossing (ZX) and then enables its timer for acquisition of the packets <NUM> of carrier signals modulated by the updated protection software, on the low frequency FRAB_L <NUM>, medium frequency FRAB_M <NUM>, and high frequency FRAB_H <NUM> channels. The DF/CAFI device <NUM> waits for the next zero-crossing (ZX) and continues to receive the packets <NUM>, as shown in the middle waveform in the diagram. If the received packets fail a validity check, the DF/CAFI device <NUM> issues two PING signals <NUM> as a negative acknowledgement (NACK) and waits for the next zero-crossing (ZX) for a retransmission of the failed packet from the host <NUM>. When the last packet <NUM> is received, the transfer process stops.

Examples of the current interrupting device <NUM> may include an arc-fault circuit interrupter (AFI), a combination arc-fault circuit interrupter (CAFI) device (series arc-fault and parallel arc-fault interrupter), a dual function/combination arc-fault circuit interrupter (DF/CAFI) device, and a ground-fault circuit interrupter (GFCI) all in circuit breaker, and especially miniature circuit breaker, form.

<FIG> is an example functional block diagram of a receiving channel <NUM> of the DF/CAFI device <NUM> of <FIG>, showing the existing hardware of the sensor or current transformer <NUM>, the analog front end (AFE) <NUM>, and the analog-to-digital converter (ADC) <NUM>. Also shown is the new maintenance software <NUM> downloading the updated protection software <NUM> via the receiving channel <NUM>. The receiving channel <NUM> senses the modulated data packets <NUM> on the power line <NUM> by the current transformer <NUM>. The modulated data packets <NUM> are information signals received on the power line during the maintenance mode. The packets <NUM> are carrier signals modulated by data representing component units (the original FRAB data <NUM>, <NUM>, and <NUM>) of the updated arc-fault detection protection software <NUM>. The modulated data packets <NUM> are filtered and demodulated by the FRABS <NUM>, <NUM>, and <NUM>, which output filtered and demodulated FRAB output data <NUM>, <NUM>, and <NUM> representing the component units (the original FRAB data <NUM>, <NUM>, and <NUM>) of the updated arc-fault detection protection software <NUM>.

In accordance with example embodiments of the invention, the new maintenance software <NUM> interprets the modulated data packets <NUM> as high or low peaks, which are sampled by the ADC <NUM> and converted to binary <NUM> and <NUM> values by the CPU <NUM>. Each channel of the filtered and demodulated FRAB output data <NUM>, <NUM>, and <NUM> is sampled by the ADC <NUM>. The sampled values are digitized by the CPU <NUM> to reproduce the component units (the original FRAB data <NUM>, <NUM>, and <NUM>) of the updated arc-fault detection protection software <NUM>, from the received information signals or packets <NUM>. This is done by the CPU <NUM> comparing with a threshold <NUM> to detect voltage levels for binary values (<NUM>,<NUM>). The binary values are packetized or assembled <NUM> in the RAM <NUM> as the reproduced component units (i.e., reproduced or recovered versions of the original FRAB data <NUM>, <NUM>, and <NUM>). The reproduced component units are validated, for example, with an error checking and correction (ECC) block <NUM> to form "validated data". The validated, reproduced component units are then loaded into the Non-Volatile (Flash) memory <NUM>, as the updated arc-fault detection protection software.

<FIG> is an example functional block diagram of the existing hardware in the receiving channel <NUM> of <FIG>, providing a more detailed view of the analog front end (AFE) <NUM>. The current sensor <NUM> is coupled to a sensor input terminal <NUM> of the current interrupting device <NUM>, configured to sense information signals or packets <NUM> provided on the power line <NUM>. The information signals or packets <NUM> are carrier signals modulated by data representing component units (the original FRAB data <NUM>, <NUM>, <NUM>) of the updated arc-fault detection protection software <NUM>.

The analog front end (AFE) <NUM> comprises three channels, each channel being a Fast Recharge Accumulator Block (FRAB) <NUM>, <NUM>, or <NUM>. Each FRAB includes a respective band pass filter <NUM>, <NUM>, or <NUM>, a respective diode <NUM>, <NUM>, or <NUM> that works similar to an amplitude demodulator, and a respective passive low pass filter <NUM>, <NUM>, or <NUM> that is connected to the analog-to-digital converter (ADC) <NUM>. Each FRAB is configured to pass a respective frequency carrier signal modulated by the updated arc-fault detection protection software, which has been sensed on the power line <NUM> by the current sensor <NUM>. The output of each band pass filter <NUM>, <NUM>, or <NUM> is referred to as filtered information signals. For example, in the low frequency FRAB_L <NUM>, the filtered information signals output from the band pass filter <NUM> (active filter with some gain) go through the diode <NUM> and then through the passive low pass filter (RC) <NUM>, which is connected to the ADC <NUM>. The low frequency FRAB_L <NUM> outputs filtered and demodulated FRAB_L output data <NUM> to the ADC <NUM>, representing the component units (the original FRAB_L data <NUM>) of the updated arc-fault detection protection software. In the medium frequency FRAB_M <NUM>, the filtered information signals output from the band pass filter <NUM> go through the diode <NUM> and then through the passive low pass filter (RC) <NUM>, which is connected to the ADC <NUM>. FRAB_M <NUM> outputs filtered and demodulated FRAB_M output data <NUM> to the ADC <NUM>. In the high frequency FRAB_H <NUM>, the filtered information signals output from the band pass filter <NUM> go through the diode <NUM> and then through the passive low pass filter (RC) <NUM>, which is connected to the ADC <NUM>. FRAB_H <NUM> outputs filtered and demodulated FRAB_H output data <NUM> to the ADC <NUM>.

<FIG> is an example functional block diagram of the passive low pass filter <NUM> in the low frequency FRAB_L <NUM> and the ADC <NUM> in the existing hardware in the receiving channel <NUM> of <FIG>. Example waveform diagrams show progressive stages in reproducing the updated protection software <NUM> received by the DF/CAFI device <NUM> from the host device <NUM>. Example waveform diagrams include filtered and demodulated FRAB_L output data <NUM> that is output by the low frequency FRAB_L <NUM>, data samples <NUM> output by the ADC <NUM>, and digitized binary data <NUM> output by the CPU <NUM> for loading in the RAM memory <NUM> of the DF/CAFI device <NUM>. Similar descriptions apply also to the medium frequency FRAB_M <NUM> and the high frequency FRAB_H <NUM>.

In the software maintenance mode, the low frequency FRAB_L <NUM> output data <NUM> is sampled by the ADC <NUM> at the peak values before the capacitor C1 is discharged, as shown in waveform <NUM> for ADC sampled values. The ADC sampled values are then processed in the CPU <NUM> and a threshold is applied digitally to convert the ADC sampled values to binary representation (<NUM>,<NUM>), as shown in waveform <NUM> for FRAB_L digitized binary output. The waveform <NUM> shows a sequence of binary "<NUM>"s and binary "<NUM>"s, as an example of reproducing or recovering the original FRAB_L data <NUM>. The filtered and demodulated FRAB_L output data <NUM> is sampled by the ADC <NUM> and digitized by the CPU <NUM> to reproduce the component units (the original FRAB_L data <NUM>) of the updated arc-fault detection protection software <NUM> from the received information signal packet <NUM>.

In the low frequency FRAB_L <NUM>, for example, the diode <NUM> will charge the capacitor C1, depending on the RC time constant and on the amplitude of the demodulated signal. If the demodulated signal is very strong (a max amplitude of the carrier signal at the center of the bandpass filter) it will charge the capacitor C1 within the allocated <NUM> time up to Vdd. Otherwise the FRAB output will be low if the carrier is not present. The FRAB serves as a passive integrator for the sampling time between CPU discharges. The RC time constant is set to correspond with the ADC <NUM> sampling time, and then the maintenance software causes the CPU <NUM> to discharge the capacitor C1. After the ADC <NUM> samples the voltage, the microprocessor CPU <NUM> reconfigures its I/O pin <NUM>' and changes it to a digital input with pull down, which discharges the capacitor C1, and then reconfigures the I/O pin <NUM>' back to an analog input to allow the capacitor C1 to charge again. In the protection mode, this serves as a clock to trigger counting blocks, or FRAB count values, to detect the presence of arc-fault noise at a certain frequency, based on the band pass filter <NUM>. To summarize, in the protection mode, the FRABs are used for detection of High Frequency content in the power line during an arc-fault event and are used to trigger counting potential arc-fault events. By contrast, in the maintenance mode, the FRABs are used to represent modulated pulses at their carrier frequencies as high or low peaks, which are converted to binary <NUM> and <NUM> by the CPU <NUM>.

In an alternate embodiment, in the protection mode. the FRAB count values may be correlated between other frequency bands of band pass filters <NUM> and/or <NUM>, to confirm that an arc-fault is present, as distinguished from the noise generated by some kind of load that might generate noise only in a certain frequency range, e.g. radio interference, etc..

In the software maintenance mode, the FRAB output is sampled to detect voltage levels for binary values (<NUM>,<NUM>). In an example alternate embodiment, the FRAB output may be sampled to detect voltage levels for more than two levels, to be used in more compact non-binary symbols.

<FIG> is an example circuit diagram of the GFI detector and PING synchronizing signal source <NUM> in the DF/CAFI device <NUM> of <FIG>. In the protection mode, the GFI detector utilizes a PING circuit that serves as a test circuit to measure the resonant frequency of the ground fault current transformer <NUM>, and also as a grounded neutral (GN) fault detector. In the protection mode, when the CPU <NUM> issues a PING (a sharp pulse) the burden resistor connected in parallel with the ground fault current transformer <NUM> is disconnected, which places the ground fault current transformer <NUM> in a resonating mode.

In maintenance mode, the PING circuit is used for a feedback acknowledgement signal (ACK), to synchronize downloading the updated arc-fault detection protection software as packets of modulated data from a host device <NUM>, over the power line <NUM> to the DF/CAFI device. The PING synchronizing signals notify the host device <NUM> of an acknowledge (ACK) or non-acknowledge (NAK). The host may detect the impedance changes on the neutral wire <NUM> due to the resonance of the ground fault current transformer <NUM>, resulting in a feedback signal to the host <NUM>. In a grounded-neutral sensing mode, the switch Q2 is turned off by the Ping signal, which switches the gate voltage of the switch Q2 from high to low and generates a disturbance on the secondary of the current transformer <NUM> through capacitor C5. With R6 switched out of the circuit, the secondary of the current transformer <NUM> and the capacitor C4 are allowed to resonate with a small amount of damping provided by the high-impedance burden resistor R5. A grounded-neutral condition changes the impedance of the secondary winding of the current transformer <NUM> and dampens the oscillations sharply. The host <NUM> can detect the impedance changes on line <NUM> due to the resonance of the current transformer <NUM>.

<FIG> is an example memory address map diagram showing the ROM/Flash memory address space of the RAM <NUM> and flash memory <NUM> in the DF/CAFI device <NUM>. The memory address space in the flash memory <NUM> is allocated to the bootloader <NUM>, existing protection software <NUM>, maintenance software <NUM>, maintenance flag region <NUM>, and time saver diagnostics (TSD) region <NUM>, part of the human machine interface of a breaker, such as set forth in <CIT>. The memory address space in the RAM <NUM> is allocated to copying the maintenance software <NUM>' in the maintenance mode and loading the new protection software image <NUM>'. The bootloader <NUM> copies the maintenance software <NUM> from the flash memory <NUM> to the RAM <NUM> as the maintenance software image <NUM>' and sets the program counter (PC) to the entry point of the maintenance software image <NUM>' in the RAM. In the example embodiment, the memory address space of the flash memory <NUM> continues with the memory address space of the of the RAM <NUM>. In alternate example embodiments, a separate instruction memory may be provided for the maintenance software <NUM>.

<FIG> is an example flow diagram <NUM> illustrating of example steps of switching between the maintenance mode and the protection mode. Depending on user selection when the DF/CAFI device <NUM> is turned ON (step <NUM>), it can run in either protection mode or in maintenance mode. In protection mode the device continues with normal operation from the flash memory <NUM>, which is the default operational mode. Instead, if a sequence of push-to-test (PTT) <NUM> and ON/OFF <NUM> switches are activated, the breaker contacts <NUM> remain open and the DF/CAFI device <NUM> enters the maintenance mode (step <NUM>). If a maintenance mode timeout occurs (step <NUM>), the maintenance mode flag <NUM> is cleared (step <NUM>) and the breaker contacts <NUM> are tripped open (step <NUM>). The maintenance process step <NUM> is shown in greater detail in <FIG>.

<FIG> is an example flow diagram <NUM>, illustrating example details of step <NUM> in the flow diagram of <FIG>, detailing the operation of the maintenance software in the maintenance mode. The DF/CAFI device <NUM> enters the maintenance mode at step <NUM>. To begin the maintenance mode, a maintenance flag <NUM> is set in flash memory <NUM> and the bootloader <NUM> copies the maintenance software <NUM> from the flash memory <NUM> to the RAM <NUM> as the maintenance software image <NUM>' (step <NUM>) and sets the program counter (PC) to the entry point of the maintenance software image <NUM>' in the RAM (step <NUM>). The CPU <NUM> then begins executing the maintenance software image <NUM>' (step <NUM>) to receive the ADC <NUM> sampled values of the filtered and demodulated FRAB output data <NUM>, <NUM>, and <NUM>. If there is no timeout (step <NUM>), the new image of the updated arc-fault detection protection software is validated (step <NUM>), and if valid (step <NUM>), the new image of the updated arc-fault detection protection software is written into the flash memory <NUM> (step <NUM>). The TSD region <NUM> in the flash memory is cleared (step <NUM>), the maintenance mode flag <NUM> is cleared (step <NUM>) and the process stops (step <NUM>). If the new image of the updated arc-fault detection protection software is determined to not be valid (step <NUM>), then three PING synchronizing signals <NUM> are generated by the GFI detector and PING synchronizing signal source <NUM> to alert the host device <NUM>, the maintenance mode flag <NUM> is cleared (step <NUM>), and the process stops (step <NUM>). The step <NUM> process of receiving data is shown in greater detail in <FIG>.

<FIG> is an example flow diagram <NUM> illustrating example details of step <NUM> in the flow diagram of <FIG>, of receiving from the host device packets of the updated protection software. The DF/CAFI device <NUM> starts (step <NUM>) by issuing (step <NUM>) a PING signal <NUM> to the host device <NUM>. The DF/CAFI device <NUM> waits (step <NUM>) for the next zero-crossing (ZX) of the power line frequency, and then enables its timer for acquisition of the packets <NUM> of carrier signals modulated by the updated protection software, on the low frequency FRAB_L <NUM>, medium frequency FRAB_M <NUM>, and high frequency FRAB_H <NUM> channels. The DF/CAFI device <NUM> processes the acquired data (step <NUM>) and checks data integrity (step <NUM>). If data integrity fails, then two PING synchronizing signals <NUM> are generated by the GFI detector and PING synchronizing signal source <NUM> to alert the host device <NUM> and, the process returns to step <NUM> for the next packet. If there is integrity, and if there are more packets (step <NUM>), the process returns to step <NUM> for the next packet. If this is the last packet (step <NUM>), then the process stops (step <NUM>). The step <NUM> to process the acquired data is shown in greater detail in <FIG> and <FIG>.

<FIG> and <FIG> illustrate example details of a step <NUM> in the flow diagram of <FIG>, of processing the acquired data. The interval between two consecutive zero-crossings (ZX) is referred to as a FRAB half-cycle. There are <NUM> samples for each FRAB per half-cycle. In <FIG>, step <NUM> starts the process and step <NUM> sets the sample count. Step <NUM> determines if <NUM> samples have been processed. Step <NUM> buffers samples in the RAM. Step <NUM> increments the sample count. For each sample, a threshold is applied (step <NUM>) to convert or set (step <NUM>) ADC sample values <NUM> to binary bits (<NUM> and <NUM>) of FRAB digitized binary output <NUM>. The samples from each of the FRABs <NUM>, <NUM>, and <NUM> are packetized to <NUM> bits (<NUM> Bytes)(step <NUM>). A total of <NUM> Bytes per half-cycles can be received. Flowing from <FIG> at <NUM> and <NUM>, a de-scrambler <NUM> may be applied to align received bytes to a known format, depending on the mapping of the bits received from each FRAB. Error checking and correction module (step <NUM>) verifies that the received data is not corrupted. If corrupted data is detected and it cannot be corrected, a Valid FLAG is cleared (step <NUM>) and the data is removed from memory. Otherwise, the Valid FLAG is set (step <NUM>) and the new software image is saved in the RAM (step <NUM>) until the last packet has been received. The process stops at step <NUM>. Table <NUM> illustrates an example of transmitted bits within a half-cycle.

<FIG> is an example symbol diagram of two carrier signals that are modulated together as a symbol by two-dimensional pulse amplitude modulation (2dPAM), which utilizes two FRABs with different frequency levels to increase the information per symbol. The combined frequency levels are represented by a unique symbol, which increases the data rate for transmitting the arc-fault detection protection software to the current interrupting device.

<FIG> is an example symbol diagram of three carrier signals modulated together as a symbol by three-dimensional pulse amplitude modulation (3dPAM), which utilizes three FRABs with different frequency levels to increase the information per symbol. The combined frequency levels are represented by a unique symbol, which increases the data rate for transmitting the arc-fault detection protection software to the current interrupting device.

The resulting invention installs updated arc-fault detection protection software in a current interrupting device, without requiring any hardware changes to the device. Examples of the current interrupting device include an arc-fault circuit interrupter (AFCI), a combination arc-fault circuit interrupter (CAFI) device (series arc-fault and parallel arc-fault interrupter), a dual function/combination arc-fault circuit interrupter (DF/CAFI) device, and a ground-fault circuit interrupter (GFCI).

Claim 1:
A method, comprising:
receiving, by a current interrupting device (<NUM>) operating in a maintenance mode, data packet information signals downloaded over an electric power line (<NUM>) for which the current interrupting device (<NUM>) serves as a current interrupter of the electric power line (<NUM>), the data packet information signals sensed by a current sensor (<NUM>) coupled to a sensor input terminal of the current interrupting device (<NUM>), the data packet information signals representing updated arc-fault detection protection software downloaded over the electric power line (<NUM>) to be executed by a processor (<NUM>) in the current interrupting device (<NUM>) operating in a protection mode, the updated arc-fault detection protection software configured to cause the current interrupting device (<NUM>) to interrupt current in the electric power line (<NUM>) in response to an arc-fault identified by the arc-fault detection protection software when executed by the processor (<NUM>) operating in the protection mode;
loading, by the current interrupting device (<NUM>) operating in the maintenance mode, the updated arc-fault detection protection software downloaded over the electric power line (<NUM>), into a memory in the current interrupting device (<NUM>) associated with the processor (<NUM>); and
replacing, by the current interrupting device (<NUM>) operating in the maintenance mode, the existing arc-fault detection protection software by the updated arc-fault detection protection software downloaded over the electric power line (<NUM>) to cause the current interrupting device (<NUM>) to interrupt current in the electric power line (<NUM>) in the protection mode, without requiring hardware changes to the current interrupting device (<NUM>).