Patent Description:
CSRs are commonly used in a variety of applications, such as in uninterruptible power supplies (UPSs), telecommunication and data centers, electric motors, etc., because of their ability to operate the CSR at unity power factor with sinusoidal AC currents. At the same time, efficiency is a fundamental criterion that is considered during selection of a CSR system. Therefore, reduction of losses is an important factor for successful market adoption of current source conversion technology.

There are two desirable, but competing, parameters associated with CSRs: high efficiency and low current distortion. Reducing switching losses by using some known modulation sequences introduces undesirable side effects in terms of input current distortion. Other known solutions, for example, increasing input filter capacitance or increasing the switching frequency, are not of practical use and may compromise cost/footprint or performance.

<CIT>) discloses a three-phase current source rectifier (CSR) with three AC inputs. The CSR includes a controller, a free-wheeling diode with a cathode connected to a positive line and an anode connected to a negative line, three pairs of switches connected in parallel between the positive line and the negative line, and six pairs of diodes, each pair of the diodes being connected in series. Each two pairs of the diodes may be connected in parallel with each other and in series with a respective pair of switches. Each AC input may be connected to between each of two pairs of the diodes.

According to a first aspect of the invention, there is provided: a current source rectifier (CSR) system for a power source including three phase lines, the (CSR) system comprising: a rectifier operable to receive an alternating-current (AC) input voltage and provide a direct-current (DC) output voltage, the rectifier comprising: a first phase leg comprising first and second series-coupled switches coupled between a positive line and a negative line, wherein first and second diodes correspond with the first and second switches, and wherein a first node coupled to a first phase line of the three phase lines is directly connected between the first switch and a cathode end of the second diode; a second phase leg comprising third and fourth series-coupled switches coupled between the positive line and the negative line, wherein third and fourth diodes correspond with the third and fourth switches, and wherein a second node coupled to a second phase line of the three phase lines is directly connected between the third switch and a cathode end of the fourth diode; and a third phase leg comprising fifth and sixth series-coupled switches coupled between the positive line and the negative line, wherein fifth and sixth diodes correspond with the fifth and sixth switches, and wherein a third node coupled to a third phase line of the three phase lines is directly connected between the fifth switch and a cathode end of the sixth diode; and a controller communicatively coupled to the rectifier and operable to: define a predetermined voltage range in a memory of the controller by hysteresis; control operation of the switches in accordance with a first switching sequence when measured input voltages on at least two phase lines of the three phase lines are outside of the predetermined voltage range; and control operation of the switches in accordance with a second switching sequence when the measured input voltages on the at least two phase lines are within the predetermined voltage range.

<FIG> is a circuit diagram of an exemplary three-phase current source rectifier (CSR) <NUM>. As shown in <FIG>, CSR <NUM> is a buck-type pulse-width-modulated (PWM) rectifier.

CSR <NUM> is coupled to a power source <NUM> that generates three alternating current (AC) input voltages va, vb, and vc relative to a ground connection g. AC input voltages va, vb, and vc are provided to CSR <NUM> via three phase lines A, B, C, respectively. In the exemplary embodiment, power source <NUM> is a three-phase AC voltage source such as a grid or utility. However, in alternative embodiments, power source <NUM> may provide single-phase or multi-phase power to CSR <NUM>.

CSR <NUM> includes an input filter <NUM> coupled to power source <NUM>. Input filter <NUM> includes an input filtering inductor <NUM>i coupled on each phase line A, B, C and an input filter capacitor <NUM> Ci coupled between respective phase lines A, B, C and a mid-point node Ni. Input filter <NUM> is configured to prevent injection of high frequency switching harmonics by CSR <NUM>.

In the exemplary embodiment, CSR <NUM> includes a rectifier <NUM> coupled to an output side of input filter <NUM>. Rectifier <NUM> is operable to receive an alternating current (AC) input voltage and generate a direct current (DC) output voltage. Rectifier <NUM> is an active switching-type CSR and includes six switches <NUM> (T1, T2, T3, T4, T5, T6) and six diodes <NUM> (D1, D2, D3, D4, D5, D6) series-coupled with switches <NUM> T1 - T6, respectively, between a positive line <NUM> and a negative line <NUM>. Switches T1, T4 and diodes D1, D4 form a first phase leg of rectifier <NUM>, which is coupled to phase line A for receiving input voltage va. Switches T3, T6 and diodes D3, D6 form a second phase leg of rectifier <NUM>, which is coupled to phase line B for receiving input voltage vb. Switches T5, T2 and diodes D5, D2 form a third phase leg of rectifier <NUM>, which is coupled to phase line C for receiving input voltage vc. Accordingly, each switch of switches <NUM> T1 - T6 is coupled to an associated phase line of the three phase lines A, B, C. In the exemplary embodiment, switches <NUM> T1 - T6 TO are silicon insulated-gate bipolar transistors (IGBTs). Alternatively, switches <NUM> T1 - T6 may include bipolar junction transistors (BJTs), metal-oxide-semiconductor field effect transistors (MOSFETs), junction field effect transistors (JFETs), Gate turn-off (GTO) thyristors, integrated gate-commutated thyristors (IGCTs) or the like.

A DC link <NUM> is defined on positive line <NUM> and negative line <NUM> between an output of rectifier <NUM> and a load <NUM>, which may be an inverter. In the exemplary embodiment, DC link <NUM> includes a freewheeling diode Df <NUM>, a filter inductor LDC <NUM>, and a DC link capacitor CDC <NUM>. Freewheeling diode Df <NUM> includes a cathode coupled to positive line <NUM> and an anode coupled to negative line <NUM>, and allows current to flow only from negative line <NUM> to positive line <NUM> through freewheeling diode Df <NUM>. The presence of freewheeling diode Df <NUM> is optional, but when present, it operable to reduce conduction losses when regenerative capability is not necessary.

DC link capacitor CDC <NUM> is also coupled to positive line <NUM> and negative line <NUM>, and is configured to filter or smooth the pulsed DC voltage output by rectifier <NUM>. Filter inductor LDC <NUM> is coupled to both positive line <NUM> and negative line <NUM> between freewheeling diode Df <NUM> and DC link capacitor CDC <NUM>. The filtered DC voltage is then provided to load <NUM>.

A controller <NUM> is communicatively coupled to each of switches <NUM> T1 - T6 and is operable to control operation of switches <NUM> T1 - T6 in accordance with switching sequences based on whether measured input voltages on at least two phase lines of the three phase lines A, B, C are inside or outside of a predetermined voltage range. In the exemplary embodiment, the first switching sequence is a high-efficiency switching sequence configured to improve efficiency of CSR system <NUM> when the measured input voltages are outside the predetermined voltage range, and the second switching sequence is a high-quality switching sequence configured to reduce current distortion caused when the measured input voltages are within the predetermined voltage range.

In the exemplary embodiment, controller <NUM> includes one or more processors and associated memory as well as I/O circuits including driver circuitry for generating switching control signals <NUM> S1 - S6 to selectively actuate switches T1 - T6, respectively. Controller <NUM> may be implemented as any suitable hardware, processor-executed software, processor-executed firmware, programmable logic, or combinations thereof, operative as any suitable controller or regulator by which rectifier <NUM> is controlled according to one or more desired switching sequences.

During operation, controller <NUM> provides switching control signals <NUM> S1 - S6 for causing rectifier <NUM> to convert AC electrical input power to provide a regulated DC current IDC to DC link <NUM>. In determining a switching sequence to apply, controller <NUM> may employ one or more feedback signals or values <NUM>, such as phase voltages va, vb, and vc measured by at least one sensor <NUM> coupled across input filter capacitors <NUM> Ci and/or the DC link current IDC and/or DC link voltage. DC-link voltage sensing is typically required for regulation, as it is the controlled output of the converter. Additionally, the DC link current IDC may be used for current-limiting operations (e.g. battery recharge) and protection schemes (e.g. converter shutdown under load side fault). Further, in some embodiments, the DC link current IDC may be used as a feed-forward term in the converter control. Controller <NUM> may also implement other control functions such as power factor correction.

<FIG> is a space vector diagram <NUM> for controlling CSR <NUM> (shown in <FIG>). Space vector modulation (SVM) is a common strategy for driving CSRs. In the exemplary embodiment, space vector diagram <NUM> is provided in a Stationary Reference Frame (SRF) and includes six phase sectors. In each phase sector, a modulation vector is synthesized by combining two adjacent vectors and a zero vector (also referred to as a freewheeling vector).

At any given time, only two switches <NUM> T1 - T6 may conduct: one on the upper half of rectifier <NUM> and the other on the lower half of rectifier <NUM>. Detailed analysis shows that when synthesizing a current vector in a given phase sector, one switch <NUM> (e.g., T1) remains ON, while the two opposite switches <NUM> (e.g., T6 and T2) on the other two legs are commutated. The applied switching sequence affects the performance of CSR <NUM>. It should be noted that while this description focuses solely on switches <NUM> T1, T6, and T2 (associated with vectors [<NUM>] and [<NUM>] in <FIG>), a substantially similar analysis and procedure may be applicable to any and all other switch combinations, and their description will not be repeated herein.

Switching losses within CSR <NUM> may be minimized by selecting an appropriate switching sequence. However, minimal switching loss strategies may exhibit undesirable side effects such as degradation of the input performance (mainly in terms of current distortion).

<FIG> illustrates a high-quality switching sequence <NUM> for controlling CSR <NUM> (shown in <FIG>). Switching sequence <NUM> includes the voltage imposed by the rectifier bridge onto the DC-link (either line-line voltage <NUM> uAC measured between capacitors Ci on phase lines A, C, or line-line voltage <NUM> uBC measured across capacitors Ci on phase lines B, C, depending on switch state), switching state signals <NUM>, <NUM>, <NUM> for each of switches <NUM> TR1, TR6, TR2, respectively, and input currents <NUM>, <NUM>, <NUM> iA, iB, iC,.

In the exemplary embodiment, to apply the high-quality switching sequence <NUM>, controller <NUM> generates symmetric switching pulses for the two commutated switches <NUM> T2 and T6 including a freewheeling state <NUM> following each of the symmetric switching pulses. Free-wheeling states <NUM> occur where both switches <NUM> T2 and T6 are OFF. That is, a freewheeling vector is interposed between the vectors for the active switches <NUM> T6, T2. Each leg is locked for <NUM>° of the phase cycle time, and so each switch <NUM> T1 - T6 is on for <NUM>° of the time. In the illustrated embodiment, switch <NUM> TI is locked ON, while the other two switches <NUM> T2 and T6 are switched and commutated. Additionally, controller <NUM> decouples the two commutated switches <NUM> T2 and T6 during the freewheeling state <NUM> to improve a quality of the input power. Decoupling the two commutated switches <NUM> T2 and T6 during the freewheeling state <NUM> reduces current distortion near intersections of two phases of the input voltage. Further, interposing freewheeling sections <NUM> between pulses enables complete control of the sine wave that is going to be synthesized. This is referred to as a "high-quality" switching sequence because effectively the two switches <NUM> T2 and T6 are operating independently of one other. However, the "high-quality" switching sequence strategy is sub-optimal in terms of efficiency (particularly, in terms of switching losses) because each time a switch <NUM> is turned ON, freewheeling diode Df <NUM> turns ON, introducing switching losses.

<FIG> illustrates a high-efficiency switching sequence <NUM> for controlling CSR <NUM> (shown in <FIG>). Similarly to switching sequence <NUM>, switching sequence <NUM> includes the voltage imposed by the rectifier bridge on to the DC-link (either line-line voltage <NUM> uAC measured between capacitors Ci on phase lines A, C, or line-line voltage <NUM> uBC measured across capacitors Ci on phase lines B, C, depending on switch state), switching state signals <NUM>, <NUM>, <NUM> for each of switches <NUM> T1, T6, T2, respectively, and input currents <NUM>, <NUM>, <NUM> iA, iB, iC.

In the exemplary embodiment, controller <NUM> is configured to lock one switch <NUM> from one of the first, second, and third phase legs A, B, C in an ON position, and commutate one switch <NUM> from each of the two remaining phase legs. For example, in one embodiment, switch <NUM> T1 is locked ON, while the other two switches <NUM> T2 and T6 are switched and commutated.

To apply the high-efficiency switching sequence, controller <NUM> at least partially superimposes input voltages generated by the two commutated switches (i.e., switches <NUM> T2 and T6) as opposed to decoupling them. Controller <NUM> then determines which of the two commutated switches <NUM> T2 and T6 has a lower line-line voltage based on the measured input voltages, and performs all switching actions during the high-efficiency switching sequence based on the determined lower line-line voltage to facilitate operating CSR system <NUM> at a higher efficiency.

To apply high-efficiency switching sequence <NUM>, controller <NUM> evaluates input capacitor voltage across capacitors C<NUM>, C<NUM>, C<NUM>. For the two active switches <NUM> T6 and T2, controller <NUM> determines the one with the highest line-to-line voltage and the one with the lowest line-to-line voltage.

The high-efficiency modulation scheme improves efficiency by ensuring that all switching actions are performed with the minimal switched line-to-line voltage, while exposing freewheeling diode Df <NUM> to a single reverse-recovery event. Because switches <NUM> will be exposed to the lowest possible voltage, losses from freewheeling diode Df <NUM> are reduced and switching losses on the active switches are reduced.

However, high-efficiency switching sequence <NUM> suffers from power quality degradation at the sliding intersection of the input filter capacitor voltages. Due to switching ripple on input filter capacitors <NUM> Ci the voltages across capacitors Ci intersect multiple times over a switching cycle, causing associated distortion on the input current.

<FIG> illustrates an adaptive switching sequence <NUM> for use in controlling CSR <NUM> (shown in <FIG>). CSR <NUM> is initially driven using high-efficiency switching sequence <NUM> (shown in <FIG>). The line-line capacitor voltages across input capacitors Ci are monitored by controller <NUM> (shown in <FIG>). More specifically, controller <NUM> receives the measured input voltages from at least one sensor <NUM> coupled to the three phase lines A, B, C. Controller <NUM> determines whether the measured input voltages fall within a predetermined voltage range and selects which of the high-efficiency and high-quality switching sequences to apply to switches <NUM> T1 - T6 based on the determination.

When the voltages of the two active legs T6 and T2 approach an intersection point <NUM> (signaled by the line-line voltages approaching zero), controller <NUM> changes the switching sequence being applied from high-efficiency switching sequence <NUM> to high-quality switching sequence <NUM> (shown in <FIG>). To enable controller <NUM> to determine when to change the switching sequence, a predetermined voltage range <NUM> is defined in a memory of controller <NUM> using hysteresis. Predetermined voltage range <NUM> ensures correct selection of a switching sequence irrespective of ripple on capacitor voltage and/or line voltage distortion. After crossing intersection point <NUM> and exceeding predetermined voltage range <NUM>, controller <NUM> changes the applied switching sequence back to high-efficiency switching sequence <NUM>.

Because current distortion is only significantly introduced near intersection points of input voltages va, vb, and vc, high-quality switching sequence <NUM> is used when the line-line voltages are within the predetermined voltage range <NUM> range surrounding intersection point <NUM> to mitigate and/or reduce the current distortion. When the line-line voltages are not within the predetermined voltage range <NUM>, high-efficiency switching sequence <NUM> is applied to achieve the highestefficiency operation of CSR <NUM>. By using a combination of high-efficiency and high-quality switching sequences <NUM>, <NUM>, adaptive switching sequence <NUM> facilitates capitalizing on the efficiency benefits from reduced switching losses while mitigating side effects, thereby preserving (or even improving) the high power-factor/low-distortion input characteristics of CSR <NUM>.

<FIG> illustrates an adaptive switching sequence <NUM> for use in controlling CSR <NUM> (shown in <FIG>). CSR <NUM> is initially driven using high-efficiency switching sequence <NUM> (shown in <FIG>). The line-line capacitor voltages across input capacitors Ci are monitored by controller <NUM> (shown in <FIG>). To enable controller <NUM> to determine which switching sequence to apply, a predetermined voltage range <NUM> is defined in a memory of controller <NUM> using hysteresis. Controller <NUM> determines whether the measured input voltages fall within predetermined voltage range and selects which of the switching sequences to apply to switches <NUM> based on the outcome of the determination. Predetermined voltage range <NUM> ensures correct selection of a switching sequence irrespective of ripple on capacitor voltage and/or line voltage distortion. Additionally, controller <NUM> determines which sector of a plurality of predefined sectors (shown in <FIG>) the measured input voltages fall within. The determined sector indicates which of switches <NUM> are commutated during switching sequences <NUM>, <NUM>.

When the voltages of the two active legs T6 and T2 approach an intersection point <NUM> (signaled by the line-line voltages approaching zero), controller <NUM> changes the switching sequence being applied from high-efficiency switching sequence <NUM> to an alternative high-quality switching sequence <NUM>.

In the exemplary embodiment, alternative high-quality switching sequence <NUM> includes switching state signals <NUM>, <NUM>, <NUM> for each of switches <NUM> T1, T6, T2, respectively. Substantially, the pulse signals <NUM>, <NUM> on active legs T6, T2 are not overlapping, in order to avoid the issues related to the voltage sliding intersection.

Switching ripple on the capacitor voltage or distortion on the line voltage causes multiple consecutive sub-phase-sector changes to occur in the SVM analysis. Alternative high-quality switching sequence <NUM> mitigates the losses present near intersection point <NUM> by applying the non-overlapping pulse signals <NUM>, <NUM> while the sub-phase-sector is locked.

After crossing intersection point <NUM> and exceeding predetermined voltage range <NUM>, controller <NUM> changes the applied switching sequence back to high-efficiency switching sequence <NUM>.

In one embodiment, CSR <NUM> may be used as a front-end rectifier in double conversion AC UPS applications. In another embodiment, CSR <NUM> may be used as a rectifying stage of DC UPS.

Claim 1:
A current source rectifier, CSR, system (<NUM>) for a power source including three phase lines (A, B, C), the CSR system comprising:
a rectifier (<NUM>) operable to receive an alternating-current, AC, input voltage and provide a direct-current, DC, output voltage, the rectifier comprising:
a first phase leg comprising first and second series-coupled switches coupled between a positive line (<NUM>) and a negative line (<NUM>), wherein first and second diodes correspond with the first and second switches, and wherein a first node coupled to a first phase line of the three phase lines is directly connected between the first switch and a cathode end of the second diode;
a second phase leg comprising third and fourth series-coupled switches coupled between the positive line and the negative line, wherein third and fourth diodes correspond with the third and fourth switches, and wherein a second node coupled to a second phase line of the three phase lines is directly connected between the third switch and a cathode end of the fourth diode; and
a third phase leg comprising fifth and sixth series-coupled switches coupled between the positive line and the negative line, wherein fifth and sixth diodes correspond with the fifth and sixth switches, and wherein a third node coupled to a third phase line of the three phase lines is directly connected between the fifth switch and a cathode end of the sixth diode; and
a controller (<NUM>) communicatively coupled to the rectifier and operable to:
define a predetermined voltage range in a memory of the controller by hysteresis;
control operation of the switches in accordance with a first switching sequence (<NUM>) when measured input voltages on at least two phase lines of the three phase lines are outside of the predetermined voltage range; and
control operation of the switches in accordance with a second switching sequence (<NUM>) when the measured input voltages on the at least two phase lines are within the predetermined voltage range.