Patent Description:
In various kinds of circuitry, there is a need to generate reference voltages or reference currents. For example, circuitry of earbuds may include one or more digital to analog converters (DAC), and the inputs of the DACs may be provided by one or more circuits which generate reference signals (e.g., reference currents or reference voltages). In this case, the noise of the reference signals may affect the quality of the output audio. In other words, if the noise of the reference noise can be reduced, the quality of the output audio can be improved. Therefore, how to generate low-noise reference signals has always been a goal of the industry.

The <CIT> discloses a circuit including a first transistor having a gate, a source connected with a first node of the circuit, and a drain connected with a second node of the circuit. The circuit also includes a voltage-limiting device connected between the gate and the source of the first transistor, wherein the device, if forward biased, is configured to limit a gate-to-source voltage of the first transistor such that the first transistor operates in a sub-threshold region. The circuit further includes a second transistor configured to bias the voltage-limiting device with a current, wherein a drain of the second transistor is connected with the gate of the first transistor, a gate of the second transistor is connected with the first node, and a source of the second transistor is connected with an electric potential.

The <CIT> discloses a current mirror with selectable filter poles providing a selected low pass filtering function to a DC bias signal generated by the current mirror. Coupled between a first MOSFET and second MOSFET of the current mirror, a low pass filter with selectable filter poles comprises a plurality of resistor-configured MOSFETs coupled to at least one capacitor-configured MOSFET to provide one of a fast settle time and improved filtering for the current. A first resistor- configured MOSFETs, biased by logic and bias circuitry, provides a low frequency filter pole that provides an improved filtering for the current mirror. A second resistor-configured MOSFET provides a high frequency filter pole that provides a fast charge time to meet a settle time requirement.

The <CIT> discloses a large time constant steering circuit for slowly changing a voltage on a node between at least two discrete voltage levels. It further relates to a slow steering current DAC comprising said large time constant steering circuit.

The <CIT> discloses a low-pass filter comprising a filter input terminal (<NUM>); a filter output terminal; a filter FET configured to provide a resistance between the filter input terminal and the filter output terminal; a filter capacitor connected between the filter output terminal and a reference terminal; a bias FET configured to provide a bias voltage to the filter FET; a buffer connected between the filter input terminal and the bias FET, the buffer configured to source a bias current for the bias FET; and an offset voltage source configured to contribute to the bias voltage provided to the filter FET.

The <CIT> discloses a low pass filter circuit having a small output voltage shift caused by a substrate leakage current at high temperature, and a voltage regulator using the low pass filter circuit, which has a small output voltage shift at high temperature. In a low pass filter circuit using a PMOS transistor as a resistive element, a back gate terminal of the PMOS transistor is set to have a higher voltage than a source of the PMOS transistor. Further, in a voltage regulator incorporating the low pass filter circuit to an output of a reference voltage circuit, the voltage of the back gate terminal of the PMOS transistor which is higher than that of the source thereof is generated by the reference voltage circuit.

The problems of the present invention are solved by a circuit according to the independent claim <NUM> and a method according to the independent claim <NUM>. The dependent claims refer to further advantageous developments of the present invention.

Referring to <FIG> shows a block diagram of a circuit for low-noise reference signal generation. The circuit <NUM> includes a filter unit <NUM> and a functional unit <NUM>. The filter unit <NUM> includes a transistor M and an energy storage component E. The transistor M may be a NMOS or a PMOS. The transistor M includes a first node n1, a second node n2, a control node n3 and a body node n4. The first node n1 of the transistor M is configured to couple to a circuit providing an input signal S1. The input signal S1 may be a voltage signal. The second node n2 of the transistor M is coupled to the energy storage component E, for providing a filtered signal S2. The control node n3 of the transistor M is configured to receive a control signal CTL, and the transistor M is controlled by the control signal CTL to turn on/off. The body node n4 of the transistor M is configured to receive a tracking signal S3. The tracking signal S3 may be the input signal S1, the filtered signal S2 or a signal which is similar to the input signal S1 or the filtered signal S2. The functional unit <NUM> may be a circuit having high input impedance, e.g. ><NUM> GΩ, which means that the impedance seen by the filter unit <NUM> is high enough so that the leakage current from the functional circuit <NUM> to the filter unit <NUM> equals to zero or approaches zero. In the embodiment, when the transistor M is turned off by the control signal CTL, the transistor M is equivalent to a resistor having high resistance (e.g., > <NUM> MΩ), and the filter unit <NUM> may act as a RC filter with a resistor having high resistance. Details may be illustrated with referring to a practical example shown in <FIG>.

<FIG> shows a practical example of a circuit for low-noise reference signal generation according to an embodiment of the present invention. In this example, the transistor M is a PMOS, and the energy storage component E can be a MIM (Metal-Insulator-Metal) capacitor, a MOM (Metal-Oxide-Metal) capacitor, a MOS capacitor, a MOS varactor (passive capacitor) or a damping circuit (active capacitor). The filtered signal S2 is coupled to the body node n4 of the transistor M by an operational amplifier as the tracking signal S3. D1 and D2 are junction diodes of the transistor M. The functional unit <NUM> includes a transistor M1 which is a PMOS. The input signal is provided by a circuit C1 which includes an operational amplifier OA1, a number of resistors R1 ~R3 and a number of transistors A1, A2. The output voltage of the operational amplifier OA1 is input to the filter unit <NUM> as the input signal S1. To be mentioned, <FIG> shows a damping circuit which is utilized for implementing the energy storage component E. The damping circuit <NUM> includes an operational amplifier <NUM>, a capacitor <NUM> and a resistor <NUM>. An input node n5 of the operational amplifier <NUM> is configured to couple to the second node n2 of the transistor M. One node of the capacitor <NUM> is coupled to the input node of the operational amplifier <NUM>, and the other node of the capacitor <NUM> is coupled to an output node of the operational amplifier <NUM>. One node of the resistor <NUM> is coupled to the output node of the operational amplifier <NUM>, and the other node n6 of the resistor <NUM> is configured to couple to ground, a supply or a reference voltage. Further, the operational amplifier <NUM> of the damping circuit <NUM> may be implemented in various ways. <FIG> show two circuit examples for implementing the operation amplifier <NUM>. In <FIG>, the operational amplifier of the damping circuit 201c is implemented by a NMOS 201c. In <FIG>, the operational amplifier of the damping circuit 201d is implemented by a PMOS 201d.

In the embodiment shown in <FIG>, the equivalent circuit of the filter unit <NUM> when the transistor M of the filter unit <NUM> is turned off by the control signal CTL is shown in <FIG>. As shown in <FIG>, the transistor M is equivalent to a resistor Roff which has high resistance. That is, the filter circuit <NUM> is configured as a low pass filter. By the filter unit <NUM> being configured as a low pass filter, the 3dB frequency of the spectrum of the noise can be adjusted to be lower than an interested band (e.g., <NUM> - <NUM>). In other words, the energy of the noise within the interested band is reduced. Therefore, it is considered that the input signal S1 is "cleaned" by the filter unit <NUM>, and the filtered signal S2 is generated as a low-noise signal to provide to the functional circuit <NUM>.

To be mentioned, since the filtered signal S2 is coupled to the body node n4 of the transistor M, it is possible to avoid generation of leakage current when the transistor M is turned off.

When the transistor M is turned on by the control signal CTL, the filter unit <NUM> is configured as an all pass filter. The input signal S1 can pass through the transistor M and charge the energy storage component E.

The control signal can be either a digital signal or an analog signal. In an embodiment, as shown in <FIG>, the control signal CTL may be a PWM (pulse width modulation) with regular pulse. In a single period Tr of the control signal CTL, the control signal CTL is a first voltage level V1 in time interval Tc, and the control signal CTL is a second voltage level V2 in time interval Tf. When the transistor M is a PMOS, the transistor M may be turned on during time interval Tc, and the transistor M may be turned off during time interval Tf. In a digital case, the first voltage level V1 may be zero and the second voltage V2 may be VDD, but, in an analog case, the first voltage level V1 may have a voltage level higher than zero. That is, the energy storage component E may be charged during time interval Tc (i.e., the time interval may also refer to a "charging time"), and the filter unit <NUM> may configured as an all pass filter. In the other hand, the filter unit <NUM> may be configured as a low pass filter during the time interval Tf. In another embodiment, as shown in <FIG>, the control signal is a PWM signal with irregular pulse. In this embodiment, the time intervals Tc and Tf are not fixed. For example, the time interval Tc can be made longer during initial operation of the circuit <NUM>. As the running time gets longer, the time interval Tc can be reduced. In yet another embodiment, as shown in <FIG>, the control signal CTL may be a PFM (pulse frequency modulation) signal. That is, in this embodiment, the time of a single period Tr of the control signal CTL is not fixed. In an embodiment, the ratio of the first time interval and a single period Tr of the control signal CTL is larger than <NUM> (i.e., Tr/Tc > <NUM>). In another embodiment, the ratio of the charging time in a single period and the single period is a random variable.

The above embodiments are for a case that the transistor M is a PMOS. In a case that the transistor M is a NMOS, the first voltage level V1 of the control signal CTL in the charging time may be lower than VDD.

Referring to <FIG> shows a block diagram of another circuit for low-noise reference signal generation. The circuit <NUM> is similar to the circuit <NUM>, but the circuit <NUM> further includes an input unit <NUM>. In this embodiment, the input unit <NUM> is a current to voltage (I/V) converting circuit, and the functional unit <NUM> is a voltage to current (V/I) converting circuit. Since the operations and functions of the filter unit <NUM> is the same as the embodiment described above, it may not be repeated herein.

<FIG> shows a practical example of a circuit for low-noise reference signal generation according to another embodiment of the present invention. The input unit <NUM> includes a current source Ir and a transistor T1. The current source Ir generates a noisy reference current, and the transistor T1 converts the noisy reference current to a noisy voltage signal as the input signal S1. The filter unit <NUM> filters the noise of the input signal S1 and then output the filtered signal S2. The functional unit <NUM> includes a transistor T2. The transistor T2 receives the filtered signal S2 and converts the filtered signal S2 to a clean reference current Ic. In another practical example in <FIG>, the transistor M of the filter unit <NUM>, the transistor T1 of the input unit <NUM> and the transistor T2 of the functional unit <NUM> are NMOS. Noted that, in some cases, the type of the transistors may be different. For example, the transistor M of the filter unit <NUM> is PMOS, and the transistor T1 of the input unit <NUM> and the transistor T2 of the functional unit <NUM> are NMOS.

<FIG> shows a flowchart of a method for low-noise reference signal generation.

In step <NUM>, providing a circuit which includes a filter unit and a functional unit is performed. The filter unit includes a transistor and an energy storage component. The transistor is configured to receive an input signal and output a filtered signal. A body node of the transistor is coupled to the input signal, the filtered signal or a signal which is similar to the input signal or the filtered signal. The functional unit has high input impedance.

In step <NUM>, controlling the transistor, by a control signal, to turn on for charging the energy storage component is performed. In this step, the filter unit is configured as an all pass filter.

In step <NUM>, controlling the transistor, by the control signal, to turn off to cause the filter unit to be configured as a low pass filter is performed.

Steps <NUM> and <NUM> may be performed repeatedly during the runtime of the circuit.

In an embodiment, the control signal is a PWM signal or a PFM signal. When the control signal is a PWM signal, the ratio of a charging time in a single period and the single period may be either fixed or not fixed, wherein the charging time refers to the time interval that the control signal is in a state of first voltage level to turn the transistor on. In an embodiment, the charging time can be made longer during initial operation of the circuit. As the running time gets longer, the charging time can be reduced. In an embodiment, the ratio of the charging time in a single period and the single period is larger than <NUM>. In an embodiment, the ratio of the charging time in a single period and the single period is a random variable.

With the present invention, a noisy reference signal which is either a reference voltage or a reference current can be cleaned, and a clean reference signal may be produced, within an interested band, for example, <NUM> - <NUM> in audio use. That is, with the present, the noise of the noisy reference signal within the interest band can be reduced.

Claim 1:
A circuit for low-noise reference signal generation (<NUM>), comprising:
a filter unit (<NUM>), comprising a transistor (M) and an energy storage component (E), wherein the transistor (M) comprises a first node (n1), a second node (n2), a control node (n3) and a body node (n4), the first node (n1) is configured to receive a input signal (S1), the second node (n2) is configured to output a filtered signal (S2), the control node (n3) is configured to receive a control signal (CTL) for controlling the transistor (M) to turn on or off, the body node (n4) is connected to the second node (n2) through an amplifier, wherein the amplifier is configured to provide a tracking signal (S3) to the body node (n4) based on the filtered signal (S2), and the energy storage component (E) is connected to the second node (n2) of the transistor (M); and
a functional unit (<NUM>), connected to the second node (n2) of the transistor (M) and the energy storage component (E), wherein the functional unit (<NUM>) has high input impedance, wherein
the control signal (CTL) is a PWM signal with regular pulse, a PWM signal with irregular pulse or a PFM signal, and that
when the control signal (CTL) is in a state of a first voltage level, the transistor (M) is turned on, the energy storage component (E) is charged via the transistor (M); when the control signal (CTL) is in a state of a second voltage level, the transistor (M) is turned off, the filter unit (<NUM>) is configured as a low pass filter, and the transistor (M) is equivalent to a resistor of the low pass filter.