Patent Description:
The present invention relates to an integrated circuit design, and more particularly, to a semiconductor chip with a local oscillator (LO) buffer reused for loop-back test.

Loop-back test is a well-known technique for examining the operational characteristics of a communication system. In a loop-back test, a test data is transmitted from a source and traverses some portions of the communication system, and ultimately returns to the source. For example, the test data is up-converted to a radio-frequency (RF) signal through a transmit (TX) chain, and then looped back to a receive (RX) chain before being transmitted via the antenna, where the RF signal is down-converted at the RX chain for further processing. Upon the return of the test data, the information content of the test data and/or the physical attributes of the test data (e.g., signal strength, signal-to-noise ratio, and other parameters of interest) can be observed and compared to the same information and/or parameters as they existed when the test data was initially transmitted. Information about the state of the portions of the communication system that the test data traversed and indications of the quality of service that is being provided can be extracted from comparing the original test data and the test data upon its return.

In some communication systems such as Radio Detection and Ranging (RADAR) systems, TX chains are located at a chip area away from a chip area where RX chains are located. A testing tone generator (TTG) may be implemented in the vicinity of RX chains to act as a TX circuit used to provide a testing tone for testing each of RX chains. However, the TTG consumes a large chip area, and is not a cost-effective solution.

In some communication systems such as RADAR systems, a low-power scan mode is an important feature. For example, a typical RADAR system with 4T4R architecture may enable only a portion of the 4T4R architecture, such as 1T1R or 1T2R, under the low-power scan mode. Once the normal TX chain (1T) is enabled under the low-power scan mode, the TX channel consumes much power due to too many blocks being enabled.

Thus, there is a need for an innovative low-cost loop-back test design and/or an innovative TX design that are applicable to a variety of communication systems, including a RADAR system, a wireless fidelity (Wi-Fi) system, a Bluetooth (BT) system, a <NUM>th generation (<NUM>) wireless system, etc..

<CIT> discloses a radio-frequency receiver includes built-in-self-test (BIST) circuitry which generates a self-test signal. A local oscillator signal is divided. A self-test oscillation signal is generated, based, at least in part, on the frequency-divided local oscillation signal. The self-test signal is generated based on the self-test oscillation signal. The BIST circuitry includes a divider, which divides the self-test oscillation signal. The frequency-divided local oscillation signal and the divided self-test oscillation signal are used to perform one or more of generating the self-test oscillation signal and controlling the generation of the self-test oscillation signal. The radio-frequency receiver may be an automotive radar receiver.

Certain terms are used throughout the following description and claims, which refer to particular components. As one skilled in the art will appreciate, electronic equipment manufacturers may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not in function. In the following description and in the claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to. Also, the term "couple" is intended to mean either an indirect or direct electrical connection. Accordingly, if one device is coupled to another device, that connection may be through a direct electrical connection, or through an indirect electrical connection via other devices and connections.

<FIG> is a block diagram illustrating a semiconductor chip according to an embodiment of the present invention. The semiconductor chip <NUM> includes a wireless communication circuit <NUM>, a local oscillator (LO) buffer <NUM>, an auxiliary path <NUM>, and other circuit components (not shown). The wireless communication circuit <NUM> includes a signal path <NUM> having a mixer input port <NUM> and a signal node <NUM> distinct from the mixer input port <NUM>. The wireless communication circuit <NUM> may be a part of a receive (RX) circuit or a part of a transmit (TX) circuit, depending upon actual design considerations. Hence, the signal path <NUM> may be an RX signal path or a TX signal path. In practice, the semiconductor chip <NUM> may include multiple RX circuits and multiple TX circuits of a communication system, such as a RADAR system, a Wi-Fi system, a BT system, or a <NUM> wireless system. In a case where the wireless communication circuit <NUM> is a part of an RX circuit, the mixer input port <NUM> is arranged to receive an LO signal needed by a down-converter mixer. In another case where the wireless communication circuit <NUM> is a part of a TX circuit, the mixer input port <NUM> is arranged to receive an LO signal needed by an up-converter mixer.

The LO buffer <NUM> is arranged to receive and buffer an LO signal generated from a local oscillator, and may act as a TX LO buffer or an RX LO buffer, depending upon actual design considerations. That is, the LO buffer <NUM> is included in a wireless communication circuit that may be the same as the wireless communication circuit <NUM> or may be distinct from the wireless communication circuit <NUM>, depending upon actual design considerations. The LO buffer <NUM> is originally designed to provide an LO signal to a mixer (e.g., down-converter mixer or up-converter mixer). In this embodiment, the auxiliary path <NUM> is arranged to electrically connect an output signal of the LO buffer <NUM> to the signal node <NUM> at the signal path <NUM>, such that the LO buffer <NUM> can be reused for a different function. For example, the LO buffer <NUM> can be reused for a loop-back test function, where the loop-back test function may be performed in a manufacture test (e.g., CP (Circuit Probing or Chip Probing) or FT (Final Test)), or may be performed in a product calibration test during a normal operation. For another example, the LO buffer <NUM> can be reused for a TX function that may be performed during a normal operation. Furthermore, the output signal of the LO buffer <NUM> that is injected into the signal node <NUM> may be a final output of the LO buffer <NUM> or an intermediate output of the LO buffer <NUM>.

For better comprehension of the proposed design of reusing the LO buffer <NUM> for a loop-back test function and/or a TX function, the following provides several exemplary designs, each being based on the architecture shown in <FIG>.

<FIG> is a diagram illustrating a first semiconductor chip with an LO buffer reused for loop-back test according to an embodiment of the present invention. The semiconductor chip <NUM> includes two RX circuits <NUM> and <NUM>. For brevity, only two RX circuits are shown in <FIG>. In practice, the semiconductor chip <NUM> may include multiple RX circuits and multiple TX circuits. The RX circuits <NUM> and <NUM> may belong to the same wireless communication system (e.g., same RADAR system) or different wireless communication systems (e.g., one RADAR system and one non-RADAR system). The RX circuits <NUM> and <NUM> may be adjacent to each other in the semiconductor chip <NUM>, but the present invention is not limited thereto. The RX circuit <NUM> is coupled to an antenna <NUM>, and includes a balanced-to-unbalanced (balun) circuit (labeled as "Balun") <NUM>, an RX low-noise amplifier (LNA) <NUM>, a down-converter mixer <NUM>, an RX analog front-end circuit (labeled as "RX AFE") <NUM>, and an RX LO buffer <NUM>. The RX circuit <NUM> is coupled to an antenna <NUM>, and includes a balun circuit (labeled as "Balun") <NUM>, an RX LNA <NUM>, a down-converter mixer <NUM>, an RX analog front-end circuit (labeled as "RX AFE") <NUM>, and an RX LO buffer <NUM>. Each of the antennas <NUM> and <NUM> may be an antenna in package (AiP) or an antenna on board (AoB). The semiconductor chip <NUM> adopts the architecture shown in <FIG>. For example, the wireless communication circuit <NUM> is realized by a part of the RX circuit <NUM>; the signal path <NUM> is realized by an RX signal path including balun circuit <NUM>, RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit, where the mixer input port <NUM> is realized by a mixer input port MIX IN of the down-converter mixer <NUM>, and the signal node <NUM> is realized by a signal node N_LB between balun circuit <NUM> and antenna <NUM>; the LO buffer <NUM> is realized by the RX LO buffer <NUM> of the RX circuit <NUM>; and the auxiliary path <NUM> is realized by an auxiliary path <NUM> coupled between the RX LO buffer <NUM> and the signal node N_LB. It should be noted that the signal node <NUM> (which is distinct from the mixer input port <NUM>) may be any suitable node at the signal path <NUM> that can enable the reuse of the LO buffer <NUM>. By way of example, but not limitation, the signal node <NUM> may be one terminal of a balun circuit that may be implemented by a transformer.

In this embodiment, the RX LO buffer <NUM> of one RX circuit <NUM> can be reused for loop-back test of another RX circuit <NUM> through the auxiliary path <NUM>. Specifically, when the auxiliary path <NUM> is controlled to cut off a loop-back path, the RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit <NUM> of the RX circuit <NUM> are enabled, the RX LO buffer <NUM> is used for providing an LO signal to the down-converter mixer <NUM>, the RX LNA <NUM>, down-converter mixer <NUM>, and RX analog front-end circuit <NUM> of the RX circuit <NUM> are enabled, and the RX LO buffer <NUM> is used for providing an LO signal to the down-converter mixer <NUM>; when the auxiliary path <NUM> is controlled to enable the loop-back path, the RX LO buffer <NUM> is reused for loop-back test of the RX circuit <NUM>, the RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit <NUM> of the RX circuit <NUM> may be disabled for saving power, the RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit <NUM> remain enabled, and the RX LO buffer <NUM> is used for providing an LO signal to the down-converter mixer <NUM>. Since the existing RX LO buffer <NUM> is reused for loop-back test of the RX circuit <NUM>, no additional testing tone generator (TTG) is required.

In some embodiments of the present invention, the RX LO buffer <NUM> that can be reused for loop-back test may be equipped with a mixer function for generating and outputting an LO+IF (intermediate frequency) signal, or may be a typical LO buffer without a mixer function for generating and outputting an LO signal. <FIG> is a diagram illustrating an LO buffer equipped with a mixer function according to an embodiment of the present invention. The RX LO buffer <NUM> shown in <FIG> may be implemented using the LO buffer <NUM> shown in <FIG>. The LO buffer <NUM> includes a first buffer stage <NUM>, a coupler <NUM>, and a second buffer stage <NUM>. The first buffer stage <NUM> supports a mixer function for IF testing tone generation. As shown in <FIG>, the first buffer stage <NUM> includes a plurality of transistors M1, M2, M3, M4, M5, M6. The transistors M2 and M3 can be used to receive an IF signal ST that is provided from, for example, a digital-to-analog converter (DAC) far away from the LO buffer <NUM>. Suppose that a frequency of an LO signal generated from a local oscillator (not shown) and received by the first buffer stage <NUM> is <NUM>. In a case where the RX LO buffer <NUM> is implemented by the LO buffer <NUM> and the transistors M2 and M3 are disabled by bias voltages, the signal looped backed to the RX signal path of the RX circuit <NUM> is a <NUM> signal. If a frequency of the LO signal provided by the RX LO buffer <NUM> is also <NUM>, a direct current (DC) term can be tested after mixing at the down-converter mixer <NUM>. In another case where the RX LO buffer <NUM> is implemented by the LO buffer <NUM> and the transistors M2 and M3 are used to receive the IF signal ST (e.g., <NUM> sine tone), the signal looped backed to the RX signal path of the RX circuit <NUM> is a <NUM>+<NUM> signal. If a frequency of the LO signal provided by the RX LO buffer <NUM> is also <NUM>, the RX total chain gain can be tested by the <NUM> sine tone. However, these are for illustrative purposes only, and are not meant to be limitations of the present invention.

As mentioned above, the auxiliary path <NUM> is arranged to electrically connect an output signal of the LO buffer <NUM> to the signal node <NUM> for allowing the LO buffer <NUM> to be reused for a different function (e.g., loop-back test or low-power transmission). By way of example, but not limitation, the auxiliary path <NUM> may be implemented by passive component(s) such as capacitor(s), active component(s) such as transistor(s), or a combination thereof. <FIG> is a circuit diagram illustrating an auxiliary path with a first configuration under a loop-back test mode according to an embodiment of the present invention. The auxiliary path <NUM> shown in <FIG> may be implemented by the auxiliary path <NUM>, such that the RX LO buffer <NUM> of the RX circuit <NUM> can be reused for loop-back test of the RX circuit <NUM>. As shown in <FIG>, the auxiliary path <NUM> includes a buffer implemented by a P-type metal-oxide-semiconductor (PMOS) based amplifier, having two PMOS transistors MP1 and MP2. The balun circuit <NUM> shown in <FIG> may be implemented by the balun circuit <NUM>, where one terminal on an unbalanced side of the balun circuit <NUM> is coupled to a ground voltage GND, and another terminal on the unbalanced side of the balun circuit <NUM> that is used to communicate with an antenna (e.g., antenna <NUM>) acts as the signal node N_LB. In other words, the signal node N_LB is an ungrounded terminal on the unbalanced side of the balun circuit <NUM>. The signal node N_LB may be coupled to the antenna (e.g., antenna <NUM>) without via a transmit/receive (TR) switch, or may be coupled to the antenna (e.g., antenna <NUM>) via a TR switch.

The RX LO buffer <NUM> may be implemented by the LO buffer <NUM>, where a part of the LO buffer <NUM> is enabled to provide a loop-back test signal, while a remaining part of the LO buffer <NUM> may be disabled for saving power. Since the remaining part of the LO buffer <NUM> is disabled, it is not illustrated in <FIG> for brevity. More specifically, circuit components of the RX circuit <NUM>, including RX LNA <NUM>, down-converter mixer <NUM>, RX AFE <NUM>, etc., that are not involved in loop-back test of the RX circuit <NUM> may be disabled for saving power, and circuit components of the RX circuit <NUM>, including RX LNA <NUM>, down-converter mixer <NUM>, RX AFE <NUM>, etc., that are involved in loop-back test of the RX circuit <NUM> should remain enabled.

To reuse the RX LO buffer <NUM> for loop-back test, a source terminal of the PMOS transistor MP1 is coupled to a supply voltage Vdd, a gate terminal of the PMOS transistor MP1 is arranged to receive an LO signal (e.g., LOi+) from the LO buffer <NUM>, a drain terminal of the PMOS transistor MP1 is coupled to a source terminal of the PMOS transistor MP2 through, for example, a surface wave transmission line T-line, a drain terminal of the PMOS transistor MP2 is coupled to the signal node N_LB (e.g., ungrounded terminal on the unbalanced side of the balun circuit <NUM>), and a gate terminal of the PMOS transistor MP2 is coupled to a bias voltage Vb (~0V). It should be noted that the balun circuit <NUM> (more particularly, winding on the unbalanced side of the balun circuit <NUM>) is reused as an output load of the PMOS based amplifier when the PMOS based amplifier is enabled to drive the signal node N_LB according to an output signal of the LO buffer <NUM>. In other words, the PMOS based amplifier reuses the input balun matching as an amplifier load to act as a high-frequency amplifier.

When the RX circuit <NUM> operates under a normal mode, the RX LO buffer <NUM> is required to provide an LO signal to the down-converter mixer <NUM>. The auxiliary circuit <NUM> may be controlled to cut off the loop-back path between the RX circuits <NUM> and <NUM>. <FIG> is a circuit diagram illustrating an auxiliary path with a second configuration under a normal mode according to an embodiment of the present invention. Considering a case where the auxiliary path <NUM> shown in <FIG> is implemented by the auxiliary path <NUM>, a part of the RX circuit <NUM> may be implemented by the RX circuit <NUM>, and the RX LO buffer <NUM> may be implemented by the LO buffer <NUM>. The whole LO buffer <NUM> is enabled to provide an LO input {LOi+, LOi-, LOq+, LOq-} needed by the down-converter mixer consisting of an in-phase (I) mixer and a quadrature (Q) mixer. More specifically, circuit components of the RX circuit <NUM>, including RX LNA <NUM>, down-converter mixer <NUM>, RX AFE <NUM>, RX LO buffer <NUM>, etc., that are involved in a normal RX operation of the RX circuit <NUM> should be enabled.

To cut off the loop-back path, the source terminal of the PMOS transistor MP1 is coupled to the supply voltage Vdd and the drain terminal of the PMOS transistor MP1, and the gate terminal of the PMOS transistor MP2 is coupled to the supply voltage Vdd and the source terminal of the PMOS transistor MP2. Hence, the PMOS transistor MP1 is configured as a MOS capacitor, and the PMOS transistor MP2 is turned off.

Regarding the embodiment shown in <FIG>, an RX LO buffer of one RX circuit is reused for loop-back test of another RX circuit. However, this is for illustrative purposes only, and is not meant to be a limitation of the present invention. <FIG> is a diagram illustrating a second semiconductor chip with an LO buffer reused for loop-back test according to an embodiment of the present invention. The semiconductor chip <NUM> includes an RX circuit <NUM> that is coupled to the antenna <NUM> and belongs to a wireless communication system (e.g., RADAR system or non-RADAR system), and adopts the architecture shown in <FIG>. For example, the wireless communication circuit <NUM> is realized by a part of the RX circuit <NUM>; the signal path <NUM> is realized by an RX signal path including balun circuit <NUM>, RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit <NUM>, where the mixer input port <NUM> is realized by the mixer input port MIX IN of the down-converter mixer <NUM>, and the signal node <NUM> is realized by the signal node N_LB between balun circuit <NUM> and antenna <NUM>; the LO buffer <NUM> is realized by the RX LO buffer <NUM> of the RX circuit <NUM>; and the auxiliary path <NUM> is realized by an auxiliary path <NUM> coupled between the RX LO buffer <NUM> and the signal node N_LB. In this embodiment, the RX LO buffer <NUM> may be implemented by a typical LO buffer without a mixer function, and the auxiliary path <NUM> may be implemented by a PMOS based amplifier such as the auxiliary path <NUM> shown in <FIG>. Hence, the auxiliary path <NUM> may include a PMOS based amplifier coupled between the RX LO buffer <NUM> and an ungrounded terminal on an unbalanced side of the balun circuit <NUM>.

For brevity, only one RX circuit is shown in <FIG>. In practice, the semiconductor chip <NUM> may include multiple RX circuits and multiple TX circuits.

In this embodiment, the RX LO buffer <NUM> of RX circuit <NUM> can be reused for loop-back test of the same RX circuit <NUM> through the auxiliary path <NUM>. Specifically, when the auxiliary path <NUM> is controlled to cut off a loop-back path, the RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit <NUM> of the RX circuit <NUM> are enabled, and the RX LO buffer <NUM> is used for providing an LO signal to the down-converter mixer <NUM>; when the auxiliary path <NUM> is controlled to enable the loop-back path, the RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit <NUM> of the RX circuit <NUM> remain enabled, and RX LO buffer <NUM> is used for providing an LO signal to the down-converter mixer <NUM>, and is also reused for loop-back test of the RX circuit <NUM> by providing an LO signal to the signal node N_LB. Since the existing RX LO buffer <NUM> is reused for loop-back test of the RX circuit <NUM>, no additional testing tone generator (TTG) is required.

<FIG> is a diagram illustrating a third semiconductor chip with an LO buffer reused for loop-back test according to an embodiment of the present invention. The semiconductor chip <NUM> includes the TX circuit <NUM> and the RX circuit <NUM>. For brevity, only one RX circuit and only one TX circuit are shown in <FIG>. In practice, the semiconductor chip <NUM> may include multiple RX circuits and multiple TX circuits. The TX circuit <NUM> and the RX circuit <NUM> may belong to the same wireless communication system (e.g., RADAR system) or different wireless communication systems (e.g., one RADAR system and one non-RADAR system). The TX circuit <NUM> is coupled to an antenna (e.g., AiP or AoB) <NUM>, and includes a balun circuit (labeled as "Balun") <NUM>, a TX power amplifier (PA) circuit <NUM> (which may include one or more PA stages), an up-converter mixer <NUM>, a TX analog front-end circuit (labeled as "TX AFE") <NUM>, and a TX LO buffer <NUM>. The semiconductor chip <NUM> adopts the architecture shown in <FIG>. For example, the wireless communication circuit <NUM> is realized by a part of the RX circuit <NUM>; the signal path <NUM> is realized by an RX signal path including balun circuit <NUM>, RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit <NUM>, where the mixer input port <NUM> is realized by the mixer input port MIX_IN of the down-converter mixer <NUM>, and the signal node <NUM> is realized by the signal node N_LB between balun circuit <NUM> and antenna <NUM>; the LO buffer <NUM> is realized by the TX LO buffer <NUM> of the TX circuit <NUM>; and the auxiliary path <NUM> is realized by an auxiliary path <NUM> coupled between the TX LO buffer <NUM> and the signal node N_LB. The TX LO buffer <NUM> may be implemented by a typical LO buffer without a mixer function, or may be implemented by a proposed LO buffer with a mixer function such as the LO buffer <NUM> shown in <FIG>. The auxiliary path <NUM> may be implemented by a PMOS based amplifier such as the auxiliary path <NUM> shown in <FIG>. Hence, the auxiliary path <NUM> may include a PMOS based amplifier coupled between the TX LO buffer <NUM> and an ungrounded terminal on an unbalanced side of the balun circuit <NUM>.

In this embodiment, the TX LO buffer <NUM> of the TX circuit <NUM> can be reused for loop-back test of the RX circuit <NUM> through the auxiliary path <NUM>. Specifically, when the auxiliary path <NUM> is controlled to cut off a loop-back path, the RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit <NUM> of the RX circuit <NUM> are enabled, the RX LO buffer <NUM> is used for providing an LO signal to the down-converter mixer <NUM>, the TX PA circuit <NUM>, up-converter mixer <NUM> and TX analog front-end circuit <NUM> are enabled, and the TX LO buffer <NUM> is used for providing an LO signal to the up-converter mixer <NUM>; when the auxiliary path <NUM> is controlled to enable the loop-back path, the TX LO buffer <NUM> is reused for loop-back test of the RX circuit <NUM>, the TX PA circuit <NUM>, up-converter mixer <NUM> and TX analog front-end circuit <NUM> of the TX circuit <NUM> may be disabled for saving power, and the RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit <NUM> of the RX circuit <NUM> may be disabled for saving power. Since the existing TX LO buffer <NUM> is reused for loop-back test of the RX circuit <NUM>, no additional testing tone generator (TTG) is required.

In above embodiments, an LObuffer (e. , RX LO buffer or TX LO buffer) is reused for a loop-back test function. In practice, reusing the LO buffer for a function different from the loop-back function is feasible. Compared to a normal TX chain, an LO buffer may be regarded as a low-power transmitter for generating and outputting an RF signal with the LO frequency. Hence, the same concept of reusing an LO buffer (e.g., RX LO buffer or TX LO buffer) may be applicable to a low-power TX application. For example, the low-power TX application employing the proposed design of reusing the LO buffer may be a low-power scan mode (or low-power short distance scan mode) of a frequency modulated continuous waveform (FMCW) RADAR system. For another example, an auxiliary path may be used for a loop-back function, and may be reused for a low-power TX function.

<FIG> is a diagram illustrating a first semiconductor chip with an LO buffer reused for TX mode. The semiconductor chip <NUM> includes two RX circuits <NUM> and <NUM>. For brevity, only two RX circuits are shown in <FIG>. In practice, the semiconductor chip <NUM> may include multiple RX circuits and multiple TX circuits. The RX circuits <NUM> and <NUM> may be adjacent to each other in the semiconductor chip <NUM>, but the present invention is not limited thereto. The RX circuits <NUM> and <NUM> may belong to the same wireless communication system (e.g., RADAR system) or different wireless communication systems (e.g., one RADAR system and one non-RADAR system). The RX circuit <NUM> is coupled to an antenna (e.g., AiP or AoB) <NUM>, and includes a balun circuit (labeled as "Balun") <NUM>, an RX LNA <NUM>, a down-converter mixer <NUM>, an RX analog front-end circuit (labeled as "RX AFE") <NUM>, and an RX LO buffer <NUM>. The RX circuit <NUM> is coupled to an antenna (e.g., AiP or AoB) <NUM>, and includes a balun circuit (labeled as "Balun") <NUM>, an RX LNA <NUM>, a down-converter mixer <NUM>, an RX analog front-end circuit (labeled as "RX AFE") <NUM>, and an RX LO buffer <NUM>. The semiconductor chip <NUM> adopts the architecture shown in <FIG>. For example, the wireless communication circuit <NUM> is realized by a part of the RX circuit <NUM>; the signal path <NUM> is realized by an RX signal path including balun circuit <NUM>, RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit <NUM>, where the mixer input port <NUM> is realized by a mixer input port MIX_IN of the down-converter mixer <NUM>, and the signal node <NUM> is realized by a signal node N_LB between balun circuit <NUM> and antenna <NUM>; the LO buffer <NUM> is realized by the RX LO buffer <NUM> of the RX circuit <NUM>; and the auxiliary path <NUM> is realized by an auxiliary path <NUM> coupled between the RX LO buffer <NUM> and the signal node N_LB. The RX LO buffer <NUM> may be implemented by a proposed LO buffer with a mixer function such as the LO buffer <NUM> shown in <FIG>. The auxiliary path <NUM> may be implemented by a PMOS based amplifier such as the auxiliary path <NUM> shown in <FIG>. Hence, the auxiliary path <NUM> may include a PMOS based amplifier coupled between the RX LO buffer <NUM> and an ungrounded terminal on an unbalanced side of the balun circuit <NUM>.

The RX LO buffer <NUM> of RX circuit <NUM> can be reused for TX mode through the auxiliary path <NUM> and the antenna <NUM>. Specifically, when the auxiliary path <NUM> is controlled to cut off a TX path, the RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit <NUM> of the RX circuit <NUM> are enabled, the RX LO buffer <NUM> is used for providing an LO signal to the down-converter mixer <NUM>, the RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit <NUM> of the RX circuit <NUM> are enabled, and the RX LO buffer <NUM> is used for providing an LO signal to the down-converter mixer <NUM>; when the auxiliary path <NUM> is controlled to enable the TX path, the RX LO buffer <NUM> is reused for TX mode, the RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit <NUM> of the RX circuit <NUM> may be disabled for saving power, and the RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit <NUM> of the RX circuit <NUM> may be disabled for saving power. This makes this scheme especially suitable for low-power TX applications since a lot of circuits can be disabled to keep power consumption low. The antenna <NUM> is reused by the low-power TX function for transmitting an output signal (e.g., signal with (LO+IF) frequency) generated from the RX LO buffer <NUM>, that is, an RF signal generated from a low-power transmitter. When the antenna <NUM> is reused by the low-power TX function, a TR switch may be integrated in the RX input of the RX circuit <NUM> to increase the off-mode RX impedance for raising the TX power.

<FIG> is a diagram illustrating a second semiconductor chip with an LO buffer reused for TX mode. The semiconductor chip <NUM> includes an RX circuit <NUM> that is coupled to an antenna (e.g., AiP or AoB) <NUM> and belongs to a wireless communication system (e.g., RADAR system or non-RADAR system). For brevity, only one RX circuit is shown in <FIG>. In practice, the semiconductor chip <NUM> may include multiple RX circuits and multiple TX circuits. The semiconductor chip <NUM> adopts the architecture shown in <FIG>. For example, the wireless communication circuit <NUM> is realized by a part of the RX circuit <NUM>; the signal path <NUM> is realized by an RX signal path including balun circuit <NUM>, RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit <NUM>, where the mixer input port <NUM> is realized by the mixer input port MIX_IN of the down-converter mixer <NUM>, and the signal node <NUM> is realized by the signal node N_LB between balun circuit <NUM> and antenna <NUM>; the LO buffer <NUM> is realized by the RX LO buffer <NUM> of the RX circuit <NUM>; and the auxiliary path <NUM> is realized by an auxiliary path <NUM> coupled between the RX LO buffer <NUM> and the signal node N_LB. The RX LO buffer <NUM> may be implemented by a proposed LO buffer with a mixer function such as the LO buffer <NUM> shown in <FIG>. The auxiliary path <NUM> may be implemented by a PMOS based amplifier such as the auxiliary path <NUM> shown in <FIG>. Hence, the auxiliary path <NUM> may include a PMOS based amplifier coupled between the RX LO buffer <NUM> and an ungrounded terminal on an unbalanced side of the balun circuit <NUM>.

The RX LO buffer <NUM> of RX circuit <NUM> can be reused for TX mode through the auxiliary path <NUM> and the antenna <NUM>. Specifically, when the auxiliary path <NUM> is controlled to cut off a TX path, the RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit <NUM> of the RX circuit <NUM> are enabled, and the RX LO buffer <NUM> is used for providing an LO signal to the down-converter mixer <NUM>; when the auxiliary path <NUM> is controlled to enable the TX path, the RX LO buffer <NUM> is reused for TX mode, and the RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit <NUM> of the RX circuit <NUM> may be disabled for saving power. This makes this scheme especially suitable for low-power TX applications since a lot of circuits can be disabled to keep power consumption low. The antenna <NUM> is reused by the low-power TX function for transmitting an output signal (e.g., signal with (LO+IF) frequency) generated from the RX LO buffer <NUM>, that is, an RF signal generated from a low-power transmitter. When the antenna <NUM> is reused by the low-power TX function, a TR switch may be integrated in the RX input of the RX circuit <NUM> to increase the off-mode RX impedance for raising the TX power.

<FIG> is a diagram illustrating a third semiconductor chip with an LO buffer reused for TX mode. The semiconductor chip <NUM> includes a TX circuit <NUM> and an RX circuit <NUM>. For brevity, only one RX circuit and only one TX circuit are shown in <FIG>. In practice, the semiconductor chip <NUM> may include multiple RX circuits and multiple TX circuits. The TX circuit <NUM> and the RX circuit <NUM> may belong to the same wireless communication system (e.g., RADAR system) or different wireless communication systems (e.g., one RADAR system and one non-RADAR system). The TX circuit <NUM> is coupled to an antenna (e.g., AiP or AoB) <NUM>, and includes a balun circuit (labeled as "Balun") <NUM>, a TX PA circuit <NUM> (which may include one or more PA stages), an up-converter mixer <NUM>, a TX analog front-end circuit (labeled as "TX AFE") <NUM>, and a TX LO buffer <NUM>. The semiconductor chip <NUM> adopts the architecture shown in <FIG>. For example, the wireless communication circuit <NUM> is realized by a part of the TX circuit <NUM>; the signal path <NUM> is realized by a TX signal path including balun circuit <NUM>, TX PA circuit <NUM>, up-converter mixer <NUM> and TX analog front-end circuit <NUM>, where the mixer input port <NUM> is realized by a mixer input port MIX_IN of the up-converter mixer <NUM>, and the signal node <NUM> is realized by a signal node N_LB between balun circuit <NUM> and antenna <NUM>; the LO buffer <NUM> is realized by the RX LO buffer <NUM> of the RX circuit <NUM>; and the auxiliary path <NUM> is realized by an auxiliary path <NUM> coupled between the RX LO buffer <NUM> and the signal node N_LB. The RX LO buffer <NUM> may be implemented by a proposed LO buffer with a mixer function such as the LO buffer <NUM> shown in <FIG>. The auxiliary path <NUM> may be implemented by a PMOS based amplifier such as the auxiliary path <NUM> shown in <FIG>. Hence, the auxiliary path <NUM> may include a PMOS based amplifier coupled between the RX LO buffer <NUM> and an ungrounded terminal on an unbalanced side of the balun circuit <NUM>.

The RX LO buffer <NUM> of RX circuit <NUM> can be reused for TX mode through the auxiliary path <NUM> and the antenna <NUM>. Specifically, when the auxiliary path <NUM> is controlled to cut off a TX path, the RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit <NUM> of the RX circuit <NUM> are enabled, the RX LO buffer <NUM> is used for providing an LO signal to the down-converter mixer <NUM>, the TX PA circuit <NUM>, up-converter mixer <NUM> and TX analog front-end circuit <NUM> of the TX circuit <NUM> are enabled, and the TX LO buffer <NUM> is used for providing an LO signal to the up-converter mixer <NUM>; when the auxiliary path <NUM> is controlled to enable the TX path, the RX LO buffer <NUM> is reused for TX mode, the TX PA circuit <NUM>, up-converter mixer <NUM> and TX analog front-end circuit <NUM> of the TX circuit <NUM> may be disabled for saving power, and the RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit <NUM> of the RX circuit <NUM> may be disabled for saving power. This makes this scheme especially suitable for low-power TX applications since a lot of circuits can be disabled to keep power consumption low. The antenna <NUM> is reused by the low-power TX function for transmitting an output signal (e.g., signal with (LO+IF) frequency) generated from the RX LO buffer <NUM>, that is, an RF signal generated from a low-power transmitter. When the antenna <NUM> is reused by the low-power TX function, a TR switch may be integrated in the TX output of the TX circuit <NUM> to increase the off-mode TX impedance for raising the TX power.

<FIG> is a diagram illustrating a fourth semiconductor chip with an LO buffer reused for TX mode. The semiconductor chip <NUM> includes then RX circuit <NUM> coupled to the antenna <NUM> and the TX circuit <NUM> coupled to the antenna <NUM>. For brevity, only one RX circuit and only one TX circuit are shown in <FIG>. In practice, the semiconductor chip <NUM> may include multiple RX circuits and multiple TX circuits. The RX circuit <NUM> and the TX circuit <NUM> may belong to the same wireless communication system (e.g. , RADAR system) or different wireless communication systems (one RADAR system and one non-RADAR system). The semiconductor chip <NUM> adopts the architecture shown in <FIG>. For example, the wireless communication circuit <NUM> is realized by a part of the RX circuit <NUM>; the signal path <NUM> is realized by an RX signal path including balun circuit <NUM>, RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit <NUM>, where the mixer input port <NUM> is realized by the mixer input port MIX_IN of the down-converter mixer <NUM>, and the signal node <NUM> is realized by the signal node N_LB between balun circuit <NUM> and antenna <NUM>; the LO buffer <NUM> is realized by the TX LO buffer <NUM> of the TX circuit <NUM>; and the auxiliary path <NUM> is realized by an auxiliary path <NUM> coupled between the TX LO buffer <NUM> and the signal node N_LB. The TX LO buffer <NUM> may be implemented by a proposed LO buffer with a mixer function such as the LO buffer <NUM> shown in <FIG>. The auxiliary path <NUM> may be implemented by a PMOS based amplifier such as the auxiliary path <NUM> shown in <FIG>. Hence, the auxiliary path <NUM> may include a PMOS based amplifier coupled between the TX LO buffer <NUM> and an ungrounded terminal on an unbalanced side of the balun circuit <NUM>.

The TX LO buffer <NUM> of TX circuit <NUM> can be reused for TX mode through the auxiliary path <NUM> and the antenna <NUM>. Specifically, when the auxiliary path <NUM> is controlled to cut off a TX path, the RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit <NUM> of the RX circuit <NUM> are enabled, the RX LO buffer <NUM> is used for providing an LO signal to the down-converter mixer <NUM>, the TX PA circuit <NUM>, up-converter mixer <NUM> and TX analog front-end circuit <NUM> of the TX circuit <NUM> are enabled, and the TX LO buffer <NUM> is used for providing an LO signal to the up-converter mixer <NUM>; when the auxiliary path <NUM> is controlled to enable the TX path, the TX LO buffer <NUM> is reused for TX mode, the RX LNA <NUM>, down-converter mixer <NUM> and RX analog front-end circuit <NUM> of the RX circuit <NUM> may be disabled for saving power, and the TX PA circuit <NUM>, up-converter mixer <NUM> and TX analog front-end circuit <NUM> of the TX circuit <NUM> may be disabled for saving power. This makes this scheme especially suitable for low-power TX applications since a lot of circuits can be disabled to keep power consumption low. The antenna <NUM> is reused by the low-power TX function for transmitting an output signal (e.g., signal with (LO+IF) frequency) generated from the TX LO buffer <NUM>, that is, an RF signal generated from a low-power transmitter. When the antenna <NUM> is reused by the low-power TX function, a TR switch may be integrated in the RX input of the RX circuit <NUM> to increase the off-mode RX impedance for raising the TX power.

<FIG> is a diagram illustrating a fifth semiconductor chip with an LO buffer reused for TX mode. The semiconductor chip <NUM> includes a TX circuit <NUM> that is coupled to an antenna (e.g., AiP or AoB) <NUM> and belongs to a wireless communication system (e.g., RADAR system or non-RADAR system). For brevity, only one TX circuit is shown in <FIG>. In practice, the semiconductor chip <NUM> may include multiple RX circuits and multiple TX circuits. The semiconductor chip <NUM> adopts the architecture shown in <FIG>. For example, the wireless communication circuit <NUM> is realized by a part of the TX circuit <NUM>; the signal path <NUM> is realized by a TX signal path including balun circuit <NUM>, TX PA circuit <NUM>, up-converter mixer <NUM> and TX analog front-end circuit <NUM>, where the mixer input port <NUM> is realized by a mixer input port MIX_IN of the up-converter mixer <NUM>, and the signal node <NUM> is realized by the signal node N_LB between balun circuit <NUM> and antenna <NUM>; the LO buffer <NUM> is realized by the TX LO buffer <NUM> of the TX circuit <NUM>; and the auxiliary path <NUM> is realized by an auxiliary path <NUM> coupled between the TX LO buffer <NUM> and the signal node N_LB. The TX LO buffer <NUM> may be implemented by a proposed LO buffer with a mixer function such as the LO buffer <NUM> shown in <FIG>. The auxiliary path <NUM> may be implemented by a PMOS based amplifier such as the auxiliary path <NUM> shown in <FIG>. Hence, the auxiliary path <NUM> may include a PMOS based amplifier coupled between the TX LO buffer <NUM> and an ungrounded terminal on an unbalanced side of the balun circuit <NUM>.

The TX LO buffer <NUM> of TX circuit <NUM> can be reused for TX mode through the auxiliary path <NUM> and the antenna <NUM>. Specifically, when the auxiliary path <NUM> is controlled to cut off a TX path, the TX PA circuit <NUM>, up-converter mixer <NUM> and TX analog front-end circuit <NUM> of the TX circuit <NUM> are enabled, and the TX LO buffer <NUM> is used for providing an LO signal to the up-converter mixer <NUM>; when the auxiliary path <NUM> is controlled to enable the TX path, the TX LO buffer <NUM> is reused for TX mode, and the TX PA circuit <NUM>, up-converter mixer <NUM> and TX analog front-end circuit <NUM> of the TX circuit <NUM> may be disabled for saving power. This makes this scheme especially suitable for low-power TX applications since a lot of circuits can be disabled to keep power consumption low. The antenna <NUM> is reused by the low-power TX function for transmitting an output signal (e.g., signal with (LO+IF) frequency) generated from the TX LO buffer <NUM>, that is, an RF signal generated from a low-power transmitter. When the antenna <NUM> is reused by the low-power TX function, a TR switch may be integrated in the TX output of the TX circuit <NUM> to increase the off-mode TX impedance for raising the TX power.

<FIG> is a diagram illustrating a sixth semiconductor chip with an LO buffer reused for TX mode. The semiconductor chip <NUM> includes two TX circuits <NUM> and <NUM>. For brevity, only two TX circuits are shown in <FIG>. In practice, the semiconductor chip <NUM> may include multiple RX circuits and multiple TX circuits. The TX circuits <NUM> and <NUM> may belong to the same wireless communication system (e.g., RADAR system) or different wireless communication systems (e.g., one RADAR system and one non-RADAR system). The TX circuits <NUM> and <NUM> may be adjacent to each other in the semiconductor chip <NUM>, but the present invention is not limited thereto. The TX circuit <NUM> is coupled to an antenna (e.g., AiP or AoB) <NUM>, and includes a balun circuit (labeled as "Balun") <NUM>, a TX PA circuit <NUM> (which may include one or more PA stages), an up-converter mixer <NUM>, a TX analog front-end circuit (labeled as "TX AFE") <NUM>, and a TX LO buffer <NUM>. The semiconductor chip <NUM> adopts the architecture shown in <FIG>. For example, the wireless communication circuit <NUM> is realized by a part of the TX circuit <NUM>; the signal path <NUM> is realized by a TX signal path including balun circuit <NUM>, TX PA circuit <NUM>, up-converter mixer <NUM> and TX analog front-end circuit <NUM>, where the mixer input port <NUM> is realized by the mixer input port MIX_IN of the up-converter mixer <NUM>, and the signal node <NUM> is realized by the signal node N_LB between balun circuit <NUM> and antenna <NUM>; the LO buffer <NUM> is realized by the TX LO buffer <NUM> of the TX circuit <NUM>; and the auxiliary path <NUM> is realized by an auxiliary path <NUM> coupled between the TX LO buffer <NUM> and the signal node N_LB. The TX LO buffer <NUM> may be implemented by a proposed LO buffer with a mixer function such as the LO buffer <NUM> shown in <FIG>. The auxiliary path <NUM> may be implemented by a PMOS based amplifier such as the auxiliary path <NUM> shown in <FIG>. Hence, the auxiliary path <NUM> may include a PMOS based amplifier coupled between the TX LO buffer <NUM> and an ungrounded terminal on an unbalanced side of the balun circuit <NUM>.

The TX LO buffer <NUM> of TX circuit <NUM> can be reused for TX mode through the auxiliary path <NUM> and the antenna <NUM>. Specifically, when the auxiliary path <NUM> is controlled to cut off a TX path, the TX PA circuit <NUM>, up-converter mixer <NUM> and TX analog front-end circuit <NUM> of the TX circuit <NUM> are enabled, the TX LO buffer <NUM> is used for providing an LO signal to the up-converter mixer <NUM>, the TX PA circuit <NUM>, up-converter mixer <NUM> and TX analog front-end circuit <NUM> of the TX circuit <NUM> are enabled, and the TX LO buffer <NUM> is used for providing an LO signal to the up-converter mixer <NUM>; when the auxiliary path <NUM> is controlled to enable the TX path, the TX LO buffer <NUM> is reused for TX mode, the TX PA circuit <NUM>, up-converter mixer <NUM> and TX analog front-end circuit <NUM> of the TX circuit <NUM> may be disabled for saving power, and the TX PA circuit <NUM>, up-converter mixer <NUM> and TX analog front-end circuit <NUM> of the TX circuit <NUM> may be disabled for saving power. This makes this scheme especially suitable for low-power TX applications since a lot of circuits can be disabled to keep power consumption low. The antenna <NUM> is reused by the low-power TX function for transmitting an output signal (e.g., signal with (LO+IF) frequency) generated from the TX LO buffer <NUM>, that is, an RF signal generated from a low-power transmitter. When the antenna <NUM> is reused by the low-power TX function, a TR switch may be integrated in the TX output of the TX circuit <NUM> to increase the off-mode TX impedance for raising the TX power.

Claim 1:
A semiconductor chip (<NUM>, <NUM>, <NUM>, <NUM>) comprising:
a first wireless communication circuit (<NUM>, <NUM>, <NUM>), comprising a signal path, wherein the signal path comprises a mixer input port (<NUM>) and a signal node (<NUM>) distinct from the mixer input port (<NUM>);
a local oscillator, LO, buffer (<NUM>, <NUM>, <NUM>, <NUM>); and
an auxiliary path (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>), arranged to electrically connect the LO buffer (<NUM>, <NUM>, <NUM>, <NUM>) to the signal node (<NUM>) of the signal path, wherein the LO buffer (<NUM>, <NUM>, <NUM>) is reused for a loop-back test function through the auxiliary path (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>),
characterized in that
the signal path further comprises a balanced-to-unbalanced, balun, circuit (<NUM>, <NUM>, <NUM>), and the signal node (<NUM>) is an ungrounded terminal on an unbalanced side of the balun circuit (<NUM>, <NUM>, <NUM>), and
the auxiliary path (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>) comprises: a P-type metal-oxide-semiconductor, PMOS, based amplifier, where the balun circuit (<NUM>, <NUM>, <NUM>) is reused as an output load of the PMOS based amplifier when the PMOS based amplifier is enabled to drive the signal node (<NUM>) according to an output signal of the LO buffer (<NUM>, <NUM>, <NUM>, <NUM>).