Patent Description:
Capacitive touch sensing has become an increasingly common method of receiving user inputs to an HMI. Over time, industrial design innovations have proliferated into seamless touch surfaces for devices such as smartphones, smartwatches, automotive steering wheels and dashboards, headphones, and the like. In these and other types of devices, traditional mechanical buttons may be replaced with seamless touch surfaces for receiving user inputs to control said devices. For example, traditional mechanical buttons may be replaced with virtual buttons displayed on an HMI. However, commonly used capacitive touch sensing sensors and methods are often incapable of sensing and/or interpreting a level of force applied (e.g., which may be indicative of intent) by a user input (e.g., a touch on an HMI). Additionally, force sensors may sense and/or interpret the level of an applied force by a user on an HMI but may not accurately determine the location of the touch. In instances where a user applies a significant amount of force (e.g., over a threshold level), for example, these typical force sensors may trigger a false positive by registering a touch on an incorrect area of the HMI. <CIT> discusses a method which may involve estimating a force applied by a target object on a surface, determining at least one ultrasonic fingerprint sensor parameter modification based, at least in part, on the force and updating at least one setting of an ultrasonic fingerprint sensor based, at least in part, on the ultrasonic fingerprint sensor parameter modification. The method may involve controlling the ultrasonic fingerprint sensor to transmit first and second ultrasonic waves towards the target object and receiving first and second ultrasonic receiver signals, including signals corresponding to reflections of the first and second ultrasonic waves from the target object, from the ultrasonic fingerprint sensor. The method may involve performing an authentication process based, at least in part, on the first and second ultrasonic receiver signals. <CIT> discusses a frequency-tunable ultrasonic device. <CIT> discusses transmit beamforming of a two-dimensional array of ultrasonic transducers. <CIT> discusses an ultrasonic receiving transducer based on Helmholtz resonant cavity. <CIT> discusses a piezoelectric acoustic resonator based sensor. <CIT> discusses ultrasonic touch detection and decision. <CIT> discusses an integrated piezoelectric microelectromechanical ultrasound transducer (PMUT) on integrated circuit (IC) for fingerprint sensing. <CIT> discusses a piezoelectric micro mechanical ultrasonic transducer with multiple piezoelectric layers. <CIT> discusses piezoelectric package-integrated acoustic transducer devices. However, none of these documents disclose at least the following features of appended claim <NUM>: wherein the piezoresistive element is implanted into a surface of the substrate, and wherein the PMUT is layered over the surface of the substrate.

One implementation of the present disclosure is a hybrid sensor that includes a piezoresistive element for sensing an applied force, a piezoelectric micromachined ultrasonic transducer (PMUT) for sensing the presence of an object within a threshold distance of the hybrid sensor, and a substrate onto which both the piezoresistive element and the PMUT are disposed.

In some embodiments, the PMUT is configured to transmit and receive ultrasonic pressure waves to sense the presence of an object.

In some embodiments, the ultrasonic pressure waves are in the range of <NUM> to <NUM>.

According to the invention, the piezoresistive element is implanted into a surface of the substrate and the PMUT is layered over the surface of the substrate.

In some embodiments, the PMUT includes a piezoelectric layer disposed between a bottom electrode and a top electrode, and a resonator cavity disposed below the bottom electrode.

In some embodiments, the resonator cavity is a sealed cavity.

In some embodiments, the piezoelectric layer is made of aluminum nitride (AlN) or scandium-doped aluminum nitride (AlScN).

In some embodiments, the bottom electrode includes molybdenum (Mo).

In some embodiments, the hybrid sensor further includes processing circuitry configured to process respective electrical signals output from each of the piezoresistive element and the PMUT.

In some embodiments, the respective electrical signal output from the piezoresistive element is responsive to the applied force.

In some embodiments, the respective electrical signal output from the PMUT is responsive to the presence of the object within the threshold distance of the hybrid sensor.

In some embodiments, the processing circuitry is configured to process the respective electrical signals by comparing the respective electrical signals to respective thresholds to determine whether a touch event is classified as a true touch event or a false touch event.

In some embodiments, the touch event is classified as the true touch event when each of the respective electrical signals exceeds the respective threshold, and the touch event is classified as the false touch event when only one of the respective electrical signals exceeds the respective threshold.

In some embodiments, the processing circuitry includes at least one of a complementary metal-oxide-semiconductor (CMOS), a double-diffused metal-oxide semiconductor field-effect transistor (DMOS), or a bi-polar junction transistor (BJT).

In some embodiments, the processing circuitry is further configured to apply a plurality of high-voltage pulses to the PMUT to cause the PMUT to transmit ultrasonic pressure waves.

In some embodiments, the processing circuity is disposed on the substrate.

In some embodiments, the hybrid sensor is implemented in an open cavity molded package.

In some embodiments, the open cavity molded package includes a cavity disposed on top of the PMUT, the cavity filled with a medium that transmits ultrasonic pressure waves to the PMUT.

In some embodiments, the hybrid sensor is implemented in a back-side wafer level chip scale package (WLCSP).

In some embodiments, the hybrid sensor is implemented in a standard wafer level chip scale package (WLCSP).

Various objects, aspects, features, and advantages of the disclosure will become more apparent and better understood by referring to the detailed description taken in conjunction with the accompanying drawings, in which like reference characters identify corresponding elements throughout.

Referring generally to the FIGURES, a hybrid sensing device is shown, according to various embodiments. In particular, the hybrid sensing device described herein includes both piezoresistive (PZR) and piezoelectric micromachined ultrasonic transducer (PMUT) elements that are integrated into a single wafer. The PZR element(s) of the hybrid sensor are configured to sense an amount of force applied either directly or indirectly to the sensor and the PMUT element(s) are configured to transmit and/or received ultrasonic pressure waves for detecting the presence of an object (e.g., a user's finger) in proximity to the sensor. The hybrid sensor can also include additional processing circuitry for interpreting electrical signals from the PZR and PMUT elements. By comparing the responses of the PZR and PMUT elements, a determination can be made whether a detected touch event is a "true touch event" or a "false touch event. " For example, if the PZR element of the sensor detects an applied force but the PMUT element does not detect an object, the corresponding event may be identified as a "false touch event.

In this manner, the hybrid sensor described herein may address many of the shortcomings described above with respect to more traditional capacitive and force sensors. For example, the rate of false positives due to extremely small input (e.g., touch) forces may be mitigated by validating a sensed force using the second sensing element. Furthermore, unlike many other types of capacitive and/or force sensors, the PZR, PMUT, and processing elements described herein may be integrated into a single chip (e.g., silicon chip), which provides improved sensing capabilities over other devices in a small, energy efficient package. As described in greater detail below, these hybrid sensors may also be manufactured for a low cost in various packaging formats, such as an open cavity molded package or a wafer level chip scale package (WLCSP), which can lower the threshold for technology proliferation. Accordingly, the hybrid sensor described herein may be a low-cost and easily-implemented replacement for mechanical button and other sensing devices in a variety of materials and surfaces. Additional features and advantages are described in greater detail below.

Referring to <FIG>, a cross-sectional diagram of a hybrid sensor <NUM> having integrated PZR and PMUT elements with a bipolar-CMOS-DMOS (BCD) process layer <NUM> is shown, according to some embodiments. Specifically, the PMUT element of hybrid sensor <NUM> is shown as a PMUT layer <NUM> disposed (i.e., layered) on top of the BCD process layer <NUM>. The PMUT layer <NUM> is formed from the lower part of a silicon dioxide (SiO<NUM>) layer <NUM> and a semiconductor substrate <NUM>. The SiO<NUM> layer <NUM> is formed over a surface of the semiconductor substrate <NUM>. As briefly mentioned above, the PMUT layer <NUM> may be configured to detect the presence of an object, such as a user's finger, in proximity to the hybrid sensor <NUM>. To do so, the PMUT layer <NUM> generates and transmits ultrasonic pressure waves that are broadcast into a surrounding medium (e.g., air, water, etc.) and, when an ultrasonic pressure wave hits an object (e.g., the user's finger), the wave is reflected back towards the PMUT layer <NUM>, where it is received.

In some embodiments, the PMUT layer <NUM> transmits ultrasonic pressure waves by applying voltage pulses (e.g., high voltage pulses) to at least one of a bottom electrode <NUM> or a top electrode <NUM>, which are disposed on respective bottom and top sides of a piezoelectric (PZE) layer <NUM>. As shown, the PZE layer <NUM> may be formed of aluminum nitride (AlN) disposed on a silicon nitride (SiN) layer <NUM>. In <FIG>, the PZE layer <NUM> is embedded in the SiN layer <NUM>. The PMUT layer <NUM> includes the SiN layer <NUM> and a top portion of the SiO<NUM> layer <NUM>. The bottom electrode <NUM> is formed directly on a resonator cavity <NUM> and the top surface of the SiNlayer <NUM>. While shown as a single layer of SiN, in some embodiments, the SiN layer <NUM> is formed of stacked silicon oxide and silicon nitride layers. The bottom electrode <NUM> may be formed of molybdenum (Mo) and/or aluminum (Al) having an Mo layer, to enhance the crystal structure of the PZE layer <NUM>, and the top electrode <NUM> may be formed of Al; however, it will be appreciated that other materials and/or element for forming these and other components of the hybrid sensor <NUM> are contemplated herein. In various embodiments, for example, the PZE layer <NUM> may be formed of scandium-doped aluminum nitride (AlScN) or another suitable PZE material. Additionally, various traces or electrodes formed of Al are shown throughout the hybrid sensor <NUM>; however, for clarity and conciseness, not every trace or electrode is identified independently.

Positioned beneath the bottom electrode <NUM> is the resonator cavity <NUM> which can be used to tune the transmission (Tx) and receiving (Rx) frequencies of the PMUT layer <NUM>. In particular, the geometric dimensions of the resonator cavity <NUM> may be selected based on a desired range of Tx and Rx frequencies. In some embodiments, the resonator cavity <NUM> is sized such that the PMUT layer <NUM> transmits and receives frequencies ranging from <NUM> to <NUM>. In some embodiments, the resonator cavity <NUM> is sized such that the PMUT layer <NUM> transmits and receives frequencies above <NUM>, although typically less than <NUM>. In some embodiments, the geometric dimensions of the PZE layer <NUM>, the bottom electrode <NUM>, and the top electrode <NUM> are also selected to tune the Tx and Rx frequencies of the PMUT layer <NUM>.

In some embodiments, the SiO<NUM> layer <NUM> defines a portion of both the PMUT layer <NUM> and the BCD layer <NUM>. In some embodiments, the SiO<NUM> layer <NUM> electrically (i.e., via traces or electrodes formed in the SiO<NUM> layer) and/or mechanically couples various components of the PMUT layer <NUM> and the BCD layer <NUM>. In some embodiments, various components of the BCD layer <NUM> may transmit and receive electrical signals to/from the PMUT layer <NUM> via metal electrodes disposed in the SiO<NUM> layer <NUM>. As shown, for example, the BCD layer <NUM> can include one or more of a PZR sensor <NUM>, a complementary metal-oxide-semiconductor (CMOS) element <NUM>, a bi-polar junction transistor (BJT) <NUM>, and a double-diffused metal-oxide semiconductor field-effect transistor (DMOS) element <NUM>. The CMOS element <NUM>, the BJT <NUM>, and the DMOS element <NUM> are sometimes referred to herein as processing circuitry. The processing circuitry may independently drive the PMUT layer <NUM> to produce ultrasonic pressure waves and/or may process signals from the PMUT layer <NUM> due to sensed ultrasonic pressure waves, via the SiO<NUM> layer <NUM>. Additionally, the processing circuity may process signals from the PZR sensor <NUM> due to sensed applied force. In some embodiments, the semiconductor substrate <NUM> is referred to as a (Si) layer <NUM> (e.g., the Si wafer).

As mentioned above, the PZR sensor <NUM> may be configured to sense an amount of force applied directly or indirectly to the hybrid sensor <NUM>. Specifically, the PZR sensor <NUM> may experience a change in resistance due to an applied mechanical strain (e.g., from a user input). In some embodiments, the PZR sensor <NUM> is formed of a PZR deep N-well (DNWell) region <NUM> disposed in the Si layer <NUM> (e.g., the Si wafer) of the BCD layer <NUM>. Disposed within the PZR DNWell region <NUM> is a piezoresistor (PZR) element <NUM>, along with a P+ region <NUM> and an N+ region <NUM>. As shown, for example, a first electrode may extend from the P+ region <NUM> into the SiO<NUM> layer <NUM> and a second electrode may extend from the N+ region <NUM> into the SiO<NUM> layer <NUM>.

As described herein, the Si layer <NUM> may be the base layer or substrate onto which each of the PZR sensor <NUM>, the CMOS element <NUM>, the BJT <NUM>, and the DMOS element <NUM> are integrated, and onto which the PMUT <NUM> is layered. In other words, all of the elements of the PMUT <NUM> and the BCD process layer <NUM> are disposed on a single substrate or wafer, unlike many other types of touch sensors that may have sensing and processing components disposed on multiple different substrates. Not only does this make the hybrid sensor <NUM> more compact than many other touch sensing devices but it can also simplify manufacturing, as discussed below.

Positioned next to the PZR sensor <NUM> and, in some embodiments also disposed in the Si layer <NUM>, is the CMOS element <NUM>. The CMOS element <NUM> is formed of a CMOS DNWell region <NUM> and a PWell region <NUM>. Disposed within the CMOS DNWell region <NUM> are two P+ regions (e.g., two of the P+ region <NUM>) coupled to corresponding electrodes that extend into the SiO<NUM> layer <NUM>. Between these electrodes and over the CMOS DNWell region <NUM> is a polysilicon (poly-Si) region <NUM>. The poly-Si region is encased by SiN and may form the gate of a field effect transistor (FET). As shown, a third electrode may extend from the poly-Si region <NUM> into the SiO<NUM> layer <NUM>. The CMOS element <NUM> further includes the PWell region <NUM>. Two N+ regions <NUM> are embedded in the PWell region <NUM>. Positioned above the PWell region <NUM> and disposed within the SiO<NUM> layer <NUM> is a second poly-Si region <NUM> flanked by two SiN regions. The second poly-Si region <NUM> is embedded in SiN and forms the gate of a FET.

The BJT <NUM> includes three P+ regions <NUM>, including one P+ region <NUM> disposed within a second CMOS DNWell region <NUM>. Extending from two of P+ regions <NUM>, including the P+ regions <NUM> disposed in the CMOS DNWell region <NUM>, are separate electrodes. The DMOS element <NUM>, shown next to the BJT <NUM> in the example of <FIG>, includes a first HV NWell region <NUM> having a shallow NWell region <NUM> disposed therein, which further includes yet another N+ region <NUM>. Beneath the HV NWell region <NUM> is a second PWell region <NUM> and, beneath PWell region <NUM>, is a N-type buried layer (NBL) <NUM>.

The DMOS element <NUM> also includes an HV PBody region <NUM> having two P+ regions <NUM> and the N+ region <NUM> disposed therein. In some embodiments, a well may be formed in the HV PBody region <NUM> which may be filled with SiO<NUM> from the SiO<NUM> layer <NUM>. The DMOS element <NUM> is also shown to include the poly-Si region <NUM> flanked by two SiN regions <NUM>. Electrodes are shown to extend from each of poly-Si region <NUM>, P+ regions <NUM>, and the N+ region <NUM>. Further, a second HV NWell region <NUM> is shown having a second shallow NWell region <NUM> and another N+ region <NUM> disposed therein.

Referring now to <FIG>, a cross-sectional diagram of an alternate configuration of the hybrid sensor <NUM> having a high-voltage (HV) process layer <NUM>? Is shown, according to some embodiments. As shown, the alternate configuration of the hybrid sensor <NUM> is generally similar to the configuration of the hybrid sensor <NUM>; however, unlike the BCD process layer <NUM>, the HV process layer <NUM>? does not include a BJT (e.g., the BJT <NUM>). That said, in either configuration, the components of the BCD process layer <NUM> and the HV process layer <NUM>? may be configured to drive the PMUT <NUM> to produce and sense ultrasonic pressure waves, and both include the PZR sensor <NUM> for sensing a force applied to the hybrid sensor <NUM>. Further, both configurations include the CMOS element <NUM> and the DMOS element <NUM> which, in some embodiments, can convert the analog electrical signals from the PMUT layer <NUM> and/or the PZR sensor <NUM> into digital signals. Further, in some embodiments, the CMOS element <NUM> and/or the DMOS element <NUM> perform signal processing on the digital signals to evaluate a sensed touch.

As described briefly above, unlike many other types of force and/or touch sensors, the responses of the PZR sensor <NUM> and the PMUT layer <NUM> of the hybrid sensor <NUM> may be utilized in conjunction as a form of "voting system," to more accurately detect user inputs. Another type of hybrid sensor that includes a voting system similar to that of hybrid sensor is disclosed in PCT Patent App. For example, the PMUT layer <NUM> may detect the presence of an object, such as the user's finger, in proximity to the hybrid sensor <NUM>, whereas PZR sensor <NUM> can detect an amount of applied force to the hybrid sensor <NUM>. As used herein, "proximity" may refer to a threshold distance from the hybrid sensor <NUM>, which may be predefined and/or tunable during manufacturing of the hybrid sensor <NUM>. For example, the threshold distance may be one inch or less, such that the PMUT layer <NUM> detects the presence of an object (e.g., a finger) when the object is within one inch of the hybrid sensor <NUM>. However, it will be appreciated that the threshold distance for defining "proximity" may be variable in various implementations of the hybrid sensor <NUM>. For example, it may be beneficial for the hybrid sensor <NUM> to be more sensitive to the presence of an object (i.e., a greater threshold distance) in certain devices than in others.

Subsequently, the CMOS element <NUM>, the BJT <NUM>, and/or the DMOS element <NUM> as shown in <FIG> (or the CMOS element <NUM> and/or the DMOS element <NUM> as shown in <FIG>) may convert the respective signals received from the PZR sensor <NUM> and the PMUT layer <NUM> to digital outputs, which can then be compared (e.g., as part of "processing") to respective thresholds to determine whether the user actually interacted with (i.e., touched) a surface associated with the hybrid sensor <NUM> (e.g., a "true touch event") or whether an event detected by either of the PZR sensor <NUM> or the PMUT layer <NUM> was a "false touch event" (i.e., the user did not actually touch the surface).

This disclosure contemplates that the respective thresholds can be set to any value distinguishing between touch/no touch for each of the PZR sensor <NUM> and the PMUT layer <NUM>, for example, with a touch event mapping to a digital '<NUM>' and a no-touch event mapping to a digital '<NUM>. ' In this example, if the outputs of both the PZR sensor <NUM> and the PMUT layer <NUM> agree (e.g., the output signals of the PZR sensor <NUM> and the PMUT layer <NUM> are both converted to digital 'high' signals, or '<NUM>'), then the event may be classified as a true touch event. However, if the outputs of both the PZR sensor <NUM> and the PMUT layer <NUM> do not agree (e.g., the output signals of one of the PZR sensor <NUM> or the PMUT layer <NUM> is converted to a digital '<NUM>' while the output of the other component is a '<NUM>'), then the event may be classified as a false touch event.

Referring now to <FIG>, a diagram of a PZR implant process is shown, according to some embodiments. The implant process described herein may be implemented to manufacture at least a portion of the hybrid sensor <NUM>, as described above. For example, the implant process shown in <FIG>, and further described below with respect to <FIG>, may be used to manufacture at least a portion of the PZR sensor <NUM> and/or the CMOS element <NUM>. In some embodiments, the CMOS DNWell <NUM> is first formed using a photoresist mask <NUM> which exposes a portion of the substrate. Specifically, the CMOS DNWell <NUM> may be implanted through a screen SiO<NUM> layer <NUM> at a first portion of the substrate exposed by the photoresist mask <NUM> (not shown). Subsequently, the PZR DNWell <NUM> may be implanted through the screen SiO<NUM> layer <NUM> at a second portion of the substrate exposed by the photoresist mask <NUM>, as shown in <FIG>.

In some embodiments, once both the CMOS DNWell <NUM> and the PZR DNWell <NUM> are implanted, various oxide layer deposition and thermal annealing steps are performed. In some such embodiments, a CMOS PWell <NUM> and the PZR element <NUM> are then implanted. Specifically, the CMOS PWell <NUM> can be implanted through a first portion of an oxide layer that is exposed through the photoresist mask <NUM> (not shown). The PZR element <NUM> may be implanted a second exposed area of the photoresist mask <NUM> and into the already defined PZR DNWell <NUM>. In some embodiments, additional layers are implanted to form CMOS devices (e.g., the CMOS element <NUM>), deposit oxide/nitride layers, and create electrical connections using poly-Si or metal (e.g., Al), such as the various electrical connections and traces shown in <FIG> and <FIG>. It is important to note that each downstream deposition process (e.g., after the processes shown in <FIG>) in which the device (e.g., the hybrid sensor <NUM>) experiences significantly high temperatures (e.g., > <NUM>) for an extended period of time can affect the finished doping profile of the PZR element <NUM> and the PZR DNWell <NUM>. Accordingly, the thermal budget must be carefully considered when formulating implant recipes for the PZR element <NUM> and the PZR DNWell <NUM>.

Referring now to <FIG>, a diagram illustrating an example CMOS process <NUM> is shown, according to some embodiments. In some embodiments, the CMOS process <NUM> is at least a portion of a manufacturing process for force and/or hybrid force sensor. Accordingly, the CMOS process <NUM> may include various steps illustrated in <FIG> and described above. For example, at step <NUM>, a CMOS DNWell (e.g., the CMOS DNWell <NUM>) may be implanted into a substrate (e.g., the Si layer <NUM>). At step <NUM>, a PZR DNWell (e.g., the PZR DNWell <NUM>) may be implanted into the substrate (e.g., the Si layer <NUM>) and, subsequently, the CMOS DNWell and PZR DNWell are annealed. At step <NUM>, CMOS N and P regions are implanted (e.g., into the CMOS DNWell). At step <NUM>, a PZR (e.g., the PZR element <NUM>) is implanted (e.g., into the PZR DNWell) and is annealed. At step <NUM>, N+ and P+ regions are implanted and annealed. Finally, at step <NUM>, various additional deposition steps are performed.

Referring now to <FIG>, a diagram illustrating an example HV/BDC process <NUM> is shown, according to some embodiments. In many respects, the process <NUM> is similar to the process <NUM>, as described above. For example, steps <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, and <NUM> of process <NUM> may be similar to or the same as steps <NUM>-<NUM> of process <NUM>. Thus, for the sake of conciseness, steps <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, and <NUM> are not repeated. However, unlike a device manufactured using the process <NUM>, which does not include HV or BCD process layers, the process <NUM> may be implemented to manufacture a device (e.g., the hybrid sensor <NUM>) that does include HV and/or BCD process layers (e.g., the BCD process layer <NUM> and/or the HV process layer <NUM>).

In this regard, the process <NUM> includes additional steps for implanting elements both before and after the CMOS/PZR implant stages (e.g., steps <NUM> and <NUM>) to create these HV/BCD process layers. For example, at step <NUM>, an HV Well is implanted and annealed. At step <NUM>, after the CMOS DNWell and PZR DNWell are implanted and annealed, an HV body may be implanted. In other words, these additional steps of the process <NUM> may be implemented to implant at least the DMOS element <NUM>, as described above with respect to <FIG>.

It will be appreciated that the exact order steps of the process <NUM> may vary and that, in some embodiments, the process <NUM> may include additional or fewer steps than what is shown in <FIG>. For example, the order of implanting various elements and/or the order of the thermal annealing stages shown in the process <NUM> can vary depending on the specific base HV/BCD process used. However, the process <NUM> generally includes additional steps over a more traditional CMOS process, such as the process <NUM>. Thus, it is important to note that the thermal budget of the hybrid sensor formed using the process <NUM> may require different implant recipes (e.g., for the CMOS DNWell, PZR DNWell, etc.) to produce a similar doping profile as a device manufactured using the process <NUM>.

Referring generally to <FIG>, various packaging formats (i.e., implementations) of hybrid sensor <NUM> are shown. It should first be noted, however, that the hybrid sensor <NUM> is not limited to the various packaging forms described below; rather, these types of packaging are provided as examples and various other packaging/implementations are contemplated herein. Turning first to <FIG>, diagrams illustrating a configuration of the hybrid sensor <NUM> in an open cavity molded package <NUM> are shown, according to some embodiments. As shown, the hybrid sensor <NUM> is positioned in a molded package and is disposed atop a frame substrate <NUM>, which may be a laminate frame substrate, a lead frame substrate, or any other type of substrate.

In some embodiments, the hybrid sensor <NUM> is electrically coupled to a frame substrate <NUM>, also referred to as laminate substrate <NUM>, via one or more bonding wires <NUM>, which may be formed of aluminum, gold, or any other suitable and electrically conductive material (e.g., copper). As shown, the bonding wires <NUM> may extend from several contacts on the top side of the hybrid sensor <NUM> to the frame substrate <NUM>. In some embodiments, the hybrid sensor <NUM> is also encapsulated in a molding compound <NUM>. As described herein, the molding compound <NUM> may be formed of any material or combination of materials for helping to secure hybrid sensor <NUM> to frame substrate <NUM> and is generally not electrically conductive so as to not affect the operation of the hybrid sensor <NUM> and/or the transmission of electrical signals on the bonding wires <NUM>. Thus, any suitable molding compound is contemplated herein.

In some embodiments, rather than electrically coupling the hybrid sensor <NUM> to the frame substrate <NUM>, the bonding wires <NUM> can electrically couple the hybrid sensor <NUM> directly to one or more contacts <NUM>. Alternatively, the bonding wires <NUM> can electrically couple the hybrid sensor <NUM> to the contacts <NUM> via a printed circuit board (PCB) or a flexible printed circuit (FPC) <NUM>. For example, the FPC <NUM> may include various electrical traces (not shown) to which the hybrid sensor <NUM> may be electrically coupled. The contacts <NUM> may be formed of solder, copper, aluminum, or any other electrically conductive material. As shown, the contacts <NUM> may be cylindrical in shape but may also be of any other shape. For example, in some embodiments, the contacts <NUM> may be balls of solder positioned on a bottom side of frame substrate <NUM>. In some embodiments, the electrical contacts <NUM> may electrically and/or mechanically couple the hybrid sensor <NUM> to the FPC <NUM>.

As also shown in <FIG>, in some embodiments, a cavity <NUM> may be formed in molding compound <NUM>. In particular, the cavity <NUM> may be centered over the portion of the hybrid sensor <NUM> including the PMUT layer <NUM> to allow for the transmission and reception (e.g., by the PMUT layer <NUM>) of ultrasonic pressure waves. In some embodiments, the cavity <NUM> may be filled with a medium that aids in the transmission of ultrasonic pressure waves. In <FIG>, for example, the cavity <NUM> is filled with an adhesive <NUM>. Accordingly, the adhesive <NUM> may be any suitable material that allows the propagation of ultrasonic pressure waves. In some embodiments, the adhesive <NUM> extends beyond the edges of the cavity <NUM> and covers a portion of the molding compound <NUM>. The adhesive <NUM> may also bond the hybrid sensor <NUM>, the frame substrate <NUM>, and/or the molding compound <NUM> to a touch surface <NUM>. While shown as an aluminum surface in <FIG>, it will be appreciated that the touch surface <NUM> may be any surface that a user may interact with, such as a glass or plastic surface.

Referring now to <FIG>, diagrams illustrating an alternate configuration of the hybrid sensor <NUM> in an open-cavity molded package <NUM> are shown, according to some embodiments. In many ways, the alternate configuration of the hybrid sensor <NUM> shown in <FIG> is similar to the configuration shown in <FIG>. For example, both configurations show that the hybrid sensor <NUM> is positioned on the frame substrate <NUM> and is electrically coupled to the frame substrate <NUM> and/or the contacts <NUM> via the bonding wires <NUM>. Additionally, the hybrid sensor <NUM> is shown to be encapsulated in the molding compound <NUM>. However, unlike the configuration shown in <FIG>, the open-cavity molded package <NUM> does not include a cavity formed into molding compound <NUM> (e.g., the cavity <NUM>).

Referring now to <FIG>, diagrams illustrating a configuration of the hybrid sensor <NUM> in a back-side wafer-level chip-scale package (WLCSP) <NUM> are shown, according to some embodiments. As shown, in this configuration, the hybrid sensor <NUM> may include one or more contacts <NUM> positioned on a bottom side of the device, opposite of the PMUT layer <NUM>. The contacts <NUM> may be any suitable, electrically conductive material that can electrically and/or mechanically couple the hybrid sensor <NUM> to FPC <NUM>. For example, in <FIG>, the contacts <NUM> are illustrated as balls of solder. In some embodiments, the hybrid sensor <NUM> is electrically coupled to the contacts <NUM> via one or more through-silicon via (TSV) connections <NUM>, which extend from contacts positioned on a top side of the hybrid sensor <NUM> to the bottom side of the hybrid sensor <NUM>. In some embodiments, the TSV connections <NUM> extend through an insulating layer <NUM>, which may be formed of polyimide or any other suitable material. In some embodiments, the WLSCP <NUM> further includes a metal redistribution layer (RDL) positioned over the insulating later <NUM>, which allows the contacts <NUM> to be at different positions than the TSV connections <NUM>. For example, the TSV connections <NUM> may electrically couple the hybrid sensor <NUM> to an RDL, and the contacts <NUM> may be electrically coupled to the RDL at various positions.

Referring now to <FIG>, diagrams illustrating a configuration of the hybrid sensor <NUM> in a standard WLSCP <NUM> are shown, according to some embodiments. In some respects, the configuration of the WLSCP <NUM> is similar to the configuration of the WLSCP <NUM>; however, in the configuration shown in <FIG>, the contacts <NUM> are positioned on a top side of the hybrid sensor <NUM> (e.g., on the same side as the PMUT layer <NUM>). As shown, for example, the contacts <NUM> extend directly from the top contacts of the hybrid sensor <NUM> to electrically and/or mechanically couple the hybrid sensor <NUM> to the FPC <NUM>. In some other embodiments, an insulating layer and/or an RDL may be positioned over the hybrid sensor <NUM> to allow for the contacts <NUM> to be electrically connected to the hybrid sensor <NUM> via the RDL. In some such embodiments, the RDL may be positioned over the insulating layer.

In some embodiments, the adhesive <NUM> is disposed over the top of the hybrid sensor <NUM> and/or the FPC <NUM> for mechanically coupling the hybrid sensor <NUM> and/or the FPC <NUM> to the touch surface <NUM>. In some embodiments, an acoustic window <NUM>? may be formed in the FPC <NUM> to allow for the propagation of ultrasonic pressure waves (e.g., transmitted and received by PMUT layer <NUM>) from/to the hybrid sensor <NUM>. As shown, in some embodiments, the acoustic window <NUM>? is filled with the adhesive <NUM>, which may be any material that aids in the transmission of ultrasonic pressure waves. As shown in <FIG>, however, the acoustic window <NUM>? is not formed in FPC <NUM> in certain embodiments.

Therefore, from one perspective, there has been described that a hybrid sensor can includes a piezoresistive element for sensing an applied force, a piezoelectric micromachined ultrasonic transducer (PMUT) for sensing the presence of an object within a threshold distance of the hybrid sensor, and a substrate onto which both the piezoresistive element and the PMUT are disposed.

The construction and arrangement of the systems and methods as shown in the various example embodiments are illustrative only. Although only a few embodiments have been described in detail in this disclosure, many modifications are possible (e.g., variations in sizes, dimensions, structures, shapes and proportions of the various elements, values of parameters, mounting arrangements, use of materials, colors, orientations, etc.) without departing from the scope of the claims. For example, the position of elements may be reversed or otherwise varied, and the nature or number of discrete elements or positions may be altered or varied. The order or sequence of any process or method steps may be varied or re-sequenced according to alternative embodiments. Other substitutions, modifications, changes, and omissions may be made in the design, operating conditions, and arrangement of the example embodiments without departing from the scope of the claims. It is to be understood that the methods and systems are not limited to specific synthetic methods, specific components, or to particular compositions. It is also to be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting.

As used in the specification and the appended claims, the singular forms "a," "an" and "the" include plural referents unless the context clearly dictates otherwise. When such a range is expressed, another embodiment includes¬ from the one particular value and/or to the other particular value. Similarly, when values are expressed as approximations, by use of the antecedent "about," it will be understood that the particular value forms another embodiment. It will be further understood that the endpoints of each of the ranges are significant both in relation to the other endpoint, and independent of the other endpoint.

Throughout the description and claims of this specification, the word "comprise" and variations of the word, such as "comprising" and "comprises," means "including but not limited to," and is not intended to exclude, for example, other additives, components, integers or steps. "Exemplary" means "an example of" and is not intended to convey an indication of a preferred or ideal embodiment. "Such as" is not used in a restrictive sense, but for explanatory purposes.

Claim 1:
A hybrid sensor (<NUM>) comprising:
a piezoresistive element (<NUM>) for sensing an applied force;
a piezoelectric micromachined ultrasonic transducer (<NUM>), PMUT, for sensing the presence of an object within a threshold distance of the hybrid sensor; characterized in that the hybrid sensor further comprises
a substrate (<NUM>) onto which both the piezoresistive element and the PMUT are disposed,
wherein the piezoresistive element is implanted into a surface of the substrate, and wherein the PMUT is layered over the surface of the substrate.