Patent Description:
Polar code has been proposed for the enhanced mobile broadband (eMBB) control channel. The polar code is also a candidate of channel coding for machine type communication (mMTC). As compared to other channel coding solutions, polar coding has advantages, such as low complexity and capacity achieving. Therefore, for example in a fifth generation (<NUM>) mobile communication system, polar coding will play an important role.

Regarding polar code, the often used decoding solution includes a list based solution or a cyclic redundant check (CRC) aided list solution. A list is a characterization of a decoding path. That is, for the solution in which the list has a size of L, L branches are to be retained in decoding. In order to obtain satisfactory performances, a list of a large size is required, for example, L = <NUM>. However, the complexity of the polar code may be modeled as a function of L, namely L*log<NUM>N, where N is the size of an unpunctured codeword and L is the list size. It can be seen from the complexity modeling that the complexity of polar code increases in proportion to the list size. Moreover, storage space consumed in a decoding process may also be determined by the list size.

Therefore, though a large list size can provide a good decoding performance, such as a low block error rate (BLER), it consumes more storage space and has an increased decoding complexity, resulting higher power consumption and longer decoding latency. This is a disadvantage for certain receiving devices, especially for an mMTC terminal. A parity check-based solution (PC-Polar) has been proposed, which has lower complexity than a traditional CRC-aided list solution. However, PC-Polar is still not optimal, for example, it has a high false alarm rate (FAR) and its performance is not sufficiently optimized. In addition, code construction and check bits of the PC-Polar are not very efficient, because it cannot protect the information bits.

<NPL>, discloses Parity-Check-Concatenated Polar Codes. Parity bits are spread, scattered among a sequence of information bits and a parity bit value is generated according to the value of some preceding information bits in the sequence. At the receiver, parity-check aided SCL decoder is used, and the parity bits are used to quickly detect and prune error paths. <NPL>, discloses Segmented CRC-Aided SC List Polar Decoding. CRC bits are distributed inside the information bits so that the polar decoder can use these CRC bits for tree pruning. It is also suggested to exchange rows and column of the CRC generator matrix for this purpose.

A brief summary of various embodiments will be given below to provide basic understanding on some aspects of various embodiments. It should be noted that this Summary is not intended to identify essential points of key elements or describe the scope of various embodiments. The sole purpose is to present some concepts in a simplified manner to acts as a preamble of the following detailed description. Independent claim <NUM> defines a method for encoding information bits with error detection bit using polar encoding according to the claimed invention. Independent claim <NUM> defines a method for decoding information bits with error detection bit encoded with polar encoding according to the claimed invention. Independent claims <NUM> and <NUM> define the communication devices according to the claimed invention corresponding to the methods defined in independent claims <NUM> and <NUM> respectively.

The exemplary embodiments and features, if any, described in this specification, that do not fall under the scope of the independent claims, are to be interpreted as examples useful for understanding various exemplary embodiments of the disclosure.

Through the description below, it would be appreciated that, in accordance with embodiments of the present disclosure, the communication device can obtain the desired decoding performance with lower complexity, and provide a better error detection capability in the meantime.

It would be appreciated that the contents as described in this Summary is not intended to identify key features or essential features of the embodiments of the present disclosure, nor is it intended to be used to limit the scope of the claimed subject matter. Other features of the present disclosure will be made apparent by the following description.

Through the contents disclosed below and the claims, the objectives, advantages, and other features of the present disclosure will become more apparent. Only taken as examples herein, non-limiting description of the preferred embodiments will be given with reference to the drawings in which:.

In the following, details are illustrated for the purpose of clarification. However, those skilled in the art would realize that the present disclosure can be implemented without these specific details. Therefore, the present invention is not meant to be confined to the embodiments as shown, but should be endowed with the broadest scope conforming to the principles and features as described herein.

It would be appreciated that terms such as "first" and "second" are only used to differentiate one element from another. As a matter of fact, a first element may be called a second element, or vice versa. Besides, it would be understood that "include" and "comprise" are only used to demonstrate the presence of a feature, an element, a function, or a component as described herein, without excluding the presence of one or more other features, elements, functions, or components.

For ease of explanation, in this context, some embodiments of the present disclosure will be introduced with wireless communications, such as cellular communications, as the background, and terms in Long Term Evolution/Long Term Evolution - Advanced (LTE/LTE-A) formulated by 3GPP or in <NUM> are employed. However, those skilled in the art would appreciate that embodiments of the present invention are not limited to wireless communication systems conforming to wireless communication protocols formulated by 3GPP, but may be applicable to any communication system containing a similar issue, such as WLAN, a wired communication system, or other communication systems to be developed in the future.

Likewise, the terminal device in the present disclosure may be a user equipment (UE), or any terminal having a wired or wireless communication function, including, but not limited to, a mobile phone, a computer, a personal digital assistant, a game machine, a wearable device, a on-vehicle communication device, a Machine Type Communication (MTC) device, a Device-to-Device (D2D) communication device, a sensor and so on. The term "a terminal device" can be used interchangeably with a UE, a mobile station, a subscriber station, a mobile terminal, a user terminal, or a wireless device. In addition, the network device may be a network node, such as a node B (Node B or NB), a base transceiver station (BTS), a base station (BS), or a base station system (BSS), a relay, remote wireless front (RRF), an access node (AN), an access point (AP), etc..

<FIG> is a diagram illustrating an example wireless communication system <NUM> in which a method in accordance with embodiments of the present disclosure can be implemented. The wireless communication system <NUM> may include one or more network devices <NUM>. For example, in the wireless communication system <NUM>, the network device <NUM> may be embodied as a base station, such as an evolved node B (eNodeB or eNB). It would be appreciated that the network device <NUM> may be embodied in other manners, such as a node B, a basic transceiver station (BTS), a base station (BS), or a base station sub-system (BSS), a relay and so on. The network device <NUM> provides a wireless connection to a plurality of terminal devices <NUM>-<NUM> within the coverage thereof. The terminal devices <NUM> and <NUM> may communicate with a network device via a wireless transmission channel <NUM> or <NUM>, and/or may communicate with each other via a wireless transmission channel <NUM>.

<FIG> is a simplified diagram illustrating processing implemented at a transmitting device <NUM> and a receiving device <NUM> in communication. The network device <NUM> or the terminal devices <NUM> and <NUM> in <FIG> may act as the transmitting device <NUM> and/or the receiving device <NUM>.

As shown in <FIG>, in order to ensure reliable transmission of data (including control signaling), a transmitting device performs channel coding (<NUM>) on the data to be transmitted to introduce redundancy, thereby resisting distortion probably introduced in a transmission channel (for example, <NUM>, <NUM>, and <NUM> in <FIG>). Alternatively, the channel-coded data may be further channel interleaved (not shown) and/or modulated (<NUM>) before being transmitted. At a receiving device, a process reverse to that of the transmitting device is performed. That is, the received signal is demodulated (<NUM>), de-interleaved (not shown) and decoded (<NUM>) to recover the transmitted data. In some embodiments, other or different processing may be involved at the transmitting device, and the receiving device may perform a reverse operation accordingly.

In the embodiments of the present disclosure, polar code is used in the channel encoding processing <NUM> in <FIG>. For polar code with a code length N (for example, N = <NUM>n), assuming that its code rate is K/N, K = [<NUM>, N] information bits can be transmitted. Apart from the K information bits, N-K bits are redundant bits configured with fixed values (for example, <NUM> or any other appropriate values), which are referred to as frozen bits. The values of frozen bits are considered as being known, and therefore are represented by known values or a probability corresponding to the known value (for example, a specific value of a log likelihood ratio (LLR)) during decoding).

The polar coding implements polarization of the channel by two steps, namely channel combination and channel splitting. It should be note that the channel herein is a coding channel, namely a channel involved in the coding process from an input to an output, rather than the transmission channels <NUM>-<NUM> in <FIG>. A channel allowing each channel bit to pass there through may be called a sub-channel. Different split sub-channels have different channel transfer probabilities. Due to the presence of a channel transfer characteristic, for the polar encoding, if an error occurs to a certain bit decoded previously, it may affect the following bit decoding, thus resulting in error spread.

At the modulation processing <NUM> in <FIG>, any modulation technique known or to be developed in the future may be used, such as BPSK, QPSK, 64QAM. The embodiments of the present disclosure are not limited to any specific modulating manner. It would be appreciated that, in modulation <NUM> of the receiving device <NUM>, a de-modulating manner will be varied in accordance to the modulating manner. As those skilled in the art would appreciate, the receiving device may use, alternatively or in addition, processing other than de-modulation, based on different processing used by the transmitting device.

In some embodiments of the present disclosure, the decoding <NUM> as shown in <FIG> may use, for example but is not limited to, a list-based decoding method, or a method based on a sequence cancellation (SC), or any decoding method known or to be developed in the future.

In order to improve the decoding performance, to reduce FAR, and to provide a better error detecting capability, the embodiments of the present disclosure provide methods and apparatuses for improving coding and decoding. Now referring to <FIG>, the example methods in accordance with the embodiments of the present disclosure are described. For ease of discussion, the description about <FIG> will be made with reference to the environment as shown in <FIG>.

<FIG> is a flowchart illustrating a method <NUM> in accordance with the embodiments of the present disclosure. The method <NUM> is implemented at a communication device acting as the transmitting device in the communication network <NUM>. For example, the communication device may be the terminal devices <NUM>, <NUM>, or the network device <NUM> in <FIG>. For ease of description, the method <NUM> will be described with reference to the network device <NUM> in <FIG>. It would be appreciated that the method <NUM> may also include additional steps not shown and/or may skip over the shown steps, and the scope of the present disclosure is not limited in this regard.

As shown in <FIG>, in block <NUM>, the network device <NUM> adds frozen bits used for polar encoding by performing bit extending on the information bits to be coded. As described in the foregoing, the frozen bits may be configured to be a fixed value. For sake of simplification, the frozen bits may be configured as <NUM> in the description below. However, it would be appreciated that the frozen bits may also be configured as other fixed values, and the scope of the present disclosure is not limited in this regard. In some embodiments, any method known or to be developed in the future may be used for bit extension, so as to add the frozen bits for polar encoding to the information bits to be encoded.

Besides, it would be appreciated that it is not necessary to add the frozen bits for polar encoding to the information bits to be encoded. In an alternative embodiment, the polar code which has not been bit extended may be used. That is, the block <NUM> may be skipped over in some embodiments.

In block <NUM>, the network device <NUM> generates, based on an intended performance, an error detection code to be used. In some embodiments, the error detection code may include linear grouping code, such as a CRC code, a BCH code, a Hamming code, or a Gray code. For the purpose of description, in the following description, the CRC code acts as an example of the error detection code. However, it should be appreciated that other types of the error detection code may also be applied, such as parity check code, the error detection code generated based on a Hash function and so on. The scope of the present disclosure is not limited in this aspect.

The performance as described herein is for example a decoding performance of the polar code. In some embodiments, for example in a CRC-aided list decoding solution, the network device <NUM> may determine a number of information bits to be used based on a size of the used list. Besides, in some embodiments, the network device <NUM> may determine the number of CRC bits based on the number of the information bits to be encoded. For example, <NUM> CRC bits may be used for <NUM>-<NUM> information bits, while <NUM> CRC bits may be used for <NUM>-<NUM> information bits. For example, a lookup table about the CRC bit number may be predefined, and the number of CRC bits to be used may be determined based on the lookup table.

In some embodiments, a CRC generating polynomial may be obtained based on the determined number of CRC bits and the extended information bits (for example, including frozen bits). A corresponding CRC generator matrix may be obtained based on the CRC generator polynomial. By multiplying the extended information bits and the CRC generator matrix, input bits appended with the corresponding CRC bits (the input bits described herein refer to the bits to be subjected to the polar encoding) may be obtained. Generation of the CRC bits may be implemented using an existing CRC encoder. Further detailed description will be made with reference to specific examples.

In block <NUM>, the network device <NUM> distributes the bits of the error detection code in the information bits to be encoded. In some embodiments, the network device <NUM> may allocate the CRC bits into the information bits by transforming the CRC generator matrix. Description will be made using the specific examples.

For example, the K information bits are extended into N-P bits by the bit extension. N is a total number of input bits and P is a number of CRC bits. Assume K = <NUM>, P = <NUM>, and N = <NUM>, herein. The obtained CRC generator polynomial is for example [<NUM><NUM><NUM><NUM>]. <FIG> shows a corresponding CRC generator matrix <NUM> corresponding to the CRC generator polynomial.

As shown in <FIG>, the matrix <NUM> includes an information section <NUM> and a CRC section <NUM>. The information section <NUM> therein is a unit matrix with <NUM> rows and <NUM> columns, which corresponds to extended information bits. The CRC section <NUM> has <NUM> columns respectively corresponding to <NUM> CRC bits.

It can be seen from the CRC section <NUM> that each CRC bit is a modulo <NUM> sum of <NUM> extended information bits. Assuming that the seventh extended information bit is a frozen bit (for example, being configured as <NUM>), a row <NUM> associated with the frozen bit may be referred to as a frozen row. A column <NUM> in the matrix <NUM> corresponds to the first CRC bit which is associated with the first, the third, and the seventh extended information bit. Because the seventh extended information bit is a frozen bit (namely, <NUM>), the first CRC bit is, in fact, only associated with the first and the third extended information bit.

According to the claimed invention, the column <NUM> may be swapped with the fourth column <NUM> in the information section <NUM>, such that the first CRC bit is distributed behind the third information bit. As such, when the polar decoding is performed at a receiving device, after the first information bit, the third information bit, and the first CRC bit are solved, the first CRC bit may be used to check the first information bit and the third information bit, so as to perform a "pruning" operation in a decoding process, thereby improving the decoding performance. Implementation of the example about the pruning operation will be further described in detail below. It would be appreciated that the column <NUM> is not limited to be swapped with the column <NUM>, and may be inserted at the left side of the column <NUM> or swapped with the column <NUM> between the column <NUM> and the column <NUM>. That is, the first CRC bit may be distributed as adjacent to the information bit associated therewith.

In some embodiments, for the first CRC bit, a non-frozen row containing <NUM> in the CRC section is searched from the bottom up regarding the column <NUM> associated therewith, and for example, the row <NUM> may be obtained. The row <NUM> and the row <NUM> may be swapped, such that the CRC section <NUM> is changed into a similarity of the upper triangular matrix. Therefore, the information bit associated with the first CRC bit can be solved early at the decoding phase.

In some embodiments, the above two types of matric transforming may be combined. For example, the row <NUM> and the row <NUM> may be swapped first, and the row <NUM> is swapped to the position of the row <NUM>. That is, the information bit associated with the first CRC bit can be solved early at the decoding phase, and according to the claimed invention, the first CRC bit is distributed as adjacent to the information bit associated therewith, thereby providing a better error detecting capability while further improving the decoding performance.

In addition or alternatively, in some embodiments, regarding the matrix <NUM>, the frozen row containing <NUM> in the CRC section is searched from the bottom up. For example, the row <NUM> may be found. For example, the row <NUM> and the row <NUM> may be summed up (for example, modulo <NUM> sum) to eliminate a number of <NUM> in the CRC section <NUM> located in the row <NUM>. That is, the frozen row is used to reduce the number of the information bits associated with the third CRC bit. The operation may be performed iteratively until the number of <NUM> in the CRC section <NUM> is reduced to log<NUM>L + t, where t is a number from [-<NUM>, N]. In this way, the decoding performance of the polar code can be further improved.

It should be noted that, after the matrix transformation is performed (i.e., the row <NUM> is added to the row <NUM>), the value is changed to <NUM> at an intersection of the row <NUM> with the column <NUM>. That is, the value of the seventh input bit is a sum of the fifth extended information bit and the seventh extended information bit. It is undesirable because the seventh input bit is a frozen bit which is always <NUM>. It would be appreciated that a reverse operation corresponding thereto is required at the receiving device to recover the value at the intersection of the row <NUM> with the column <NUM>.

In addition or alternatively, in some embodiments, transformations, other than the one as mentioned above, may be performed for the matrix <NUM>, such that the CRC bits are distributed more evenly into the input bits to be encoded.

Besides, the CRC bits may be mapped to the worst sub-channel or the best sub-channel of the polar code, or may be mapped, together with the information bits, in accordance with a decoding order. The scope of the present disclosure is not limited in this aspect.

It should be appreciated that these matrix transformations are performed regarding the output of the block <NUM> (i.e., the output of the CRC encoder), and it is unnecessary to make any change to the existing CRC encoder.

Returning to <FIG>, in some embodiments, in the block <NUM>, the information bits together with the error detection code distributed therein are polar-encoded. In some embodiments, in presence of bit extension, the information bits and the frozen bits together with the error detection code distributed therein are polar-encoded. Any polar encoder known or to be developed in the future may be used for performing the coding operation.

It can be seen from the foregoing description that, though the embodiments of the present disclosure can improve the polar decoding performance, reduce FAR, and provide a better error detecting capability, it is unnecessary to make any change to the existing CRC encoder and/or polar encoder. Therefore, there is a low implementation complexity of the embodiments of the present disclosure.

It would be appreciated that the order of steps of the method <NUM> may be different than the order of steps as shown in <FIG>. For example, the error check code generator matrix may be first transformed to distribute bits of the error check code into the information bits to be encoded, and the error check code is then generated using the transformed generator matrix. That is, the block <NUM> may be performed prior to the block <NUM>.

<FIG> is a flowchart illustrating a method <NUM> in accordance with the embodiments of the present disclosure. The method <NUM> is implemented at a communication device acting as the receiving device in the communication network <NUM>. For example, the communication device may be the terminal device UE <NUM> or <NUM>, or the network device <NUM> in <FIG>. For ease of description, the method <NUM> will be described with reference to UE <NUM> of <FIG>. It would be appreciated that the method <NUM> may further include additional steps not shown and/or may skip over steps as shown, and the scope of the present disclosure is not limited in this aspect.

As shown in <FIG>, location information related with an error detection code used in the polar code is obtained in a block <NUM>. In some embodiments, UE <NUM> may acquire a generator matrix corresponding to the error detection code (e.g. CRC code), and the location information is then obtained based on the generator matrix. For example, the generator matrix corresponding to the CRC code may be agreed by receiving and transmitting parties in advance.

In a block <NUM>, UE <NUM> performs polar decoding on the received polar-encoded data based on the location information, so as to obtain output bits. In some embodiments, for example, in the CRC-aided list decoding solution, UE <NUM> may perform the pruning operation in decoding process using the location information. In this regard, <FIG> is a flowchart illustrating a method <NUM> of a pruning operation in the polar decoding process. It would be appreciated that the method may further include additional steps not shown and/or may skip over steps as shown, and the scope of the present disclosure is not limited in the aspect.

In a block <NUM>, UE <NUM> may obtain the location of the CRC bit distributed in the output bits based on the generator matrix. According to the claimed invention, the CRC bit may be associated with a first output bit in the output bits. In a block <NUM>, in response to the CRC bit and the first output bit having been decoded, UE <NUM> may check the first output bit using the CRC bit. In response to success of the checking, a decoding path including the first output bit is retained in a block <NUM>. In response to failure of the checking, the decoding path including the first output bit may be removed, for example in a case that the number of the decoding paths currently retained has reached a size of the used list, in a block <NUM>.

In some embodiments, besides "hard decision" as shown in blocks <NUM> and <NUM>, the pruning operation may use the manner of "soft decision. " For example, after performing the block <NUM>, when the checking fails, the decoding path including the first output bit is not directly removed, but for example a metric value (also referred to as "a punishment value") is allocated to the decoding path. As such, the decoding path can be removed only when the punishment value is greater than a predetermined threshold.

By the above pruning operation, the polar decoding performance can be improved, because it reduces a number of candidate paths such that a probability to correctly select a decoding path is increased.

Alternatively, in some embodiments, besides the above early pruning operation performed in the decoding process, the punning operation may be performed when all the candidate decoding paths have been determined. For example, at UE <NUM>, the paths passing the CRC check or the paths of low punishment values may be retained from all the candidate paths. In some other embodiments, it may be determined firstly whether the number of the decoding paths retained currently exceeds a predetermined threshold, and the pruning operation is performed when the number of decoding paths exceeds the predetermined threshold, thereby avoiding a high FAR.

Besides, in some embodiments, the pruning may be performed not only using a single CRC bit. For example, the pruning operation may be performed using a combination of several CRC bits (i.e., a component of the CRC generator matrix), so as to further improve the decoding performance.

Still referring to <FIG>, in a block <NUM>, UE <NUM> acquires the information bits from the output bits. For example, UE <NUM> may perform an inverse transformation on the CRC generator matrix to acquire the information bits from the output bits. The process of the inverse transformation corresponds to the process related with the description of the block <NUM> in <FIG>, and further detailed description will be omitted herein.

In a block <NUM>, UE <NUM> extracts the error detection code included in the output bits, so as to check the information bits. For example, the block <NUM> may be completed using the existing CRC decoder. That is, it is unnecessary to make any change to the existing CRC decoder in the embodiments of the present disclosure.

<FIG> is a block diagram showing an apparatus <NUM> in accordance with certain embodiments of the present disclosure. The apparatus <NUM> may be implemented at a communication device acting as the transmitting device, for example at the terminal device <NUM> or <NUM> side or at the network device <NUM> as shown in <FIG>. The apparatus <NUM> may be a software module based system, or may be a hardware component such as a transmitter or the like. Especially, in some embodiments, the apparatus <NUM> may be considered as an example implementation of the transmitting device itself.

As shown in <FIG>, the apparatus <NUM> may include: an error detection code generating unit <NUM> configured to generate, based on a desired performance, the error detection code to be used; a matrix transforming unit <NUM> configured to distribute bits in the error detection code in information bits to be coded; and a polar encoding unit <NUM> configured to perform polar encoding information bits together with the error detection code distributed in the information bits.

In some embodiments, the error detection code includes any one of CRC code, BCH code, Hamming code, and Gray code.

In some embodiments, the error detection code generating unit <NUM> is further configured to acquire a generator matrix corresponding to the error detection code; and to generate, based on the generator matrix, error check code.

In some embodiments, the matrix transforming means <NUM> is further configured to distribute, by transforming the generator matrix, bits of the error check code into the information bits.

According to the claimed invention, the error check code includes a first error detection bit which is associated with a first information bit in the information bits, and the matrix transforming unit <NUM> is further configured to transform at least one of a row and a column associated with the first error detection bit, and to distribute the first error detection bit as adjacent to the first information bit.

In some embodiments, the apparatus <NUM> may further include a bit extending unit configured to bit extend the information bits to add frozen bits for polar encoding.

In some embodiments, the matrix transforming unit <NUM> is further configured to reduce a number of information bits associated with bits in the error detection code by transforming rows associated with the frozen bits in a generator matrix.

In some embodiments, the polar encoding unit <NUM> is further configured to perform polar encoding on the information bits, the frozen bits, and the error detection code.

<FIG> is a block diagram illustrating an apparatus <NUM> in accordance with certain embodiments of the present disclosure. The apparatus <NUM> may be implemented at a communication device acting as a receiving device, for example at the terminal device <NUM> or <NUM> side or the network device <NUM> as shown in <FIG>. The apparatus <NUM> may be a software-based system, or may be a hardware assembly such as a receiver or the like. Particularly, in some embodiments, the apparatus <NUM> may be considered as an example implementation of the receiving device itself.

As shown in <FIG>, the apparatus <NUM> may include: an information acquiring unit <NUM> configured to acquire location information related with error detection code used in polar coding; a polar decoding unit <NUM> is configured to perform, based on the location information, polar decoding on received polar-encoded data to obtain output bits; a matrix transforming unit <NUM> configured to obtain information bits from the output bits; and a check unit <NUM> configured to extract error check code included in the output bits, to check the information bits.

The information acquiring unit <NUM> is further configured to acquire a generator matrix corresponding to the error detection code; and to obtain location information based on the generator matrix.

In some embodiments, polar decoding uses a list-based polar decoding process, the error detection code includes a first error detection bit, and according to the claimed embodiment, the polar decoding unit <NUM> is further configured to obtain, based on location information, a location of the first error detection bit distributed in the output bits, the first error detection bit being associated with a first output bit in the output bits; and in response to the first error detection bit and the first output bit being decoded, the first output bit is checked using the first error detection bit.

In some embodiments, the polar decoding unit <NUM> is further configured to, in response to success of the checking, retain a decoding path including the first output bit; and in response to failure of the checking, remove the decoding path including the first output bit.

In some embodiments, the polar decoding unit <NUM> is configured to, in response to failure of the checking, allocate a metric value to the decoding path including the first output bit; determine whether the metric value exceeds a second threshold; and in response to the metric value exceeding the second threshold, remove the decoding path including the first output bit.

In some embodiments, the polar decoding unit <NUM> is further configured to determine whether a number of decoding paths currently retained exceeds a first threshold; and in response to the number of decoding paths exceeding the first threshold, check the first output bit using a first error detection bit.

In some embodiments, the matrix transforming unit <NUM> is further configured to obtain information bits from the output bits by inversely transforming the generator matrix.

For clarity, some optional units of apparatuses <NUM> and <NUM> are not shown in <FIG>. However, it would be appreciated that each feature as depicted with reference to <FIG> is applicable to the apparatus <NUM>; and each feature as depicted with reference to <FIG> and <FIG> is likewise applicable to the apparatus <NUM>. Besides, each unit of the apparatus <NUM> and/or <NUM> may be a hardware module, or may be a software module. For example, in certain embodiments, the apparatus <NUM> may be partially or entirely implemented using software and/or firmware, for example implemented as a computer program product included on a computer readable medium. Alternatively or in addition, the apparatus <NUM> and/or <NUM> may be partially or entirely implemented based on hardware, for example implemented as an Integrated Circuit (IC), an Application-specific Integrated Circuit (ASIC), a System-on-a-chip systems (SOC), a Field-programmable Gate Array (FPGA), and the like. The scope of the present disclosure is not limited in the regard.

<FIG> is a block diagram illustrating a communication device <NUM> suitable for implementing embodiments of the present disclosure. The device <NUM> may be used to implement the transmitting device or the receiving device in the embodiments of the present disclosure, for example the network device <NUM> or terminal device as shown in <FIG>, or the first terminal device <NUM> or <NUM> as shown in <FIG>.

As shown in the example of <FIG>, the device <NUM> includes a processor <NUM>. The processor <NUM> controls operations and functionality of the device <NUM>. For example, in certain embodiments, the processor <NUM> may perform various operations by means of instructions <NUM> stored in a memory <NUM> coupled thereto. The memory <NUM> may be of any appropriate type applicable to a local technical environment, and may be implemented using any appropriate data storage technique, including but not limited to, a semiconductor-based storage device, a magnetic storage device and system, an optical storage device and system. Though <FIG> only shows a memory unit, the device <NUM> may include multiple physically different memory units.

The processor <NUM> may be of any appropriate type applicable to a local technical environment, and may include, but not limited to, one or more of general purpose computers, special purpose computers, microprocessors, digital signal processors (DSPs) and processors based on multicore processor architecture. The device <NUM> may further include multiple processors <NUM>. The processor <NUM> may be coupled to a transceiver <NUM> which may implement transmitting and receiving of information with aid of one or more antennae <NUM> and/or other components.

According to embodiments of the present disclosure, the processor <NUM> and the memory <NUM> may be operated in cooperation, to implement the methods <NUM>, <NUM>, and/or <NUM> as described with reference to <FIG>. Specifically, if the communication device <NUM> acts as a transmitting device, the communication device <NUM> may be used to perform the method <NUM> when the instructions <NUM> in the memory <NUM> are executed by the processor <NUM>. If the communication device <NUM> acts as a receiving device, the communication device <NUM> may be caused to perform the method <NUM> and/or <NUM> when the instructions <NUM> in the memory <NUM> are executed by the processor <NUM>. It would be appreciated that all features as described above are all applicable to the device <NUM>, which are omitted herein.

Some aspects may be implemented in hardware, while other aspects may be implemented in firmware or software which may be executed by a controller, a microprocessor or another computing device. While various aspects of embodiments of the present disclosure are illustrated and described as block diagrams, flowcharts, or using some other pictorial representation, it will be appreciated that the blocks, apparatus, systems, techniques or methods described herein may be implemented in, as non-limiting examples, hardware, software, firmware, special purpose circuits or logic, general purpose hardware or controller or other computing devices, or some combination thereof.

As examples, the embodiments of the present disclosure may be described in the context of the machine executable instruction which for example includes program modules executed in the device on a real or virtual processor. Generally, program modules include routines, programs, libraries, objects, classes, components, data structures, or the like that perform particular tasks or implement particular abstract data types. The functionality of the program modules may be combined or split between program modules as desired in various embodiments. Machine-executable instructions for program modules may be executed within a local or distributed device. In a distributed device, program modules may be located in both local and remote storage media.

These program codes may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the program codes, when executed by a computer or other programmable data processing devices, cause the functions/operations specified in the flowcharts and/or block diagrams to be implemented.

In context of the present disclosure, the machine readable medium may be any tangible medium that may contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine readable medium may be a machine readable signal medium or a machine readable storage medium. A machine readable medium may include but not limited to an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of the machine readable storage medium would include an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

Further, while operations are depicted in a specific order, this should not be understood as requiring that such operations be performed in the specific order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. Likewise, while several specific embodiment details are contained in the above discussions, these should not be construed as limitations on the scope of the present disclosure, but rather as descriptions of features that may be specific to particular embodiments.

Claim 1:
A method of data processing in a communication system, comprising:
generating (<NUM>), based on an intended performance, an error detection code to be used; the error code comprising any one of: a redundant cyclic check code, a BCH code or a Hamming code;
distributing (<NUM>) bits of the error detection code in information bits to be encoded; and
performing (<NUM>) polar encoding on the information bits together with the error detection code distributed in the information bits
wherein generating (<NUM>) the error detection code to be used comprises:
acquiring a generator matrix corresponding to the error detection code; and
generating the error detection code based on the generator matrix; and wherein
distributing (<NUM>) the bits of the error detection code in the information bits to be encoded comprises:
distributing the bits of the error detection code in the information bits by transforming the generator matrix; and wherein the error detection code comprises a first error detection bit, the first error detection bit being associated with a first information bit in the information bits,
characterized in that distributing the bits of the error detection code in the information bits to be encoded comprises:
distributing the first error detection bit to be adjacent to the first information bit by transforming at least one of a row and a column associated with the first error detection bit in the generator matrix.