Patent Description:
In the electronics industry, high integration and multiple functions with high performance become essential for new products. And meanwhile, high integration may cause higher manufacturing cost, since the manufacturing cost is in proportional to its size. Therefore, demanding on miniaturization of integrated circuit (IC) packages has become more and more critical.

System-in-package (SiP) is now the fastest growing semiconductor package technology since it is a cost-effective solution to high-density system integration in a single package. In a system-in-package structure, various device components are integrated in a single semiconductor package to reduce the size. Accordingly, there exists a need to provide a semiconductor package to overcomes, or at least reduces the above-mentioned problems.

The <CIT> discloses a hybrid integrated circuit device which can stabilize a circuit configured to operate at a high speed. The hybrid integrated circuit device includes a metal substrate provided with an insulating layer on a surface thereof, a conductive pattern formed on a surface of the insulating layer, a semiconductor element fixed onto the conductive pattern, a lead as external connecting means fixed to the conductive pattern in the periphery of the metal substrate, and a contact portion for electrically connecting the conductive pattern electrically through an off chip bond wire.

The <CIT> discloses a semiconductor package and a method for fabricating the same, wherein a plurality of through-holes is formed through the substrate. A plurality of passive elements such as a condenser, a diode, and an inductor are mounted on the through-holes and electrically connected therewidth. A sealing portion is used for protecting the semiconductor chip, the conductive wires, and the passive elements. A plurality of conductive balls is formed on the circuit patterns of the second substrate.

The <CIT> discloses apparatuses and methods for making simultaneous electrical connections, and more particularly for making these electrical connections simultaneously using a bond tip configuration. The electrical connection is made by placing an electrically conductive wire across a pair of electrical lines or pads that have to be electrically connected and then by using a special tip, both ends of the electrically conductive wire are simultaneously secured to the two electrically conductive lines or pads.

The <CIT> discloses a circuit board for realizing a downsizing of electronic appliances by increasing the surface mounting density of electronic components on a circuit board. A plurality of through holes is made through an insulating board, and an electronic component is mounted on the through hole. A land is connected directly with the through hole, and each electrode part of the surface mounted electronic component is soldered to the land on a pair of through holes. <CIT> discloses a semiconductor flip chip having vias under the chips as well as a peripheral via connected by a fly wire. The first pad is electrically connected to the bond wire through the circuit trace.

The problem of the present invention is solved by a semiconductor package according to the independent claim <NUM>.

The dependent claims refer to further advantageous developments of the present invention.

<FIG> illustrates a top view of a semiconductor package in one example useful for the understanding of the invention. <FIG> illustrates a cross-section view of the semiconductor package drawn along AA' line in <FIG>.

Referring to <FIG>, a first pad <NUM> and a second pad <NUM> are disposed on a surface <NUM> of a substrate <NUM>. The substrate <NUM> may be a printed circuit board (PCB), a semiconductor carrier board, or a package substrate such as a ball grid arrays (BGA) substrate or a pin grid array (PGA) substrate.

Referring to <FIG>, via-plugs <NUM>, <NUM> passing through the substrate <NUM> are respectively electrically connected to the first pad <NUM> and the second pad <NUM>, and may be electrically connected to conductive elements such as traces (not shown) on at least one other surface of the substrate <NUM>. In the example, the via-plugs <NUM>, <NUM> passing through the whole substrate <NUM> are formed by a method comprising forming openings in the substrate by drilling, etching or emitting laser, and then filling the openings with a conductive material e.g. copper, aluminum, etc..

In the example, the via-plug <NUM> is formed in a space between the first pad <NUM> and the second pad <NUM>. And the via-plug <NUM> electrically connects to the second pad <NUM>. Therefore, the space between the first pad <NUM> and the second pad <NUM> is used. It results in facilitating miniaturization of IC packages, or increasing of an extra area for additional elements or devices. Therefore, design flexibility of the semiconductor package is enhanced.

In the example, the via-plug <NUM> is electrically connected to the second pad <NUM> through a connecting member <NUM>, as shown in an enlarge view in <FIG>. Referring to <FIG>, the connection member <NUM> may be formed together with the second pad <NUM>. The via-plug <NUM> and the connection member <NUM> are covered by a solder resistance layer <NUM> (shown in <FIG>, but not shown in <FIG> for the sake of brevity). At least a portion of the first pad <NUM> and the second pad <NUM> is not covered by the solder resistance layer <NUM> (<FIG>) so as to reveal openings. In examples, the via-plug <NUM> and the second pad <NUM> are respectively formed in non-overlapping areas of the substrate <NUM>, as shown in <FIG>. In other word, the via-plug <NUM> is independent from the second pad <NUM>. An outline <NUM> of the via-plug <NUM> is generally a circle; an outline <NUM> of the second pad <NUM> is generally a square, but not limited thereto. The outline <NUM> of the via-plug <NUM> is independent from the outline <NUM> of the second pad <NUM>. In other words, the outline <NUM> and the outline <NUM> are non-overlapping. In the example, the outline <NUM> of the via-plug <NUM> and the outline <NUM> of the second pad <NUM> are separated by the connecting member <NUM>.

Referring to <FIG>, a surface mount device (SMD device) <NUM> may be mounted on the first pad <NUM> and the second pad <NUM> on the surface <NUM> of the substrate <NUM>. The SMD device <NUM> may be a passive device e.g. capacitor, resistor, inductor or electrostatic discharge component (ESD). The SMD device <NUM> includes a first electrode <NUM> and a second electrode <NUM>, which are respectively electrically connected to the first pad <NUM> through a first solder <NUM> and connected to the second pad <NUM> through a second solder <NUM>. The SMD device <NUM> overlaps with the via-plug <NUM>. In other word, the via-plug <NUM> is placed under the SMD device <NUM>.

For example, the SMD device <NUM> is mounted on the surface <NUM> of the substrate <NUM> by a reflow process. In the beginning of the reflow process, a solder paste layer is printed in the openings defined by the solder resistance layer <NUM> on the first pad <NUM> and the second pad <NUM>. The SMD device <NUM> then is mounted on the surface <NUM> by putting the first electrode <NUM> of the SMD device <NUM> on the solder paste layer which is printed on the first pad <NUM>, and putting the second electrode <NUM> of the SMD device <NUM> on the solder paste layer which is printed on the second pad <NUM>. Thereafter, the substrate <NUM> and the SMD device <NUM> are heated by a reflow oven. During the heating process, the solder past layer is melted to form the first solder <NUM> and the second solder <NUM>. After cooling down, the first solder <NUM> and the second solder <NUM> firmly fix the SMD device <NUM> to the first pad <NUM> and the second pad <NUM>.

In the example, one of the first pad <NUM> and the second pad <NUM> is a power pad, and the other one is a ground pad. For example, the first pad <NUM> is the power pad, and the second pad <NUM> is the ground pad.

A molding compound layer <NUM> covers the substrate <NUM> and structures on the surface <NUM> of the substrate <NUM>, so that various components such as the first pad <NUM>, the second pad <NUM>, the SMD device <NUM> etc., are encapsulated and protected from mechanical and/or chemical damages, e.g. moisture, oxidization, external shocks and vibrations. The molding compound layer <NUM> may include an epoxy resin or other suitable materials. In examples, the semiconductor package also includes other components not shown in <FIG>.

<FIG> illustrates a top view of a semiconductor package in an embodiment of the invention. <FIG> illustrates a cross-section view of the semiconductor package drawn along BB' line in <FIG>.

The semiconductor package as shown in <FIG> includes a substrate <NUM>. The substrate <NUM> may be a printed circuit board (PCB), a semiconductor carrier board, or a package substrate such as a ball grid arrays (BGA) substrate or a pin grid array (PGA) substrate. A surface mount device (SMD device) <NUM> is mounted on a first pad <NUM> and a second pad <NUM> on the substrate <NUM> through a solder <NUM> and a solder <NUM>, respectively electrically connected between a first electrode <NUM> of the SMD device <NUM> and the first pad <NUM> and between a second electrode <NUM> of the SMD device <NUM> and the second pad <NUM>. The SMD device <NUM> is a passive device e.g. capacitor, resistor, inductor or electrostatic discharge component (ESD).

As shown in <FIG>, the semiconductor package further includes a first conductive element <NUM> and a second conductive element <NUM> formed on the substrate <NUM>. The first conductive element <NUM> is formed physically independent from the first pad <NUM>. The second conductive element <NUM> is formed in between the first pad <NUM> and the first conductive element <NUM>, and are separated from each other, by an insulating layer such as a solder resistance layer <NUM> (<FIG>).

The first conductive element <NUM> electrically connects to a via-plug <NUM> formed through the substrate <NUM>, and electrically connects to the first pad <NUM> through at least one bonding wire <NUM> lying across the second conductive element <NUM>. In one embodiment, two opposing ends of the bonding wire <NUM> are respectively bonded on a first bonding area <NUM> connecting to the first pad <NUM> and a second bonding area <NUM> of the first conductive element <NUM>. The first bonding area <NUM> and the second bonding area <NUM> are defined by the solder resistance layer <NUM> (shown in <FIG>, but not shown in <FIG> for the sake of brevity) which covers a portion of the substrate <NUM> and reveals some openings for soldering or wire bonding. The via-plugs <NUM>, <NUM> (<FIG>) are formed through the substrate <NUM> and respectively electrically connected to the first conductive element <NUM> and the second pad <NUM>.

As disclosed above, the SMD device <NUM> is mounted on the substrate <NUM> by reflow process. In order to prevent a solder paste material from flowing into the first bonding area <NUM>, the solder resistance layer (not shown) may be used to cover an area <NUM> between the first bonding area <NUM> and the first pad <NUM>.

In one embodiment, the first conductive element <NUM> and the second conductive element <NUM> may be a trace, a pad, a ring, or a finger. One of the first conductive element <NUM> and the second pad <NUM> is used for distributing power signal, and the other of the first conductive element <NUM> and the second pad <NUM> is used for connecting to a ground potential. For example, the second pad <NUM> is a ground pad. The first conductive element <NUM> is a power trace, a power ring, a power plane, or a power finger, electrically connected to the via-plug <NUM> or to the bonding pad on a semiconductor (not shown in <FIG> for the sake of brevity). In additional, the second conductive element <NUM> is a signal trace for distributing signal.

A molding compound layer <NUM> encapsulates structures on the substrate <NUM> such as the first pad <NUM>, the second pad <NUM>, the SMD device <NUM>, the first conductive element <NUM>, the second conductive element <NUM>, etc., to protect them from mechanical and/or chemical damages, e.g. moisture, oxidization, external shocks and vibrations.

<FIG> illustrates a top view of a semiconductor package in one example useful for the understanding of the invention. <FIG> illustrates a cross-section view of the semiconductor package drawn along CC' line in <FIG>.

The semiconductor package as shown in <FIG> includes a substrate <NUM>. A surface mount device (SMD device) <NUM> may be mounted on a first pad <NUM> and a second pad <NUM> on the substrate <NUM> through a first solder <NUM> and a second solder <NUM>, respectively electrically connected between a first electrode <NUM> of the SMD device <NUM> and the first pad <NUM> and between a second electrode <NUM> of the SMD device <NUM> and the second pad <NUM>.

As shown in <FIG>, the semiconductor package further includes a first conductive element <NUM>, a second conductive element <NUM>, a third conductive element <NUM>, and a fourth conductive element <NUM>, formed on the substrate <NUM>. The second conductive elements <NUM> are formed between the first pad <NUM> and the first conductive element <NUM>, and are separated from each other, for example by an insulating layer such as a solder resistance layer <NUM> (<FIG>). The fourth conductive elements <NUM> are formed between the second pad <NUM> and the third conductive element <NUM>, and are separated from each other, for example by an insulating layer such as the solder resistance layer <NUM> (<FIG>).

Moreover, the first conductive element <NUM> electrically connects to a via-plug <NUM> formed through the substrate <NUM>, and electrically connects to the first pad <NUM> through at least one bonding wire <NUM> lying across the second conductive element <NUM>. In the example, two opposing ends of the bonding wire <NUM> are respectively bonded on a first bonding area <NUM> connecting to the first pad <NUM> and a second bonding area <NUM> of the first conductive element <NUM>. The third conductive element <NUM> electrically connects to a via-plug <NUM> formed through the substrate <NUM>, and electrically connects to the second pad <NUM> through at least one bonding wire <NUM> lying across the fourth conductive element <NUM>. In the example, two opposing ends of the bonding wire <NUM> are respectively bonded on a third bonding area <NUM> connecting to the second pad <NUM> and a fourth bonding area <NUM> of the third conductive element <NUM>. In the example, for example, the first bonding area <NUM>, the second bonding area <NUM>, the third bonding area <NUM> and the fourth bonding area <NUM> are defined by (or exposed by openings of) the solder resistance layer <NUM> (shown in <FIG>, but not shown in <FIG> for the sake of brevity).

As disclosed above, the SMD device <NUM> is mounted on the substrate <NUM> by reflow process. In order to prevent a solder paste material from flowing into the first bonding area <NUM> and the third bonding area <NUM>, a solder resistance layer (not shown) may be used to cover an area <NUM> between the first bonding area <NUM> and the first pad <NUM>, and cover an area <NUM> between the third bonding area <NUM> and the second pad <NUM>.

Referring to <FIG>, one of the first conductive element <NUM> and the third conductive element <NUM> is used for distributing a power signal and the other of the first conductive element <NUM> and the third conductive element <NUM> is used for connecting to a ground potential. For example, the first conductive element <NUM> is a power trace, a power ring, a power plane, or a power finger, electrically connected to the via-plug <NUM>. The third conductive element <NUM> is a ground trace, a ground ring, or a ground pad, electrically connected to the via-plug <NUM> or to the bonding pad on a semiconductor (not shown in <FIG> for the sake of brevity). The second conductive element <NUM> and the fourth conductive element <NUM> are signal traces for distributing signals.

Claim 1:
A semiconductor package, comprising:
a substrate (<NUM>);
a first pad (<NUM>) formed on the substrate (<NUM>);
a second pad (<NUM>) formed on the substrate (<NUM>);
a first conductive element (<NUM>) formed on the substrate (<NUM>), the first conductive element (<NUM>) formed on the substrate (<NUM>) being formed physically independent from the first pad (<NUM>);
a second conductive element (<NUM>) formed between the first pad (<NUM>) and the first conductive element (<NUM>), the first conductive element (<NUM>) and the second conduct element separated by an insulating layer;
a passive surface mount device (<NUM>) mounted on the first pad (<NUM>) and the second pad (<NUM>), the passive surface mount device (<NUM>) comprising a first electrode (<NUM>) electrically connected to the first pad (<NUM>) via solder (<NUM>) and a second electrode (<NUM>) electrically connected to the second pad (<NUM>) via solder (<NUM>);
a first via-plug (<NUM>) formed through the substrate (<NUM>) and electrically connected to the second pad (<NUM>);
a second via-plug (<NUM>) formed through the substrate (<NUM>) and electrically connected to the first conductive element (<NUM>); a first bond wire (<NUM>); and a molding compound layer (<NUM>) encapsulating the substrate (<NUM>), the first pad (<NUM>), the second pad (<NUM>), the first conductive element (<NUM>) , the second conductive element (<NUM>), the first bonding wire (<NUM>) and the passive surface mount device (<NUM>); characterised in that
the first bonding wire (<NUM>) is lying across the second conductive element (<NUM>) and electrically connecting the first conductive element (<NUM>) and the first pad (<NUM>).