Patent Description:
This disclosure relates generally to field of data processing, and more particularly to data encoding and decoding.

ITU-T VCEG (Q6/<NUM>) and ISO/IEC MPEG (JTC <NUM>/SC <NUM>/WG <NUM>) published the H. <NUM>/HEVC (High Efficiency Video Coding) standard in <NUM> (version <NUM>), <NUM> (version <NUM>), <NUM> (version <NUM>) and <NUM> (version <NUM>). Since then, the potential need for standardization of future video coding technology which could significantly outperform HEVC in compression capability has been studied. In<NPL>was issued. By February <NUM>, <NUM>, a total of <NUM> CfP responses on standard dynamic range (SDR), <NUM> CfP responses on high dynamic range (HDR), and <NUM> CfP responses on <NUM> video categories were submitted, respectively. With careful evaluation, JVET formally launched the standardization of next-generation video coding beyond HEVC, i.e., the so-called Versatile Video Coding (WC).

The document ("<NPL>) discloses amvr_flag specifying a resolution of motion vector difference, amvr_precision_idx specifying a resoulution of the motion vector difference with AmvrShift, and a table indicating precision values in relation to combination of the amvr_flag, amvr_precision_idx, inter_affine_flag and CuPredMode.

The document ("<NPL>) relates to CABAC context modeling for regular coded bins affine_flag, amvr_flag, triangle_flag and split_qt flag.

The document ("<NPL>) outlines a unified context model in amvr_flag for both AMVR and Affine AMVR.

The document ("<NPL>) discloses Versatile Video coding (VVC) architecture, inter prediction, inter prediction, entropy coding and description of VTM5 encoder.

The present invention concerns a method of video coding according to claim <NUM>. Further aspects of the present invention are defined in the dependent claims. Embodiments relate to a method, system, and computer readable medium for video coding.

According to another aspect, a computer system for video coding according to independent claim <NUM> is provided.

According to yet another aspect, a computer readable medium for video coding according to independent claim <NUM> is provided. Enabling disclosure for the protected invention is provided with the embodiments described in relation to <FIG>. The other figures, aspects, and embodiments are provided for illustrative purposes and do not represent embodiments of the invention unless when combined with all of the features respectively defined in the independent claims.

These and other objects, features and advantages will become apparent from the following detailed description of illustrative embodiments, which is to be read in connection with the accompanying drawings. The various features of the drawings are not to scale as the illustrations are for clarity in facilitating the understanding of one skilled in the art in conjunction with the detailed description. In the drawings:.

Detailed embodiments of the claimed structures and methods are disclosed herein.

Embodiments relate generally to the field of data processing, and more particularly to data encoding and decoding. The following described exemplary embodiments provide a system, method and computer program for, among other things, use a single value for AMVR usage precision signaling. Therefore, some embodiments have the capacity to improve the field of computing by allowing for reduced complexity in signaling parameters of video coding that may allow for improved encoding and decoding.

As previously described, ITU-T VCEG (Q6/<NUM>) and ISO/IEC MPEG (JTC <NUM>/SC <NUM>/WG <NUM>) published the H. <NUM>/HEVC (High Efficiency Video Coding) standard in <NUM> (version <NUM>), <NUM> (version <NUM>), <NUM> (version <NUM>) and <NUM> (version <NUM>). Since then, the potential need for standardization of future video coding technology which could significantly outperform HEVC in compression capability has been studied. In <NPL>was issued. By February <NUM>, <NUM>, a total of <NUM> CfP responses on standard dynamic range (SDR), <NUM> CfP responses on high dynamic range (HDR), and <NUM> CfP responses on <NUM> video categories were submitted, respectively. With careful evaluation, JVET formally launched the standardization of next-generation video coding beyond HEVC, i.e., the so-called Versatile Video Coding (VVC).

In HEVC, motion vector differences (MVDs) (i.e., between a motion vector and a predicted motion vector of a coding unit) may be signalled in units of quarter-luma-sample when use_integer_mv_flag may be equal to <NUM> in a slice header. In VVC, a coding unit-level adaptive motion vector resolution (AMVR) may allow for an MVD of the coding unit to be coded in different precision. However, AMVR may require multiple flags for determining precision and whether AMVR is enabled or disabled. This may lead to added complexity for signaling. It may be advantageous, therefore, to reduce the number of flags to a single, unified flag to indicate precision and whether adaptive motion vector resolution may be enabled or disabled.

Aspects are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer readable media according to the various embodiments.

Referring now to <FIG>, a functional block diagram of a networked computer environment illustrating a video coding system <NUM> (hereinafter "system") for coding video data using a unified AMVR signaling flag. It should be appreciated that <FIG> provides only an illustration of one implementation and does not imply any limitations with regard to the environments in which different embodiments may be implemented. Many modifications to the depicted environments may be made based on design and implementation requirements.

The system <NUM> may include a computer <NUM> and a server computer <NUM>. The computer <NUM> may communicate with the server computer <NUM> via a communication network <NUM> (hereinafter "network"). The computer <NUM> may include a processor <NUM> and a software program <NUM> that is stored on a data storage device <NUM> and is enabled to interface with a user and communicate with the server computer <NUM>. As will be discussed below with reference to <FIG> the computer <NUM> may include internal components 800A and external components 900A, respectively, and the server computer <NUM> may include internal components 800B and external components 900B, respectively. The computer <NUM> may be, for example, a mobile device, a telephone, a personal digital assistant, a netbook, a laptop computer, a tablet computer, a desktop computer, or any type of computing devices capable of running a program, accessing a network, and accessing a database.

The server computer <NUM> may also operate in a cloud computing service model, such as Software as a Service (SaaS), Platform as a Service (PaaS), or Infrastructure as a Service (IaaS), as discussed below with respect to <FIG> and <FIG>. The server computer <NUM> may also be located in a cloud computing deployment model, such as a private cloud, community cloud, public cloud, or hybrid cloud.

The server computer <NUM>, which may be used for coding video data using a unified AMVR signaling flag, is enabled to run an Adaptive Motion Vector Resolution (AMVR) Signaling Program <NUM> (hereinafter "program") that may interact with a database <NUM>. The AMVR Signaling Program method is explained in more detail below with respect to <FIG>. In one embodiment, the computer <NUM> may operate as an input device including a user interface while the program <NUM> may run primarily on server computer <NUM>. In an alternative embodiment, the program <NUM> may run primarily on one or more computers <NUM> while the server computer <NUM> may be used for processing and storage of data used by the program <NUM>. It should be noted that the program <NUM> may be a standalone program or may be integrated into a larger AMVR signaling program.

It should be noted, however, that processing for the program <NUM> may, in some instances be shared amongst the computers <NUM> and the server computers <NUM> in any ratio. In another embodiment, the program <NUM> may operate on more than one computer, server computer, or some combination of computers and server computers, for example, a plurality of computers <NUM> communicating across the network <NUM> with a single server computer <NUM>. In another embodiment, for example, the program <NUM> may operate on a plurality of server computers <NUM> communicating across the network <NUM> with a plurality of client computers. Alternatively, the program may operate on a network server communicating across the network with a server and a plurality of client computers.

The network <NUM> may include wired connections, wireless connections, fiber optic connections, or some combination thereof. In general, the network <NUM> can be any combination of connections and protocols that will support communications between the computer <NUM> and the server computer <NUM>. The network <NUM> may include various types of networks, such as, for example, a local area network (LAN), a wide area network (WAN) such as the Internet, a telecommunication network such as the Public Switched Telephone Network (PSTN), a wireless network, a public switched network, a satellite network, a cellular network (e.g., a fifth generation (<NUM>) network, a long-term evolution (LTE) network, a third generation (<NUM>) network, a code division multiple access (CDMA) network, etc.), a public land mobile network (PLMN), a metropolitan area network (MAN), a private network, an ad hoc network, an intranet, a fiber optic-based network, or the like, and/or a combination of these or other types of networks.

Additionally, or alternatively, a set of devices (e.g., one or more devices) of system <NUM> may perform one or more functions described as being performed by another set of devices of system <NUM>.

Referring to <FIG>, an exemplary unified AMVR usage flag 200A is depicted.

According to one or more embodiments, a first bin is used as adaptive motion vector resolution usage flag for translational inter-prediction mode, Affine inter-prediction mode, and intra-block copy (IBC) mode. A single context is used for encoding this bin. The total number of context-adaptive binary arithmetic coding (CABAC) contexts used in adaptive motion vector resolution signaling may be four. The variable ctxldx may be used to denote the index of CABAC context. For translational inter-prediction mode, if adaptive motion vector resolution is signaled to be on, a second bin (with ctxldx of <NUM>) is used to signal whether half-pel precision may be used. If half-pel precision is not used, a third bin (with ctxIdx of <NUM>) is used to signal whether <NUM>-pel precision or <NUM>-pel precision is used. For Affine inter-prediction mode, if adaptive motion vector resolution is signaled to be on, a third bin (with ctxIdx of <NUM>) is used to signal whether <NUM>/<NUM>-pel precision or <NUM>-pel precision is used. It may be appreciated that the second bin for affine inter-prediction may be skipped. It may further be appreciated that whether the third bin may be called second bin or third bin may depend on implementation. For IBC mode, if adaptive motion vector resolution is signaled to be off, <NUM>-pel precision is used. If adaptive motion vector resolution is signaled to be on, <NUM>-pel precision is used. The value of ctxldx may be used to differentiate the CABAC contexts used in this signaling. The actual values and order of ctxIdx may be different.

Referring to <FIG>, an exemplary unified AMVR usage flag 200B is depicted. According to one or more embodiments, a first bin may be used as adaptive motion vector resolution usage flag for translational inter-prediction and IBC mode. A single context may be used for encoding this bin. The adaptive motion vector resolution usage flag for regular inter-prediction mode and IBC mode may share the same context. The adaptive motion vector resolution flag for Affine inter-prediction mode may uses another context for CABAC. The total number of CABAC contexts used for adaptive motion vector resolution signaling may be five.

Referring to <FIG>, an exemplary unified AMVR usage flag 200C is depicted. According to one or more embodiments, a first bin may be used as an AMVR usage flag for translational inter-prediction, Affine inter-prediction, and IBC mode. A single context is used for encoding this bin. For both AMVR for translational inter-prediction mode and Affine mode, the bin used for signaling whether <NUM>-pel precision may be the same. The total number of CABAC context used in AMVR signaling may be three.

Referring now to <FIG>, an operational flowchart <NUM> illustrating the steps carried out by a program for coding video data using a unified AMVR signaling flag is depicted. <FIG> may be described with the aid of <FIG>, <FIG>, and <FIG>. As previously described, the AMVR Signaling Program <NUM> (<FIG>) may quickly and effectively encode video based on using a single flag to signal AMVR usage and precision.

At <NUM>, video data including at least two frames is received. The data may correspond to a still image or video data from which the at least two frames may be extracted. In operation, the AMVR Signaling Program <NUM> (<FIG>) on the server computer <NUM> (<FIG>) may receive video data from the computer <NUM> (<FIG>) over the communication network <NUM> (<FIG>) or may retrieve the video data from the database <NUM> (<FIG>).

At <NUM>, a motion vector difference is calculated between two frames from among the at least two frames. The motion vector difference is a difference between a motion vector and a predicted motion vector of a coding unit. The motion vector difference may be signalled with a precision, such as units of quarter-luma-samples. In operation, the AMVR Signaling Program <NUM> (<FIG>) may calculate a motion vector difference using the received video data.

At <NUM>, an adaptive motion vector resolution usage flag is checked. The adaptive motion vector resolution flag may correspond to a precision value and an adaptive motion vector resolution usage value corresponding to whether adaptive motion vector resolution is enabled or disabled. In operation, the AMVR Signaling Program <NUM> (<FIG>) checks for a unified AMVR usage flag 200A (<FIG>) to determine whether AMVR is enabled and to what degree of precision the motion vector difference is to be encoded.

At <NUM>, the video data is encoded based on the adaptive motion vector resolution usage value, whereby the motion vector difference is encoded based on the precision value. By encoding the video data based on the motion vector difference, inter-frame prediction may be used that may allow for compression of the video data. In operation, the AMVR Signaling Program <NUM> (<FIG>) encodes the video data based on the values in the unified AMVR usage flag 200A (<FIG>).

It may be appreciated that <FIG> provides only an illustration of one implementation and does not imply any limitations with regard to how different embodiments may be implemented. Many modifications to the depicted environments may be made based on design and implementation requirements.

<FIG> is a block diagram <NUM> of internal and external components of computers depicted in <FIG> in accordance with an illustrative embodiment. It should be appreciated that <FIG> provides only an illustration of one implementation and does not imply any limitations with regard to the environments in which different embodiments may be implemented. Many modifications to the depicted environments may be made based on design and implementation requirements.

Computer <NUM> (<FIG>) and server computer <NUM> (<FIG>) may include respective sets of internal components 800A,B and external components 900A,B illustrated in <FIG>. Each of the sets of internal components <NUM> include one or more processors <NUM>, one or more computer-readable RAMs <NUM> and one or more computer-readable ROMs <NUM> on one or more buses <NUM>, one or more operating systems <NUM>, and one or more computer-readable tangible storage devices <NUM>.

Processor <NUM> is implemented in hardware, firmware, or a combination of hardware and software. Processor <NUM> is a central processing unit (CPU), a graphics processing unit (GPU), an accelerated processing unit (APU), a microprocessor, a microcontroller, a digital signal processor (DSP), a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), or another type of processing component. In some implementations, processor <NUM> includes one or more processors capable of being programmed to perform a function. Bus <NUM> includes a component that permits communication among the internal components 800A,B.

The one or more operating systems <NUM>, the software program <NUM> (<FIG>) and the AMVR Signaling Program <NUM> (<FIG>) on server computer <NUM> (<FIG>) are stored on one or more of the respective computer-readable tangible storage devices <NUM> for execution by one or more of the respective processors <NUM> via one or more of the respective RAMs <NUM> (which typically include cache memory). In the embodiment illustrated in <FIG>, each of the computer-readable tangible storage devices <NUM> is a magnetic disk storage device of an internal hard drive. Alternatively, each of the computer-readable tangible storage devices <NUM> is a semiconductor storage device such as ROM <NUM>, EPROM, flash memory, an optical disk, a magneto-optic disk, a solid state disk, a compact disc (CD), a digital versatile disc (DVD), a floppy disk, a cartridge, a magnetic tape, and/or another type of non-transitory computer-readable tangible storage device that can store a computer program and digital information.

Each set of internal components 800A,B also includes a R/W drive or interface <NUM> to read from and write to one or more portable computer-readable tangible storage devices <NUM> such as a CD-ROM, DVD, memory stick, magnetic tape, magnetic disk, optical disk or semiconductor storage device. A software program, such as the software program <NUM> (<FIG>) and the AMVR Signaling Program <NUM> (<FIG>) can be stored on one or more of the respective portable computer-readable tangible storage devices <NUM>, read via the respective R/W drive or interface <NUM> and loaded into the respective hard drive <NUM>.

Each set of internal components 800A,B also includes network adapters or interfaces <NUM> such as a TCP/IP adapter cards; wireless Wi-Fi interface cards; or <NUM>, <NUM>, or <NUM> wireless interface cards or other wired or wireless communication links. The software program <NUM> (<FIG>) and the AMVR Signaling Program <NUM> (<FIG>) on the server computer <NUM> (<FIG>) can be downloaded to the computer <NUM> (<FIG>) and server computer <NUM> from an external computer via a network (for example, the Internet, a local area network or other, wide area network) and respective network adapters or interfaces <NUM>. From the network adapters or interfaces <NUM>, the software program <NUM> and the AMVR Signaling Program <NUM> on the server computer <NUM> are loaded into the respective hard drive <NUM>. The network may comprise copper wires, optical fibers, wireless transmission, routers, firewalls, switches, gateway computers and/or edge servers.

Each of the sets of external components 900A,B can include a computer display monitor <NUM>, a keyboard <NUM>, and a computer mouse <NUM>. External components 900A,B can also include touch screens, virtual keyboards, touch pads, pointing devices, and other human interface devices. Each of the sets of internal components 800A,B also includes device drivers <NUM> to interface to computer display monitor <NUM>, keyboard <NUM> and computer mouse <NUM>. The device drivers <NUM>, R/W drive or interface <NUM> and network adapter or interface <NUM> comprise hardware and software (stored in storage device <NUM> and/or ROM <NUM>).

It is understood in advance that although this disclosure includes a detailed description on cloud computing, implementation of the teachings recited herein are not limited to a cloud computing environment. Rather, some embodiments are capable of being implemented in conjunction with any other type of computing environment now known or later developed.

Cloud computing is a model of service delivery for enabling convenient, on-demand network access to a shared pool of configurable computing resources (e.g. networks, network bandwidth, servers, processing, memory, storage, applications, virtual machines, and services) that can be rapidly provisioned and released with minimal management effort or interaction with a provider of the service.

At the heart of cloud computing is an infrastructure comprising a network of interconnected nodes.

Referring to <FIG>, illustrative cloud computing environment <NUM> is depicted. As shown, cloud computing environment <NUM> comprises one or more cloud computing nodes <NUM> with which local computing devices used by cloud consumers, such as, for example, personal digital assistant (PDA) or cellular telephone 54A, desktop computer 54B, laptop computer 54C, and/or automobile computer system 54N may communicate. Cloud computing nodes <NUM> may communicate with one another. It is understood that the types of computing devices 54A-N shown in <FIG> are intended to be illustrative only and that cloud computing nodes <NUM> and cloud computing environment <NUM> can communicate with any type of computerized device over any type of network and/or network addressable connection (e.g., using a web browser).

Referring to <FIG>, a set of functional abstraction layers <NUM> provided by cloud computing environment <NUM> (<FIG>) is shown. It should be understood in advance that the components, layers, and functions shown in <FIG> are intended to be illustrative only and embodiments are not limited thereto.

In one example, these resources may comprise application software licenses. Service Level Agreement (SLA) planning and fulfillment <NUM> provides pre-arrangement for, and procurement of, cloud computing resources for which a future requirement is anticipated in accordance with an SLA.

Workloads layer <NUM> provides examples of functionality for which the cloud computing environment may be utilized. Examples of workloads and functions which may be provided from this layer include: mapping and navigation <NUM>; software development and lifecycle management <NUM>; virtual classroom education delivery <NUM>; data analytics processing <NUM>; transaction processing <NUM>; and AMVR Signaling <NUM>. AMVR Signaling <NUM> may encode and decode video data using a unified AMVR signaling flag.

Some embodiments may relate to a system, a method, and/or a computer readable medium at any possible technical detail level of integration. The computer readable medium may include a computer-readable non-transitory storage medium (or media) having computer readable program instructions thereon for causing a processor to carry out operations.

Computer readable program code/instructions for carrying out operations may be assembler instructions, instruction-set-architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state-setting data, configuration data for integrated circuitry, or either source code or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C++, or the like, and procedural programming languages, such as the "C" programming language or similar programming languages. In some embodiments, electronic circuitry including, for example, programmable logic circuitry, field-programmable gate arrays (FPGA), or programmable logic arrays (PLA) may execute the computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry, in order to perform aspects or operations.

The flowchart and block diagrams in the Figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer readable media according to various embodiments. The method, computer system, and computer readable medium may include additional blocks, fewer blocks, different blocks, or differently arranged blocks than those depicted in the Figures. For example, two blocks shown in succession may, in fact, be executed concurrently or substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved.

Claim 1:
A method of video coding, executable by a processor, comprising:
receiving (<NUM>) video data comprising at least two frames;
calculating (<NUM>) a motion vector difference between motion vectors of two frames from among the at least two frames;
checking (<NUM>) an unified adaptive motion vector resolution usage flag to determine a precision value and to determine whether adaptive motion vector resolution is enabled or disabled; and
encoding (<NUM>) the video data based on values of the unified adaptive motion vector resolution usage flag, wherein the motion vector difference is encoded based on the precision value,
wherein the unified adaptive motion vector resolution usage flag comprises a first bin encoded by a first context, and the first bin signals whether the adaptive motion vector resolution is enabled or disabled for a translational inter-prediction mode, an Affine inter-prediction mode or an intra-block copy mode,
wherein, for the translational inter-prediction mode, the unified adaptive motion vector resolution usage flag further includes a second bin signaling whether a half-pel precision is used based on adaptive motion vector resolution being enabled and a third bin signaling whether <NUM>-pel precision or <NUM>-pel precision is used if the half-pel precision is not used for translational inter-prediction mode,
wherein, for the Affine inter-prediction mode, the third bin signals whether <NUM>/<NUM>-pel precision or <NUM>-pel precision is used based on the adaptive motion vector resolution being enabled and the second bin is skipped,
wherein, for the intra-block copy mode, <NUM>-pel precision is used based on the adaptive motion vector resolution being disabled and <NUM>-pel precision is used based on the adaptive motion vector resolution being enabled.