Patent Description:
Typically, the common mode setting of the conventional digital-to-analog converter is selected to an appropriate fixed common mode DC value to optimize its full-scale output signal swing. Since the common-mode setting of a conventional digital-to-analog converter is constant or fixed, it typically does not provide peak performance at low level signals (i.e., signals that are fairly low in magnitude).

<NPL>, discloses a differential DAC which is configured to generate a differential output signal based on an input signal and an arbitrary control signal. The control signal is a common mode signal which is selected in such a way that a clipping of the differential signal is avoided.

<CIT> discloses a differential amplifier which generates a differential output signal based on an input signal and a common mode signal. The common mode signal is dependent on the input signal. The common mode signal may be generated by selecting a minimum of the input signal and the negated (inverted) input signal, inverting the selected signal, and using the inverted signal as the common-mode signal.

This disclosure includes the observation that electronic circuitry (such as a digital-to-analog converter and/or corresponding circuitry) typically operates more efficiently when an output voltage is set to an appropriate common mode voltage. In certain instances, this means that a desirable common mode voltage may be different depending on a magnitude of the output voltage being generated.

Embodiments herein include novel ways of providing improved circuit performance associated with a digital-to-analog converter and/or related circuitry. For example, one embodiment herein includes dynamically controlling a common-mode setting of a differential signal depending at least in part on a magnitude of an input signal from which the output signal is derived. Providing signal-dependent common-mode control as described herein increases system performance for parameters such as noise, distortion, and power consumption associated with a respective electronic circuit.

The present invention concerns an apparatus according independent device claim <NUM> and a corresponding method according to independent method claim <NUM>.

More specifically, in one embodiment, an apparatus (such as an electronic circuit) providing improved system performance comprises: an input operable to receive an input signal; a dynamic common mode adjustor operable to: i) derive a differential signal from the received input signal, and ii) vary an offset of the differential signal as a function of a magnitude or level of the received input signal to produce an offset differential signal; and an output operable to output the offset differential signal. As previously discussed, controlling an offset (such as common mode setting) associated with a differential signal provides increased system performance for parameters such as noise, distortion, and power consumption of a corresponding electronic circuit.

Typically, the dynamic common mode adjustor as described herein is instantiated as an electronic circuit such as associated with a digital-to-analog converter, amplifier, etc. However, the dynamic common mode adjustor can be implemented in any suitable manner depending on the embodiment.

In further example embodiments, the offset differential signal outputted from the output includes a first signal component and a second signal component; the dynamic common mode adjustor is operable to apply the generated offset value (common mode adjustment) to both the first signal and the second signal to control a respective common mode setting.

Yet further, a magnitude of a difference between the second signal and the first signal proportionally varies with respect to a magnitude of the received input signal. In other words, in one embodiment, the dynamic common mode adjustor varies a magnitude of the differential signal depending on a magnitude or level of the received input signal. Accordingly, certain embodiments herein include controlling a common mode setting of the differential output signal as well as a magnitude of the differential output signal depending on a magnitude or level of the input signal being converted.

In one embodiment, the received input signal is a digital signal; the differential signal derived from the received input signal is an analog signal.

Adjustment of the common mode setting or offset associated with a differential output signal can include any of multiple techniques. For example, in one embodiment, the dynamic common mode adjustor includes or has access to map information. The map information provides a mapping of input values to corresponding differential output values. During operation, the dynamic common mode adjustor derives the differential signal via mapping of a magnitude of the received input signal to a first value and second value specified by the mapping information. In one embodiment, the first value and the second value represent settings of a pair signals representing the differential output signal whose common mode setting is adjusted.

In accordance with further embodiments, the dynamic common mode adjustor can be configured to apply a piece-wise linear math function to derive the offset (common mode settings) associated with the differential signal.

In yet further embodiments, the dynamic common mode adjustor is operable to implement one or more polynomial (mathematical) functions to produce the offset that is applied to a respective differential signal derived from the received input signal.

In accordance with further embodiments, in addition to a dynamic common mode adjustor, the electronic circuit as described herein can be configured to include a digital-to-analog converter circuit operable to receive the offset differential signal. The digital-to-analog converter generates a respective differential analog output signal (current or voltage signal) from the offset differential signal received from the dynamic common mode adjustor.

Note further that the digital-to-analog converter circuit can be configured to include a first digital-to-analog converter and a second digital-to-analog converter. In such an instance, the first digital-to-analog converter converts the first digital value into a first analog output signal (voltage signal or current signal); the second digital-to-analog converter operable to convert the second digital value into a second analog output signal (voltage signal or current signal). The respective differential analog output signal includes the first analog output signal (such as voltage signal or current signal) and the second analog output signal (such as voltage signal or current signal).

In yet further embodiments, the dynamic common mode adjustor includes an offset adjustor operable to generate the offset used to control a common mode setting associated with the differential signal. In one embodiment, the offset adjustor generates (or controls) a magnitude of the offset to be a fixed value during operating conditions in which the magnitude or level of the received input signal falls within a first magnitude range (such as when an absolute value of a magnitude of the input signal is less than threshold value). The offset adjustor can be configured to vary a magnitude or level of the offset during operating conditions in which the magnitude of the received input signal falls within a second magnitude range. Accordingly, the dynamic common mode adjustor can be configured to adjust the common mode setting of an output signal (such as voltage signal or current signal) to ensure further efficient processing of the output signal (voltage signal or current signal).

These and other more specific embodiments are disclosed in more detail below.

Note further that although embodiments as discussed herein are applicable to electronic circuits such as those implementing digital-to-analog converters, amplifiers, differential signal generators, etc., the concepts disclosed herein may be advantageously applied to any other suitable topologies as well as general power supply control applications.

Additionally, note that embodiments herein can include computer processor hardware (that executes corresponding switch instructions) to carry out and/or support any or all of the method operations disclosed herein. In other words, one or more computerized devices or processors (computer processor hardware) can be programmed and/or configured to operate as explained herein to carry out different embodiments of the invention.

Yet other embodiments herein include software programs to perform the steps and operations summarized above and disclosed in detail below. One such embodiment comprises a computer program product that has non-transitory computer-storage media (e.g., memory, disk, flash,. ) including computer program instructions and/or logic encoded thereon that, when performed in a computerized device having a processor and corresponding memory, programs the processor to perform any of the operations disclosed herein. Such arrangements are typically provided as software instructions, code, and/or other data (e.g., data structures) arranged or encoded on a computer readable storage medium or non-transitory computer readable media such as an optical medium (e.g., CD-ROM), floppy or hard disk or other a medium such as firmware or microcode in one or more ROM or RAM or PROM chips, an Application Specific Integrated Circuit (ASIC), circuit logic, etc. The software or firmware or other such configurations can be installed onto a respective controller circuit to cause the controller circuit (such as logic) to perform the techniques explained herein.

Accordingly, one embodiment of the present disclosure is directed to a computer program product that includes a computer readable medium having instructions stored thereon for supporting operations such as controlling one or more phases in a power supply. For example, in one embodiment, the instructions, when carried out by computer processor hardware (one or more computer devices, control logic, digital circuitry, etc.), cause the computer processor hardware to: receive an input signal; derive a differential signal from the received input signal; control an offset of the differential signal as a function of the received input signal to produce an offset differential signal; and output the offset differential signal.

The ordering of the operations as described herein has been added for clarity sake. The operations can be performed in any suitable order.

It is to be understood that the system, method, device, apparatus, logic, etc., as discussed herein can be embodied strictly as hardware (such as analog circuitry, digital circuitry, logic, etc.), as a hybrid of software and hardware, or as software alone such as within a processor, or within an operating system or a within a software application.

Note that although each of the different features, techniques, configurations, etc., herein may be discussed in different places of this disclosure, it is intended, where appropriate, that each of the concepts can optionally be executed independently of each other or in combination with each other. Accordingly, the one or more present inventions as described herein can be embodied and viewed in many different ways.

Also, note that this preliminary discussion of embodiments herein purposefully does not specify every embodiment and/or incrementally novel aspect of the present disclosure or claimed invention(s). Instead, this brief description only presents general embodiments and corresponding points of novelty over conventional techniques. For additional details and/or possible perspectives (permutations) of the invention(s), the reader is directed to the Detailed Description section and corresponding figures of the present disclosure as further discussed below.

The foregoing and other objects, features, and advantages of embodiments herein will be apparent from the following more particular description herein, as illustrated in the accompanying drawings in which like reference characters refer to the same parts throughout the different views. The drawings are not necessarily to scale, with emphasis instead being placed upon illustrating the embodiments, principles, concepts, etc..

According to one embodiment, an apparatus such as an electronic circuit includes an input operable to receive an input signal; a dynamic common mode adjustor operable to: i) derive a differential signal from the received input signal, and ii) vary an offset of the differential signal as a function of a magnitude or level of the received input signal to produce an offset differential signal; and an output operable to output the offset differential signal. In one configuration, the offset differential signal outputted from the output includes a first signal and a second signal; a magnitude or amount of a difference between the second signal and the first signal proportionally varies with respect to a magnitude or level of the received input signal.

Now, more specifically, <FIG> is an example diagram illustrating general components of a multi-stage amplifier device according to conventional techniques.

As previously discussed, embodiments herein include novel ways of providing improved circuit performance associated with a digital-to-analog converter and/or related circuitry. For example, one embodiment herein includes dynamically controlling a common-mode setting of a differential DAC, depending on a magnitude of the input signal being converted into a respective analog signal (such as a differential output signal proportional to the input). Providing signal-dependent common-mode control as described herein provides increased system performance for parameters such as noise, distortion, and power consumption. In other words, dynamically modifying a common mode setting (or offset) associated with a generated signal (such as voltage or current signal) supports lower noise, lower distortion and lower power consumption.

In this example embodiment, an apparatus (such as an electrical circuit, device, hardware, software, etc.) includes a dynamic common mode adjustor <NUM>. Typically, the dynamic common mode adjustor <NUM> as described herein is instantiated as an electronic circuit such as associated with a digital-to-analog converter, amplifier, etc. However, the dynamic common mode adjustor <NUM> can be implemented in any suitable manner depending on the embodiment.

Further in this example embodiment, the dynamic common mode adjustor <NUM> includes: an input <NUM> (such as a port, pin, etc.) that receives an input signal <NUM> (such as signal x). The dynamic common mode adjustor <NUM> further includes an output <NUM> (such as output <NUM>-<NUM> and output <NUM>-<NUM>) that outputs an output signal <NUM> (such as signal y).

In one embodiment, the output signal <NUM> is a differential signal including digital differential signal component <NUM>-<NUM> (such as signal yp) and digital differential signal component <NUM>-<NUM> (such as signal yn).

During operation, as previously discussed, the dynamic common mode adjustor <NUM>: i) derives differential signal <NUM> (differential signal y) from the received input signal, and ii) varies an offset of the differential signal <NUM> as a function of a magnitude or level of the received input signal <NUM>.

For example, the dynamic common mode adjustor <NUM> outputs the offset differential signal <NUM> from the output <NUM>. More specifically, the dynamic common mode adjustor <NUM> outputs digital differential signal component <NUM>-<NUM> (first signal such as yp) from output <NUM>-<NUM> to entity such as circuit <NUM>; the dynamic common mode adjustor <NUM> outputs digital differential signal component <NUM>-<NUM> (second signal such as yn) from output <NUM>-<NUM> to entity such as circuit <NUM>.

In accordance with further embodiments, the received input signal <NUM> is an analog or digital signal; the differential signal derived from the received input signal is an analog signal or digital signal.

As previously discussed, controlling an offset (such as common mode setting) associated with differential signal <NUM> provides increased system performance for parameters such as noise, distortion, and power consumption.

<FIG> is an example diagram illustrating implementation of a dynamic common mode adjustor and digital-to-analog converter according to embodiments herein. As shown in this example embodiment, the offset differential signal <NUM> outputted from the output <NUM> of dynamic common mode adjustor <NUM> includes first signal yp (such as digital differential signal component <NUM>-<NUM>) and a second signal yn (such as digital differential signal component <NUM>-<NUM>).

As previously discussed, the dynamic common mode adjustor <NUM> applies a generated offset (common mode adjustment value) to control a respective common mode setting of the output signal <NUM> (differential signal such as including digital differential signal component <NUM>-<NUM> and digital differential signal component <NUM>-<NUM>) outputted downstream to the differential digital-to-analog converter <NUM>.

As further shown, the differential digital-to-analog converter <NUM> receives the differential signal <NUM> and converts it into the analog output signal <NUM> (such as analog voltage Vd).

In one embodiment, the output signal <NUM> is a differential analog signal comprising analog differential signal component <NUM>-<NUM> (signal yp) and analog differential signal component <NUM>-<NUM> (signal yn). In such an instance, via the differential digital-to-analog converter <NUM>, the digital differential signal component <NUM>-<NUM> (yp) is converted into corresponding equivalent analog voltage or current signal vp (such as differential signal component <NUM>-<NUM>); via the differential digital-to-analog converter <NUM>, the digital differential signal component <NUM>-<NUM> (yn) is converted into corresponding equivalent analog voltage or current signal vn (such as differential signal component <NUM>-<NUM>).

Yet further, as previously discussed, a difference between the values yp and yn (as well as vp and vn) proportionally varies with respect to a level of the received input signal <NUM>. In other words, in one embodiment, the dynamic common mode adjustor <NUM> varies a magnitude of the differential signal Vd depending on a magnitude or level of the received input signal <NUM>.

Accordingly, certain embodiments herein include controlling a common mode setting of the differential output signal pair vp and vn (such as [vp + vn] / <NUM>) as well as a magnitude of the differential output signal Vd depending on a magnitude of the input signal <NUM> (signal x) being converted.

In one embodiment, a magnitude of the voltage Vd (difference between voltage vp and voltage vn) is proportional to the input signal x (such as over a range of multiple input values of signal x). Additionally, or alternatively, the magnitude of the output voltage proportionally tracks a magnitude of the input signal <NUM>.

Accordingly, in addition to a dynamic common mode adjustor <NUM>, embodiments herein can be configured to include a digital-to-analog converter <NUM> that receives the offset differential signal <NUM> and generates, from it, a respective differential analog output voltage signal <NUM> (analog voltage Vd).

Note that adjustment of the common mode setting or offset associated with the differential output signal <NUM> and thus differential output signal <NUM> can include any of multiple techniques.

For example, in one embodiment, the dynamic common mode adjustor <NUM> includes or has access to adjustment information <NUM>. Adjustment information <NUM> includes any suitable information enabling generation of an appropriate offset value (or common mode setting) to apply to the differential signals <NUM>, <NUM>.

<FIG> is an example diagram illustrating implementation of a dynamic common mode adjustor and digital-to-analog converter according to embodiments herein. In this example embodiment, the differential digital-to-analog converter <NUM> includes two digital-to-analog converters (namely, digital-to-analog converter <NUM>-<NUM> and digital-to-analog converter <NUM>-<NUM>).

During operation, the first digital-to-analog converter <NUM>-<NUM> converts the first digital value <NUM>-<NUM> (such as signal yp) into a first analog output signal <NUM>-<NUM> (such as analog voltage or current vp); the second digital-to-analog converter <NUM>-<NUM> converts the second digital value <NUM>-<NUM> into a second analog output signal <NUM>-<NUM> (such as analog voltage or current vn).

In a similar manner as previously discussed, a magnitude and offset (common mode setting) of the respective differential analog output signal, Vd, varies depending on a magnitude of the input signal <NUM>, and on the adjustment information <NUM>.

<FIG> is an example graph illustrating variation of common mode settings depending on an input according to embodiments herein. In one embodiment, graph <NUM> and corresponding functions <NUM>, <NUM>, and <NUM> represent an instantiation of the adjustment information <NUM> used to derive differential signal <NUM> and/or corresponding common mode adjustment settings from the input signal <NUM>. As further shown, the adjustment information <NUM> can be implemented via one or more piece-wise linear functions that provide different common mode adjustment settings over a range of different input or output values.

More specifically, in this example embodiment, the X-axis represents different possible values of the input signal <NUM>; the Y-axis represents a value of a corresponding offset/output signal.

Function <NUM> indicates one embodiment of mapping the input signal <NUM> (signal x) to a corresponding value of signal yp for a range of different input values; function <NUM> indicates an embodiment of mapping of the input signal <NUM> (signal x) to a corresponding value of signal yn for a range of different input values.

Note that attributes (slopes, number of linear pieces, offset, etc.) of functions <NUM> and <NUM> can be adjusted to accommodate any desirable common mode settings.

As previously discussed, in accordance with further embodiments, the combination of signal yn and yp is a differential signal <NUM>. Applications of function <NUM> to produce signal yn and application of function <NUM> to produce signal yp result in a corresponding differential signal <NUM> having a common mode setting as indicated by function CM (x) in graph <NUM>.

When the input signal <NUM> falls within a first range between -x1 and x1 (such as when an absolute value of the input signal is less than threshold value x1), the common mode setting of the differential signal <NUM> and signal <NUM> is a fixed value - CM_MIN.

When the input signal <NUM> falls between a first range between -x2 and - x1 or between range x1 and x2, the common mode setting of the differential signal <NUM> and <NUM> varies as shown with respect to the input voltage <NUM>.

When the received input signal <NUM> is less than -x2 or greater than x2 (such as when an absolute value of the input signal is greater than threshold value x2), the common mode setting of the differential signal <NUM> and signal <NUM> is substantially zero.

As previously discussed, the adjustment information <NUM> can be configured as map information that maps input values (associated with signal x) to different corresponding differential output values. For example, during operation, the dynamic common mode adjustor <NUM> can be configured to derive the differential signal via mapping of the received input signal <NUM> (signal x) to a first value and second value specified by the mapping information. As a more specific example, assume that the input signal is <NUM>. In such an instance, the dynamic common mode adjustor <NUM> uses adjustment information to map the value <NUM> to -<NUM> (signal vp = -<NUM>) and -<NUM> (signal vn = -<NUM>), in which the common mode or offset is -<NUM>. The difference between the signal vp and vn is <NUM> (two times the input signal of <NUM>). In continuation of same example, assume the input signal is changed to be <NUM>. The dynamic common mode adjustor <NUM> uses the adjustment information to map the value <NUM> to -<NUM> (signal yp = - <NUM>) and -<NUM> (signal vn = -<NUM>), in which the common mode or offset is still -<NUM>. The difference between the signal yp and vn is <NUM> (two times the input signal of <NUM>).

Example mapping is further discussed below.

In one embodiment, the first signal value and the second signal value generated by the dynamic common mode adjustor <NUM> via mapping represent settings of a pair of signals (such as yp and yn) representing the differential output signal <NUM>.

Note that map information (such as a look-up table, etc.) can include a piece-wise linear math function (as illustrated in graph <NUM>) to derive the offset (common mode settings) associated with the differential signals <NUM>, <NUM>.

In yet further embodiments, the dynamic common mode adjustor <NUM> implements (via signal processing) one or more polynomial (mathematical) functions to produce the offset that is applied to a respective differential signal <NUM>, <NUM> derived from the received input signal <NUM>.

<FIG> is an example diagram illustrating implementation of a dynamic common mode adjustor and a differential digital-to-analog converter according to embodiments herein.

As shown in <FIG>, an instantiation of the dynamic common mode adjustor <NUM> can be configured to include summer <NUM>, summer <NUM>, sign inverter <NUM> (gain of -<NUM>), and adjustor <NUM>. In such an embodiment, during operation, the adjustor <NUM> receives the input signal <NUM>. Via function <NUM>, the adjustor <NUM> outputs a respective common mode adjustment signal <NUM> [having a value of CM(x)] to both summer <NUM> and summer <NUM>. Sign inverter <NUM> applies a gain of -<NUM> to the input signal <NUM> to produce signal <NUM> (-x).

As its name suggests, summer <NUM> adds the common mode adjustment signal <NUM> and the input signal <NUM> to produce the digital differential signal component <NUM>-<NUM> (signal yp, where yp = x + CM (x)). Summer <NUM> adds the common mode adjustment signal <NUM> and the inverted input signal <NUM> (-x) to produce the digital differential signal component <NUM>-<NUM> (signal yn, where yn = -x + CM (x)).

Accordingly, the dynamic common mode adjustor <NUM> modifies the common mode setting associated with the differential signals <NUM> and <NUM> depending on a magnitude of the input signal <NUM>.

As previously discussed, the adjustment signal <NUM> (or offset <NUM>) is constant (such as -CM_MIN) for magnitudes of signal <NUM> between -x1 and x1; adjustment signal <NUM> (or offset <NUM>) varies for magnitudes of signal <NUM> between -x2 and -x1 and between x1 and x2; adjustment signal <NUM> (or offset <NUM>) is set to zero for values of signal <NUM> less than -x2 and greater than x2.

<FIG> is an example diagram illustrating implementation of a dynamic common mode adjustor and a differential digital-to-analog converter according to embodiments herein. In this example embodiment, the dynamic common mode adjustor <NUM> includes adjustor <NUM>-<NUM> and adjustor <NUM>-<NUM>.

In this instance of the dynamic common mode adjustor <NUM>, the adjustor <NUM>-<NUM> implements function <NUM> to convert the input signal <NUM> to digital differential signal component <NUM>-<NUM>; the adjustor <NUM>-<NUM> implements function <NUM> to convert the input signal <NUM> to digital differential signal component <NUM>-<NUM>.

As further shown, differential digital-to-analog converter <NUM> receives the differential signal <NUM> and converts it into respective analog differential signal <NUM>. For example, in one embodiment, the differential digital-to-analog converter <NUM> includes modulator <NUM>, modulator <NUM>, remapper <NUM>, and <NUM>-level digital-to-analog converter <NUM>.

Further, during operation, the modulator <NUM> receives digital differential signal component <NUM>-<NUM> and converts it into signal <NUM> (such as a serial stream representing the digital differential signal component <NUM>-<NUM>).

The modulator <NUM> receives digital differential signal component <NUM>-<NUM> and converts it into signal <NUM> (such as a serial stream representing the digital differential signal component <NUM>-<NUM>).

As further shown, and as its name suggests, the remapper <NUM> converts a combination of the received signals <NUM> and <NUM> into signal <NUM> representative of the differential signal. Finally, digital-to-analog converter <NUM> converts the signal <NUM> into the differential signal <NUM>.

Thus, functions <NUM> and <NUM> implemented by the adjustors <NUM>-<NUM> and <NUM>-<NUM> provide different common mode adjustments depending on a magnitude of the input signal <NUM>. Note again that the functions <NUM> and <NUM> can be adjusted to accommodate any desirable common mode settings.

<FIG> is an example block diagram of a computer device for implementing any of the operations as discussed herein according to embodiments herein. As shown, computer system <NUM> (such as implemented by any of one or more resources such as dynamic common mode adjustor <NUM>, digital-to-analog converters, etc.) of the present example includes an interconnect <NUM> that couples computer readable storage media <NUM> such as a non-transitory type of media (or hardware storage media) in which digital information can be stored and retrieved, a processor <NUM> (e.g., computer processor hardware such as one or more processor devices), I/O interface <NUM>, and a communications interface <NUM>.

I/O interface <NUM> provides connectivity to any suitable resources such as a respective resource storing adjustment information <NUM>. As previously discussed, adjustment information <NUM> facilitates generation of an offset value (common mode setting) applied to the respective differential signal <NUM> depending on a level or setting of the input signal <NUM>.

Computer readable storage medium <NUM> can be any hardware storage resource or device such as memory, optical storage, hard drive, floppy disk, etc. In one embodiment, the computer readable storage medium <NUM> stores instructions and/or data used by the dynamic common mode adjustor application <NUM>-<NUM> to perform any of the operations as described herein.

Further in this example embodiment, communications interface <NUM> enables the computer system <NUM> and processor <NUM> to communicate over a resource such as network <NUM> to retrieve information from remote sources and communicate with other computers.

As shown, computer readable storage media <NUM> is encoded with dynamic common mode adjustor application <NUM>-<NUM> (e.g., software, firmware, etc.) executed by processor <NUM>. Dynamic common mode adjustor application <NUM>-<NUM> can be configured to include instructions to implement any of the operations as discussed herein.

During operation of one embodiment, processor <NUM> accesses computer readable storage media <NUM> via the use of interconnect <NUM> in order to launch, run, execute, interpret or otherwise perform the instructions in dynamic common mode adjustor application <NUM>-<NUM> stored on computer readable storage medium <NUM>.

Execution of the dynamic common mode adjustor application <NUM>-<NUM> produces processing functionality such as control process <NUM>-<NUM> in processor <NUM>. In other words, the dynamic common mode adjustor process <NUM>-<NUM> associated with processor <NUM> represents one or more aspects of executing dynamic common mode adjustor application <NUM>-<NUM> within or upon the processor <NUM> in the computer system <NUM>.

In accordance with different embodiments, note that computer system <NUM> can be a micro-controller device, logic, hardware processor, hybrid analog/digital circuitry, etc., configured to perform any of the operations as described herein.

Functionality supported by the different resources will now be discussed via flowchart in <FIG>. Note that the steps in the flowcharts below can be executed in any suitable order.

<FIG> is an example diagram illustrating a method according to embodiments herein. In processing operation <NUM>, the dynamic common mode adjustor <NUM> receives an input signal <NUM> (signal x).

In processing operation <NUM>, the dynamic common mode adjustor <NUM> derives a differential signal <NUM> (combination of signal <NUM>-<NUM> and signal <NUM>-<NUM>) from the received input signal <NUM>.

In processing operation <NUM>, the dynamic common mode adjustor <NUM> varies an offset of the differential signal <NUM> as a function of the received input signal <NUM> to produce offset differential signal <NUM>.

In processing operation <NUM>, the dynamic common mode adjustor <NUM> outputs the offset differential signal <NUM>.

Note again that techniques herein are well suited for use in differential signal generators, digital-to-analog converters, electronic circuits, etc. However, it should be noted that embodiments herein are not limited to use in such applications and that the techniques discussed herein are well suited for other applications as well.

Claim 1:
An apparatus comprising:
an input (<NUM>) operable to receive an input signal (<NUM>);
a dynamic common mode adjustor (<NUM>) configured to: i) derive a differential signal from the received input signal (<NUM>), and ii) vary a common mode setting of the differential signal as a function of the received input signal (<NUM>) to produce an offset differential signal (<NUM>-<NUM>, <NUM>-<NUM>); and
an output (<NUM>-<NUM>, <NUM>-<NUM>) configured to output the offset differential signal,
wherein the dynamic common mode adjustor (<NUM>) includes an offset adjustor (<NUM>) configured to generate the offset,
wherein the offset adjustor (<NUM>) is configured to
generate the common mode setting (<NUM>) as a fixed value during operating conditions in which a magnitude of the received input signal (<NUM>) is less than a first threshold value (X1),
vary the common mode setting (<NUM>) such that the magnitude of the common mode setting linearly decreases from the fixed value to zero during operating conditions in which the magnitude of the received input signal (<NUM>) is greater than the first threshold value (X1) and less than a second threshold value (X2), and
generate the common mode setting (<NUM>) to be zero during operating conditions in which the magnitude of the received input signal (<NUM>) is greater than the second threshold value (X2).