Patent Description:
This invention was made with government support under Grant No. W911NF-<NUM>-<NUM>-<NUM> awarded by United States Army - Army Research Office. The US government has certain rights in the invention.

The present application relates generally to superconducting devices and methods of making superconducting devices. More specifically, the present application relates to superconducting devices formed from multiple substrates configured to exhibit quantum mechanical phenomena and methods for making such devices.

Quantum information processing uses quantum mechanical phenomena, such as energy quantization, superposition, and entanglement, to encode and process information in a way not utilized by conventional information processing. For example, it is known that certain computational problems may be solved more efficiently using quantum computation rather than conventional classical computation. However, to become a viable computational option, quantum computation requires the ability to precisely control a large number of quantum bits, known as "qubits," and the interactions between these qubits. In particular, qubits should have long coherence times, be able to be individually manipulated, be able to interact with one or more other qubits to implement multi-qubit gates, be able to be initialized and measured efficiently, and be scalable to large numbers of qubits.

A qubit may be formed from any physical quantum mechanical system with at least two orthogonal states. The two states of the system used to encode information are referred to as the "computational basis. " For example, photon polarization, electron spin, and nuclear spin are two-level systems that may encode information and may therefore be used as a qubit for quantum information processing. Different physical implementations of qubits have different advantages and disadvantages. For example, photon polarization benefits from long coherence times and simple single qubit manipulation, but suffers from the inability to create simple multi-qubit gates.

Different types of superconducting qubits using Josephson junctions have been proposed, including "phase qubits," where the computational basis is the quantized energy states of Cooper pairs in a Josephson Junction; "flux qubits," where the computational basis is the direction of circulating current flow in a superconducting loop; and "charge qubits," where the computational basis is the presence or absence of a Cooper pair on a superconducting island. Superconducting qubits are an advantageous choice of qubit because the coupling between two qubits is strong making two-qubit gates relatively simple to implement, and superconducting qubits are scalable because they are mesoscopic components that may be formed using conventional electronic circuitry techniques.

Methods of forming superconducting cavities by forming troughs in substrates which are then plated with a superconducting material and bonded together such that the troughs together form a cavity are shown, for example, in <CIT> and <CIT>.

The inventors have recognized and appreciated that superconducting devices may be manufactured using conventional microelectronic fabrication techniques. Accordingly, embodiments are directed to methods for manufacturing superconducting devices as defined in the claims.

Embodiments are directed to a method for manufacturing a superconducting device. The method includes acts of forming at least one trough in at least a first substrate; covering at least a portion of the first substrate with a superconducting material; covering at least a portion of a second substrate with the superconducting material; and bonding the first substrate and the second substrate to form at least one enclosure comprising the at least one trough and the superconducting material, the enclosure being configured to form at least one resonant cavity. Furthermore, the method comprises forming channels in at least one wiring layer substrate, covering at least a portion of the channels with the superconducting material to form a wiring layer, and bonding the at least one wiring substrate to the first substrate and/or the second substrate.

In some embodiments, the act of forming the at least one trough includes acts of: forming a mask layer that covers a portion of the first substrate; and etching a portion of the first substrate not covered by the mask layer. The act of etching may include an act of anisotropic etching using, for example, a wet etchant. The mask layer may include silicon nitride.

In some embodiments, the act of covering at least a portion of the first substrate with a superconducting material includes acts of: forming a seed layer on at least the portion of the first substrate; and electroplating the superconducting material onto the seed layer. The superconducting material may include one or more of aluminum, niobium, indium, rhenium, tantalum, titanium nitride, and niobium nitride.

In some embodiments, the method further includes acts of: forming channels in at least one wiring layer substrate; covering at least a portion of the channels with the superconducting material to form a wiring layer; and bonding the at least one wiring substrate to the first substrate and/or the second substrate. The act of forming at least one trough in at least a first substrate may include: forming a first trough in the first substrate; and forming a second trough in the second substrate, wherein the at least one enclosure comprises a first enclosure formed from the first trough and the second trough. In some embodiments, the at least one enclosure is configured to form at least one electromagnetic shield such that external electromagnetic radiation is prevented from entering the at least one enclosure. At least one superconducting component may be formed within the first enclosure. The at least one superconducting component may include at least one superconducting circuit, at least one qubit and/or at least one stripline resonator. In some embodiments, at least a portion of said second substrate is covered with a support layer and at least one qubit is disposed on and/or within the support layer within the cavity.

In some embodiments, the act of forming at least one trough in at least a first substrate further comprises forming a third trough in a third substrate, the method further comprising: covering at least a portion of the third substrate with the superconducting material; covering at least a portion of a fourth substrate with the superconducting material; bonding the third substrate and the fourth substrate to form a memory layer comprising a second enclosure from the third trough; and bonding the memory layer to the at least one wiring layer. The wiring layer may couple the second enclosure to the first enclosure. The first enclosure may be electrically connected to the wiring layer through at least one via. In some embodiments, a Q factor of the second enclosure is greater than a Q factor of the first enclosure.

In some embodiments, the method may also include coupling at least one qubit to the at least one enclosure. Coupling the at least one qubit to the at least one enclosure may include forming the at least one qubit within the at least one enclosure and/or forming the at least one qubit within the at least one enclosure. The at least one qubit may be a transmon qubit or a flux onium qubit.

In some embodiments, the at least one enclosure is configured to form at least one three-dimensional cavity resonator such that electromagnetic radiation at one or more frequencies resonates within the at least one three-dimensional cavity resonator.

The inventors have recognized and appreciated that the coherence times of superconducting devices can be significantly increased by using microelectronic fabrication techniques to form three-dimensional cavity resonators. These devices are less-sensitive to materials imperfections of both insulating substrates and conductors than more conventional, planar circuits. Significantly improved coherence times have been observed with three-dimensional resonators fabricated by conventional means. Such three-dimensional resonators may also benefit from having highly smoothed surfaces with few imperfections, that can result from etching techniques. In some applications, a three-dimensional cavity resonator may be used as a long-lived memory for quantum information. A superconducting qubit may be coupled to the three-dimensional cavity resonator such that quantum information transferred from the superconducting qubit to the photonic energy states of the three-dimensional cavity resonator. In some examples, one or more superconducting qubits may be coupled to a three-dimensional cavity resonator through a wiring layer. In other examples , one or more superconducting qubits may be disposed within the three-dimensional cavity resonator such that electromagnetic radiation within the cavity couples directly to the one or more superconducting qubits.

The inventors have recognized and appreciated that an enclosure formed from a superconducting material may shield components within the cavity from external electromagnetic noise, and prevent decoherence by suppressing losses due to electromagnetic radiation by the quantum circuit, even when the thickness of the superconducting material is small. Thus, superconducting layers may be formed to cover substrate layers to create precise, easily scaled superconducting devices. In some examples, an electromagnetic shield may enclose one or more superconducting qubits to shield the qubits from external noise, thereby increasing the performance of the superconducting qubits. For example, a stripline resonator comprising a plurality of superconducting qubits that act as a quantum bus may be disposed within an electromagnetic shield enclosure. Moreover, thin superconducting shields constructed between the parts or subunits of a large quantum processor will improve performance, reliability, and ease of calibration of the quantum device. In some examples, the quantum bus may be coupled to one or more other superconducting components such that quantum information from a first component may be transferred to a second component.

The inventors have also recognized and appreciated that using microelectronic fabrication techniques to manufacture superconducting devices comprising at least one superconducting enclosure for use in quantum information processing allows scalability that is not available when cavities are formed from bulk material. In some embodiments, a plurality of enclosures and superconducting qubits may be formed in a single device by forming troughs in a plurality of substrates and bonding the substrates together. In some embodiments, one or more wiring layers may be used to connect components together and or connect components to external devices. In some embodiments, one or more vias may interconnect components and/or wiring layers that are in different substrate layers. In this way, a plurality of superconducting qubits and/or enclosures may be interconnected in a compact space.

Microelectronic fabrication techniques are processes used in the manufacture of, for example, micrometer sized structures for semiconductor devices and/or microelectromechanical systems (MEMS). Examples of microelectronic fabrication techniques include, but are not limited to: deposition techniques, such as chemical vapor deposition (CVD) and physical vapor deposition (PVD); photolithography; etching techniques, such as dry etching, wet etching, reactive ion etching (RIE), isotropic etching and anisotropic etching; chemical-mechanical planarization; ion implantation techniques; and thermal oxidation techniques.

Throughout the present application, the term "enclosure" is used to describe a combination of superconducting layers that define a region of space that may be empty space or contain one or more superconducting devices of various types such as wiring, qubits, resonators, cavities, or other active devices within one or more substrates. A "three-dimensional cavity resonator" is a type of enclosure that is configured to support resonant electromagnetic radiation. An "electromagnetic shield" is a type of enclosure that is configured to prevent external electromagnetic radiation from entering the enclosure and prevent internal electromagnetic radiation from leaking out of the enclosure to the external environment.

<FIG> illustrates a superconducting device <NUM> according to an example. The superconducting device comprises a plurality of substrates <NUM>-<NUM> that are bonded together in any suitable way. For example, two substrates that have been covered, at least partially, with a metal material may be bonded together using cold welding, thermocompression bonding, thermosonic bonding, eutectic bonding or solder reflow. Any suitable number of substrates may be bonded together to form superconducting device <NUM>. The example illustrated in <FIG> shows five separate substrates <NUM>-<NUM>, but embodiments are not so limited. For example, some embodiments may bond only two substrates together.

The different substrates of the superconducting device <NUM> may serve different purposes. For example, substrate <NUM> and substrate <NUM> together form a bus layer, which is described in more detail in connection with <FIG> below. Substrate <NUM> and substrate <NUM> together form a cavity memory layer, which is described in more detail below in connection with <FIG>. Substrate <NUM> is used as an interconnection layer used to interconnect various components within the superconducting device <NUM>. The interconnection layer comprises at least one wiring layer formed from a superconducting material disposed on and/or within the substrate <NUM> in a pattern that is configured to interconnect different components of the superconducting device <NUM>.

The substrates <NUM>-<NUM> may comprise any suitable material. By way of example and not limitation, the material may include any material with a crystalline structure. For example, silicon or germanium may be used. However, the substrate material may be insignificant as what controls the behavior of the superconducting device is the superconducting material that coats various portions of the substrate and the troughs that are created within the substrate to form enclosures. Additionally, the substrates <NUM>-<NUM> may be of any suitable dimensions. By way of example and not limitation, the substrates <NUM>-<NUM> may have a thickness ranging from <NUM> to <NUM>.

The superconducting layers of the superconducting device <NUM> may be formed in any suitable way. In some embodiments, the surface of the substrate is covered with a superconducting material. In other embodiments, one or more channels and/or troughs may be formed in the substrate that are subsequently covered, at least in part, with a superconducting material. Any suitable thickness of superconducting layer may be used. In some embodiments, a superconducting layer of superconducting device <NUM> may have a thickness ranging from <NUM> to <NUM>. Additionally, any suitable superconducting material may be used. By way of example and not limitation, the superconducting material may include aluminum, niobium, indium, rhenium, tantalum, titanium nitride, and/or niobium nitride.

In some embodiments, superconducting device <NUM> may communicate to external components via a planar-to-coaxial transition component <NUM> or any other suitable electronic connection, as known is in the art.

<FIG> illustrates a single cross-section of the device showing three separate enclosures <NUM>, <NUM> and <NUM>. One of skill in the art would recognize that other cross-sections at different positions into and out of the plane of the figure may include additional enclosures that may be coupled to the enclosures <NUM>, <NUM> and <NUM> through the wiring layer <NUM>, the vias <NUM> and <NUM>, and/or additional wiring layers and vias not illustrated. Additionally, the wiring on a given layer or vias between layers may be separately enclosed by additional superconducting layers (not shown) realized by the same, or different, methods. The idea that all electromagnetic signals should be carried on properly designed transmission line structures, such as striplines or coaxial lines, and that these may be realized by the embodiment of our method for realizing superconducting enclosures, should be clear to one skilled in the art.

As mentioned above, a cavity memory layer may be formed from substrate <NUM> and <NUM>. A trough is formed in the substrate <NUM> and covered, at least in part, with a superconducting layer <NUM>. At least a portion of substrate <NUM> is also covered in a superconducting layer <NUM>. The trough may be any suitable shape or size. For example, the trough may extend from a surface of the substrate by about <NUM>. The substrates are then positioned such that when connected together, a three-dimensional cavity resonator <NUM> is formed. <FIG> illustrates an embodiment <NUM> of a cavity memory layer in more detail. The three-dimensional cavity resonator130 includes at least a first surface <NUM> and a second surface <NUM> that are opposed to one another. In some embodiments, the two surfaces are parallel to one other. In other embodiments, the first surface <NUM> and the second surface <NUM> may both form a non-perpendicular angle with the superconducting layer <NUM> associated with substrate <NUM>. In some embodiments, every surface of the three-dimensional cavity resonator <NUM> is covered, at least in part, with a superconducting material. In some embodiments, each surface of the three-dimensional cavity is covered in its entirety except for two apertures <NUM> and <NUM> formed in the superconducting layer <NUM>. The apertures <NUM> and <NUM> may be used to couple electromagnetic radiation into the three-dimensional cavity resonator <NUM> from the wiring layer <NUM>. Other methods of coupling to the cavity, which would be known by those skilled in the art, may also be employed.

The geometry of the three-dimensional cavity resonator <NUM> determines which frequencies of electromagnetic radiation will be resonant with the cavity. In some embodiments, the three-dimensional cavity resonator <NUM> may be configured to resonate at microwave frequencies. By way of example and not limitation, the three-dimensional cavity resonator <NUM> may be configured to resonate at at least one frequency ranging between <NUM> and <NUM>. As a further example, the three-dimensional cavity <NUM> may be configured to resonate at at least one frequency ranging between <NUM> and <NUM>.

In some configurations, the superconducting device <NUM> may include one or more superconducting qubits <NUM> disposed within the three-dimensional cavity resonator <NUM>. Any suitable superconducting qubit may be used. By way of example and not limitation, each of the superconducting qubits <NUM> may be a transmon qubit or a fluxonium qubit. Each of the superconducting qubits <NUM> may comprise a Josephson junction disposed between two superconducting portions that act as a dipole antenna. In some configurations, the superconducting qubits <NUM> are oriented vertically such that the axis of each superconducting qubit (as determined by the orientation of the dipole antenna) is perpendicular to the superconducting layer <NUM> used to form the apertures <NUM> and <NUM>, and the qubits thereby couple to the electromagnetic fields of the resonant cavity.

In other configurations, the three-dimensional cavity resonator <NUM> does not contain a superconducting qubit, but is instead coupled to a superconducting qubit through wiring layer <NUM>. In this way, an external superconducting qubit (not shown) may transfer quantum information to the three-dimensional cavity resonator <NUM>, which may act as a memory for the quantum information.

Quantum information may be stored in the three-dimensional cavity resonator 130in any suitable way. For example, the energy eigenstates of the electromagnetic field may be used as the computational basis for encoding quantum information. Alternatively, different coherent states and/or superpositions of coherent state (sometimes called "cat states") may be used as the computational basis. Embodiments are not limited to any particular technique for encoding the quantum information in the three-dimensional cavity resonator <NUM>.

As mentioned above, substrate <NUM> and substrate <NUM> of <FIG> form a bus layer. The bus layer includes enclosure <NUM> and enclosure <NUM>, which are configured to be electromagnetic shields. Electromagnetic shield <NUM> includes a plurality of qubits <NUM> formed on and/or in a support layer <NUM> that is suspended within the electromagnetic shield <NUM>. Electromagnetic shield <NUM> includes a superconducting layer <NUM> and a superconducting layer <NUM> for enclosing the qubits <NUM>, thereby shielding the qubits <NUM> from external electromagnetic noise and preventing unwanted electromagnetic radiation from entering the enclosure. The electromagnetic shield <NUM> also prevents electromagnetic radiation from within the enclosure from leaking to the external environment. Similarly, electromagnetic shield <NUM> includes a plurality of qubits <NUM> formed on and/or in a support layer <NUM> that is suspended within the cavity <NUM>. Electromagnetic shield <NUM> includes a superconducting layer <NUM> and a superconducting layer <NUM> for enclosing the qubits <NUM>, thereby shielding the qubits <NUM> from external electromagnetic noise and preventing unwanted electromagnetic radiation or cross-coupling to other elements of the device.

<FIG> illustrates a more detailed cross-sectional view <NUM> of electromagnetic shield <NUM> according to some configurations. Substrate <NUM> includes a trough from which the electromagnetic shield <NUM> is formed. At least a portion of the trough is covered with a superconducting layer <NUM>. The superconducting layer <NUM> may also cover portions of the substrate <NUM> that are part of the trough. A plurality of qubits <NUM> are formed in and/or on a support layer <NUM>. In some configurations, the support layer is a dielectric membrane suspended across the trough in substrate <NUM>. Any suitable material may be used to form the support layer. By way of example and not limitation, the support layer may comprise silicon, silicon oxide, or silicon nitride. The plurality of qubits <NUM> may be any suitable superconducting qubit, such as a transmon qubit or a fluxonium qubit. Each individual qubit of the plurality of qubits <NUM> may be individually controlled and/or detected using feed lines <NUM>, which are formed in and/or on the support layer <NUM>. A stripline resonator <NUM> is disposed between a first plurality of qubits and a second plurality of qubits. In some embodiments, the stripline resonator <NUM> may be approximately <NUM> wide. The feed lines <NUM> and the stripline resonator <NUM> may be formed from any suitable superconducting material.

Substrate <NUM> also includes a trough that has approximately the same dimensions and the trough in substrate <NUM>. At least a portion of the trough in substrate <NUM> is covered with a superconducting layer <NUM>. Substrate <NUM> is disposed near substrate <NUM> such that a gap exists between feedline <NUM> and superconducting layer <NUM>. In some embodiments, the gap may be approximately <NUM>. Substrate <NUM> and substrate <NUM> may be in contact with each other at a location away from electromagnetic shield <NUM> such that they may be bonded together. By enclosing the stripline resonator <NUM> and the plurality of qubits <NUM> in an electromagnetic shield, the enclosed components are isolated from external electromagnetic noise, and decoherence due to unwanted electromagnetic radiation and cross-couplings are prevented.

<FIG> illustrates a top view <NUM> of the support layer <NUM> and the components included thereon. The arrows indicating "A" illustrate a plane representing the location of the cross-section view <NUM> of <FIG>. Membrane <NUM> includes a plurality of superconducting qubits <NUM>. In some embodiments, each superconducting qubit is a superconducting qubit, such as a transmon qubit or a fluxonium qubit. <FIG> illustrates transmon qubits <NUM> comprising a Josephson junction <NUM> between a first superconducting portion <NUM> and a second superconducting portion <NUM>. Each qubit <NUM> may be individually controlled and/or read-out using drive feed lines <NUM>. A large portion of the surface of the support layer <NUM> is covered with a superconducting layer as the ground plane for the stripline resonator <NUM>. The stripline resonator <NUM> is driven via feedlines <NUM>. There is a gap between the feedlines <NUM> and the stripline resonator such that the two components are weakly, capacitively coupled. Optionally, there are a plurality of holes <NUM> in the support layer <NUM> to reduce the amount of dielectric present in the enclosure in which the support layer is disposed and increase the amount of vacuum present in the enclosure, which may increase performance.

Superconducting devices according to certain examples may be manufactured in any suitable way. For example, microelectronic fabrication techniques may be used. Alternatively, the substrates may be formed with troughs and channels as desired using three-dimensional printing techniques and the superconducting layers may be formed using, for example, electroplating techniques. Some embodiments may create enclosures by forming a trough in a single substrate, as illustrate in <FIG>. Alternatively, or in addition, enclosures may be created by forming a first trough in a first substrate and a second trough in a second substrate and placing the two substrates together with the two troughs adjacent to one another. Methods for forming superconducting devices according to some embodiments of the invention are described below with reference to <FIG>.

<FIG> illustrates a cross-sectional view of a plurality of acts of a method for constructing a superconducting device according to some embodiments. A flowchart of the acts of the method <NUM> according to some embodiments is shown in <FIG>. At act <NUM>, a first trough is formed in a first substrate. The trough may be formed in any suitable way. In some embodiments, the substrate and trough may be printed using three-dimensional printing techniques. In other embodiments, microelectronic fabrication techniques may be used. Details of one such embodiment is now described in connection with <FIG>, <FIG> and <FIG>.

<FIG> illustrates a first substrate <NUM> being provided. Any suitable substrate may be used. In some embodiments, the substrate may be formed from a material with a crystalline structure. For example, the substrate may comprise silicon or germanium. The substrate <NUM> may be of any suitable thickness. In the illustrated embodiments, the substrate is approximately <NUM> thick.

At act <NUM>, a silicon nitride layer <NUM> is deposited on a first surface of the substrate <NUM> (see <FIG>). While silicon nitride is used in the illustrative embodiment of <FIG>, any suitable material that may act as a mask may be used.

At act <NUM>, a photoresist layer <NUM> is deposited on top of the silicon nitride layer <NUM> (see <FIG>). The photoresist layer <NUM> is formed in a pattern based on the dimensions of the trough being formed in the substrate <NUM>. Accordingly, the photoresist layer is absent from the region above where the trough will be formed in the substrate in the subsequent acts. By way of example and not limitation, the photoresist layer <NUM> may be formed such that an area of the silicon nitride layer <NUM> with dimensions <NUM> by <NUM> is left exposed.

At act <NUM>, the exposed portion of the silicon nitride layer <NUM> is removed (see <FIG>). This may be achieved in any suitable way. In some embodiments, the silicon nitride layer <NUM> is etched using an etchant that removes the silicon nitride layer, but does not remove the photoresist. For example, reactive ion etching (RIE) may be used to etch the silicon nitride layer. The act of RIE may use, for example, CHF<NUM>/O<NUM> as an etchant. The photoresist layer <NUM> is then removed at act <NUM>. The resulting structure is the substrate <NUM> partially covered with the silicon nitride layer <NUM> which will act as a mask for defining dimensions of the trough (see <FIG>).

At act <NUM>, the exposed portion of the substrate <NUM> is etched to form a trough <NUM>. Any suitable etching may be performed. In some embodiments, the substrate <NUM> may be etched such that opposing surfaces of the resulting trough <NUM> are parallel to one another. In the embodiment shown in <FIG>, the trough is etched using an anisotropic wet etch using <NUM>% KOH at <NUM>. The details of the anisotropic etch is shown in more detail in <FIG>.

<FIG> illustrates the trough <NUM> resulting from an anisotropic wet etch. Because of the crystalline structure of the silicon substrate <NUM>, the (<NUM>) plane <NUM> and the (<NUM>) <NUM> plane for a <NUM>° angle as a result of the etching act. In some embodiments, the anisotropic wet etch results in surfaces <NUM> and <NUM> that are atomically smooth. Thus, when covered in a superconducting layer the surface of the resulting enclosure will be substantially free from defects. If the enclosure is configured for use as a three-dimensional cavity resonator, the smooth surfaces result in a high Q factor cavity.

At act <NUM>, the silicon nitride layer is removed resulting in the substrate <NUM> including the trough <NUM> (see <FIG>). While <FIG> illustrated one embodiment of a method for creating a trough in a substrate, any suitable method may be used. For example, laser machining or three-dimensional printing may be used to form a substrate with a trough.

Returning to <FIG>, after the trough is formed in a substrate at act <NUM> the method <NUM> continues at act <NUM>, where at least a portion of the first substrate is covered with a superconducting material. In some embodiments, all the surfaces of the trough in the substrate may be covered. In other embodiments, only portions of the surfaces may be covered. In this way, for example, apertures may be formed. In some embodiments, portions of the substrate outside of the region associated with the trough may also be covered with a superconducting layer.

The superconducting layer may be formed in any suitable way. For example, <FIG> illustrate one particular method for forming a superconducting layer that covers at least a portion of the substrate. <FIG> illustrates a thin seed layer <NUM> is deposited over the surface of the substrate <NUM>. This may be done in any suitable way. In some embodiments, copper is deposited via evaporation techniques to form the seed layer <NUM>. Any suitable thickness of seed layer may be used. For example, the seed layer <NUM> may be approximately <NUM> thick. While copper is used as an example material for the seed layer <NUM>, any suitable material may be used.

<FIG> illustrates a superconducting layer <NUM> formed on the seed layer <NUM>. This may be done in any suitable way. For example, a superconducting material may be electroplated onto the seed layer. The superconducting layer <NUM> may be formed with any suitable thickness. For example, the superconducting layer <NUM> may be approximately <NUM> thick. Any suitable superconducting material may be used. For example, the superconducting layer may comprise aluminum, niobium, indium, rhenium, tantalum, titanium nitride, or niobium nitride.

At act <NUM>, a second trough is formed in a second substrate. The act of forming the second trough may be achieved using the same techniques described in connection with act <NUM>, <FIG> and <FIG>. However, the formation of the second trough is optional. An enclosure may be formed from a single trough in a first substrate without forming a second trough in a second substrate.

At act <NUM>, at least a portion of the second substrate is covered with a superconducting material. This act may be achieved using the techniques described in connection with act <NUM>. In embodiments where a second trough is formed in the second substrate, at least a portion of every surface of the trough may be covered with a superconducting layer. In some embodiments, a portion of the second substrate outside of the trough region may be at least partially covered with a superconducting layer.

At act <NUM>, at least one superconducting qubit is formed on a support layer. In some embodiments, the support layer may be any suitable dielectric membrane. For example, the support layer may comprise silicon, silicon oxide, or silicon nitride. In some embodiments, act <NUM> may be omitted as superconducting devices may be formed without a superconducting qubit being enclosed in an enclosure.

At act <NUM>, the first substrate and the second substrate are bonded together to form an enclosure. In embodiments where the first trough was formed in the first substrate and a second trough was formed in the second substrate, the two troughs are positioned adjacent to one another such that the enclosure is formed from both troughs together. In some embodiments where at least one superconducting qubit is to be enclosed by an enclosure, the support layer is suspended across the first trough prior to bonding the two substrates together. Accordingly, the at least one qubit in and/or on the support layer is disposed within the enclosure.

The method <NUM> may also include additional optional acts shown in <FIG> and <FIG>. For example, the result of performing method <NUM> may be the formation of enclosure <NUM> in the bus layer of <FIG>. <FIG> illustrates additional acts for forming the wiring layer <NUM> and the memory layer enclosure <NUM>. <FIG> illustrates additional acts for forming the second enclosure <NUM> in the bus layer.

<FIG> illustrates additional acts <NUM> for forming the wiring layer and the memory layer. In some embodiments, the additional acts may be performed after the method <NUM>. In other embodiments, the additional acts may be performed before the method <NUM> or simultaneously with method <NUM>.

At act <NUM>, at least one channel is formed in wiring layer substrate <NUM> (see <FIG>). The at least one channel may be formed, for example, using the same process used to create the trough in act <NUM>.

At act <NUM>, at least a portion of the at least one channel is covered with superconducting material. This may be achieved using the same process used above in connection with act <NUM>. In some embodiments, the channel may be completely filled with superconducting material. In other embodiments, the one or more of the surfaces of the at least one channel may be covered with the superconducting material.

At act <NUM>, the wiring substrate <NUM> is bonded to substrate <NUM>. The substrates may be bonded in any suitable way, as discussed above.

At act <NUM>, a trough is formed in substrate <NUM> using, for example, the same process used to create the trough in act <NUM>.

At act <NUM>, at least a portion of substrate <NUM> is covered with a superconducting material. This may be achieved using the same process used above in connection with act <NUM>. In some embodiments, each surface of the through is completely covered with superconducting material. The superconducting material is formed in a layer that may be any suitable thickness. In some embodiments, the superconducting layer may be approximately <NUM> thick. In other embodiments, the superconducting layer may be approximately <NUM> thick.

At act <NUM>, at least a portion of substrate <NUM> is covered with a superconducting material. This may be achieved using the same process used above in connection with act <NUM>. Certain portions of a surface of substrate <NUM> may be left exposed. For example, the area corresponding to apertures <NUM> and <NUM> in <FIG> may not be covered with superconducting material.

At act <NUM>, substrate <NUM> is bonded to substrate <NUM> such that the trough forms a three-dimensional cavity resonator. The substrates may be bonded in any suitable way, as discussed above.

At act <NUM>, the memory layer is bonded to the wiring layer. The substrates associated with the layers may be bonded in any suitable way, as discussed above.

<FIG> illustrates additional acts for forming the second enclosure <NUM> in the bus layer.

At act <NUM>, a trough associated with enclosure <NUM> is formed in the substrate <NUM> using, for example, the same process used to create the trough in act <NUM>. In some embodiments, the trough associate with enclosure <NUM> may be formed simultaneously with the trough associated with enclosure <NUM>.

At act <NUM>, at least a portion of substrate <NUM> may be covered with a support layer which is suspended over the trough associated with enclosure <NUM>. This support layer may be formed in the same way as the support layer associated with enclosure <NUM>.

At act <NUM>, at least one qubit is formed on the support layer. This at least one qubit may be formed in the same way as the support layer associated with enclosure <NUM>.

Having thus described several aspects of at least one example of a superconducting device and at least one method for manufacturing a superconducting device, it is to be appreciated that various alterations, modifications, and improvements will readily occur to those skilled in the art. For example, superconducting enclosures of any size may be included. Some enclosures may have dimensions on the order of a centimeter, a millimeter, or a micrometer. Such alterations, modifications, and improvements are intended to be part of this. While the present teachings have been described in conjunction with various embodiments and examples, it is not intended that the present teachings be limited to such embodiments or examples. On the contrary, the present teachings encompass various alternatives, modifications, and equivalents, as will be appreciated by those of skill in the art, the scope of the invention being solely defined by the claims.

While various inventive embodiments have been described and illustrated, those of ordinary skill in the art will readily envision a variety of other means and/or structures for performing the function and/or obtaining the results and/or one or more of the advantages described, and each of such variations and/or modifications is deemed to be within the scope of the inventive embodiments described. More generally, those skilled in the art will readily appreciate that all parameters, dimensions, materials, and configurations described are meant to be exemplary and that the actual parameters, dimensions, materials, and/or configurations will depend upon the specific application or applications for which the inventive teachings is/are used. Those skilled in the art will recognize, or be able to ascertain using no more than routine experimentation, many equivalents to the specific inventive embodiments described. It is, therefore, to be understood that the foregoing embodiments are presented by way of example only and that, within the scope of the appended claims and equivalents thereto, inventive embodiments may be practiced otherwise than as specifically described and claimed. Inventive embodiments of the present disclosure may be directed to each individual feature, system, system upgrade, and/or method described. In addition, any combination of two or more such features, systems, and/or methods, if such features, systems, system upgrade, and/or methods are not mutually inconsistent, is included within of the present disclosure.

Further, though some advantages of the described embodiments may be indicated, it should be appreciated that not every embodiment will include every described advantage. Some embodiments may not implement any features described as advantageous. Accordingly, the foregoing description and drawings are by way of example only.

The section headings used are for organizational purposes only and are not to be construed as limiting the subject matter described in any way.

Also, the technology described may be embodied as a method, of which at least one example has been provided. The acts performed as part of the method may be ordered in any suitable way. Accordingly, embodiments may be constructed in which acts are performed in an order different than illustrated, which may include performing some acts simultaneously, even though shown as sequential acts in illustrative embodiments. In addition, certain acts performed as part of the method may be optional. Accordingly, embodiments may be constructed in which certain acts are not performed at all.

All definitions, as defined and used, should be understood to control over dictionary definitions, definitions in documents incorporated by reference, and/or ordinary meanings of the defined terms.

The terms "about," "approximately," and "substantially" may be used to refer to a value, and are intended to encompass the referenced value plus and minus acceptable variations. The amount of variation could be less than <NUM>% in some embodiments, less than <NUM>% in some embodiments, and yet less than <NUM>% in some embodiments. In embodiments where an apparatus may function properly over a large range of values, e.g., a range including one or more orders of magnitude, the amount of variation could be a factor of two. For example, if an apparatus functions properly for a value ranging from <NUM> to <NUM>, "approximately <NUM>" may encompass values between <NUM> and <NUM>.

The indefinite articles "a" and "an," as used in the specification and in the claims, unless clearly indicated to the contrary, should be understood to mean "at least one.

The phrase "and/or," as used in the specification and in the claims, should be understood to mean "either or both" of the elements so conjoined, i.e., elements that are conjunctively present in some cases and disjunctively present in other cases.

As used in the specification and in the claims, "or" should be understood to have the same meaning as "and/or" as defined above. In general, the term "or" as used shall only be interpreted as indicating exclusive alternatives (i.e. "one or the other but not both") when preceded by terms of exclusivity, such as "either," "one of," "only one of," or "exactly one of.

As used in the specification and in the claims, the phrase "at least one," in reference to a list of one or more elements, should be understood to mean at least one element selected from any one or more of the elements in the list of elements, but not necessarily including at least one of each and every element specifically listed within the list of elements and not excluding any combinations of elements in the list of elements.

The claims should not be read as limited to the described order or elements unless stated to that effect. It should be understood that various changes in form and detail may be made by one of ordinary skill in the art without departing from the spirit and scope of the appended claims. All embodiments that come within the spirit and scope of the following claims and equivalents thereto are claimed.

Claim 1:
A method for manufacturing a superconducting device, the method comprising acts of:
forming at least one trough (<NUM>) in at least a first substrate (<NUM>),
covering at least a portion of the first substrate with a superconducting material (<NUM>);
covering at least a portion of a second substrate (<NUM>) with the superconducting material (<NUM>);
bonding the first substrate and the second substrate to form at least one enclosure comprising the at least one trough and the superconducting material, wherein the at least one enclosure is configured to form at least one resonant cavity, characterised in that the method further comprises
forming channels in at least one wiring layer substrate;
covering at least a portion of the channels with the superconducting material to form a wiring layer; and
bonding the at least one wiring substrate to the first substrate and/or the second substrate.