Patent Description:
Solid-state lighting devices such as light-emitting diodes (LEDs) are increasingly used in both consumer and commercial applications. Advancements in LED technology have resulted in highly efficient and mechanically robust light sources with a long service life. Accordingly, modern LEDs have enabled a variety of new display applications and are being increasingly utilized for general illumination applications, often replacing incandescent and fluorescent light sources.

LEDs are solid-state devices that convert electrical energy to light and generally include one or more active layers of semiconductor material (or an active region) arranged between oppositely doped n-type and p-type layers. When a bias is applied across the doped layers, holes and electrons are injected into the one or more active layers where they recombine to generate emissions such as visible light or ultraviolet emissions. An LED chip typically includes an active region that may be fabricated, for example, from silicon carbide, gallium nitride, gallium phosphide, aluminum nitride, gallium arsenide-based materials, and/or from organic semiconductor materials. Photons generated by the active region are initiated in all directions.

Typically, it is desirable to operate LEDs at the highest light emission efficiency possible, which can be measured by the emission intensity in relation to the output power (e.g., in lumens per watt). A practical goal to enhance emission efficiency is to maximize extraction of light emitted by the active region in the direction of the desired transmission of light. Light extraction and external quantum efficiency of an LED can be limited by a number of factors, including internal reflection. According to the well-understood implications of Snell's law, photons reaching the surface (interface) between an LED surface and the surrounding environment are either refracted or internally reflected. If photons are internally reflected in a repeated manner, then such photons eventually are absorbed and never provide visible light that exits an LED.

<FIG> illustrates a typical LED package <NUM> including a single LED chip <NUM> that is mounted on a reflective cup <NUM> by means of a solder bond or conductive epoxy. One or more wire bonds <NUM> can connect ohmic contacts of the LED chip <NUM> to leads 18A and/or 18B, which may be attached to or integral with the reflective cup <NUM>. The reflective cup <NUM> may be filled with an encapsulant material <NUM>, which may contain a wavelength conversion material such as a phosphor. At least some light emitted by the LED chip <NUM> at a first wavelength may be absorbed by the phosphor, which may responsively emit light at a second wavelength. The entire assembly is then encapsulated in a clear protective resin <NUM>, which may be molded in the shape of a lens to collimate the light emitted from the LED chip <NUM>. While the reflective cup <NUM> may direct light in an upward direction, optical losses may occur when the light is reflected. Some light may be absorbed by the reflective cup <NUM> due to the less than <NUM>% reflectivity of practical reflector surfaces. Some metals can have less than <NUM>% reflectivity in the wavelength range of interest.

<FIG> shows another conventional LED package <NUM> in which one or more LED chips <NUM> can be mounted onto a carrier such as a printed circuit board (PCB) carrier, substrate, or submount <NUM>. A metal reflector <NUM> is mounted on the submount <NUM> and surrounds the LED chips <NUM> to reflect light emitted by the LED chips <NUM> away from the LED package <NUM>. The metal reflector <NUM> also provides mechanical protection to the LED chips <NUM>. One or more wire bond connections <NUM> are made between ohmic contacts on the LED chips <NUM> and electrical traces 34A, 34B on the submount <NUM>. The mounted LED chips <NUM> are then covered with an encapsulant <NUM>, which may provide environmental and mechanical protection to the LED chips <NUM> while also acting as a lens. The metal reflector <NUM> is typically attached to the submount <NUM> by means of a solder or epoxy bond. The metal reflector <NUM> may also experience optical losses when the light is reflected because it also has less than <NUM>% reflectivity.

<FIG> shows another conventional LED package <NUM> in which an LED chip <NUM> can be mounted on a submount <NUM> with a hemispheric lens <NUM> formed over it. The LED chip <NUM> can be coated by a conversion material that can convert all or most of the light from the LED chip <NUM>. The hemispheric lens <NUM> is arranged to reduce total internal reflection of light. The lens <NUM> is made relatively large compared to the LED chip <NUM> so that the LED chip <NUM> approximates a point light source under the lens <NUM>. As a result, an increased amount of LED light that reaches the surface of the lens <NUM> emits from the lens <NUM> on a first pass. Additionally, the lens <NUM> can be useful for directing light emission from the LED chip <NUM> in a desired emission pattern for the LED package <NUM>.

<CIT> discloses an LED including: an insulating substrate; a light emitting section including a plurality of LED chips mounted on the insulating substrate; and land electrodes for supplying power to the LED chips. At least a surface of each of the land electrodes is made of a conductive material which is harder than Au and Ag and which has sulfurization resistance to such an extent that secures conduction of each land electrode when a current in a working current range is applied on the land electrode.

<CIT> discloses light emitter devices including a submount, a light emitter, a light affecting material, and a wavelength conversion component. Wavelength conversion components include a transparent substrate having an upper surface and a lower surface, and a phosphor compound disposed on the upper surface or lower surface, wherein the wavelength conversion component is configured to alter a wavelength of a light emitted from a light source when positioned proximate to the light source.

The art continues to seek improved light-emitting diodes and solid-state lighting devices having reduced optical losses and providing desirable illumination characteristics capable of overcoming challenges associated with conventional lighting devices.

The present disclosure relates in various aspects to solid-state light emitting devices including light-emitting diodes (LEDs), and more particularly to packaged LEDs. According to a first aspect, there is provided an LED package according to claim <NUM>. In some embodiments, an LED package includes electrical connections that are configured to reduce corrosion of metals within the package. An aim of the present invention is the decrease of the overall forward voltage of the LED package. An electrical path for serially-connected electrostatic discharge (ESD) chips is provided in some embodiments. In some embodiments, an LED package includes at least two LED chips and a material between the two LED chips that promotes homogeneity of composite emissions from the two LED chips. In this manner, LED packages according to the present disclosure may be beneficial for various applications, including those where a high luminous intensity is desired in a variety of environmental conditions. Such applications include automotive lighting, aerospace lighting, and general illumination.

In some embodiments, the light-altering material comprises a light-reflective material. In some embodiments, the light-reflective material comprises fused silica, fumed silica, or titanium dioxide (TiO<NUM>) particles suspended in silicone. In some embodiments, the LED package further comprises a wavelength conversion element on the at least one LED chip.

The present disclosure relates in various aspects to solid-state light emitting devices including light-emitting diodes (LEDs), and more particularly to packaged LEDs. In some embodiments, an LED package includes electrical connections that are configured to reduce corrosion of metals within the package; or decrease the overall forward voltage of the LED package; or provide an electrical path for serially-connected electrostatic discharge (ESD) chips. In some embodiments, an LED package includes at least two LED chips and a material between the two LED chips that promotes homogeneity of composite emissions from the two LED chips. In this manner, LED packages according to the present disclosure may be beneficial for various applications, including those where a high luminous intensity is desired in a variety of environmental conditions. Such applications include automotive lighting, aerospace lighting, and general illumination.

An LED chip typically comprises an active LED structure or region that can have many different semiconductor layers arranged in different ways. The fabrication and operation of LEDs and their active structure are generally known in the art and are only briefly discussed herein. The layers of the active LED structure can be fabricated using known processes with a suitable process being fabrication using metal organic chemical vapor deposition. The layers of the active LED structure can comprise many different layers and generally comprise an active layer sandwiched between n-type and p-type oppositely doped epitaxial layers, all of which are formed successively on a growth substrate. It is understood that additional layers and elements can also be included in the active LED structure, including but not limited to: buffer layers, nucleation layers, super lattice structures, un-doped layers, cladding layers, contact layers, current-spreading layers, and light extraction layers and elements. The active layer can comprise a single quantum well, a multiple quantum well, a double heterostructure, or super lattice structures.

The active LED structure can be fabricated from different material systems, with some material systems being Group III nitride-based material systems. Group III nitrides refer to those semiconductor compounds formed between nitrogen and the elements in Group III of the periodic table, usually aluminum (Al), gallium (Ga), and indium (In). Gallium nitride (GaN) is a common binary compound. Group III nitrides also refer to ternary and quaternary compounds such as aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), and aluminum indium gallium nitride (AllnGaN). For Group III nitrides, silicon (Si) is a common n-type dopant and magnesium (Mg) is a common p-type dopant. Accordingly, the active layer, n-type layer, and p-type layer may include one or more layers of GaN, AlGaN, InGaN, and AlInGaN that are either undoped or doped with Si or Mg for a material system based on Group III nitrides. Other material systems include silicon carbide (SiC), organic semiconductor materials, and other Group III-V systems such as gallium phosphide (GaP), gallium arsenide (GaAs), and related compounds.

The active LED structure may be grown on a growth substrate that can include many materials, such as sapphire, SiC, aluminum nitride (AIN), GaN, with a suitable substrate being a <NUM> polytype of SiC, although other SiC polytypes can also be used including 3C, <NUM>, and 15R polytypes. SiC has certain advantages, such as a closer crystal lattice match to Group III nitrides than other substrates and results in Group III nitride films of high quality. SiC also has a very high thermal conductivity so that the total output power of Group III nitride devices on SiC is not limited by the thermal dissipation of the substrate. Sapphire is another common substrate for Group III nitrides and also has certain advantages, including being lower cost, having established manufacturing processes, and having good light transmissive optical properties.

Different embodiments of the active LED structure can emit different wavelengths of light depending on the composition of the active layer and n-type and p-type layers. In some embodiments, the active LED structure emits a blue light in a peak wavelength range of approximately <NUM> nanometers (nm) to <NUM>. In other embodiments, the active LED structure emits green light in a peak wavelength range of <NUM> to <NUM>. In other embodiments, the active LED structure emits red light in a peak wavelength range of <NUM> to <NUM>. The LED chip can also be covered with one or more lumiphors or other conversion materials, such as phosphors, such that at least some of the light from the LED passes through the one or more phosphors and is converted to one or more different wavelengths of light. In some embodiments, the LED chip emits a generally white light combination of light from the active LED structure and light from the one or more phosphors. The one or more phosphors may include yellow (e.g., YAG:Ce), green (LuAg:Ce), and red (Cai-x-ySrxEuyAlSiN<NUM>) emitting phosphors, and combinations thereof.

The present disclosure can include LED chips having a variety of geometries. A lateral geometry LED chip typically includes an anode and a cathode on the same side of the active LED structure that is opposite a substrate, such as a growth substrate or a carrier substrate.

In embodiments, a lateral geometry LED chip may be flip-chip mounted on a submount of an LED package such that the anode and cathode are on a face of the active LED structure that is adjacent to the submount. In this configuration, electrical traces or patterns are provided on the submount for providing electrical connections to the anode and cathode of the LED chip. In a flip-chip configuration, the active LED structure is configured between the substrate of the LED chip and the submount for the LED package. Accordingly, light emitted from the active LED structure may pass through the substrate in a desired emission direction. In some embodiments, the flip-chip LED chip may be configured as described in commonly-assigned <CIT>.

Embodiments of the disclosure are described herein with reference to cross-sectional view illustrations that are schematic illustrations of embodiments of the disclosure. As such, the actual thickness of the layers can be different, and variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are expected. For example, a region illustrated or described as square or rectangular can have rounded or curved features, and regions shown as straight lines may have some irregularity. Thus, the regions illustrated in the figures are schematic and their shapes are not intended to illustrate the precise shape of a region of a device and are not intended to limit the scope of the disclosure.

<FIG> is a perspective view of an LED package <NUM> useful for understanding the invention. The LED package <NUM> includes a submount <NUM> that can be formed of many different materials with a preferred material being electrically insulating. Suitable materials include, but are not limited to ceramic materials such as aluminum oxide or alumina, AIN, or organic insulators like polyimide (PI) and polyphthalamide (PPA). The submount <NUM> can comprise a printed circuit board (PCB), sapphire, Si or any other suitable material. Different PCB types can be used such as standard FR-<NUM> PCB, metal core PCB, or any other type of PCB. At least a portion of a metal pattern <NUM> is visible on the submount <NUM>. Package contacts <NUM>-<NUM>, <NUM>-<NUM> comprise at least a portion of the metal pattern <NUM> and include an anode contact and a cathode contact configured to receive an electrical connection from a power source external to the LED package <NUM>. A portion <NUM> of the submount <NUM> includes identification or other information about the LED package <NUM>, including a quick response (QR) code, a bar code, or alphanumeric information. In <FIG>, the portion <NUM> is illustrated between the package contacts <NUM>-<NUM>, <NUM>-<NUM>. However, the portion <NUM> that includes identification or other information may be located on other areas of the submount <NUM>.

A plurality of LED chips <NUM>-<NUM> to <NUM>-<NUM> are visible on the submount <NUM>, and a light-altering material <NUM> is arranged around a perimeter of the LED chips <NUM>-<NUM> to <NUM>-<NUM> on a surface of the submount <NUM>. While the LED package <NUM> is designed with three LED chips <NUM>-<NUM> to <NUM>-<NUM>, any number of LED chips are possible. LED packages disclosed herein may include a single LED chip, or two LED chips, or three LED chips, or more. The light-altering material <NUM> is configured to redirect or reflect laterally-emitting light from the LED chips <NUM>-<NUM> to <NUM>-<NUM> toward a desired emission direction. The light-altering material <NUM> may block or absorb at least of portion of any laterally-emitting light from the LED chips <NUM>-<NUM> to <NUM>-<NUM> that would otherwise escape the LED package <NUM> with high or wide emission angles. The light-altering material <NUM> may partially cover the submount <NUM> outside of where the LED chips <NUM>-<NUM> to <NUM>-<NUM> are located. In that regard, the light-altering material <NUM> may cover portions of the metal pattern <NUM> that extend from the package contacts <NUM>-<NUM>, <NUM>-<NUM> to the LED chips <NUM>-<NUM> to <NUM>-<NUM>. The light-altering material <NUM> may be adapted for dispensing, or placing, and may include many different materials including light-reflective materials that reflect or redirect light, light-absorbing materials that absorb light, and materials that act as a thixotropic agent. The light-altering material <NUM> may include at least one of fused silica, fumed silica, and titanium dioxide (TiO<NUM>) particles suspended in a binder, such as silicone or epoxy. The light-altering material <NUM> may comprise a white color to reflect and redirect light. The light-altering material <NUM> may comprise an opaque or black color for absorbing light and increasing contrast of the LED package <NUM>. The light-altering material <NUM> can be dispensed or deposited in place using an automated dispensing machine where any suitable size and/or shape can be formed. The light-altering material <NUM> may include a cross-sectional profile comprising a planar top surface with vertical side surfaces or a curved top surface with vertical side surfaces. The light-altering material <NUM> may comprise other shapes, including a planar or curved top surface with non-planar or non-vertical side surfaces. At least a portion of the light-altering material <NUM> may extend to one or more edges of the submount <NUM>. In <FIG>, the light-altering material <NUM> extends to three edges of the submount <NUM>, but does not extend to a fourth edge of the submount <NUM>, thereby leaving the package contacts <NUM>-<NUM>, <NUM>-<NUM> uncovered.

A wavelength conversion element <NUM> is arranged over the plurality of LED chips <NUM>-<NUM> to <NUM>-<NUM> on the submount <NUM>. The light-altering material <NUM> is also arranged around a perimeter of the wavelength conversion element <NUM>. The wavelength conversion element <NUM> includes one or more lumiphoric materials. Lumiphoric materials as described herein may be or include one or more of a phosphor, a scintillator, a lumiphoric ink, a quantum dot material, a day glow tape, and the like. Lumiphoric materials may be provided by any suitable means, for example, direct coating on one or more surfaces of an LED, dispersal in an encapsulant material configured to cover one or more LEDs, and/or coating on one or more optical or support elements (e.g., by powder coating, spray coating, inkjet printing, or the like). Lumiphoric materials may be deposited utilizing one or more applications of a spray coating after the LED chip is mounted on the submount <NUM>, as described in commonly-assigned <CIT>. Lumiphoric materials may be downconverting or upconverting, and combinations of both downconverting and upconverting materials may be provided. Multiple different (e.g., compositionally different) lumiphoric materials arranged to produce different peak wavelengths may be arranged to receive emissions from one or more LED chips. One or more phosphors may include yellow phosphors (e.g., YAG:Ce), green phosphors (LuAg:Ce), and red phosphors (Cai-x-ySrxEuyAlSiN3) and combinations thereof. The wavelength conversion element <NUM> may be as described in commonly-assigned <CIT>.

<FIG> illustrates a top view of a partially-assembled LED package <NUM> useful for understanding the invention. The LED package <NUM> is similar to the LED package <NUM> of <FIG>, except only the submount <NUM> and the metal pattern <NUM> are present. The metal pattern <NUM> includes a plurality of metal traces <NUM>-<NUM> to <NUM>-<NUM>. Each metal trace <NUM>-<NUM> to <NUM>-<NUM> includes a continuous metal formed on a surface of the submount <NUM>, and each metal trace <NUM>-<NUM> to <NUM>-<NUM> is discontinuous with each other. The metal pattern <NUM> forms a plurality of die attach pads <NUM>-<NUM> to <NUM>-<NUM> that are indicated by dashed-line boxes in <FIG>. The die attach pads <NUM>-<NUM> to <NUM>-<NUM> are configured to receive a plurality of LED chips. According to the invention, the die attach pad <NUM>-<NUM> includes a portion of the metal trace <NUM>-<NUM> and a portion of the metal trace <NUM>-<NUM>. Accordingly, an anode of an LED chip may be mounted or attached to the metal trace <NUM>-<NUM> while a cathode of the LED chip may be mounted or attached to the metal trace <NUM>-<NUM>. In a similar manner, the die attach pad <NUM>-<NUM> includes a portion of the metal trace <NUM>-<NUM> and a portion of the metal trace <NUM>-<NUM>, and the die attach pad <NUM>-<NUM> includes a portion of the metal trace <NUM>-<NUM> and a portion of the metal trace <NUM>-<NUM>. Additionally, a portion of the metal trace <NUM>-<NUM> and a portion of the metal trace <NUM>-<NUM> form bond pads <NUM>-<NUM> and <NUM>-<NUM>, respectively. The bond pads <NUM>-<NUM>, <NUM>-<NUM> form a portion of the package contacts <NUM>-<NUM>, <NUM>-<NUM> of <FIG>. In that regard, the metal trace <NUM>-<NUM> is continuous with at least a portion of the die attach pad <NUM>-<NUM> and the bond pad <NUM>-<NUM>; and the metal trace <NUM>-<NUM> is continuous with at least a portion of the die attach pad <NUM>-<NUM> and the bond pad <NUM>-<NUM>. The metal pattern <NUM> includes one or more test tabs <NUM>-<NUM>, <NUM>-<NUM> that allow for individual testing of LED chips that are mounted to the die attach pads <NUM>-<NUM> to <NUM>-<NUM>. For example, in <FIG>, the metal trace <NUM>-<NUM> includes the test tab <NUM>-<NUM> and the metal trace <NUM>-<NUM> includes the test tab <NUM>-<NUM>. The one or more test tabs <NUM>-<NUM>, <NUM>-<NUM> are outside an area of the die attach pads <NUM>-<NUM> to <NUM>-<NUM>. In that regard, the one or more test tabs <NUM>-<NUM>, <NUM>-<NUM> are accessible after LED chips are mounted in the LED package <NUM>.

The metal pattern <NUM> may include any number of electrically conductive materials. The metal pattern <NUM> includes at least one of the following; copper (Cu) or alloys thereof, nickel (Ni) or alloys thereof, nickel chromium (NiCr), gold (Au) or alloys thereof, electroless Au, electroless silver (Ag), NiAg, Al or alloys thereof, titanium tungsten (TiW), titanium tungsten nitride (TiWN), electroless nickel electroless palladium immersion gold (ENEPIG), electroless nickel immersion gold (ENIG), hot air solder leveling (HASL), and organic solderability preservative (OSP). The metal pattern <NUM> includes a first layer of Cu or Ni followed by a layer of ENEPIG or ENIG that conformally covers a top and sidewalls of the first layer of Cu or Ni.

<FIG> illustrates a top view of a partially-assembled LED package <NUM> useful for understanding the invention. The LED package <NUM> is similar to the LED package <NUM> of <FIG>, except a plurality of LED chips <NUM>-<NUM> to <NUM>-<NUM> and a plurality of ESD chips <NUM>-<NUM>, <NUM>-<NUM> are mounted on the metal pattern <NUM>. An anode of the first LED chip <NUM>-<NUM> is mounted or attached to the first metal trace <NUM>-<NUM> while a cathode of the first LED chip <NUM>-<NUM> is mounted or attached to the fourth metal trace <NUM>-<NUM>. An anode of the second LED chip <NUM>-<NUM> is mounted or attached to the fourth metal trace <NUM>-<NUM> while a cathode of the second LED chip <NUM>-<NUM> is mounted or attached to the fifth metal trace <NUM>-<NUM>. An anode of the third LED chip <NUM>-<NUM> is mounted or attached to the fifth metal trace <NUM>-<NUM> while a cathode of the third LED chip <NUM>-<NUM> is mounted or attached to the second metal trace <NUM>-<NUM>. In that regard, each of the plurality of LED chips <NUM>-<NUM> to <NUM>-<NUM> are electrically connected in series with each other between the first metal trace <NUM>-<NUM> and the second metal trace <NUM>-<NUM>. The LED chips <NUM>-<NUM> to <NUM>-<NUM> may be flip-chip mounted to the metal traces <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>. The LED chips <NUM>-<NUM> to <NUM>-<NUM> may be configured as described in commonly-assigned <CIT>.

The first ESD chip <NUM>-<NUM> is attached or mounted to the first metal trace <NUM>-<NUM> and the third metal trace <NUM>-<NUM>, and the second ESD chip <NUM>-<NUM> is attached or mounted to the third metal trace <NUM>-<NUM> and the second metal trace <NUM>-<NUM>. In that regard, each of the plurality of ESD chips <NUM>-<NUM>, <NUM>-<NUM> are electrically connected in series between the first metal trace <NUM>-<NUM> and the second metal trace <NUM>-<NUM>. Stated differently, the first ESD chip <NUM>-<NUM> is electrically connected to the first metal trace <NUM>-<NUM>, the second ESD chip <NUM>-<NUM> is electrically connected to the second metal trace <NUM>-<NUM>, and the third metal trace <NUM>-<NUM> is serially connected between the first ESD chip <NUM>-<NUM> and the second ESD chip <NUM>-<NUM>. In this manner, the first ESD chip <NUM>-<NUM> and the second ESD chip <NUM>-<NUM> are arranged in parallel with the LED chips <NUM>-<NUM> to <NUM>-<NUM> between the first metal trace <NUM>-<NUM> and the second metal trace <NUM>-<NUM>.

As previously described, the one or more test tabs <NUM>-<NUM>, <NUM>-<NUM> are configured to allow for individual testing of the LED chips <NUM>-<NUM> to <NUM>-<NUM> after the LED chips <NUM>-<NUM> to <NUM>-<NUM> and the ESD chips <NUM>-<NUM>, <NUM>-<NUM> are mounted to the LED package <NUM>. For example, the LED chip <NUM>-<NUM> may be individually tested via electrical contacts to the first metal trace <NUM>-<NUM> and the test tab <NUM>-<NUM>; the LED chip <NUM>-<NUM> may be individually tested via electrical contacts to the one or more test tabs <NUM>-<NUM>, <NUM>-<NUM>; and finally, the LED chip <NUM>-<NUM> may be individually tested via electrical contacts to the test tab <NUM>-<NUM> and the metal trace <NUM>-<NUM>. Furthermore, subgroups of the LED chips <NUM>-<NUM> to <NUM>-<NUM> may be tested together. For example, the LED chips <NUM>-<NUM> and <NUM>-<NUM> may be tested as a pair via electrical contacts to the metal trace <NUM>-<NUM> and the test tab <NUM>-<NUM>.

<FIG> illustrates a top view of an LED package <NUM> useful for understanding the invention. The LED package <NUM> is similar to the LED package <NUM> of <FIG>, except the LED package <NUM> includes the light-altering material <NUM> and the wavelength conversion element <NUM> as previously-described. As illustrated, the LED chips <NUM>-<NUM> to <NUM>-<NUM> are laterally spaced from the bond pads <NUM>-<NUM>, <NUM>-<NUM> on the submount <NUM>. The light-altering material <NUM> is arranged around a perimeter of the LED chips <NUM>-<NUM> to <NUM>-<NUM> on a surface of the submount <NUM>. Notably, the light-altering material <NUM> covers the first ESD chip <NUM>-<NUM> and the second ESD chip <NUM>-<NUM> of <FIG> on the surface of the submount <NUM>. ESD chips are typically dark in color and may therefore absorb light. The light-altering material <NUM> may include light reflective particles as previously described, and accordingly, the amount of light from the LED chips <NUM>-<NUM> to <NUM>-<NUM> that may reach the ESD chips (<NUM>-<NUM>, <NUM>-<NUM> of <FIG>) is reduced. The light-altering material <NUM> does not cover the entire surface of the submount <NUM>. In particular, a portion of the first metal trace <NUM>-<NUM> and a portion of the second metal trace <NUM>-<NUM> are not covered by the light-altering material <NUM>. In that regard, the bond pads <NUM>-<NUM>, <NUM>-<NUM> of the metal traces <NUM>-<NUM>, <NUM>-<NUM> form at least a portion of the package contacts (see, for example <NUM>-<NUM>, <NUM>-<NUM> of <FIG>). Under some operating conditions, the portions of the metal traces <NUM>-<NUM>, <NUM>-<NUM> that are not covered by the light-altering material <NUM> may experience corrosion that adversely impacts the performance of the LED package <NUM>. For example, Cu is known to be susceptible to oxidation with exposure to air. Where the metal traces <NUM>-<NUM>, <NUM>-<NUM> include Cu, portions of the metal traces <NUM>-<NUM>, <NUM>-<NUM> may form Cu oxide that is black in color. The metal traces <NUM>-<NUM>, <NUM>-<NUM> may further include a surface finish such as ENEPIG; however, corrosion and oxidation of the metal traces <NUM>-<NUM>, <NUM>-<NUM> may still occur under some operation conditions.

<FIG> illustrates a bottom view of the LED package <NUM> of <FIG>. The bottom side of the submount <NUM> may include a mount pad <NUM> that is configured for mounting the LED package <NUM> to another surface, such as a PCB or a housing for a lighting fixture. The bottom side is a face of the submount <NUM> that is opposite a face where the LED chips <NUM>-<NUM> to <NUM>-<NUM> of <FIG> are mounted. The mount pad <NUM> may include a metal, such as Cu or alloys thereof, Ni or alloys thereof, NiCr, Au or alloys thereof, electroless Au, electroless Ag, NiAg, Al or alloys thereof, TiW, TiWN, ENEPIG, ENIG, HASL, and OSP. The mount pad <NUM> includes a thickness that is similar to a thickness of the metal pattern <NUM> (<FIG>). Where the mount pad <NUM> includes a metal, the mount pad <NUM> may be configured to provide a metal-to-metal bond with a corresponding metal pad that is located on another surface. In operation, the mount pad <NUM> may also provide a thermal path, or a heat sink, that assists in dissipating heat generated by the LED package <NUM>. Additionally, the mount pad <NUM> may provide structural integrity for the LED package <NUM> during various manufacturing steps. For example, before singulation, the LED package <NUM> may be part of a larger panel of LED packages, each of which includes a corresponding mount pad. Each of the corresponding mount pads may assist in keeping the panel flat during subsequent processing steps. It may be desirable to mount the LED package <NUM> to another surface without a mount pad <NUM>. For example, the LED package <NUM> may be glued directly to another surface without a mount pad <NUM>.

<FIG> illustrates a top view of an LED package <NUM> useful for understanding the invention. The LED package <NUM> is similar to the LED package <NUM> of <FIG>, except the LED package <NUM> includes a bond metal <NUM> that covers the bond pads <NUM>-<NUM>, <NUM>-<NUM> of the exposed portions of the metal traces <NUM>-<NUM>, <NUM>-<NUM>. The one or more test tabs <NUM>-<NUM>, <NUM>-<NUM> of <FIG> and <FIG> are not shown in <FIG>, but it is understood the one or more test tabs <NUM>-<NUM>, <NUM>-<NUM> are applicable to all embodiments disclosed herein. The bond metal <NUM> may include one or more layers of a conductive metal that is configured to receive and bond with an external electrical connection. The bond metal <NUM> may comprise a different metal than the metal traces <NUM>-<NUM>, <NUM>-<NUM>. For example, the bond metal <NUM> includes Al or alloys thereof and is arranged to be bonded with one or more wire bonds that are electrically connected to an external power source. The bond metal <NUM> and the metal traces <NUM>-<NUM>, <NUM>-<NUM> may include different metals selected from the following: Cu or alloys thereof, Ni or alloys thereof, NiCr, Au or alloys thereof, electroless Au, electroless Ag, NiAg, Al or alloys thereof, TiW, TiWN, ENEPIG, ENIG, HASL, and OSP. In this manner, the bond metal <NUM> and the bond pads <NUM>-<NUM>, <NUM>-<NUM> collectively form package contacts as previously described (see, for example <NUM>-<NUM>, <NUM>-<NUM> of <FIG>). The bond metal <NUM> may be formed by various deposition techniques including sputtering, evaporation, plating, and patterning. Patterning may include various techniques that include masking and/or etching back of deposited material. The bond metal <NUM> is on the bond pads <NUM>-<NUM>, <NUM>-<NUM> and on a surface of the submount <NUM> that is adjacent the bond pads <NUM>-<NUM>, <NUM>-<NUM>. Stated differently, the bond metal <NUM> covers the portions of the metal traces <NUM>-<NUM>, <NUM>-<NUM> that are uncovered by the light-altering material <NUM> and the wavelength conversion element <NUM>. In this manner, the bond metal <NUM> serves as a barrier between the metal traces <NUM>-<NUM>, <NUM>-<NUM> and the surrounding atmosphere, thereby reducing potential corrosion of the metal traces <NUM>-<NUM>, <NUM>-<NUM>. Accordingly, in this configuration, the bond metal <NUM> serves as a corrosion-reducing layer. A portion of the bond metal <NUM> extends underneath the light-altering material <NUM> such that the portion of the bond metal <NUM> is between the light-altering material <NUM> and the submount <NUM>.

<FIG> illustrates a top view of a partially-assembled LED package <NUM> useful for understanding the invention. The LED package <NUM> is similar to the LED package <NUM> of <FIG>, except the light-altering material <NUM> and the wavelength conversion element <NUM> of <FIG> are not present. The LED package <NUM> includes the LED chips <NUM>-<NUM> to <NUM>-<NUM> and the ESD chips <NUM>-<NUM>, <NUM>-<NUM> serially connected by the metal trace <NUM>-<NUM> as previously described. As illustrated, the bond metal <NUM> covers portions of the metal traces <NUM>-<NUM>, <NUM>-<NUM> and includes bond metal portions <NUM>' that are covered after the light-altering material is formed.

<FIG> is a side view illustration representing a cross-section taken along section line II - II of the LED package <NUM> of <FIG>. A portion of the first metal trace <NUM>-<NUM> is covered by the bond metal <NUM>. In particular, the bond metal <NUM> is on a top surface and sidewalls of the portion of the first metal trace <NUM>-<NUM> as well as on a surface of the submount <NUM> that is adjacent the portion of the first metal trace <NUM>-<NUM>. The LED chip <NUM>-<NUM> is on a different portion of the first metal trace <NUM>-<NUM>, and the ESD chip <NUM>-<NUM> is on the third trace <NUM>-<NUM>. <FIG> illustrates the cross-sectional view of the LED package <NUM> of <FIG> with the addition of the light-altering material <NUM> and the wavelength conversion element <NUM>. Notably, the light-altering material <NUM> is arranged around a perimeter of the LED chip <NUM>-<NUM> and covers the ESD chip <NUM>-<NUM> on the submount <NUM>.

<FIG> illustrates a cross-sectional view of an LED package <NUM> similar to the LED package <NUM> of <FIG>. The LED package <NUM> includes the metal traces <NUM>-<NUM>, <NUM>-<NUM> on the submount <NUM>, the LED chip <NUM>-<NUM>, and the ESD chip <NUM>-<NUM> as previously described. The LED package <NUM> further includes an alternative configuration of the bond metal <NUM>. The bond metal <NUM> is on a top surface of a portion of the first metal trace <NUM>-<NUM>, but not on sidewalls of the first metal trace <NUM>-<NUM> or on the surface of the submount <NUM> that is adjacent the portion of the first metal trace <NUM>-<NUM>. The bond metal <NUM> is arranged to receive an electrical connection, such as a wire bond, from an external power source. In this manner, the bond metal <NUM> and the portion of the metal trace <NUM>-<NUM> collectively form a package contact as previously described (see, for example <NUM>-<NUM>, <NUM>-<NUM> of <FIG>). A corrosion-reducing layer <NUM> that is distinct from the bond metal <NUM> is arranged on a sidewall <NUM>-<NUM>' of the metal trace <NUM>-<NUM> as well as on the surface of the submount <NUM> that is adjacent the first metal trace <NUM>-<NUM>. The corrosion-reducing layer <NUM> may include one or more layers that include at least one of a polymer, a dielectric, or a metal that is different from the bond metal <NUM>. The corrosion-reducing layer <NUM> includes at least one layer of Au, platinum (Pt), Ni, Ti, TiW, TiWN, or other alloys thereof where the bond metal <NUM> includes Al.

<FIG> illustrates a cross sectional view of an LED package <NUM> similar to the LED package <NUM> of <FIG>. The LED package <NUM> includes the metal traces <NUM>-<NUM>, <NUM>-<NUM> on the submount <NUM>, the LED chip <NUM>-<NUM>, and the ESD chip <NUM>-<NUM> as previously described. The LED package <NUM> further includes an alternative configuration of the bond metal <NUM>. A corrosion-reducing layer <NUM> that is distinct from the bond metal <NUM> is arranged to cover the metal trace <NUM>-<NUM>, and the bond metal <NUM> is arranged on the corrosion-reducing layer <NUM>. In that manner, the corrosion-reducing layer <NUM> is on the top surface and on the sidewall <NUM>-<NUM>' of the metal trace <NUM>-<NUM> as well as on the surface of the submount <NUM> that is adjacent the first metal trace <NUM>-<NUM>. In this configuration, the corrosion-reducing layer <NUM> may include one or more electrically conductive layers that include a metal that is different from the bond metal <NUM>. The bond metal <NUM> includes Al and the corrosion-reducing layer <NUM> includes one or more layers of Pt, Ni, Ti, TiW, or TiWN, or other alloys thereof.

<FIG> illustrates a cross sectional view of an LED package <NUM> similar to the LED package <NUM> of <FIG>. The LED package <NUM> includes the metal traces <NUM>-<NUM>, <NUM>-<NUM> on the submount <NUM>, the LED chip <NUM>-<NUM>, and the ESD chip <NUM>-<NUM> as previously described. The LED package <NUM> further includes an alternative configuration of the bond metal <NUM>. A first corrosion-reducing layer <NUM> and a second corrosion-reducing layer <NUM> that are distinct from the bond metal <NUM> are arranged to cover the metal trace <NUM>-<NUM>. The first corrosion-reducing layer <NUM> is arranged on the top surface and on the sidewall <NUM>-<NUM>' of the metal trace <NUM>-<NUM> as well as on the surface of the submount <NUM> that is adjacent the first metal trace <NUM>-<NUM>. The second corrosion-reducing layer <NUM> is arranged to cover the first corrosion-reducing layer <NUM> and is also on the surface of the submount <NUM> that is adjacent the first corrosion-reducing layer <NUM>. The bond metal <NUM> is arranged on the second corrosion-reducing layer <NUM>. In this configuration, the first corrosion-reducing layer <NUM> and the second corrosion-reducing layer <NUM> may include one or more electrically conductive layers that include a metal that is different from the bond metal <NUM>. The bond metal <NUM> includes Al, and the first corrosion-reducing layer <NUM> includes one or more layers of Pt, Ni, Ti, TiW, or TiWN, or other alloys thereof, and the second corrosion-reducing layer <NUM> includes at least one of ENEPIG or ENIG.

<FIG> illustrates a cross sectional view of an LED package <NUM> similar to the LED package <NUM> of <FIG>. The LED package <NUM> includes the metal traces <NUM>-<NUM>, <NUM>-<NUM> on the submount <NUM>, the bond metal <NUM>, the LED chip <NUM>-<NUM>, and the ESD chip <NUM>-<NUM> as previously described. As also previously described, the metal traces <NUM>-<NUM>, <NUM>-<NUM> may include additional layers. For example, in <FIG>, an additional metal trace layer <NUM> is formed or coated on the original metal traces <NUM>-<NUM>, <NUM>-<NUM> to form metal traces that include the metal trace <NUM>-<NUM>, the additional metal trace layer <NUM> and the metal trace <NUM>-<NUM>, and the additional metal trace layer <NUM>. The additional metal trace layer <NUM> includes a layer of metal, such as an electroless metal including Au plating that covers the top surfaces and sidewalls of the metal traces <NUM>-<NUM>, <NUM>-<NUM> all the way to the submount <NUM>. In that regard, the additional metal trace layer <NUM> encapsulate the metal traces <NUM>-<NUM>, <NUM>-<NUM> and may provide improved corrosion resistance while still enabling good die attach with the LED chip <NUM>-<NUM> or the ESD chip <NUM>-<NUM>. Conventional metal traces may include coatings of ENIG, which can have pin holes in the top layer of Au that are susceptible to corrosion, or ENEPIG, which is more corrosion resistant, but provides a poor die attach for the LED chip <NUM>-<NUM> or the ESD chip <NUM>-<NUM>. The additional metal trace layer <NUM> may replace coatings or treatments of ENIG or ENEPIG, or the additional metal trace layer <NUM> may be provided on a top surface and sidewalls to encapsulate coatings or treatments of ENIG or ENEPIG. The additional metal trace layer <NUM> include multiple layers.

In order to test LED packages with corrosion-reducing features as previously described, LED packages with and without corrosion-reducing features were subjected to corrosion testing. The corrosion testing including exposing each of the LED packages to an environment including water vapor and sulfur vapor for a time of about two hundred and forty hours. <FIG> is a photograph of a portion of a conventional LED package <NUM>. A package contact <NUM> is visible and includes a first layer of Cu, followed by a layer of ENEPIG, and followed by a bond metal of Al that is only on a top surface of the package contact <NUM>. A wire bond <NUM> is electrically connected to the package contact <NUM>. After corrosion testing, a corrosion <NUM> is clearly visible as black material around the perimeter of the package contact <NUM>. <FIG> is a photograph of a portion of an LED package <NUM>. A package contact <NUM> is visible and is configured similar to <FIG>. In that manner, the package contact <NUM> includes a first layer of Cu, followed by a layer of ENEPIG, and followed by a bond metal of Al that covers the layer of Cu and the layer of ENEPIG and is additionally on a surface <NUM> of the submount <NUM> that is adjacent the package contact <NUM>. After corrosion testing, corrosion is noticeably reduced around the perimeter of the package contact <NUM> as compared to the package contact <NUM> of <FIG>.

<FIG> illustrates a top view of a partially-assembled LED package <NUM> according to an embodiment of the invention. The LED package <NUM> includes the submount <NUM>; the metal traces <NUM>-<NUM> to <NUM>-<NUM>; the bond pads <NUM>-<NUM> and <NUM>-<NUM> for the LED package <NUM>; the one or more test tabs <NUM>-<NUM>, <NUM>-<NUM>; the LED chips <NUM>-<NUM> to <NUM>-<NUM>; the ESD chips <NUM>-<NUM>, <NUM>-<NUM>; and the bond metal <NUM> as previously described. The bond metal <NUM> includes bond metal portions <NUM>" that are covered after the light-altering material of previous embodiments is formed. The bond metal portions <NUM>", which are referred to as conductive fingers, extend on a top surface of each of the metal traces <NUM>-<NUM> and <NUM>-<NUM> away from the bond pads <NUM>-<NUM>, <NUM>-<NUM> and in a direction toward the LED chips <NUM>-<NUM> to <NUM>-<NUM>. The bond metal portions <NUM>" extend on the top surface of the metal traces <NUM>-<NUM>, <NUM>-<NUM> in a manner that at least a portion of the bond metal portions <NUM>" are in close proximity with, or immediately adjacent the LED chips <NUM>-<NUM> to <NUM>-<NUM>. According to the invention, the bond metal portions <NUM>" extend at least to an edge of the LED chips <NUM>-<NUM>, <NUM>-<NUM> that is opposite the edge of the LED chips <NUM>-<NUM>, <NUM>-<NUM> that is closest to the bond pads <NUM>-<NUM>, <NUM>-<NUM>. According to the invention, the bond metal <NUM> is configured to receive an electrical connection at the bond pads <NUM>-<NUM>, <NUM>-<NUM> and current may travel within the bond metal <NUM> to or from a position that is in close proximity or immediately adjacent the LED chips <NUM>-<NUM> and <NUM>-<NUM>. In embodiments where the bond metal <NUM> includes a highly conductive metal such as Al or alloys thereof, the forward voltage of the LED package <NUM> may be reduced. Additionally, for embodiments where the metal traces <NUM>-<NUM>, <NUM>-<NUM> include Au, such as ENEPIG, the amount of Au may be reduced, thereby saving costs without compromising current carrying capabilities of the LED package <NUM>. In some embodiments, the bond metal <NUM> (inclusive of the bond metal portions <NUM>", or fingers) and the metal traces <NUM>-<NUM>, <NUM>-<NUM> may include different metals selected from the following: Cu or alloys thereof, Ni or alloys thereof, NiCr, Au or alloys thereof, electroless Au, electroless Ag, NiAg, Al or alloys thereof, TiW, TiWN, ENEPIG, ENIG, HASL, and OSP.

<FIG> illustrates a top view of a partially-assembled LED package <NUM> according to an embodiment of the invention. The LED package <NUM> includes the submount <NUM>; the metal traces <NUM>-<NUM> to <NUM>-<NUM>; the bond pads <NUM>-<NUM> and <NUM>-<NUM> for the LED package <NUM>; the one or more test tabs <NUM>-<NUM>, <NUM>-<NUM>; the LED chips <NUM>-<NUM> to <NUM>-<NUM>; the ESD chips <NUM>-<NUM>, <NUM>-<NUM>; the bond metal <NUM> and the bond metal portions <NUM>" as previously described. The LED package <NUM> is similar to the LED package <NUM> of <FIG>, except the bond metal <NUM> covers at least a portion of the metal traces <NUM>-<NUM> and <NUM>-<NUM>. Accordingly, the bond metal <NUM> is also on a surface of the submount <NUM> that is adjacent portions of the metal traces <NUM>-<NUM> and <NUM>-<NUM>. In that regard, after the light-altering material and the wavelength conversion element of previous embodiments is formed, all portions of the metal traces <NUM>-<NUM> and <NUM>-<NUM> that are uncovered by the light-altering material and the wavelength conversion element are covered by the bond metal <NUM>. Accordingly, the bond pads <NUM>-<NUM> and <NUM>-<NUM> for the LED package <NUM> are more resistant to corrosion.

<FIG> is a plot comparing electrical performance of LED packages with and without conductive fingers of the bond metal as described for <FIG>. The bottom of the plot details various LED packages built for the comparisons. As indicated, the various LED packages were built with and without conductive fingers of the bond metal (Al in this case) and as indicated by the "Al finger extension" row with labels Yes (with Al conductive fingers) or No (without Al conductive fingers). The metal traces underneath the bond metal as well as the portions of the metal traces that form the die attach pads as previously described included Au with variable thicknesses as measured in a direction perpendicular to the submount. The Au thickness was varied from <NUM> to <NUM> for various LED packages as indicated by the "Au Thickness" row. Additionally, a width of the metal trace that extends between and connects the package bond pads and the die attach pads was varied between <NUM> and <NUM>, as indicated by the label "Side Au metal trace" row. The number of LED chips, or LED die, was also varied between <NUM> and <NUM> chips as indicated by the "Die number" row. The y-axis of the plot is the electrical resistance of the metal traces for a fixed current in milliohms. Notably, for every data set of LED packages having the same Au thickness, width, and number of LED chips, the LED packages with Al finger extensions have a substantially decreased electrical resistance. As expected, the resistance of the metal traces also decreases when the Au thickness or width is increased. However, extra Au can add additional costs to the LED package. In that regard, LED packages with metal traces having an Au thickness of <NUM> and including Al finger extensions measured a lower electrical resistance than LED packages with metal traces having an Au thickness of <NUM> and without Al finger extensions. Additionally, for packages with an Au thickness reduced to <NUM> and with Al finger extensions, the electrical resistance was measured close or similar to LED packages having an Au thickness of <NUM> and without Al finger extensions. Accordingly, some embodiments of the present invention include metal traces having an Au thickness of less than <NUM>, or in a range from <NUM> to <NUM>, or in a range from <NUM> to less than <NUM>.

<FIG> includes a plot comparing electrical performance of LED packages after die attach for LED packages with and without conductive fingers of the bond metal as described for <FIG>. The bottom of the plot details various LED packages built for the comparisons. As with <FIG>, the various LED packages were built with and without conductive fingers of the bond metal (Al in this case) and as indicated by the "Al finger extension" row with labels Yes (with Al conductive fingers); No (without Al conductive fingers); or POR (e.g. process of record and without Al conductive fingers). The metal traces underneath the bond metal as well as the portions of the metal traces that form the die attach pads as previously described included Au with variable thicknesses as measured in a direction perpendicular to the submount. The Au thickness was varied from <NUM> to <NUM> for various LED packages as indicated by the "Au Thickness" row. Additionally, a width of the metal trace that extends between and connects the LED package bond pads and the die attach pads was varied between <NUM> and <NUM>, as indicated by the label "Side Au metal trace" row. The "Au Thickness" row and the "Side Au metal trace" row also include the label POR, which does not include Al. The number of LED chips, or LED die, was also varied between <NUM> and <NUM> chips as indicated by the "Die number" row. The y-axis of the top portion of the plot is the change in forward voltage (Vf), or Vf Delta, in volts, and the y-axis at the bottom portion of the plot is the percentage change in Vf, or Vf Delta %, in volts. The table at the bottom of <FIG> summarizes the mean values for Vf Delta and Vf Delta % for the number N of LED packages tested. Delta refers to the difference between the POR cells without the Al finger and the other cells with the Al finger. Notably, the presence of an Al finger extension generally improves (lowers) Vf, although as the Au thickness increases, the improvement becomes less pronounced. For example, for LED packages with <NUM> of Au, the Al finger provides a mean Vf improvement of about <NUM> volts, or <NUM> millivolts (mV); for LED packages with <NUM> of Au, the Al finger provides a mean Vf improvement of about <NUM> mV; and for LED packages with <NUM> of Au, the Al finger provides a mean Vf improvement of about <NUM> mV. Accordingly, the presence of an Al finger extension and metal traces with Au as previously described can each lower the Vf values closer to the POR while also providing the corrosion resistance as previously described.

<FIG> is a cross-sectional view of an LED package <NUM> useful for understanding the invention. The cross-sectional view may be similar to a cross-section taken along section line I - I of the LED package <NUM> of <FIG>. The LED package <NUM> includes the submount <NUM>; the metal traces <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>; the LED chips <NUM>-<NUM> to <NUM>-<NUM>; the light-altering material <NUM>; and the wavelength conversion element <NUM> as previously described. The wavelength conversion element <NUM> includes a superstrate <NUM> that includes a lumiphoric material <NUM> disposed thereon. The term "superstrate" as used herein refers to an element placed on an LED chip with a lumiphoric material between the superstrate and the LED chip. The term "superstrate" is used herein, in part, to avoid confusion with other substrates that may be part of the semiconductor light emitting device, such as a growth or carrier substrate of the LED chip or a submount of the LED package. The term "superstrate" is not intended to limit the orientation, location, and/or composition of the structure it describes. The superstrate <NUM> may be composed of, for example, sapphire, silicon carbide, silicone, and/or glass (e.g., borosilicate and/or fused quartz). The superstrate <NUM> may be patterned to enhance light extraction from the LED chips <NUM>-<NUM> to <NUM>-<NUM> as described in commonly-assigned <CIT> entitled "Semiconductor Light Emitting Devices Including Superstrates With Patterned Surfaces". The superstrate <NUM> may also be configured as described in previously-referenced <CIT>. The superstrate <NUM> may be formed from a bulk substrate which is optionally patterned and then singulated. The patterning of the superstrate <NUM> may be performed by an etching process (e.g., wet or dry etching). The patterning of the superstrate <NUM> may be performed by otherwise altering the surface, such as by a laser or saw. The superstrate <NUM> may be thinned before or after the patterning process is performed. The lumiphoric material <NUM> may then be placed on the superstrate <NUM> by, for example, spraying and/or otherwise coating the superstrate <NUM> with the lumiphoric material <NUM>. The superstrate <NUM> and the lumiphoric material <NUM> may be attached to the LED chips <NUM>-<NUM> to <NUM>-<NUM> using, for example, a layer of transparent adhesive <NUM>. When the superstrate <NUM> is attached to the LED chips <NUM>-<NUM> to <NUM>-<NUM>, a portion of the transparent adhesive <NUM> is positioned at least partially between lateral edges of the LED chips <NUM>-<NUM> to <NUM>-<NUM>. The layer of the transparent adhesive <NUM> may include silicone with a refractive index in a range of about <NUM> to about <NUM> that is less than a refractive index of the LED chips <NUM>-<NUM> to <NUM>-<NUM>. In this manner, at least a portion of light emitted laterally from the LED chips <NUM>-<NUM> to <NUM>-<NUM> may have improved light extraction between the lateral edges of the LED chips <NUM>-<NUM> to <NUM>-<NUM>, thereby providing improved overall package brightness as well as improved homogeneity of composite emissions from the LED chips <NUM>-<NUM> to <NUM>-<NUM>. Stated differently, the appearance of dark spots due to illumination gaps between the LED chips <NUM>-<NUM> to <NUM>-<NUM> may be reduced.

<FIG> illustrates a cross-sectional view of the LED package <NUM> of <FIG> with a lens <NUM>. The lens <NUM> may be added to the LED package <NUM> to improve color angle uniformity. For example, the lens <NUM> may be configured to reduce the appearance of blue emissions around a lateral perimeter of the LED package <NUM>. The lens <NUM> may also provide a different light distribution pattern for the LED package <NUM>. The lens <NUM> may include a curved upper surface, such as a partial hemisphere, a partial dome, or a partial ellipsoid. The lens <NUM> may include a curved upper surface with one or more planar sidewalls. The lens <NUM> may have a planar upper surface with planar sidewalls. Many different materials can be used for the lens <NUM>, including silicones, plastics, epoxies, or glass, with a suitable material being compatible with dispensing or molding processes. Silicone is suitable for dispensing or molding and provides good optical transmission properties for light emitted from the LED chips <NUM>-<NUM> to <NUM>-<NUM>. The lens <NUM> may be dispensed on a surface of the LED package <NUM>. The viscosity of the material used for the lens <NUM> may be such that the curved upper surface is formed by surface tension. The lens <NUM> may be molded over the LED package <NUM>. The lens <NUM> may be dispensed or molded onto the superstrate <NUM> before it is placed in the LED package <NUM>. Alternatively, the lens <NUM> may be dispensed or molded onto the LED package <NUM> after the superstrate <NUM> has been added. In this manner, the lens <NUM> may extend over both the superstrate <NUM> and the light-altering material <NUM>.

The LED package <NUM> may further include an additional light-altering material <NUM>. The additional light-altering material <NUM> may include at least one of a second lumiphoric material or a light-diffusing material. The additional light-altering material <NUM> includes a second lumiphoric material that is either the same as or different than the lumiphoric material <NUM> (or a first lumiphoric material). Where the additional light-altering material <NUM> includes a light-diffusing material, the light-diffusing material may scatter light emitted from the LED chips <NUM>-<NUM> to <NUM>-<NUM> for improvements in color uniformity and color mixing. The additional light-altering material <NUM> may be formed by deposition or other suitable techniques on the LED package <NUM> before the lens <NUM> is formed. The additional light-altering material <NUM> may be formed at the same time the lens <NUM> is formed. For example, the additional light-altering material <NUM> may include at least one of lumiphoric particles or light-diffusing particles that are suspended in a silicone material. The silicone material may then be dispensed or molded to form the lens <NUM>. For a dispensing process, the silicone material may be cured after the additional light-altering material <NUM> is allowed to settle closer to the LED chips <NUM>-<NUM> to <NUM>-<NUM>. The silicone material may be cured while the additional light-altering material <NUM> is distributed throughout the lens <NUM>.

<FIG> illustrates a cross-sectional view of the LED package <NUM> of <FIG> with a plurality of lenses <NUM>-<NUM> to <NUM>-<NUM> useful for understanding the invention. Each of the plurality of lenses <NUM>-<NUM> to <NUM>-<NUM> may be registered with corresponding ones of the plurality of LED chips <NUM>-<NUM> to <NUM>-<NUM>. Each of the plurality of lenses <NUM>-<NUM> to <NUM>-<NUM> may comprise a portion of the additional light-altering material <NUM>. The additional light-altering material <NUM> may not be present in all of the plurality of lenses <NUM>-<NUM> to <NUM>-<NUM>. Individual ones of the plurality of lenses <NUM>-<NUM> to <NUM>-<NUM> may have different shapes than other lenses of the plurality of lenses <NUM>-<NUM> to <NUM>-<NUM> to provide different light emission patterns. The superstrate <NUM> may be continuous between the plurality of LED chips <NUM>-<NUM> to <NUM>-<NUM> and the plurality of lenses <NUM>-<NUM> to <NUM>-<NUM>. The superstrate <NUM> may be divided into a plurality of individual pieces that are each registered with a corresponding lens <NUM>-<NUM> to <NUM>-<NUM> and a corresponding LED chip <NUM>-<NUM> to <NUM>-<NUM>.

Embodiments of the present disclosure are not limited to the previously described LED packages. For example, <FIG>, <FIG> illustrate top, bottom, and cross-sectional views respectively of a partially-assembled LED package <NUM>. In the LED package <NUM>, the package contacts <NUM>-<NUM>, <NUM>-<NUM> are on a backside of the submount <NUM>, rather than a frontside of the submount <NUM> as previously described. The LED package <NUM> additionally includes the metal traces <NUM>-<NUM> to <NUM>-<NUM>; the one or more test tabs <NUM>-<NUM>, <NUM>-<NUM>; the LED chips <NUM>-<NUM> to <NUM>-<NUM>; and the ESD chips <NUM>-<NUM>, <NUM>-<NUM> as previously described. One or more conductive vias <NUM>-<NUM> to <NUM>-<NUM> extend through the submount <NUM> to electrically connect the first metal trace <NUM>-<NUM> and the second metal trace <NUM>-<NUM> to the package contacts <NUM>-<NUM>, <NUM>-<NUM>, respectively. As illustrated in the bottom view of <FIG>, the LED package <NUM> may further include a thermal pad <NUM> on the backside of the submount <NUM>. The thermal pad <NUM> includes the same materials as the package contacts <NUM>-<NUM>, <NUM>-<NUM>, or the thermal pad <NUM> includes different materials. The thermal pad <NUM> may be electrically isolated from the package contacts <NUM>-<NUM>, <NUM>-<NUM> and may be configured to spread heat away from the LED chips <NUM>-<NUM> to <NUM>-<NUM> through the submount <NUM>. <FIG> illustrates an alternative configuration for the backside of the submount <NUM>. In <FIG>, the package contacts <NUM>-<NUM>, <NUM>-<NUM> are larger and take up more surface area on the backside of the submount <NUM>. Accordingly, the package contacts <NUM>-<NUM>, <NUM>-<NUM> are electrically connected to the LED chips <NUM>-<NUM> to <NUM>-<NUM> and may also spread heat away from the LED chips <NUM>-<NUM> to <NUM>-<NUM> through the submount <NUM>. <FIG> is a side view illustration representing a cross-section of the LED package <NUM> taken along section line III - III of <FIG>. The first metal trace <NUM>-<NUM> and the package contact <NUM>-<NUM> are shown on opposite faces of the submount <NUM>. The conductive vias <NUM>-<NUM>, <NUM>-<NUM> extend through the submount <NUM> to electrically connect the first metal trace <NUM>-<NUM> to the package contact <NUM>-<NUM>. In <FIG>, the first metal trace <NUM>-<NUM> and the package contact <NUM>-<NUM> are illustrated as having multiple layers <NUM>-<NUM>', <NUM>-<NUM>" and <NUM>-<NUM>', <NUM>-<NUM>" respectively. The multiple layers <NUM>-<NUM>', <NUM>-<NUM>" and <NUM>-<NUM>', <NUM>-<NUM>" may include any number of electrically conductive materials as described above. In some embodiments, the layers <NUM>-<NUM>' and <NUM>-<NUM>' include Au, ENIG, or ENEPIG and the layers <NUM>-<NUM>" and <NUM>-<NUM>" include an electroless Au plating. In <FIG>, the layer <NUM>-<NUM>" is illustrated as covering sidewalls of the layer <NUM>-<NUM>'. The layer <NUM>-<NUM>" may only cover a surface of the layer <NUM>-<NUM>' without covering the sidewalls.

Claim 1:
A light-emitting diode, LED, package comprising:
a submount (<NUM>);
a metal pattern (<NUM>) on the submount (<NUM>), wherein the metal pattern (<NUM>) comprises:
a die attach pad (<NUM>-<NUM>) formed by a first portion of a first metal trace (<NUM>-<NUM>) and a first portion of a second metal trace (<NUM>-<NUM>), wherein the first metal trace is discontinuous with the second metal trace; and
a bond pad (<NUM>-<NUM>) formed by a second portion of the first metal trace, wherein a third portion of the first metal trace is continuous with the die attach pad (<NUM>-<NUM>) and the bond pad (<NUM>-<NUM>);
an LED chip (<NUM>-<NUM>) mounted on the die attach pad (<NUM>-<NUM>); and
a bond metal (<NUM>) on the bond pad (<NUM>-<NUM>),
characterized in that the bond metal (<NUM>) comprises a conductive finger (<NUM>") that extends on a top surface of the third portion of the first metal trace to a position on the first portion of the metal trace such that the conductive finger (<NUM>") extends at least to a first edge of the LED chip (<NUM>-<NUM>) that is opposite a second edge of the LED chip (<NUM>-<NUM>) that is closest to the bond pad (<NUM>-<NUM>).