Patent Description:
Test and measurement systems are designed to receive and measure test signals, for example from a Device Under Test (DUT). For example, a test and measurement system, such as an oscilloscope, may couple to a DUT via a probe. In order to measure a test signal from the DUT, an electrical current is drawn from the DUT across the probe. Drawing current from the DUT may change the electrical characteristics of the circuit being tested. Hence, an ideal probe should draw the smallest amount of current possible. Current drawn by the measurement device is referred to as signal loading. Signal loading is undesirable, because signal loading may alter the function of the DUT and/or provide inaccurate test data. Signal loading is a function of impedance, which is in turn a function of resistance and capacitance in the probe. Increased probe resistance increases impedance, and hence signal loading, for direct current (DC) and low frequency signals. Decreased probe capacitance increases impedance, and hence signal loading, for high frequency signals. As such, the resistance and the capacitance of the signal probe directly affect the range of signals that can be measured by the probe without introducing unacceptable levels of signal loading. In particular, progressively reduced signal probe capacitance allows for accurate measurement progressively higher frequency signals.

Examples in the disclosure address these and other issues.

Document <CIT> discloses reducing the capacity of a capacitor at the end portion of a probe by using an amplifier having sufficient gains, to amplify the output of a passive attenuating probe circuit having an amount of attenuation not less than a predetermined value, and restoring the amount of attenuation to an optimum value.

Document <CIT> discloses a probe having an attenuating function, a signal acquisition system and a signal acquisition method.

Document <CIT> discloses an input connectable through a short flexible cable to a test point, which is connected to an amplifier with a very high input resistance.

Document <CIT> discloses a passive probe device wherein a signal Vin to be measured is inputted into a probe head, and a signal having a voltage divided with a prescribed impedance ratio is outputted to an oscilloscope through a cable and an interface part, a variable resistance means VR and a variable capacitor means VC in the interface part are controlled by a correction control means, in correspondence with a detection signal of a temperature sensor in the probe head, so as to compensate a change of the impedance ratio caused by a temperature change of a resistance Rhead and a capacitor Chead of the probe head.

Document <CIT> discloses an oscilloscope having a signal source with a probe correction signal as an output and a display means for displaying a correction signal by inputting the correction signal via a probe.

Aspects, features and advantages of embodiments of the present disclosure will become apparent from the following description of embodiments in reference to the appended drawings in which:.

Some signal probes employ a voltage divider circuit and an amplifier to mitigate signal loading at lower frequencies. However, the voltage divider circuit and the amplifier include parasitic capacitances. Such parasitic capacitances may vary based on temperature and based on test setup. The signal probes may employ a variable shunt capacitor, where shunt indicates a component that couples from a signal channel to ground. The variable shunt capacitor is employed to match a Resistance Capacitance (RC) value of the voltage divider circuit with an RC value of the probe input and amplifier. This results in overcoming an unknown capacitance with a controlled calibrated capacitance, which then results in a consistent signal response over a specified frequency range. Unfortunately, adding the variable shunt capacitor increases the capacitance of the signal probe, and hence increases undesirable signal loading at higher frequencies.

This disclosure seeks to lower the input capacitance of the probe by freeing the capacitive divider from having to match any pre-selected attenuation. Instead, the capacitive divider created by parasitic capacitance across the series resistor and the amplifier shunt capacitance is matched by adjusting the value of the shunt resistor. The shunt resistance variation can either be realized by a potentiometer (e.g. up to perhaps <NUM>), a laser-trimmable resistor, by measuring the capacitive attenuation and installing the desired value of resistor in the probe, or in any other suitable manner. The attenuation in front of the amplifier varies as these capacitances change from probe to probe, but the response can be set flat by adjusting the resistive attenuation to match. To calibrate the overall probe gain, a small adjustable attenuation correction may then be built in to the output series termination of the amplifier. The amplifier input capacitance still varies with input voltage and temperature. In order to correct for these variation to a first order, compensating components can be added with as little increase to the shunt capacitance as possible. For example, for a junction gate field-effect transistor (JFET) amplifier, an input capacitance may be changed approximately <NUM> femtofarad (fF) per degree Celsius (C) over the expected operating temperature range. An electrostatic sensitive device (ESD) diode with a nearly equal and opposite temperature coefficient of capacitance may be included while only increasing the shunt capacitance by about <NUM> fF. As an added benefit, the op-amp acting as an attenuator is further protected from ESD spikes that may occur at probe inputs. Similarly, the input voltage capacitance changes can be compensated from an appropriately biased varactor to flatten the shunt capacitance to within expected levels for probe performance. There is also the option of biasing a varactor with a voltage that is temperature-dependent in the event that temperature coefficients do not otherwise sum to nearly zero.

In other words, disclosed herein is a probe design that reduces signal probe capacitance, resulting in reduced impedance, reduced signal loading, and increased accuracy at higher frequencies (e.g. up to about two gigahertz (GHz)). Specifically, the variable shunt capacitor is omitted from the voltage divider circuit. This omission reduces impedance effects at higher frequencies according to the reduction in capacitance by such omission. The signal probe includes a variable shunt resistor, which is employed to match the RC value of the divider circuit with the RC value of the amplifier and the signal probe input. Matching the RC value with a variable shunt resistor alters the attenuation characteristics of the voltage divider circuit. Hence, a variable series resistor is also included along the signal path. Once the variable shunt resistor is tuned to provide a flat frequency response, the variable series resistor is employed to adjust for attenuation variation caused by the variable shunt resistor. Further, a shunt ESD diode may be employed in the voltage divider circuit. The ESD diode protects the amplifier from electrostatic discharge. The ESD diode and the amplifier both include capacitances that vary according to temperature. However, the temperature coefficient of capacitance of the ESD diode is nearly equal and opposite to the temperature coefficient of capacitance of the amplifier. As such, the shunted ESD diode reduces and may nearly eliminate temperature related capacitance variation. In an example, the temperature related capacitance variation is limited to a change of about twenty femtofarads (fF) over an eighty degree Celsius (c) temperature change. Such temperature related capacitance changes can be further mitigated by employing a shunt diode in the voltage divider circuit. The shunt diode may be biased to mitigate support matching the RC value of the voltage divider circuit to the RC value of the amplifier at a specified temperature. In yet another example, a temperature sensor and corresponding conditioning circuitry can control the bias to the shunt diode. This allows the RC match to actively adjust based on temperature, and hence compensate for temperature related capacitance variation in the amplifier.

<FIG> is a schematic diagram of an example signal probe <NUM> for reduced input capacitance. The signal probe <NUM> may also be referred to as a test and measurement probe. The signal probe <NUM> includes a voltage divider circuit <NUM>, an amplifier <NUM>, and a variable series resistor <NUM> coupled together via a signal channel <NUM> for transporting a test signal from a DUT to a test system. The voltage divider <NUM> and amplifier <NUM> provide impedance to limit signal loading. As noted above, excessive current drawn across the signal channel <NUM> can alter the electrical characteristics of the DUT, and hence provide an inaccurate test signal in a process referred to as signal loading.

The voltage divider <NUM> includes an input series resistor <NUM> in the signal channel <NUM>. The voltage divider <NUM> also includes a static shunt resistor <NUM> and a variable shunt resistor <NUM>. It should be noted that the static shunt resistor <NUM> and variable shunt resistor <NUM> may be combined into a signal resistive element in some examples. The static shunt resistor <NUM> and variable shunt resistor <NUM> are considered shunt components because the signal channel <NUM> is coupled to a ground <NUM> (e.g. shunted) via the static shunt resistor <NUM> and variable shunt resistor <NUM>. The voltage divider <NUM> is a passive linear circuit that provides an output voltage that is a fraction of an input voltage. From a DC perspective, the fraction is determined by the value of the input series resistor <NUM> relative to the values of the shunt resistors <NUM> and <NUM>. Hence, the shunt resistors <NUM> and <NUM> and the input series resistor <NUM> act as the voltage divider circuit <NUM>. In other words, the input series resistor <NUM>, static shunt resistor <NUM>, and variable shunt resistor <NUM> provide resistive impedance, which mitigates signal loading. The variable shunt resistor <NUM> may be implemented by a trimmer potentiometer, a laser trimmed resistor, and/or a resistor selected to employ a specified resistance that results in a matched RC value, depending on the example. It will be appreciated that these are merely meant to be illustrative examples of possible variable shunt resistor configurations and that other configurations for employing the variable shunt resistor will be readily apparent to a person of ordinary skill in the art.

The amplifier <NUM> provides a high-impedance input and a low-impedance output. As such, the input of amplifier <NUM> has a higher impedance than the output of amplifier <NUM>. The input of the amplifier <NUM> is coupled to the voltage divider circuit <NUM> via the signal channel <NUM>. The high-impedance input of amplifier <NUM> keeps the flow of charge from the DUT as low as possible, while allowing a measurable amount of charge to pass, and thus reduces signal loading. The low-impedance output is employed to drive a cable (e.g. a fifty-ohm cable) and test equipment.

In addition to resistive impedance, the voltage divider circuit <NUM> and amplifier <NUM> also create capacitance, which acts as part of the signal probe's <NUM> impedance. The input series resistor <NUM> included in the signal channel <NUM> creates a series parasitic capacitance <NUM>. The amplifier <NUM> coupled to the signal channel <NUM> includes a shunt parasitic capacitance <NUM>. The capacitance provided by the series parasitic capacitance <NUM> and shunt parasitic capacitance <NUM> may vary based on temperature, test circuit components, etc., but may be about <NUM> picofarads (pF) and <NUM> pF, respectively. The parasitic capacitances <NUM> and <NUM> cause test signal variation at different frequencies. Such variation may result in an altered test signal, and hence inaccurate test results. In other words, due to the parasitic capacitances <NUM> and <NUM>, the DC/low frequency gain of the circuit may be different from the high frequency gain of the circuit. Such differences in gain may then be erroneously measured as part of the test signal.

Accordingly, the variable shunt resistor <NUM>, which is coupled to the signal channel <NUM> and the ground <NUM>, may be adjusted so that the series RC time constant created by series resistor <NUM> and series parasitic capacitance <NUM> matches the shunt RC time constant created by shunt resistors <NUM> and <NUM> and the parasitic capacitance <NUM>. In other words, the static shunt resistor <NUM> and the variable shunt resistor <NUM> together with the amplifier <NUM> shunt parasitic capacitance <NUM> provide a resistance and a parasitic capacitance, which results in an RC value. By adjusting the variable shunt resistor <NUM>, the RC time constant value of the shunt portion of the circuit can be matched to the RC time constant value of input series resistor <NUM> and the series parasitic capacitance <NUM>. By matching the RC values of the shunt portion of the circuit and the signal channel <NUM> portion of the circuit, the DC/low frequency gain of the test signal matches the high frequency gain of the test signal. When this occurs, a test signal forwarded over the signal channel <NUM> appears substantially flat when graphed in the frequency domain. Hence the signal probe <NUM>, when calibrated via the variable shunt resistor <NUM>, reproduces the shape of the test signal at the output of amplifier <NUM>.

As noted above, such RC matching could be accomplished by employing a variable shunt capacitor in the voltage divider circuit <NUM>. However, employing a variable shunt capacitor increases the overall capacitance of the circuit, and hence increases signal loading. Accordingly, the voltage divider circuit <NUM> of the signal probe <NUM> accomplishes the RC matching independent of (i.e. without employing) a shunt capacitor. In other words, the signal probe <NUM> applies a loading capacitance to the DUT via the signal channel <NUM> due to the capacitances inherent in the circuit. However, the loading capacitance is reduced by omitting the shunt capacitor from the voltage divider circuit <NUM>.

It should be noted that, by performing RC matching via variable shunt resistor <NUM> instead of a variable capacitor, the amplitude of test signal across the signal channel <NUM> is allowed to vary. In order to account for this amplitude variation, the signal probe <NUM> includes the variable series resistor <NUM> coupled to the output of the amplifier <NUM>. The variable series resistor <NUM> may be set to adjust for attenuation variation associated with the variable shunt resistor <NUM>. This overcomes the signal attenuation concerns associated with variable shunt resistor <NUM> based RC matching without employing a shunt capacitor.

In some examples, the voltage divider circuit <NUM> of the signal probe <NUM> also includes a shunt electrostatic sensitive device (ESD) diode <NUM>. The shunt ESD diode <NUM> is coupled to the signal channel <NUM> and the ground <NUM>. The shunt ESD diode <NUM> is designed to allow charge to flow toward the ground <NUM> when excess charge is forwarded across the signal channel <NUM>. This may occur in cases of electrostatic discharge, and may result in damage to electronic equipment. Accordingly, the shunt ESD diode <NUM> protects the amplifier <NUM>, and other components along the signal channel <NUM>, from electrostatic discharge forwarded across the signal channel <NUM>. The shunt ESD diode <NUM> may also support other functionality. For example, the parasitic capacitance <NUM> of the amplifier <NUM> varies based on ambient temperature. The shunt ESD diode <NUM> applies a parasitic capacitance that also varies based on ambient temperature, but in the opposite direction. Hence, the temperature varying capacitance of the shunt ESD diode <NUM> offsets/mitigates the temperature varying capacitance associated with the shunt parasitic capacitance <NUM> of the amplifier <NUM>.

It should be noted that the signal probe <NUM> may be implemented in several components. For example, the signal probe <NUM> may include a probe tip, coupled to a compensation box via a cable and a controller coupled to the compensation box. In some examples, the voltage divider circuit <NUM> is positioned in the probe tip and amplifier <NUM> and variable series resistor <NUM> are positioned in the compensation box and/or controller. However, the components of signal probe <NUM>, as depicted, may also be mounted completely in the probe tip in some examples.

<FIG> is a schematic diagram of an example signal probe <NUM> for reduced input capacitance with fixed temperature correction. The signal probe <NUM> is similar to signal probe <NUM> with additional temperature correction. Signal probe <NUM> includes a signal path <NUM>, a voltage divider circuit <NUM>, an input series resistor <NUM>, a series parasitic capacitance <NUM>, a static shunt resistor <NUM>, a variable shunt resistor <NUM>, a ground <NUM>, a shunt ESD diode <NUM>, an amplifier <NUM>, a shunt parasitic capacitance <NUM>, and a variable series resistor <NUM>, which are substantially similar to the signal path <NUM>, voltage divider circuit <NUM>, input series resistor <NUM>, series parasitic capacitance <NUM>, static shunt resistor <NUM>, variable shunt resistor <NUM>, ground <NUM>, shunt ESD diode <NUM>, amplifier <NUM>, shunt parasitic capacitance <NUM>, and variable series resistor <NUM>, respectively.

The signal probe <NUM> voltage divider circuit <NUM> also includes a shunt diode <NUM>. The shunt diode <NUM> is coupled to the signal channel <NUM> as shown (e.g. and/or to a ground). The shunt diode <NUM> is biased via a negative tuning bias voltage (vBias), for example from a voltage source. The biased shunt diode <NUM> supports matching the RC value associated with the series parasitic capacitance <NUM> and the shunt parasitic capacitance <NUM> by altering the shunted capacitance. For example, the shunt diode <NUM> may apply capacitance on the order of femtofarads (fF), and may be employed to tune the RC constant of the voltage divider circuit <NUM> to correct for capacitance changes due to system temperature. In some examples, the shunt diode <NUM> is implemented as a biased varactor diode. It should be noted that, in some examples, the shunt diode <NUM> may be inverted from the orientation shown in <FIG>. In such cases, an anode of the shunt diode <NUM> is connected to the signal bias and the cathode is connected to the signal channel <NUM>. In such a case, the polarity of the shunt diode <NUM> is inverted, and hence the polarity of the signal bias is also inverted.

<FIG> is a schematic diagram of an example signal probe <NUM> for reduced input capacitance with temperature correction based on a measured temperature. The signal probe <NUM> is similar to signal probe <NUM> with active temperature correction. Signal probe <NUM> includes a signal path <NUM>, a voltage divider circuit <NUM>, an input series resistor <NUM>, a series parasitic capacitance <NUM>, a static shunt resistor <NUM>, a variable shunt resistor <NUM>, a ground <NUM>, a shunt diode <NUM>, a shunt ESD diode <NUM>, an amplifier <NUM>, a shunt parasitic capacitance <NUM>, and a variable series resistor <NUM>, which are substantially similar to the signal path <NUM>, voltage divider circuit <NUM>, input series resistor <NUM>, series parasitic capacitance <NUM>, static shunt resistor <NUM>, variable shunt resistor <NUM>, ground <NUM>, shunt diode <NUM>, shunt ESD diode <NUM>, amplifier <NUM>, shunt parasitic capacitance <NUM>, and variable series resistor <NUM>, respectively.

The signal probe <NUM> also includes a temperature sensor <NUM>, which is any device configured to measure temperature. The signal probe <NUM> also includes a conditioning circuit <NUM> coupled to the temperature sensor <NUM> and the shunt diode <NUM> as shown. The conditioning circuit <NUM> is any component or group of components configured to bias the shunt diode <NUM> based on temperature measured by the temperature sensor <NUM>. Accordingly, the conditioning circuit <NUM> applies a negative temperature dependent voltage to the shunt diode <NUM> to correct for changes in capacitance related to temperature changes.

<FIG> is a graph <NUM> of temperature related capacitance compensation for an example signal probe, such as signal probe <NUM>, <NUM>, and/or <NUM>. Graph <NUM> shows changes in example amplifier capacitance, ESD diode capacitance, and total capacitance as a function of temperature. The temperature is shown in Celsius (C) and the capacitance is shown in pF. As shown, the ESD diode increases capacitance by about <NUM> fF from <NUM> degrees C to <NUM> degrees C. Over the same range, the amplifier capacitance decreases about <NUM> fF. As these changes are complementary, the resulting temperature change over the entire circuit is about <NUM> fF over the same range, which is negligible. Accordingly, the inverse relationship in temperature changing capacitance between the amplifier and the ESD diode largely mitigates the effects of temperature on RC matching in an example signal probe such as signal probes <NUM>, <NUM>, and/or <NUM>. Further, is additional accuracy is desired, a biased shunt diode, such as diode <NUM> and/or <NUM>, can be employed to further correct for ambient temperature changes.

<FIG> is a flowchart of an example method <NUM> of calibrating a test and measurement probe, such as signal probe <NUM>, <NUM>, and/or <NUM>. At block <NUM>, a variable shunt resistor, such as variable shunt resistor <NUM>, <NUM>, and/or <NUM> is set. As noted above, the variable shunt resistor is employed in a voltage divider circuit of the test and measurement probe. The variable shunt resistor is adjusted and set to match the RC value of the shunt with the RC value of the series path. A known test signal of constant amplitude and varying frequency may be forwarded across the signal channel for calibration purposes. When the test signal is graphed on an oscilloscope in the frequency domain, the resulting waveform appears to have different amplitude values at different frequencies when the RC values do not match. Accordingly, the variable shunt resistor may be adjusted until the graph shows a flat response in the frequency domain. The flattened frequency response of the test and measurement probe indicates that the RC values are matched and hence the probe applies a consistent level of attenuation across the frequencies of interest. As such, flattening the frequency response of the test and measurement probe results in matching the RC time constants associated with the series elements and shunt elements. Also as noted above, a shunt capacitor is omitted from the voltage divider circuit to reduce the capacitance of the probe. Hence, setting the variable shunt resistor to flatten the frequency response of the test and measurement probe does not include adjusting a variable capacitor.

Setting the variable shunt resistor in block <NUM> also adjusts the attenuation of the circuit. A probe is expected to provide a specified attenuation, and hence setting the variable shunt resistor results in deviations from the expected attenuation. Such deviations may be unknown prior to setting the probe and may vary from probe to probe. Block <NUM> is employed to compensate for such attenuation changes and to provide a consistent attenuation across a product line of test and measurement probes. At block <NUM>, a variable series resistor in the signal channel of the test and measurement probe is set. For example, the test signal for calibration has a known amplitude. Hence, the variable series resistor can be adjusted until the frequency response shown on the oscilloscope displays at an amplitude associated with a desired attenuation. For example, when a probe is expected to have a ten times (10X) attenuation and the test signal is a ten volt signal, the variable series resistor can be adjusted until the frequency response indicates an amplitude of one volt. By performing block <NUM>, the attenuation variation associated with the variable shunt resistor setting is mitigated.

Optionally, block <NUM> may be performed to mitigate temperature based capacitance variations. As noted above, the voltage divider circuit may include a shunt ESD diode with a temperature varying capacitance that offsets a temperature varying capacitance associated with an amplifier of the test and measurement probe. Block <NUM> may be performed in addition to use of the ESD diode. At block <NUM>, a bias of a shunt diode in the voltage divider circuit may be set to mitigate temperature varying capacitance of the test and measurement probe. In some cases, the shunt diode may be operated by a temperature sensor and conditioning circuity. In such cases, setting the shunt diode may include initializing the temperature sensor and conditioning circuity.

Examples of the disclosure may operate on a particularly created hardware, on firmware, digital signal processors, or on a specially programmed computer including a processor operating according to programmed instructions. The terms "controller" or "processor" as used herein are intended to include microprocessors, microcomputers, ASICs, and dedicated hardware controllers. One or more aspects of the disclosure may be embodied in computer-usable data and computer-executable instructions, such as in one or more program modules, executed by one or more computers (including monitoring modules), or other devices. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform particular tasks or implement particular abstract data types when executed by a processor in a computer or other device. The computer executable instructions may be stored on a computer readable medium such as a hard disk, optical disk, removable storage media, solid state memory, RAM, etc. As will be appreciated by one of skill in the art, the functionality of the program modules may be combined or distributed as desired in various examples. In addition, the functionality may be embodied in whole or in part in firmware or hardware equivalents such as integrated circuits, field programmable gate arrays (FPGA), and the like. Particular data structures may be used to more effectively implement one or more aspects of the disclosure, and such data structures are contemplated within the scope of computer executable instructions and computer-usable data described herein.

Aspects of the present disclosure operate with various modifications and in alternative forms. Specific aspects have been shown by way of example in the drawings and are described in detail herein below. However, it should be noted that the examples disclosed herein are presented for the purposes of clarity of discussion and are not intended to limit the scope of the general concepts disclosed to the specific examples described herein unless expressly limited. As such, the present disclosure is intended to cover all modifications, equivalents, and alternatives of the described aspects in light of the attached drawings and claims.

References in the specification to embodiment, aspect, example, etc., indicate that the described item may include a particular feature, structure, or characteristic. However, every disclosed aspect may or may not necessarily include that particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same aspect unless specifically noted. Further, when a particular feature, structure, or characteristic is described in connection with a particular aspect, such feature, structure, or characteristic can be employed in connection with another disclosed aspect whether or not such feature is explicitly described in conjunction with such other disclosed aspect.

The disclosed aspects may be implemented, in some cases, in hardware, firmware, software, or any combination thereof. The disclosed aspects may also be implemented as instructions carried by or stored on one or more or computer-readable media, which may be read and executed by one or more processors. Such instructions may be referred to as a computer program product. Computer-readable media, as discussed herein, means any media that can be accessed by a computing device. By way of example, and not limitation, computer-readable media may comprise computer storage media and communication media.

Computer storage media means any medium that can be used to store computer-readable information. By way of example, and not limitation, computer storage media may include Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read-Only Memory (EEPROM), flash memory or other memory technology, Compact Disc Read Only Memory (CD-ROM), Digital Video Disc (DVD), or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, and any other volatile or nonvolatile, removable or non-removable media implemented in any technology. Computer storage media excludes signals per se and transitory forms of signal transmission.

Communication media means any media that can be used for the communication of computer-readable information. By way of example, and not limitation, communication media may include coaxial cables, fiber-optic cables, air, or any other media suitable for the communication of electrical, optical, Radio Frequency (RF), infrared, acoustic or other types of signals.

Claim 1:
A test and measurement probe (<NUM>, <NUM>) comprising:
a signal input for receiving a test signal from a device under test;
a voltage divider circuit (<NUM>, <NUM>) coupled to the signal input, the voltage divider circuit (<NUM>, <NUM>) including a variable shunt resistor (<NUM>, <NUM>) and not including a shunt capacitor, wherein adjustment of the variable shunt resistor (<NUM>, <NUM>) varies attenuation of the test signal;
an amplifier (<NUM>, <NUM>) with an input coupled to the voltage divider circuit (<NUM>, <NUM>) and an output; and
a variable series resistor (<NUM>, <NUM>) coupled to the output of the amplifier (<NUM>, <NUM>), wherein the variable series resistor (<NUM>, <NUM>) is set to adjust for attenuation variation associated with the variable shunt resistor (<NUM>, <NUM>).