Patent Description:
In recent years, a single photon avalanche diode (SPAD) has been developed that amplifies a charge generated by photoelectric conversion by avalanche multiplication (also referred to as avalanche amplification) and outputs the amplified charge as an electric signal. The avalanche amplification is a phenomenon in which electrons accelerated by an electric field collide with lattice atoms in an impurity diffusion region of a PN junction to cut bonds of the lattice atoms, and newly generated electrons further collide with other lattice atoms to cut bonds thereof, multiplying a current by repeating the above.

Such a SPAD is applicable to a distance measuring device that measures a distance to an object on the basis of a time required to return light emitted from a light emitting unit and reflected by the object, a solid-state imaging device that converts a light amount of incident light into an electric signal, or the like.

In order to discharge a large current generated by the avalanche amplification from a SPAD pixel, it is desirable to form a contact that is a low resistance ohmic contact. For a method of forming the contact that is the low resistance ohmic contact in the impurity diffusion region formed in a semiconductor substrate, it is generally known to form a high-concentration impurity region in a contact region. From Patent Literature <NUM> is known a single photon avalanche diode (SPAD) image sensor including: a substrate having a front surface and a back surface; a trench isolation in the substrate, the trench isolation extending from the front surface of the substrate toward the back surface of the substrate, the trench isolation having a first surface and a second surface opposite to the first surface, the first surface being coplanar with the front surface of the substrate, the second surface being distanced from the back surface of the substrate by a distance greater than <NUM>; wherein the substrate includes: a first layer doped with dopants of a first conductivity type, the first layer extending from the back surface of the substrate toward the trench isolation and laterally surrounding at least a portion of sidewalls of the trench isolation.

Here, it is necessary to apply a high voltage to the PN junction in the reverse-bias direction to obtain a field strength large enough to generate the avalanche amplification, but a small distance from the PN junction region to the contact causes a strong electric field between the PN junction region and the contact, generating a tunneling effect. There is a problem that the generation of such a tunneling effect immediately generates recombined pairs of electrons and holes generated by the photoelectric conversion due to the tunneling current, and thus, the avalanche amplification cannot be generated.

Furthermore, in order to avoid the occurrence of the tunneling effect, a method of increasing a distance between two contacts is conceivable, but the method causes a problem of increase in pixel size and decrease in resolution.

Therefore, the present disclosure proposes a solid-state imaging device and an electronic device that are configured to stably generate the avalanche amplification while suppressing the decrease in resolution.

To solve the above-described problem, a solid-state imaging device according to one aspect of the present disclosure comprises: a first semiconductor substrate that includes a grid-shaped first trench provided in a first surface, and a second trench provided along a bottom of the first trench; and a plurality of photoelectric conversion elements that is provided in the first semiconductor substrate, wherein each of the photoelectric conversion elements includes: a photoelectric conversion region that is provided in an element region defined by the first trench and the second trench in the first semiconductor substrate, and is configured to photoelectrically convert incident light to generate charges; a first semiconductor region that surrounds the photoelectric conversion region in the element region; a first contact that makes contact with the first semiconductor region at the bottom of the first trench; a first electrode that makes contact with the first contact in the first trench; a second semiconductor region that is provided in a region of the element region making contact with the first semiconductor region, and has a first conductivity type the same as the first semiconductor region; a third semiconductor region that is a region making contact with the second semiconductor region in the element region, is provided between the second semiconductor region and the first surface, and has a second conductivity type opposite to that of the first conductivity type; a second contact that is provided on the first surface so as to make contact with the third semiconductor region; and a second electrode that makes contact with the second contact, and a height of the first contact from the first surface is different from a height of the third semiconductor region from the first surface.

Embodiments of the present disclosure will be described below in detail with reference to the drawings. Note that in the following embodiments, the same portions are denoted by the same reference symbols, and a repetitive description thereof will be omitted.

Furthermore, the present disclosure will be described according to the following items.

First, a solid-state imaging device and an electronic device according to a first embodiment will be described in detail with reference to the drawings.

<FIG> is a block diagram illustrating an example of a schematic configuration of the electronic device loaded with the solid-state imaging device according to the first embodiment. As illustrated in <FIG>, an electronic device <NUM> includes, for example, an imaging lens <NUM>, a solid-state imaging device <NUM>, a storage unit <NUM>, and a processor <NUM>.

The imaging lens <NUM> is an example of an optical system that focuses incident light to form an image on a light-receiving surface of the solid-state imaging device <NUM>. The light-receiving surface may be a surface on which photoelectric conversion elements are arranged in the solid-state imaging device <NUM>. The solid-state imaging device <NUM> photoelectrically converts the incident light to generate image data. Furthermore, the solid-state imaging device <NUM> performs predetermined signal processing such as noise removal or white balance adjustment on the generated image data.

The storage unit <NUM> includes, for example, a flash memory, a dynamic random access memory (DRAM), a static random access memory (SRAM), or the like and records the image data or the like input from the solid-state imaging device <NUM>.

The processor <NUM> is configured using, for example, a central processing unit (CPU) or the like, and may include an application processor configured to execute an operating system, various application software, or the like, a graphics processing unit (GPU), a baseband processor, or the like. The processor <NUM> executes various processing as necessary on the image data input from the solid-state imaging device <NUM> or the image data and the like read from the storage unit <NUM>, displays the image data to the user, or transmits the image data to the outside via a predetermined network.

<FIG> is a block diagram illustrating an example of a schematic configuration of the solid-state imaging device (hereinafter, simply referred to as an image sensor) of complementary metal-oxide-semiconductor (CMOS) type according to the first embodiment. Here, the image sensor of CMOS type is an image sensor made by applying or partially using a CMOS process. Note that, in the present embodiment, the image sensor <NUM> of so-called back-illuminated type that has a light incident surface being a surface on a side opposite to an element formation surface of a semiconductor substrate is exemplified, but the present embodiment is not limited to the back-illuminated type, and a so-called front-illuminated type that has the element formation surface as the light incident surface may be adopted.

As illustrated in <FIG>, the image sensor <NUM> includes a SPAD array unit <NUM>, a timing control circuit <NUM>, a drive circuit <NUM>, and an output circuit <NUM>.

The SPAD array unit <NUM> includes a plurality of SPAD pixels <NUM> arranged in a matrix. To the plurality of SPAD pixels <NUM>, a pixel drive line LD (vertical direction in the drawing) is connected in each column, and an output signal line LS (horizontal direction in the drawing) is connected in each row. One end of the pixel drive line LD is connected to an output end of the drive circuit <NUM> corresponding to each column, and one end of the output signal line LS is connected to an input end of the output circuit <NUM> corresponding to each row.

The drive circuit <NUM> includes a shift register, an address decoder, or the like, and drives all of the SPAD pixels <NUM> of the SPAD array unit <NUM> simultaneously or the SPAD pixels <NUM> in columns or the like. Therefore, the drive circuit <NUM> includes at least a circuit configured to apply a quenching voltage V_QCH which is described later to each SPAD pixel <NUM> in a selected column in the SPAD array unit <NUM> and a circuit configured to apply a selection control voltage V_SEL which is described later to each SPAD pixel <NUM> in the selected column. Then, the drive circuit <NUM> applies the selection control voltage V_SEL to the pixel drive line LD corresponding to a column to be read, and the SPAD pixels <NUM> used to detect incidence of photons are selected in columns.

A signal (referred to as a detection signal) V_OUT output from each SPAD pixel <NUM> in a column selectively scanned by the drive circuit <NUM> is input to the output circuit <NUM> through each of the output signal lines LS. The output circuit <NUM> outputs as a pixel signal the detection signal V_OUT input from each SPAD pixel <NUM> to the storage unit <NUM> or processor <NUM> on the outside.

The timing control circuit <NUM> includes a timing generator or the like configured to generate various timing signals, and controls the drive circuit <NUM> and the output circuit <NUM> on the basis of the various timing signals generated by the timing generator.

<FIG> is a circuit diagram illustrating an example of a schematic configuration of the SPAD pixel according to the first embodiment. As illustrated in <FIG>, the SPAD pixel <NUM> includes a photodiode <NUM> as a light receiving element and a readout circuit <NUM> configured to detect incidence of a photon on the photodiode <NUM>. In the photodiode <NUM>, incidence of the photon during application of a reverse bias voltage V_SPAD equal to or larger than a breakdown voltage between an anode and a cathode of the photodiode <NUM> generates an avalanche current.

The readout circuit <NUM> includes a quenching resistor <NUM>, a digital converter <NUM>, an inverter <NUM>, a buffer <NUM>, and a select transistor <NUM>. The quenching resistor <NUM> includes, for example, an N-type metal oxide semiconductor field effect transistor (MOSFET, hereinafter referred to as an NMOS transistor), and the NMOS transistor has a drain that is connected to the anode of the photodiode <NUM>, and a source that is grounded via the select transistor <NUM>. In addition, the NMOS transistor constituting the quenching resistor <NUM> has a gate to which the quenching voltage V_QCH set in advance for causing the NMOS transistor to act as quenching resistance is applied from the drive circuit <NUM> via the pixel drive line LD.

In the present embodiment, the photodiode <NUM> employs a SPAD. The SPAD is an avalanche photodiode that operates in Geiger mode when reverse bias voltage equal to or larger than the breakdown voltage is applied between an anode and a cathode of the SPAD, and is thereby operable to detect incidence of a single photon.

The digital converter <NUM> includes a resistor <NUM> and an NMOS transistor <NUM>. The NMOS transistor <NUM> has a drain that is connected to power supply voltage VDD via the resistor <NUM>, and a source that is grounded. In addition, the NMOS transistor <NUM> has a gate to which the voltage of a connection point N1 between the anode of the photodiode <NUM> and the quenching resistor <NUM> is applied.

The inverter <NUM> includes a P-type MOSFET (hereinafter, referred to as a PMOS transistor) <NUM> and an NMOS transistor <NUM>. The PMOS transistor <NUM> has a drain that is connected to power supply voltage VDD, and a source that is connected to a drain of the NMOS transistor <NUM>. The drain of the NMOS transistor <NUM> is connected to the source of the PMOS transistor <NUM>, and a source thereof is grounded. The voltage of a connection point N2 between the resistor <NUM> and the drain of the NMOS transistor <NUM> is applied to a gate of the PMOS transistor <NUM> and a gate of the NMOS transistor <NUM>. Output of the inverter <NUM> is input to the buffer <NUM>.

The buffer <NUM> is a circuit for impedance conversion, and impedance-converts an output signal input from the inverter <NUM>, and outputs the converted signal as the detection signal V_OUT.

The select transistor <NUM> is, for example, an NMOS transistor, and has a drain that is connected to the source of the NMOS transistor constituting the quenching resistor <NUM>, and a source that is grounded. The select transistor <NUM> is connected to the drive circuit <NUM>, and changes from an off state to an on state when the selection control voltage V_SEL from the drive circuit <NUM> is applied to a gate of the select transistor <NUM> via the pixel drive line LD.

The readout circuit <NUM> illustrated in <FIG> operates, for example, as follows. In other words, first, during a period in which the selection control voltage V_SEL is applied from the drive circuit <NUM> to the select transistor <NUM> and the select transistor <NUM> is in the on state, the reverse bias voltage V_SPAD equal to or larger than the breakdown voltage is applied to the photodiode <NUM>. This permits the operation of the photodiode <NUM>.

Meanwhile, during a period in which the selection control voltage V_SEL is not applied from the drive circuit <NUM> to the select transistor <NUM> and the select transistor <NUM> is in the off state, the reverse bias voltage V_SPAD is not applied to the photodiode <NUM>, and thus, the operation of the photodiode <NUM> is prohibited.

When the photon is incident on the photodiode <NUM> while the select transistor <NUM> is in the on state, the avalanche current is generated in the photodiode <NUM>. Therefore, the avalanche current flows through the quenching resistor <NUM>, and the voltage at the connection point N1 increases. When the voltage at the connection point N1 becomes larger than the on-voltage of the NMOS transistor <NUM>, the NMOS transistor <NUM> is brought into an on state, and the voltage at the connection point N2 changes from the power supply voltage VDD to <NUM> V. When the voltage at the connection point N2 changes from the power supply voltage VDD to <NUM> V, the PMOS transistor <NUM> changes from an off state to an on state, the NMOS transistor <NUM> changes from an on state to an off state, and the voltage at a connection point N3 changes from <NUM> V to the power supply voltage VDD. Therefore, the high-level detection signal V_OUT is output from the buffer <NUM>.

Thereafter, when the voltage at the connection point N1 continues to increase, the voltage applied between the anode and the cathode of the photodiode <NUM> becomes smaller than the breakdown voltage, whereby the avalanche current stops and the voltage at the connection point N1 decreases. Then, when the voltage at the connection point N1 becomes smaller than the on-voltage of an NMOS transistor <NUM>, the NMOS transistor <NUM> is brought into an off state, and the output of the detection signal V_OUT from the buffer <NUM> is stopped (low level).

As described above, the readout circuit <NUM> outputs the detection signal V_OUT at high level during a period from the timing at which the photon is incident on the photodiode <NUM> to generate the avalanche current and the NMOS transistor <NUM> is brought into the on state, to the timing at which the avalanche current stops and the NMOS transistor <NUM> is brought into the off state. The output detection signal V_OUT is input to the output circuit <NUM>.

As described above, for the photodiode <NUM> of each SPAD pixel <NUM>, a color filter selectively transmitting light of a specific wavelength is arranged. <FIG> is a diagram illustrating a layout example of color filters according to the first embodiment.

As illustrated in <FIG>, a color filter array <NUM> has, for example, a configuration in which patterns (hereinafter, referred to as unit patterns) <NUM> serving as a repeating unit in color filter arrangement is arranged into a two-dimensional lattice.

Each of the unit patterns <NUM> includes, for example, a configuration of a so-called Bayer array including a total of four color filters of a color filter 115R that selectively transmits light having a red (R) wavelength component, two color filters <NUM> that selectively transmit light having a green (G) wavelength component, and a color filter 115B that selectively transmits light having a blue (B) wavelength component.

Note that in the present disclosure, the color filter array <NUM> is not limited to the Bayer array. For example, the unit pattern may employ various color filter arrays, such as X-Trans (registered trademark) color filter array with <NUM> × <NUM> pixels, a Quad Bayer array with <NUM> × <NUM> pixels, and a white RGB color filter array with <NUM> × <NUM> pixels including a color filter (hereinafter, also referred to as clear or white) having a light transmission property for a wide range of visible light in addition to RGB primary color filters.

<FIG> is a diagram illustrating an example of a stacked structure of the image sensor according to the first embodiment. As illustrated in <FIG>, the image sensor <NUM> has a structure in which a light-receiving chip <NUM> and a circuit chip <NUM> are vertically stacked. The light-receiving chip <NUM> is, for example, a semiconductor chip including the SPAD array unit <NUM> in which the photodiodes <NUM> are arranged, and the circuit chip <NUM> is, for example, a semiconductor chip on which the readout circuits <NUM> illustrated in <FIG> are arranged. Note that on the circuit chip <NUM>, peripheral circuits, such as the timing control circuit <NUM>, the drive circuit <NUM>, and the output circuit <NUM>, may be arranged.

For bonding the light-receiving chip <NUM> and the circuit chip <NUM>, for example, so-called direct bonding is available in which flattened bonding surfaces of the light-receiving chip <NUM> and the circuit chip <NUM> are bonded to each other by using an attraction force between atoms. However, the present invention is not limited thereto, and for example, so-called Cu-Cu bonding in which copper (Cu) electrode pads formed on the bonding surfaces are bonded to each other, bump bonding, or the like can be also employed.

Furthermore, the light-receiving chip <NUM> and the circuit chip <NUM> are electrically connected via a connection portion such as a through-silicon via (TSV) penetrating the semiconductor substrate. For the connection using the TSV, for example, a so-called twin TSV that uses two TSVs, that is, a TSV provided in the light-receiving chip <NUM> and a TSV provided between the light-receiving chip <NUM> and the circuit chip <NUM> to connect outer surfaces of the chips, a so-called shared TSV that uses a TSV penetrating from the light-receiving chip <NUM> to the circuit chip <NUM> to connect the chips, or the like can be adopted.

Note that when the Cu-Cu bonding or bump bonding is used for bonding the light-receiving chip <NUM> and the circuit chip <NUM>, the chips are electrically connected via a Cu-Cu bonding portion or a bump bonding portion.

<FIG> is a vertical cross-sectional view illustrating an example of a cross-sectional structure as viewed from a plane perpendicular to a light incident surface of the SPAD pixel according to the first embodiment. <FIG> is a horizontal cross-sectional view illustrating an example of a cross-sectional structure taken along the A-A plane of <FIG>. Note that <FIG> focuses on a cross-sectional structure of the photodiode <NUM>.

As illustrated in <FIG>, the photodiode <NUM> of the SPAD pixel <NUM> is provided, for example, on a semiconductor substrate <NUM> constituting the light-receiving chip <NUM>. The semiconductor substrate <NUM> is divided into a plurality of element regions by, for example, element isolation portions <NUM> formed into a grid shape as viewed from the light incident surface (e.g., see <FIG>). The photodiode <NUM> is provided in each element region defined by the element isolation portions <NUM>. Note that the element isolation portions <NUM> may each include an anode electrode <NUM> and an insulating film <NUM> in a first trench, which are described later.

Each photodiode <NUM> includes a photoelectric conversion region <NUM>, a P-type semiconductor region <NUM>, an N-type semiconductor region <NUM>, a P+type semiconductor region <NUM>, an N+type semiconductor region <NUM>, a cathode contact <NUM>, and an anode contact <NUM>.

The photoelectric conversion region <NUM> is, for example, an N-type well region or a region containing donors with low concentration, and photoelectrically converts incident light to generate electron-hole pairs (hereinafter, referred to as charge).

The P-type semiconductor region <NUM> is, for example, a region containing P-type acceptors, and is provided in a region surrounding the photoelectric conversion region <NUM> as illustrated in <FIG> and <FIG>. When the reverse bias voltage V_SPAD is applied to the anode contact <NUM>, which is described later, the P-type semiconductor region <NUM> forms an electric field for guiding the charge generated in the photoelectric conversion region <NUM> to the N-type semiconductor region <NUM>.

The N-type semiconductor region <NUM> is, for example, a region containing donors with higher concentration than the photoelectric conversion region <NUM>. As illustrated in <FIG> and <FIG>, the N-type semiconductor region <NUM> is arranged in a center portion of the photoelectric conversion region <NUM>, takes in charges generated in the photoelectric conversion region <NUM>, and guides the charges to the P+type semiconductor region <NUM>. Note that the N-type semiconductor region <NUM> is not an essential configuration, and may be omitted.

The P+type semiconductor region <NUM> is, for example, a region containing acceptors with higher concentration than the P-type semiconductor region <NUM>, and partially makes contact with the P-type semiconductor region <NUM>. In addition, the N+type semiconductor region <NUM> is, for example, a region containing donors with higher concentration than the N-type semiconductor region <NUM>, and makes contact with the P+type semiconductor region <NUM>.

The P+type semiconductor region <NUM> and the N+type semiconductor region <NUM> form a PN junction, and function as an amplification region that accelerates the charges flowing in to generate the avalanche current.

The cathode contact <NUM> is, for example, a region containing donors with higher concentration than the N+type semiconductor region <NUM>, and is provided in a region making contact with the N+type semiconductor region <NUM>.

The anode contact <NUM> is, for example, a region containing acceptors with higher concentration than the P+type semiconductor region <NUM>. The anode contact <NUM> is provided in a region making contact with an outer periphery of the P-type semiconductor region <NUM>. The anode contact <NUM> may have a width of, for example, approximately <NUM> (nanometers). Thus, the contact of the anode contact <NUM> with the entire outer periphery of the P-type semiconductor region <NUM> makes it possible to form a uniform electric field in the photoelectric conversion region <NUM>.

Furthermore, as illustrated in <FIG> and <FIG>, the anode contact <NUM> is provided on bottom surfaces of trenches (hereinafter referred to as the first trenches) provided in a grid shape along the element isolation portions <NUM>, on a surface side (lower side in the drawing) of the semiconductor substrate <NUM>. Due to such a structure, a position where the anode contact <NUM> is formed is shifted in a height direction relative to a position where the cathode contact <NUM> and the N+type semiconductor region <NUM> are formed, as described later.

The surface side (lower side in the drawing) of the semiconductor substrate <NUM> is covered with the insulating film <NUM>. The insulating film <NUM> in the first trench may have a film thickness (thickness in a substrate width direction) of, for example, approximately <NUM>, depending on voltage value of the reverse bias voltage V_SPAD applied between the anode and the cathode.

The insulating film <NUM> is provided with openings configured to expose the cathode contact <NUM> and the anode contact <NUM>, in the surface of the semiconductor substrate <NUM>, and a cathode electrode <NUM> making contact with the cathode contact <NUM> and the anode electrode <NUM> making contact with the anode contact <NUM> are provided in the respective openings.

The element isolation portions <NUM> defining each photodiode <NUM> are provided in trenches (hereinafter referred to as second trenches) penetrating the semiconductor substrate <NUM> from the surface to the back surface. The second trenches are connected to the first trenches on the surface side of the semiconductor substrate <NUM>. Each of the second trenches have an inner diameter that is smaller than an inner diameter of the first trench and has a stepped portion that is formed due to a difference between the inner diameters, and the anode contact <NUM> is formed at the stepped portion.

Each element isolation portion <NUM> includes an insulating film <NUM> configured to cover inner side surfaces of the second trench and a light-shielding film <NUM> configured to fill the inside of the second trench. The insulating film <NUM> may have a film thickness (thickness in the substrate width direction) of, for example, approximately <NUM> to <NUM>, depending on voltage value of the reverse bias voltage V_SPAD applied between the anode and the cathode. Furthermore, the light-shielding film <NUM> may have a film thickness (thickness in the substrate width direction) of, for example, approximately <NUM>, depending on a material or the like used for the light-shielding film <NUM>.

Here, use of a conductive material having a light-shielding property for the light-shielding film <NUM> and the anode electrode <NUM> makes it possible to form the light-shielding film <NUM> and the anode electrode <NUM> in the same process. Further use of the same conductive material as that of the light-shielding film <NUM> and the anode electrode <NUM>, for the cathode electrode <NUM> makes it possible to form the light-shielding film <NUM>, the anode electrode <NUM>, and the cathode electrode <NUM> in the same process.

For such a conductive material having a light-shielding property, for example, tungsten (W) and the like can be used. However, the conductive material is not limited to tungsten (W) and may be variously changed as long as the conductive material having a property of reflecting or absorbing visible light or light necessary for each element, such as aluminum (Al), an aluminum alloy, or copper (Cu).

However, the light-shielding film <NUM> in the second trench is not limited to the conductive material, and can employ, for example, a high refractive index material having a refractive index higher than that of the semiconductor substrate <NUM>, a low refractive index material having a refractive index lower than that of the semiconductor substrate <NUM>, or the like.

Furthermore, the light-shielding property is not required for the material used for the cathode electrode <NUM>, and thus, a conductive material such as copper (Cu) may be used instead of the conductive material having a light-shielding property.

Note that in the present embodiment, the element isolation portion <NUM> of so-called front full trench isolation (FFTI) type in which the second trenches penetrate the semiconductor substrate <NUM> from the surface side is exemplified, but is not limited thereto, and the element isolation portion <NUM> of full trench isolation (FTI) type in which the second trenches penetrate the semiconductor substrate <NUM> from the back surface side and/or the surface side, or the element isolation portion of deep trench isolation (DTI) type or reverse deep trench isolation (RDTI) type in which the second trenches are formed from the surface or the back surface to the middle of the semiconductor substrate <NUM> may be employed.

In a case where the FTI type in which the second trenches penetrate the semiconductor substrate <NUM> from the back surface side is used, the material of the light-shielding film <NUM> may be embedded in the second trench from the back surface side of the semiconductor substrate <NUM>.

The upper portions of the cathode electrode <NUM> and the anode electrode <NUM> protrude from a surface (lower side in the drawing) of the insulating film <NUM>. For example, a wiring layer <NUM> is provided on the surface (lower side in the drawing) of the insulating film <NUM>.

The wiring layer <NUM> includes an interlayer dielectric <NUM> and wiring <NUM> provided in the interlayer dielectric <NUM>. The wiring <NUM> makes contact with, for example, the cathode electrode <NUM> protruding from the surface (lower side in the drawing) of the insulating film <NUM>. Note that although not illustrated in <FIG>, wiring making contact with the anode electrode <NUM> is also provided in the wiring layer <NUM>.

For example, a connection pad <NUM> made of copper (Cu) is exposed on a surface (lower side in the drawing) of the wiring layer <NUM>. The connection pad <NUM> may be part of the wiring <NUM>. In this configuration, the wiring <NUM> is also made of copper (Cu).

On the surface of the wiring layer <NUM>, a wiring layer <NUM> in the circuit chip <NUM> is bonded. The wiring layer <NUM> includes an interlayer dielectric <NUM> and wiring <NUM> provided in the interlayer dielectric <NUM>. The wiring <NUM> is electrically connected to circuit elements <NUM> such as the readout circuit <NUM> formed in a semiconductor substrate <NUM>. Therefore, the cathode electrode <NUM> on the semiconductor substrate <NUM> is connected to the readout circuit <NUM> illustrated in <FIG> via the wiring <NUM>, the connection pads <NUM> and <NUM>, and the wiring <NUM>.

Furthermore, for example, the connection pad <NUM> made of copper (Cu) is exposed on a surface (upper side in the drawing) of the wiring layer <NUM>. Bonding (Cu-Cu bonding) of the connection pad <NUM> to the connection pad <NUM> exposed on the surface of the wiring layer <NUM> of the light-receiving chip <NUM> electrically and mechanically connects the light-receiving chip <NUM> and the circuit chip <NUM>.

The connection pad <NUM> may be part of the wiring <NUM>. In this configuration, the wiring <NUM> is also made of copper (Cu).

The back surface (upper side in the drawing) of the semiconductor substrate <NUM> is provided with a pinning layer <NUM> and a planarization film <NUM>. Furthermore, on the planarization film <NUM>, a color filter <NUM> and an on-chip lens <NUM> are provided for each SPAD pixel <NUM>.

The pinning layer <NUM> is, for example, a fixed charge film formed of a hafnium oxide (HfO<NUM>) film or an aluminum oxide (Al<NUM>O<NUM>) film containing the acceptors with a predetermined concentration. The planarization film <NUM> is, for example, an insulating film made of an insulating material such as a silicon oxide (SiO<NUM>) or silicon nitride (SiN), and is a film for planarizing a surface on which the color filter <NUM> and on-chip lens <NUM> in an upper layer are formed.

In the structure as described above, when the reverse bias voltage V_SPAD equal to or larger than the breakdown voltage is applied between the cathode contact <NUM> and the anode contact <NUM>, an electric field for guiding the charge generated in the photoelectric conversion region <NUM> to the N-type semiconductor region <NUM> is formed due to a potential difference between the P-type semiconductor region <NUM> and the N+type semiconductor region <NUM>. In addition, in the PN junction region between the P+type semiconductor region <NUM> and the N+type semiconductor region <NUM>, a strong electric field that accelerates entering charge and generates the avalanche current is generated. This configuration makes it possible for the photodiode <NUM> to operate as the avalanche photodiode.

Next, a positional relationship between the anode contact <NUM> and the cathode contact <NUM> and/or the N+type semiconductor region <NUM> in the present embodiment will be described.

As described above, in the present embodiment, the anode contact <NUM> is arranged at the bottom of the first trench formed on the surface side of the semiconductor substrate <NUM>. Thus, in the present embodiment, the anode contact <NUM> is arranged at a position deeper than that of the cathode contact <NUM> and the N+type semiconductor region <NUM>, relative to the surface (lower side in the drawing) of the semiconductor substrate <NUM>. In other words, in the present embodiment, based on the surface (lower side in the drawing) of the semiconductor substrate <NUM>, the position where the anode contact <NUM> is formed is shifted in the height direction relative to the position where the cathode contact <NUM> and the N+type semiconductor region <NUM> are formed.

In other words, and in accordance with the claimed invention, the height of the anode contact <NUM> from the surface of the semiconductor substrate <NUM> is different from the height of the N+type semiconductor region <NUM> from the surface of the semiconductor substrate <NUM>. Specifically, the height of the anode contact <NUM> from the surface of the semiconductor substrate <NUM> is higher than the height of the N+type semiconductor region <NUM> from the surface of the semiconductor substrate <NUM>.

As described above, the position where the anode contact <NUM> is formed is shifted relative to the position where the cathode contact <NUM> and the N+type semiconductor region <NUM> are formed, in the height direction, and the shift makes it possible to increase the distance from the anode contact <NUM> to the cathode contact <NUM> and/or the N+type semiconductor region <NUM> without increasing the size of the SPAD pixel <NUM> in a lateral direction (direction parallel to the incident surface).

This makes it possible to suppress the occurrence of the tunneling effect without increasing the pixel size, and thus, the avalanche amplification is stably generated while suppressing a decrease in resolution.

Next, a manufacturing method for the image sensor <NUM> according to the present embodiment will be described in detail with reference to the drawings. Note that, the following description focuses on a manufacturing method for the light-receiving chip <NUM>.

<FIG> are each a process cross-sectional view illustrating the manufacturing method for the solid-state imaging device according to the first embodiment.

In the present manufacturing method, firstly, ion implantation of donors and acceptors into predetermined regions of the semiconductor substrate <NUM> including donors having a low concentration as a whole is appropriately carried out, and the N-type semiconductor region <NUM>, the P+type semiconductor region <NUM>, the N+type semiconductor region <NUM>, and part (a P-type semiconductor region 104a) of the P-type semiconductor region <NUM> that defines the photoelectric conversion region <NUM> are formed, as illustrated in <FIG>. Note that the ion implantation may be carried out, for example, from the surface (upper side in the drawing) of the semiconductor substrate <NUM>. Furthermore, after the ion implantation, annealing for recovery of damage caused during the ion implantation and improvement of the profile of the implanted dopant may be performed once or a plurality of times.

Next, as illustrated in <FIG>, a mask M1 having openings A1 formed in a grid shape is formed on the surface of the semiconductor substrate <NUM>, the semiconductor substrate <NUM> is carved by anisotropic dry etching such as reactive ion etching (RIE) from above the mask M1, and thereby first trenches T1 in a grid shape are formed along the boundary portions of the adjacent SPAD pixels <NUM>. Note that each of the first trenches T1 may have a depth so that the bottom surface of the trench is positioned at least at a level deeper than the lower surface of the P+type semiconductor region <NUM> and reaches the P-type semiconductor region 104a.

Note that it is preferable to keep distance between the anode contact <NUM> and the N+type semiconductor region <NUM> and the cathode contact <NUM>, as the depth of the first trench T1 from the surface of the semiconductor substrate <NUM> increases. However, excessive depth of the first trench T1 may reduce the process accuracy and deteriorate the yield. Therefore, the depth of the first trench T1 is preferably set to have a depth within a range in which the process accuracy equal to or more than necessary process accuracy is ensured.

Next, as illustrated in <FIG>, after the mask M1 is removed, an insulating film 109A covering the surface of the semiconductor substrate <NUM> and inner surfaces of the first trenches T1 is formed by using a film forming technique such as sputtering or a chemical vapor deposition (CVD). Note that the insulating film 109A can employ an insulating material such as silicon oxide (SiO<NUM>), silicon nitride (SiN), silicon carbide (SiC), or aluminum oxide (Al<NUM>O<NUM>). Furthermore, the insulating film 109A may have a single layer structure or a layered structure. As described above, the reverse bias voltage V_SPAD having a high voltage is applied to the anode electrode <NUM>, and for the material of the insulating film 109A, an insulating material having high pressure resistance such as silicon oxide (SiO<NUM>) is preferably employed, in view of high pressure resistance required for the insulating film 109A.

Next, as illustrated in <FIG>, the bottom surface of a trench T11 formed by a surface of the insulating film 109A in the first trench T1 is carved in a substrate thickness direction to form a second trench T2 reaching the vicinity of the back surface of the semiconductor substrate <NUM> from the surface side thereof. Note that for the formation of the second trenches T2, for example, anisotropic dry etching that can provide a sufficiently high selectivity with respect to the semiconductor substrate <NUM> can be used. This makes it possible to etch the region of grid of the semiconductor substrate <NUM> where the element isolation portion <NUM> is formed while using as the mask the insulating film 109A formed on the inner side surface of the first trench T1 and the upper surface of the semiconductor substrate <NUM>.

Next, as illustrated in <FIG>, the film thickness of the insulating film 109A in the first trench T1 is reduced by isotropic etching such as wet etching to expose an outer peripheral portion of the P-type semiconductor region 104a from the bottom of the first trench T1. At that time, the film thickness of the insulating film 109A on the surface of the semiconductor substrate <NUM> may be reduced.

Next, as illustrated in <FIG>, a mask M2 having an opening A2 is formed on the insulating film 109A, above the N+type semiconductor region <NUM>, and the insulating film 109A is etched from above the mask M2 by anisotropic dry etching such as RIE to form an opening A3 partially exposing the upper surface of the semiconductor substrate <NUM>.

Next, as illustrated in <FIG>, after the mask M2 is removed, an insulating film 109B covering the insulating film 109A, the inner side surface and bottom surface of the opening A3, and the inner surface of each of the first trenches T1 and second trenches T2 is isotropically formed by using the film forming technique such as CVD. In the following description, the insulating film 109A and the insulating film 109B are collectively referred to as the insulating film <NUM>. In addition, a trench formed of the surface of the insulating film 109B in the opening A3 is referred to as a trench T4, and a trench formed of the surface of the insulating film 109B in a trench T3 is referred to as a trench T5.

Note that the insulating film 109B may be omitted. The omission of the insulating film 109B makes it possible to bring the anode electrode <NUM> into contact with the P-type semiconductor region 104a also in the second trench T2, in addition to the anode contact <NUM>, and a low resistance contact can be achieved. The omission of the insulating film 109B will be described later in detail in a first modification.

Meanwhile, forming of the insulating film 109B makes it possible to reduce damage to the semiconductor substrate <NUM> caused by the ion implantation in forming the contact which will be described later.

Next, as illustrated in <FIG>, a mask M3 that covers the trench T4 located above the N+type semiconductor region <NUM> is formed, and ion implantation of a high concentration of acceptors is performed from above the mask M3 and the insulating film <NUM>. At this time, the mask M3 and the insulating film <NUM> function as the mask, and thereby the anode contact <NUM> containing a high concentration of acceptors is formed at the bottom of the trench T5 that is a region where the insulating film <NUM> has a thin film thickness, in other words, at an upper outer periphery of the P-type semiconductor region <NUM> (e.g., see, <FIG>).

Next, as illustrated in <FIG>, after the mask M3 is removed, for example, a mask M4 that covers the trenches T5 formed in the grid shape is formed, and ion implantation of a high concentration of donors is performed from above the mask M4 and the insulating film <NUM>. At that time, the mask M4 and the insulating film <NUM> function as the mask, and thereby the cathode contact <NUM> containing a high concentration of donors is formed at the bottom of the trench T4 that is a region where the insulating film <NUM> has a thin film thickness, in other words, at part of the semiconductor substrate <NUM> located above the N+type semiconductor region <NUM>.

Note that formation of the anode contact <NUM> and the cathode contact <NUM> is not limited to the ion implantation, and various methods such as solid-phase diffusion and plasma doping can be used.

Next, as illustrated in <FIG>, after the mask M4 is removed, for example, the surface of the insulating film <NUM> is entirely etched back, and thereby the insulating film <NUM> at the bottom of the trench T4 is removed to expose the cathode contact <NUM> and the insulating film <NUM> at the bottom of each of the trenches T5 is removed to expose the anode contact <NUM>.

At that time, a mask having a predetermined opening pattern may be formed by using photolithography or the like to limit a region where the insulating film <NUM> is removed to expose the anode contact <NUM>. The etch back will be described later in detail in a second modification.

When the insulating film <NUM> is entirely etched back, a contact area between the anode contact <NUM> and the anode electrode <NUM> is ensured, and thereby a low-resistance contact can be formed. Furthermore, it becomes possible to bring the anode contact <NUM> and the anode electrode <NUM> into contact with each other so as to surround the outer periphery of the P-type semiconductor region 104a, and a uniform electric field is thereby formed in the photoelectric conversion region <NUM>.

Meanwhile, when the region from which the insulating film <NUM> is removed is limited, a portion where the anode contact <NUM> and the anode electrode <NUM> make contact with each other can be controlled, and thus, control or the like of a distribution of the electric field formed in the photoelectric conversion region <NUM> is made possible.

Note that in the present embodiment, the insulating film <NUM> remaining in the second trench T2 after the film thickness of the insulating film <NUM> is reduced is used as the insulating film <NUM> of the element isolation portion <NUM>.

Next, for example, a titanium (Ti)/titanium nitride (TiN) film is formed on the exposed surfaces of the cathode contact <NUM> and the anode contact <NUM>, followed by annealing at approximately <NUM> to <NUM> in this state. Accordingly, silicon (Si) and titanium (Ti) react with each other on the exposed surfaces of the cathode contact <NUM> and the anode contact <NUM> to form a titanium silicide layer.

As described above, the silicidation of the surfaces (contact surfaces) of the cathode contact <NUM> and the anode contact <NUM> makes it possible to have an ohmic contact in contact between the cathode contact <NUM> and the cathode electrode <NUM> and contact between the anode contact <NUM> and the anode electrode <NUM>, and thereby resistance in the contact therebetween is reduced. This makes it possible to reduce the contact area between the anode contact <NUM> and the anode electrode <NUM>, whereby the pixel size can be reduced and the resolution can be increased.

Note that instead of the Ti/TiN film, a Co/TiN film may be used. Even in this case, a cobalt silicide layer is formed on the surface (contact surface) of each of the cathode contact <NUM> and the anode contact <NUM>, and thereby the cathode contact <NUM> and the cathode electrode <NUM>, and the anode contact <NUM> and the anode electrode <NUM> are brought into an ohmic contact with each other.

In addition, instead of the titanium silicide and the cobalt silicide, various silicides such as nickel silicide can be used to bring the cathode contact <NUM> and the cathode electrode <NUM>, and the anode contact <NUM> and the anode electrode <NUM> into an ohmic contact.

Next, as illustrated in <FIG>, for example, a lift-off process or the like is used to form the light-shielding film <NUM> in each first trench T1, the cathode electrode <NUM> that makes contact with the cathode contact <NUM> in the trench T4, and further the anode electrode <NUM> that makes contact with the anode contact <NUM> in each second trench T2.

As described above, for the materials of the light-shielding film <NUM>, cathode electrode <NUM>, and anode electrode <NUM>, various conductive materials having a property of reflecting or absorbing visible light or light necessary for each element, such as aluminum (Al), an aluminum alloy, or copper (Cu) can be used, in addition to tungsten (W).

When the light-shielding film <NUM>, the cathode electrode <NUM>, and the anode electrode <NUM> are formed of the same material, the light-shielding film <NUM>, the cathode electrode <NUM>, and the anode electrode <NUM> can be collectively formed. Meanwhile, when different materials are used for the light-shielding film <NUM>, the cathode electrode <NUM>, and the anode electrode <NUM>, the light-shielding film <NUM> is formed first, and then the cathode electrode <NUM> and the anode electrode <NUM> are formed by using the lift-off process or the like.

Next, over the insulating film <NUM> in which the cathode electrode <NUM> and the anode electrodes <NUM> are formed, the wiring layer <NUM> including the wiring <NUM> connected to the cathode electrode <NUM>, wiring <NUM> connected to the anode electrode <NUM>, and the interlayer dielectric <NUM> is formed. Furthermore, the connection pads <NUM> and <NUM> made of copper (Cu) and exposed on the surface of the interlayer dielectric <NUM> are formed.

Next, as illustrated in <FIG>, the semiconductor substrate <NUM> is thinned from the back surface, and whereby each of the second trenches T2 is caused to penetrate so that the light-shielding film <NUM> in the second trench T2 reaches the back surface of the semiconductor substrate <NUM>. For thinning the semiconductor substrate <NUM>, for example, chemical mechanical polishing (CMP) or the like may be used.

Next, ion implantation of acceptors into the entire back surface of the semiconductor substrate <NUM> is performed. Therefore, the P-type semiconductor region <NUM> surrounding the photoelectric conversion region <NUM> is completed, as illustrated in <FIG>.

Then, the pinning layer <NUM>, the planarization film <NUM>, the color filter <NUM>, and the on-chip lens <NUM> are sequentially formed on the back surface of the semiconductor substrate <NUM>, and thus, the light-receiving chip <NUM> in the image sensor <NUM> is formed. Then, the circuit chip <NUM> which is separately prepared and the light-receiving chip <NUM> are bonded to each other, and the image sensor <NUM> having the cross-sectional structure as illustrated in <FIG> is formed.

As described above, in the present embodiment, the position of the anode contact <NUM> and the position of the cathode contact <NUM> and/or the N+type semiconductor region <NUM> are shifted in the height direction. Thus, according to the present embodiment, it is possible to increase the distance from the anode contact <NUM> to the cathode contact <NUM> and/or the N+type semiconductor region <NUM> without increasing the size of the SPAD pixel <NUM> in a lateral direction (direction parallel to the incident surface). Therefore, it is possible to suppress the occurrence of the tunneling effect without increasing the pixel size, and thus, the avalanche amplification is stably generated while suppressing a decrease in resolution.

Next, specific examples of modifications of the SPAD pixel <NUM> according to the first embodiment will be described.

<FIG> is a vertical cross-sectional view illustrating an example of a cross-sectional structure as viewed from a plane perpendicular to the light incident surface of a SPAD pixel according to a first modification.

As illustrated in <FIG>, the SPAD pixel 20a according to the first modification has a structure similar to the cross-sectional structure described in the first embodiment with reference to <FIG> and the like, and in the structure, the insulating film <NUM> (corresponding to the insulating films 109B) in the second trench (corresponding to the second trench T2) is omitted.

The omission of the insulating film <NUM> in the element isolation portion <NUM>, as described above, makes it possible to bring the anode electrode <NUM> into contact with the P-type semiconductor region 104a also in the second trench, in addition to the anode contact <NUM>, and a low resistance contact can be achieved, as described in the first embodiment.

<FIG> is a horizontal cross-sectional view illustrating an example of a cross-sectional structure as viewed from a plane parallel to the light incident surface of a SPAD pixel according to a second modification. Note that <FIG> illustrates a plane corresponding to that of <FIG>.

As illustrated in <FIG>, the SPAD pixel 20b according to the second modification has a structure similar to the cross-sectional structure described in the first embodiment with reference to <FIG> and the like, and in the structure, regions where anode contacts 108A are formed are limited to make partial contact with the P-type semiconductor region <NUM> on the outer periphery of the P-type semiconductor region <NUM>. Specifically, the regions where the anode contacts 108A are formed are limited to the four corners of a rectangular region divided by the element isolation portion <NUM>.

As described above, limiting the regions where the anode contacts 108A are formed makes it possible to control the portion where the anode contacts <NUM> and the anode electrodes <NUM> make contact with each other, as described in the first embodiment, and thus, control or the like of a distribution of the electric field formed in the photoelectric conversion region <NUM> is made possible.

<FIG> is a vertical cross-sectional view illustrating an example of a cross-sectional structure as viewed from a plane perpendicular to the light incident surface of a SPAD pixel according to a third modification.

As illustrated in <FIG>, the SPAD pixel 20c according to the third modification has a structure similar to the cross-sectional structure described in the first embodiment with reference to <FIG> and the like, and in the structure, a P+type semiconductor region 105A and an N+type semiconductor region 106A expand until making contact with the insulating film <NUM> formed in the first trench.

As described above, expansion of the P+type semiconductor region 105A and the N+type semiconductor region 106A to the entire region surrounded by the first trenches makes it possible to expand a region where the avalanche amplification is generated, and thus, improving the quantum efficiency.

In addition, expansion of the P+type semiconductor region 105A to the entire region surrounded by the first trenches makes it possible to prevent charges generated near the anode contacts <NUM> from directly flowing into the N+type semiconductor region 106A or the cathode contact <NUM>, and thus, improving the quantum efficiency by reducing charges that do not contribute to the avalanche amplification.

<FIG> is a vertical cross-sectional view illustrating an example of a cross-sectional structure as viewed from a plane perpendicular to the light incident surface of a SPAD pixel according to a fourth modification.

As illustrated in <FIG>, the SPAD pixel 20d according to the fourth modification has a structure similar to the cross-sectional structure described in the first embodiment with reference to <FIG> and the like, and in the structure, the diameter of the first trench is increased, and an insulating film 109D in the first trench is thereby expanded to the extent that the insulating film 109D makes contact with at least the P+type semiconductor region 105A.

As described above, the contact of the insulating film 109D with the P+type semiconductor region 105A by the increased diameter of the first trench makes it possible to prevent the charges generated in the vicinity of the anode contacts <NUM> from directly flowing into the N+type semiconductor region 106A or the cathode contact <NUM>, and thus, improving the quantum efficiency by reducing charges that do not contribute to the avalanche amplification.

In a fifth modification, some examples of connection wiring for the anode in the embodiment and the modification thereof will be described. Note that in the following, for the sake of simplicity, a description will be made of examples based on the first embodiment.

<FIG> is a diagram illustrating an example of connection wiring for anodes according to the first embodiment. As illustrated in <FIG>, according to the first embodiment, wirings <NUM> for applying the reverse bias voltage V_SPAD is connected to the anode electrodes <NUM> of each SPAD pixel <NUM> in a one-to-one manner.

However, for example, as can be seen with reference to <FIG>, the anode electrodes <NUM> are continued between the plurality of SPAD pixels <NUM>. For example, the anode electrodes <NUM> are electrically connected between all the SPAD pixels <NUM> arranged in the SPAD array unit <NUM>.

Therefore, a configuration in which the wirings <NUM> are provided for the anode electrodes <NUM> of the respective SPAD pixels <NUM> in the one-to-one manner is not essential.

The number of the wirings <NUM> to be arranged may be reduced, such as, the wiring <NUM> is provided for every other SPAD pixel <NUM>, as illustrated in <FIG>, or the wiring <NUM> is provided for every three SPAD pixels <NUM>, as illustrated in <FIG>.

Alternatively, as illustrated in an example of <FIG>, the wiring <NUM> may be provided for at least one of SPAD pixels 20Z that are located on the outermost periphery of the SPAD array unit <NUM> so that the wirings <NUM> are not provided for the other SPAD pixels <NUM> and 20Z.

As described above, the reduction of the number of the wirings <NUM> makes it possible to simplify a wiring pattern, and thus, it is possible to achieve simplification of the manufacturing process, reduction in manufacturing cost, and the like.

Note that in the above embodiment and the modifications thereof, examples of the N-type cathode and the P-type anode have been described, but the present invention is not limited to such a combination, and different types of cathode and anode, such as a P-type cathode and an N-type anode, may be employed.

Next, a solid-state imaging device and an electronic device according to a second embodiment will be described in detail with reference to the drawings.

The SPAD pixels <NUM>, 20a, 20b, 20c, and 20d according to the first embodiment and the modifications thereof described above are not limited to the electronic device <NUM> as the imaging device that acquires image data of a color image or the like, and can also be used for, for example, an electronic device as a distance measuring device that measures a distance to an object.

<FIG> is a vertical cross-sectional view illustrating an example of a cross-sectional structure as viewed from a plane perpendicular to a light incident surface of a SPAD pixel according to the second embodiment. As illustrated in <FIG>, a SPAD pixel <NUM> has a structure similar to the cross-sectional structure described in the first embodiment with reference to <FIG> and the like, and in the structure, the color filter <NUM> is omitted.

In this way, even in a case where the SPAD pixel <NUM> is used for the electronic device being the distance measuring device, as in the first embodiment, shift of the position of the anode contact <NUM> relative to the position of the cathode contact <NUM> and the N+type semiconductor region <NUM>, in the height direction makes it possible to increase the distance from the anode contact <NUM> to the cathode contact <NUM> and/or the N+type semiconductor region <NUM> without increasing the size of the SPAD pixel <NUM> in a lateral direction (direction parallel to the incident surface). Therefore, it is possible to suppress the occurrence of the tunneling effect without increasing the pixel size, and thus, the avalanche amplification is stably generated while suppressing a decrease in resolution.

The other configurations, operations, and effects may be similar to those in the above-described embodiments or the modifications thereof, and detailed description thereof will be omitted here.

Next, a solid-state imaging device and an electronic device according to a third embodiment will be described in detail with reference to the drawings.

In the above-described embodiment and the modifications thereof, examples of the element isolation portion <NUM> of FFTI type in which the second trench penetrates the semiconductor substrate <NUM> from the surface side to the back surface side have been described, but as described above, the element isolation portion <NUM> is not limited to the FFTI type.

<FIG> is a vertical cross-sectional view illustrating an example of a cross-sectional structure as viewed from a plane perpendicular to a light incident surface of a SPAD pixel according to the third embodiment. As illustrated in <FIG>, a SPAD pixel <NUM> has a structure similar to the cross-sectional structure described in the first embodiment with reference to <FIG> and the like, and in the structure, an element isolation portion <NUM> of DTI type is used in place of the element isolation portion <NUM> of FFTI type.

The element isolation portion <NUM> of DTI type includes an insulating film <NUM> configured to cover the inner side surface and a bottom surface of the second trench, and a light-shielding film <NUM> configured to fill the inside of the second trench in which the inner surface is covered with the insulating film <NUM>, in the second trench formed in the semiconductor substrate <NUM> from the surface side (lower side in the drawing) to the extent that the second trench does not reach the back surface.

Such an element isolation portion <NUM> can be achieved by, for example, using the second trench formed shallowly or the semiconductor substrate <NUM> large in thickness.

As described above, according to the present embodiment, the element isolation portion <NUM> of DTI type that is formed from the surface side of the semiconductor substrate <NUM> is used. This makes it possible to facilitate the process of thinning the semiconductor substrate <NUM> from the back surface side.

Furthermore, use of the element isolation portion <NUM> of DTI type that is formed from the surface side of the semiconductor substrate <NUM> provides the P-type semiconductor region <NUM> that is not isolated for each SPAD pixel <NUM> on the back surface side of the semiconductor substrate <NUM>. Therefore, a variation in electric field between the SPAD pixels <NUM> caused by a variation in contact resistance between the P-type semiconductor regions <NUM> and the anode contacts <NUM> is suppressed, the electric fields in the respective SPAD pixels <NUM> are equalized, and thus, the yield of the image sensors <NUM> can be improved.

Next, a solid-state imaging device and an electronic device according to a fourth embodiment will be described in detail with reference to the drawings.

<FIG> is a vertical cross-sectional view illustrating an example of a cross-sectional structure as viewed from a plane perpendicular to a light incident surface of a SPAD pixel according to the fourth embodiment. As illustrated in <FIG>, a SPAD pixel <NUM> has, for example, a configuration similar to that of the SPAD pixel <NUM> descried in the third embodiment with reference to <FIG>, and in the configuration, an anode contact <NUM> is provided at the bottom of the second trench.

According to such a structure, the light-shielding film <NUM> electrically continuous from the anode electrode <NUM> is electrically connected to the P-type semiconductor region <NUM> on the back surface side of the semiconductor substrate <NUM> via the anode contact <NUM> at the bottom of the second trench. Therefore, the contact resistance between the P-type semiconductor region <NUM> and the anode contact <NUM> can be further reduced, and the variation in the contact resistance can be suppressed, and thus, the variation in the electric field between the SPAD pixels <NUM> can be further suppressed. Therefore, the electric field between the SPAD pixels <NUM> is further equalized, and thereby, the yield of the image sensors <NUM> can be further improved.

Next, a solid-state imaging device and an electronic device according to a fifth embodiment will be described in detail with reference to the drawings.

In the third and fourth embodiments described above, examples of the element isolation portion <NUM> of DTI type provided in the second trench formed from the surface side of the semiconductor substrate <NUM> have been described. Meanwhile, in the fifth embodiment, an example of an element isolation portion of RDTI type that is provided in the second trench formed from the back surface side of the semiconductor substrate <NUM> is described.

<FIG> is a vertical cross-sectional view illustrating an example of a cross-sectional structure as viewed from a plane perpendicular to a light incident surface of a SPAD pixel according to the fifth embodiment. As illustrated in <FIG>, a SPAD pixel <NUM> has a structure similar to, for example, the cross-sectional structure described in the third embodiment with reference to <FIG>, and in the structure, an element isolation portion <NUM> of RDTI type is used in place of the element isolation portion <NUM> of FFTI type and an anode contact <NUM> is used in place of the anode contact <NUM>.

The element isolation portion <NUM> of RDTI type includes an insulating film <NUM> configured to cover the inner side surface and bottom surface of the second trench, and a light-shielding film <NUM> configured to fill the inside of the second trench in which the inner surface is covered with the insulating film <NUM>, in the second trench formed in the semiconductor substrate <NUM> from the back surface side (upper side in the drawing) to the extent that the second trench does not reach the surface.

Such a structure makes it possible to isolate the anode electrode <NUM> and the element isolation portion <NUM> from each other, forming the anode contact <NUM> on the entire back surface of the anode electrode <NUM>. Therefore, the contact resistance between the P-type semiconductor region <NUM> and the anode contact <NUM> can be further reduced, and thus, the SPAD pixel <NUM> with better characteristics can be achieved.

Furthermore, the second trench can be formed from the back surface side of the semiconductor substrate <NUM>, and thus, for example, the process of forming the element isolation portion <NUM> is facilitated as compared with forming the element isolation portion <NUM> of DTI type according to the third or fourth embodiment.

Next, a solid-state imaging device and an electronic device according to a sixth embodiment will be described in detail with reference to the drawings.

In the above embodiments and the modifications thereof, for example, examples of one photodiode <NUM> that is provided for one color filter 115R, <NUM>, or 115B constituting the color filter array <NUM> being the Bayer array have been described. However, in a case where photon counting is performed using the avalanche photodiode, even if a plurality of photons is incident on one photodiode <NUM> in an avalanche amplification, the incidence of the photons is counted as one time. Therefore, in order to more accurately count the number of incident photons, it is preferable to reduce the area of one photodiode. Furthermore, in a case where the illuminance is high, the dynamic range of each SPAD pixel <NUM> can be expanded by reducing the area of one photodiode.

Therefore, in the sixth embodiment, as illustrated in the example of <FIG>, each of SPAD pixels 20R, <NUM>, and 20B (hereinafter, when the SPAD pixels 20R, <NUM>, and 20B are not distinguished from each other, the SPAD pixels are denoted by <NUM>) is divided into a plurality of (in this example, four pixels, i.e., <NUM> × <NUM> pixels) SPAD pixels 620R, <NUM>, or 620B (hereinafter, when the SPAD pixels 620R, <NUM>, and 620B are not distinguished from each other, the SPAD pixels are denoted by <NUM>). Alternatively, a plurality of SPAD pixels <NUM>, <NUM>, or 620B shares one color filter 115R, <NUM>, or 115B.

As described above, dividing one SPAD pixel <NUM> into a plurality of SPAD pixels <NUM> makes it possible to reduce the area per one SPAD pixel <NUM>, and thus, the number of incident photons can be counted more accurately. Furthermore, the reduction of the area of one photodiode also makes it possible to expand the dynamic range of each SPAD pixel <NUM>.

Note that as illustrated in <FIG>, the element isolation portions <NUM> may not be provided between the SPAD pixels <NUM> obtained by dividing one SPAD pixel <NUM>. In that configuration, instead of the element isolation portions <NUM>, the P-type semiconductor region <NUM> may be arranged between the SPAD pixels <NUM>. This makes it possible to reduce the pixel pitch as compared with providing the element isolation portions <NUM>, further reducing the size of the image sensor <NUM>.

Next, a solid-state imaging device and an electronic device according to a seventh embodiment will be described in detail with reference to the drawings.

In the above sixth embodiment, the example in which the P-type semiconductor region <NUM> is arranged between the plurality of SPAD pixels <NUM> obtained by dividing one SPAD pixel <NUM> has been described, but the present invention is not limited to such a structure.

For example, as illustrated in <FIG>, a trench may be provided in adjacent SPAD pixels <NUM> to provide a structure in which an insulating film <NUM> is embedded in the trench.

Such a structure makes it possible to suppress optical crosstalk between adjacent SPAD pixels <NUM>, enabling more accurate counting of the number of incident photons.

Next, a solid-state imaging device and an electronic device according to an eighth embodiment will be described in detail with reference to the drawings.

The element isolation portions <NUM> and <NUM> in the above embodiments and the modifications thereof are not limited to the semiconductor substrate <NUM> as in the example illustrated in <FIG>, and, for example, may penetrate the color filter <NUM>.

As described above, the structure in which the element isolation portions <NUM> penetrate the color filter <NUM> and protrude above the color filter <NUM> makes it possible to reduce the crosstalk between the adjacent SPAD pixels <NUM>.

The solid-state imaging element described above is applicable to various electronic devices, for example, an imaging device such as a digital still camera or a digital video camera, a mobile phone having an imaging function, or another device having the imaging function.

<FIG> is a block diagram illustrating a configuration example of an imaging device as the electronic device to which the present technology is applied. an imaging device <NUM> illustrated in <FIG> includes an optical system <NUM>, a shutter device <NUM>, a solid-state imaging element <NUM>, a drive circuit <NUM>, a signal processing circuit <NUM>, a monitor <NUM>, and a memory <NUM>, and the imaging device <NUM> is configured to capture a still image and a moving image.

The optical system <NUM> has one or a plurality of lenses, guides light (incident light) from an object to the solid-state imaging element <NUM>, and forms an image on a light-receiving surface of the solid-state imaging element <NUM>.

The shutter device <NUM> is arranged between the optical system <NUM> and the solid-state imaging element <NUM>, and controls a light irradiation period and a light shielding period for the solid-state imaging element <NUM> according to the control of a drive circuit <NUM>.

The solid-state imaging element <NUM> includes a package including the solid-state imaging element described above. The solid-state imaging element <NUM> accumulates signal charge for a certain period, according to light focused on the light-receiving surface via the optical system <NUM> and the shutter device <NUM>. The signal charge accumulated in the solid-state imaging element <NUM> is transferred according to a drive signal (timing signal) supplied from the drive circuit <NUM>.

The drive circuit <NUM> outputs the drive signal controlling a transfer operation of the solid-state imaging element <NUM> and a shutter operation of the shutter device <NUM> to drive the solid-state imaging element <NUM> and the shutter device <NUM>.

The signal processing circuit <NUM> performs various signal processing on the signal charge output from the solid-state imaging element <NUM>. An image (image data) obtained by performing the signal processing by the signal processing circuit <NUM> is supplied to the monitor <NUM> and displayed thereon, or supplied to the memory <NUM> and stored (recorded) therein.

In the imaging device <NUM> configured as described above as well, application of the solid-state imaging device <NUM> in place of the solid-state imaging element <NUM> described above makes it possible to achieve imaging with low noise in all pixels.

The technology according to the present disclosure is applicable to various products. For example, the technology according to the present disclosure may be achieved as a device mounted on any type of mobile object, such as an automobile, electric vehicle, hybrid electric vehicle, motorcycle, bicycle, personal mobility, airplane, drone, ship, robot, construction machine, or agricultural machine (tractor).

<FIG> is a block diagram illustrating an example of a schematic configuration of a vehicle control system <NUM> that is an example of a mobile object control system to which the technology according to the present disclosure is applicable. The vehicle control system <NUM> includes a plurality of electronic control units that is connected via a communication network <NUM>. In the example illustrated in <FIG>, the vehicle control system <NUM> includes a drive system control unit <NUM>, a body system control unit <NUM>, a battery control unit <NUM>, a vehicle external information detection unit <NUM>, a vehicle internal information detection unit <NUM>, and an integrated control unit <NUM>. The communication network <NUM> connecting a plurality of these control units may be, for example, an in-vehicle communication network according to any standard, such as controller area network (CAN), local interconnect network (LIN), local area network (LAN), or FlexRay (registered trademark).

Each of the control units includes a microcomputer configured to perform arithmetic processing according to various programs, a storage unit configured to store programs executed by the microcomputer, parameters used for various calculations, and the like, and a drive circuit configured to drive various devices to be controlled. Each control unit includes a network I/F for communication with another control unit via the communication network <NUM>, and a communication I/F for communication with a device, sensor, or the like inside or outside the vehicle in a wired or wireless manner. <FIG> illustrates, as a functional configuration of the integrated control unit <NUM>, a microcomputer <NUM>, a general-purpose communication I/F <NUM>, a dedicated communication I/F <NUM>, a positioning unit <NUM>, a beacon receiving unit <NUM>, an in-vehicle device I/F <NUM>, an audio/visual output unit <NUM>, an in-vehicle network I/F <NUM>, and a storage unit <NUM>. Likewise, each of the other control units also includes the microcomputer, the communication I/F, the storage unit, and the like.

The drive system control unit <NUM> controls the operation of devices relating to the drive system of the vehicle, according to various programs. For example, the drive system control unit <NUM> functions as a control device for a driving force generation device for generating a driving force of the vehicle, such as an internal combustion engine or a driving motor, a driving force transmission mechanism for transmitting the driving force to wheels, a steering mechanism for adjusting a steering angle of the vehicle, a braking device for generating a braking force of the vehicle, and the like. The drive system control unit <NUM> may have a function as a control device such as an antilock brake system (ABS) or an electronic stability control (ESC).

A vehicle state detection unit <NUM> is connected to the drive system control unit <NUM>. The vehicle state detection unit <NUM> includes, for example, at least one of a gyroscope sensor configured to detect an angular velocity of axial rotational motion of the vehicle body, an acceleration sensor configured to detect acceleration of the vehicle, or a sensor configured to detect an operation amount of an accelerator pedal, an operation amount of a brake pedal, a steering angle of a steering wheel, an engine speed, a wheel rotation speed, or the like. The drive system control unit <NUM> performs arithmetic processing by using a signal input from the vehicle state detection unit <NUM>, and controls an internal combustion engine, a driving motor, an electric power steering device, a brake device, or the like.

The body system control unit <NUM> controls the operations of various devices mounted on the vehicle body, according to various programs. For example, the body system control unit <NUM> functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps, such as a headlight, back-up light, brake light, blinker, or fog light. In this case, a radio wave transmitted from a portable device that substitutes for a key or signals of various switches can be input to the body system control unit <NUM>. The body system control unit <NUM> receives an input of the radio waves or signals to control a door lock device, the power window device, the lamps, and the like of the vehicle.

The battery control unit <NUM> controls a secondary battery <NUM> that is a power supply for the driving motor, according to various programs. For example, information such as battery temperature, battery output voltage, or a remaining capacity of a battery is input to the battery control unit <NUM>, from a battery device including the secondary battery <NUM>. The battery control unit <NUM> performs arithmetic processing by using these signals, and adjusts/controls the temperature of the secondary battery <NUM> or controls a cooling device or the like included in the battery device.

The vehicle external information detection unit <NUM> detects information outside the vehicle on which the vehicle control system <NUM> is mounted. For example, at least one of an imaging unit <NUM> and a vehicle external information detector <NUM> is connected to the vehicle external information detection unit <NUM>. The imaging unit <NUM> includes at least one of a time of flight (ToF) camera, a stereo camera, a monocular camera, an infrared camera, and other cameras. The vehicle external information detector <NUM> includes, for example, at least one of an environment sensor configured to detect current weather and a surrounding information detection sensor configured to detect another vehicle, an obstacle, a pedestrian, or the like around the vehicle on which the vehicle control system <NUM> is mounted.

The environment sensor may include, for example, at least one of a raindrop sensor configured to detect rainy weather, a fog sensor configured to detect fog, a daylight sensor configured to detect a degree of daylight, and a snow sensor configured to detect snowfall. The surrounding information detection sensor may include at least one of an ultrasonic sensor, a radar device, light detection and ranging, laser imaging detection and ranging (LIDAR) device. The imaging unit <NUM> and the vehicle external information detector <NUM> may be provided as independent sensors or devices, or may be provided as a device in which a plurality of sensors or devices is integrated.

Here, <FIG> illustrates an example of installation positions of the imaging units <NUM> and the vehicle external information detectors <NUM>. Imaging units <NUM>, <NUM>, <NUM>, <NUM>, and <NUM> are each provided at, for example, at least one of the front nose, side mirrors, rear bumper, back door, and an upper portion of a windshield on the vehicle interior side of a vehicle <NUM>. The imaging unit <NUM> provided at the front nose and the imaging unit <NUM> provided at the upper portion of the windshield on the vehicle interior side each mainly acquire an image of an area in front of the vehicle <NUM>. The imaging units <NUM> and <NUM> provided at the side mirrors each mainly acquire an image captured from a lateral side of the vehicle <NUM>. The imaging unit <NUM> provided at the rear bumper or the back door mainly acquires an image of an area in back of the vehicle <NUM>. The imaging unit <NUM> provided at the upper portion of the windshield on the vehicle interior side is mainly used to detect a preceding vehicle, pedestrian, obstacle, traffic light, traffic sign, lane, or the like.

Note that <FIG> illustrates an example of imaging ranges of the imaging units <NUM>, <NUM>, <NUM>, and <NUM>. An imaging range a indicates an imaging range of the imaging unit <NUM> provided at the front nose, imaging ranges b and c indicate imaging ranges of the imaging units <NUM> and <NUM> provided at the respective side mirrors, and an imaging range d indicates an imaging range of the imaging unit <NUM> provided at the rear bumper or the back door. For example, it is possible to superimpose image data captured by the imaging units <NUM>, <NUM>, <NUM>, and <NUM> on each other to obtain an overhead view image of the vehicle <NUM> as viewed from above.

Vehicle external information detectors <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, and <NUM> that are provided at the front, rear, sides, corners, and at the upper portion of the windshield on the vehicle interior side of the vehicle <NUM> may be, for example, an ultrasonic sensor or a radar device. The vehicle external information detectors <NUM>, <NUM>, and <NUM> provided at the front nose, rear bumper, back door, and the upper portion of the windshield on the vehicle interior side of the vehicle <NUM> may be, for example, a LIDAR device. These vehicle external information detectors <NUM> to <NUM> are mainly used to detect a preceding vehicle, pedestrian, obstacle, or the like.

Referring back to <FIG>, the description will be continued. The vehicle external information detection unit <NUM> causes the imaging unit <NUM> to capture an image outside the vehicle, and receives the captured image data. Furthermore, the vehicle external information detection unit <NUM> receives detection information from the vehicle external information detectors <NUM> that is connected to the vehicle external information detection unit <NUM>. In a case where the vehicle external information detector <NUM> is an ultrasonic sensor, a radar device, or a LIDAR device, the vehicle external information detection unit <NUM> causes the vehicle external information detector <NUM> to emit an ultrasonic wave, electromagnetic wave, or the like, and receives information of a reflected wave received. The vehicle external information detection unit <NUM> may perform object detection processing or distance detection processing for a person, a vehicle, an obstacle, a sign, characters on a road surface, or the like, on the basis of the received information. The vehicle external information detection unit <NUM> may perform environment recognition processing to recognize rainfall, fog, road surface conditions, or the like, on the basis of the received information. The vehicle external information detection unit <NUM> may calculate a distance to the object outside the vehicle, on the basis of the received information.

Furthermore, the vehicle external information detection unit <NUM> may perform image recognition processing or distance detection processing to recognize the person, car, obstacle, sign, characters on the road surface, or the like, on the basis of the received image data. The vehicle external information detection unit <NUM> may perform processing such as distortion correction or alignment on the received image data and combine image data captured by different imaging units <NUM>, generating an overhead view image or panoramic image. The vehicle external information detection unit <NUM> may perform viewpoint transformation processing by using image data captured by different imaging units <NUM>.

The vehicle internal information detection unit <NUM> detects information inside the vehicle. For example, a driver state detection unit <NUM> configured to detect the state of a driver is connected to the vehicle internal information detection unit <NUM>. The driver state detection unit <NUM> may include a camera configured to image the driver, a biological sensor configured to detect biological information of the driver, a microphone configured to collect voice in the vehicle interior, or the like. The biological sensor is provided on a seat surface, the steering wheel, or the like to detect the biological information of an occupant sitting on the seat or the driver holding the steering wheel. The vehicle internal information detection unit <NUM> may calculate the degree of fatigue or degree of concentration of the driver or may determine whether the driver is drowsy, on the basis of detection information input from the driver state detection unit <NUM>. The vehicle internal information detection unit <NUM> may perform processing such as noise cancellation processing on voice signals collected.

The integrated control unit <NUM> controls the overall operations in the vehicle control system <NUM>, according to various programs. An input unit <NUM> is connected to the integrated control unit <NUM>. The input unit <NUM> is achieved by a device, such as a touch panel, button, microphone, switch, or lever, that is configured to be operated for input by the occupant. Data obtained by performing voice recognition on voice input by the microphone may be input to the integrated control unit <NUM>. The input unit <NUM> may be, for example, a remote control device using infrared ray or any other radio wave, or an external connection device such as a mobile phone or personal digital assistant (PDA) compatible in operation with the vehicle control system <NUM>. The input unit <NUM> may be, for example, a camera, and in this case, the occupant can input information by gesture. Alternatively, data obtained by detecting the movement of a wearable device worn by the occupant may be input. Furthermore, the input unit <NUM> may include, for example, an input control circuit or the like that is configured to generate an input signal on the basis of information input by the occupant or the like by using the input unit <NUM> and output the input signal to the integrated control unit <NUM>. The occupant or the like operates the input unit <NUM>, inputs various data to the vehicle control system <NUM> or instructs the vehicle control system <NUM> to perform a processing operation.

The storage unit <NUM> may include a read only memory (ROM) configured to store various programs executed by the microcomputer, and a random access memory (RAM) configured to store various parameters, calculation results, sensor values, or the like. Furthermore, the storage unit <NUM> may be achieved by a magnetic storage device such as a hard disc drive (HDD), a semiconductor storage device, an optical storage device, a magneto-optical storage device, or the like.

The general-purpose communication I/F <NUM> is a general-purpose communication I/F configured to mediate communication between various devices in an external environment <NUM>. In the general-purpose communication I/F <NUM>, a cellular communication protocol such as Global System of Mobile communications (GSM) (registered trademark), WiMAX (registered trademark), Long Term Evolution (LTE) (registered trademark), or LTE-Advanced (LTE-A), or other wireless communication protocols such as a wireless LAN (also referred to as Wi-Fi (registered trademark)) and Bluetooth (registered trademark) may be implemented. For example, the general-purpose communication I/F <NUM> may be connected to a device (e.g., an application server or control server) on an external network (e.g., the Internet, a cloud network, or a business-specific network) via a base station or an access point. Furthermore, for example, the general-purpose communication I/F <NUM> may be connected to a terminal (e.g., a terminal of the driver, the pedestrian, or a store, or a machine type communication (MTC) terminal) in the vicinity of the vehicle, by using a peer to peer (P2P) technology.

The dedicated communication I/F <NUM> is a communication I/F that supports a communication protocol that is designed for use in a vehicle. For example, in the dedicated communication I/F <NUM>, a standard protocol, such as wireless access in vehicle environment (WAVE) that is defined by a combination of IEEE <NUM>. 11p as a lower layer and IEEE <NUM> as an upper layer, dedicated short range communications (DSRC), or a cellular communication protocol, may be implemented. Typically, the dedicated communication I/F <NUM> performs V2X communication that is a concept including at least one of vehicle-to-vehicle communication, vehicle-to-infrastructure communication, vehicle-to-home communication, and vehicle-to-pedestrian communication.

The positioning unit <NUM> receives, for example, a GNSS signal (e.g., a GPS signal from a global positioning system (GPS) satellite) from a global navigation satellite system (GNSS) satellite, performs positioning, and generates position information including the latitude, longitude, and altitude of the vehicle. Note that the positioning unit <NUM> may identify the current position by exchanging signals with a wireless access point, or may acquire the position information from a terminal such as a mobile phone, PHS, or a smartphone having a positioning function.

For example, the beacon receiving unit <NUM> receives a radio wave or electromagnetic wave emitted from a radio station or the like installed on a road, and acquires information about the current position, traffic congestion, traffic regulation, required time, or the like. Note that the function of the beacon receiving unit <NUM> may be included in the dedicated communication I/F <NUM> described above.

The in-vehicle device I/F <NUM> is a communication interface configured to mediate connection between the microcomputer <NUM> and various in-vehicle devices <NUM> in the vehicle. The in-vehicle device I/F <NUM> may establish wireless connection by using a wireless communication protocol such as wireless LAN, Bluetooth (registered trademark), near field communication (NFC), or wireless USB (WUSB). Furthermore, the in-vehicle device I/F <NUM> may establish wired connection such as a universal serial bus (USB), high-definition multimedia interface (HDMI) (registered trademark), mobile high-definition link (MHL), via a connection terminal which is not illustrated (and a cable, if necessary). The in-vehicle device <NUM> may include, for example, at least one of a mobile device or a wearable device of the occupant, or an information device carried in or attached to the vehicle. Furthermore, the in-vehicle device <NUM> may include a navigation device configured to search for a route to any destination. The in-vehicle device I/F <NUM> exchanges control signals or data signals with these in-vehicle devices <NUM>.

The in-vehicle network I/F <NUM> is an interface configured to mediate communication between the microcomputer <NUM> and the communication network <NUM>. The in-vehicle network I/F <NUM> transmits and receives signals and the like in accordance with a predetermined protocol supported by the communication network <NUM>.

The microcomputer <NUM> of the integrated control unit <NUM> controls the vehicle control system <NUM> according to various programs, on the basis of information acquired via at least one of the general-purpose communication I/F <NUM>, the dedicated communication I/F <NUM>, the positioning unit <NUM>, the beacon receiving unit <NUM>, the in-vehicle device I/F <NUM>, and the in-vehicle network I/F <NUM>. For example, the microcomputer <NUM> may calculate a control target value of the driving force generation device, the steering mechanism, or the braking device on the basis of the acquired information inside and outside of the vehicle, outputting a control command to the drive system control unit <NUM>. For example, the microcomputer <NUM> may perform cooperative control to achieve the function of advanced driver assistance system (ADAS) including avoiding collision or mitigating impact of the vehicle, following based on a distance between vehicles, driving while maintaining vehicle speed, warning of collision of the vehicle, warning of lane departure of the vehicle, and the like. Furthermore, the microcomputer <NUM> may perform cooperative control for the purpose of automated driving or the like that is autonomous driving without depending on the driver's operation by controlling the driving force generation device, the steering mechanism, the braking device, or the like, on the basis of the acquired information around the vehicle.

The microcomputer <NUM> may generate three-dimensional distance information between the vehicle and an object such as surrounding structures or a person on the basis of information acquired via at least one of the general-purpose communication I/F <NUM>, the dedicated communication I/F <NUM>, the positioning unit <NUM>, the beacon receiving unit <NUM>, the in-vehicle device I/F <NUM>, and the in-vehicle network I/F <NUM>, creating local map information including surrounding information around the current position of the vehicle. Furthermore, the microcomputer <NUM> may predict danger such as collision of the vehicle, approaching of the pedestrian or the like, or entrance into a blocked road, on the basis of the information acquired to generate a warning signal. The warning signal may be, for example, a signal for generating a warning sound or turning on a warning lamp.

The audio/visual output unit <NUM> transmits an output signal of at least one of a sound or an image to an output device configured to visually or audibly notifying the occupant of the vehicle or the outside of the vehicle of information. In the example of <FIG>, an audio speaker <NUM>, a display unit <NUM>, and an instrument panel <NUM> are illustrated as the output device. The display unit <NUM> may include, for example, at least one of an on-board display and a head-up display. The display unit <NUM> may have an augmented reality (AR) display function. The output device may be another device other than the devices described above, for example, a wearable device such as a headphone or a spectacle type display worn by the occupant, a projector, or a lamp. In a case where the output device is a display device, the display device visually displays results obtained by various processing performed by the microcomputer <NUM> or information received from another control unit, in various formats, such as text, image, table, and graph. Furthermore, in a case where the output device is a sound output device, the sound output device converts an audio signal including sound data, acoustic data, or the like reproduced, into an analog signal and aurally outputs the analog signal.

Note that, in the example illustrated in <FIG>, at least two control units connected via the communication network <NUM> may be integrated as one control unit. Alternatively, each control unit may include a plurality of control units. Furthermore, the vehicle control system <NUM> may include another control unit which is not illustrated. Furthermore, in the above description, part or all of the function of any one of the control units may be provided to another control unit. In other words, as long as information is transmitted/received via the communication network <NUM>, any one of the control units may perform predetermined arithmetic processing. Likewise, a sensor or a device connected to any one of the control units may be connected to another control unit, and a plurality of control units may mutually transmit/receive detection information via the communication network <NUM>.

Note that a computer program for achieving each function of the electronic device <NUM> according to the present embodiment described with reference to <FIG> can be mounted in any one of the control units or the like. Furthermore, it is also possible to provide a computer-readable recording medium storing such a computer program. The recording medium is, for example, a magnetic disk, an optical disk, a magneto-optical disk, a flash memory, or the like. Furthermore, the computer program described above may be distributed, for example, via a network without using the recording medium.

In the vehicle control system <NUM> described above, the electronic device <NUM> according to the present embodiment described with reference to <FIG> is applicable to the integrated control unit <NUM> in the example of application illustrated in <FIG>. For example, the storage unit <NUM> and the processor <NUM> of the electronic device <NUM> correspond to the microcomputer <NUM>, storage unit <NUM>, and in-vehicle network I/F <NUM> of the integrated control unit <NUM>. However, the vehicle control system <NUM> is not limited to the above description and may correspond to a host <NUM> in <FIG>.

In addition, at least some of component elements of the electronic device <NUM> according to the present embodiment described with reference to <FIG> may be achieved in a module (e.g., an integrated circuit module including one die) for the integrated control unit <NUM> illustrated in <FIG>. Alternatively, the electronic device <NUM> according to the present embodiment described with reference to <FIG> may be achieved by a plurality of control units of the vehicle control system <NUM> illustrated in <FIG>.

Furthermore, the technology according to the present disclosure (the present technology) is applicable to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgical system.

<FIG> is a diagram illustrating an example of a schematic configuration of an endoscopic surgical system to which the technology according to the present disclosure (the present technology) can be applied.

<FIG> illustrates a state in which an operator (surgeon) <NUM> is performing surgery on a patient <NUM> lying on a patient's bed <NUM> by using an endoscopic surgical system <NUM>. As illustrated in the drawing, the endoscopic surgical system <NUM> includes an endoscope <NUM>, an other surgical instruments <NUM> such as an insufflation tube <NUM> and an energy treatment instrument <NUM>, a support arm device <NUM> configured to support the endoscope <NUM>, and a cart <NUM> on which various devices for endoscopic surgery are mounted.

The endoscope <NUM> includes a lens barrel <NUM> that has a region having a predetermined length from the distal end, the region being inserted into the body cavity of the patient <NUM>, and a camera head <NUM> connected to the proximal end of the lens barrel <NUM>. In the example, the endoscope <NUM> configured as a so-called rigid endoscope having the lens barrel <NUM> that is rigid is illustrated, but the endoscope <NUM> may be configured as a so-called flexible endoscope having a flexible lens barrel.

An opening portion into which an objective lens is fitted is provided at the distal end of the lens barrel <NUM>. A light source device <NUM> is connected to the endoscope <NUM>, light generated by the light source device <NUM> is guided to the distal end of the lens barrel <NUM> by a light guide extending inside the lens barrel <NUM>, and the light is emitted toward an observation target in the body cavity of the patient <NUM> via the objective lens. Note that the endoscope <NUM> may be a forward-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

An optical system and an imaging element are provided inside the camera head <NUM>, and reflected light (observation light) from the observation target is focused on the imaging element by the optical system. The observation light is photoelectrically converted by the imaging element, and an electric signal corresponding to the observation light, that is, an image signal corresponding to the observation image is generated. The image signal is transmitted as RAW data to a camera control unit (CCU) <NUM>.

The CCU <NUM> includes a central processing unit (CPU), a graphics processing unit (GPU), and the like, and integrally controls the operation of the endoscope <NUM> and a display device <NUM>. Furthermore, the CCU <NUM> receives the image signal from the camera head <NUM>, and performs various image processing, such as development processing (demosaic processing) for displaying an image based on the image signal, on the image signal.

The display device <NUM> displays the image based on the image signal subjected to the image processing by the CCU <NUM>, in response to the control from the CCU <NUM>.

The light source device <NUM> includes, for example, a light source such as a light emitting diode (LED) and supplies irradiation light for imaging a surgical site or the like to the endoscope <NUM>.

An input device <NUM> is an input interface for the endoscopic surgical system <NUM>. The user is allowed to input various information and instructions to the endoscopic surgical system <NUM> via the input device <NUM>. For example, the user inputs an instruction or the like to change conditions of imaging (type of irradiation light, magnification, focal length, etc.) by the endoscope <NUM>.

A treatment instrument control device <NUM> controls drive of the energy treatment instrument <NUM> for cauterization and incision of tissue, blood vessel sealing, or the like. An insufflation device <NUM> feeds gas into the body cavity of the patient <NUM> via the insufflation tube <NUM> to inflate the body cavity, for the purpose of ensuring the field of view of the endoscope <NUM> and ensuring a working space for the operator. A recorder <NUM> is a device configured to record various information relating to surgery. A printer <NUM> is a device configured to print the various information regarding surgery in various formats such as text, image, or graph.

Note that the light source device <NUM> configured to supply the irradiation light for imaging the surgical site to the endoscope <NUM> can include, for example, an LED, a laser light source, or a white light source including a combination thereof. The white light source including a combination of RGB laser light sources makes it possible to highly precisely control the output intensity and output timing of each color (each wavelength), and thereby the white balance of a captured image can be adjusted in the light source device <NUM>. Furthermore, in this configuration, irradiating the observation target with laser light beams from the RGB laser light sources in a time division manner and controlling the drive of the imaging element of the camera head <NUM> in synchronization with the irradiation timing also make it possible to capture images corresponding to RGB in a time division manner. According to this method, a color image can be obtained without providing a color filter for the imaging element.

Furthermore, the driving of the light source device <NUM> may be controlled so as to change the intensity of light to be output every predetermined time. The drive of the imaging element of the camera head <NUM> is controlled in synchronization with the timing of change in the intensity of light, images are thereby acquired in a time division manner and combined, and thus, an image with high dynamic range can be generated without so-called underexposed and overexposed images.

Furthermore, the light source device <NUM> may be configured to supply light in a predetermined wavelength band used for observation using special light. In the observation using special light, for example, so-called narrow band imaging is performed in which wavelength dependence of light absorption in body tissue is used in irradiation of light in a band narrower than that of irradiation light (i.e., white light) used in normal observation, and thereby a predetermined tissue such as blood vessel in mucosal surface is captured with high contrast. Alternatively, in the observation using special light, fluorescence observation for obtaining an image of fluorescence generated by irradiation with excitation light may be performed. In the fluorescence observation, it is possible, for example, to irradiate a body tissue with excitation light to observe fluorescence from the body tissue (auto-fluorescence imaging), or to locally inject a reagent such as indocyanine green (ICG) into the body tissue and irradiate the body tissue with excitation light used for the fluorescence wavelength of the reagent to obtain a fluorescent image. The light source device <NUM> is configured to supply light in a narrow band and/or excitation light, which is used for such observation using special light.

<FIG> is a block diagram illustrating an example of a functional configuration of the camera head <NUM> and the CCU <NUM> that are illustrated in <FIG>.

The camera head <NUM> has a lens unit <NUM>, an imaging unit <NUM>, a drive unit <NUM>, a communication unit <NUM>, and a camera head control unit <NUM>. The CCU <NUM> has a communication unit <NUM>, an image processing unit <NUM>, and a control unit <NUM>. The camera head <NUM> and the CCU <NUM> are communicably connected to each other by a transmission cable <NUM>.

The lens unit <NUM> is an optical system provided at a connection portion with the lens barrel <NUM>. The observation light captured from the distal end of the lens barrel <NUM> is guided to the camera head <NUM> and incident on the lens unit <NUM>. The lens unit <NUM> is configured by combining a plurality of lenses including a zoom lens and a focusing lens.

The imaging unit <NUM> includes the imaging element. One imaging element (so-called single imaging element) or a plurality of imaging elements (so-called multiple imaging elements) may be employed to constitute the imaging unit <NUM>. In a case where the imaging unit <NUM> uses the multiple imaging elements, for example, the image signals may be generated corresponding to RGB by the respective imaging elements so that a color image may be obtained by combining the image signals. Alternatively, the imaging unit <NUM> may have a pair of imaging elements to acquire the image signals for the right eye and the left eye corresponding to three-dimensional (3D) display. Performing the 3D display makes it possible for the operator <NUM> to more accurately grasp the depth of biological tissue in the surgical site. Note that, in a case where the imaging unit <NUM> uses the multiple imaging elements, a plurality of lens units <NUM> can be provided corresponding to the imaging elements as well.

Furthermore, the imaging unit <NUM> may not be necessarily provided in the camera head <NUM>. For example, the imaging unit <NUM> may be provided in the lens barrel <NUM>, immediately next to the objective lens.

The drive unit <NUM> includes an actuator and moves the zoom lens and the focusing lens of the lens unit <NUM> by a predetermined distance along an optical axis, by the control from the camera head control unit <NUM>. Therefore, the magnification and focal point of the captured image captured by the imaging unit <NUM> can be appropriately adjusted.

The communication unit <NUM> includes a communication device for transmitting and receiving various information to and from the CCU <NUM>. The communication unit <NUM> transmits the image signal obtained from the imaging unit <NUM> as RAW data to the CCU <NUM> via the transmission cable <NUM>.

Furthermore, the communication unit <NUM> receives a control signal for controlling the drive of the camera head <NUM> from the CCU <NUM>, and supplies the control signal to the camera head control unit <NUM>. The control signal includes, for example, information about imaging conditions, such as information specifying a frame rate of the captured image, information specifying an exposure value in imaging, and/or information specifying the magnification and focal point of the captured image.

Note that the imaging conditions such as the frame rate, the exposure value, the magnification, and the focal point may be appropriately specified by the user, or may be automatically set by the control unit <NUM> of the CCU <NUM> on the basis of the acquired image signal. In the latter case, the endoscope <NUM> has a so-called auto exposure (AE) function, auto focus (AF) function, and auto white balance (AWB) function.

The camera head control unit <NUM> controls the drive of the camera head <NUM> on the basis of the control signal received from the CCU <NUM> via the communication unit <NUM>.

The communication unit <NUM> includes a communication device for transmitting and receiving various information to and from the camera head <NUM>. The communication unit <NUM> receives the image signal transmitted from the camera head <NUM> via the transmission cable <NUM>.

Furthermore, the communication unit <NUM> transmits the control signal for controlling the drive of the camera head <NUM> to the camera head <NUM>. The image signal and the control signal are configured to be transmitted by electric communication, optical communication, or the like.

The image processing unit <NUM> performs various image processing on the image signal as the RAW data transmitted from the camera head <NUM>.

The control unit <NUM> performs various control relating to imaging of the surgical site or the like by the endoscope <NUM> and display of the captured image obtained by imaging the surgical site or the like. For example, the control unit <NUM> generates the control signal for controlling the drive of the camera head <NUM>.

Furthermore, the control unit <NUM> causes the display device <NUM> to display the captured image showing the surgical site or the like, on the basis of the image signal subjected to the image processing by the image processing unit <NUM>. At this time, the control unit <NUM> may recognize various objects in the captured image by using various image recognition technologies. For example, the control unit <NUM> is configured to detect the edge shape, the color, or the like of each of the objects in the captured image to recognize a surgical instrument such as forceps, a specific biological portion, bleeding, mist generated in using the energy treatment instrument <NUM>, or the like. When causing the display device <NUM> to display the captured image, the control unit <NUM> may cause the display device <NUM> to superimpose and display various surgery support information on the image of the surgical site by using a result of the recognition. Superimposing and displaying of the surgery support information for presentation to the operator <NUM> makes it possible to reduce a burden on the operator <NUM> or ensure surgery by the operator <NUM>.

The transmission cable <NUM> connecting the camera head <NUM> and the CCU <NUM> is an electric signal cable compatible with the electric signal communication, an optical fiber compatible with optical communication, or a composite cable thereof.

Here, in the example, communication performed in a wired manner by using the transmission cable <NUM> is illustrated, but communication between the camera head <NUM> and the CCU <NUM> may be performed in a wireless manner.

The example of the endoscopic surgical system to which the technology according to the present disclosure is applicable has been described. The technology according to the present disclosure is applicable to, for example, the endoscope <NUM>, the imaging unit <NUM> of the camera head <NUM>, and the like of the configurations described above. Application of the technology according to the present disclosure to the imaging unit <NUM> and the like makes it possible to acquire the image data having high luminance while suppressing the decrease in resolution.

Note that, here, the example of the endoscopic surgical system has been described, but the technology according to the present disclosure may be further applied to, for example, a microscopic surgery system or the like.

The embodiments of the present disclosure have been described above, but the technical scope of the present disclosure is not limited to the embodiments described above, and various modifications and alterations can be made without departing from the scope of the present invention as defined by the claims.

Moreover, the component elements of different embodiments and modifications may be suitably combined with each other.

Claim 1:
A solid-state imaging device (<NUM>) comprising:
a first semiconductor substrate (<NUM>) that includes a grid-shaped first trench (T1) provided in a first surface, and a second trench (T2) provided along a bottom of the first trench (T1); and
a plurality of photoelectric conversion elements (<NUM>) that is provided in the first semiconductor substrate (<NUM>),
wherein each of the photoelectric conversion elements (<NUM>) includes:
a photoelectric conversion region (<NUM>) that is provided in an element region defined by the first trench (T1) and the second trench (T2) in the first semiconductor substrate (<NUM>), and is configured to photoelectrically convert incident light to generate charges;
a first semiconductor region (<NUM>) that surrounds the photoelectric conversion region (<NUM>) in the element region;
a first contact (<NUM>) that makes contact with the first semiconductor region (<NUM>) at the bottom of the first trench (T1);
a first electrode (<NUM>) that makes contact with the first contact (<NUM>) in the first trench (T1);
a second semiconductor region (<NUM>) that is provided in a region of the element region making contact with the first semiconductor region (<NUM>), and has a first conductivity type the same as the first semiconductor region (<NUM>);
a third semiconductor region (<NUM>) that is a region making contact with the second semiconductor region (<NUM>) in the element region, is provided between the second semiconductor region (<NUM>) and the first surface, and has a second conductivity type opposite to that of the first conductivity type;
a second contact (<NUM>) that is provided on the first surface so as to make contact with the third semiconductor region (<NUM>); and
a second electrode (<NUM>) that makes contact with the second contact (<NUM>), and
a height of the first contact (<NUM>) from the first surface is different from a height of the third semiconductor region (<NUM>) from the first surface.