Patent Description:
Waveguides are used in PICs to direct optical signals where necessary. Waveguides may be made of, for example, semiconductor material such as silicon, or nitride material such as silicon nitride. The waveguides are made relatively vertically short, e.g., less than <NUM> nanometers thick, for integration with other integrated circuit devices such as complementary metal-oxide semiconductor (CMOS) transistor devices. Silicon waveguides are typically made in layers with other silicon active regions, and nitride waveguides are made in layers above the silicon layers. Propagation losses in certain waveguides can be too high for many applications. One way to reduce the propagation losses is to enlarge the waveguides. Larger waveguides, e.g., having a thickness of greater than <NUM> nanometers, have been applied to monolithic PIC platforms by extending them into a buried insulator layer of a semiconductor-on-insulator (SOI) substrate. However, the larger waveguides still exhibit unsatisfactory propagation losses, especially between nitride waveguides and single-mode optical fibers. Publication <CIT> discloses prior art.

Aspects of the disclosure are directed to a structure, comprising: an inter-level dielectric (ILD) layer over a substrate; and a first multilayer nitride waveguide positioned in the ILD layer in a first region of the substrate, the first multilayer nitride waveguide including: a first nitride body, and a first cladding layer on at least a lower surface of the first nitride body, wherein the first cladding layer has a lower refractive index than the first nitride body.

Further aspects of the disclosure include a structure, comprising: a semiconductor-on-insulator (SOI) substrate including a semiconductor-on-insulator (SOI) layer over a buried insulator layer over a semiconductor substrate; an inter-level dielectric (ILD) layer over the SOI substrate; a first multilayer nitride waveguide positioned in the ILD layer in a first region of the SOI substrate, the first multilayer nitride waveguide including a first nitride body, and a first cladding layer on at least a lower surface of the first nitride body, wherein the first cladding layer has a lower refractive index than the first nitride body; and a second multilayer nitride waveguide in the ILD layer in the first region of the SOI substrate, wherein the first and second multilayer nitride waveguides are optically side-coupled to one another, the second multilayer nitride waveguide including a second nitride body, and the first cladding layer on at least a lower surface of the second nitride body, wherein the first cladding layer has a lower refractive index than the second nitride body.

Still further aspects of the disclosure relate to a method of forming a waveguide structure, the method comprising: forming a trench through an inter-level dielectric (ILD) layer in a first region of a substrate under the ILD layer; forming a first cladding layer and a nitride layer over the first cladding layer within the trench and over the ILD layer; planarizing an upper surface of the nitride layer; forming a first multilayer nitride waveguide by patterning the first cladding layer and the nitride layer within the trench to form a first nitride body having the first cladding layer thereunder, wherein the first cladding layer has a lower refractive index than the first nitride body.

The foregoing and other features of the disclosure will be apparent from the following more particular description of embodiments of the disclosure.

The embodiments of this disclosure will be described in detail, with reference to the following figures, wherein like designations denote like elements, and wherein:.

In the following description, reference is made to the accompanying drawings that form a part thereof, and in which is shown by way of illustration specific illustrative embodiments in which the present teachings may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the present teachings, and it is to be understood that other embodiments may be used and that changes may be made without departing from the scope of the present teachings. The following description is, therefore, merely illustrative.

It will be understood that when an element such as a layer, region, portion, or substrate is referred to as being "on" or "over" another element, it may be directly on the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" or "directly over" another element, there may be no intervening elements present. It will also be understood that when an element is referred to as being "connected" or "coupled" to another element, it may be directly connected or coupled to the other element or intervening elements may be present. As used herein, waveguides being "optically coupled" indicates that the waveguides are structurally positioned and/or arranged to allow optical signals to be transmitted therebetween. More specifically, "optically side-coupled" or "side-coupled" indicates that the waveguides are structurally positioned and/or arranged laterally (with at least some vertical overlap) to allow optical signals to be transmitted laterally therebetween, i.e., through sides thereof.

Reference in the specification to "one embodiment" or "an embodiment" of the present disclosure, as well as other variations thereof, means that a particular feature, structure, characteristic, and so forth described in connection with the embodiment is included in at least one embodiment of the present disclosure. Thus, the phrases "in one embodiment" or "in an embodiment," as well as any other variations appearing in various places throughout the specification are not necessarily all referring to the same embodiment. It is to be appreciated that the use of any of the following "/," "and/or," and "at least one of," for example, in the cases of "A/B," "A and/or B" and "at least one of A and B," is intended to encompass the selection of the first listed option (a) only, or the selection of the second listed option (B) only, or the selection of both options (A and B). As a further example, in the cases of "A, B, and/or C" and "at least one of A, B, and C," such phrasing is intended to encompass the first listed option (A) only, or the selection of the second listed option (B) only, or the selection of the third listed option (C) only, or the selection of the first and the second listed options (A and B), or the selection of the first and third listed options (A and C) only, or the selection of the second and third listed options (B and C) only, or the selection of all three options (A and B and C). This may be extended, as readily apparent by one of ordinary skill in the art, for as many items listed.

Embodiments of the disclosure provide structures and methods having an enlarged multilayer nitride waveguide. A first enlarged multilayer nitride waveguide (e.g., greater than <NUM> nanometers (nm) thick) is positioned in an ILD layer in a region of a substrate. Conventional nitride waveguides are smaller sized, e.g., less than approximately <NUM> nanometers. A second, smaller multilayer nitride waveguide may also be provided in the ILD layer. Each multilayer nitride waveguide includes a nitride body and a lower cladding layer on at least a lower surface of the respective nitride body. The cladding layer has a lower refractive index than the nitride bodies. Additional lower refractive index cladding layers can be provided on the upper surface and/or sidewalls of the nitride bodies. The enlarged multilayer nitride waveguide may be implemented with other conventional silicon and/or multilayer nitride waveguides. The enlarged multilayer nitride waveguide with low refractive index cladding layer(s) improves propagation losses and allows changing of the mode shape within the waveguide. The cladding layer(s) also reduce propagation losses and allow shorter directional coupling (relaxing fabrication requirements) between the waveguides. The multilayer nitride waveguides further enable monolithic integration of ultra-low-loss, large-size multilayer nitride waveguides with, for example, silicon waveguides and CMOS devices, allowing full realization of the benefit of ultra-low-loss nitride devices and photonic integrated circuits. The enlarged multilayer nitride waveguide is also less sensitive to fabrication variations than existing single layer nitride waveguides and can handle higher optical power.

<FIG> shows a cross-sectional view of a structure <NUM> according to embodiments of the disclosure. Structure <NUM> includes a first region <NUM> in which waveguides according to embodiments of the disclosure are provided, and a second region <NUM> in which a complementary metal-oxide semiconductor (CMOS) device <NUM> is positioned. Structure <NUM> may also be referred to herein as a waveguide structure or a photonic integrated circuit (PIC), i.e., an integrated circuit with optical functions.

Structure <NUM> is illustrated as including a substrate <NUM> in the form of a semiconductor-on-insulator (SOI) substrate including a semiconductor-on-insulator (SOI) layer <NUM> over a buried insulator layer <NUM> over a semiconductor substrate <NUM>. Some or all of SOI layer <NUM> may be omitted in first region <NUM>. SOI layer <NUM> and semiconductor substrate <NUM> may include but are not limited to silicon, germanium, silicon germanium, silicon carbide, and those consisting essentially of one or more III-V compound semiconductors. Buried insulator layer <NUM> may include any appropriate dielectric material such as but not limited silicon oxide (SiO<NUM>). While shown as an SOI substrate, substrate <NUM> may include any other form of semiconductor substrate, e.g., a bulk semiconductor substrate.

Structure <NUM> includes an inter-level dielectric (ILD) layer <NUM> over substrate <NUM>. Suitable dielectric materials for ILD layer <NUM> include but are not limited to: carbon-doped silicon oxide materials; fluorinated silicate glass (FSG); organic polymeric thermoset materials; silicon oxycarbide; SiCOH dielectrics; fluorine doped silicon oxide; spin-on glasses; silsesquioxanes, including hydrogen silsesquioxane (HSQ), methyl silsesquioxane (MSQ) and mixtures or copolymers of HSQ and MSQ; benzocyclobutene (BCB)-based polymer dielectrics, and any silicon-containing low-k dielectric. In one non-limiting example, ILD layer <NUM> includes one or more variations of silicon oxide (SiO<NUM>).

CMOS device <NUM> may include any now known or later developed integrated circuit structure(s) that would be integrated with photonics, such as but not limited to: transistors, trans-impedance amplifiers (TIA), drivers or passive devices (e.g., a resistor, capacitor or other passive element). CMOS device <NUM> may be formed using any now known or later developed semiconductor fabrication techniques. CMOS device <NUM> is in second region <NUM> of substrate <NUM>. ILD layer <NUM> is over CMOS device <NUM> and includes interconnects <NUM> to CMOS device <NUM>. Interconnects <NUM> may include any now known or later developed metal wire or contact. Any number of additional ILD layer(s) <NUM> may also be provided over ILD layer <NUM> in a known fashion, i.e., providing back-end-of-line (BEOL) interconnect layers.

Structure <NUM> also includes a first multilayer nitride waveguide <NUM> (hereafter "first nitride waveguide <NUM>") positioned in ILD layer <NUM> in first region <NUM> of SOI substrate <NUM>. First nitride waveguide <NUM> includes a first nitride body <NUM>. A lower surface <NUM> of first nitride waveguide <NUM> may be located in substrate <NUM> to allow it to be thicker. For example, first nitride waveguide <NUM> may extend at least partially into buried insulator layer <NUM>. Hence, first nitride waveguide <NUM> may extend into upper portion <NUM> of buried insulator layer <NUM>. In one non-limiting example, first nitride waveguide <NUM> may extend into buried insulator layer <NUM>-<NUM> micrometers (µm) for a <NUM> thick buried insulator layer <NUM>. Other dimensions may be possible depending on a desired size of first nitride waveguide <NUM>. First nitride body <NUM> may include a nitride material such as silicon nitride (Si<NUM>N<NUM>).

Structure <NUM> may also optionally include a second multilayer nitride waveguide <NUM> (hereafter "second nitride waveguide <NUM>") in ILD layer <NUM> in first region <NUM> of SOI substrate <NUM>. Second nitride waveguide <NUM> includes a second nitride body <NUM>. In contrast to first nitride waveguide <NUM>, second nitride waveguide <NUM> includes a lower surface <NUM> above substrate <NUM>, i.e., in ILD layer <NUM> and above buried insulator layer <NUM>. As illustrated, first and second nitride waveguides <NUM>, <NUM> overlap vertically, allowing sidewalls <NUM>, <NUM>, respectively, thereof to be optically side-coupled. Second nitride body <NUM> includes a nitride material such as silicon nitride (Si<NUM>N<NUM>). Hence, although not necessary in all instances, second nitride body <NUM> may include the same material as first nitride body <NUM>.

As shown in <FIG>, structure <NUM> also includes a lower cladding layer <NUM> defining at least a lower surface <NUM> of first nitride waveguide <NUM>, i.e., lower cladding layer <NUM> is on a lower surface of first nitride body <NUM> and defines a lower surface <NUM> of first nitride waveguide <NUM>. Lower cladding layer <NUM> may also be on a lower surface of second nitride body <NUM> to define a lower surface <NUM> of second nitride waveguide <NUM>. That is, lower cladding layer <NUM> may define a lower surface <NUM>, <NUM> of first nitride waveguide <NUM> and second nitride waveguide <NUM>. In any event, lower cladding layer <NUM> has a lower refractive index than first nitride body <NUM> and second nitride body <NUM> (where latter provided). Nitride bodies <NUM>, <NUM> may have refractive index of, for example, approximately <NUM>. Lower cladding layer <NUM> may be one or more of the following: zinc monoxide (ZnO), n = <NUM> @<NUM> micrometers (µm), n = <NUM> @ <NUM>; aluminum oxide (Al<NUM>O<NUM>), n = <NUM> @ <NUM>, n = <NUM> @<NUM>; magnesium oxide (MgO), n = <NUM> @<NUM>, n = <NUM> @<NUM>; silicon dioxide (SiO<NUM>), n <<NUM>, n=<NUM> @ <NUM>; calcium fluoride (CaF<NUM>), n = <NUM> @ <NUM>, n = <NUM> @ <NUM>; octamethylcyclotetrasiloxane (OMCTS) [(CH<NUM>)<NUM>SiO]<NUM> (SiCOH), n = <NUM> @ <NUM>; and magnesium fluoride (MgF<NUM>), n=<NUM> @ <NUM>, n = <NUM> @ <NUM>. Collectively, nitride bodies <NUM>, <NUM> and lower cladding layer <NUM> make a respective multilayer waveguide <NUM>, <NUM>.

As shown in <FIG>, first nitride waveguide <NUM> and second nitride waveguide <NUM> have different thicknesses. More particularly, first nitride body <NUM> of first nitride waveguide <NUM> and second nitride body <NUM> of second nitride waveguide <NUM> have different thicknesses. Lower cladding layer <NUM> may have the same or different thickness on each waveguide <NUM>, <NUM>. In the example shown, first nitride waveguide <NUM> has a larger vertical extent, i.e., thickness T1, than second nitride waveguide <NUM>, i.e., thickness T2. Hence, first nitride waveguide <NUM> is enlarged compared to second nitride waveguide <NUM>. Second nitride waveguide <NUM> may have a thickness T2 that is similar to conventional nitride waveguides, e.g., less than <NUM>, and perhaps less than <NUM>. Although not shown in <FIG> for clarity in first region <NUM>, first and second nitride waveguide <NUM>, <NUM> may extend through a nitride cap <NUM> that would normally separate portions of ILD layer <NUM>, e.g., over trench isolations, etc., in first region <NUM>. Consequently, since second nitride waveguide <NUM> may extend below nitride cap <NUM>, it also may be made slightly thicker than conventional nitride waveguides, where desired. First nitride waveguide <NUM> may have a thickness T1 of, in one embodiment of greater than <NUM>, and in other embodiments, may have a thickness T1 of approximately <NUM>-<NUM>. First nitride waveguide <NUM> and second nitride waveguide <NUM> may have upper surfaces <NUM>, <NUM>, respectively, that are coplanar. That is, they are at the same height within ILD layer <NUM>. The height with ILD layer <NUM> is such that lengthening of interconnects <NUM> to, for example, CMOS devices <NUM>, is not necessary. In this manner, enlarged first nitride waveguide <NUM> can be provided without impacting contact resistance and overall performance of the PIC.

Structure <NUM> may also optionally include a third waveguide <NUM> in ILD layer <NUM> in first region <NUM> of SOI substrate <NUM>. In contrast to first and second nitride waveguides <NUM>, <NUM>, third waveguide <NUM> may include a silicon body <NUM>. Hence, first nitride waveguide <NUM> and second nitride waveguide <NUM> may include a different material than third waveguide <NUM>. For example, first and second nitride waveguides <NUM>, <NUM> may include nitride body material, and third waveguide <NUM> may include silicon body material. As illustrated, due to the increased thickness of first nitride waveguide <NUM>, first and third waveguides <NUM>, <NUM> overlap vertically, allowing sidewalls <NUM>, <NUM>, respectively, thereof to optically side-couple the waveguides. Hence, optical signals can be optically transmitted in a vertical direction in structure <NUM>. Third waveguide <NUM> may have a thickness T3 that is similar to conventional silicon waveguides, e.g., less than <NUM>. Although not shown for clarity, third waveguide <NUM> may be below nitride cap <NUM> in first region <NUM>.

<FIG> shows a top-down view of first and second nitride waveguides <NUM>, <NUM> (partially) showing the cross-sectional view line for <FIG> shows a top-down view of first and third waveguides <NUM>, <NUM> (partially) showing the cross-sectional view line for <FIG>. As shown in <FIG>, at least one of the first, second and third waveguides <NUM>, <NUM>, <NUM> may include a portion having a laterally tapering dimension. That is, waveguides <NUM>, <NUM>, <NUM> may include tapered portions <NUM> that taper into or out of the page of <FIG>. While shown as linear tapers, the tapers may also be non-linear. The rest of waveguides <NUM>, <NUM>, <NUM> outside the tapered portions <NUM> may have parallel sides. Optical signals may move left-to-right or right-to-left in <FIG>. In addition, optical signals can move vertically within first nitride waveguide <NUM>.

While a particular positioning of waveguides <NUM>, <NUM>, <NUM> has been illustrated in <FIG>, it is emphasized that the positioning may vary, e.g., with enlarged nitride waveguide <NUM> in another position, or one or more additional waveguides <NUM>, <NUM>, <NUM> present. Any number of waveguides <NUM>, <NUM>, <NUM> may be employed, and each may have different dimensions, if desired. Although not shown in <FIG>, as will be apparent from the description, cladding layers (e.g., <NUM>, <NUM> in <FIG> and <NUM> in <FIG>) may also be positioned on upper or sidewall surfaces of nitride bodies <NUM> and/or <NUM>.

<FIG> shows a cross-sectional view of a structure <NUM> according to other embodiments of the disclosure. In <FIG>, an upper cladding layer <NUM> on an upper surface of first nitride body <NUM> and second nitride body <NUM> define an upper surface <NUM>, <NUM> of first nitride waveguide <NUM> and, where provided, second nitride waveguide <NUM>, respectively. Upper cladding layer <NUM> has a lower refractive index than the first and second nitride bodies <NUM>, <NUM> and is of the same material lower cladding layer <NUM>. In <FIG>, an upper cladding layer <NUM> on an upper surface of first nitride body <NUM> and second nitride body <NUM> define an upper surface <NUM>, <NUM> of first nitride waveguide <NUM> and, where provided, second nitride waveguide <NUM>, respectively. Upper cladding layer <NUM> has a lower refractive index than the first and second nitride bodies <NUM>, <NUM>, but is of a different material than lower cladding layer <NUM>. Here, upper cladding layer <NUM> may include any of the materials previously listed herein for lower cladding layer <NUM> but is different than lower cladding layer <NUM>.

<FIG> show cross-sectional views of structure <NUM> according to additional embodiments of the disclosure. In <FIG>, structure <NUM> also includes a side cladding layer <NUM> on at least one of a sidewall <NUM>, <NUM> of first nitride body <NUM> and a sidewall <NUM>, <NUM> of second nitride body <NUM>. Side cladding layer <NUM> has a lower refractive index than first and second nitride bodies <NUM>, <NUM>, and is of a different material than lower cladding layer <NUM> and any upper cladding layer <NUM> or <NUM>. Side cladding layer <NUM> may include any of the materials previously listed herein for lower cladding layer <NUM>, but is different than lower cladding layer <NUM> and any upper cladding layer <NUM> or <NUM>. Structure <NUM> may also include at least one segment <NUM> of side cladding layer <NUM> laterally spaced from lower surface <NUM> of first nitride waveguide <NUM>. Segment(s) <NUM> are remnants of a cladding material layer used to make side cladding layer <NUM>, as will be described herein.

<FIG> show cross-sectional views of structure <NUM> according to an additional embodiment of the disclosure. In <FIG>, structure <NUM> also includes side cladding layer <NUM> on at least one of sidewall <NUM>, <NUM> of first nitride body <NUM> and sidewall <NUM>, <NUM> of second nitride body <NUM>. Side cladding layer <NUM> has a lower refractive index than first and second nitride bodies <NUM>, <NUM>. In <FIG>, side cladding layer <NUM> is the same material as lower cladding layer <NUM> and any upper cladding layer <NUM>. That is, all three cladding layers <NUM>, <NUM> and <NUM> about nitride bodies <NUM> or <NUM>, are of the same material. The cladding layers <NUM>, <NUM>, <NUM> may include any of the materials previously listed herein for lower cladding layer <NUM>. Structure <NUM> may also include at least one segment <NUM> of cladding layer material (<NUM>) laterally spaced from lower surface <NUM> of first nitride waveguide <NUM>. Segment(s) <NUM> are remnants of a cladding material layer used to make side cladding layer <NUM>.

<FIG> show cross-sectional views of structure <NUM> according to an additional embodiment of the disclosure. In <FIG>, structure <NUM> also includes side cladding layer <NUM> on at least one of sidewall <NUM>, <NUM> of first nitride body <NUM> and sidewall <NUM>, <NUM> of second nitride body <NUM>, but second cladding layer <NUM>, <NUM> on top of bod(ies) <NUM>, <NUM> is omitted. Side cladding layer <NUM> has a lower refractive index than first and second nitride bodies <NUM>, <NUM>. In <FIG>, side cladding layer <NUM> is the same material as lower cladding layer <NUM>, but that is not necessary in all cases. Cladding layers <NUM>, <NUM> may include any of the materials previously listed herein for lower cladding layer <NUM>. Structure <NUM> may also include at least one segment <NUM> of cladding layer material (<NUM>) laterally spaced from lower surface <NUM> of first nitride waveguide <NUM>. Segment(s) <NUM> are remnants of a cladding material layer used to make side cladding layer <NUM>.

While various versions of material combinations of cladding layers <NUM>, <NUM>, <NUM>, <NUM> have been described herein, the layers about cladding layer <NUM>, <NUM>, <NUM>, <NUM>, i.e., ILD layers <NUM>, <NUM>, are different material than the cladding layers.

<FIG> show cross-sectional views of forming structure <NUM>, according to various embodiments of the disclosure. Structure <NUM>, including waveguides <NUM>, <NUM>, <NUM>, may be formed in a number of ways, and the disclosed embodiments are just one illustrative approach.

<FIG> shows a cross-sectional view of a preliminary structure <NUM>. Preliminary structure <NUM> includes substrate <NUM> with CMOS <NUM> formed in second region <NUM> of SOI substrate <NUM>, as noted herein. CMOS device <NUM> may be formed partially in, for example, SOI layer <NUM> of substrate <NUM> (when SOI used) in second region <NUM> of substrate <NUM>, using any now known or later developed techniques. ILD layer <NUM> is formed over CMOS device <NUM> and may be part of a middle-of-line (MOL) layer including interconnects <NUM> (<FIG>) (formed later) to CMOS device <NUM>.

ILD layer <NUM> may be formed by deposition. "Depositing" may include any now known or later developed techniques appropriate for the material to be deposited including but are not limited to, for example: chemical vapor deposition (CVD), low-pressure CVD (LPCVD), plasma-enhanced CVD (PECVD), semi-atmosphere CVD (SACVD) and high density plasma CVD (HDPCVD), rapid thermal CVD (RTCVD), ultra-high vacuum CVD (UHVCVD), limited reaction processing CVD (LRPCVD), metalorganic CVD (MOCVD), sputtering deposition, ion beam deposition, electron beam deposition, laser assisted deposition, thermal oxidation, thermal nitridation, spin-on methods, physical vapor deposition (PVD), atomic layer deposition (ALD), chemical oxidation, molecular beam epitaxy (MBE), plating, evaporation. Here, ILD layer <NUM> may be formed by CVD, for example.

Third waveguide <NUM> may be formed prior to forming first nitride waveguide <NUM> and from SOI layer <NUM>, e.g., by patterning SOI layer <NUM> to create the waveguide. Alternatively, third waveguide <NUM> may be formed, prior to forming first nitride waveguide <NUM>, by: forming a trench <NUM> in ILD layer <NUM> in first region <NUM> of SOI substrate <NUM>, forming a silicon layer <NUM> within trench <NUM>, and planarizing an upper surface <NUM> of silicon layer <NUM>. As described herein, trenches (including trench <NUM>) may be formed using any now known or later developed opening forming technique such as photolithography and patterning techniques, e.g., depositing a photoresist (not shown) on a layer, exposing the photoresist to light in a specified pattern, etching the photoresist to form a mask, etching the layer (e.g., ILD layer <NUM>) using the mask, and then removing the mask. It is noted that lower surface <NUM> of trench <NUM> is above an upper portion <NUM> of buried insulator layer <NUM>. Consequently, third waveguide <NUM> does not extend into buried insulator layer <NUM>. Silicon layer <NUM> may be deposited using any appropriate technique. Here, silicon layer <NUM> may be formed by ALD, for example.

Etching generally refers to the removal of material from a substrate (or structures formed on the substrate), and is often performed with a mask in place so that material may selectively be removed from certain areas of the substrate, while leaving the material unaffected, in other areas of the substrate. There are generally two categories of etching, (i) wet etch and (ii) dry etch. Wet etch is performed with a solvent (such as an acid) which may be chosen for its ability to selectively dissolve a given material (such as oxide), while, leaving another material (such as polysilicon) relatively intact. This ability to selectively etch given materials is fundamental to many semiconductor fabrication processes. A wet etch will generally etch a homogeneous material (e.g., oxide) isotropically, but a wet etch may also etch single-crystal materials (e.g., silicon wafers) anisotropically. Dry etch may be performed using a plasma. Plasma systems can operate in several modes by adjusting the parameters of the plasma. Ordinary plasma etching produces energetic free radicals, neutrally charged, that react at the surface of the wafer. Since neutral particles attack the wafer from all angles, this process is isotropic. Ion milling, or sputter etching, bombards the wafer with energetic ions of noble gases, which approach the wafer approximately from one direction, and therefore this process is highly anisotropic. Reactive-ion etching (RIE) operates under conditions intermediate between sputter and plasma etching and may be used to produce deep, narrow features, such as trenches <NUM>, <NUM>, etc..

Embodiments of the disclosure show forming first and second nitride waveguides <NUM>, <NUM> together. However, first and second nitride waveguides <NUM>, <NUM> may be formed separately or together. As shown in <FIG>, the method of forming waveguide structure <NUM> includes forming a trench <NUM> through ILD layer <NUM> in first region <NUM> of SOI substrate <NUM> under ILD layer <NUM>. Trench <NUM> may extend at least partially into upper portion <NUM> of buried insulator layer <NUM> of SOI substrate <NUM> (where provided). In one non-limiting example, trench <NUM> may extend into buried insulator layer <NUM>-<NUM> micrometers (µm) for a <NUM> thick buried insulator layer <NUM>. Trench <NUM> may also remove nitride cap <NUM> in at least part of region <NUM> (shown entirely removed for clarity). Alternatively, trench <NUM> may extend only into ILD layer <NUM>, and not reach buried insulator layer <NUM>. For purposes of illustration, only the former option is shown. Trench <NUM> may be formed using any now known or later developed opening techniques, as described herein. Trench <NUM> may have any desired dimensions. Notably, where desired, trench <NUM> may have a portion having a laterally tapered shape to form tapered portion <NUM> (<FIG>) of waveguide <NUM>.

<FIG> shows forming a lower cladding layer <NUM> and a nitride layer <NUM> over lower cladding layer <NUM> within trench <NUM> and over ILD <NUM>. Lower cladding layer <NUM> and nitride layer <NUM> may be deposited using any appropriate technique for the materials listed herein, and multiple deposition steps may be performed. An upper surface of nitride layer <NUM> is then planarized. Planarization refers to various processes that make a surface more planar (that is, flattened and/or smoothened). Chemical-mechanical-polishing (CMP) is one currently conventional planarization process, which planarizes surfaces with a combination of chemical reactions and mechanical forces.

In an alternative embodiment, <FIG> shows forming a lower cladding layer <NUM> and a nitride layer <NUM> over lower cladding layer <NUM> within trench <NUM> and over ILD <NUM>, and an optional upper cladding layer <NUM>, <NUM> on an upper surface of nitride layer <NUM>. The notation "<NUM>, <NUM>" for the upper cladding layer indicates it may be the same material (i.e., <NUM>) as lower cladding layer <NUM> on the lower surface of nitride bodies <NUM>, <NUM>, or a different cladding material (i.e., <NUM>) than lower cladding layer <NUM> on the lower surface of nitride bodies <NUM>, <NUM>. (Note, the shading for the collective cladding layer <NUM>, <NUM> is different than both cladding layers <NUM> or <NUM> in previous drawings). In any case, upper cladding layer <NUM>, <NUM> may be deposited using any appropriate technique for the material, and multiple deposition steps may be performed. Any necessary planarization may occur prior to deposition, e.g., to remove undulations in nitride layer <NUM>.

<FIG> shows forming first nitride waveguide <NUM> by patterning first cladding layer <NUM> and nitride layer <NUM> within trench <NUM> to form first nitride body <NUM> having first cladding layer <NUM> thereunder. The patterning may include any now known or later developed lithography and etching of lower cladding layer <NUM> and nitride layer <NUM>, i.e., to shape the desired structures to desired dimensions, based on the <FIG> embodiment. The etching in <FIG> forms first nitride body <NUM> and lower cladding layer <NUM> on a lower surface thereof. This process may also include forming second nitride waveguide <NUM> by patterning lower cladding layer <NUM> and nitride layer <NUM> over ILD layer <NUM> and outside trench <NUM> to form a second nitride body <NUM> having lower cladding layer <NUM> thereunder. In an alternative embodiment, <FIG> shows lithography and etching of lower cladding layer <NUM>, nitride layer <NUM> and upper cladding layer <NUM>, <NUM>, i.e., to shape the desired structures to desired dimensions, based on the <FIG> embodiment. As noted, lower cladding layer <NUM> has a lower refractive index than second nitride body <NUM>. The etching in <FIG> forms first nitride body <NUM>, lower cladding layer <NUM> on a lower surface thereof and upper cladding layer <NUM>, <NUM> on upper surface thereof. The etching in <FIG> also forms second nitride body <NUM>, lower cladding layer <NUM> on a lower surface thereof, and cladding layer <NUM>, <NUM> on an upper surface thereof. In either case, the etching may include, for example, a RIE with a mask (not shown). In contrast to the drawings, if second nitride waveguide <NUM> is not required, the etching can remove lower cladding layer <NUM>, nitride layer <NUM> and, if provided, second cladding layer <NUM>, <NUM>, from over ILD <NUM> where second nitride waveguide <NUM> is illustrated, i.e., by leaving that area exposed. In any event, first nitride body <NUM> has a larger vertical dimension than second nitride body <NUM>.

<FIG> shows processing of refilling ILD layer <NUM>, i.e., into trench <NUM>, based on the <FIG> embodiment. <FIG> shows processing after refilling ILD layer <NUM>, i.e., into trench <NUM>, based on the <FIG> embodiment. The refilling may include, for example, gap filling about nitride layer <NUM>, planarizing upper surfaces <NUM>, <NUM> of nitride layer <NUM> or upper cladding layer <NUM>, <NUM>, and forming a topping layer of ILD layer <NUM>. Upper surfaces <NUM>, <NUM> of first nitride waveguide <NUM> and second nitride waveguide <NUM> (where provided) remain within ILD layer <NUM>.

Returning to <FIG>, <FIG>, the figures show processing after refilling ILD layer <NUM>, thus forming/finalizing both first and second nitride waveguides <NUM>, <NUM> based on the <FIG> embodiments. After the gap filling, but prior to the formation of additional topping layer(s) of ILD <NUM> and planarizing thereof, a planarizing can make upper surfaces <NUM>, <NUM> of first and second nitride waveguides <NUM>, <NUM> coplanar (<FIG>, <FIG>), regardless of whether upper surface(s) <NUM>, <NUM> includes the nitride of the nitride bodies of the waveguides, upper cladding layer <NUM> or upper cladding layer <NUM>. Alternatively, the planarization may not extend far enough to make upper surfaces <NUM>, <NUM> of first and second nitride waveguides <NUM>, <NUM> planar (<FIG>, <FIG>), and they may remain non-coplanar. In any event, upper surfaces <NUM>, <NUM> of first and second nitride waveguides <NUM>, <NUM> are within ILD layer(s) <NUM>. <FIG>, <FIG> also show first nitride waveguide <NUM> having a larger vertical dimension, i.e., thickness T1, than second nitride waveguide <NUM>. As noted, first and second nitride waveguides <NUM>, <NUM> are optically side-coupled. At this stage, interconnects <NUM> may be formed in ILD <NUM>, and any back-end-of-line interconnect layers <NUM> can be formed using known techniques.

Returning to <FIG> and with reference to <FIG> shows forming side cladding layer <NUM> on at least one of a sidewall <NUM>, <NUM> of first nitride body <NUM> and a sidewall <NUM>, <NUM> of second nitride body <NUM>. <FIG> is based on the <FIG> embodiment. <FIG> also shows forming side cladding layer <NUM> on at least one of a sidewall <NUM>, <NUM> of first nitride body <NUM> and a sidewall <NUM>, <NUM> of second nitride body <NUM>. <FIG> is based on the <FIG> embodiment. Side cladding layer <NUM> may be deposited using any appropriate technique for the materials listed herein, and multiple deposition steps may be performed. Side cladding layer <NUM> has a lower refractive index than first nitride body <NUM> and second nitride body <NUM> and is of a different material than upper cladding layer(s) <NUM>, <NUM>.

<FIG> show etching back side cladding layer <NUM> of <FIG>, respectively. The etch back may include any appropriate chemistry for side cladding layer <NUM> material, e.g., a directional etching. As shown in <FIG>, at least one segment <NUM> of side cladding layer <NUM> (<FIG>) remains laterally spaced from lower surface <NUM> or end of first nitride waveguide <NUM>. Segments <NUM> are on lateral ends of trench <NUM>.

Returning to <FIG>, the figures show processing after refilling ILD layer <NUM>, thus forming/finalizing both first and second nitride waveguides <NUM>, <NUM> based on the <FIG> embodiment. The refilling, as shown in <FIG>, may include, for example, gap filling (e.g., with a gap fill oxide) about cladding layers <NUM>, <NUM> and/or <NUM> (<FIG>). The gap fill oxide may become part of ILD layer <NUM> and/or additional topping layer(s) of ILD layer <NUM> may be formed. ILD layer(s) <NUM>, <NUM> include different material than cladding layers <NUM>, <NUM>, <NUM>, <NUM>. In any event, an upper surface of ILD layer(s) <NUM> (<FIG>) is planarized, e.g., using chemical mechanical polishing (CMP). After the gap filling, but prior to the formation of additional topping layer(s) of ILD <NUM> and/or <NUM> and planarizing thereof, a planarizing can make upper surfaces <NUM>, <NUM> of first and second nitride waveguides <NUM>, <NUM> coplanar (<FIG>), regardless of whether upper surface(s) <NUM>, <NUM> includes the nitride of the nitride bodies <NUM>, <NUM>, upper cladding layer <NUM> or upper cladding layer <NUM>. Alternatively, the planarization may not extend far enough to make upper surfaces <NUM>, <NUM> of first and second nitride waveguides <NUM>, <NUM> planar (<FIG>), and they may remain non-coplanar. In any event, upper surfaces <NUM>, <NUM> of first and second nitride waveguides <NUM>, <NUM> are within ILD layer(s) <NUM>. <FIG> also show first nitride waveguide <NUM> having a larger vertical dimension, i.e., thickness T1, than second nitride waveguide <NUM>. <FIG> also show at least one segment <NUM> of side cladding layer <NUM> is laterally spaced from lower surface <NUM> or end of first nitride waveguide <NUM>. As noted, first and second nitride waveguides <NUM>, <NUM> are optically side-coupled. At this stage, interconnects <NUM> may be formed in ILD <NUM>, and any back-end-of-line interconnect layers <NUM> can be formed using known techniques.

With further regard to <FIG>, it will be recognized that the processes described can be carried out with side cladding layer <NUM> including the same material as lower cladding layer <NUM> and upper cladding layer <NUM> (where provided, see <FIG> and <FIG>), so all the cladding layers include the same material. <FIG> shows similar processes as described relative to <FIG>, but cladding layers <NUM>, <NUM> and <NUM> are the same material. <FIG> shows similar processes as described relative to the <FIG> embodiments, but occurring from the <FIG> embodiment. In <FIG>, although shown as the same material, cladding layers <NUM> and <NUM> may be the same or different materials, and second cladding layer <NUM> is omitted.

Embodiments of the disclosure provide various technical and commercial advantages, examples of which are discussed herein. As noted, embodiments of the disclosure provide structures and methods having an enlarged multilayer nitride waveguide and a smaller multilayer nitride waveguide. One or more of the multilayer waveguides may include a cladding layer have a lower refractive index than the waveguide(s) on at least a lower surface the waveguide(s). The multilayer waveguides enable monolithic integration of ultra-low propagation loss waveguides, perhaps with silicon waveguides and/or CMOS devices. The cladding layer(s) reduce propagation losses, allow changing of the mode shape within the waveguide, and allow shorter directional coupling (relaxing fabrication requirements) between the waveguides. The multilayer waveguides further enable monolithic integration of ultra-low-loss, large-size nitride waveguides with, for example, silicon waveguides and CMOS devices, allowing full realization of the benefit of ultra-low-loss nitride devices and photonic integrated circuits. The enlarged multilayer waveguide is also less sensitive to fabrication variations than existing nitride waveguides and can handle higher optical power.

The method as described above is used in the fabrication of photonic integrated circuit chips. The resulting photonic integrated circuit chips can be distributed by the fabricator in raw wafer form (that is, as a single wafer that has multiple unpackaged chips), as a bare die, or in a packaged form. In the latter case the chip is mounted in a single chip package (such as a plastic carrier, with leads that are affixed to a motherboard or other higher level carrier) or in a multichip package (such as a ceramic carrier that has either or both surface interconnections or buried interconnections). In any case the chip is then integrated with other chips, discrete circuit elements, and/or other signal processing devices as part of either (a) an intermediate product, such as a motherboard, or (b) an end product. The end product can be any product that includes integrated circuit chips, ranging from toys and other low-end applications to advanced computer products having a display, a keyboard or other input device, and a central processor.

Accordingly, a value modified by a term or terms, such as "about", "approximately" and "substantially," are not to be limited to the precise value specified. "Approximately" as applied to a particular value of a range applies to both values, and unless otherwise dependent on the precision of the instrument measuring the value, may indicate +/-<NUM>% of the stated value(s).

The corresponding structures, materials, acts, and equivalents of all means or step plus function elements in the claims below are intended to include any structure, material, or act for performing the function in combination with other claimed elements as specifically claimed. The description of the present disclosure has been presented for purposes of illustration and description, but is not intended to be exhaustive or limited to the disclosure in the form disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope of the claims. The embodiment was chosen and described in order to best explain the principles of the disclosure and the practical application, and to enable others of ordinary skill in the art to understand the disclosure for various embodiments with various modifications as are suited to the particular use contemplated.

Claim 1:
A structure (<NUM>), comprising:
an inter-level dielectric, ILD, layer (<NUM>) over a substrate (<NUM>); and
a first nitride waveguide (<NUM>) positioned in the ILD layer in a first region (<NUM>) of the substrate, the first nitride waveguide including:
a first nitride body (<NUM>)
characterized in that
said nitride waveguide is a multilayer nitride waveguide further including a first cladding layer (<NUM>) on at least a lower surface (<NUM>) of the first nitride body, wherein
the first cladding layer has a lower refractive index than the first nitride body.