Patent Description:
Harmonic termination has been widely used for compound semiconductor Power Amplifiers (PAs). However, the complexity of harmonic control circuitry may require great efforts for development and verification.

Therefore, there are certain efforts for improving the efficiency performance of Doherty PAs by harmonic load modulation technology, which does not require harmonic control circuitry and simplifies the development of high efficiency PA.

Document "<NPL>, discloses a design of an uneven AB-C Doherty power amplifier (DPA) in GaN technology, implementing an approach to control the higher device harmonics.

Document <CIT> discloses an amplifier arrangement for optimizing efficiency at a peak power level and a back-off power level γ. The amplifier arrangement comprises an input power splitter dividing an input signal into a first signal having a power Pm and a second signal having a power Pa, a main transistor operating in a class-B like mode receiving the first signal, an auxiliary transistor operating in a class-C mode receiving the second signal. The received first and second signals have a phase offset value Θ, wherein -π < Θ < π. The amplifier arrangement further comprises a combining network. Circuit element values of the combining network, the power Pm and the power Pa, the phase offset value Θ, a bias condition of the auxiliary transistor, and a relative size Saux of the auxiliary transistor are based on a predetermined back-off power level γ, a current scaling factor rc of the auxiliary transistor, a main transistor oversizing factor ro,m, and an auxiliary transistor oversizing factor ro,a, where rc < <NUM>, ro,m ≥ <NUM> and ro,a ≥ <NUM>.

Document <CIT> discloses a network that includes an output matching network coupled to an amplifier. The output matching network is configured to transform the at least one amplifier transistor output impedance to an output matching network impedance. A combiner network is coupled to the output matching network. The combiner network includes a first quarter wavelength transmission line coupled between the in-phase signal path and a combiner node. The combiner network further includes a bandwidth enhancement element coupled to the quadrature signal path at the combiner node and an impedance transformation element coupled between the combiner node and a load. The impedance transformation element is configured to substantially transform a combined output matching network impedance at the combiner node to the load impedance.

The summary is provided to introduce a selection of concepts in a simplified form that are further described below in detailed description.

One of the objects of the disclosure is to provide an effective solution for achieving higher efficiency at Doherty Power Amplifier.

In view of the above, one or more methods, devices are provided in the present disclosure. Various embodiments of the present disclosure mainly aim at providing methods,
and device for realizing harmonic load modulation in a Doherty PA. Other features and advantages of the embodiments of the present disclosure will also be understood from the following description of particular embodiments when read in conjunction with the accompanying drawings, which illustrate, by way of example, the principles of embodiments of the present disclosure.

In general, the embodiments of the present disclosure provide a solution for realizing even order harmonic load modulation.

According to the present disclosure, a Doherty power amplifier, a method and a device according to the independent claims are provided. Developments are set forth in the dependent claims.

According to a first aspect of the present disclosure, there is provided a Doherty Power Amplifier comprising a first amplifier and a second amplifier. The Doherty Power Amplifier further comprises a first transmission device, comprising a first quarter wave length transmission line, configured to couple a drain of the first amplifier and a drain of the second amplifier, and feed first even order harmonic components generated at the drain of the first amplifier to the drain of the second amplifier; a second quarter wavelength transmission line, configured to couple the drain of the second amplifier and an output terminal of the second amplifier; and a third quarter wavelength transmission line, configured to couple the output terminal of the second amplifier and ground by connecting in series with a first capacitor, wherein the first even order harmonic components are shorted to ground through a signal path via the first quarter wavelength transmission line, the second quarter wavelength transmission line, the third quarter wavelength transmission line, and the first capacitor; and a second transmission device, comprising the first quarter wavelength transmission line, wherein the first quarter wavelength transmission line is further configured to feed second even order harmonic components generated at the drain of the second amplifier to the drain of the first amplifier; a fourth quarter wavelength transmission line, configured to couple the drain of the first amplifier and an output terminal of the first amplifier; and a fifth quarter wavelength transmission line, configured to couple the output terminal of the first amplifier and ground by connecting in series with a second capacitor, wherein the second even order harmonic components are shorted to ground through a signal path via the first quarter wavelength transmission line, the fourth quarter wavelength transmission line, the fifth quarter wavelength transmission line, and the second capacitor.

According to a second aspect of the present disclosure, there is provided a method at a Doherty Power Amplifier, the Doherty Power Amplifier comprising a first amplifier and a second amplifier, wherein a first quarter wavelength transmission line is configured to couple a drain of the first amplifier and a drain of the second amplifier; a second quarter wavelength transmission line is configured to couple a drain of the second amplifier and an output terminal of the second amplifier; a third quarter wavelength transmission line is configured to couple the output terminal of the second amplifier and ground by connecting in series with a first capacitor; a fourth quarter wavelength transmission line is configured to couple a drain of the first amplifier and an output terminal of the first amplifier; and a fifth quarter wavelength transmission line is configured to couple the output terminal of the first amplifier and ground by connecting in series with a second capacitor. The method comprises feeding first even order harmonic components generated at the drain of the first amplifier to the drain of the second amplifier by the first quarter wavelength transmission line; feeding second even order harmonic components generated at the drain of the second amplifier to the drain of the first amplifier by the first quarter wavelength transmission line; shorting the first even order harmonic components to ground through a signal path via the first quarter wavelength transmission line, the second quarter wavelength transmission line, the third quarter wavelength transmission line, and the first capacitor; and shorting the second even order harmonic components to ground by the first quarter wavelength transmission line, the fourth quarter wavelength transmission line, the fifth quarter wavelength transmission line, and the second capacitor.

According to a third aspect of the
present disclosure, there is provided a device comprising the Doherty Power Amplifier of the first aspect.

Whenever in the following disclosure any of the above-stated aspects (corresponding to the independent claims) is disclosed as "optional" (e.g., due to usage of conjunctive terms, such as "can", "may", "should" etc.), it is nevertheless to be read as "mandatory".

According to various embodiments of the present disclosure, even order harmonic components can be fed to the drain of the amplifier to realize even order harmonic modulation. The even order harmonic components have higher power level than the odd order harmonic components, therefore, higher efficiency could be achieved in Doherty Power Amplifier.

Hereinabove and in the following, "examples" pertain to principles underlying the claimed subject-matter and/or being useful for understanding the claimed subject-matter, while "embodiments" pertain to the claimed subject-matter within the claim scope. The above and other aspects, features, and benefits of various embodiments of the disclosure will become more fully apparent, by way of example, from the following detailed description with reference to the accompanying drawings, in which like reference numerals or letters are used to designate like or equivalent elements.

In the following, whenever an "embodiment" is described, reference is to be made to the above figure list to determine whether the "embodiment" is to be read as a true "embodiment" or as an "example".

As used herein, the term "wireless communication network" refers to a network following any suitable communication standards, such as LTE-Advanced (LTE-A), LTE, Wideband Code Division Multiple Access (WCDMA), High-Speed Packet Access (HSPA), and so on. Furthermore, the communications between a terminal device and a network device in the wireless communication network may be performed according to any suitable generation communication protocols, including, but not limited to, Global System for Mobile Communications (GSM), Universal Mobile Telecommunications System (UMTS), Long Term Evolution (LTE), and/or other suitable, and/or other suitable the first generation (<NUM>), the second generation (<NUM>), <NUM>, <NUM>, the third generation (<NUM>), the fourth generation (<NUM>), <NUM>, the future fifth generation (<NUM>) communication protocols, wireless local area network (WLAN) standards, such as the IEEE <NUM> standards; and/or any other appropriate wireless communication standard, such as the Worldwide Interoperability for Microwave Access (WiMax), Bluetooth, and/or ZigBee standards, and/or any other protocols either currently known or to be developed in the future.

The term "network device" refers to a device in a wireless communication network via which a terminal device accesses the network and receives services therefrom. The network device refers a base station (BS), an access point (AP), or any other suitable device in the wireless communication network. The BS may be, for example, a node B (NodeB or NB), an evolved NodeB (eNodeB or eNB), or gNB, a Remote Radio Unit (RRU), a radio header (RH), a remote radio head (RRH), a relay, a low power node such as a femto, a pico, and so forth. Yet further examples of the network device may include multi-standard radio (MSR) radio equipment such as MSR BSs, network controllers such as radio network controllers (RNCs) or base station controllers (BSCs), base transceiver stations (BTSs), transmission points, transmission nodes. More generally, however, the network device may represent any suitable device (or group of devices) capable, configured, arranged, and/or operable to enable and/or provide a terminal device access to the wireless communication network or to provide some service to a terminal device that has accessed the wireless communication network.

The term "terminal device" refers to any end device that can access a wireless communication network and receive services therefrom. By way of example and not limitation, the terminal device refers to a mobile terminal, user equipment (UE), or other suitable devices. The UE may be, for example, a Subscriber Station (SS), a Portable Subscriber Station, a Mobile Station (MS), or an Access Terminal (AT). The terminal device may include, but not limited to, portable computers, image capture terminal devices such as digital cameras, gaming terminal devices, music storage and playback appliances, a mobile phone, a cellular phone, a smart phone, voice over IP (VoIP) phones, wireless local loop phones, a tablet, a wearable device, a personal digital assistant (PDA), portable computers, desktop computer, image capture terminal devices such as digital cameras, gaming terminal devices, music storage and playback appliances, wearable terminal devices, vehicle-mounted wireless terminal devices, wireless endpoints, mobile stations, laptop-embedded equipment (LEE), laptop-mounted equipment (LME), USB dongles, smart devices, wireless customer-premises equipment (CPE) and the like. In the following description, the terms "terminal device", "terminal", "user equipment" and "UE" may be used interchangeably.

As one example, a terminal device may represent a UE configured for communication in accordance with one or more communication standards promulgated by the 3rd Generation Partnership Project (3GPP), such as 3GPP's GSM, UMTS, LTE, and/or <NUM> standards. As used herein, a "user equipment" or "UE" may not necessarily have a "user" in the sense of a human user who owns and/or operates the relevant device. In some embodiments, a terminal device may be configured to transmit and/or receive information without direct human interaction. For instance, a terminal device may be designed to transmit information to a network on a predetermined schedule, when triggered by an internal or external event, or in response to requests from the wireless communication network. Instead, a UE may represent a device that is intended for sale to, or operation by, a human user but that may not initially be associated with a specific human user.

The terminal device may support device-to-device (D2D) communication, for example by implementing a 3GPP standard for sidelink communication, and may in this case be referred to as a D2D communication device.

As yet another example, in an Internet of Things (IOT) scenario, a terminal device may represent a machine or other device that performs monitoring and/or measurements, and transmits the results of such monitoring and/or measurements to another terminal device and/or network equipment. The terminal device may in this case be a machine-to-machine (M2M) device, which may in a 3GPP context be referred to as a machine-type communication (MTC) device. As one particular example, the terminal device may be a UE implementing the 3GPP narrow band internet of things (NB-IoT) standard. Particular examples of such machines or devices are sensors, metering devices such as power meters, industrial machinery, or home or personal appliances, for example refrigerators, televisions, personal wearable such as watches etc. In other scenarios, a terminal device may represent a vehicle or other equipment that is capable of monitoring and/or reporting on its operational status or other functions associated with its operation.

Before describing the examples illustratively depicted in the several figures, a general introduction is provided for further understanding. With the above general understanding borne in mind, various embodiments are generally described below. Now some exemplary embodiments of the present disclosure will be described below with reference to the figures.

<FIG> shows a schematic diagram of related art to realize odd-harmonic load modulation. As shown in <FIG>, M1 denotes to a Field Effect Transistor (FET) of main amplifier, M2 denotes to a Field Effect Transistor (FET) of peaking amplifier.

The main amplifier originally behaved like a class-AB/-B mode amplifier, in which main VDD supply is connected to a drain of M1 through a quarter wavelength transmission line TLm1. The peaking amplifier originally behaved like a class-C mode amplifier, in which peaking VDD supply is connected to a drain of M2 through a quarter wavelength transmission line TLp1. The drain of M1 and the drain of M2 are coupled by a quarter wavelength transmission line TLD1.

As shown in <FIG>, even order harmonic components generated at the drain of M1 will flow to ground via the quarter wavelength transmission line TLm1 and a capacitor C11.

As shown in <FIG>, even order harmonic components generated at the drain of M2 will be shorted to ground via the quarter wavelength transmission line TLp1 and a capacitor C<NUM>.

As shown in <FIG>, odd order harmonic components generated at the drain of M2 will be fed to the drain of M1 via the quarter wavelength transmission line TLD1, and then flow to ground via the quarter wavelength transmission line TLm1 and the capacitor C11.

The biggest advantage of the Doherty PA in <FIG> is that the odd harmonic components of the peaking amplifier flow into the main amplifier will make the main amplifier behave like a class-F mode amplifier without individual harmonic control circuitry, thus odd harmonic load modulation is realized in Doherty PA. Therefore, high efficiency could be achieved by a simplified and compact circuit.

However, the related art shown in <FIG> has at least the following problems:.

To solve the problems above, a Doherty Power Amplifier, a method and a device are provided in the present disclosure, for realizing even order harmonic load modulation at a Doherty PA.

A Doherty Power Amplifier is provided in these embodiments.

<FIG> shows a Doherty Power Amplifier in accordance with an embodiment of the present disclosure. As shown in <FIG>, a Doherty Power Amplifier <NUM> includes at least a first amplifier <NUM> and a second amplifier <NUM>.

In an embodiment, the Doherty Power Amplifier <NUM> may further include a first transmission device <NUM> and a second transmission device <NUM>.

The first transmission device <NUM> is configured to feed first even order harmonic components generated at a drain of the first amplifier <NUM> to a drain of the second amplifier <NUM>, and then short the first even order harmonic components to ground.

The second transmission device <NUM> is configured to feed second even order harmonic components generated at the drain of the second amplifier <NUM> to the drain of the first amplifier <NUM>, and then short the second even order harmonic components to ground.

According to the embodiment, even order harmonic components can be fed to the drain of the amplifier to realize even order harmonic modulation. The even order harmonic components (e.g. the <NUM>nd order harmonic component) has higher power level than the odd order harmonic components (e.g. the <NUM>rd order harmonic component), therefore, higher efficiency could be achieved than related art, in which odd order harmonic load modulation is realized.

In the embodiment, as shown in <FIG>, the Doherty Power Amplifier <NUM> may be in non-inverted (or standard) Doherty form, and the first amplifier <NUM> could be main amplifier, the second amplifier <NUM> could be peaking amplifier. However, the embodiment does not limit to this, for example, the Doherty Power Amplifier <NUM> could be even Doherty, uneven Doherty, symmetric Doherty, asymmetric Doherty, inverted Doherty or multistage Doherty with more than <NUM> amplifiers.

In the embodiment, as shown in <FIG>, the first transmission device <NUM> may include a first quarter wave length transmission line TLd0.

In the embodiment, a quarter wave length transmission line has a length of <NUM>/<NUM>λ, where λ is the wave length of fundamental frequency signal of generated at the drain of the first amplifier <NUM>.

In the embodiment, the first quarter wave length transmission line TLd0 is configured to couple the drain of the first amplifier <NUM> and the drain of the second amplifier <NUM>, and feed the first even order harmonic components to the drain of the second amplifier <NUM>.

In the embodiment, the first transmission device <NUM> may further include: a second quarter wavelength transmission line TLmp, and a third quarter wavelength transmission line TLp.

In the embodiment, the second quarter wavelength transmission line TLmp is configured to couple the drain of the second amplifier <NUM> and an output terminal of the second amplifier <NUM>.

In the embodiment, the third quarter wavelength transmission line TLp is configured to couple the output terminal of the second amplifier and ground by connecting in series with a first capacitor C<NUM>.

In the embodiment, the first quarter wavelength transmission line TLd0, the second quarter wavelength transmission line TLmp, and the third quarter wavelength transmission line TLp work as a three-quarter wavelength transmission line, which is equivalent to a quarter wavelength transmission line. Therefore, the first even order harmonic components are shorted to ground through a signal path via the first quarter wavelength transmission line TLd0, the second quarter wavelength transmission line TLmp, the third quarter wavelength transmission line TLp, and the first capacitor C<NUM>.

In the embodiment, the second transmission device <NUM> may include the first quarter wavelength transmission line TLd0.

In the embodiment, the first quarter wavelength transmission line TLd0 may also feed the second even order harmonic components to the drain of the first amplifier <NUM>.

In the embodiment, when an input signal of the Doherty PA is small, the second amplifier <NUM> is turned off, only the first even order harmonic components are fed to the drain of the second amplifier <NUM>. When the input signal becomes larger, the second amplifier <NUM> is turned on, therefore, the second even order harmonic components are generated at the drain of the second amplifier <NUM> and fed to the drain of the first amplifier <NUM>.

In the embodiment, the second transmission device <NUM> further includes: a fourth quarter wavelength transmission line TLmm, and a fifth quarter wavelength transmission line TLm.

In the embodiment, the fourth quarter wavelength transmission line TLmm is configured to couple the drain of the first amplifier <NUM> and an output terminal of the first amplifier <NUM>.

In the embodiment, the fifth quarter wavelength transmission line TLm, is configured to couple the output terminal of the first amplifier <NUM> and ground by connecting in series with a second capacitor C<NUM>.

In the embodiment, the first quarter wavelength transmission line TLd0, the fourth quarter wavelength transmission line TLmm, and the fifth quarter wavelength transmission line TLm work as a three-quarter wavelength transmission line, which is equivalent to a quarter wavelength transmission line from impedance transformation perspective. Therefore, the second even order harmonic components are shorted to ground through a signal path via the first quarter wavelength transmission line TLd0, the fourth quarter wavelength transmission line TLmm, the fifth quarter wavelength transmission line TLm, and the second capacitor C<NUM>.

In the embodiment, the fourth quarter wavelength transmission line TLmm, and the fifth quarter wavelength transmission line TLm work as a half wavelength transmission line. Therefore, the first odd order harmonic components generated at the drain of the first amplifier <NUM> are shorted to ground through a signal path via the fourth quarter wavelength transmission line TLmm, the fifth quarter wavelength transmission line TLm, and the second capacitor C<NUM>.

In the embodiment, the second quarter wavelength transmission line TLmp, and the third quarter wavelength transmission line TLp work as a half wavelength transmission line. Therefore, the second odd order harmonic components generated at the drain of the second amplifier <NUM> are shorted to ground through a signal path via the second quarter wavelength transmission line TLmp, the third quarter wavelength transmission line TLp, and the first capacitor C<NUM>.

In the embodiment, the second amplifier <NUM> could be biased by a supply VDD2 to work in a class-C mode. The first amplifier <NUM> could be biased by a supply VDD1 to originally work in a class-AB/-B mode.

At the drain of the first amplifier <NUM>, the second even order harmonic components from the second amplifier <NUM> exhibit an open-circuit terminated due to (TLm + TLmm) half wavelength transmission line. Therefore, the first amplifier <NUM> would behave like a class-F-<NUM> mode rather than a class-AB/-B mode.

As shown in <FIG>, the Doherty Power Amplifier <NUM> may further include a combiner <NUM>.

In the embodiment, the combiner <NUM> is configured to combine a first output signal at the output terminal of the first amplifier <NUM> and a second output signal at the output terminal of the second amplifier <NUM>.

In one embodiment, as shown in <FIG>, the combiner <NUM> may include a sixth quarter wavelength transmission line TLd1. The sixth quarter wavelength transmission line TLd1 is configured to couple the output terminal of the first amplifier <NUM> and the output terminal of the second amplifier <NUM> by connecting in series with a third capacitor C<NUM>. The sixth quarter wavelength transmission line TLd1 may also play a role of an impedance inverter to perform impedance inversion on the first output signal and the second output signal.

As shown in <FIG>, the Doherty Power Amplifier <NUM> may further include an open circuited stub TLo. The open circuited stub TLo with a specific electrical length θ has the same impedance as the first amplifier <NUM> output impedance. The open circuited stub TLo could play a role of offset line. The open circuited stub TLo has the same effect as placing transmission lines of electrical length θ in series with an output matching networks at output terminal of the first amplifier and the second amplifier.

The open circuited stub TLo could be replaced by an equivalent circuit, such a shunt capacitor, inductor or parallel inductance-capacitance (L-C) circuit, whose susceptance could be varied to effectively "tune" the lengths of TLmm and TLmp. This tuning can be used to compensate for the inability to accurately predict an optimum θ offset value, and to effectively adjust value of θ as required to compensate for changes in other circuit characteristics.

As shown in <FIG>, the Doherty Power Amplifier <NUM> may further include a hybrid coupler <NUM>.

The hybrid coupler <NUM> may be at input terminal of the Doherty Power Amplifier <NUM>. The hybrid coupler <NUM> may be configured to split an input radio frequency signal into two signals, and feed the two signals to the first amplifier and the second amplifier with a predetermined power ratio, respectively. For example, the predetermined power ratio could be <NUM>:<NUM>.

As shown in <FIG>, the hybrid coupler <NUM> may connect to an isolation load <NUM>, which will improve the stability of the hybrid coupler <NUM>.

According to the embodiment, at a fundamental frequency, the first amplifier <NUM> and the second amplifier <NUM> interact in a Doherty way so Z0d0 (the impedance of TLd0) and Z0d1 (the impedance of TLd1) are set to a proper ratio to match a final load impedance ZL. Since all the odd order harmonic components of both first and second amplifiers are shunted to ground, there is no interaction between the first and second amplifiers at odd order harmonics. Because the even order harmonic components from the second amplifier <NUM> flow through TLd0, TLmm and TLm, the even order harmonic components standing waves are established on TLd0 at the drain of the first amplifier <NUM>. Current waveforms of the even order harmonic components have square shapes, therefore, the even order harmonic components fed to the drain of the first amplifier <NUM> could "square" the first amplifier <NUM> drain current waveform due to the harmonic load modulation effect, while the first amplifier <NUM> drain voltage waveforms would be half sine wave like.

In the embodiment, the Doherty PA <NUM> is simulated in <NUM>-<NUM> band to show the harmonic load modulation effect. <FIG> depicts drain voltage waveforms <NUM> in the first amplifier and drain voltage waveforms <NUM> in the second amplifier at <NUM> for various input power levels. <FIG> depicts drain current waveforms in the first amplifier at <NUM> for various input power levels.

<FIG> shows the "squaring" effect on the drain current waveforms <NUM> of the first amplifier (<FIG>). However, the "squaring" effect does not affect drain voltage waveforms <NUM> of the first amplifier as shown in <FIG>. Therefore, it indicates that the effect of even order harmonic load modulation effect in the embodiment is similar to "Class-F-<NUM>" mode. The efficiency of the Doherty PA is increased by "squaring" the current waveform.

As shown in <FIG>, even order harmonic components generated in the second amplifier <NUM> are fed to the first amplifier via a quarter wave length transmission line so that a quasi-class-F-<NUM> operation of the first amplifier could be realized. It is a kind of even order harmonic load modulation without any traditional harmonic terminations.

<FIG> shows the simulated power added efficiency and fundamental output power of the Doherty PA at <NUM>.

In <FIG>, line <NUM> denote the power added efficiency (PAE). As shown in <FIG>, line <NUM> has a peak when the fundamental output power is in a region of <NUM>-<NUM>, which means the efficiency in Doherty region could be enhanced due to the interactions of the first amplifier and the second amplifier.

As can be seen from the embodiments, even order harmonic components can be fed to the drain of the amplifier to realize even order harmonic modulation. The even order harmonic components (e.g. the <NUM>nd order harmonic component) has higher power than the odd order harmonic components (e.g. the <NUM>rd order harmonic component), therefore, higher efficiency could be achieved than related art, in which odd order harmonic modulation is realized.

It is to be understood that the above examples or embodiments are discussed for illustration only, rather than limitation. Those skilled in the art would appreciate that there may be many other embodiments or examples within the scope of the present disclosure.

A method at a Doherty Power Amplifier is provided in these embodiments. The Doherty Power Amplifier is provided in the first aspect of embodiments, and the same contents as those in the first aspect of embodiments are omitted.

<FIG> shows a flowchart of the method <NUM> implemented at a Doherty Power Amplifier in accordance with the embodiment of the present disclosure. As shown in <FIG>, the method <NUM> includes: Block <NUM>: first even order harmonic components generated at a drain of the first amplifier are fed to a drain of the second amplifier, and then shorted to ground; and Block <NUM>: second even order harmonic components generated at the drain of the second amplifier are fed to the drain of the first amplifier, and then shorted to ground.

In an embodiment, the block <NUM> may include: the first even order harmonic components are fed to the drain of the second amplifier by a first quarter wavelength transmission line (TLd0) coupling the drain of the first amplifier and the drain of the second amplifier, and the first even order harmonic components are shorted to ground through a signal path via the first quarter wavelength transmission line (TLd0), a second quarter wavelength transmission line (TLmp), a third quarter wavelength transmission line (TLp), and a first capacitor (C<NUM>).

In an embodiment, the block <NUM> may include: the second even order harmonic components are fed to the drain of the first amplifier by the first quarter wavelength transmission line (TLd0); and the second even order harmonic components are fed to ground by the first quarter wavelength transmission line (TLd0), a fourth quarter wavelength transmission line (TLmm), a fifth quarter wavelength transmission line (TLm), and a second capacitor (C<NUM>).

As shown in <FIG>, the method <NUM> further includes Block <NUM>: first odd order harmonic components generated at the drain of the first amplifier are shorted to ground through a signal path via the fourth quarter wavelength transmission line (TLmm), the fifth quarter wavelength transmission line (TLm), and the second capacitor (C<NUM>).

As shown in <FIG>, the method <NUM> further includes Block <NUM>: second odd order harmonic components generated at the drain of the second amplifier are short to ground by the second quarter wavelength transmission line (TLmp), the third quarter wavelength transmission line (TLp), and the first capacitor (C<NUM>).

As shown in <FIG>, the method <NUM> further includes Block <NUM>: a first output signal at the output terminal of the first amplifier and a second output signal are combined at the output terminal of the second amplifier.

As shown in <FIG>, the method <NUM> further includes Block <NUM>: an input radio frequency signal is split into two signals, and the two signals are fed to the first amplifier and the second amplifier with predetermined power ratio, respectively.

As can be seen from the embodiment, even order harmonic components can be fed to the drain of the amplifier to realize even order harmonic modulation. The even order harmonic components (e.g. the <NUM>nd order harmonic component) has higher power level than the odd order harmonic components (e.g. the <NUM>rd order harmonic component), therefore, higher efficiency could be achieved than related art, in which the odd order harmonic modulation is realized.

A device in a wireless communication system is provided in these embodiments.

<FIG> shows a simplified block diagram of a device <NUM> in a wireless communication system in accordance with an embodiment of the present disclosure. It would be appreciated that the device <NUM> may be implemented as at least a part of, for example, a network device or a terminal device.

As shown in <FIG>, the device <NUM> includes: a communicating means <NUM> and a processing means <NUM>. The processing means <NUM> includes a data processor (DP) <NUM>, and a memory (MEM) <NUM> coupled to the DP <NUM>. The communicating means <NUM> is coupled to the DP <NUM> in the processing means <NUM>. The MEM <NUM> stores a program (PROG) <NUM>. The communicating means <NUM> is for communications with other devices, which may be implemented as a transceiver for transmitting/receiving signals.

In some embodiments, the device <NUM> acts as a network device, the processing means <NUM> may be configured to perform signal processing to an input signal and obtain an output signal, and the communicating means <NUM> may be configured to transmit the output signal or receive an output signal transmitted by a terminal device.

In some other embodiments, the device <NUM> acts as a terminal device, the processing means <NUM> may be configured to perform signal processing to an input signal and obtain an output signal, and the communicating means <NUM> may be configured to transmit the output signal or receive an output signal transmitted by a network device.

The PROG <NUM> is assumed to include program instructions that, when executed by the associated DP <NUM>, enable the device <NUM> to operate in accordance with the embodiments of the present disclosure, as discussed herein with the above methods. The embodiments herein may be implemented by computer software executable by the DP <NUM> of the device <NUM>, or by hardware, or by a combination of software and hardware. A combination of the data processor <NUM> and MEM <NUM> may form processing means <NUM> adapted to implement various embodiments of the present disclosure.

The MEM <NUM> may be of any type suitable to the local technical environment and may be implemented using any suitable data storage technology, such as semiconductor based memory devices, magnetic memory devices and systems, optical memory devices and systems, fixed memory and removable memory, as non-limiting examples. While only one MEM is shown in the device <NUM>, there may be several physically distinct memory modules in the device <NUM>. The DP <NUM> may be of any type suitable to the local technical environment, and may include one or more of general purpose computers, special purpose computers, microprocessors, digital signal processors (DSPs) and processors based on multicore processor architecture, as non-limiting examples.

It will be appreciated that embodiments of the invention described herein may be comprised of one or more conventional processors and unique stored program instructions that control the one or more processors to implement, in conjunction with certain non-processor circuits, some, most, or all of the functions of generating a multicarrier communication signal having a reduced crest factor as described herein. The non-processor circuits may include, but are not limited to, a radio transmitter, signal drivers, clock circuits, power source circuits, and user input devices. As such, these functions may be interpreted as blocks of a method for generating a signal having a reduced crest factor. Further, it is expected that one of ordinary skill, notwithstanding possibly significant effort and many design choices motivated by, for example, available time, current technology, and economic considerations, when guided by the concepts and principles disclosed herein will be readily capable of generating such software instructions and programs and integrated circuits (ICs) with minimal experimentation.

For example, one or more of the examples described herein may be implemented in a field programmable gate array (FPGA), typically includes an array of programmable tiles. These programmable tiles can include, for example, input/output blocks (IOBs), configurable logic blocks (CLBs), dedicated random access memory blocks (BRAMs), multipliers, digital signal processing blocks (DSPs), processors, clock managers, delay lock loops (DLLs), and so forth.

Each programmable tile typically includes both programmable interconnect and programmable logic. The programmable interconnect typically includes a large number of interconnect lines of varying lengths interconnected by programmable interconnect points (PIPs). The programmable logic implements the logic of a user design using programmable elements that can include, for example, function generators, registers, arithmetic logic, and so forth.

The programmable interconnect and programmable logic are typically programmed by loading a stream of configuration data into internal configuration memory cells that define how the programmable elements are configured. The configuration data can be read from memory (e.g., from an external PROM) or written into the FPGA by an external device. The collective states of the individual memory cells then determine the function of the FPGA.

While various aspects of embodiments of the present disclosure are illustrated and described as block diagrams, flowcharts, or using some other pictorial representation, it will be appreciated that the blocks, apparatus, systems, techniques or methods described herein may be implemented in, as non-limiting examples, hardware, software, firmware, special purpose circuits or logic, general purpose hardware or controller or other computing devices, or some combination thereof.

By way of example, embodiments of the present disclosure can be described in the general context of machine-executable instructions, such as those included in program modules, being executed in a device on a target real or virtual processor. Generally, program modules include routines, programs, libraries, objects, classes, components, data structures, or the like that perform particular tasks or implement particular abstract data types. The functionality of the program modules may be combined or split between program modules as desired in various embodiments. Machine-executable instructions for program modules may be executed within a local or distributed device. In a distributed device, program modules may be located in both local and remote storage media.

The above program code may be embodied on a machine readable medium, which may be any tangible medium that may contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine readable medium may be a machine readable signal medium or a machine readable storage medium. The machine readable medium may include but not limited to an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing.

More specific examples of the machine readable storage medium would include an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

In the context of this disclosure, the device may be implemented in the general context of computer system-executable instructions, such as program modules, being executed by a computer system. Generally, program modules may include routines, programs, objects, components, logic, data structures, and so on that perform particular tasks or implement particular abstract data types. The device may be practiced in distributed cloud computing environments where tasks are performed by remote processing devices that are linked through a communications network. In a distributed cloud computing environment, program modules may be located in both local and remote computer system storage media including memory storage devices.

Although the present disclosure has been described in language specific to structural features and/or methodological acts, it is to be understood that the present disclosure defined in the appended claims is not necessarily limited to the specific features or acts described above.

Claim 1:
A Doherty Power Amplifier (<NUM>), the Doherty Power Amplifier comprising a first amplifier (<NUM>) and a second amplifier (<NUM>), the Doherty Power Amplifier further comprising:
a first transmission device (<NUM>), comprising:
- a first quarter wave length transmission line (TLd0), configured to couple a drain of the first amplifier and a drain of the second amplifier, and feed first even order harmonic components generated at the drain of the first amplifier to the drain of the second amplifier;
- a second quarter wavelength transmission line (TLmp), configured to couple the drain of the second amplifier and an output terminal of the second amplifier; and
- a third quarter wavelength transmission line (TLp), configured to couple the output terminal of the second amplifier and ground by connecting in series with a first capacitor (C<NUM>),
wherein the first even order harmonic components are shorted to ground through a signal path via the first quarter wavelength transmission line (TLd0), the second quarter wavelength transmission line (TLmp), the third quarter wavelength transmission line (TLp), and the first capacitor (C<NUM>); and
a second transmission device (<NUM>), comprising:
- the first quarter wavelength transmission line (TLd0), wherein the first quarter wavelength transmission line (TLd0) is further configured to feed second even order harmonic components generated at the drain of the second amplifier to the drain of the first amplifier;
- a fourth quarter wavelength transmission line (TLmm), configured to couple the drain of the first amplifier and an output terminal of the first amplifier; and
- a fifth quarter wavelength transmission line (TLm), configured to couple the output terminal of the first amplifier and ground by connecting in series with a second capacitor (C<NUM>),
wherein the second even order harmonic components are shorted to ground through a signal path via the first quarter wavelength transmission line (TLd0), the fourth quarter wavelength transmission line (TLmm), the fifth quarter wavelength transmission line (TLm), and the second capacitor (C<NUM>).