Patent Description:
A global navigation satellite system (GNSS) receiver receives a satellite signal transmitted from a GNSS satellite constellation through an antenna. A next generation GNSS receiver requires operation at two frequency bands. A microstrip patch antenna with a stacked structure and a single feed may be used for the purpose of dual-band operation.

Manufacturing of an antenna with a stacked structure requires molding two separate ceramic layers, adding metallization onto both ceramic layers, and then assembling the two antenna layers. This increases the size and cost of the antenna.

<CIT> discloses an antenna device capable of receiving circularly polarized waves of two frequencies and capable of suppressing the number of feeding points.

<CIT> discloses an antenna unit including a square radiation patch configured to form a first surface current on the patch in response to the fundamental mode excitation signal, and a second surface current on the patch in response to a higher-order excitation signal.

<CIT> discloses a microstrip antenna transceiver with switchable polarizations.

<CIT> discloses a single-feed, multi-frequency, multi-polarization antenna having inductive coupling between inner and outer patches.

<CIT> discloses a slotted patch antenna capable of accommodating required transmission/reception bands by virtue of an increased degree of freedom of setting of the two transmission/reception bands.

According to some embodiments of the present disclosure, there is provided an antenna as defined by claim <NUM>.

According to some embodiments of the present disclosure, there is also provided a device. The device includes: a housing; a printed circuit board; and an antenna as defined by claim <NUM> attached to the printed circuit board and disposed inside the housing.

According to some embodiments of the present disclosure, there is further provided an apparatus. The apparatus includes a patch antenna
as defined by claim <NUM>; and a receiver configured to process signals received from the antenna and provide positioning information.

Instead, they are merely examples of systems, apparatuses, and methods consistent with aspects related to the present disclosure as recited in the appended claims.

A global navigation satellite system (GNSS) receiver receives a satellite signal transmitted from a GNSS satellite constellation through an antenna. A next generation GNSS receiver requires operation at two frequency bands. Thus, it is desirable to design an antenna that can be operated at the two frequency bands. For example, some L1/L5 standard precision GNSS (SPG) products (e.g., for asset tracking) need an antenna that covers an L1 frequency band (<NUM>) and an L5 frequency band (<NUM>). A microstrip patch antenna with a stacked structure and a single feed may be used for the purpose of dual-band operations. However, manufacturing an antenna with a stacked structure requires molding two separate ceramic layers, adding metallization onto both ceramic layers, and then assembling the two antenna layers. This increases the size and cost of the antenna. In view of the increased size and cost, the present inventors determined it would be desirable to design a compact, single-layer structure antenna covering two frequency bands with a low cost of production.

Moreover, circularly polarized antennas are desirable in GNSS receiver applications, and a right-hand circularly polarized antenna is preferred in many applications owing to its ability to mitigate errors due to multipath signals. However, a conventional microstrip patch antenna, e.g., with a patch chamfer formed at corners of a patch layer, may only provide left-hand circularly polarized antennas.

Embodiments of the present disclosure provide a compact microstrip patch antenna that can be operated in two resonant frequencies. The antenna includes a slot formed in a single patch layer and a feed point positioned off a center line of the patch layer. The slot includes two rectangular legs that are connected to each other and are symmetric about the center line of the patch layer. The patch layer includes a pair of chamfers. The slot also includes a chamfer at its corner. The antenna includes a substrate on which the patch layer is formed, and the substrate is made of a dielectric material with a moderately high dielectric constant (e.g., <NUM>-<NUM>). Embodiments disclosed herein have one or more technical effects. Utilizing a substrate made of a dielectric material with a moderately high dielectric constant allows for a reduced size of the antenna. Forming a slot in the patch layer provides two regions of the patch layer that can excite two resonant frequencies, thereby eliminating the need for a stacked structure, leading to a reduced size and a reduced cost. Forming chamfers at the two regions of the patch layer and adjusting the orientation of the slot allows for excitation of right-hand circular polarization, ensuring enhanced mitigation of errors due to multipath signals and accuracy of the measurements. By selecting a proper position, size, and shape of the slot and a position of the feed point, the antenna may be operated in non-dominant modes, thereby enhancing efficiency of the antenna. The form factor of the antenna allows for the antenna to fit in a standard GNSS L1 antenna housing, leading to enhanced compatibility and flexibility.

<FIG> is a schematic diagram illustrating a three-dimensional view of an antenna <NUM> and <FIG> is a schematic diagram illustrating a front view of antenna <NUM>, consistent with some embodiments of the present disclosure. Referring to <FIG>, antenna <NUM> includes a substrate <NUM>, a conductive layer <NUM> disposed on a top surface of substrate <NUM>, a slot <NUM> formed in conductive layer <NUM>, and a feed point <NUM>. As shown in <FIG>, substrate <NUM> is mounted on a ground plane <NUM>. In an embodiment, ground plane <NUM> may be a conductive plate such as a metal sheet. In an embodiment, substrate <NUM> may have a metallization layer on a bottom surface opposite the top surface thereof. <FIG> also shows a scale bar <NUM>.

In an embodiment, substrate <NUM> may be made of a dielectric material with a high dielectric constant, to reduce the size of antenna <NUM>. In another embodiment, substrate <NUM> may be made of a dielectric material with a moderately high dielectric constant, to improve the gain of antenna <NUM> while also reducing the size of the antenna. For example, a dielectric material with a dielectric constant around <NUM> may be used as the substrate. Specifically, the dielectric constant may be greater than <NUM> and less than <NUM>. Optionally, it may be greater than or equal to <NUM> and less than <NUM>. In some embodiments, it may be equal to <NUM>. However, the selection of the dielectric material for substrate <NUM> is not so limited, any dielectric material with a dielectric constant between <NUM> to <NUM> can be used. The top or bottom surface of substrate <NUM> may have a square, rectangular, circular, or any other shape. The dielectric material may include ceramics, polymers, or any other materials having a suitable dielectric constant.

Conductive layer <NUM> may be a metal or metal alloy that forms a patch layer. For example, conductive layer <NUM> may be a copper layer. However, conductive layer <NUM> is not so limited. Any material having a suitable conductivity can be used as conductive layer <NUM>. Conductive layer <NUM> may be formed by thin-film deposition or plating or any other method known in the art. In an embodiment, as shown in <FIG>, conductive layer <NUM> has a square shape. Two corners in a diagonal direction of conductive layer <NUM> are truncated to form a pair of patch chamfers 114a and 114b. In an embodiment, the patch chamfers 114a and 114b are formed by cutting two isosceles right triangles from the square-shaped conductive layer <NUM>. The shape of conductive layer <NUM> is not limited to a square, and instead can be rectangular or any other shape. The pair of patch chamfers 114a and 114b provide excitation of two orthogonal signals which form circular polarization by a <NUM>-degree phase shift of the signals.

Feed point <NUM> may be off-centered relative to the periphery of conductive layer <NUM>. Feed point <NUM> is positioned off from center lines (e.g., horizontal, vertical and/or diagonal center lines) of conductive layer <NUM>. Signals may be fed to conductive layer <NUM> through a feed pin (not shown) or a coaxial cable (not shown) connected to feed point <NUM>. The impedance of conductive layer <NUM> can be adjusted by adjusting the separation distance between feed point <NUM> and the center of conductive layer <NUM>. In addition, the resonant frequency of conductive layer <NUM> can be controlled by adjusting the position of feed point <NUM> on conductive layer <NUM>.

In an embodiment, slot <NUM> has an L shape and includes a rectangular leg 106a extending in a horizontal direction and a rectangular leg 106b extending in a vertical direction, as viewed in <FIG>. In an embodiment, slot <NUM> may be formed by etching or electropolishing a portion of conductive layer <NUM>, or by any other method known in the art. In another embodiment, slot <NUM> may be formed by selectively forming conductive layer <NUM> at predesigned areas on substrate102 by screen printing or by any other method known in the art. Feed point <NUM> may be spaced from rectangular leg 106a and rectangular leg 106b by a predetermined distance. In an embodiment, rectangular leg 106a and rectangular leg 106b may have the same length and width. Rectangular leg 106a and rectangular leg 106b are substantially perpendicular to each other and connected to each other at a corner. As used herein, "substantially perpendicular" may refer to an angle between rectangular leg 106a and rectangular leg 106b in the range of <NUM>°-<NUM>°. Slot <NUM> may be positioned in such a way that rectangular leg 106a and rectangular leg 106b are symmetric to each other about a diagonal of conductive layer <NUM> connecting chamfers 114a and 114b. A portion of conductive layer <NUM> at the corner of slot <NUM> is truncated to form a slot chamfer <NUM>. The portion of conductive layer <NUM> at the corner of slot <NUM> may be truncated generally in the form of an isosceles right triangle. However, the position of slot <NUM> is not so limited, and can be anywhere on conductive layer <NUM>. By forming slot <NUM> having chamfer <NUM>, a corner-truncated patch area that is smaller than the area of conductive layer <NUM> is formed within conductive layer <NUM>. For convenience, conductive layer <NUM> having chamfers 114a and 114b is referred to as the "larger patch" hereinafter. A "smaller patch" is surrounded by rectangular legs 106a, 106b, and the two sides of conductive layer <NUM> facing chamfer <NUM>. The smaller patch includes two truncated corners, i.e., chamfer <NUM> and chamfer 114b.

In an embodiment, slot <NUM> is placed such that the smaller patch has a square shape. In an embodiment, the position of slot <NUM> is adjusted such that the smaller patch has a desired area and thus desired resonant frequency. The resonant frequency of the smaller patch can also be adjusted by adjusting the position of feed point <NUM> on conductive layer <NUM>.

Formation of the two patches with different sizes allows for excitation of two modes that are resonant at the two different frequencies: the smaller patch excites a higher frequency and the larger patch excites a lower frequency. The chamfers of the two patches allow for each of the two patches to obtain circular polarization. In an embodiment, a right-hand circular polarization or a left-hand circular polarization is selected by adjusting the orientation of slot <NUM>. In an embodiment, the shape, size, and position of slot <NUM> are designed such that antenna <NUM> provides desired dual-band resonant frequencies. In an embodiment, the position of feed point <NUM> can be determined such that antenna <NUM> provides desired dual-band resonant frequencies. By utilizing an L-shaped slot with a slot chamfer on the patch layer, a compact dual-band circularly polarized antenna is obtained at the cost and size of a standard microstrip patch antenna. For example, utilizing a substrate made of a dielectric material with a moderately high dielectric constant allows for reduced size of the antenna. Forming a slot in the patch layer provides two patch areas that can excite two different resonant frequencies, thereby eliminating the need for a stacked structure, resulting in a reduced size and cost. Forming chamfers at the two patch areas and adjusting the orientation of the slot allow for excitation of right-hand circular polarization, ensuring enhanced mitigation of errors due to multipath signals and accuracy of the measurements. Moreover, the slot may function as an inductive load, thereby further reducing the size of the antenna.

<FIG> is a schematic diagram illustrating a simulated instantaneous electric field formed at an excitation of the L1 frequency band (<NUM>) at antenna <NUM>, consistent with some embodiments of the present disclosure. As shown in <FIG>, for the L1 frequency band, a mode with the smaller patch area is excited.

<FIG> is a schematic diagram illustrating a simulated instantaneous electric field formed at an excitation of the L5 frequency band (<NUM>) at antenna <NUM>, consistent with some embodiments of the present disclosure. As shown in <FIG>, for the L5 frequency band, a mode with the larger patch area is excited.

<FIG> is a plot illustrating an input impedance as a function of frequency in antenna <NUM>, consistent with some embodiments of the present disclosure. <FIG> shows three dominant modes at frequency ranges of <NUM>-<NUM>, <NUM>-<NUM>, and <NUM>-<NUM>, respectively. <FIG> also shows two non-dominant modes at frequency ranges of <NUM>-<NUM> and <NUM>-<NUM>, respectively. As shown in <FIG>, the magnitude of the input impedance at an antenna port is much smaller for the non-dominant modes compared to the dominant modes. The two non-dominant modes at the frequency ranges of <NUM>-<NUM> and <NUM>-<NUM> correspond to L5 and L1 frequencies, respectively. In an embodiment, a shape, size, and position of slot <NUM> and a position of feed point <NUM> of antenna <NUM> are designed so that the non-dominant modes are excited in the antenna. For example, for the excitation of the non-dominant modes, slot <NUM> can be placed in a position close to the center of conductive layer <NUM> (<FIG>), rather than close to the edge of conductive layer <NUM>. In this manner, a current density between slot <NUM> and the edges of conductive layer <NUM> is reduced, leading to an enhanced efficiency of the antenna. Also, at the non-dominant modes, slot <NUM> functions as an inductive load, thereby further reducing the size of the antenna <NUM>. In the non-dominant modes, the frequency ratio L1/L5 is about <NUM> and simulated efficiency is above <NUM>%.

In another embodiment, a shape, size, and position of slot <NUM> and a position of feed point <NUM> are designed so that the dominant modes are excited. For example, slot <NUM> may be placed in a position close to the edges of conductive layer <NUM> or feed point <NUM> may be placed in a position close to the center of conductive layer <NUM>.

In an embodiment, antenna <NUM> in <FIG> may be designed for use at frequencies other than the L1/L5 frequency bands. For example, the L1/L2 frequency bands or any other different combinations of frequencies may be used. In an embodiment, antenna <NUM> may capture L1/L2C bands of global positioning system (GPS) or E1/E5b bands of Galileo (European Union's satellite system) or B1C/B2b bands of BeiDou (Chinese satellite system). Antenna <NUM> may also track the L1OF/L2OF bands of GLONASS (Russian satellite system) at low carrier-to-noise density ratios of signals (CN<NUM>).

<FIG> is a schematic diagram illustrating a front view of an antenna <NUM> with annotated dimensions, and <FIG> is a Table <NUM> listing exemplary values of the annotated dimensions, consistent with some embodiments of the present disclosure. Antenna <NUM> has the same structure as antenna <NUM> in <FIG>, and thus, the reference numbers for the elements of antenna <NUM> are the same as that of antenna <NUM>. For brevity, the reference numbers for antenna <NUM> are omitted. Referring to <FIG>, lsubstrate denotes a length of substrate <NUM>, hsubstrate (not shown) denotes a height of substrate <NUM>, lpatch denotes a length of conductive layer <NUM>, cpatch denotes a side length of an isosceles right triangle cut from the corners of conductive layer <NUM> to form patch chamfers, dslot denotes a separation distance between an outer edge of slot <NUM> and an edge of conductive layer <NUM> facing the outer edge of the slot, lslot denotes a length of a rectangular leg of slot <NUM> including the length of chamfer portion, wslot denotes a width of a rectangular leg of slot <NUM>, cslot denotes a side length of isosceles right triangle cut from a corner of slot <NUM> to form slot chamfer <NUM>, xfeed denotes a x-coordinate of feed point <NUM> in a x-y coordinate system with the center of conductive layer <NUM> as the origin, and yfeed denotes a y-coordinate of feed point <NUM> in the x-y coordinate system. Referring to <FIG>, the first column indicates the annotated dimensions of <FIG>, the second column indicates the definitions of the annotated dimensions, the third column indicates exemplary values of the annotated dimensions, and the last column indicates exemplary ranges of the annotated dimensions. In an exemplary embodiment, a form factor of the antenna may be 24x24x5 mm<NUM> so that the antenna fits in a standard GNSS L1 antenna housing.

In an embodiment, dual-band antenna properties are simulated using the dimensions listed in the third column of Table <NUM>. The diameter of ground plane <NUM> (<FIG>) used in this simulation is about <NUM> and the form factor of the antenna is 24x24x5 mm<NUM>. The simulation results are shown in <FIG> below.

<FIG> is a plot illustrating a simulated reflection coefficient (S11) of an antenna as a function of frequency, consistent with some embodiments of the present disclosure. The parameters of the antenna are shown in the third column of Table <NUM> of <FIG>. A reflection coefficient or return loss represents how much power is reflected from the antenna. For example, if S11 = <NUM> dB, then all the power is reflected from the antenna and no power is radiated. <FIG> also shows x-coordinates (frequencies) and y-coordinates (S11) of six points m1-m6 on the plot. As shown in <FIG>, S11 shows peaks at <NUM> and <NUM>, indicating a good match with the L5 frequency band and L1 frequency band, respectively.

<FIG> is a plot illustrating a simulated radiation pattern of an antenna at an L1 frequency, and <FIG> is a plot illustrating a simulated radiation pattern of the antenna at an L5 frequency, consistent with some embodiments of the present disclosure. The parameters of the antenna are shown in the third column of Table <NUM> of <FIG>. <FIG> show that the total realized gain has a maximum toward the zenith direction (upward or sky-facing direction).

<FIG> is a plot illustrating simulated realized gains towards a zenith direction of an antenna as a function of frequency, consistent with some embodiments of the present disclosure. <FIG> shows three different realized gains: a realized gain for left hand circularly polarized (LHCP) signals, a realized gain for right hand circularly polarized (RHCP) signals, and a total realized gain (combination of the realized gain for the RHCP signals and the realized gain for the RHCP signals). As shown in <FIG>, the total realized gain has a maximum gain of above 4dB at both central frequencies (L1 and L5), and the realized gain for the RHCP signals is greater than the realized gain for the LHCP signals.

<FIG> is a schematic diagram illustrating tuning an antenna <NUM>, consistent with some embodiments of the present disclosure. In an embodiment, antenna <NUM> has the same structure as antenna <NUM> in <FIG>, and thus, the reference numbers for the elements of antenna <NUM> are the same as that of antenna <NUM>. For brevity, the reference numbers for the elements of antenna <NUM> are omitted. In an embodiment, an end-of-line tuning of the antenna element may be performed by removing a portion of conductive layer <NUM> at an appropriate position to shift up or down the resonant frequencies. <FIG> shows determined appropriate positions at which the two resonant frequencies L1 and L5 can be tuned independently. For example, if the resonant frequency at L5 is too high, a portion of conductive layer <NUM> in the regions marked as "L5 down" may be removed. Similarly, if the resonant frequency at L1 is too high, a portion of conductive layer <NUM> in the regions marked as "L1 down" may be removed. The removal of portions of conductive layer <NUM> may be done by a method known in the art (e.g., etching, polishing, etc.), until the resonant frequencies match the desired resonant frequencies. Similarly, if the resonant frequency at L1 or L5 is too low, portions of conductive layer <NUM> in the regions marked as "L1 up" or "L5 up" may be removed.

<FIG> is a schematic diagram illustrating a front view of an antenna <NUM> having two feed points, consistent with some embodiments of the present disclosure. In an embodiment, antenna <NUM> has the same structure as antenna <NUM> in <FIG>, and thus, the reference numbers for the elements of antenna <NUM> are the same as that of antenna <NUM>. Antenna <NUM> implements a dual-feed points to excite two orthogonal modes at each frequency. For example, as shown in <FIG>, antenna <NUM> includes a first feed point <NUM> that generates a first polarized signal; and a second feed point <NUM> that generates a second polarized signal, the first polarized signal and the second polarized signal being orthogonal.

<FIG> is a schematic diagram illustrating a cross sectional view of an antenna module <NUM>, consistent with some embodiments of the present disclosure. Referring to <FIG>, antenna module <NUM> includes an antenna <NUM> attached to a printed circuit board (PCB) <NUM>. Antenna <NUM> may have the same structure as antenna <NUM> in <FIG> or the same structure as antenna <NUM> in <FIG>. A housing <NUM> encloses antenna <NUM> and PCB <NUM>. Other components (not shown), for example, a dual-band bandpass filter and amplifier (or variations thereof, e.g., a diplexer, two single-band bandpass filters, two amplifiers and a combiner) may also be attached to PCB <NUM>. Antenna module <NUM> includes an output <NUM> which is connected to a coaxial cable <NUM>. Coaxial cable <NUM> connects antenna module <NUM> to a receiver or other devices.

<FIG> is a block diagram of an exemplary device <NUM>, consistent with some embodiments of the present disclosure. Referring to <FIG>, device <NUM> may take any form, including but not limited to, a laptop computer, a Global Positioning System (GPS), a wireless terminal including a mobile phone, a wireless handheld device, a wireless personal device, or any other forms. Device <NUM> includes an antenna <NUM>, a receiver <NUM> coupled to antenna <NUM>, a processor <NUM>, a memory <NUM>, a local clock <NUM>, and an input/output device <NUM>.

Antenna <NUM> may be a compact patch antenna, such as antenna <NUM> of <FIG> or antenna <NUM> of <FIG>, that operates at dual resonant frequencies (e.g., L1 and L5 frequencies) with a slot formed in a patch layer. Antenna <NUM> may further provide right hand circular polarization by forming chamfers at the patch layer and adjusting the orientation of the slot. By selecting a position, size, and shape of the slot and a position of a feed point, the antenna may be operated in non-dominant modes. In an exemplary embodiment, a form factor of the antenna may be 24x24x5 mm<NUM> so that the antenna fits in a standard GNSS L1 antenna housing.

Receiver <NUM>, coupled to antenna <NUM>, is configured to receive a signal from one or more signal sources. In some embodiments, receiver <NUM> may be part of a transceiver modem which includes a transmitter configured to transmit data to an external device. Local clock <NUM> provides a time of a local place at which device <NUM> is disposed.

Processor <NUM> may include one or more dedicated processing units, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or various other types of processors or processing units. In an embodiment, receiver <NUM> may be a front-end processor that performs signal processing in receiver <NUM>, and processor <NUM> may be a back-end processor that receives the signal processing results from receiver <NUM> and provides feedback to receiver <NUM>. Processor <NUM> may also perform a portion of the signal processing of receiver <NUM>. Processor <NUM> may perform additional computation, for example, for determining a position of the receiver. Processor <NUM> may be further configured to control the performance of input/output device <NUM>, clock <NUM>, and memory <NUM>. Memory <NUM> may be any type of computer-readable storage medium including volatile or non-volatile memory devices, or a combination thereof. Memory <NUM> may store information related to identities of device <NUM> and GNSS signals received by receiver <NUM>. Memory <NUM> may also store post processing signals. Memory <NUM> may also store computer-readable program instructions and mathematical models that are used in signal processing in receiver <NUM> and computations performed in processor <NUM>. Memory <NUM> may further store computer-readable program instructions for execution by processor <NUM> to operate device <NUM>. Input/output device <NUM> may be used to communicate a result of signal processing to a user or another device. Input/output device <NUM> may include a user interface including a display and an input device to transmit a user command to processor <NUM>. The display may be configured to display a status of signal reception at device <NUM>, the data stored in memory <NUM>, a status of signal processing, and a result of the signal processing, etc. The display may include, but is not limited to, a cathode ray tube (CRT), a liquid crystal display (LCD), a light-emitting diode (LED), a gas plasma display, a touch screen, or other image projection devices for displaying information to a user. Input/output device <NUM> may include a keyboard, a mouse, a scanner, a digital camera, a joystick, a trackball, cursor direction keys, a touchscreen monitor, or audio/video commanders, etc. Input/output device <NUM> may further include a machine interface, such as an electrical bus connection or a wireless communications link.

The computer-readable storage medium of the present disclosure, e.g., included in memory <NUM>, may be a tangible device that can store instructions for use by an instruction execution device. The computer-readable storage medium may be, for example, but is not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of the computer-readable storage medium includes the following: a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanically encoded device such as punch-cards or raised structures in a groove having instructions recorded thereon, and any suitable combination of the foregoing.

The computer-readable program instructions of the present disclosure may be assembler instructions, instruction-set-architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state-setting data, or source code or object code written in any combination of one or more programming languages, including an object-oriented programming language, and conventional procedural programming languages. The computer-readable program instructions may execute entirely on a computing device, e.g., processor <NUM>, as a stand-alone software package, or partly on a first computing device and partly on a second computing device remote from the first computing device. In the latter scenario, the second, remote computing device may be connected to the first computing device through any type of network, including a local area network (LAN) or a wide area network (WAN).

The flowcharts and block diagrams in the figures illustrate examples of the architecture, functionality, and operation of possible implementations of systems, methods, and devices according to various embodiments. It should be noted that, in some alternative implementations, the functions noted in blocks may occur out of the order noted in the figures.

It is understood that the described embodiments are not mutually exclusive, and elements, components, materials, or steps described in connection with one example embodiment may be combined with, or eliminated from, other embodiments in suitable ways to accomplish desired design objectives.

Reference herein to "some embodiments" or "some exemplary embodiments" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment. The appearance of the phrases "one embodiment" "some embodiments" or "another embodiment" in various places in the present disclosure do not all necessarily refer to the same embodiment, nor are separate or alternative embodiments necessarily mutually exclusive of other embodiments.

As used in the present disclosure, the word "exemplary" is used herein to mean serving as an example, instance, or illustration. Any aspect or design described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other aspects or designs. Rather, use of the word is intended to present concepts in a concrete fashion.

As used in the present disclosure, unless specifically stated otherwise, the term "or" encompasses all possible combinations, except where infeasible. For example, if it is stated that a database may include A or B, then, unless specifically stated otherwise or infeasible, the database may include A, or B, or A and B. As a second example, if it is stated that a database may include A, B, or C, then, unless specifically stated otherwise or infeasible, the database may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C.

Additionally, the articles "a" and "an" as used in the present disclosure and the appended claims should generally be construed to mean "one or more" unless specified otherwise or clear from context to be directed to a singular form.

Unless explicitly stated otherwise, each numerical value and range should be interpreted as being approximate as if the word "about" or "approximately" preceded the value of the value or range.

Although the elements in the following method claims, if any, are recited in a particular sequence, unless the claim recitations otherwise imply a particular sequence for implementing some or all of those elements, those elements are not necessarily intended to be limited to being implemented in that particular sequence. It is appreciated that certain features of the present disclosure, which are, for clarity, described in the context of separate embodiments, may also be provided in combination in a single embodiment. Conversely, various features of the specification, which are, for brevity, described in the context of a single embodiment, may also be provided separately or in any suitable sub-combination or as suitable in any other described embodiment of the specification. Certain features described in the context of various embodiments are not essential features of those embodiments, unless noted as such.

Claim 1:
An antenna (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>), comprising:
a substrate layer (<NUM>) having a first surface and an opposite second surface, the second surface having a metallization layer;
a conductive layer (<NUM>) disposed on the first surface of the substrate layer (<NUM>);
a slot (<NUM>) formed in the conductive layer (<NUM>), the slot (<NUM>) comprising a first part and a second part that are symmetric to each other about a diagonal of the conductive layer (<NUM>); and
at least one feed point (<NUM>) on the conductive layer (<NUM>) and spaced from the slot (<NUM>) by a predetermined distance,
where the first part and the second part of the slot (<NUM>) have substantially rectangular shapes to form a first rectangle (106a) and a second rectangle (106b), wherein:
the first and second rectangles (106a, 106b) are substantially perpendicular to each other and connected to each other at a corner, and
a portion of the conductive layer (<NUM>) at the corner is cut to form a slot chamfer (<NUM>); and
wherein the at least one feed point (<NUM>) is positioned off center lines of the conductive layer (<NUM>).