Patent Description:
To achieve high compression efficiency, image and video coding schemes usually employ prediction, including motion vector prediction, and transform to leverage spatial and temporal redundancy in the video content. Generally, intra or inter prediction is used to exploit the intra or inter frame correlation, then the differences between the original image and the predicted image, often denoted as prediction errors or prediction residuals, are transformed, quantized, and entropy coded. To reconstruct the video, the compressed data are decoded by inverse processes corresponding to the entropy coding, quantization, transform, and prediction.

At least one of the present embodiments generally relates to a method or an apparatus for video encoding or decoding, and more particularly, to a method or an apparatus for simplifications of coding modes based on neighboring samples dependent parametric models.

The dependent claims add further optional aspects of the invention.

Other aspects, features and advantages of the general aspects will become apparent from the following detailed description of exemplary embodiments, which is to be read in connection with the accompanying drawings.

The embodiments described here are in the field of video compression and generally relate to video compression and video encoding and decoding more specifically the quantization step of the video compression scheme. The general aspects described aim to provide a mechanism to operate restrictions in high-level video coding syntax or in the video coding semantics to constrain the possible set of tools combinations.

The invention is disclosed in the part of the description starting right after the syntax table for a slice_header (itself a few paragraphs after Tables <NUM> and <NUM>) and includes the pages until the paragraph describing <FIG>. Said part of the description is to be considered together with <FIG> and <FIG> as well as <NUM>-<NUM>. The same part of the description also summarises close prior art documents, as this is particularly helpful for illustrating the invention.

In the HEVC (High Efficiency Video Coding, ISO/IEC <NUM>-<NUM>, ITU-T H. <NUM>) video compression standard, motion compensated temporal prediction is employed to exploit the redundancy that exists between successive pictures of a video.

To do so, a motion vector is associated to each prediction unit (PU). Each Coding Tree Unit (CTU) is represented by a Coding Tree in the compressed domain. This is a quad-tree division of the CTU, where each leaf is called a Coding Unit (CU).

Each CU is then given some Intra or Inter prediction parameters (Prediction Info). To do so, it is spatially partitioned into one or more Prediction Units (PUs), each PU being assigned some prediction information. The Intra or Inter coding mode is assigned on the CU level.

In the JVET (Joint Video Exploration Team) proposal for a new video compression standard, known as Joint Exploration Model (JEM), it has been proposed to accept a quadtree-binary tree (QTBT) block partitioning structure due to high compression performance. A block in a binary tree (BT) can be split in two equal sized sub-blocks by splitting it either horizontally or vertically in the middle. Consequently, a BT block can have a rectangular shape with unequal width and height unlike the blocks in a QT where the blocks have always square shape with equal height and width. In HEVC, the angular intra prediction directions were defined from <NUM> degree to -<NUM> degree over a <NUM> angle, and they have been maintained in JEM, which has made the definition of angular directions independent of the target block shape.

To encode these blocks, Intra Prediction is used to provide an estimated version of the block using previously reconstructed neighbor samples. The difference between the source block and the prediction is then encoded. In the above classical codecs, a single line of reference sample is used at the left and at the top of the current block.

In HEVC (High Efficiency Video Coding, H. <NUM>), encoding of a frame of video sequence is based on a quadtree (QT) block partitioning structure. A frame is divided into square coding tree units (CTUs) which all undergo quadtree based splitting to multiple coding units (CUs) based on rate-distortion (RD) criteria. Each CU is either intra-predicted, that is, it is spatially predicted from the causal neighbor CUs, or inter-predicted, that is, it is temporally predicted from reference frames already decoded. In I-slices all CUs are intra-predicted, whereas in P and B slices the CUs can be both intra- or inter-predicted. For intra prediction, HEVC defines <NUM> prediction modes which includes one planar mode (indexed as mode <NUM>), one DC mode (indexed as mode <NUM>) and <NUM> angular modes (indexed as modes <NUM> - <NUM>). The angular modes are associated with prediction directions ranging from <NUM> degree to -<NUM> degree in the clockwise direction. Since HEVC supports a quadtree (QT) block partitioning structure, all prediction units (PUs) have square shapes. Hence the definition of the prediction angles from <NUM> degree to -<NUM> degree is justified from the perspective of a PU (Prediction Unit) shape. For a target prediction unit of size NxN pixels, the top reference array and the left reference array are each of size 2N+<NUM> samples, which is required to cover the aforementioned angle range for all target pixels. Considering that the height and width of a PU are of equal length, the equality of lengths of two reference arrays also makes sense.

The invention is in the field of video compression. It aims at improving the biprediction in inter coded blocks compared to existing video compression systems. The present invention also proposes to separate luma and chroma coding trees for inter slices.

In the HEVC video compression standard, a picture is divided into so-called Coding Tree Units (CTU), which size is typically 64x64, 128x128, or 256x256 pixels. Each CTU is represented by a Coding Tree in the compressed domain. This is a quadtree division of the CTU, where each leaf is called a Coding Unit (CU), see <FIG>.

Each CU is then given some Intra or Inter prediction parameters (Prediction Info). To do so, it is spatially partitioned into one or more Prediction Units (PUs), each PU being assigned some prediction information. The Intra or Inter coding mode is assigned on the CU level, see <FIG>.

New emerging video compression tools include a Coding Tree Unit representation in the compressed domain is proposed, in order to represent picture data in a more flexible way in the compressed domain. The advantage of this more flexible representation of the coding tree is that it provides increased compression efficiency compared to the CU/PU/TU arrangement of the HEVC standard.

The Quad-Tree plus Binary-Tree (QTBT) coding tool provides this increased flexibility. It consists in a coding tree where coding units can be split both in a quadtree and in a binary-tree fashion. Such coding tree representation of a Coding Tree Unit is illustrated on <FIG>.

The splitting of a coding unit is decided on the encoder side through a rate distortion optimization procedure, which consists is determine the QTBT representation of the CTU with minimal rate distortion cost.

In the QTBT technology, a CU has either square or rectangular shape. The size of coding unit is always a power of <NUM>, and typically goes from <NUM> to <NUM>.

In additional to this variety of rectangular shapes for a coding unit, this new CTU representation has the following different characteristics compared to HEVC.

The QTBT decomposition of a CTU is made of two stages: first the CTU is split in a quad-tree fashion, then each quad-tree leaf can be further divide in a binary fashion. This is illustrated on the right of <FIG> where solid lines represent the quad-tree decomposition phase and dashed lines represent the binary decomposition that is spatially embedded in the quad-tree leaves.

The general aspects described herein are in the field of video compression. A video codec is made of a combination of multiple coding tools. The common practice is to standardize the decoder side (syntax and decoding process).

A general functional diagram of scaling (or dequantization) and transformation process in a current coding scheme (such as VVC draft <NUM>, for example) is illustrated in <FIG>, where coded coefficients of a given transform block (TransCoeffLevel) go through dequantization (Dequant) giving scaled transformed coefficients (d), then inverse transform (T-<NUM>), resulting in the residual samples for that block (res).

The dequantization part is illustrated in <FIG>.

As in HEVC, the scaling (or dequantization) process of VVC consists in scaling the transformed coefficients by a quantization step qStep and a quantization matrix m[][], resulting in dequantized coefficients d[][]. This is detailed in the following equation (ignoring the dependent quantization feature and other minor variants for the sake of simplicity): <MAT>.

Quantization control is the combination of syntax used to control the QP and quantization matrix for a specific coded block.

A current coding scheme (VVC draft <NUM>) describes a joint chroma coded residual feature, where a single chroma channel is coded, and Cb/Cr chroma channels are reconstructed by sign change (based on a slice-level flag) and/or ½ scale depending on joint chroma mode (TuCResMode), which is derived from the chroma transform blocks coded block flags tu_cbf_cb and tu_cbf_cr, as illustrated in Table <NUM>:.

The CSign variable of Table <NUM> is derived as ( <NUM> - <NUM> * pic_joint_cbcr_sign_flag ), where pic_joint_cbcr_sign_flag is a syntax element decoded at the picture level.

The scaling and transformation process is adapted as illustrated in <FIG> (and as specified in section <NUM>. <NUM>-<NUM> of VVC draft <NUM>, for example), where the single coded chroma block in dequantized, then inverse transformed, then split into Cb and Cr channels (called demultiplexing in the rest of this document). The "scale" factor is either -<NUM>, -½, +½ or +<NUM> depending on CSign and TuCResMode, as detailed in Table <NUM>. The grayed-out part, normally for the secondary chroma channel, is not used in this case. Coded channel and Cb and Cr residuals can be swapped depending on joint chroma mode, which is not shown in <FIG> for the sake of simplicity, but detailed in Table <NUM>.

<FIG> shows the residual block decoding process as specified in a current coding scheme. The input to this process is a transform unit (TU) to decode, and the input bit-stream to parse.

The embodiments presented here propose to move demultiplexing of Cb and Cr residuals from after transform to before dequantization, so that regular separate Cb and Cr chroma quantization control parameters (QP offsets, quantization matrices) can be used, without the need for specific joint-CbCr quantization control parameters.

As said above, a current coding scheme (VVC draft <NUM>) includes specific quantization control parameters for joint chroma mode, but not for all parameters: there are no specific quantization matrices (Cb or Cr quantization matrix is selected as shown in Table <NUM>). The problem to be solved is to make quantization control consistent for all chroma coding modes, either joint or not, while possibly removing joint chroma coding mode-specific quantization control parameters. This is expected to result in a simpler coding scheme and less coded bits.

A prior proposal ([JVET-P0608]) proposed to add joint-chroma-coding-specific quantization matrices when the joint chroma mode is equal to <NUM> (see TuCResMode in Table <NUM>), with the table modified as follows:.

This has the drawback of adding more bits to the scaling_list_data syntax used to transmit custom quantization matrices. A second option proposed in JVET-P0608 that avoids transmitting extra quantization matrices, but still using specific ones for joint chroma coded blocks is to use an average of Cb and Cr quantization matrices.

A similar teaching is put forward also in the following document:.

which on top also discloses moving the Luma Mapping with Chroma Scaling (LMCS) processing step to a different stage along the processing stage.

In the invention described herein, Cb and Cr channels are demultiplexed before dequantization instead of after inverse transform. This way, regular Cb and Cr quantization control parameters can be used, optionally with minor adjustments when the current block is joint-chroma coded (e.g. a general QP offset).

In the current disclosure, Cb and Cr channels are reconstructed before dequantization instead of after inverse transform, as illustrated in <FIG>.

The algorithm of <FIG> depicts the residual block decoding process according to the proposed embodiment. The process of <FIG> is a modified version of the decoding process of a residual block of <FIG>, according to the main embodiment of the proposed invention. As can be seen, the ordering of operations is changed compared to <FIG>. The separate Cb and Cr residuals are now obtained in the quantized transform domain rather than in the spatial domain as is the case in VVC draft <NUM>.

Thus, the demultiplexing of the joint Cb/Cr quantized residual is performed first, in case the TU-level joint_cb_cr_residual_flag is true. Next, the usual inverse quantization and inverse transform are applied separately on the obtained Cb and Cr residual blocks, exactly in the same way as for transform units not coded in joint Cb/Cr mode.

This way, exactly the same de-quantization is used for blocks coded in joint Cb/Cr mode and other blocks. In particular, thanks to the modified decoding process proposed, the same quantization matrices can be used for blocks coded in joint Cb/Cr mode and other blocks, making the overall quantization control easier and cleaner.

Note the re-ordering of decoding steps proposed is theoretically possible because the Cb/Cr de-muliplexing consists in pixel-wise linear operations, which can be easily permuted with the de-quantization and inverse transform.

Below is an example of draft text to implement the proposed scheme: [. ]
The variable codedCIdx is derived as follows:.

The variable cSign is set equal to ( <NUM> - <NUM> * slice_joint_cbcr_sign_flag). The (nTbW)x(nTbH) array of residual samples resSamples is derived as follows:.

See also chroma QP control syntax and semantics, and chroma QP derivation in §<NUM>. <NUM> of VVC draft.

Variants include moving the right shift of (<NUM>) to:.

In one variant, for joint chroma coded blocks, some specific quantization control parameters can be specified, e.g. the QP offset currently defined in VVC draft, like pps_joint_cbcr_qp_offset and/or slice_joint_cbcr_qp_offset, could still be used (either directly for Cb and Cr, or preferably on top of regular Cb and Cr QP offsets). This can be justified by specific properties of joint chroma coded blocks, like different scaling norm, or different visual quality.

In a further variant, separate Cb/Cr offsets could be specified for joint chroma coded blocks.

In another variant, quantization control parameters specific to joint chroma coded blocks (PPS and slice-level offset, chroma QP mapping table, etc) as defined by VVC draft <NUM> could still be used for both Cb and Cr channels instead of regular chroma QPs.

One embodiment of a method <NUM> under the general aspects described here is shown in <FIG>. The method commences at start block <NUM> and control proceeds to block <NUM> for demultiplexing Cb and Cr from a video block when joint Cb/Cr are coded for the video block. Control proceeds from block <NUM> to block <NUM> for dequantizing the demultiplexed Cb and Cr data. Control proceeds from block <NUM> to block <NUM> for inverse transforming the dequantized Cb and Cr data. Control proceeds from block <NUM> to block <NUM> for decoding said video block using said inverse transformed Cb and Cr data.

One embodiment of a method <NUM> under the general aspects described here is shown in <FIG>. The method commences at start block <NUM> and control proceeds to block <NUM> for parsing a video bitstream and scaling Cb and Cr from a video block. Control proceeds from block <NUM> to block <NUM> for dequantizing the demultiplexed Cb and Cr data. Control proceeds from block <NUM> to block <NUM> for inverse transforming the dequantized Cb and Cr data. Control proceeds from block <NUM> to block <NUM> for decoding said video block using said inverse transformed Cb and Cr data.

<FIG> shows one embodiment of an apparatus <NUM> for encoding, decoding, compressing or decompressing video data using simplifications of coding modes based on neighboring samples dependent parametric models. The apparatus comprises Processor <NUM> and can be interconnected to a memory <NUM> through at least one port. Both Processor <NUM> and memory <NUM> can also have one or more additional interconnections to external connections.

Processor <NUM> is also configured to either insert or receive information in a bitstream and, either compressing, encoding or decoding using any of the described aspects.

This application describes a variety of aspects, including tools, features, embodiments, models, approaches, etc. Many of these aspects are described with specificity and, at least to show the individual characteristics, are often described in a manner that may sound limiting. However, this is for purposes of clarity in description, and does not limit the application or scope of those aspects. Indeed, all of the different aspects can be combined and interchanged to provide further aspects. Moreover, the aspects can be combined and interchanged with aspects described in earlier filings as well.

The aspects described and contemplated in this application can be implemented in many different forms. <FIG>, <FIG> and <FIG> provide some embodiments, but other embodiments are contemplated and the discussion of <FIG>, <FIG> and <FIG> does not limit the breadth of the implementations. At least one of the aspects generally relates to video encoding and decoding, and at least one other aspect generally relates to transmitting a bitstream generated or encoded. These and other aspects can be implemented as a method, an apparatus, a computer readable storage medium having stored thereon instructions for encoding or decoding video data according to any of the methods described, and/or a computer readable storage medium having stored thereon a bitstream generated according to any of the methods described.

In the present application, the terms "reconstructed" and "decoded" may be used interchangeably, the terms "pixel" and "sample" may be used interchangeably, the terms "image," "picture" and "frame" may be used interchangeably. Usually, but not necessarily, the term "reconstructed" is used at the encoder side while "decoded" is used at the decoder side.

Various methods are described herein, and each of the methods comprises one or more steps or actions for achieving the described method. Unless a specific order of steps or actions is required for proper operation of the method, the order and/or use of specific steps and/or actions may be modified or combined.

Various methods and other aspects described in this application can be used to modify modules, for example, the intra prediction, entropy coding, and/or decoding modules (<NUM>, <NUM>, <NUM>, <NUM>), of a video encoder <NUM> and decoder <NUM> as shown in <FIG> and <FIG>. Moreover, the present aspects are not limited to VVC or HEVC, and can be applied, for example, to other standards and recommendations, whether pre-existing or future-developed, and extensions of any such standards and recommendations (including VVC and HEVC). Unless indicated otherwise, or technically precluded, the aspects described in this application can be used individually or in combination.

Various numeric values are used in the present application. The specific values are for example purposes and the aspects described are not limited to these specific values.

<FIG> illustrates an encoder <NUM>. Variations of this encoder <NUM> are contemplated, but the encoder <NUM> is described below for purposes of clarity without describing all expected variations.

Before being encoded, the video sequence may go through pre-encoding processing (<NUM>), for example, applying a color transform to the input color picture (e.g., conversion from RGB <NUM>:<NUM>:<NUM> to YCbCr <NUM>:<NUM>:<NUM>), or performing a remapping of the input picture components in order to get a signal distribution more resilient to compression (for instance using a histogram equalization of one of the color components). Metadata can be associated with the pre-processing and attached to the bitstream.

In the encoder <NUM>, a picture is encoded by the encoder elements as described below. The picture to be encoded is partitioned (<NUM>) and processed in units of, for example, CUs. Each unit is encoded using, for example, either an intra or inter mode. When a unit is encoded in an intra mode, it performs intra prediction (<NUM>). In an inter mode, motion estimation (<NUM>) and compensation (<NUM>) are performed. The encoder decides (<NUM>) which one of the intra mode or inter mode to use for encoding the unit, and indicates the intra/inter decision by, for example, a prediction mode flag. Prediction residuals are calculated, for example, by subtracting (<NUM>) the predicted block from the original image block.

The prediction residuals are then transformed (<NUM>) and quantized (<NUM>). The quantized transform coefficients, as well as motion vectors and other syntax elements, are entropy coded (<NUM>) to output a bitstream. The encoder can skip the transform and apply quantization directly to the non-transformed residual signal. The encoder can bypass both transform and quantization, i.e., the residual is coded directly without the application of the transform or quantization processes.

The encoder decodes an encoded block to provide a reference for further predictions. The quantized transform coefficients are de-quantized (<NUM>) and inverse transformed (<NUM>) to decode prediction residuals. Combining (<NUM>) the decoded prediction residuals and the predicted block, an image block is reconstructed. In-loop filters (<NUM>) are applied to the reconstructed picture to perform, for example, deblocking/SAO (Sample Adaptive Offset) filtering to reduce encoding artifacts. The filtered image is stored at a reference picture buffer (<NUM>).

<FIG> illustrates a block diagram of a video decoder <NUM>. In the decoder <NUM>, a bitstream is decoded by the decoder elements as described below. Video decoder <NUM> generally performs a decoding pass reciprocal to the encoding pass as described in <FIG>. The encoder <NUM> also generally performs video decoding as part of encoding video data.

In particular, the input of the decoder includes a video bitstream, which can be generated by video encoder <NUM>. The bitstream is first entropy decoded (<NUM>) to obtain transform coefficients, motion vectors, and other coded information. The picture partition information indicates how the picture is partitioned. The decoder may therefore divide (<NUM>) the picture according to the decoded picture partitioning information. The transform coefficients are de-quantized (<NUM>) and inverse transformed (<NUM>) to decode the prediction residuals. Combining (<NUM>) the decoded prediction residuals and the predicted block, an image block is reconstructed. The predicted block can be obtained (<NUM>) from intra prediction (<NUM>) or motioncompensated prediction (i.e., inter prediction) (<NUM>). In-loop filters (<NUM>) are applied to the reconstructed image. The filtered image is stored at a reference picture buffer (<NUM>).

The decoded picture can further go through post-decoding processing (<NUM>), for example, an inverse color transform (e.g. conversion from YCbCr <NUM>:<NUM>:<NUM> to RGB <NUM>:<NUM>:<NUM>) or an inverse remapping performing the inverse of the remapping process performed in the pre-encoding processing (<NUM>). The post-decoding processing can use metadata derived in the pre-encoding processing and signaled in the bitstream.

<FIG> illustrates a block diagram of an example of a system in which various aspects and embodiments are implemented. System <NUM> can be embodied as a device including the various components described below and is configured to perform one or more of the aspects described in this document. Examples of such devices include, but are not limited to, various electronic devices such as personal computers, laptop computers, smartphones, tablet computers, digital multimedia set top boxes, digital television receivers, personal video recording systems, connected home appliances, and servers. Elements of system <NUM>, singly or in combination, can be embodied in a single integrated circuit (IC), multiple ICs, and/or discrete components. For example, in at least one embodiment, the processing and encoder/decoder elements of system <NUM> are distributed across multiple ICs and/or discrete components. In various embodiments, the system <NUM> is communicatively coupled to one or more other systems, or other electronic devices, via, for example, a communications bus or through dedicated input and/or output ports. In various embodiments, the system <NUM> is configured to implement one or more of the aspects described in this document.

The system <NUM> includes at least one processor <NUM> configured to execute instructions loaded therein for implementing, for example, the various aspects described in this document. Processor <NUM> can include embedded memory, input output interface, and various other circuitries as known in the art. The system <NUM> includes at least one memory <NUM> (e.g., a volatile memory device, and/or a non-volatile memory device). System <NUM> includes a storage device <NUM>, which can include non-volatile memory and/or volatile memory, including, but not limited to, Electrically Erasable Programmable Read-Only Memory (EEPROM), Read-Only Memory (ROM), Programmable Read-Only Memory (PROM), Random Access Memory (RAM), Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), flash, magnetic disk drive, and/or optical disk drive. The storage device <NUM> can include an internal storage device, an attached storage device (including detachable and non-detachable storage devices), and/or a network accessible storage device, as non-limiting examples.

System <NUM> includes an encoder/decoder module <NUM> configured, for example, to process data to provide an encoded video or decoded video, and the encoder/decoder module <NUM> can include its own processor and memory. The encoder/decoder module <NUM> represents module(s) that can be included in a device to perform the encoding and/or decoding functions. As is known, a device can include one or both of the encoding and decoding modules. Additionally, encoder/decoder module <NUM> can be implemented as a separate element of system <NUM> or can be incorporated within processor <NUM> as a combination of hardware and software as known to those skilled in the art.

Program code to be loaded onto processor <NUM> or encoder/decoder <NUM> to perform the various aspects described in this document can be stored in storage device <NUM> and subsequently loaded onto memory <NUM> for execution by processor <NUM>. In accordance with various embodiments, one or more of processor <NUM>, memory <NUM>, storage device <NUM>, and encoder/decoder module <NUM> can store one or more of various items during the performance of the processes described in this document. Such stored items can include, but are not limited to, the input video, the decoded video or portions of the decoded video, the bitstream, matrices, variables, and intermediate or final results from the processing of equations, formulas, operations, and operational logic.

In some embodiments, memory inside of the processor <NUM> and/or the encoder/decoder module <NUM> is used to store instructions and to provide working memory for processing that is needed during encoding or decoding. In other embodiments, however, a memory external to the processing device (for example, the processing device can be either the processor <NUM> or the encoder/decoder module <NUM>) is used for one or more of these functions. The external memory can be the memory <NUM> and/or the storage device <NUM>, for example, a dynamic volatile memory and/or a non-volatile flash memory. In several embodiments, an external non-volatile flash memory is used to store the operating system of, for example, a television. In at least one embodiment, a fast external dynamic volatile memory such as a RAM is used as working memory for video coding and decoding operations, such as for MPEG-<NUM> (MPEG refers to the Moving Picture Experts Group, MPEG-<NUM> is also referred to as ISO/IEC <NUM>, and <NUM>-<NUM> is also known as H. <NUM>, and <NUM>-<NUM> is also known as H. <NUM>), HEVC (HEVC refers to High Efficiency Video Coding, also known as H. <NUM> and MPEG-H Part <NUM>), or VVC (Versatile Video Coding, a new standard being developed by JVET, the Joint Video Experts Team).

The input to the elements of system <NUM> can be provided through various input devices as indicated in block <NUM>. Such input devices include, but are not limited to, (i) a radio frequency (RF) portion that receives an RF signal transmitted, for example, over the air by a broadcaster, (ii) a Component (COMP) input terminal (or a set of COMP input terminals), (iii) a Universal Serial Bus (USB) input terminal, and/or (iv) a High Definition Multimedia Interface (HDMI) input terminal. Other examples, not shown in <FIG>, include composite video.

In various embodiments, the input devices of block <NUM> have associated respective input processing elements as known in the art. For example, the RF portion can be associated with elements suitable for (i) selecting a desired frequency (also referred to as selecting a signal, or band-limiting a signal to a band of frequencies), (ii) downconverting the selected signal, (iii) band-limiting again to a narrower band of frequencies to select (for example) a signal frequency band which can be referred to as a channel in certain embodiments, (iv) demodulating the downconverted and bandlimited signal, (v) performing error correction, and (vi) demultiplexing to select the desired stream of data packets. The RF portion of various embodiments includes one or more elements to perform these functions, for example, frequency selectors, signal selectors, band-limiters, channel selectors, filters, downconverters, demodulators, error correctors, and demultiplexers. The RF portion can include a tuner that performs various of these functions, including, for example, downconverting the received signal to a lower frequency (for example, an intermediate frequency or a near-baseband frequency) or to baseband. In one set-top box embodiment, the RF portion and its associated input processing element receives an RF signal transmitted over a wired (for example, cable) medium, and performs frequency selection by filtering, downconverting, and filtering again to a desired frequency band. Various embodiments rearrange the order of the above-described (and other) elements, remove some of these elements, and/or add other elements performing similar or different functions. Adding elements can include inserting elements in between existing elements, such as, for example, inserting amplifiers and an analog-to-digital converter. In various embodiments, the RF portion includes an antenna.

Additionally, the USB and/or HDMI terminals can include respective interface processors for connecting system <NUM> to other electronic devices across USB and/or HDMI connections. It is to be understood that various aspects of input processing, for example, Reed-Solomon error correction, can be implemented, for example, within a separate input processing IC or within processor <NUM> as necessary. Similarly, aspects of USB or HDMI interface processing can be implemented within separate interface ICs or within processor <NUM> as necessary. The demodulated, error corrected, and demultiplexed stream is provided to various processing elements, including, for example, processor <NUM>, and encoder/decoder <NUM> operating in combination with the memory and storage elements to process the datastream as necessary for presentation on an output device.

Various elements of system <NUM> can be provided within an integrated housing, Within the integrated housing, the various elements can be interconnected and transmit data therebetween using suitable connection arrangement, for example, an internal bus as known in the art, including the Inter-IC (I2C) bus, wiring, and printed circuit boards.

The system <NUM> includes communication interface <NUM> that enables communication with other devices via communication channel <NUM>. The communication interface <NUM> can include, but is not limited to, a transceiver configured to transmit and to receive data over communication channel <NUM>. The communication interface <NUM> can include, but is not limited to, a modem or network card and the communication channel <NUM> can be implemented, for example, within a wired and/or a wireless medium.

Data is streamed, or otherwise provided, to the system <NUM>, in various embodiments, using a wireless network such as a Wi-Fi network, for example IEEE <NUM> (IEEE refers to the Institute of Electrical and Electronics Engineers). The Wi-Fi signal of these embodiments is received over the communications channel <NUM> and the communications interface <NUM> which are adapted for Wi-Fi communications. The communications channel <NUM> of these embodiments is typically connected to an access point or router that provides access to external networks including the Internet for allowing streaming applications and other over-the-top communications. Other embodiments provide streamed data to the system <NUM> using a set-top box that delivers the data over the HDMI connection of the input block <NUM>. Still other embodiments provide streamed data to the system <NUM> using the RF connection of the input block <NUM>. As indicated above, various embodiments provide data in a nonstreaming manner. Additionally, various embodiments use wireless networks other than Wi-Fi, for example a cellular network or a Bluetooth network.

The system <NUM> can provide an output signal to various output devices, including a display <NUM>, speakers <NUM>, and other peripheral devices <NUM>. The display <NUM> of various embodiments includes one or more of, for example, a touchscreen display, an organic light-emitting diode (OLED) display, a curved display, and/or a foldable display. The display <NUM> can be for a television, a tablet, a laptop, a cell phone (mobile phone), or other device. The display <NUM> can also be integrated with other components (for example, as in a smart phone), or separate (for example, an external monitor for a laptop). The other peripheral devices <NUM> include, in various examples of embodiments, one or more of a stand-alone digital video disc (or digital versatile disc) (DVR, for both terms), a disk player, a stereo system, and/or a lighting system. Various embodiments use one or more peripheral devices <NUM> that provide a function based on the output of the system <NUM>. For example, a disk player performs the function of playing the output of the system <NUM>.

In various embodiments, control signals are communicated between the system <NUM> and the display <NUM>, speakers <NUM>, or other peripheral devices <NUM> using signaling such as AV. Link, Consumer Electronics Control (CEC), or other communications protocols that enable device-to-device control with or without user intervention. The output devices can be communicatively coupled to system <NUM> via dedicated connections through respective interfaces <NUM>, <NUM>, and <NUM>. Alternatively, the output devices can be connected to system <NUM> using the communications channel <NUM> via the communications interface <NUM>. The display <NUM> and speakers <NUM> can be integrated in a single unit with the other components of system <NUM> in an electronic device such as, for example, a television. In various embodiments, the display interface <NUM> includes a display driver, such as, for example, a timing controller (T Con) chip.

The display <NUM> and speaker <NUM> can alternatively be separate from one or more of the other components, for example, if the RF portion of input <NUM> is part of a separate set-top box. In various embodiments in which the display <NUM> and speakers <NUM> are external components, the output signal can be provided via dedicated output connections, including, for example, HDMI ports, USB ports, or COMP outputs.

The embodiments can be carried out by computer software implemented by the processor <NUM> or by hardware, or by a combination of hardware and software. As a non-limiting example, the embodiments can be implemented by one or more integrated circuits. The memory <NUM> can be of any type appropriate to the technical environment and can be implemented using any appropriate data storage technology, such as optical memory devices, magnetic memory devices, semiconductor-based memory devices, fixed memory, and removable memory, as non-limiting examples. The processor <NUM> can be of any type appropriate to the technical environment, and can encompass one or more of microprocessors, general purpose computers, special purpose computers, and processors based on a multi-core architecture, as non-limiting examples.

Various implementations involve decoding. "Decoding", as used in this application, can encompass all or part of the processes performed, for example, on a received encoded sequence to produce a final output suitable for display. In various embodiments, such processes include one or more of the processes typically performed by a decoder, for example, entropy decoding, inverse quantization, inverse transformation, and differential decoding. In various embodiments, such processes also, or alternatively, include processes performed by a decoder of various implementations described in this application.

As further examples, in one embodiment "decoding" refers only to entropy decoding, in another embodiment "decoding" refers only to differential decoding, and in another embodiment "decoding" refers to a combination of entropy decoding and differential decoding. Whether the phrase "decoding process" is intended to refer specifically to a subset of operations or generally to the broader decoding process will be clear based on the context of the specific descriptions and is believed to be well understood by those skilled in the art.

Various implementations involve encoding. In an analogous way to the above discussion about "decoding", "encoding" as used in this application can encompass all or part of the processes performed, for example, on an input video sequence to produce an encoded bitstream. In various embodiments, such processes include one or more of the processes typically performed by an encoder, for example, partitioning, differential encoding, transformation, quantization, and entropy encoding. In various embodiments, such processes also, or alternatively, include processes performed by an encoder of various implementations described in this application.

As further examples, in one embodiment "encoding" refers only to entropy encoding, in another embodiment "encoding" refers only to differential encoding, and in another embodiment "encoding" refers to a combination of differential encoding and entropy encoding. Whether the phrase "encoding process" is intended to refer specifically to a subset of operations or generally to the broader encoding process will be clear based on the context of the specific descriptions and is believed to be well understood by those skilled in the art.

Note that the syntax elements as used herein are descriptive terms. As such, they do not preclude the use of other syntax element names.

When a figure is presented as a flow diagram, it should be understood that it also provides a block diagram of a corresponding apparatus. Similarly, when a figure is presented as a block diagram, it should be understood that it also provides a flow diagram of a corresponding method/process.

Various embodiments may refer to parametric models or rate distortion optimization. In particular, during the encoding process, the balance or trade-off between the rate and distortion is usually considered, often given the constraints of computational complexity. It can be measured through a Rate Distortion Optimization (RDO) metric, or through Least Mean Square (LMS), Mean of Absolute Errors (MAE), or other such measurements. Rate distortion optimization is usually formulated as minimizing a rate distortion function, which is a weighted sum of the rate and of the distortion. There are different approaches to solve the rate distortion optimization problem. For example, the approaches may be based on an extensive testing of all encoding options, including all considered modes or coding parameters values, with a complete evaluation of their coding cost and related distortion of the reconstructed signal after coding and decoding. Faster approaches may also be used, to save encoding complexity, in particular with computation of an approximated distortion based on the prediction or the prediction residual signal, not the reconstructed one. Mix of these two approaches can also be used, such as by using an approximated distortion for only some of the possible encoding options, and a complete distortion for other encoding options. Other approaches only evaluate a subset of the possible encoding options. More generally, many approaches employ any of a variety of techniques to perform the optimization, but the optimization is not necessarily a complete evaluation of both the coding cost and related distortion.

The implementations and aspects described herein can be implemented in, for example, a method or a process, an apparatus, a software program, a data stream, or a signal. Even if only discussed in the context of a single form of implementation (for example, discussed only as a method), the implementation of features discussed can also be implemented in other forms (for example, an apparatus or program). An apparatus can be implemented in, for example, appropriate hardware, software, and firmware. The methods can be implemented in, for example, , a processor, which refers to processing devices in general, including, for example, a computer, a microprocessor, an integrated circuit, or a programmable logic device. Processors also include communication devices, such as, for example, computers, cell phones, portable/personal digital assistants ("PDAs"), and other devices that facilitate communication of information between end-users.

Reference to "one embodiment" or "an embodiment" or "one implementation" or "an implementation", as well as other variations thereof, means that a particular feature, structure, characteristic, and so forth described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of the phrase "in one embodiment" or "in an embodiment" or "in one implementation" or "in an implementation", as well any other variations, appearing in various places throughout this application are not necessarily all referring to the same embodiment.

Additionally, this application may refer to "determining" various pieces of information. Determining the information can include one or more of, for example, estimating the information, calculating the information, predicting the information, or retrieving the information from memory.

Further, this application may refer to "accessing" various pieces of information. Accessing the information can include one or more of, for example, receiving the information, retrieving the information (for example, from memory), storing the information, moving the information, copying the information, calculating the information, determining the information, predicting the information, or estimating the information.

Additionally, this application may refer to "receiving" various pieces of information. Receiving is, as with "accessing", intended to be a broad term. Receiving the information can include one or more of, for example, accessing the information, or retrieving the information (for example, from memory). Further, "receiving" is typically involved, in one way or another, during operations such as, for example, storing the information, processing the information, transmitting the information, moving the information, copying the information, erasing the information, calculating the information, determining the information, predicting the information, or estimating the information.

It is to be appreciated that the use of any of the following "/", "and/or", and "at least one of", for example, in the cases of "A/B", "A and/or B" and "at least one of A and B", is intended to encompass the selection of the first listed option (A) only, or the selection of the second listed option (B) only, or the selection of both options (A and B). As a further example, in the cases of "A, B, and/or C" and "at least one of A, B, and C", such phrasing is intended to encompass the selection of the first listed option (A) only, or the selection of the second listed option (B) only, or the selection of the third listed option (C) only, or the selection of the first and the second listed options (A and B) only, or the selection of the first and third listed options (A and C) only, or the selection of the second and third listed options (B and C) only, or the selection of all three options (A and B and C). This may be extended, as is clear to one of ordinary skill in this and related arts, for as many items as are listed.

Also, as used herein, the word "signal" refers to, among other things, indicating something to a corresponding decoder. For example, in certain embodiments the encoder signals a particular one of a plurality of transforms, coding modes or flags. In this way, in an embodiment the same transform, parameter, or mode is used at both the encoder side and the decoder side. Thus, for example, an encoder can transmit (explicit signaling) a particular parameter to the decoder so that the decoder can use the same particular parameter. Conversely, if the decoder already has the particular parameter as well as others, then signaling can be used without transmitting (implicit signaling) to simply allow the decoder to know and select the particular parameter. By avoiding transmission of any actual functions, a bit savings is realized in various embodiments. It is to be appreciated that signaling can be accomplished in a variety of ways. For example, one or more syntax elements, flags, and so forth are used to signal information to a corresponding decoder in various embodiments. While the preceding relates to the verb form of the word "signal", the word "signal" can also be used herein as a noun.

As will be evident to one of ordinary skill in the art, implementations can produce a variety of signals formatted to carry information that can be, for example, stored or transmitted. The information can include, for example, instructions for performing a method, or data produced by one of the described implementations. For example, a signal can be formatted to carry the bitstream of a described embodiment. Such a signal can be formatted, for example, as an electromagnetic wave (for example, using a radio frequency portion of spectrum) or as a baseband signal. The formatting can include, for example, encoding a data stream and modulating a carrier with the encoded data stream. The information that the signal carries can be, for example, analog or digital information. The signal can be transmitted over a variety of different wired or wireless links, as is known. The signal can be stored on a processor-readable medium.

Claim 1:
A method, comprising:
demultiplexing joint Cb/Cr quantized residuals from a video block when a joint chroma coding mode is used for the video block;
dequantizing the demultiplexed Cb and Cr data;
inverse transforming the dequantized Cb and Cr data; and,
decoding said video block using said inverse transformed Cb and Cr data.