Patent Description:
Various features relate to integrated devices implemented with a heat sink.

<FIG> illustrates a first integrated device <NUM> and a second integrated device <NUM> coupled to a printed circuit board (PCB) <NUM>. A first heat sink <NUM> is positioned on top of the first integrated device <NUM>. The first heat sink <NUM> is configured to dissipate heat away from the first integrated device <NUM>. A second heat sink <NUM> is positioned on top of the second integrated device <NUM>. The second heat sink <NUM> is configured to dissipate heat away from the second integrated device <NUM>. There is an ongoing need to improve the performance of heat dissipating devices.

<CIT> discloses an assembly with a frame, a step heat sink and an EMI shield.

Various features relate to integrated devices implemented with a heat sink, according to claim <NUM>.

Various features, nature and advantages may become apparent from the detailed description set forth below when taken in conjunction with the drawings in which like reference characters identify correspondingly throughout.

The embodiments described in relation to <FIG>, <FIG>, <FIG>, <FIG> do not form part of the invention but are useful to understand it.

In the following description, specific details are given to provide a thorough understanding of the various aspects of the disclosure. However, it will be understood by one of ordinary skill in the art that the aspects may be practiced without these specific details. For example, circuits may be shown in block diagrams in order to avoid obscuring the aspects in unnecessary detail. In other instances, well-known circuits, structures and techniques may not be shown in detail in order not to obscure the aspects of the disclosure.

The present disclosure describes an assembly comprising a substrate, a first integrated device coupled to the substrate, a second integrated device coupled to the substrate, a frame coupled to the substrate such that the frame at least partially surrounds the first integrated device and the second integrated device, and a step heat sink coupled to the frame, such that the step heat sink is located over the first integrated device and the second integrated device. The assembly further includes a shield coupled to the frame such that the shield is located between the frame and the step heat sink. The shield may include a step shield. The step heat sink may be configured to provide shielding (e.g., electromagnetic interference shielding). The assembly further includes a heat pipe coupled to the step heat sink. As will be further described below, the step heat sink may be configured to help provide improved heat dissipation for the first integrated device and/or the second integrated device, while also reducing how quickly a surface temperature of a device that includes the assembly, increases.

<FIG> illustrates an assembly <NUM> that includes integrated devices and a step heat sink. As shown in <FIG>, the assembly <NUM> includes a substrate <NUM>, a first integrated device <NUM>, a second integrated device <NUM>, a frame <NUM>, a shield <NUM>, a step heat sink <NUM> and a heat pipe <NUM>. As will be further described below in detail, the first integrated device <NUM> is coupled to the substrate <NUM>, the second integrated device <NUM> is coupled to the substrate <NUM>, the frame <NUM> is coupled to the substrate <NUM> such that the frame <NUM> at least partially surrounds (e.g., laterally surrounds) the first integrated device <NUM> and the second integrated device <NUM>, and the step heat sink <NUM> is coupled to the frame <NUM>, such that the step heat sink <NUM> is located over the first integrated device <NUM> and the second integrated device <NUM>. The step heat sink <NUM> is configured to help dissipate heat away from the first integrated device <NUM> and away from the second integrated device <NUM>.

The substrate <NUM> may be a laminate substrate. The substrate <NUM> may include interconnects (pads, traces, vias), which are not shown. The first integrated device <NUM> and the second integrated device <NUM> are each coupled to a first surface of the substrate <NUM>. The first integrated device <NUM> and the second integrated device <NUM> may be coupled to interconnects of the substrate <NUM> through a plurality of solder interconnects and/or pillar interconnects. For example, the second integrated device <NUM> is coupled to the substrate <NUM> through a plurality of solder interconnects <NUM>. The plurality of solder interconnects <NUM> may include a land grid array (LGA). The first integrated device <NUM> and/or the second integrated device <NUM> may include a die (e.g., bare die). An integrated device may include a radio frequency (RF) device, an analog device, a passive device, a filter, a capacitor, an inductor, an antenna, a transmitter, a receiver, a surface acoustic wave (SAW) filters, a bulk acoustic wave (BAW) filter, a light emitting diode (LED) integrated device, a silicon (Si) based integrated device, a silicon carbide (SiC) based integrated device, a GaAs based integrated device, a GaN based integrated device, a memory, power management processor, and/or combinations thereof.

<FIG> illustrates an assembly view of the assembly <NUM>. <FIG> and <FIG> will be described in conjunction with each other. A first thermal interface material (TIM) <NUM> is coupled to the first integrated device <NUM>. The first TIM <NUM> may be coupled to and/or located over a back side (e.g., top side) of the first integrated device <NUM>. A second thermal interface material (TIM) <NUM> is coupled to the second integrated device <NUM>. The second TIM <NUM> may be coupled to and/or located over a back side (e.g., top side) of the second integrated device <NUM>.

The frame <NUM> is coupled to the first surface of the substrate <NUM>. The frame <NUM> is coupled to the substrate <NUM> such that the frame <NUM> at least partially surrounds (e.g., laterally surround) the first integrated device <NUM> and the second integrated device <NUM>. In some implementations, the frame <NUM> surrounds the first integrated device <NUM> and the second integrated device <NUM> such that the first integrated device <NUM> is located in a first compartment and the second integrated device <NUM> is located in a second compartment. The frame <NUM> may include a first opening over the first integrated device <NUM> and a second opening over the second integrated device <NUM>. The frame <NUM> may include an electrically conductive material. The frame <NUM> may be made of one component or may be made of several components. The frame <NUM> may be a continuous frame and/or a contiguous frame.

The shield <NUM> is coupled to the frame <NUM> such that the shield <NUM> is located over the first integrated device <NUM> and the second integrated device <NUM>. The shield <NUM> is configured to provide electromagnetic interference (EMI) shielding. The shield <NUM> may be a step shield. The shield <NUM> may be a means for shielding (e.g., EMI shielding). The shield <NUM> may be configured to be electrically coupled to the frame <NUM> such that both the shield <NUM> and the frame <NUM> are configured to provide shielding (e.g., EMI shielding). The shield <NUM> and/or the frame <NUM> may be configured to be coupled to ground.

The shield <NUM> includes a first shield portion 210a, a second shield portion 210b, and a third shield portion 210c. The first shield portion 210a, the second shield portion 210b, and the third shield portion 210c may be continuous and/or contiguous portions of the shield <NUM>. In some implementations, the shield <NUM> may include separate portions. For example, in some implementations, at least two portions from the first shield portion 210a, the second shield portion 210b, and the third shield portion 210c may be separate portions. It is noted that how the shield <NUM> is divided into portions is arbitrary. Different implementations may divide the shield <NUM> into different portions and/or into a different number of portions. The portions may have different shapes and/or sizes.

<FIG> illustrates that the shape and design of the shield <NUM> is such that the shield <NUM> includes a step shield, where at least two surfaces (e.g., horizontal surface, surface approximately parallel to a back surface of the integrated device, surface coupled to a TIM, surface coupled to frame, surface coupled to heat sink) facing in the same direction are non-planar to each other. For example, a first surface (e.g., top surface) of the first shield portion 210a over the first integrated device <NUM> is non-planar to a first surface (e.g., top surface) of the second shield portion 210b over the second integrated device <NUM>. Similarly, a second surface (e.g., bottom surface) of the first shield portion 210a over the first integrated device <NUM> may be non-planar to a second surface (e.g., bottom surface) of the second shield portion 210b over the second integrated device <NUM>. The shield <NUM> may be a step shield that is designed such that the step shield may be coupled to two non-planar surfaces. In some implementations, the two non-planar surfaces that the step shield may be coupled to, are approximately parallel to one another.

As shown in <FIG>, <FIG> and/or <NUM>, and further described below, in some implementations, the second surface (e.g., bottom surface) of the first shield portion (e.g., 210a, 410a) that is coupled to the frame (e.g., <NUM>, <NUM>) and/or the first TIM <NUM>, may be non-planar to the second surface (e.g., bottom surface) of the second shield portion 210b that is coupled to the second TIM <NUM>.

In <FIG>, the first shield portion 210a is coupled to the third shield portion 210c, and the second shield portion 210b is coupled to the third shield portion 210c such that the third shield portion 210c is between the first shield portion 210a and the second shield portion 210b. The second shield portion 210b is non-planar to the first shield portion 210a. <FIG> also illustrate that the shield <NUM> includes an opening above the first integrated device <NUM>.

The step heat sink <NUM> is coupled to the shield <NUM> and/or the first integrated device <NUM>. In particular, a portion of the step heat sink <NUM> is coupled to the shield <NUM> through a TIM <NUM>, and another portion of the step heat sink <NUM> is coupled to the first integrated device <NUM> through the first TIM <NUM>.

The step heat sink <NUM> may be configured to be electrically coupled to the frame <NUM> and/or the shield <NUM> such that, the step heat sink <NUM>, the shield <NUM> and/or the frame <NUM> are configured to provide shielding (e.g., EMI shielding). The means for shielding (e.g., means for EMI shielding) may include the step heat sink <NUM>, the shield <NUM> and/or the frame <NUM>. The step heat sink <NUM>, the shield <NUM> and/or the frame <NUM> may be configured to be coupled to ground.

The step heat sink <NUM> includes a first heat sink portion 220a, a second heat sink portion 220b, and a third heat sink portion 220c. The step heat sink <NUM> may be a means for heat dissipation. The first heat sink portion 220a, the second heat sink portion 220b, and the third heat sink portion 220c may be continuous and/or contiguous portions of the step heat sink <NUM>. In some implementations, the step heat sink <NUM> may include separate portions. For example, in some implementations, at least two portions from the first heat sink portion 220a, the second heat sink portion 220b, and the third heat sink portion 220c may be separate portions. It is noted that how the step heat sink <NUM> is divided into portions is arbitrary. Different implementations may divide the step heat sink <NUM> into different portions and/or into a different number of portions. The portions of the step heat sink <NUM> may have different sizes and/or shapes.

The first heat sink portion 220a is coupled to the third heat sink portion 220c. The second heat sink portion 220b is coupled to the third heat sink portion 220c, such that the third heat sink portion 220c is between the first heat sink portion 220a and the second heat sink portion 220b, where the second heat sink portion 220b is non-planar to the first heat sink portion 220a.

<FIG> illustrates that the shape and design of the step heat sink <NUM> is such that at least two surfaces (e.g., horizontal surface, surface approximately parallel to a back surface of the integrated device, surface coupled to a TIM, surface coupled to shield, surface coupled to integrated) facing in the same direction are non-planar to each other. For example, a first surface (e.g., top surface) of the first heat sink portion 220a over the first integrated device <NUM> is non-planar to a first surface (e.g., top surface) of the second heat sink portion 220b over the second integrated device <NUM>. Similarly, a second surface (e.g., bottom surface) of the first heat sink portion 220a over the first integrated device <NUM> may be non-planar to a second surface (e.g., bottom surface) of the second heat sink portion 220b over the second integrated device <NUM>. The step heat sink <NUM> may be designed such that the step heat sink <NUM> may be coupled to two non-planar surfaces. In some implementations, the two non-planar surfaces that the step heat sink <NUM> may be coupled to, are approximately parallel to one another.

As shown in <FIG>, <FIG> and/or <NUM>, and further described below, in some implementations, the second surface (e.g., bottom surface) of the first heat sink portion (e.g., 220a, 420a, 620a) that is coupled to the first TIM <NUM>, the gasket <NUM>, the gasket <NUM>, the first shield portion (210a, 410a) and/or the TIM <NUM>, may be non-planar to the second surface (e.g., bottom surface) of the second heat sink portion 220b that is coupled to the TIM <NUM> and/or the second shield portion (e.g., 210b, 410b).

The first heat sink portion 220a includes a protrusion <NUM> that is located over the first integrated device <NUM>. The protrusion <NUM> may help reduce the thickness of the first TIM <NUM> between the first heat sink portion 220a and the first integrated device <NUM>. The first heat sink portion 220a is coupled to the first TIM <NUM>. The second heat sink portion 220b is located over the second integrated device <NUM>. The second heat sink portion 220b is coupled to the TIM <NUM>. The step heat sink <NUM> may be coupled to the shield <NUM> through a gasket <NUM>. For example, the first heat sink portion 220a may be coupled to the first shield portion 210a through the gasket <NUM>.

The step heat sink <NUM> may be configured to be electrically coupled to the shield <NUM>. In some implementations, the step heat sink <NUM> may be configured to also provide shielding (e.g., EMI shielding). The step heat sink <NUM> may be configured to be electrically coupled to the shield <NUM> through the gasket <NUM>. Thus, in some implementations, the gasket <NUM> may include material that is electrically conductive. The step heat sink <NUM> may be configured to be coupled to ground.

The heat pipe <NUM> is coupled to the step heat sink <NUM>. The heat pipe <NUM> may be a means for phase transition heat dissipation. The heat pipe <NUM> may be a heat transfer device that is configured to help dissipate heat away through thermal conductivity and phase transition. The heat pipe <NUM> may include a liquid inside a casing of the heat pipe <NUM>. The liquid inside the heat pipe <NUM> may cycle through a liquid phase and a vapor to help dissipate heat. The heat pipe <NUM> is coupled to the first heat sink portion 220a such that the heat pipe <NUM> is located over the first integrated device <NUM>. The size and shape of the heat pipe <NUM> such that a top surface is at or below a top surface of the second heat sink portion 220b. In some implementations, the heat pipe <NUM> is located over the first integrated device <NUM> because the first integrated device <NUM> may be configured to generate more heat than the second integrated device <NUM>, and in such instances, it may be more important, more critical, more relevant, and/or more productive overall, to focus the overall design of the assembly to dissipate heat away from the first integrated device <NUM>. In such designs, heat may still be dissipated away from the second integrated device <NUM>.

As will be further illustrated and described below in <FIG>, the use of a step heat sink helps reduce the overall temperature (e.g., junction temperature) of the integrated device (e.g., first integrated device, second integrated device) by dissipating more heat away from the integrated device. In addition, the use of the board <NUM> helps spread out the heat towards a greater area, thus reducing the rate at which temperature increases on the outer surfaces of a device that includes the assembly (e.g., <NUM>).

The assembly <NUM> may be coupled to a connector <NUM>. The connector <NUM> is coupled to the board <NUM>. The board <NUM> may be a printed circuit board (PCB) and/or a system board. The connector <NUM> may be coupled to the substrate <NUM> and/or interconnects (e.g., pins) of the substrate <NUM>. The connector <NUM> is configured to provide one or more electrical paths between the substrate <NUM> and the board <NUM>. The assembly <NUM> or part of the assembly <NUM> may be configured to operate as a M. <NUM> module. The substrate <NUM> may be a M. <NUM> compatible substrate. The substrate <NUM> may be a board.

The assembly <NUM> may be implemented in a device, such as a computer device (e.g., laptop, tablet), such that the substrate facing side of the assembly <NUM> faces the front side (e.g., keyboard side, screen side) of the device, while the step heat sink facing side of the assembly <NUM> faces the back side (e.g., bottom side) of the device. <FIG> illustrates that the substrate (e.g., <NUM>) facing side of the assembly <NUM> faces the keyboard side <NUM> of a device, while the step heat sink (e.g., <NUM>) facing side of the assembly <NUM> faces the bottom side <NUM> of the device. However, different implementations may implement the assembly in a device differently (e.g., different location, different orientation, different configuration). The use of a step heat sink and/or a step shield may be implemented when two or more integrated device with different heights are used.

The size, dimensions, shapes, locations, and orientations of the various components shown in <FIG> are exemplary and are not necessarily to scale. For example, the first integrated device <NUM> is shown as having a lower height than the second integrated device <NUM>. In some implementations, the second integrated device <NUM> may be taller and/or bigger. In addition, there may be other components that are part of the assembly <NUM> that are not shown.

As mentioned above, <FIG> illustrates an assembly view of the assembly <NUM>. The assembly <NUM> may be coupled to the board <NUM>. As shown in <FIG>, the first integrated device <NUM> and the second integrated device <NUM> are coupled to the substrate <NUM>. The second integrated device <NUM> is coupled to the substrate <NUM> through a plurality of solder interconnects <NUM> (e.g., LGA). The first TIM <NUM> is coupled to a top portion (e.g., back side) of the first integrated device <NUM>. The second TIM <NUM> is coupled to a top portion (e.g., back side) of the second integrated device <NUM>. The frame <NUM> is configured to be coupled to the substrate <NUM> such that the frame <NUM> at least partially surrounds (e.g., laterally surrounds) the first integrated device <NUM> and the second integrated device <NUM>.

The shield <NUM> includes an opening <NUM>. The shield <NUM> is configured to be coupled to the frame <NUM> such that the shield <NUM> is located over the first integrated device <NUM> and the second integrated device <NUM>. The opening <NUM> is located over the first integrated device <NUM> and the first TIM <NUM>. The opening <NUM> is configured to allow coupling between the step heat sink <NUM> and the first integrated device <NUM>. The shield <NUM> may be configured to be coupled to the second TIM <NUM>.

The gasket <NUM> is configured to be coupled to the shield <NUM> (e.g., coupled to the first shield portion 210a). The TIM <NUM> is configured to be coupled to the shield <NUM> (e.g., coupled to the second shield portion 210b).

The step heat sink <NUM> is configured to be coupled to the first integrated device <NUM> through the first TIM <NUM>. For example, the first heat sink portion 220a is configured to be coupled to the first TIM <NUM>, which is coupled to the first integrated device <NUM>. The step heat sink <NUM> is further configured to be coupled to the shield <NUM> (e.g., through the gasket <NUM> and/or the TIM <NUM>). For example, the first heat sink portion 220a is configured to be coupled to the gasket <NUM>, and the second heat sink portion 220b is configured to be coupled to the TIM <NUM>.

The heat pipe <NUM> is configured to be coupled to the step heat sink <NUM>. In some implementations, the heat pipe <NUM> is configured to be coupled to the first heat sink portion 220a, such that the heat pipe <NUM> is located over the first integrated device <NUM>.

Various implementations may use various materials, parts and/or components with various dimensions and/or properties. For example, the thermal interface materials (TIMs) may have a thermal conductivity value (k) in a range of approximately <NUM>-<NUM> Watts per meter kelvin (W/(mk)). The shield <NUM> may have a thermal conductivity value (k) a range of approximately <NUM>-<NUM> W/(mk). The step heat sink <NUM> may have a thermal conductivity value (k) a range of approximately <NUM>-<NUM> W/(mk).

The first TIM <NUM> may have a thickness in a range of approximately <NUM>-<NUM> millimeters (mm). The second TIM <NUM> may have a thickness in a range of approximately <NUM>-<NUM>. The TIM <NUM> may have a thickness in a range of approximately <NUM>-<NUM>. The first heat sink portion 220a and/or the second heat sink portion 220b may have a thickness of approximately <NUM>. The heat pipe <NUM> may have a thickness of approximately <NUM>.

The first TIM <NUM> may include grease in liquid phase. The second TIM <NUM> and/or the TIM <NUM> may include a silicon based thermal pad. The shield <NUM> may include an electrically conductive material (e.g., Al, Iron, Steel). The step heat sink <NUM> may include an electrically conductive material (e.g., Cu, gold, silver).

It is noted that the dimensions and materials described above may be applicable to any of the assemblies, TIMs, substrate, shields, heat sinks, and/or heat pipes described in the disclosure.

As mentioned above, different implementations may include different configurations of an assembly having integrated devices and a step heat sink. <FIG> and <FIG> illustrate another assembly <NUM>. The assembly <NUM> is similar to the assembly <NUM> of <FIG> and <FIG>, and thus includes similar components and arrangements as the assembly <NUM>.

As shown in <FIG> and <FIG>, the assembly <NUM> includes the substrate <NUM>, the first integrated device <NUM>, the second integrated device <NUM>, the plurality of solder interconnects <NUM>, the first TIM <NUM>, the second TIM <NUM>, a frame <NUM>, the shield <NUM>, a TIM <NUM>, the TIM <NUM>, a step heat sink <NUM>, and the heat pipe <NUM>.

The frame <NUM> is similar to the frame <NUM>. The shield <NUM> is similar to the shield <NUM>. However, the shield <NUM> does not include an opening (e.g., <NUM>). The TIM <NUM> is similar to the TIM <NUM>. The step heat sink <NUM> is similar to the step heat sink <NUM>. However, the step heat sink <NUM> does not include a protrusion as illustrated by the step heat sink <NUM> of <FIG> and <FIG>.

As shown in <FIG> and <FIG>, the first integrated device <NUM> and the second integrated device <NUM> are coupled to the substrate <NUM>. The second integrated device <NUM> is coupled to the substrate <NUM> through a plurality of solder interconnects <NUM> (e.g., LGA). The first TIM <NUM> is coupled to a top portion (e.g., back side) of the first integrated device <NUM>. The second TIM <NUM> is coupled to a top portion (e.g., back side) of the second integrated device <NUM>. The frame <NUM> is configured to be coupled to the substrate <NUM> such that the frame <NUM> at least partially surrounds (e.g., laterally surrounds) the first integrated device <NUM> and the second integrated device <NUM>.

The shield <NUM> is configured to be coupled to the frame <NUM> such that the shield <NUM> is located over the first integrated device <NUM> and the second integrated device <NUM>. The shield <NUM> may be configured to be coupled to the first TIM <NUM> and the second TIM <NUM>. The TIM <NUM> is configured to be coupled to the shield <NUM> (e.g., coupled to the first shield portion 410a). The TIM <NUM> is configured to be coupled to the shield <NUM> (e.g., coupled to the second shield portion 410b).

The step heat sink <NUM> is configured to be coupled to the first integrated device <NUM> through the TIM <NUM>, the shield <NUM> and the first TIM <NUM>. For example, the first heat sink portion 420a is configured to be coupled to the TIM <NUM>, which is coupled to the shield <NUM>. The shield <NUM> is coupled to the first TIM <NUM>, which is coupled to the first integrated device <NUM>. The second heat sink portion 420b is configured to be coupled to the TIM <NUM>.

The heat pipe <NUM> is configured to be coupled to the step heat sink <NUM>. The heat pipe <NUM> is configured to be coupled to the first heat sink portion 420a, such that the heat pipe <NUM> is located over the first integrated device <NUM>.

<FIG> and <FIG> illustrate another assembly <NUM>. The assembly <NUM> is similar to the assembly <NUM> of <FIG> and <FIG>, and thus includes similar components and arrangements as the assembly <NUM>.

As shown in <FIG> and <FIG>, the assembly <NUM> includes the substrate <NUM>, the first integrated device <NUM>, the second integrated device <NUM>, the plurality of solder interconnects <NUM>, the first TIM <NUM>, the second TIM <NUM>, a frame <NUM>, the shield <NUM>, a gasket <NUM>, the TIM <NUM>, a step heat sink <NUM>, and the heat pipe <NUM>.

The frame <NUM> is similar to the frame <NUM>. The shield <NUM> is similar to the shield <NUM>. However, the shield <NUM> is configured to be located over the second integrated device <NUM>. The gasket <NUM> is similar to the gasket <NUM>. The step heat sink <NUM> may be similar to the step heat sink <NUM>.

The shield <NUM> is configured to be coupled to the frame <NUM> such that the shield <NUM> is located over the second integrated device <NUM>. The shield <NUM> may be configured to be coupled to the second TIM <NUM>.

The gasket <NUM> is configured to be coupled to the frame <NUM>. The TIM <NUM> is configured to be coupled to the shield <NUM>.

The step heat sink <NUM> is configured to be coupled to the first integrated device <NUM> through the first TIM <NUM>. For example, the first heat sink portion 620a is configured to be coupled to the first TIM <NUM>, which is coupled to the first integrated device <NUM>. The step heat sink <NUM> is configured to be coupled to the shield <NUM>. For example, the second heat sink portion 620b is configured to be coupled to the TIM <NUM>, which is coupled to the shield <NUM>.

The heat pipe <NUM> is configured to be coupled to the step heat sink <NUM>. In some implementations, the heat pipe <NUM> is configured to be coupled to the first heat sink portion 620a, such that the heat pipe <NUM> is located over the first integrated device <NUM>.

<FIG> illustrates a device <NUM> that includes an assembly having integrated devices, a shield and a step heat sink. The device <NUM> may be a computer device, such as a laptop or a tablet. The device <NUM> includes a case <NUM> and a screen portion <NUM>. The case <NUM> is configured to store various components, such as an assembly, a board, integrated devices, energy storage device (e.g., battery), a storage device (e.g., solid state device (e.g., SSD)). The case <NUM> may include input/output devices, such as a keyboard.

As shown in <FIG>, the assembly <NUM> is implemented with the device <NUM> such that the assembly is located within the case <NUM> of the device <NUM>. <FIG> illustrates that the substrate (e.g., <NUM>) facing side of the assembly <NUM> faces the keyboard side <NUM> of a device <NUM>, while the step heat sink (e.g., <NUM>) facing side of the assembly <NUM> faces the bottom side <NUM> of the device <NUM>. However, different implementations may implement the assembly in a device differently (e.g., different location, different orientation, different configuration). In some implementations, the assembly <NUM> may be implemented in the screen portion <NUM> of the device <NUM>. In such an instance, the substrate (e.g., <NUM>) facing side of the assembly <NUM> may face the screen side of a device <NUM>, while the step heat sink (e.g., <NUM>) facing side of the assembly <NUM> may face the back side of the screen portion <NUM> of the device <NUM>. Any of the assemblies (e.g., <NUM>, <NUM>) described in the disclosure may be implemented with the device <NUM> in a similar manner or a different manner.

<FIG> illustrate graphs that show heat dissipating performances when using a non-step heat sink and when using a step heat sink. The graph <NUM> illustrates a temperature profile (e.g., junction temperature profile) of an integrated device, a bottom surface temperature profile of a device, and a top surface temperature profile (e.g., a keyboard surface temperature profile) of the device, when a non-step heat sink is implemented with a device. The graph <NUM> illustrates a temperature profile (e.g., junction temperature profile) of an integrated device (e.g., first integrated device <NUM>), a bottom surface temperature profile of a device, and top surface temperature profile (e.g., a keyboard surface temperature profile) of the device, when a step heat sink (e.g., <NUM>, <NUM>, <NUM>) is implemented with the device (e.g., <NUM>).

The graph <NUM> illustrates that within <NUM> seconds, the junction temperature of the integrated device has risen to about <NUM> degree Celsius. In contrast, as shown in graph <NUM>, when a particular step heat sink is implemented, the junction temperature of the integrated device has risen to less than <NUM> degree Celsius. The graph <NUM> illustrates that within <NUM> seconds, the top surface temperature (e.g., keyboard surface temperature) has reached <NUM> degree Celsius (which is the normal skin temperature of a human). In contrast, as shown in graph <NUM>, when a particular step heat sink is implemented, the top surface temperature (e.g., keyboard surface temperature) does not reach <NUM> degree Celsius until at least about <NUM> seconds. With the particular step heat sink, the integrated device may not need to be throttled until <NUM> seconds.

<FIG> illustrates that the use of a step heat sink (e.g., <NUM>, <NUM>, <NUM>) provides better heat dissipation of integrated devices (e.g., <NUM>), while also reducing the rate at which the surface temperatures of a devices increases, thereby making the device more comfortable for a user of the device. It is noted that the shield (e.g., <NUM>, <NUM>, <NUM>), the substrate <NUM> and/or the board <NUM> may be configured to help dissipate heat away from the integrated device(s) and spread out the heat in a greater area, which helps reduce the surface temperatures of a device that includes the step heat sink, the shield, the substrate, and/or the board <NUM>. As shown in <FIG>, the particular design of the step heat sink that is used for the graph is such that the temperature change at the top surface of the device is approximately the same as the temperature change at the bottom surface of the device. However, different implementations of the step heat sink may provide different results in how and where heat is dissipated from a heat generating region (e.g., region that includes an integrated device).

Having described various assemblies having a shield and a step heat sink, sequences for fabricating a step heat sink and a shield will now be described below.

<FIG> illustrates an exemplary sequence for providing or fabricating a step heat sink. In some implementations, the sequence of <FIG> may be used to provide or fabricate the step heat sink of <FIG> and <FIG>, or any of the step heat sink described in the disclosure. However, the sequence of <FIG> may be used to fabricate any of the step heat sinks described in the disclosure.

It should be noted that the sequence of <FIG> may combine one or more stages in order to simplify and/or clarify the sequence for providing or fabricating the step heat sink. In some implementations, the order of the processes may be changed or modified. In some implementations, one or more of processes may be replaced or substituted without departing from the spirit of the disclosure. However, different implementations may fabricate a step heat sink differently.

Stage <NUM> illustrates a state after a thermally conductive material <NUM> is provided. The thermally conductive material <NUM> may have high thermal conductivity value (k) (e.g., <NUM> W/(mk) or higher), such as copper. Different implementations may use different material(s) for the thermally conductive material <NUM>. In some implementations, the thermally conductive material <NUM> may be an alloy.

Stage <NUM> illustrates a state after a portion <NUM> of the thermally conductive material <NUM> has been removed. A mechanical process may be used to remove the portion <NUM>. For example, a milling machine may be used to remove the portion <NUM>.

Stage <NUM> illustrates a state after portions 1104a and 1104b of the thermally conductive material <NUM> has been removed. A mechanical process (e.g., milling process) may be used to remove the portions 1104a and 1104b. As shown in <FIG>, a protrusion <NUM> is formed in the step heat sink <NUM>.

In some implementations, a stamping process may be used to form the step heat sink <NUM>. Depending on the material(s) that is used for the step heat sink (e.g., <NUM>), a milling process or stamping process may be used to fabricate the step heat sink. An example of a stamping process is illustrated and described in <FIG>. The stamping process of <FIG> may be used to fabricate the step heat sink (e.g., <NUM>). The step heat sink (e.g., <NUM>) may be unibody step heat sink or may include several components to form the step heat sink.

<FIG> illustrates an exemplary sequence for providing or fabricating a step shield. In some implementations, the sequence of <FIG> may be used to provide or fabricate the step shield of <FIG> and <FIG>, or any of the step shield described in the disclosure. However, the sequence of <FIG> may be used to fabricate any of the step shields described in the disclosure.

It should be noted that the sequence of <FIG> may combine one or more stages in order to simplify and/or clarify the sequence for providing or fabricating the step shield. In some implementations, the order of the processes may be changed or modified. In some implementations, one or more of processes may be replaced or substituted without departing from the spirit of the disclosure. However, different implementations may fabricate a step shield differently.

Stage <NUM> illustrates a state after an electrically conductive material <NUM> is provided. The electrically conductive material <NUM> may also be a thermally conductive material that has a thermal conductivity value (k) of approximately of <NUM> W/(mk) or higher. The electrically conductive material <NUM> may include a metal.

Stage <NUM> illustrates a state after portions <NUM> (e.g., 1202a, 1202b, 1202c) of the electrically conductive material <NUM> have been removed. A mechanical process (e.g., stamping process) may be used to remove the portions <NUM> (e.g., 1202a, 1202b, 1202c).

Stage <NUM> illustrates a state after portions of the material <NUM> are folded to form the first shield portion 210a, the second shield portion 210b and the third shield portion 210c. A mechanical process (e.g., a stamping process) may be used to form the shield portions 210a, 210b, and the 210c.

Stage <NUM> illustrates a state after portions of the material <NUM> are further folded to form side walls for the shield <NUM>. In some implementations, a stamping process may be used to form the side walls. Different implementations may fold the material <NUM> differently. The shield (e.g., <NUM>) may be unibody step shield or may include several components to form the step shield.

<FIG> illustrate an exemplary sequence for providing or fabricating an assembly that includes a step heat sink and a shield. In some implementations, the sequence of <FIG> may be used to provide or fabricate the assembly <NUM> of <FIG>, or any of the assemblies described in the disclosure.

It should be noted that the sequence of <FIG> may combine one or more stages in order to simplify and/or clarify the sequence for providing or fabricating the assembly that includes a step heat sink and a shield. In some implementations, the order of the processes may be changed or modified. In some implementations, one or more of processes may be replaced or substituted without departing from the spirit of the disclosure. However, different implementations may fabricate an assembly differently.

Stage <NUM>, as shown in <FIG>, illustrates a state after the first integrated device <NUM> and the second integrated device <NUM> are coupled to the substrate <NUM>. The substrate <NUM> may be a laminate substrate. The first integrated device <NUM> and the second integrated device <NUM> may be coupled to the substrate <NUM> through a plurality of interconnects. For example, the second integrated device <NUM> may be coupled to the substrate <NUM> through a plurality of solder interconnects <NUM> (e.g., LGA).

Stage <NUM> illustrates a state after the first TIM <NUM> is coupled to the first integrated device <NUM>, and the second TIM <NUM> is coupled to the second integrated device <NUM>. The first TIM <NUM> may be disposed over a back side of the first integrated device <NUM>, and the second TIM <NUM> may be disposed over a back side of the second integrated device <NUM>.

Stage <NUM> illustrates a state after the frame <NUM> is coupled to the substrate <NUM>. A solder and/or an adhesive may be used to couple to the frame <NUM> to the substrate <NUM>. However, different implementations may use different processes and/or components to couple the frame <NUM> to the substrate <NUM>.

Stage <NUM>, as shown in <FIG>, illustrates a state after the shield <NUM> is coupled to the frame <NUM>. A solder and/or an adhesive may be used to couple to the shield <NUM> to the frame <NUM>. However, different implementations may use different processes and/or components to couple the shield <NUM> to the frame <NUM>. The shield <NUM> may be a step shield. The shield <NUM> is coupled to the frame <NUM> such that the first shield portion 210a is located over the first integrated device <NUM> and the second shield portion 210b is located over the second integrated device <NUM>.

Stage <NUM> illustrates a state after the substrate <NUM> is coupled to the board <NUM>. The board <NUM> may include a printed circuit board (PCB). The substrate <NUM> may be part of the assembly <NUM>. As such, Stage <NUM> may illustrate the assembly <NUM> being coupled to the board <NUM>. The substrate <NUM> and/or the assembly <NUM> may be coupled to the board <NUM> through the connector <NUM>. The connector <NUM> may be a M. <NUM> module compatible connector. For example, the substrate <NUM> may include interconnects (e.g., pins) that may be coupled to the connector <NUM>.

Stage <NUM>, as shown in <FIG>, illustrates a state after the gasket <NUM> is coupled to the shield <NUM>, and the TIM <NUM> is coupled to the shield <NUM>. The gasket <NUM> is coupled to the first shield portion 210a, and the TIM <NUM> is coupled to the second shield portion 210b.

Stage <NUM> illustrates a state after the heat pipe <NUM> is coupled to the step heat sink <NUM>. The heat pipe <NUM> may be coupled to the first heat sink portion 220a.

Stage <NUM>, as shown in <FIG>, illustrates a state after the heat pipe <NUM> and the step heat sink <NUM> are coupled to the shield <NUM>. The step heat sink <NUM> is coupled to the first TIM <NUM>, the gasket <NUM>, and the TIM <NUM>. The first heat sink portion 220a is located over the first integrated device <NUM>. The heat pipe <NUM> is located over the first integrated device <NUM>. In some implementations, Stage <NUM> may illustrate the assembly <NUM>.

In some implementations, fabricating an assembly that includes a step heat sink and a shield includes several processes. <FIG> illustrates an exemplary flow diagram of a method <NUM> for providing or fabricating an assembly that includes a step heat sink and a shield. The method <NUM> of <FIG> may be used to provide or fabricate the assembly <NUM> of <FIG> and <FIG> described in the disclosure. However, the method <NUM> may be used to provide or fabricate any of the assemblies described in the disclosure.

It should be noted that the sequence of <FIG> may combine one or more processes in order to simplify and/or clarify the method for providing or fabricating an assembly that includes a step heat sink and a shield. In some implementations, the order of the processes may be changed or modified. In some implementations, one or more of processes may be replaced or substituted without departing from the spirit of the disclosure. Different implementations may fabricate an assembly differently.

The method couples (at <NUM>) the first integrated device <NUM> and the second integrated device <NUM> to the substrate <NUM>. The substrate <NUM> may be a laminate substrate. The first integrated device <NUM> and the second integrated device <NUM> may be coupled to the substrate <NUM> through a plurality of interconnects. For example, the second integrated device <NUM> may be coupled to the substrate <NUM> through a plurality of solder interconnects <NUM> (e.g., LGA). Stage <NUM> of <FIG> illustrates and describes an example of integrated devices coupled to a substrate.

The method couples (at <NUM>) the first TIM <NUM> to the first integrated device <NUM>, and the second TIM <NUM> to the second integrated device <NUM>. The first TIM <NUM> may be disposed over a back side of the first integrated device <NUM>, and the second TIM <NUM> may be disposed over a back side of the second integrated device <NUM>. Stage <NUM> of <FIG> illustrates and describes an example of TIMs being coupled to integrated devices.

The method couples (at <NUM>) the frame <NUM> to the substrate <NUM>. A solder and/or an adhesive may be used to couple to the frame <NUM> to the substrate <NUM>. However, different implementations may use different processes and/or components to couple the frame <NUM> to the substrate <NUM>. Stage <NUM> of <FIG> illustrates and describes an example of a frame coupled to a substrate.

The method couples (at <NUM>) the shield <NUM> to the frame <NUM>. A solder and/or an adhesive may be used to couple to the shield <NUM> to the frame <NUM>. However, different implementations may use different processes and/or components to couple the shield <NUM> to the frame <NUM>. The shield <NUM> may be a step shield. The shield <NUM> is coupled to the frame <NUM> such that the first shield portion 210a is located over the first integrated device <NUM> and the second shield portion 210b is located over the second integrated device <NUM>. Stage <NUM> of <FIG> illustrates and describes an example of a shield coupled to a frame.

The method couples (at <NUM>) an assembly to the board <NUM>. The method may couple the substrate <NUM> to the board <NUM>. The board <NUM> may include a printed circuit board (PCB). The substrate <NUM> may be part of the assembly <NUM>. The substrate <NUM> and/or the assembly <NUM> may be coupled to the board <NUM> through the connector <NUM>. The connector <NUM> may be a M. <NUM> module compatible connector. Stage <NUM> of <FIG> illustrates and describes an example of an assembly coupled to a board.

The method couples (at <NUM>) the gasket <NUM> to the shield <NUM>, and the TIM <NUM> to the shield <NUM>. The gasket <NUM> may be coupled to the first shield portion 210a, and the TIM <NUM> may be coupled to the second shield portion 210b. Stage <NUM> of <FIG> illustrates and describes an example of a gasket and a TIM coupled to a shield.

The method couples (at <NUM>) the heat pipe <NUM> to the step heat sink <NUM>. The heat pipe <NUM> may be coupled to the first heat sink portion 220a. Stage <NUM> of <FIG> illustrates and describes an example of a heat pipe coupled to a step heat sink.

The method couples (at <NUM>) the heat pipe <NUM> and the step heat sink <NUM> to the shield <NUM>. The step heat sink <NUM> may be coupled to the first TIM <NUM>, the gasket <NUM>, and the TIM <NUM>. The first heat sink portion 220a may be located over the first integrated device <NUM>. The heat pipe <NUM> may be located over the first integrated device <NUM>. Stage <NUM> of <FIG> illustrates and describes an example of a heat pipe and a step heat sink coupled to the shield.

<FIG> illustrates various electronic devices that may be integrated with any of the aforementioned assembly, heat sink, shield, heat pipe, device, integrated device, integrated circuit (IC) package, integrated circuit (IC) device, semiconductor device, integrated circuit, die, interposer, package, package-on-package (PoP), System in Package (SiP), or System on Chip (SoC). For example, a mobile phone device <NUM>, a laptop computer device <NUM>, a fixed location terminal device <NUM>, a wearable device <NUM>, or automotive vehicle <NUM> may include a device <NUM> as described herein. The device <NUM> may be, for example, any of the devices and/or packages described herein. The electronic devices <NUM>, <NUM>, <NUM> and <NUM> and the vehicle <NUM> illustrated in <FIG> are merely exemplary. Other electronic devices may also feature the device <NUM> including, but not limited to, a group of devices (e.g., electronic devices) that includes mobile devices, handheld personal communication systems (PCS) units, portable data units such as personal digital assistants, global positioning system (GPS) enabled devices, navigation devices, set top boxes, music players, video players, entertainment units, fixed location data units such as meter reading equipment, communications devices, smartphones, tablet computers, computers, wearable devices (e.g., watches, glasses), Internet of things (IoT) devices, servers, routers, electronic devices implemented in automotive vehicles (e.g., autonomous vehicles), or any other device that stores or retrieves data or computer instructions, or any combination thereof.

One or more of the components, processes, features, and/or functions illustrated in <FIG>, <FIG>, <FIG>, and/or <FIG> may be rearranged and/or combined into a single component, process, feature or function or embodied in several components, processes, or functions. Additional elements, components, processes, and/or functions may also be added without departing from the disclosure. It should also be noted <FIG>, <FIG>, <FIG>, and/or <FIG> and its corresponding description in the present disclosure is not limited to dies and/or ICs. In some implementations, <FIG>, <FIG>, <FIG>, and/or <NUM>-<NUM> and its corresponding description may be used to manufacture, create, provide, and/or produce devices and/or integrated devices. In some implementations, a device may include a die, an integrated device, an integrated passive device (IPD), a die package, an integrated circuit (IC) device, a device package, an integrated circuit (IC) package, a wafer, a semiconductor device, a package-on-package (PoP) device, a heat dissipating device and/or an interposer.

It is noted that the figures in the disclosure may represent actual representations and/or conceptual representations of various parts, components, objects, devices, packages, integrated devices, integrated circuits, and/or transistors. In some instances, the figures may not be to scale. In some instances, for purpose of clarity, not all components and/or parts may be shown. In some instances, the position, the location, the sizes, and/or the shapes of various parts and/or components in the figures may be exemplary. In some implementations, various components and/or parts in the figures may be optional.

The term "coupled" is used herein to refer to the direct or indirect coupling (e.g., mechanical coupling) between two objects. The term "electrically coupled" may mean that two objects are directly or indirectly coupled together such that an electrical current (e.g., signal, power, ground) may travel between the two objects. Two objects that are electrically coupled may or may not have an electrical current traveling between the two objects. The use of the terms "first", "second", "third" and "fourth" (and/or anything above fourth) is arbitrary. Any of the components described may be the first component, the second component, the third component or the fourth component. For example, a component that is referred to a second component, may be the first component, the second component, the third component or the fourth component. The term "encapsulating" means that the object may partially encapsulate or completely encapsulate another object. The term "surround" means that the object may partially surround or completely surround another object. The terms "top" and "bottom" are arbitrary. A component that is located on top may be located over a component that is located on a bottom. A top component may be considered a bottom component, and vice versa. As described in the disclosure, a first component that is located "over" a second component may mean that the first component is located above or below the second component, (e.g., depending on how a bottom or top may be arbitrarily defined). In another example, a first component may be located over (e.g., above) a first surface of the second component, and a third component may be located over (e.g., below) a second surface of the second component, where the second surface is opposite to the first surface. It is further noted that the term "over" as used in the present application in the context of one component located over another component, may be used to mean a component that is on another component and/or in another component (e.g., on a surface of a component or embedded in a component). Thus, for example, a first component that is over the second component may mean that (<NUM>) the first component is over the second component, but not directly touching the second component, (<NUM>) the first component is on (e.g., on a surface of) the second component, and/or (<NUM>) the first component is in (e.g., embedded in) the second component. A first component that is located "in" a second component may be partially located in the second component or completely located in the second component. The term "about 'value X'", or "approximately value X", as used in the disclosure means within <NUM> percent of the 'value X'. For example, a value of about <NUM> or approximately <NUM>, would mean a value in a range of <NUM>-<NUM>.

In some implementations, an interconnect is an element or component of a device or package that allows or facilitates an electrical connection between two points, elements and/or components. In some implementations, an interconnect may include a trace, a via, a pad, a pillar, a metallization layer, a redistribution layer, and/or an under bump metallization (UBM) layer / interconnect. In some implementations, an interconnect may include an electrically conductive material that may be configured to provide an electrical path for a signal (e.g., a data signal), ground and/or power. An interconnect may include more than one element or component. An interconnect may be defined by one or more interconnects. An interconnect may include one or more metal layers. An interconnect may be part of a circuit. Different implementations may use different processes and/or sequences for forming the interconnects. In some implementations, a chemical vapor deposition (CVD) process, a physical vapor deposition (PVD) process, a sputtering process, a spray coating, and/or a plating process may be used to form the interconnects.

Also, it is noted that various disclosures contained herein may be described as a process that is depicted as a flowchart, a flow diagram, a structure diagram, or a block diagram. Although a flowchart may describe the operations as a sequential process, many of the operations can be performed in parallel or concurrently. A process is terminated when its operations are completed.

Claim 1:
An assembly (<NUM>) comprising:
a substrate (<NUM>);
a first integrated device (<NUM>) coupled to the substrate (<NUM>);
a second integrated device (<NUM>) coupled to the substrate (<NUM>);
a first thermal interface material, TIM, (<NUM>) coupled to the first integrated device (<NUM>);
a second TIM (<NUM>) coupled to the second integrated device (<NUM>);
a frame (<NUM>) coupled to the substrate (<NUM>),
wherein the frame (<NUM>) at least partially surrounds the first integrated device (<NUM>) and the second integrated device (<NUM>),
wherein the frame (<NUM>) is configured to provide a first compartment and a second compartment,
wherein at least part of the frame (<NUM>) is located between the first integrated device (<NUM>) and the second integrated device (<NUM>), and
wherein the frame (<NUM>) is coupled to the substrate (<NUM>) such that the first integrated device (<NUM>) is located in the first component of the frame (<NUM>) and the second integrated device (<NUM>) is located in the second compartment of the frame (<NUM>);
a shield (<NUM>) coupled to at least part of the frame located between the first integrated device and the second integrated device;
a step heat sink (<NUM>) coupled to the frame (<NUM>),
wherein the step heat sink (<NUM>) is located over the first integrated device (<NUM>) and the second integrated device (<NUM>), and
wherein the step heat sink (<NUM>) comprises:
a first heat sink portion (420a);
a third heat sink portion (420c) coupled to the first heat sink portion (420c); and
a second heat sink portion (420b) coupled to the third heat sink portion (420c); and
a heat pipe (<NUM>) coupled to the step heat sink (<NUM>),
wherein the heat pipe (<NUM>) is located over (i) the first integrated device (<NUM>) and (ii) the first heat sink portion (420a) of the step heat sink (<NUM>), and
wherein the top surface of the heat pipe (<NUM>) and the top surface of the third heat sink portion (420c) of the step heat sink (<NUM>) are located in a same horizontal plane.