Patent Description:
An optical device (e.g., a metamaterial) with unique electrical and optical properties that cannot be found in nature may be manufactured by using an array of dielectric structures having a size that is less than the wavelength of light. In order to manufacture such an optical device, a material having a high refractive index and a low absorption rate (i.e., a low extinction coefficient) at the wavelength of corresponding light is used. For example, silicon (Si) having a refractive index of at least <NUM> and an extinction coefficient of 1x10-<NUM> or less is mainly used in an infrared band of a wavelength of <NUM>. However, it is difficult to use Si in an optical device for visible light because the light absorption of Si is large at short wavelengths in the visible light band.

On the other hand, in a material having a low extinction coefficient and a high refractive index in a visible light band, a crystalline phase having a large surface roughness is more thermodynamically stable than an amorphous phase, and therefore crystallization is facilitated when the thickness of a deposited film becomes thick. As a result of the crystallization, surface roughness of the material becomes large and patterning using a conventional semiconductor process including exposure and etching processes becomes difficult.

<CIT> discloses an infrared shielding body in which film cracking of a dielectric multilayer film is suppressed even under severe conditions. The body comprises a first and second reflective film, each of which contains a polymer and metal-containing particles.

<CIT> discloses an optical element having a dielectric multilayer film that offers excellent optical properties in combination with high reliability. The optical element comprises an optical substrate and a laminate, where the laminate comprises high refractive index and low refractive index layers laid on top of one another.

<NPL>" discloses a needle optimization technique and development thereof in order to provide a synthesis of optical coatings with layers of more than two materials.

<CIT> discloses a method of crystallizing amorphous silicon to form polycrystalline silicon having large grains. The method includes forming an amorphous silicon layer on a substrate and placing a mask over the substrate including the amorphous silicon layer.

<CIT> discloses an optical interference filter comprising alternating layers of amorphous SiO<NUM> and mixed oxides, the mixed oxides having a crystal structuring obtained following heat treatment.

The invention is defined by the subject-matter of the claims.

In accordance with an aspect of an example embodiment, a phase shifting device is defined by the features of claim <NUM>.

Each of the phase shift patterns may have the form of a bar or a slit extending in a first direction, and the plurality of phase shift patterns may be one-dimensionally arranged in a second direction perpendicular to the first direction.

The plurality of phase shift patterns may be two-dimensionally arranged and each of the phase shift patterns may have a square, rectangular, circular, or oval shape.

The phase shifting device may be applied to a flat lens, a planar color filter, a flat beam deflector, or a planar spectroscope in a visible light band or a near-infrared band.

In accordance with an aspect of an example embodiment, a multilayer thin-film structure includes at least one crystallization preventing layer; and at least one dielectric layer, wherein the at least one crystallization preventing layer comprises an amorphous material, wherein a thickness of the at least one crystallization preventing layer is less than a thickness of the at least one dielectric layer, and wherein the at least one crystallization preventing layer and the at least one dielectric layer are alternately stacked.

The multilayer thin-film structure may further include an amorphous substrate, wherein a lowermost dielectric layer from among the at least one dielectric layer is disposed on the amorphous substrate.

The multilayer thin-film structure may further include a crystalline substrate, wherein the at least one crystallization preventing layer and the at least one dielectric layer are alternately stacked on the crystalline substrate.

A refractive index of the at least one dielectric layer in a visible light band may be greater than or equal to <NUM> and an extinction coefficient of the at least one dielectric layer in the visible light band is less than or equal to 1x10-<NUM>.

An extinction coefficient of the at least one crystallization preventing layer in the visible light band is less than or equal to <NUM>×<NUM>-<NUM>.

The at least one dielectric layer may include a crystalline material having a grain size that is less than or equal to <NUM> or an amorphous material.

The thickness of the at least one dielectric layer is within a range of <NUM> to <NUM>, and the thickness of the at least one crystallization preventing layer is less than or equal to <NUM>.

A sum of thicknesses of all of the at least one crystallization preventing layer may be less than or equal to <NUM>% a total thickness of all of the at least one dielectric layer and all of the at least one crystallization preventing layer.

The at least one crystallization preventing layer may include amorphous silicon oxide (SiO<NUM>), amorphous silicon nitride (Si<NUM>N<NUM>), or amorphous aluminum oxide (Al<NUM>O<NUM>).

The at least one dielectric layer may include amorphous titanium oxide (TiO<NUM>), amorphous gallium phosphide (GaP), amorphous gallium nitride (GaN), or amorphous aluminum arsenide (AlAs).

A root mean square value of surface roughness of an uppermost surface of the multilayer thin-film structure may be less than or equal to <NUM>.

In accordance with an aspect of an example embodiment, a phase shifting device includes a plurality of phase shift patterns, each of the plurality of phase shift patterns having at least one dimension smaller than a wavelength of visible light, wherein each of the plurality of phase shift patterns comprises at least one crystallization preventing layer and at least one dielectric layer that are alternately stacked, wherein the at least one crystallization preventing layer comprises an amorphous material, and wherein a thickness of the at least one crystallization preventing layer is less than a thickness of the at least one dielectric layer.

The phase shifting device may further include an amorphous substrate, wherein each phase shift pattern from among the plurality of phase shift patterns comprises a lowermost dielectric layer from among the at least one dielectric layer, the lowermost dielectric layer being stacked on the amorphous substrate.

The phase shifting device may further include a crystalline substrate, and each phase shift pattern from among the plurality of phase shift patterns comprises the at least one crystallization preventing layer and the at least one dielectric layer that are alternately stacked on the crystalline substrate.

A refractive index of the at least one dielectric layer in a visible light band may be greater than or equal to <NUM> and an extinction coefficient of the at least one dielectric layer in the visible light band may be less than or equal to <NUM>×<NUM>-<NUM>.

An extinction coefficient of the at least one crystallization preventing layer in the visible light band is less than or equal to 1x10-<NUM>.

The thickness of the at least one dielectric layer is within a range of <NUM> to <NUM>, and the thickness of the at least one crystallization preventing layer is less than or equal <NUM>.

A sum of thicknesses of all of the at least one crystallization preventing layer present in each phase shift pattern from among the plurality of phase shift patterns may be less than or equal to <NUM>% of a total thickness of all of the at least one dielectric layer and all of the at least one crystallization preventing layer present in each shift pattern from among the plurality of phase shift patterns.

The at least one crystallization preventing layer may include amorphous silicon oxide (SiO<NUM>), amorphous silicon nitride (Si<NUM>N<NUM>), or amorphous aluminum oxide (Al<NUM>O<NUM>), and the at least one dielectric layer may include amorphous titanium oxide (TiO<NUM>), amorphous gallium phosphide (GaP), amorphous gallium nitride (GaN), or amorphous aluminum arsenide (AlAs).

A root mean square value of surface roughness of an uppermost surface of each of the plurality of phase shift patterns may be less than or equal to <NUM>.

Each phase shift pattern from among the plurality of phase shift patterns may include a bar or a slit extending in a first direction, and the plurality of phase shift patterns may be arranged in a second direction perpendicular to the first direction.

The plurality of phase shift patterns may be two-dimensionally arranged and each phase shift pattern from among the plurality of phase shift patterns may have a square, rectangular, circular, or oval shape.

The phase shifting device may be applied to a flat lens, a planar color filter, a flat beam deflector, or a planar spectroscope, and the phase shifting device may be configured to shift a phase of incident light in a visible light band or a near-infrared band.

In accordance with an aspect of an example embodiment, a thin-film metamaterial includes alternately stacked dielectric amorphous layers and crystallization preventing amorphous layers, wherein a thickness of each of the dielectric amorphous layers is less than a thickness at which the dielectric amorphous layers crystallize.

A thickness of each of the crystallization preventing amorphous layers may be less than the thickness of each of the dielectric amorphous layers.

The thickness of each of the crystallization preventing amorphous layers may be less than or equal to <NUM>, and the thickness of each of the dielectric amorphous layers may be within a range of <NUM> to <NUM>.

A refractive index in a visible light band of the dielectric amorphous layers may be greater than or equal to <NUM> and an extinction coefficient in the visible light band of the dielectric amorphous layers may be less than or equal to <NUM>×<NUM>-<NUM>.

An extinction coefficient in the visible light band of the crystallization preventing amorphous layers is less than or equal to <NUM>×<NUM>-<NUM>.

An uppermost layer of the thin-film metamaterial may be a dielectric amorphous layer, and a root mean square value of a surface roughness of the uppermost layer may be less than or equal to <NUM>.

The thin-film metamaterial may further include a plurality of structures formed on a substrate, each of the plurality of structures including the alternately stacked dielectric amorphous layers and crystallization preventing amorphous layers.

A width of each of the plurality of structures may be less than a wavelength of visible light.

An interval between each of the plurality of structures may be less than a wavelength of visible light.

The above and/or other aspects will become apparent and more readily appreciated from the following description of example embodiments, taken in conjunction with the accompanying drawings, in which:.

Hereinafter, a multilayer thin-film structure and a phase shifting device using the same will be described in detail with reference to the accompanying drawings. The same reference numerals refer to the same elements throughout. In the drawings, the sizes of constituent elements may be exaggerated for clarity. The embodiments described below are merely examples, and various modifications may be possible. In a layer structure described below, an expression such as "above" or "on" may include not only the meaning of "immediately on/under/to the left/to the right in a contact manner", but also the meaning of "on/under/to the left/to the right in a non-contact manner".

<FIG> is a cross-sectional view of a configuration of a multilayer thin-film structure <NUM> according to an example embodiment. Referring to <FIG>, the multilayer thin-film structure <NUM> according to an example embodiment includes a structure in which crystallization preventing layers <NUM> (i.e., crystallization preventing amorphous layers) and transparent dielectric layers <NUM> (i.e., dielectric amorphous layers) are alternately stacked. The transparent dielectric layers <NUM> may have a high refractive index. In the present example embodiment, the high refractive index may be defined as a refractive index of about <NUM> or more, which is higher by about <NUM> or more than the refractive index of air in a visible light band (<NUM> to <NUM>) or a near infrared band (<NUM> to <NUM>). The term "transparent" may mean that an extinction coefficient is 1x10-<NUM> or less in the visible infrared band or the near-infrared band. The material of a transparent dielectric layer <NUM> of high refractive index satisfying these conditions may include, for example, titanium oxide (TiO<NUM>), gallium phosphide (GaP), gallium nitride (GaN), or aluminum arsenide (AlAs). All of these materials have an extinction coefficient of 1x10-<NUM> or less at a wavelength of <NUM>. In addition, the refractive index of TiO<NUM> is about <NUM> at a wavelength of <NUM>, the refractive index of GaP is about <NUM> at a wavelength of <NUM>, the refractive index of GaN is about <NUM> at a wavelength of <NUM>, and the refractive index of AlAs is about <NUM> at a wavelength of <NUM>.

As a thickness of materials such as TiO<NUM>, GaP, GaN, AlAs, and the like increases, a root means square (RMS) value of a surface roughness also increases due to crystallization. Therefore, it is difficult to manufacture a nanostructure having a critical dimension of <NUM> or less. Crystallization of the dielectric layer <NUM> is suppressed by inserting crystallization preventing layer <NUM> between the dielectric layers <NUM>. The crystallization preventing layer <NUM> includes a material having an extinction coefficient of <NUM>×<NUM>-<NUM> or less in a visible light band or a near-infrared band while stably maintaining an amorphous state instead of a crystalline state. For example, the material of the crystallization preventing layer <NUM> satisfying these conditions may include amorphous silicon oxide (SiO<NUM>), amorphous silicon nitride (Si<NUM>N<NUM>), or amorphous aluminum oxide (Al<NUM>O<NUM>).

Alternatively, the crystallization preventing layer <NUM> may be formed by performing ion implantation on a surface of the dielectric layer <NUM>. For example, after the dielectric layer <NUM> is formed, a noble element such as argon (Ar), krypton (Kr), xenon (Xe), neon (Ne), or the like, a Group IV element such as silicon (Si), germanium (Ge), or the like, a Group III element such as boron (B), gallium (Ga), indium (In), or the like, or a Group V element such as nitrogen(N), phosphorus (P), arsenide (As), antimony (Sb), or the like is ion-implanted into the surface of the dielectric layer <NUM>. Then, the above-mentioned ions are intensively distributed on the surface of the dielectric layer <NUM> to form the crystallization preventing layer <NUM>. Next, another dielectric layer <NUM> may be deposited again onto the ion-implanted surface of the previous dielectric layer <NUM>.

The multilayer thin-film structure <NUM> may also include an amorphous substrate <NUM>. For example, the substrate <NUM> may include glass, quartz, fused silica, or amorphous Al<NUM>O<NUM>.

When the substrate <NUM> includes an amorphous material, the dielectric layer <NUM> may be deposited first on the substrate <NUM>. The crystallization preventing layer <NUM> may be deposited on the dielectric layer <NUM>, and the dielectric layer <NUM> may be deposited again on the crystallization preventing layer <NUM>. In this manner, the dielectric layers <NUM> and the crystallization preventing layers <NUM> may be alternately stacked. The deposition method of the dielectric layer <NUM> and the crystallization preventing layer <NUM> may include, for example, sputtering, E-beam evaporation, plasma-enhanced chemical vapor deposition (PECVD), metalorganic vapor phase epitaxy sputtering (MOCVD), atomic layer deposition (ALD), and the like. Alternatively, the crystallization preventing layer <NUM> may be formed by implanting ions into the surface of the dielectric layer <NUM> by ion implantation after the dielectric layer <NUM> is deposited by the above-described vapor deposition methods.

Although <FIG> illustratively shows that four dielectric layers <NUM> and three crystallization preventing layers <NUM> are stacked on the substrate <NUM>, this is only an example. For example, the multilayer thin-film structure <NUM> may include only two dielectric layers <NUM> and only one crystallization preventing layer <NUM>, or may include only three dielectric layers <NUM> and only two crystallization preventing layers <NUM>. In addition, a larger number of dielectric layers <NUM> and crystallization preventing layers <NUM> than those shown in <FIG> may be stacked. For example, a total thickness of the dielectric layers <NUM> and the crystallization preventing layers <NUM> may be within a range of about <NUM> to about <NUM>, and the number of dielectric layers <NUM> and the number of crystallization preventing layers <NUM> may be determined considering the thickness of each dielectric layer <NUM> and the thickness of each crystallization preventing layer <NUM>.

The dielectric layers <NUM> may be crystallized during the stacking process if the thickness of the dielectric layers <NUM> is too large. Therefore, the dielectric layer <NUM> may be stacked only to the extent that the dielectric layer <NUM> is not crystallized, and then the crystallization preventing layer <NUM> may be stacked thereon. According to the invention, the thickness of one dielectric layer <NUM> is within a range of about <NUM> to about <NUM>. The thickness of one dielectric layer <NUM> may be less than a thickness at which the dielectric layer is crystallized.

<FIG> is a cross-sectional view of a configuration of a multilayer thin-film structure 10a according to another example embodiment. Referring to <FIG>, the multilayer thin-film structure 10a may include a substrate <NUM> formed of a crystalline material. In this case, when the dielectric layer <NUM> is directly stacked on the substrate <NUM>, the dielectric layer <NUM> itself may also be crystallized. Therefore, the determination of whether to stack the crystallization preventing layer <NUM> or the dielectric layer <NUM> directly on the substrate <NUM> may depend on the type of the substrate <NUM>. When the substrate <NUM> is crystalline, as shown in <FIG>, the crystallization preventing layer <NUM> is first deposited on the substrate <NUM>, and the dielectric layer <NUM> is deposited thereon.

Regardless of the type of the substrate <NUM>, the dielectric layer <NUM> is always located at the top of the multilayer thin-film structure <NUM> shown in <FIG> and the multilayer thin-film structure 10a shown in <FIG>. Therefore, when the substrate <NUM> is amorphous, the number of dielectric layers <NUM> is one more than the number of crystallization-preventing layers <NUM>. When the substrate <NUM> is crystalline, the number of dielectric layers <NUM> is identical to the number of crystallization preventing layers <NUM>.

Since a refractive index of the crystallization preventing layer <NUM> is less than that of the dielectric layer <NUM>, the multilayer thin-film structures <NUM> and 10a may lose high refractive index characteristics when the ratio of the crystallization preventing layer <NUM> in the multilayer thin-film structures <NUM> and 10a is increased. The multilayer thin-film structure <NUM> is simulated in order to examine an influence of the dielectric layer <NUM>. For example, <FIG> is a cross-sectional view of an example of fabrication of the multilayer thin-film structure <NUM> shown in <FIG>. Referring to <FIG>, three dielectric layers <NUM> and two crystallization preventing layers <NUM> are alternately stacked on a glass substrate <NUM>. Here, it is assumed that the dielectric layer <NUM> has a thickness of <NUM> and includes TiO<NUM>, and the crystallization preventing layer <NUM> includes SiO<NUM>.

<FIG> is a graph showing a change in reflectivity according to a thickness of the crystallization preventing layer <NUM> in the multilayer thin-film structure shown in <FIG>. Referring to <FIG>, when there is no crystallization preventing layer <NUM>, that is, when the thickness of the crystallization preventing layer <NUM> is <NUM>, the reflectivity of the multilayer thin-film structure <NUM> is about <NUM> %. When the thickness of the crystallization preventing layer <NUM> is <NUM>, the reflectivity of the multilayer thin-film structure <NUM> is maintained at about <NUM> %. However, as the thickness of the crystallization preventing layer <NUM> further increases, the reflectivity of the multilayer thin-film structure <NUM> gradually increases. In particular, it can be seen that the reflectivity of the multilayer thin-film structure <NUM> greatly increases from about <NUM> % to <NUM> % as the thickness of the crystallization preventing layer <NUM> increases from <NUM> to <NUM>. As a result, when the ratio of the crystallization preventing layer <NUM> in the multilayer thin-film structures <NUM> and 10a is increased, not only do the multilayer thin-film structures <NUM> and 10a lose high refractive index characteristics, but also the light transmittance of the multilayer thin-film structures <NUM> and 10a is lowered.

In consideration of these results, the thickness of the crystallization preventing layer <NUM> is much less than the thickness of one dielectric layer <NUM>. According to the invention, the thickness of the crystallization preventing layer <NUM> is more than <NUM> and not more than about <NUM>. In addition, a sum of thicknesses of all the crystallization preventing layers <NUM> in the structure may be limited to <NUM> % or less of a total thickness of all the dielectric layers <NUM> and all the crystallization preventing layers <NUM> in the structure.

<FIG> is a cross-sectional photograph of an actually manufactured multilayer thin-film structure <NUM>. Referring to <FIG>, TiO<NUM> is deposited as the dielectric layer <NUM> on the glass substrate <NUM> to a thickness of about <NUM>, SiO<NUM> is deposited as the crystallization preventing layer <NUM> to a thickness of about <NUM>, and another layer of TiO<NUM> is deposited thereon as the dielectric layer <NUM> to a thickness of about <NUM>.

Furthermore, <FIG> is a photograph showing an upper surface of the multilayer thin-film structure <NUM> shown in <FIG>. The photograph shown in <FIG> shows an uppermost surface of the multilayer thin-film structure <NUM> obliquely taken at an angle of about <NUM>° with respect to the surface normal. Referring to <FIG>, it can be seen that the uppermost surface of the multilayer thin-film structure <NUM> is very smooth.

<FIG> is a photograph, which is obliquely taken at an angle of about <NUM>°, showing both a cross-section and an upper surface of a thin-film structure according to a comparative example. In the photograph shown in <FIG>, TiO<NUM> is deposited on a glass substrate to a thickness of about <NUM> to form the thin-film structure according to the comparative example. Referring to <FIG>, it can be seen that TiO<NUM> is not crystallized up to a thickness of <NUM>, and an upper surface of the thin-film structure is smooth.

<FIG> is a photograph, which is obliquely taken at an angle of about <NUM>°, showing both a cross-section and an upper surface of the thin-film structure shown in <FIG> after increasing the thickness of the thin-film structure. Referring to <FIG>, when TiO<NUM> is continuously deposited and the thickness becomes about <NUM>, coarse crystal grains are seen on an upper surface of TiO<NUM> because TiO<NUM> is partially crystallized as a result of the increased thickness of the TiO<NUM>.

As described above, crystallization of materials of the dielectric layer <NUM> may be prevented while maintaining the thickness of the multilayer thin-film structures <NUM> and 10a by inserting the crystallization preventing layer <NUM> between dielectric layers <NUM>. Therefore, the material of the dielectric layer <NUM> in the multilayer thin-film structures <NUM> and 10a according to the present example embodiment may maintain an amorphous state. Alternatively, the material of the dielectric layer <NUM> may be partially crystallized, but the size of crystal grains may be suppressed to <NUM> or less. Then, RMS values of surface roughnesses of uppermost surfaces of the multilayer thin-film structures <NUM> and 10a may be maintained at <NUM> or less.

<FIG> is a graph illustrating a refractive index of the multilayer thin-film structure <NUM> according to an example embodiment. The multilayer thin-film structure <NUM> has a structure in which <NUM> thick SiO<NUM> is inserted between TiO<NUM> having a total thickness of <NUM>. <FIG> shows refractive indices of Si<NUM>N<NUM>, Al<NUM>O<NUM>, SiO<NUM>, and TiO<NUM>, none of which includes the crystallization preventing layer <NUM>, together for comparison. Referring to the graph of <FIG>, it can be seen that the refractive index of the multilayer thin-film structure <NUM> is much greater than the refractive indices of Si<NUM>N<NUM>, Al<NUM>O<NUM>, and SiO<NUM> and is substantially similar to the refractive index of TiO<NUM> that does not include the crystallization preventing layer <NUM>. For example, the refractive index of the multilayer thin-film structure <NUM> at a wavelength of <NUM> is only <NUM> less than the refractive index of TiO<NUM>. Therefore, even when the crystallization preventing layer <NUM> is interposed between the dielectric layers <NUM>, it can be seen that when the thickness of the crystallization preventing layer <NUM> is small, high refractive index characteristics are maintained.

As described above, the multilayer thin-film structures <NUM> and 10a may have a sufficiently high refractive index and a sufficiently low extinction coefficient in a visible light band or a near-infrared band. Further, since the dielectric layer <NUM> is entirely or almost entirely amorphous, the surface roughness of an upper surface of the multilayer thin-film structures <NUM> and 10a may be sufficiently low. Thus, the multilayer thin-film structures <NUM> and 10a may be patterned into a nanoscale pattern using a conventional semiconductor process including exposure and etching. By patterning the multilayer thin-film structures <NUM> and 10a into the nanoscale pattern, it is possible to manufacture various optical devices operating in the visible light band or the near-infrared band.

For example, <FIG> is a cross-sectional view of a structure of a phase shifting device <NUM> according to an example embodiment. Referring to <FIG>, the phase shifting device <NUM> may include a plurality of phase shift patterns <NUM> (i.e., structures) having at least one dimension smaller than the wavelength of visible light. Here, the plurality of phase shift patterns <NUM> may be formed by patterning the multilayer thin-film structures <NUM> and 10a. Therefore, each of the phase shift patterns <NUM> may include the crystallization preventing layers <NUM> and the transparent dielectric layers <NUM> of high refractive index, which are stacked repeatedly at least once.

As described above, when the substrate <NUM> is an amorphous substrate, each phase shift pattern <NUM> includes a multilayer thin-film structure in which the dielectric layers <NUM> and the crystallization preventing layers <NUM> are repeatedly stacked in this order on the substrate <NUM> and the dielectric layer <NUM> is arranged on the top surface. When the substrate <NUM> is a crystalline substrate, each phase shift pattern <NUM> includes a multilayer thin-film structure in which the crystallization preventing layers <NUM> and the dielectric layers <NUM> are repeatedly stacked on the substrate <NUM> in this order. In addition, the structure of the phase shift patterns <NUM> may be the same as the structure of the multilayer thin-film structures <NUM> and 10a including the dielectric layers <NUM> and the crystallization preventing layers <NUM>.

A width W of each phase shift pattern <NUM>, an interval S between each two adjacent phase shift patterns <NUM>, and a height H of each phase shift pattern <NUM> may be variously determined depending on an application of the phase shifting device <NUM> and the wavelength of incident light. Either or both of the width W of each phase shift pattern <NUM> and the interval S between two adjacent phase shift patterns <NUM> may be less than the wavelength of visible light so as to operate in the visible light band or the near-infrared band. For example, the width W of each phase shift pattern <NUM> and the spacing S between two adjacent phase shift patterns <NUM> may be within a range of <NUM> to <NUM>. In addition, the height H of each phase shift pattern <NUM> may be within a range of <NUM> to about <NUM>.

Depending on the desired optical characteristics of a phase shifting device <NUM> to be formed, the plurality of phase shift patterns <NUM> may have various shapes and arrangements. The width W of each phase shift pattern <NUM> or the interval S between two adjacent phase shift patterns <NUM> may vary locally depending on the position on the phase shifting device <NUM>. For example, the width W of each phase shift pattern <NUM> or the interval S between two adjacent phase shift patterns <NUM> may gradually increase or decrease, or may vary irregularly. The plurality of phase shift patterns <NUM> may be arranged non-periodically within the entire area of the phase shifting device <NUM> or locally periodically within a specific area on the phase shifting device <NUM>.

For example, <FIG> is a perspective view of a form of exemplary phase shift patterns <NUM> of a phase shifting device 20a according to an example embodiment. Referring to <FIG>, each of the phase shift patterns <NUM> may have the form of a bar extending in a first direction. The plurality of phase shift patterns <NUM> may be arranged in a second direction perpendicular to the first direction. The plurality of phase shift patterns <NUM> may have different widths W. <FIG> shows that the widths W of the phase shift patterns <NUM> are gradually reduced in the second direction, but this is only an example. Depending on other designs, the widths W of the phase shift patterns <NUM> may change periodically or irregularly. Also, the plurality of phase shift patterns <NUM> may have an identical width W, and the interval S between the phase shift patterns <NUM> may instead be different.

<FIG> is a perspective view of a form of exemplary phase shift patterns <NUM> of a phase shifting device 20b according to another example embodiment. Referring to <FIG>, in contrast to the bar form shown in <FIG>, each of the phase shift patterns <NUM> may have the form of a slit extending in a first direction. The plurality of phase shift patterns <NUM> may be arranged in a second direction perpendicular to the first direction. For example, the phase shifting device 20b shown in <FIG> may be manufactured by forming a straight groove in the multilayer thin-film structures <NUM> and 10a via a general semiconductor process.

Furthermore, <FIG> is a perspective view of a form of exemplary phase shift patterns <NUM> of a phase shifting device 20c according to another example embodiment. Referring to <FIG>, each of the phase shift patterns <NUM> may have a square or rectangular shape. Then, the plurality of phase shift patterns <NUM> may be two-dimensionally arranged. Either or both of the width W of the plurality of phase shift patterns <NUM> or the interval S between the plurality of phase shift patterns <NUM> may vary locally depending on a position on the phase shifting device 20c. The phase shifting device 20c may be manufactured by patterning the multilayer thin-film structures <NUM> and 10a via a general semiconductor process.

Furthermore, <FIG> is a perspective view of a form of exemplary phase shift patterns <NUM> of a phase shifting device 20d according to another example embodiment. Referring to <FIG>, each of the phase shift patterns <NUM> may have a circular or oval shape, and the plurality of phase shift patterns <NUM> may be two-dimensionally arranged.

In addition, each of the phase shift patterns <NUM> may have various shapes. For example, each of the phase shift patterns <NUM> may have another polygonal shape, such as a hexagon. In addition, each of the phase shift patterns <NUM> may be a hole having a circular, oval, or polygonal shape.

<FIG> is a photograph of a surface of a phase shifting device actually manufactured so as to have a nano-lattice phase shift pattern <NUM>. The phase shift pattern <NUM> is formed by forming the multilayer thin-film structure <NUM> to a height of <NUM> using TiO<NUM> and SiO<NUM> and then patterning the multilayer thin-film structure <NUM> through exposure and etching processes.

<FIG> is a photograph of a surface of a phase shifting device actually manufactured so as to have nano-column phase shift patterns <NUM>. Each phase shift pattern <NUM> has a cylindrical shape. The phase shift pattern <NUM> is formed by forming the multilayer thin-film structure <NUM> to a height of <NUM> using TiO<NUM> and SiO<NUM> and then patterning the multilayer thin-film structure <NUM> through exposure and etching processes.

<FIG> is a graph showing a phase shift according to a change in widths or diameters of the phase shift patterns <NUM> in the phase shifting devices shown in <FIG>. In <FIG>, G1, G2, G3, and G4 denote phase shifting devices having nano-lattice phase shift patterns <NUM> having different widths, and P1, P2, P3, and P4 denote phase shifting devices having nano-column phase shift patterns <NUM> having different diameters.

Referring to <FIG>, phase delays for each of widths of the phase shift patterns <NUM> of <NUM>, <NUM>, <NUM>, and <NUM> in the phase shifting devices having the nano-lattice phase shift patterns <NUM> are <NUM>°, <NUM>°, <NUM>°, and -<NUM>°, respectively. Therefore, as the widths of the phase shift patterns <NUM> increase, the phase delays decrease. A difference between the maximum phase delay and the minimum phase delay in the phase shifting devices with the illustrated nano-lattice phase shift patterns <NUM> is <NUM>°.

Furthermore, for the phase shifting devices having the nano-column phase shift patterns <NUM>, phase delays for each of diameters of the phase shift patterns <NUM> of <NUM>, <NUM>, <NUM>, and <NUM> in the phase shifting devices are <NUM>°, <NUM>°, <NUM>°, and <NUM>°, respectively. Therefore, as the diameters of the phase shift patterns <NUM> increase, the phase delays decrease. A difference between the maximum phase delay and the minimum phase delay in the phase shifting devices with the illustrated nano-column phase shift patterns <NUM> is <NUM>°.

With such phase shifting devices, it is possible to condense incident light, scatter or reflect incident light in a specific direction, change a traveling direction of incident light, or transmit or reflect only light of a specific wavelength among incident light. In particular, it is possible to manufacture an optical device that exceeds a physical limitation of a diffraction phenomenon in a visible light band or a near-infrared wavelength band by implementing a line width of <NUM>/<NUM> or less of the wavelength of the light by using a material having a high refractive index and a low extinction coefficient in the visible light band or the near-infrared wavelength band. Operating characteristics of the optical device may be determined according to phase shift distribution by arrangement of the phase shift patterns <NUM>.

For example, <FIG> is a view of the arrangement of the nano-column phase shift patterns <NUM> of a flat lens <NUM> according to an example embodiment. Referring to <FIG>, a plurality of phase shift patterns <NUM> having a cylindrical shape are arranged on the substrate <NUM> in the form of concentric circles. Diameters of the phase shift patterns <NUM> vary depending on position on the flat lens <NUM> and the phase shift patterns <NUM> arranged at an identical radial position from the center of the flat lens <NUM> may have an identical diameter. In other words, each concentric circle of phase shift patterns <NUM> have may a uniform diameter.

<FIG> is a graph of an example of a resultant phase shift according to a position of the flat lens <NUM> shown in <FIG>. In <FIG>, the horizontal axis denotes a position in a cross-section across the center of the flat lens <NUM>, and the vertical axis denotes phase delay. Diameters of the phase shift patterns <NUM> may vary in a radial direction from the center of the flat lens <NUM> so as to have the phase delay shown in <FIG>.

<FIG> is a cross-sectional view of an example of an operation of the flat lens <NUM> shown in <FIG>. As shown in <FIG>, the flat lens <NUM> having the phase delay distribution as shown in <FIG> may serve as a lens for condensing incident light. The flat lens <NUM> may be manufactured to a very small thickness of <NUM> or less, and thus may be employed in a small optical device or a small electronic device.

<FIG> schematically shows the arrangement of the nano-column phase shift patterns <NUM> of a flat beam deflector <NUM> according to an example embodiment. Referring to <FIG>, the plurality of phase shift patterns <NUM> having a straight bar shape are arranged on the substrate <NUM>. Widths of the phase shift patterns <NUM> decrease and intervals between the phase shift patterns <NUM> increase toward the right side.

<FIG> is a graph of an example of a resultant phase shift according to a position of the flat beam deflector <NUM> shown in <FIG>. Referring to <FIG>, phase delays increase toward the right side of the flat beam deflector <NUM>.

<FIG> is a cross-sectional view of an example of an operation of the flat beam deflector <NUM> shown in <FIG>. As shown in <FIG>, the flat beam deflector <NUM> having the phase delay distribution as shown in <FIG> may change the traveling direction of incident light to a specific direction.

Various applications are possible in addition to the flat lens <NUM> and the flat beam deflector <NUM> shown in <FIG>. For example, a phase shifting device may be applied to a planar color filter, a planar spectroscope, or the like, which operates in a visible light band or a near-infrared band. In addition, the phase shifting device may be formed in an on-chip form on a semiconductor circuit structure such as an image sensor, a display device, a spatial light modulator, and the like.

Claim 1:
A multilayer thin-film structure (<NUM>) comprising:
at least one crystallization preventing layer (<NUM>);
at least one dielectric layer (<NUM>); and
a substrate (<NUM>);
wherein the at least one crystallization preventing layer comprises an amorphous material,
wherein the thickness of the at least one crystallization preventing layer is less than the thickness of the at least one dielectric layer,
wherein the at least one crystallization preventing layer and the at least one dielectric layer are alternately stacked,
wherein the extinction coefficient of the at least one crystallization preventing layer in the visible light band is less than or equal to 1x10-<NUM>, and
wherein the thickness of the at least one crystallization preventing layer is less than or equal to <NUM>, characterized in that
the thickness of the at least one dielectric layer is within a range of <NUM> to <NUM>.