Patent Description:
Published patent application <CIT> describes an III-N enhancementmode transistor including a conductive channel, source and drain contacts, and a gate electrode between the source and drain contacts. A recess formed through an insulator layer in a gate region of the transistor, with the gate electrode at least partially in the recess. The transistor further includes a field plate having a portion between the gate electrode and the drain contact, the field plate being electrically connected to the source contact. The gate electrode includes an extending portion that is outside the recess and extends towards the drain contact.

Published patent application <CIT> describes a power semiconductor device with a series connection of a heterojunction device and a unipolar power transistor. An external control terminal for driving said unipolar power transistor and said heterojunction device and an interface unit having a plurality of interface terminals is provided. A first interface terminal is operatively connected to an active gate region of the heterojunction device and a second interface terminal is operatively connected to said external control terminal.

According to embodiments of the invention, a monolithically integrated dual gate bidirectional switch as recited in claim <NUM>, claim <NUM>, claim <NUM> and claim <NUM> is provided.

An electronic system according to claim <NUM> is also provided.

The features of the various illustrated embodiments may be combined unless they exclude each other. Embodiments are depicted in the drawings and are detailed in the description that follows.

The embodiments described herein provide a monolithically integrated dual gate bidirectional switch configured to mitigate or eliminate forward diode voltage. The monolithically integrated bidirectional switch has bipolar blocking capability, where the same drift region is used for blocking in both directions, yielding lower conduction losses than a series connection of two high-voltage devices. The monolithically integrated bidirectional switch may be operated by active control of both gates with only a single external signal, or by passive control of one gate, e.g., via a diode cascode configuration without sensing which reduces complexity.

Described next, with reference to the figures, are exemplary embodiments of the monolithically integrated bidirectional switch and a corresponding electronic system that uses the monolithically integrated bidirectional switch.

<FIG> illustrates four different embodiments (A through D) of the monolithically integrated bidirectional switch. In each embodiment, the bidirectional switch is 'monolithically integrated' in that the bidirectional switch has two gates integrated in the same semiconductor substrate. The monolithically integrated bidirectional switch includes an input terminal 'IN', an output terminal 'OUT', a control terminal 'CTRL', a compound semiconductor substrate <NUM> such as, e.g., a GaN substrate, a common drift region in the compound semiconductor substrate <NUM> and in series between the input terminal IN and the output terminal OUT, a first gate 'G1', and a second gate 'G2'. Both gates G1, G2 may be normally-on gates (embodiment C), normally-off gates (embodiment A), or one normally-on gate and one normally-off gate (embodiments B and D). For a normally-on gate, a current conduction channel is present between the input terminal IN and the output terminal OUT absent any voltage being applied to the control terminal CTRL. For a normally-off gate, a current conduction channel is not present between the input terminal IN and the output terminal OUT without a suitable voltage applied to the control terminal CTRL. The upper part of <FIG> distinguishes between a normally-on gate and a normally-off gate by using different symbols.

According to embodiments A and C of the monolithically integrated bidirectional switch, the first gate G1 is electrically connected to the control terminal CTRL and the second gate G2 is electrically connected to the input terminal IN. Further according to embodiments A and C of the monolithically integrated bidirectional switch, the first and second gates G1, G2 are symmetrical in that both gates G1, G2 are either normally-off gates (embodiment A) or normally-on gates (embodiment C). In either case, the monolithically integrated bidirectional switch of embodiments A and C blocks voltages of both polarities (+V, -V) across the input and output terminals IN, OUT and conducts current in a single direction from the input terminal IN to the output terminal OUT through the common drift region of the compound semiconductor substrate <NUM> via active control of the first gate G1, as illustrated in <FIG> (embodiment A) and <FIG> (embodiment C).

According to embodiment A of the monolithically integrated bidirectional switch, the first gate G1 is a normally-off gate and the second gate G2 is a normally-off gate. The second gate G2, which is electrically connected to the input terminal IN in a gated diode configuration (i.e., gate connected to source) in embodiment A, behaves as a normally-off discrete switch plus a cascaded diode 'D2', as illustrated in <FIG>. That is, the second gate G2 is shorted to the corresponding source to create a gated diode which is effectively the G2 gate modulated through the source to source voltage to turn on. The equivalent circuit shown in <FIG> is a normally-off discrete GaN in series with a reverse blocking diode D2. The device has only one (common) drift region to sustain high voltages and therefore has lower conduction losses, and passively blocks voltages in both directions but actively allows current flow in only one direction. No additional conduction losses occur because only a single (common) drift region is used instead of two different drift regions. Accordingly, the monolithically integrated bidirectional switch has one region where voltage is blocked in both directions but with active turn on of the first gate G1 to conduct current, where the first gate G1 functions as an externally controllable gate 'G' of the monolithically integrated bidirectional switch in embodiment A.

According to embodiment C of the monolithically integrated bidirectional switch, the first gate G1 is a normally-on gate, the second gate G2 is a normally-on gate, and the second gate G2 is electrically connected to the input terminal IN via a discrete diode 'D1' or a diode D1 that is monolithically integrated with the bidirectional switch. Embodiment C is similar to embodiment A, but with the monolithically integrated bidirectional switch being a normally-on device having a diode cascode configuration.

The normally-on gates G1, G2 of embodiment C always conduct which removes a Vth (threshold voltage) drop from the conduction losses and adds a diode D1 in series with the second gate G2. The diode D1 enables current flowing in the forward direction and in the reverse direction enables to sustain a blocking voltage applied across the source and gate of the normally-on bidirectional switch. The voltage automatically turns off the second gate G2. The diode D1 may be a low voltage diode such as a discrete Si (silicon) Schottky diode such that the blocking voltage is similar to the gate voltage for normally-on devices. When the overall device sees a voltage in the reverse direction, the voltage drop across the diode D1 pulls the voltage of the second normally-on gate G2 negative in the illustrated cascode configuration, turning off the monolithically integrated bidirectional switch of embodiment C. The monolithically integrated bidirectional switch of embodiment C may be forced off by applying a negative voltage to the first gate G1 which functions as the externally controllable gate G of the monolithically integrated bidirectional switch.

The monolithically integrated bidirectional switch of embodiment C conducts when a positive voltage is applied to the device, with the conduction losses coming from RDSON (on-state resistance) of the normally-on gates G1, G2 and the relatively small voltage drop of the diode D1. Accordingly, there is no forward voltage drop associated with the gates G1, G2, but instead just the relatively low forward voltage drop of the cascaded diode D1, as illustrated in <FIG>. The diode D1 may be implemented in a different technology than the compound semiconductor substrate <NUM> of the monolithically integrated bidirectional switch to provide a relatively low voltage drop. For example, the diode D1 may be a Si diode and the compound semiconductor substrate <NUM> of the monolithically integrated bidirectional switch may be a GaN substrate. If the diode D1 is implemented in a different technology than the compound semiconductor substrate <NUM> of the monolithically integrated bidirectional switch, the diode D1 may be a discrete device or co-packaged with the monolithically integrated bidirectional switch. The second gate G2 may be electrically connected to the input terminal IN via a transistor device instead of a diode, the transistor device being electrically connected to the second gate G2 in a cascode configuration.

The equivalent circuit shown in <FIG> is a normally-on discrete GaN in series with a reverse blocking diode D1. The device passively blocks voltages in the reverse polarities but only actively blocks voltage in the forward direction.

According to embodiments B and D of the monolithically integrated bidirectional switch, the first and second gates G1, G2 are asymmetric. That is, one of the first gate G1 and the second gate G2 is a normally-on gate and the other one of the first gate G1 and the second gate G2 is a normally-off gate. The monolithically integrated bidirectional switch of embodiments B and D conducts current in a single direction from the input terminal IN to the output terminal OUT through the common drift region of the compound semiconductor substrate <NUM>, as indicated in <FIG> (embodiment B) and <FIG> (embodiment D). The monolithically integrated bidirectional switch may be actively controlled to block in both directions in embodiment B and D, e.g., via the externally accessible gate 'G' formed by the first gate G1.

According to embodiment B of the monolithically integrated bidirectional switch, the first gate G1 is a normally-on gate and the second gate G2 is a normally-off gate. The second gate G2 is electrically connected to the input terminal IN in a gated diode configuration. Accordingly, the monolithically integrated bidirectional switch behaves like a normally-on switch in series with diode in embodiment B. In one direction, the monolithically integrated bidirectional switch acts as a diode and actively turns off. In the opposite direction, the monolithically integrated bidirectional switch is fully blocking. Hence, the monolithically integrated bidirectional switch of embodiment B is always blocking in both directions and always conducting current unless actively turned off, as illustrated in <FIG>.

The equivalent circuit shown in <FIG> is a normally-on discrete GaN in series with a reverse blocking diode D2. The structure has only one (common) drift region and therefore lower conduction losses is expected compared to using discrete components. The equivalent circuit shown in <FIG> is a normally-on device in one direction but can be actively controlled to turn off and also fully blocking in the reverse polarity.

According to embodiment D of the monolithically integrated bidirectional switch, the first gate G1 is a normally-off gate, the second gate G2 is a normally-on gate, and the second gate G2 is electrically connected to the input terminal IN via a discrete diode or a diode D1 that is monolithically integrated with the bidirectional switch. Embodiment D is similar to embodiment C, but the first gate G1 which forms the externally accessible/controllable gate G of the monolithically integrated bidirectional switch is a normally-off gate instead of a normally-on gate. Hence, the monolithically integrated bidirectional switch of embodiment D conducts current in one direction but only when a sufficient voltage is applied to the first gate G1, as illustrated in <FIG>.

The equivalent circuit shown in <FIG> is a normally-off discrete GaN in series with a reverse blocking diode, the same as in <FIG>. In <FIG>, however, the first gate G1 is normally-off and the bidirectional switch device passively blocks voltages in both polarities but actively allows current through in one direction only.

Described next are embodiments of synchronous rectification circuits for use with the monolithically integrated bidirectional switch embodiments in <FIG> having a normally-off second gate G2 (embodiments A and B).

<FIG> illustrates two embodiments of synchronous rectification circuits for use with the monolithically integrated bidirectional switch of embodiment A in <FIG>. According to both synchronous rectification circuit embodiments shown in <FIG>, the monolithically integrated bidirectional switch of embodiment A further includes a synchronous rectification circuit <NUM> that turns on the second gate G2 when the first gate G1 is on. By connecting the second gate G2 to the source, the gated diode basically turns the active switch into a pure diode behavior. However, when conducting current, a diode forward threshold voltage is impressed and therefore increases conduction losses. The synchronous rectification circuit <NUM> eliminates this forward threshold voltage.

According to embodiment A of the synchronous rectification circuit <NUM> shown in <FIG>, both gates G1, G2 have a corresponding driver <NUM>, <NUM> and the synchronous rectification circuit <NUM> also includes a level shifter <NUM> electrically connected to the driver <NUM> for the second gate G2. The synchronous rectification circuit <NUM> effectively is a bootstrap and the level shifter <NUM> accounts for the floating potential of the compound semiconductor substrate <NUM>, ensuring a proper gate drive for the second gate G2 and achieving synchronous rectification by turning on the second (floating) driver <NUM> whenever the first gate G1 is on.

According to embodiment B of the synchronous rectification circuit <NUM> shown in <FIG>, the synchronous rectification circuit <NUM> includes a bootstrap capacitor Cf having a first plate electrically connected to the input terminal IN and a second plate electrically connected to the driver <NUM> for the second gate G2, and a bootstrap diode D_bstrap having an anode electrically connected to a voltage supply node Vcc and a cathode electrically connected to the second plate of the bootstrap capacitor Cf. The synchronous rectification circuit <NUM> of embodiment B may further include a resistor Rs in parallel with the bootstrap capacitor Cf. The second (floating) driver <NUM> is turned on whenever the first gate G1 turns on the device brings the floating source (drain) node to ground. The parallel resistor Rs with the bootstrap capacitor Cf ensures the second driver <NUM> turns back off when the first gate G1 is off.

<FIG> illustrates two embodiments of synchronous rectification circuits for use with the monolithically integrated bidirectional switch of embodiment B in <FIG>. According to both synchronous rectification circuit embodiments shown in <FIG>, the monolithically integrated bidirectional switch of embodiment B further includes a synchronous rectification circuit <NUM> that turns on the second gate G2 when current is flowing through the first gate G1. For the asymmetrical gate embodiment B with normally-on gate G1 for active control and the gated diode on one side, the two gate signals may not be the same and therefore cannot be driven by the same signal. For active synchronous rectification, a self-sensing control is provided.

According to embodiment A of the synchronous rectification circuit <NUM> shown in <FIG>, the synchronous rectification circuit <NUM> includes an active synchronous rectification circuit <NUM> with self-sensing control. For example, the active synchronous rectification circuit <NUM> may sense the source to source voltage and turn on the second gate G2 if the sensed source to source voltage is positive and turn off the second gate G2 when the sensed source voltage is negative.

According to embodiment B of the synchronous rectification circuit <NUM> shown in <FIG>, the synchronous rectification circuit <NUM> includes a bootstrap capacitor Cf having a first plate electrically connected to the input terminal IN and a second plate electrically connected to the driver for the second gate G2, and a bootstrap diode B_bstrap having an anode electrically connected to a voltage supply node Vcc and a cathode electrically connected to the second plate of the bootstrap capacitor Cf. The synchronous rectification circuit <NUM> of embodiment B may further include a resistor Rs in parallel with the bootstrap capacitor Cf.

<FIG> illustrates three passive network embodiments for use with the monolithically integrated bidirectional switch of embodiments B and D in <FIG>. According to embodiment A in <FIG>, a passive network <NUM> is electrically coupled in series or in parallel between the diode D1 and the normally-on second gate G2 of the monolithically integrated bidirectional switch. The passive network <NUM> aids the switching behaviour of the monolithically integrated bidirectional switch. According to embodiment B in <FIG>, an overvoltage protection (OVP) circuit <NUM> is also provided. The OVP circuit limits the voltage applied to the diode D1, thus protecting the diode D1 from excessive reverse voltage conditions. According to embodiment C in <FIG>, a Zener diode <NUM> is provided for guarding against excessive reverse voltages on diode D1.

<FIG> illustrate cross-sectional device views of the monolithically integrated bidirectional switch shown in <FIG>, according to different embodiments.

<FIG> illustrates a device embodiment for the monolithically integrated bidirectional switch of embodiment A in <FIG>. The compound semiconductor substrate <NUM> is a GaN substrate in this case, formed on a Si substrate <NUM>. The compound semiconductor substrate <NUM> includes a barrier layer <NUM> and a buffer layer <NUM> disposed below the barrier layer <NUM>. The barrier layer <NUM>, which forms the common drift region of the compound semiconductor substrate <NUM>, comprises type III-V semiconductor material and the buffer layer <NUM> comprises type III-V semiconductor material with a different bandgap as the barrier layer <NUM>. For instance, the buffer layer <NUM> may comprise GaN or AlGaN and the barrier layer <NUM> can comprise AlGaN with a higher aluminum content as the buffer layer <NUM>. AlGaN is a ternary alloy described by the formula AlxGa(<NUM>-x)N, where <NUM> < x < <NUM>. The buffer layer <NUM> forms a heterojunction with the barrier layer <NUM> such that a two-dimensional charge carrier gas <NUM> is disposed in the buffer layer <NUM> near the heterojunction interface. The term two-dimensional charge carrier gas <NUM> channel refers to a two-dimensional electron gas ("2DEG") or a two-dimensional hole gas ("2DHG"). In the above example wherein the buffer layer <NUM> is a GaN layer and the barrier layer <NUM> is a layer of AlGaN, the two-dimensional charge carrier gas <NUM> is a 2DEG.

The compound semiconductor substrate <NUM> may additionally include a back-barrier region <NUM> disposed below the buffer layer <NUM>. The back-barrier region <NUM> may comprise multiple layers of different semiconductor material that serve different purposes. For instance, the back-barrier region <NUM> may comprise a plurality of type III-V semiconductor layers on the base Si substrate <NUM>. These type III-V semiconductor layers may have different crystalline properties, e.g., layers of GaN/AIGaN with different aluminum content, that are designed to alleviate mechanical stresses in the compound semiconductor substrate <NUM> resulting from lattice mismatch between the base Si substrate <NUM> and the III-V semiconductor material. The input and output terminals IN, OUT may be implemented by respective metal contacts <NUM>, <NUM>, e.g., which contact the two-dimensional charge carrier gas <NUM> at opposite ends.

According to embodiment A of the monolithically integrated bidirectional switch of <FIG>, the first gate G1 is a normally-off gate and the second gate G2 is a normally-off gate. Accordingly, the two-dimensional charge carrier gas <NUM> is interrupted beneath both gates G1, G2. The first and second gates G1, G2 may be formed as normally-off gates by recessing the buffer layer <NUM> in the gate areas deep enough to interrupt the dimensional charge carrier gas <NUM> in the gate areas and forming the gates G1, G2 in the recessed regions. Each gate G1, G2 may include a gate dielectric <NUM> such as silicon dioxide, silicon nitride, silicon oxynitride, etc. separating the corresponding gate electrode <NUM> from the buffer layer <NUM>.

<FIG> illustrates a device embodiment for the monolithically integrated bidirectional switch of embodiment B in <FIG>. The device embodiment illustrated in <FIG> is similar to the device embodiment illustrated in <FIG>. Different, however, the first gate G1 is a normally-on gate for embodiment B of the monolithically integrated bidirectional switch in <FIG>. Accordingly, the two-dimensional charge carrier gas <NUM> is interrupted beneath the second gate G2 but not beneath the first gate G1. The second gate G2 may be formed as normally-off gate by recessing the buffer layer <NUM> in the corresponding gate area deep enough to interrupt the dimensional charge carrier gas <NUM> in the area of the second gate G2 and forming the second gate G2 in the recessed region. The first gate area may be masked during the recess process, to ensure the first gate G1 is not recessed and therefore a normally-on gate.

<FIG> illustrates a device embodiment for the monolithically integrated bidirectional switch of embodiment C in <FIG>. The device embodiment illustrated in <FIG> is similar to the device embodiment illustrated in <FIG>. Different, however, both gates gate G1, G2 are normally-on gates for embodiment C of the monolithically integrated bidirectional switch in <FIG>. Accordingly, neither gate area is recessed and the two-dimensional charge carrier gas <NUM> extends uninterrupted beneath both gates G1, G2. Also, the monolithically integrated bidirectional switch of embodiment C in <FIG> also includes a diode D1 in series with the second gate G2 of the monolithically integrated bidirectional switch. As explained above in connection with <FIG>, <FIG> and <FIG>, the diode D1 in series with the second gate G2 may be a discrete diode D1 or a diode D1 that is monolithically integrated with the bidirectional switch. Instead of a diode, the second gate G2 may be electrically connected to the input terminal via IN a transistor device electrically connected to the second gate G2 in a cascode configuration, also as previously described herein.

<FIG> illustrates a device embodiment for the monolithically integrated bidirectional switch of embodiment D in <FIG>. The device embodiment illustrated in <FIG> is similar to the device embodiment illustrated in <FIG>. Different, however, the first gate G1 is a normally-off gate and the second gate G2 is a normally-on gate for embodiment D of the monolithically integrated bidirectional switch in <FIG>. Accordingly, the two-dimensional charge carrier gas <NUM> is interrupted beneath the first gate G1 but not beneath the second gate G2. The first gate G1 may be formed as normally-off gate by recessing the buffer layer <NUM> in the corresponding gate area deep enough to interrupt the dimensional charge carrier gas <NUM> in the area of the first gate G1 and forming the first gate G1 in the recessed region. The second gate area may be masked during the recess process, to ensure the second gate G2 is not recessed and therefore a normally-on gate.

<FIG> illustrates an embodiment of an electronic system <NUM> that includes the monolithically integrated bidirectional switch (BDS) described herein. The electronic system <NUM> also includes a power converter <NUM> having an input side <NUM> and an output side <NUM> and a rectification or inverter circuit <NUM> between the input side <NUM> and the output side <NUM> of the power converter <NUM>. The rectification or inverter circuit <NUM> has one or more phases <NUM>, where each phase <NUM> of the rectification or inverter circuit <NUM> includes a first monolithically integrated bidirectional switch of the kind described herein and electrically connected in series with a second monolithically integrated bidirectional switch of the kind described herein at a phase node. Each first monolithically integrated bidirectional switch and each second monolithically integrated bidirectional switch includes an input terminal IN, an output terminal OUT, a control terminal CTRL, a compound semiconductor substrate <NUM>, a common drift region in the compound semiconductor substrate <NUM> and in series between the input terminal IN and the output terminal OUT, a first gate G1, and a second gate G2. For the monolithically integrated bidirectional switch embodiments A and C in <FIG>, the first gate G1 is electrically connected to the control terminal CTRL and the second gate G2 is electrically connected to the input terminal IN. For the monolithically integrated bidirectional switch embodiments B and D in <FIG>, one of the first gate G1 and the second gate G2 is a normally-on gate and the other one of the first gate G1 and the second gate G2 is a normally-off gate. For each monolithically integrated bidirectional switch, the monolithically integrated bidirectional switch conducts current in a single direction from the input terminal IN to the output terminal OUT through the common drift region of the compound semiconductor substrate <NUM>. The electronic system <NUM> may be, e.g., a current source rectifier, an inverter, a current fed converter, a matrix converter, etc..

As used herein, the terms "having," "containing," "including," "comprising," and the like are open-ended terms that indicate the presence of stated elements or features, but do not preclude additional elements or features. The articles "a," "an" and "the" are intended to include the plural as well as the singular, unless the context clearly indicates otherwise.

It is to be understood that the features of the various embodiments described herein may be combined with each other, unless specifically noted otherwise.

Claim 1:
A monolithically integrated dual gate bidirectional switch configured to mitigate or eliminate forward diode voltage, the monolithically integrated dual gate bidirectional switch comprising:
an input terminal (IN);
an output terminal (OUT);
a control terminal (CTRL);
a compound semiconductor substrate (<NUM>);
a common drift region in the compound semiconductor substrate (<NUM>) and in series between the input terminal (IN) and the output terminal (OUT);
a first gate (G1); and
a second gate (G2),
wherein the first gate (G1) is electrically connected to the control terminal and the second gate (G2) is electrically connected to the input terminal to provide a gated diode (D2), such that the monolithically integrated bidirectional switch is configured to block voltages of both polarities and conduct current in a single direction from the input terminal (IN) to the output terminal (OUT) through the common drift region via active control of the first gate (G1).