Patent Description:
In general, various devices have been developed for single-wire implementations. In a single-wire interface, a host (master) device is connected with one or more single-wire (slave) devices via a single-wire connection over which data and power may be transferred. A single-wire device is capable of receiving data and power via the single-wire connection, and is capable of transmitting data to the host device via the single-wire connection, thus providing bi-directional communication. One example is <CIT>. A single-wire device may be configured to provide various functionalities such as authentication, sensing, and data storage, as examples.

In the following description, various aspects of the invention are described with reference to the following drawings, in which:.

The following detailed description refers to the accompanying drawings that show, by way of illustration, specific details and aspects in which the invention may be practiced. These aspects are described in sufficient detail to enable those skilled in the art to practice the invention. Other aspects may be utilized and structural, logical, and electrical changes may be made without departing from the scope of the invention. The various aspects are not necessarily mutually exclusive, as some aspects may be combined with one or more other aspects to form new aspects. Various aspects are described in connection with methods and various aspects are described in connection with devices (e.g., a single-wire device, a host device, a single-wire system, or a charging control circuit). However, it may be understood that aspects described in connection with methods may similarly apply to devices, and vice versa.

The terms "at least one" and "one or more" may be understood to include any integer number greater than or equal to one, i.e. one, two, three, four, [. ], etc. The term "a plurality" or "a multiplicity" may be understood to include any integer number greater than or equal to two, i.e. two, three, four, five, [.

The phrase "at least one of" with regard to a group of elements may be used herein to mean at least one element from the group consisting of the elements. For example, the phrase "at least one of" with regard to a group of elements may be used herein to mean a selection of: one of the listed elements, a plurality of one of the listed elements, a plurality of individual listed elements, or a plurality of a multiple of listed elements.

The terms "single-wire" or "single-wire interface (SWI)" may be used herein to describe a configuration, e.g. of a system, in which an individual connecting element is used to provide data and operating power, for example to a device (or to multiple devices) connected thereto. The terms "single-wire" or "single-wire interface (SWI)" may be used herein in relation, for example, to a single-wire system, a single-wire device, a single-wire host, a single-wire signal, a single-wire connection, a single-wire protocol, and a single-wire terminal, to describe that the respective element is suitable for use in a configuration in which data and power are supplied via an individual connecting element. In some aspects, the terms "single-wire" or "single-wire interface (SWI)" may be used to describe a configuration or an arrangement even in case an additional connection may be present, e.g. even in case an additional connecting element connecting a single-wire host and a single-wire device with one another may be present to provide a reference signal (e.g., a common ground, illustratively a current return path).

The terms "host", "host device", "single-wire host", "single-wire host device", or "master device" may be used herein to describe a device (e.g., in a single-wire system) configured to instruct the operation(s) of one or more other devices (e.g., one or more slave devices, for example one or more single-wire devices). A host may be understood as a device configured to govern the transmission and the reception of data, e.g. a host may be configured to transmit data to the one or more other devices and may be configured to request the transmission of data from one or more of the other devices. Illustratively, the host may be understood as a master device to whose instructions the one or more slave devices respond. In some aspects, a host device may include one or more processors, e.g. a microcontroller, a field programmable gate array, and the like.

The term "slave device" may be used herein to describe a device (e.g., in a single-wire system) configured to be instructed by another device (e.g., configured to receive instructions from the other device, for example from a host device). A slave device may be understood as a device configured to receive instructions and to respond to the received instructions (e.g., without performing any active data transmission if not prompted). In some aspects, a slave device may be configured to transmit data (e.g., various types of information), e.g. upon request from the host device. Illustratively, the slave device may be understood as a device responding to instructions of a master device. In some aspects, a slave device may be configured to carry out a predefined or pre-programmed operation, such as transmitting authentication data, transmitting data stored in a memory of the slave device, sensing a physical quantity (e.g., temperature, humidity, and the like), as examples. In some aspects, a slave device doesn't include any power supply or power source. Illustratively, a slave device, in some aspects, doesn't include any built-in or integrated source of electrical power, e.g. any voltage source or current source. Examples of slave devices may include (non-exhaustive list) temperature sensors, battery monitors, devices for mobile battery applications, authenticators for determining if the host is communicating with an authenticated original product such as batteries and other replacement parts, non-volatile RAM, and silicon serial numbers.

In the context of the present description, a "single-wire device" may be described as an example of slave device, e.g. as an example of a slave device in a single-wire system. It is however understood that the aspects described herein in relation to a "single-wire device" or "single-wire slave device" may apply in an analogous manner to other types of slave devices, e.g. not in a single-wire system. Illustratively, the aspects described herein may appply to any (e.g., slave) device that receives communication and power (e.g., from a host) through a same terminal.

The term "single-wire connection" may be used herein to describe an element connecting a host device and a single-wire device with one another. In some aspects, a single-wire connection may be an individual electrically conductive path (e.g., including an electrically conductive wire, an electrically conductive trace, and the like) connecting a host device and a single-wire device with one another. In some aspects, a single-wire connection may be understood as a bus connected to a host device and to which one or more single-wire devices are connected. In some aspects, a single-wire connection may be used to transfer data between a host device and a single-wire device (e.g., in a bi-directional manner). In some aspects, a single-wire connection may be used to deliver electrical power (e.g., a current or a voltage) to a single-wire device connected to it (and to the host connected to it). A single-wire device may draw electrical power from a single-wire connection to which it is connected. Illustratively, a single-wire connection may be used to deliver a signal configured to provide data and power to a single-wire device (in some aspects, to each single-wire device) connected to the single-wire connection. A single-wire connection may be understood, in some aspects, as a communication line (or bus) which is also used to power a device connected thereto. In some aspects, a single-wire connection may include an open drain bus to which one or more devices may be connected (e.g., a host device and one or more single-wire devices). In some aspects, a single-wire connection may be considered to encompass also one or more electrically conductive elements of a device connected thereto, illustratively one or more elements via which the device is connected to the single-wire bus, such as a conductive line (or trace), and the like.

It is understood that a "single-wire connection" is described herein as an example of a connection between a host device and a slave device, e.g. in a single-wire system. The aspects described herein in relation to a "single-wire" connection may be in general understood to apply to a connection between two devices via which communication and power are transmitted (e.g., from the host device to the slave device).

The term "connected" may be used herein with respect to terminals, integrated circuit elements, devices, and the like, to mean electrically connected, which may include a direct connection or an indirect connection, wherein an indirect connection may only include additional structures in the current path that do not influence the substantial functioning of the described circuit or device. The term "electrically conductively connected" that is used herein to describe an electrical connection between one or more terminals, devices, regions, contacts, etc., may be understood as an electrically conductive connection with, for example, ohmic behavior, e.g. provided by a metal or degenerate semiconductor in absence of p-n junctions in the current path. The term "electrically conductively connected" may be also referred to as "galvanically connected".

The terms "path", "electrical path", or "electrically conductive path" may be used herein to describe an electrically conductive connection between two or more elements. A path may be understood, in some aspects, as an electrically conductive line (or trace) along which a signal (in some aspects, a current or a voltage) may travel, e.g. from a first element connected to the path to a second element connected to the path or vice versa. The term path may describe a direct path or an indirect path, wherein an indirect path may only include additional structures in the path that do not influence the substantial functioning of the described circuit or device (illustratively, that do not influence the signal traveling along the path).

The term "signal" may be used herein to describe an analog signal or a digital signal. In some aspects, a signal may be an electrical signal, e.g. a current or a voltage. In some aspects, a signal may be an electrical signal configured to provide data, e.g. an electrical signal modulated to encode data in the signal. In some aspects, a first level of the signal (e.g., a first voltage level, or a first current level, for example a high voltage level, or a high current level) may be associated with a logic "<NUM>", and a second level of the signal (e.g., a second voltage level, or a second current level, for example a low voltage level, or a low current level) may be associated with a logic "<NUM>". It is however understood that the definition of logic "<NUM>" and logic "<NUM>" and of the type of signal modulation associated thereto may be arbitrary (e.g., other examples of modulation may include the signal amplitude, the signal frequency, the signal period, etc.). A level of a signal may also be referred to herein as a state of the signal. A high voltage level or a high current level of a signal may be understood as a signal having a voltage above a voltage threshold or a current above a current threshold, respectively. A low voltage level or a low current level of a signal may be understood as a signal having a voltage below a voltage threshold or a current below a current threshold, respectively. Only as a numerical example, a high voltage level may be <NUM> V and a low voltage level may be <NUM> V. Only as a numerical example, a high current level may be <NUM> mA and a low current level may be <NUM> mA.

As used herein, a signal that is "indicative of" or "representing" a value or other information (e.g., an instruction) may be a digital or analog signal that encodes or otherwise communicates the value or other information in a manner that can be decoded by and/or cause a responsive action in a component receiving the signal (e.g., in a slave device receiving instructions from a host device, or in a host device receiving data from a slave device).

The term "reference voltage" may be used herein to denote a base voltage for a device (e.g., for a circuit). With respect to a device, the reference voltage may be also referred to as ground (GND) voltage, ground potential, virtual ground voltage, or zero volts (<NUM> V).

The terms "processor" or "controller" or "processing circuitry" as, for example, used herein may be understood as any kind of technological entity that allows handling of data. The data may be handled according to one or more specific functions executed by the processor or controller. Further, a processor or controller as used herein may be understood as any kind of circuit, e.g., any kind of analog or digital circuit. A processor or a controller may thus be or include an analog circuit, digital circuit, mixed-signal circuit, logic circuit, processor, microprocessor, Central Processing Unit (CPU), Graphics Processing Unit (GPU), Digital Signal Processor (DSP), Field Programmable Gate Array (FPGA), integrated circuit, Application Specific Integrated Circuit (ASIC), etc., or any combination thereof. Any other kind of implementation of the respective functions, which will be described below in further detail, may also be understood as a processor, controller, or logic circuit. It is understood that any two (or more) of the processors, controllers, or logic circuits detailed herein may be realized as a single entity with equivalent functionality or the like, and conversely that any single processor, controller, or logic circuit detailed herein may be realized as two (or more) separate entities with equivalent functionality or the like.

As used herein, "memory" is understood as a computer-readable medium (e.g., a non-transitory computer-readable medium) in which data or information can be stored for retrieval. References to "memory" included herein may thus be understood as referring to volatile or non-volatile memory, including random access memory (RAM), read-only memory (ROM), flash memory, solid-state storage, magnetic tape, hard disk drive, optical drive, 3D XPoint™, among others, or any combination thereof. Registers, shift registers, processor registers, data buffers, among others, are also embraced herein by the term memory.

The term "terminal" may be used herein to describe a location (e.g., a point) or structure of a device or of an element of the device at which a signal (e.g., an analog signal, for example a current or a voltage) may be provided and/or to which another device or element may be connected. Illustratively, a terminal may be a location or a structure that is electrically conductively connected with the device or the element (e.g., with a host device, with a slave device, with a single-wire connection, and the like). A terminal may also be referred to herein as port, pin, contact, or contact point.

In the context of the present description, the term "operable" in relation to a device (e.g., a circuit) may be used to describe that the device may carry out a function independently (e.g., without external instructions) or under control of another device (e.g., another module or circuit). A first device operable to carry out a function may be capable of carrying out the function completely by itself and/or may be capable of being operated by a second device to carry out the function. The second device may be configured to operate the first device, e.g. to provide instructions to the first device to carry out the function. Illustratively, a device operable to carry out a function, with respect to a device configured to carry out the function, may provide the possibility of being controlled by another device for carrying out the function.

Various aspects of the present description may be based on the realization that in a conventional host device-slave device system, the power provided to the slave device may be insufficient to support various types of operations that may be implemented in a slave device, due to the increasing trend to use lower voltage for supplying a host device.

Various aspects may be related to a device including adaptive power control (illustratively, to an adapted slave device, e.g. an adapted single-wire device). The adaptive power control may ensure that the device has at its disposal sufficient power to carry out a desired operation or a full range of desired operations. Various aspects may be related to a device configured to adapt an amount of received power (in some aspects, an amount of power drawn via a single-wire connection) depending on an operation carried out or to be carried out (e.g., depending on an energy consumption associated with the operation).

<FIG> shows schematically a single-wire system <NUM> including a host device <NUM> (a master device) and a single-wire device <NUM> (a slave device) according to various aspects. Illustratively, the host device <NUM> and the single-wire device <NUM> may form a single-wire interface, e.g. the host device <NUM> and the single-wire device <NUM> may be connected to one another via a single-wire connection <NUM>. The single-wire device <NUM>, may be configured to receive data and power via the single-wire connection <NUM>, as described in further detail below.

In some aspects, the host device <NUM> may include a substrate <NUM>. Illustratively, the host device <NUM> may be disposed on the substrate <NUM> (e.g., mounted on or integrated in the substrate <NUM>). In some aspects, the substrate <NUM> may be a board (also referred to as single-wire host board), e.g. a printed circuit board. In some aspects, the single-wire device <NUM> may include a substrate <NUM>. Illustratively, the single-wire device <NUM> may be disposed on the substrate <NUM> (e.g., mounted on or integrated in the substrate <NUM>). In some aspects, the substrate <NUM> may be a board (also referred to as single-wire device board), e.g. a printed circuit board. The single-wire connection <NUM> may be understood to include respective conductive elements (e.g., conductive lines) on the substrate <NUM> of the host device <NUM> (e.g., the conductive element <NUM>) and on the substrate <NUM> of the single-wire device <NUM> (e.g., the conductive element 106d).

In some aspects, the host device <NUM> may include one or more terminals, each associated with a respective function or operation. The host device <NUM> may include a supply terminal <NUM> at which supply power (e.g., a supply voltage VCC_HOST) is provided, an input/output terminal <NUM> (e.g., a general purpose input/output (GPIO) terminal), which may be used for communication (e.g., with the single-wire device <NUM>), and a ground terminal <NUM>, at which a reference voltage (e.g., a ground voltage) may be provided. Illustratively, the ground terminal <NUM> may be connected to a reference voltage source, e.g. to ground.

In some aspects, the single-wire device <NUM> may include one or more terminals, each associated with a respective function or operation. The single-wire device <NUM> may include a supply terminal <NUM> at which supply power is provided to drive the single-wire device <NUM> (as described in further detail below), an input/output terminal <NUM> (also referred to as a single-wire terminal), which may be used for communication with the host device <NUM>, and a ground terminal <NUM>, at which a reference voltage (e.g., a ground voltage) may be provided. Illustratively, the ground terminal <NUM> may be connected to a reference voltage source, e.g. to ground. In some aspects, the ground terminal <NUM> of the single-wire device <NUM> and the ground terminal <NUM> of the host device <NUM> may be connected to one another, e.g. via a ground connection <NUM>. The ground connection <NUM> may provide a return path for the current flowing between the host device <NUM> and the single-wire device <NUM>. The ground connection <NUM> may include respective conductive elements (e.g., conductive lines) on the substrate <NUM> of the host device <NUM> (e.g., the conductive element <NUM>) and on the substrate <NUM> of the single-wire device <NUM> (e.g., the conductive element 124d).

The host device <NUM> and the single-wire device <NUM> may be configured to exchange data via the single-wire connection <NUM>. The host device <NUM> may be configured to transmit data (e.g., instructions) to the single-wire device <NUM>, and may be configured to receive data (e.g., a response, various types of information) from the single-wire device <NUM>. The single-wire device <NUM> may be configured to receive data from the host device <NUM>, and to transmit data to the host device <NUM>.

The communication between the host device <NUM> and the single-wire device <NUM> may follow any suitable communication protocol, for example a serial communication protocol, such as a single-wire communication protocol. The communication between the host device <NUM> and the single-wire device <NUM> may be carried out by modulating the signal (e.g., the signal level, for example the voltage level or the current level) at the single-wire connection <NUM>.

A signal at the single-wire connection <NUM> may be, in an idle state, at a level defined by a power supply (e.g., a current source or a voltage source) of the host device <NUM>. In some aspects, a voltage at the single-wire connection <NUM> may be at a voltage level defined by a supply voltage VCC_HOST of the host device <NUM> (e.g., a supply voltage provided at the supply terminal <NUM> of the host device <NUM>). Illustratively, the single-wire connection <NUM> and a power supply of the host device <NUM> may be connected to one another, e.g. over a pull-up resistor <NUM> (RSWI). The pull-up resistor <NUM> may allow the host device <NUM> and the single-wire device <NUM> to pull the signal at the single-wire connection <NUM> low (e.g., from the voltage level defined by VCC_HOST to the voltage level defined by the reference voltage), for data communication, as described in further detail below.

By way of example, the host device <NUM> may be configured to encode data in a signal provided at the single-wire device <NUM> via the single-wire connection <NUM>, for example by pulling the signal low (e.g., to ground) to transmit a logic "<NUM>" and by releasing the signal high (e.g., at VCC_HOST) to transmit a logic "<NUM>". Illustratively, the host device <NUM> may be configured to encode data in a signal provided at the single-wire device <NUM> via the single-wire connection <NUM> such that a current IOD provided at the input/output terminal <NUM> of the single-wire device <NUM> may encode data therein (e.g., associated with the signal levels over time). The single-wire device <NUM> may be configured to encode data in a signal provided at the host device <NUM> via the single-wire connection <NUM>, for example by pulling the signal low to transmit a logic "<NUM>" and by releasing the signal high to transmit a logic "<NUM>", only as an example. Illustratively, the single-wire device <NUM> may be configured to encode data in a signal provided at the host device <NUM> via the single-wire connection <NUM> such that a current provided at the input/output terminal <NUM> of the host device <NUM> may encode data therein. The timing of the transmission, e.g. the assigned slots for the transmission, may be governed by the chosen communication protocol.

The single-wire device <NUM> may be configured to be powered by the signal provided via the single-wire connection <NUM>. The single-wire device <NUM> may be configured to draw its operating power from the signal provided via the single-wire connection <NUM> (e.g., from a current ISWI provided via the single-wire connection <NUM>, illustratively provided by the supply voltage VCC_HOST over the pull-up resistor <NUM>). Where the single-wire connection <NUM> is used for both communication and power transmission, the single-wire device <NUM> may be coupled to an external capacitor <NUM> (CVCC). The capacitor <NUM> (CVCC) is configured to store charge for powering the single-wire device <NUM> when power supply from the host device <NUM> is not available (e.g. when the single-wire connection <NUM> is being used for communications, or when the signal at the single-wire connection <NUM> is pulled low). In some aspects, the power received at the single-wire device <NUM> may be captured (and stored) in the capacitor <NUM> (CVCC) of the single-wire device <NUM>. The capacitor <NUM> may be connected to the single-wire connection <NUM> (and to the supply terminal <NUM> and to ground) and it may be charged by the power provided via the single-wire connection <NUM> (e.g., by a current Icharge flowing into the capacitor <NUM>). Illustratively, the capacitor <NUM> may be charged when the signal at the single-wire connection <NUM> is at the high level. The capacitor <NUM> may be configured such that the single-wire device <NUM> may operate (by obtaining operating power from the capacitor <NUM>) even in case the signal at the single-wire connection <NUM> is pulled low. The powering of the single-wire device <NUM> by the charge stored in the capacitor <NUM> may be referred to as indirect power mode.

The single-wire device <NUM> may include a diode <NUM> (DVCC) configured to prevent a discharge of the capacitor <NUM>. In some aspects, the diode <NUM> may be a rectifier. The diode <NUM> may be configured (e.g., disposed) such that it allows a current flow in the direction from the single-wire connection <NUM> to the capacitor <NUM> and such that it substantially prevents a current flow in the direction from the capacitor <NUM> to the single-wire connection <NUM>. Illustratively, the diode <NUM> may be configured such that the capacitor <NUM> is not discharged in case the signal at the single-wire connection <NUM> is pulled low (e.g., by the host device <NUM>, by the single-wire device <NUM>, or by another single-wire device connected to the bus).

Various aspects of the present disclosure may be based on the realization that in a configuration as illustrated in <FIG> the power provided at a single-wire device (e.g., at the single-wire device <NUM>) may be insufficient to support various types of operations that may be implemented in a single-wire device (e.g., operations that have a greater energy demand). With advancement in process technology, there is an increasing trend to use lower voltage for supplying a host device (e.g., to use lower supply voltages VCC_HOST). In such applications, the voltage at a supply terminal (VCC) of the single-wire device may not be able to support its operation due to the voltage drop at the diode (the DVCC drop). The voltage drop occurring at a diode of the single-wire device (e.g., at the diode <NUM> of the single-wire device <NUM>) may be too high to ensure that the single-wire device receives enough power to support its operation or its full range of operations. A voltage across a capacitor of the single-wire device may not be sufficient to charge the capacitor at a sufficient level due to the voltage drop at the diode. Illustratively, a current Icharge flowing into the capacitor may be insufficient due to a current IVDDP lost due to the voltage drop across the diode.

Various aspects may be related to a device including adaptive power control (illustratively, to an adapted slave device, e.g. an adapted single-wire device). The device described herein may be configured to have an active control over the amount of power drawn via the single-wire connection rather than relying on a passive element such as a diode, thus providing an improved performance. Various aspects may be related to a device configured to adapt a charging of a charge storage element depending on an operation carried out or to be carried out, e.g. a device configured to perform adaptive power control for indirect power mode. Illustratively, various aspects may be related to a device configured to selectively adapt a charging path, e.g. to selectively adapt the resistance of an electrical path via which power is provided at the device depending on an operation carried out or to be carried out (e.g., depending on the current demand of the device). Various aspects may be related to a power switch configured to implement adaptive control based on the current demand of the device for indirect power mode. The configuration described herein may eliminate the need for additional power sources (e.g., charge pumps, which may increase the silicon area) and/or for additional terminals to be connected to additional power sources, thus providing a simpler fabrication process. The power control described herein may allow a lower voltage drop between a communication line and a supply terminal of the device, thus providing greater operating margin.

The device may be described herein, in relation to some aspects, in the context of a single-wire configuration. In some aspects, the device may be configured as a slave device for use in combination with a host device, e.g. in a single-wire interface system. It is however understood that the aspects described herein are not limited to a slave device, or more in general are not limited to a device for use in a single-wire interface system, but may be applied to a variety of configurations and scenarios in which the adaptive power control described herein may provide an improved operation of a device.

<FIG> shows schematically a device <NUM> according to various aspects. In some aspects, the device <NUM> may be configured as a slave device, e.g. as a single-wire device for use in a single-wire interface system (e.g., in combination with a host device, and optionally with one or more other single-wire devices). It is understood that the configuration of the device <NUM> illustrated in <FIG> is only an example, and that the device <NUM> may include additional, less, or alternative components as those shown, as described in further detail below.

The device <NUM> may be configured to receive one or more signals (e.g., a first signal <NUM>, a second signal <NUM>, and a third signal <NUM>, in the exemplary configuration shown in <FIG>). Each signal may be associated with a different scope or functionality, as described in further detail below. In some aspects, the device <NUM> may include one or more terminals associated with a respective signal of the one or more signals (e.g., a first terminal <NUM> associated with the first signal <NUM>, a second terminal <NUM> associated with the second signal <NUM>, and a third terminal <NUM> associated with the third signal <NUM>). In some aspects, a terminal may be connected with a respective connecting element (e.g., a respective wire or line) at which the respective signal is provided. A terminal may be configured to receive the associated signal (e.g., the first terminal <NUM> may be configured to receive the first signal <NUM>, the second terminal <NUM> may be configured to receive the second signal <NUM>, and the third terminal <NUM> may be configured to receive the third signal <NUM>). A terminal being configured to receive (or transmit) a signal may be understood as the terminal being connected to the element or elements (e.g., of the device <NUM>) at which that signal is to be provided (or from which that signal is coming). Illustratively, the device <NUM> may be configured to receive a signal via (or at) the respective terminal (e.g., the first signal <NUM> via the first terminal <NUM>, the second signal <NUM> via the second terminal <NUM>, and the third signal <NUM> via the third terminal <NUM>).

In some aspects, the first terminal <NUM> may be configured to be connected to a second device (e.g., a host device), e.g. a second device external to the device <NUM> (see also <FIG>). The first terminal <NUM> may be configured to be connected to the second device via a single-wire connection. Illustratively, first terminal <NUM> may be configured to be connected to a single-wire connection carrying the first signal <NUM>. More generally, the first terminal <NUM> may be confiugred to be connected to a connection via which communication and power are provided at the device <NUM>. In some aspects, the first signal <NUM> may be a signal at a single-wire connection (see also <FIG>).

In some aspects, the device <NUM> may include a substrate <NUM>. The device <NUM> may be disposed on the substrate <NUM>, e.g. the device <NUM> may be mounted on or integrated in the substrate <NUM>. The substrate <NUM> may be, in some aspects, a board (also referred to herein as device board), for example a printed circuit board. In some aspects, the substrate <NUM> may include one or more conductive elements (e.g., one or more conductive traces or lines), associated with a respective one of the one or more signals. In the exemplary configuration in <FIG>, the substrate <NUM> may include a first conductive element <NUM> associated with the first signal <NUM> (e.g., connected to the first terminal <NUM>), a second conductive element <NUM> associated with the second signal <NUM> (e.g., connected to the second terminal <NUM>), and a third conductive element <NUM> associated with the third signal <NUM> (e.g., connected to the third terminal <NUM>). In some aspects, a conductive element may be connected to a respective port at which the associated signal may be provided (e.g., a respective input port or connection port, not shown in <FIG>).

At least one signal (e.g., the first signal <NUM>) may be configured to provide (both) power and data to the device <NUM>. Illustratively, the device <NUM> may receive data via the at least one signal, and may be powered via the at least one signal. In some aspects, the at least one signal may include a current or a voltage. For instance, the device <NUM> may be configured to receive data in form of a modulation of the received (first) signal (e.g., of the received current or voltage), and may be configured to draw operating power from the received (first) signal. In some aspects, the at least one signal may be a signal provided over a single-wire connection (e.g., between the device <NUM> and a host device).

In some aspects, the device <NUM> may include a charge storage element <NUM>. The charge storage element <NUM> may be configured to be charged by the power provided by the received signal configured to provide power and data to the device <NUM>, e.g. by the received first signal <NUM>. Illustratively, the charge storage element <NUM> may be configured to store therein charge provided by the received first signal <NUM> (e.g., charge provided by a current associated with the received signal flowing into the charge storage element <NUM>). In some aspects, the charge storage element <NUM> and the terminal at which the signal is received may be connected to one another (e.g., the charge storage element <NUM> and the first terminal <NUM> may be connected to one another). Illustratively, the device <NUM> may include an electrical path <NUM> connecting the terminal at which the signal configured to provide power and data to the device <NUM> is (or should be) received, e.g. the first terminal <NUM>, and the charge storage element <NUM> with one another. The electrical path <NUM> may in some aspects, include a plurality of portions. For instance, as described in further detail below, the electrical path <NUM> may include a plurality of possible paths between the first terminal <NUM> and the charge storage element <NUM>. In some aspects, the charge storage element <NUM> may include a capacitor (see also <FIG>). In some aspects, the charge storage element <NUM> may be connected to ground (see also <FIG>).

The charge storage element <NUM> may be configured to provide operating power to the device <NUM>, e.g. when power supply from an external source such as a host device is not available. This may occur for instance when the received first signal <NUM> is at a low level (e.g., in case the received first signal <NUM> is pulled low, for example to ground). Illustratively, the charge storage element <NUM> may be configured to store charge to be used for an operation of the device <NUM> in an indirect power mode. In some aspects, the charge storage element <NUM> may be configured to provide power (e.g., via discharging) to one or more processors or to a processing circuitry of the device <NUM>, for example via a terminal <NUM> (e.g., a supply terminal) associated with the charge storage element <NUM>. The supply terminal <NUM> may be connected to one or more processors of the device <NUM> (not shown in <FIG>), e.g. configured to implement one or more operations implemented in the device <NUM>.

In some aspects, the device <NUM> may include a charging control circuit <NUM> (also referred to herein as switching circuit or power control circuit). The charging control circuit <NUM> may be configured to control a charging of the charge storage element <NUM> by the power provided by the received signal configured to provide power and data to the device <NUM>, e.g. by the power provided by the received first signal <NUM>. Illustratively, the charging control circuit <NUM> may be configured to control the amount of power (in some aspects, the amount of current, or the amount of voltage) being provided at the charge storage element <NUM> by the received first signal <NUM>. In some aspects, the charging control circuit <NUM> may be configured to control the speed at which the charge storage element <NUM> is charged by the power provided by the received first signal <NUM>. The charging control circuit <NUM> may be configured to adaptively (and actively) control the charging of the charge storage element <NUM> depending on (in some aspects, in accordance with) the received first signal <NUM>, as described in further detail below.

The charging control circuit <NUM> may be configured to control the charging of the charge storage element <NUM> by the power provided by the received first signal <NUM> based on the data provided by the received first signal <NUM>. In some aspects, the device <NUM> may be configured to interpret (e.g., to decode) the data provided by the received first signal <NUM>, and the charging control circuit <NUM> may be configured to control the charging of the charge storage element <NUM> depending on the data (e.g., depending on one or more instructions that were encoded in the data). By way of example, the device <NUM> may include one or more processors (e.g., a control module, e.g. a digital core) configured to decode the received first signal <NUM> to determine one or more instructions to be executed by the device <NUM>. The charging control circuit <NUM> may receive corresponding instructions from the one or more processors based on the decoded data, and control the charging of the charge storage element <NUM> accordingly.

In some aspects, the charging control circuit <NUM> may be configured to control the charging of the charge storage element <NUM> in accordance with a level of the received first signal <NUM> (e.g., with a current level or voltage level of the received first signal), as described in further detail below (for example, in relation to <FIG>).

The adaptive control described herein may be based on a level of the received first signal <NUM> and/or on data (e.g., instructions) encoded in the received first signal <NUM>.

In some aspects, the data provided by the received first signal <NUM> may define an operation of the device <NUM>. The data provided by the received first signal <NUM> may instruct an operation that the device <NUM> should carry out (e.g., a transmission of data, an authentication operation, non-volatile memory write, and the like). Illustratively, the data provided by the received first signal <NUM> may encode therein one or more instructions defining an operation of the device <NUM> (e.g., one or more instructions associated with an operation of the device <NUM>).

In some aspects, the charging control circuit <NUM> may be configured to control the charging of the charge storage element <NUM> depending on the operation defined by the data provided by the received first signal <NUM>. The charging control circuit <NUM> may be configured to control the charging of the charge storage element <NUM> based on an expected (or known) power consumption associated with the operation defined by the data. By way of example, each operation that may be carried out by the device <NUM> may be associated with a respective known power consumption, and the charging control circuit <NUM> may be configured to control the charging of the charge storage element <NUM> according to the respectively associated power consumption. The charging control circuit <NUM> may be configured to control the charging of the charge storage element <NUM> based on a level of the expected power consumption, e.g. based on whether the expected power consumption exceeds a predefined threshold. The predefined threshold may be selected depending on the functionalities implemented by the device <NUM> and/or on the configuration of the charge storage element <NUM>.

In some aspects, the charging control circuit <NUM> may be configured to control an amount of power (e.g., an amount of current or an amount of voltage) that the charge storage element <NUM> receives from the received first signal <NUM>. The charging control circuit <NUM> may be configured to control an amount of power drawn from the received first signal <NUM> and delivered to the charge storage element <NUM>. The charging control circuit <NUM> may be configured to control the amount of power received at the charge storage element <NUM> based on the data provided by the received first signal <NUM>, e.g. based on the operation the device <NUM> is to perform as indicated by the data in the received signal and expected power consumption for such operation, e.g. based on whether the expected power consumption exceeds the predefined threshold. The charging control circuit <NUM> may be configured to control the charging of the charge storage element <NUM> such that the charge storage element <NUM> receives a first power from the received first signal <NUM> in case the expected power consumption of the device <NUM> is above a predefined threshold. The charging control circuit <NUM> may be configured to control the charging of the charge storage element <NUM> such that the charge storage element <NUM> receives a second power (e.g., lower than the first power) from the received first signal <NUM> in case the expected power consumption of the device <NUM> is below the predefined threshold.

In some aspects, the charging control circuit <NUM> may be configured to control the amount of power received at the charge storage element <NUM> in accordance (e.g., in synchronization) with a level of the received first signal <NUM>. The charging control circuit <NUM> may be configured to control the charging of the charge storage element <NUM> such that the charge storage element <NUM> receives a first power from the received first signal <NUM> in case the received first signal <NUM> is at a first level (e.g., a high level). The charging control circuit <NUM> may be configured to control the charging of the charge storage element <NUM> such that the charge storage element <NUM> receives a second power (e.g., lower than the first power) from the received first signal <NUM> in case the received first signal <NUM> is at a second level (e.g., opposite the first level, e.g. a low level).

In some aspects, the charging control circuit <NUM> may be configured to control an electrical resistance of an electrical path <NUM> via which the charge storage element <NUM> receives the power provided by the received first signal <NUM>, illustratively an electrical path <NUM> via which the charge storage element <NUM> may be charged by the received first signal <NUM>. In some aspects, the charging control circuit <NUM> may be configured to control an electrical resistance of the electrical path <NUM> between the charge storage element <NUM> and the terminal at which the first signal <NUM> is received, e.g. between the charge storage element <NUM> and the first terminal <NUM>. The charging control circuit <NUM> may be configured to control the electrical resistance of the electrical path <NUM> based on the data provided by the received first signal <NUM>, e.g. based on the expected power consumption of the device <NUM> (illustratively, the expected power consumption associated with the operation defined by the data), e.g. based on whether the expected power consumption exceeds the predefined threshold. The charging control circuit <NUM> may be configured to control the electrical resistance of the electrical path <NUM> such that a first resistance of the electrical path <NUM> is provided in case an expected power consumption of the device <NUM> is above the predefined threshold. The charging control circuit <NUM> may be configured to control the electrical resistance of the electrical path <NUM> such that a second resistance (greater than the first resistance) of the electrical path <NUM> is provided in case an expected power consumption of the device <NUM> is below the predefined threshold.

In some aspects, the charging control circuit <NUM> may be configured to control the electrical resistance of the electrical path <NUM> in accordance (e.g., in synchronization) with a level of the received first signal <NUM>. The charging control circuit <NUM> may be configured to control the electrical resistance of the electrical path <NUM> such that a first resistance of the electrical path <NUM> is provided in case the received first signal <NUM> is at a first level (e.g., a high level). The charging control circuit <NUM> may be configured to control the electrical resistance of the electrical path <NUM> such that a second resistance (greater than the first resistance) of the electrical path <NUM> is provided in case the received first signal <NUM> is at a second level (e.g., opposite the first level, e.g. a low level). Illustratively, the low resistance may facilitate a charging of the charge storage element <NUM>, and the high resistance may prevent a discharging of the charge storage element <NUM> when the first signal <NUM> is pulled low.

In some aspects, at least one of the received signals, e.g. the second signal <NUM>, may include a configuration signal. The second signal <NUM> may be modulated to encode configuration information therein. A terminal associated with the configuration signal, e.g. the second terminal <NUM> in the configuration illustrated in <FIG> (and the associated second conductive element <NUM>), may be configured to receive the configuration signal. In some aspects, the configuration signal may be indicative of a configuration of the device <NUM>, e.g. of a configuration of an operation of the device <NUM> (e.g., of the operation defined by the data provided by the first signal <NUM>).

In some aspects, the charging control circuit <NUM> may be configured to control the charging of the charge storage element <NUM> based on the configuration signal, e.g. by using the configuration signal to determine an amount of power to be delivered to the charge storage element. The charging control circuit <NUM> may be configured to estimate an expected power consumption associated with an operation of the device <NUM> based on the configuration signal, e.g. based on the configuration indicated by the configuration signal, and to control accordingly the charging of the charge storage element <NUM>. In some aspects, the one or more processors of the device <NUM> may be configured to estimate an expected power consumption associated with an operation of the device <NUM> based on the configuration signal, and to deliver corresponding information to the charging control circuit <NUM>.

In some aspects, the configuration signal may be indicative of an instruction to select one of an indirect power mode and a direct power mode. In the indirect power mode, the device <NUM> may be configured to derive its operating power exclusively from the charge storage element <NUM>, illustratively from the charge stored in the charge storage element <NUM> (which is charged by the power provided by the received first signal <NUM>). In the direct power mode, the device <NUM> may be configured to derive its operating power directly from a power supply (e.g., from a current source or a voltage source). Illustratively, in the direct power mode, the device <NUM> may use the received power (e.g., received via the first signal <NUM>, or received via another power supply) exclusively for performing one of its functions without charging the charge storage element <NUM>. In some aspects, the charging control circuit <NUM> may be configured to control the charging of the charge storage element <NUM> (only) in the indirect power mode. The charging control circuit <NUM> may be configured to carry out (e.g., to enable) the charging control described above in case the configuration signal indicates that the indirect power mode is to be selected. The charging control circuit <NUM> may be configured to disable the charging control described above in case the configuration signal indicates that the direct power mode is to be selected.

In some aspects, at least one of the received signals, e.g. the third signal <NUM>, may include a reference signal. By way of example, the third signal <NUM> may include a reference voltage, e.g. a ground voltage. A terminal associated with the reference signal, e.g. the third terminal <NUM> in the configuration illustrated in <FIG> (and the associated third conductive element <NUM>), may be configured to receive a reference voltage, e.g. it may be connected to ground. In some aspects, the device <NUM> (e.g., the terminal associated with the reference signal) may be connected to a common ground as a second device (e.g., a host device) with which the device <NUM> communicates, see for example <FIG>. Illustratively, the device <NUM> (e.g., the third terminal <NUM>) may be connected to a return path for a current flowing between the device <NUM> and the second device.

It is understood that the device <NUM> may also include additional or alternative components with respect to those shown in <FIG>. As an example, the device <NUM> may include a memory, e.g. a non-volatile memory, for example for storing authentication information and/or for storing a unique identifier of the device <NUM> (e.g., a <NUM>-bit identifier uniquely associated with the device <NUM>). As another example, the device <NUM> may include an internal oscillator configured to control the timing of the operation of the device <NUM> (and of the charging control circuit <NUM>). The internal oscillator may be synchronized, for example, with a falling edge of the received first signal <NUM> (e.g., with a falling edge of the signal at a single-wire connection between the device <NUM> and a host device). As a further example, the device <NUM> may include electrostatic discharge (ESD) protection circuitry.

In some aspects, the device <NUM> may be configured to transmit data (e.g., various type of information, such as authentication information, monitoring information, and the like). The device <NUM> may be configured to transmit data by modulating the first signal <NUM>, e.g. by modulating a level (e.g., a voltage level) of the first signal <NUM>. In some aspects, the device <NUM> (e.g., one or more processors of the device <NUM>) may be configured to pull the first signal <NUM> low (illustratively, at a low voltage level, for example at the ground voltage) to transmit a logic "<NUM>" to a second device monitoring the signal, e.g. to a host device connected to a same single-wire connection as the device <NUM>. The device <NUM> may be configured to release (or to keep) the first signal <NUM> high (e.g., to a high voltage level, for example to a level of a supply voltage of a host device), to transmit a logic "<NUM>" to the second device. It is however understood that the data transmission strategy described herein is only an example, and other possibilities may be implemented for transmitting data, e.g. other possible modulation schemes for encoding data in a signal. Pulling the first signal <NUM> low may be understood as pulling low the level of a signal over a connection at which the device <NUM> is connected (e.g., the signal over a single-wire connection between the device <NUM> and a host device).

Various possible implementations of a charging control circuit (e.g., of the charging control circuit <NUM>) will now be described in further detail below, for example in relation to the charging control circuits 300a, 300b, 300c, 300d illustrated in <FIG>. In the <FIG> some of the components of a device (e.g., of the device <NUM> illustrated in <FIG>) are represented for facilitating the understanding of the arrangement of the respective charging control circuit in the device. It is however understood that other components of the device (e.g., other components illustrated in <FIG>, or additional or alternative components) may be present.

In the <FIG> a charging control circuit 300a, 300b, 300c, 300d is described. The charging control circuit 300a, 300b, 300c, 300d may be configured as the charging control circuit <NUM> described in relation to <FIG> Illustratively, the charging control circuit 300a, 300b, 300c, 300d may be an exemplary implementation of the charging control circuit <NUM> described in relation to <FIG>. It is however understood that other implementations of the aspects described in relation to the charging control circuit <NUM> may be possible. It is also understood that the aspects described in relation to the charging control circuit 300a, 300b, 300c, 300d may be combined with one another.

<FIG> shows schematically a charging control circuit 300a according to various aspects. The charging control circuit 300a may include a first switch <NUM> (also referred to herein as main switch or main power switch). The first switch <NUM> may be configured to provide a first electrical path via which a charge storage element (e.g., the charge storage element <NUM>) may be charged. Illustratively, the first switch <NUM> may be configured to provide a first electrical path via which a signal configured to provide data and power to the device (e.g., the first signal <NUM>) may be provided at the charge storage element <NUM>. In some aspects, the first switch <NUM> may be connected in series with the charge storage element <NUM>. The first switch <NUM> may be configured to provide (e.g., to connect) the first electrical path in case the first switch <NUM> is activated (in other words, closed), and to disconnect the first electrical path in case the first switch <NUM> is de-activated (in other words, open). It is however understood that other configurations of the first switch <NUM> for connecting or disconnecting the first electrical path may be provided.

In some aspects, the first electrical path may have a first resistance, for example the first electrical path may be a low resistance path (e.g., having resistance lower than a second electrical path described below in relation to <FIG>, and/or having a resistance lower than an electrical path in which a decoupling element is present, as described in relation to <FIG>). By way of example, the first electrical path may have a resistance lower than <NUM>Ω, for example lower than <NUM>Ω or lower than <NUM>Ω. The first electrical path may provide a low resistance connection to ensure fast charging of the charge storage element <NUM>. The first electrical path may be understood, in some aspects, as a fast charging path.

In some aspects, the first electrical path may be configured to provide a low(er) voltage drop (e.g., lower than the voltage drop provided by a second electrical path described below in relation to <FIG> and/or lower than the voltage drop across the decoupling element described in relation to <FIG>) across the terminal at which the signal providing data and power to the device <NUM> is received, e.g. the first terminal <NUM>, and the terminal associated with power supply of the device, e.g. the supply terminal <NUM>. This may provide greater operating margin for the device operation.

In some aspects, the first switch <NUM> may be configured to sustain a high current (e.g., greater with respect to the current that may be sustained by a second switch described in relation to <FIG>). The first switch <NUM> may be a strong switch, to support the fast charging of the charge storage element <NUM> (and to support operations with high energy demand). In some aspects, the first switch <NUM> may have an area in the range from about <NUM><NUM> to about <NUM><NUM>, for example an area of about <NUM><NUM>. The first switch <NUM> may have a resistance (e.g., an ON resistance) in the range from about <NUM>Ω to about <NUM>Ω, for example a resistance of about <NUM>Ω. The area of the first switch <NUM> may be greater than an area of a second switch, described below, to sustain the greater current flowing through the first electrical path. The resistance of the first switch <NUM> may be lower than a resistance of the second switch to allow more current to flow through the first electrical path. In some aspects, the first switch <NUM> may include a transistor, e.g. a field-effect transistor, such as a metal-oxide-semiconductor field-effect transistor.

In some aspects, the charging control circuit 300a may be configured to select the first electrical path (that is, to activate the first switch <NUM>) in case a greater power demand (e.g., a greater current demand) is expected, e.g. in case the data provided by the first signal <NUM> indicate an operation with an expected power consumption above the predefined threshold.

In some aspects, the charging control circuit 300a may include a first controller <NUM> (also referred to herein as main controller) configured to control the first switch <NUM>. The first controller <NUM> may be configured to control (e.g., to activate or de-activate) the first switch <NUM> based on the data provided by the received first signal <NUM>, e.g. based on the expected power consumption of an operation defined by the data.

In some aspects, the first controller <NUM> may be configured to activate the first switch <NUM> to connect the first electrical path in case the expected power consumption of the operation defined by the data provided by the received first signal <NUM> is above a predefined threshold. As discussed earlier, the first electrical path may have a lower resistance compared to the second electrical path described below in relation to <FIG> thereby increasing the charging rate of the charge storage element <NUM> and allowing the device <NUM> to meet the demands of operations with expected power consumption exceeding the predefined threshold. The first controller <NUM> may be configured to de-activate the first switch <NUM> to disconnect (or to maintain disconnected) the first electrical path in case the expected power consumption of the operation defined by the data provided by the received first signal <NUM> is below the predefined threshold.

In some aspects, the first controller <NUM> may be configured to control the first switch <NUM> based on a (known) duration of the operation carried out or to be carried out by the device <NUM>, e.g. of the operation defined by the data provided by the received first signal <NUM>. The first controller <NUM> may be configured to de-activate the first switch <NUM> to disconnect the first electrical path after completion of the operation defined by the data provided by the received first signal <NUM> (and to maintain the first switch <NUM> activated for the duration of the operation). The duration of the operation carried out by the device <NUM> may be timed, for example, by a local oscillator of the device <NUM>.

In some aspects, the first switch <NUM> may be configured (e.g., dimensioned) such that there is a delayed response to an instruction provided by the first controller <NUM>. The first switch <NUM> (and the remaining portion of the circuit) may be configured such that a delay is present between an instruction to activate or de-activate the first switch <NUM> and the actual activation or de-activation of the switch. The delay may be determined by the dimensioning of the first switch <NUM> and/or by the overall configuration of the charging control circuit <NUM>. By way of example, the delay may be in the range from about <NUM> to about <NUM>, for example in the range from about <NUM> to about <NUM>. In some aspects, the delayed response may provide that the first switch <NUM> is de-activated to disconnect the first electrical path with a delay with respect to the end of a power-up phase of the device <NUM>, described in further detail below in relation to <FIG>. The first controller <NUM> may be configured to activate the first switch <NUM> to connect the first electrical path during the power-up phase (to speed up a charging of the charge storage element), and to de-activate the first switch at the end of the power-up phase (to allow data communication to the device <NUM>).

In some aspects, the first controller <NUM> may be configured to control the first switch <NUM> in accordance with a configuration signal (e.g., the received second signal <NUM>). The first controller <NUM> may be configured to carry out the control of the first switch <NUM> described above in case the configuration signal indicates that the indirect power mode is to be selected. The first controller <NUM> may be configured to disable the control of the first switch <NUM> described above (and to leave the first switch <NUM> open) in case the configuration signal indicates that the direct power mode is to be selected.

<FIG> shows schematically a charging control circuit 300b according to various aspects. The charging control circuit 300b may include a second switch <NUM> (also referred to herein as weak switch or weak power switch). The second switch <NUM> may be configured to provide a second electrical path via which a charge storage element (e.g., the charge storage element <NUM>) may be charged. Illustratively, the second switch <NUM> may be configured to provide a second electrical path via which a signal configured to provide data and power to the device (e.g., the first signal <NUM>) may be provided at the charge storage element <NUM>. In some aspects, the second switch <NUM> may be connected in series with the charge storage element <NUM>. In some aspects, the second switch <NUM> and a first switch <NUM> of the charging control circuit 300a (e.g., the first switch <NUM> described in relation to <FIG>) may be connected in parallel with one another. The second switch <NUM> may be configured to provide (e.g., to connect) the second electrical path in case the second switch <NUM> is activated (in other words, closed), and to disconnect the second electrical path in case the second switch <NUM> is de-activated (in other words, open). It is however understood that other configurations of the second switch <NUM> for connecting or disconnecting the second electrical path may be provided.

In some aspects, the second electrical path may have a second resistance, e.g. greater than the first resistance, for example the second electrical path may be a high resistance path (e.g., having resistance greater than the first electrical path described in relation to <FIG>, but still having a resistance lower than an electrical path in which a decoupling element is present, as described in relation to <FIG>). By way of example, the second electrical path may have a resistance greater than <NUM>Ω, for example greater than <NUM>Ω or greater than <NUM>Ω. The second electrical path may provide a high resistance connection to ensure that the received first signal <NUM> may be pulled low. Illustratively, in case a strong switch is active (e.g., the first switch <NUM>), it may not be possible to pull the received first signal <NUM> to low (e.g., the signal at a single-line connection). For example, a host device may be configured to commence a transmission of data to the device <NUM> with a reset pulse where the first signal <NUM> is pulled to low. This may not be possible if a strong switch is ON (and thus preventing the host device from transmitting data to the device <NUM>). A strong switch may thus be ON to support an operation of the device and may be turned off to (re-)enable data communication after completion of the operation.

The second switch <NUM> may be configured to provide a (second) electrical path to provide faster charging of the charge storage element <NUM> compared to a scenario in which only a diode may be present, without preventing the received first signal <NUM> from being pulled low (thus allowing, for example, a host device to issue a wakeup signal, e.g. a wakeup pulse, by pulling the signal to "<NUM>" for a short period of time). The high resistance path may also ensure that the charge storage element <NUM> is not significantly discharged during a period in which the signal is pulled low and the second switch <NUM> is still on (that is, in which the second electrical path is still connected), for example during a delay period before the second switch <NUM> is actually de-activated. In case the second switch <NUM> was too strong, it may not be possible to pull the signal low in case the switch is active.

In some aspects, the second switch <NUM> may be configured to sustain a low current (e.g., lower with respect to the current that may be sustained by the first switch <NUM> described in relation to <FIG>). The second switch <NUM> may be a weak switch that may enable fast(er) charging of the charge storage element <NUM> (e.g., during a power up phase) without preventing the signal configured to provide data and power to the device from being pulled low. In some aspects, the second switch <NUM> may have an area in the range from about <NUM><NUM> to about <NUM><NUM>, for example an area of about <NUM><NUM>. The second switch <NUM> may have a resistance (e.g., an ON resistance) in the range from about <NUM>Ω to about <NUM>Ω, for example a resistance of about <NUM>Ω. The second switch <NUM> may be configured (e.g., dimensioned) to sustain (or withstand) a lower current compared to the first switch <NUM> described in relation to <FIG>. In some aspects, the second switch <NUM> may include a transistor, e.g. a field-effect transistor, such as a metal-oxide-semiconductor field-effect transistor.

A strong switch (e.g., the first switch <NUM>) may differ from a weak switch (e.g., the second switch <NUM>), for example, in the resistance of the switch. A switch may be identified as a strong switch or as a weak switch according to the respective resistance that the switch provides in relation to the resistance of a device coupled to the device including the switch (e.g., in relation to the resistance of a GPIO of a host device). In case the resistance of the switch is much smaller than the resistance of the GPIO of the host (e.g., at least <NUM> times smaller, or at least <NUM> times smaller, or at least <NUM> times smaller), the switch may be considered strong. In some aspects, a resistance of a strong switch (e.g., the first switch <NUM>) may be at least <NUM> times smaller than a resistance of weak switch (e.g., the second switch <NUM>), for example at least <NUM> times smaller, or at least <NUM> times smaller.

In some aspects, the area of the second switch <NUM> may be smaller than the area of the first switch <NUM> described in relation to <FIG>. By way of example, a ratio of the area of the first switch <NUM> to the area of the second switch <NUM> may be in the range from about <NUM> to about <NUM>, for example about <NUM>.

In some aspects, the charging control circuit <NUM> may be configured to control the second switch <NUM> in accordance, e.g. in synchronization, with the received first signal <NUM> (e.g., in synchronization with a level of the received first signal <NUM>).

In some aspects, the charging control circuit <NUM> may include a second controller <NUM> (also referred to herein as weak controller) configured to control the second switch <NUM>. The second controller <NUM> may be configured to control (e.g., to activate or de-activate) the second switch <NUM> in accordance with a level of the received first signal <NUM>. The second controller <NUM> may be configured to activate the second switch <NUM> to connect the second electrical path in response to the received first signal <NUM> being at a first level (e.g., at a high level), and to de-activate the second switch <NUM> to disconnect the second electrical path in response to the received first signal <NUM> being at a second level (opposite the first level, e.g. at a low level).

In some aspects, the second controller <NUM> may be configured to activate the second switch <NUM> in response to the received first signal <NUM> being at (or transitioning into) a high level (e.g., a high voltage level, e.g. associated with a logic "<NUM>"). This may provide that the charge storage element <NUM> may be (rapidly) charged by the power provided by the received first signal <NUM> (e.g., compared to a scenario in which only a diode is present). The second controller <NUM> may be configured to maintain the second switch <NUM> activated as long as the received first signal <NUM> is at the first level. This may provide a faster charging of the charge storage element <NUM>. By way of example, the second controller <NUM> may be configured to activate the second switch <NUM> during a power up phase of the device <NUM>, as described in further detail below.

In some aspects, the second controller <NUM> may be configured to de-activate the second switch <NUM> in response to the received first signal <NUM> being at (or transitioning into) a low level (e.g., a low voltage level, e.g. associated with a logic "<NUM>"). This may provide that a discharge of the charge storage element <NUM> is prevented (or at least reduced) even in case the received first signal <NUM> is low. This may also provide that data transmission may be enabled, as described above.

In some aspects, the second controller <NUM> may be configured to control the second switch <NUM> in accordance with a configuration signal (e.g., the received second signal <NUM>). The second controller <NUM> may be configured to carry out the control of the second switch <NUM> described above in case the configuration signal indicates that the indirect power mode is to be selected. The second controller <NUM> may be configured to disable the control of the second switch <NUM> described above (and to leave the second switch <NUM> open) in case the configuration signal indicates that the direct power mode is to be selected.

In some aspects, the second switch <NUM> may be configured (e.g., dimensioned) such that there is a delayed response to an instruction provided by the second controller <NUM>. The second switch <NUM> (and the remaining portion of the circuit) may be configured such that a delay is present between an instruction to activate or de-activate the second switch <NUM> and the actual activation or de-activation of the switch. The delay may be determined by the dimensioning of the second switch <NUM> and/or by the overall configuration of the charging control circuit <NUM>. By way of example, the delay may be in the range from about <NUM> to about <NUM>, for example in the range from about <NUM> to about <NUM>.

It is understood that the functions described herein in relation to the first controller <NUM> and the second controller <NUM> may also be carried out by a single controller (or by more than two controllers) configured to control the first switch <NUM> and the second switch <NUM>.

<FIG> shows schematically a charging control circuit 300c according to various aspects. The charging control circuit 300c may include a decoupling element <NUM> (e.g., a diode) configured to prevent a discharging of the charge storage element <NUM>. In some aspects, the decoupling element <NUM> may be understood as an intrinsic diode of the charging control circuit 300c (e.g., of the first switch <NUM> and/or of the second switch <NUM>, for example a body diode of a transistor). In some aspects, the decoupling element <NUM> may be understood as an additional element of the charging control circuit 300c.

The decoupling element <NUM> may be configured to provide a third electrical path via which a charge storage element (e.g., the charge storage element <NUM>) may be charged. Illustratively, the decoupling element <NUM> may be arranged along a third electrical path via which the charge storage element <NUM> may be charged by a signal configured to provide data and power to the device (e.g., the first signal <NUM>). In some aspects, the decoupling element <NUM> may be connected in series with the charge storage element <NUM>. In some aspects, the decoupling element <NUM> may be connected in parallel with a first switch of the charging control circuit 300c, or with a second switch of the charging control circuit 300c (e.g., the second switch <NUM>), or with both the first and second switch.

The decoupling element <NUM> may be configured (e.g., arranged) to allow current flow in one direction (e.g., from a terminal at which the signal providing data and power is received, e.g. the first terminal <NUM>, to the charge storage element <NUM>), and to substantially prevent current flow in a second direction (e.g., opposite the first direction, e.g. from the charge storage element <NUM> to the first terminal <NUM>).

In some aspects, the decoupling element <NUM> may be configured to provide a charging path for the charge storage element <NUM> even in case other charging paths to the charge storage element <NUM> are disconnected (e.g., the first electrical path provided by switch <NUM> and the second electrical path provided by the second switch <NUM>). Illustratively, the received first signal <NUM> may be at a high level, but one or more switches (e.g., both the first switch <NUM> and second switch <NUM>) of the charging control circuit 300c may be de-activated due to a delayed response to a respective activation. The decoupling element <NUM> (and the third electrical path) may provide that the charge storage element <NUM> is charged also in this case. The decoupling element <NUM> (and the third electrical path) may also provide that the charge storage element <NUM> is not discharged in case the first signal <NUM> is pulled low.

<FIG> shows schematically a charging control circuit 300d according to various aspects. In <FIG> the charging control circuit 300d is illustrated including the elements described above in relation to the charging control circuit 300a, 300b, 300c shown in <FIG>, that is the first switch <NUM>, the first controller <NUM>, the second switch <NUM>, the second controller <NUM>, and the decoupling element <NUM>. In the configuration in <FIG>, the power (e.g., the voltage) is fed to the device power supply (e.g., the supply terminal <NUM>) through an internal decoupling element <NUM> (e.g., an internal diode), and the controlled switch(es) (e.g., the first switch <NUM> and the second switch <NUM>).

In some aspects, the charging control circuit 300d may be configured to provide one or more charging paths for the charge storage element <NUM> bypassing the decoupling element <NUM>. The charging control circuit 300d may be configured to provide an electrical path via which the charge storage element <NUM> may receive the power provided by the first signal <NUM> bypassing the decoupling element <NUM> (e.g., by activating the first switch <NUM> and/or the second switch <NUM>). Illustratively, the charging control circuit 300d may be configured to provide an electrical path between the charge storage element <NUM> and the first terminal <NUM> bypassing the decoupling element <NUM>. This may provide a faster charging of the charge storage element <NUM>, and may support an operation of the device <NUM> with greater energy demand by reducing or eliminating the effect of the voltage drop at the decoupling element <NUM>. Bypassing the decoupling element <NUM> may be understood as the charging control circuit 300d being configured to provide one or more additional charging paths for the charge storage element <NUM> (e.g., by activating the first switch <NUM> and/or the second switch <NUM>). Depending on the activation status of the first and second switch (<NUM>, <NUM>), the charge storage element <NUM> may be charged via the decoupling element <NUM> alone or in combination with the one or more additional charging paths through the first and second switch.

<FIG> shows schematically a device <NUM> according to various aspects. In some aspects, the device <NUM> may be configured as a host device, e.g. as a (master) device for use in a single-wire interface system (e.g., in combination with one or more slave devices, such as one or more single-wire devices, for example with the device <NUM> described in relation to <FIG>). It is understood that the configuration of the device <NUM> illustrated in <FIG> is only an example, and that the device <NUM> may include additional, less, or alternative components as those shown.

The device <NUM> may include a single-wire connection <NUM>, and may be configured to be connected to one or more other devices (e.g., one or more slave devices, such as one or more single-wire devices, for example with the device <NUM> described in relation to <FIG>) via the single-wire connection <NUM>. The device <NUM> may be configured to communicate with the one or more other devices via the single-wire connection <NUM>. In the exemplary configuration shown in <FIG>, the single-wire connection <NUM> may be understood as a connecting element associated with the device <NUM>, e.g. included in the device <NUM> or external to the device <NUM> and to which the device <NUM> is connected.

The device <NUM> may include one or more terminals, each associated with a respective functionality. In the exemplary configuration illustrated in <FIG>, the device <NUM> may include a first terminal <NUM> (e.g., a general purpose input/output (GPIO) terminal), which may be used for communication (e.g., with one or more other devices), a second terminal <NUM> (e.g., a supply terminal), at which supply power (e.g., a supply voltage Vcc) may be provided (e.g., via a second conductive element <NUM>), and a third terminal <NUM> (e.g., a ground terminal), at which a reference voltage (e.g., a ground voltage) may be provided. The first terminal <NUM> and the single-wire connection <NUM> may be connected with one another (e.g., via a first conductive element <NUM>, which may be understood as being part of the single-wire connection <NUM>). The third terminal <NUM> may be connected to a reference voltage source (e.g., via a third conductive element <NUM>), e.g. to ground.

In some aspects, the third terminal <NUM> may be connected to a ground connection <NUM> (e.g., via the third conductive element <NUM>, which may be understood as being part of the ground connection <NUM>). The ground connection <NUM> may provide a return path for the current flowing between the device <NUM> and one or more other devices connected to it.

In some aspects, the device <NUM> may include a substrate <NUM>. Illustratively, the device <NUM> may be disposed on the substrate <NUM> (e.g., mounted on or integrated in the substrate <NUM>). In some aspects, the substrate <NUM> may be a board (also referred to as single-wire host board), e.g. a printed circuit board.

In some aspects, the device <NUM> may include a power supply <NUM> (e.g., a current source or a voltage source), and the single-wire connection <NUM> may be connected to the power supply <NUM>. In some aspects, the device <NUM> may include the power supply <NUM> (e.g., the power supply <NUM> may be integrated in the device <NUM>, for example in the substrate <NUM>). In some aspects, the power supply <NUM> may be external to the device <NUM>. In some aspects, the power supply <NUM> may provide a supply power (e.g., a supply voltage, Vcc) at the single-wire connection <NUM>. The supply power (e.g., the supply voltage, VCC) may be defined by the configuration and the requirements of the device <NUM>. Illustratively, the power supply <NUM> may be configured to provide a power adapted to the operation of the device <NUM>. The supply power may be provided at the device <NUM> via the single-wire connection <NUM> or via an additional conductive element to which the single-wire connection <NUM> is connected (e.g., via the conductive element <NUM> and the supply terminal <NUM>). In an idle state, a signal at the single-wire connection <NUM> may be at a level defined by the supply power (e.g., at a voltage level defined by the supply voltage VCC). A voltage level of a signal at the single-wire connection <NUM> may be understood, in some aspects, as a voltage level of the single-wire connection <NUM>.

In some aspects, the device <NUM> may include a resistive element <NUM>, e.g. a pull-up resistor, arranged along the path connecting the single-wire connection <NUM> and the power supply <NUM> with one another. The resistive element <NUM> may allow the signal at the single-wire connection <NUM> to be pulled low (e.g., from the level defined by the power supply to ground). Only as a numerical example, the resistive element <NUM> may have a resistance in the range from about <NUM>Ω to about <NUM>Ω.

In some aspects, the device <NUM> may be configured to transmit data (e.g., instructions). By way of example, the device <NUM> may be configured to encode data in the signal at the single-wire connection <NUM> by pulling the signal low (e.g., to ground) to transmit a logic "<NUM>" and by releasing the signal high (e.g., at VCC) to transmit a logic "<NUM>". The timing of the transmission, e.g. the assigned slots for the transmission, may be governed by a communication protocol chosen for communication between the device <NUM> and one or more other devices.

<FIG> shows schematically a system <NUM> according to various aspects. The system <NUM> may include a first device <NUM> and a second device <NUM>. In some aspects, the system <NUM> may be a single-wire interface system. The first device <NUM> may be configured as a host (master) device. The second device <NUM> may be configured as a slave device (e.g., a single-wire slave device). In some aspects, the first device <NUM> may include or may be configured as the device <NUM> described in relation to <FIG>. In some aspects, the second device <NUM> may include or may be configured as the device <NUM> described in relation to <FIG>. The first device <NUM> and the second device <NUM> may be connected to one another via a single-wire connection <NUM>. The single-wire connection <NUM> may be configured as the single-wire connection <NUM> described in relation to <FIG> and as described in relation to <FIG>. Illustratively, the single-wire connection <NUM> may be configured to carry a signal configured to provide data and power to the second device <NUM>. The first device <NUM> and the second device <NUM> may be connected to one another via a ground connection <NUM>. The ground connection <NUM> may be configured as the ground connection <NUM> described in relation to <FIG> and as described in relation to <FIG>.

As described in relation to <FIG>, the second device <NUM> may include a charge storage element (e.g., the charge storage element <NUM>) configured to be charged by the power provided by the signal at the single-wire connection <NUM>. The second device <NUM> may include a charging control circuit (e.g., the charging control circuit <NUM>) configured to control a charging of the charge storage element by the power provided by the signal at the single-wire connection <NUM> based on the data provided by the signal at the single-wire connection <NUM>.

As described in relation to <FIG>, the charging control circuit may include a first switch configured to provide a first electrical path for the signal at the single-wire connection <NUM> to charge the charge storage element. The first switch may be configured to prevent the first device <NUM> to pull the signal at the single-wire connection <NUM> to a low level in case the first switch is activated.

As described in relation to <FIG>, the charging control circuit may include a second switch configured to provide a second electrical path for the signal at the single-wire connection <NUM> to charge the charge storage element. The second switch may be configured to allow the first device <NUM> to pull the signal at the single-wire connection <NUM> to a low level (even) in case the second switch is activated.

<FIG> shows schematically a single-wire interface system <NUM> (in the following referred to as system <NUM>) according to various aspects. The system <NUM> may include a host (master) device <NUM> and a single-wire (slave) device <NUM> connected to one another via a single-wire connection <NUM> (and via a ground connection <NUM>). Illustratively, the system <NUM>, the host device <NUM>, the single-wire device <NUM>, and the single-wire connection <NUM> may be an exemplary implementation of the system <NUM>, the first device <NUM> (e.g., of the device <NUM>), the second device <NUM> (e.g., of the device <NUM>), and of the single-wire connection <NUM> (e.g., of the single-wire connection <NUM>).

The host device <NUM> may include a substrate <NUM> (e.g., a host board). The host device <NUM> may include a supply terminal <NUM>, at which a supply voltage VCC_HOST may be provided, a general purpose input/output terminal <NUM>, which may be used for communication with the single-wire device <NUM>, and a ground terminal <NUM>, at which a reference voltage (e.g., a ground voltage) may be provided.

The host device <NUM> may include a power supply <NUM>, e.g. a voltage source, configured to provide power (e.g., a supply voltage VCC_HOST) at the host device <NUM>. The single-wire connection <NUM> and the power supply <NUM> may be connected to one another over a pull-up resistor <NUM> (RP). A current ISWI may flow in the pull-up resistor <NUM> (and provide a voltage VSWI at the single-wire connection <NUM>, e.g. at an input port of the single-wire device <NUM>).

The single-wire device <NUM> may include a substrate <NUM> (e.g., a device board). The single-wire device <NUM> may include a single-wire interface terminal <NUM>, which may be used for communication with the host device <NUM> (e.g., at which a current IOD may be received), a configuration terminal <NUM>, at which a configuration signal may be provided, a ground terminal <NUM> at which the reference voltage VSS (e.g., a ground voltage) may be provided, and a supply terminal <NUM> (VCC), at which the operating power for the single-wire device <NUM> may be provided.

The single-wire device <NUM> may include a (storage) capacitor <NUM> (CVCC) configured to be charged by the power provided by the signal at the single-wire connection <NUM> (and received at the single-wire terminal <NUM>). Illustratively, the capacitor <NUM> may be charged by a current Icharge flowing into it.

The single-wire device <NUM> may include a charging control circuit <NUM> (described in further detail in <FIG>) configured to control a charging of the capacitor <NUM>. The charging control circuit <NUM> may include a diode <NUM> configured to prevent a discharging of the capacitor <NUM>. The charging control circuit <NUM> may include one or more switching elements <NUM> to control the charging of the capacitor <NUM> (see also <FIG>). The charging control circuit <NUM> may ensure that a current IVDDP associated with a voltage drop across the diode <NUM> may be reduced.

<FIG> shows schematically the charging control circuit <NUM> according to various aspects. The charging control circuit <NUM> may be configured as the charging control circuit <NUM>, 300a, 300b, 300c, 300d described in relation to <FIG>. Illustratively, the charging control circuit <NUM> may be an exemplary implementation of the charging control circuit <NUM>, 300a, 300b, 300c, 300d described in relation to <FIG>. The charging control circuit <NUM> may include a main switch <NUM> (also referred to herein as main power switch <NUM>) configured to provide a first electrical path (e.g., a low resistance path) via which the capacitor <NUM> may be charged by the signal at the single-wire connection <NUM> (e.g., the signal SWI at the single-wire terminal <NUM>). The charging control circuit <NUM> may include a main controller <NUM> configured to control the main switch <NUM>. The charging control circuit <NUM> may include a weak switch <NUM> (also referred to herein as weak power switch <NUM>) configured to provide a second electrical path (e.g., a high resistance path) via which the capacitor <NUM> may be charged by the signal at the single-wire connection <NUM>. The charging control circuit <NUM> may include a weak controller <NUM> configured to control the weak switch <NUM>.

The main controller <NUM> and the weak controller <NUM> may be configured to control the main switch <NUM> and the weak switch <NUM>, respectively, based on the data provided by the signal at the single-wire connection <NUM>. Illustratively, the main controller <NUM> and the weak controller <NUM> may be configured to interpret the instructions encoded in the data provided by the signal at the single-wire connection <NUM>. Additionally or alternatively, the single-wire device <NUM> may include one or more processors configured to interpret the instructions encoded in the data provided by the signal at the single-wire connection <NUM> and configured to provide corresponding instructions at the charging control circuit <NUM>.

By way of example, the main controller <NUM> and the weak controller <NUM> may be configured to activate the main switch <NUM> and the weak switch <NUM> to connect the first electrical path and the second electrical path in response to a wakeup signal <NUM> (wakeup_ai). The wakeup signal <NUM> may indicate the beginning of a power up phase. As a further example, the main controller <NUM> may be configured to activate the main switch <NUM> to connect the first electrical path in response to an instruction indicating a selection of the main switch <NUM>, e.g. in response to a first selection signal <NUM> (psw_main_sel_i). As another example, the weak controller <NUM> may be configured to activate the weak switch <NUM> to connect the second electrical path in response to an instruction indicating a selection of the weak switch <NUM>, e.g. in response to a second selection signal <NUM> (psw _sel_i<<NUM>>). As a further example, the main controller <NUM> and the weak controller <NUM> may be configured to enable the control of the main switch <NUM> and of the second switch <NUM> in response to a configuration signal <NUM> (config_ai) indicating that an indirect power mode is to be selected. The main controller <NUM> and the weak controller <NUM> may be configured to disable the control of the main switch <NUM> and of the second switch <NUM> in response to the configuration signal (config_ai) indicating that a direct power mode is to be selected.

The weak controller <NUM> may be configured to control the weak switch <NUM> in accordance (e.g., in synchronization) with the signal at the single-wire connection <NUM>, e.g. the signal SWI, which may be provided at the weak controller <NUM>. In some aspects, the signal SWI may be provided at the weak controller <NUM> over a resistive element <NUM>.

<FIG> shows a timing diagram <NUM> illustrating an exemplary operation of the charging control circuit <NUM> according to various aspects. It is understood that the operation described in relation to <FIG> is only an example, and other types of operations or sequences of operations may be provided.

At <NUM>, in the initial phase when the signal SWI is raising, the signal SWI is charging up the capacitor <NUM> cap through the diode <NUM>.

At <NUM>, once the signal SWI reaches a high level, the weak power switch <NUM> is turned on in the analog module (illustratively, in the charging control circuit <NUM>) to increase the charging current to speed up the charging of the capacitor <NUM> and to provide current to support the startup operation of the single-wire device <NUM>.

At <NUM>, once the digital power is up, the main controller <NUM> will take over the role of controlling the main power switch <NUM> and it will turn on the main power switch <NUM> to support high current operation during the power up phase as needed.

At <NUM>, the main controller <NUM> will switch off the main power switch <NUM> after a power up delay. This would reduce the power switch strength (e.g., leaving only the weak switch <NUM> active), which allows the master device <NUM> to communicate. For example, by pulling the SWI signal to low in order to transmit a binary <NUM> and switching the SWI signal to high to transmit a binary <NUM>. It is not possible for the master device <NUM> to pull the SWI signal to low if the main power switch is on.

At <NUM>, when the host <NUM> starts to communicate, the main power switch <NUM> will be in OFF state and the weak power switch <NUM> will be in ON state depending on the logic level of the SWI communication. When the SWI signal is high, the weak switch <NUM> will be turn on, when the SWI signal is low, the weak switch <NUM> will be turn off to prevent the Vcc voltage from discharging through the weak switch <NUM> when the SWI signal is low. The SWI signal will be charging or providing current through intrinsic diode <NUM> and the weak switch <NUM>.

At <NUM>, when the SWI communication has ended, the controller (illustratively, the charging control circuit <NUM>) will determine the task that it needs to perform when receiving the bus command.

At <NUM>, when controller is in Active-NVM (active non-volatile memory) and Active-Auth (active authentication) task, it will turn on the main power switch <NUM>. This allows the SWI bus to charge up the capacitor <NUM> through the main power switch <NUM> which provides a low electrical resistance path compared to the high electrical resistance second electrical path associated with the weak switch <NUM>. This correspondingly increases the charging rate of the capacitor <NUM> thus allowing the higher power consumption requirement of the Active-NVM (active non-volatile memory) and Active-Auth (active authentication) task to be met. In some implementations, the main power switch <NUM> is turned on in response to the expected power consumption of the device for the Active-NVM and Active-Auth being above a predefined threshold.

At <NUM>, when controller finishes the Active-NVM or Active-Auth task, it will turn off the main power switch <NUM>. This reduces the power switch strength, which allows the host device <NUM> or the single-wire device <NUM> (e.g., the device transceiver) to drive SWI bus (e.g., to drive the signal SWI low).

At <NUM>, when the controller (e.g., one or more processors of the single-wire device <NUM>) wants to send the data to the master device <NUM>, it will send the data with the main power switch <NUM> turned off. The control of the weak power switch <NUM> will depend on the logic level of the SWI interface.

At <NUM>, after the controller has finished sending data on the SWI bus, it will prepare to exit the Active-Communication mode to enter the Active-Idle mode.

At <NUM>, the controller will transit to Active-Idle mode with the main power switch <NUM> turned off.

<FIG> shows a schematic flow diagram of a method <NUM> for operating a device (e.g., for operating the device <NUM>), according to various aspects. In some aspects, the device may be configured as a slave device for use in a single-wire interface system, for example in combination with a host device (and optionally with one or more other slave devices).

The method <NUM> may include, in <NUM>, receiving a signal, the signal being configured to provide power and data to the device. In some aspects, the signal may be a signal at a single-wire interface, e.g. the signal may be received at the device via a single-wire interface.

The method <NUM> may include, in <NUM>, charging a charge storage element by the power provided by the received signal.

The method <NUM> may include, in <NUM>, controlling a charging control circuit to control a charging of the charge storage element by the power provided by the received signal based on the data provided by the received signal. In some aspects, the method <NUM> may include controlling a charging control circuit to control a charging of the charge storage element in accordance with a level of the received signal.

In some aspects, the data provided by the received signal define an operation of the device, and the method may include controlling the charging control circuit to control the charging of the charge storage element based on an expected power consumption associated with the operation defined by the data.

In some aspects, the method <NUM> may include controlling the charging control circuit to control the charging of the charge storage element such that the charge storage element receives a first power from the received signal in case the expected power consumption of the device is above a predefined threshold and such that the charge storage element receives a second power (e.g., lower than the first power) from the received signal in case the expected power consumption of the device is below the predefined threshold.

In some aspects, the method <NUM> may include controlling the charging control circuit to control a resistance of an electrical path via which the charge storage element receives the power (e.g., a current) provided by the received signal.

In some aspects, the method <NUM> may include controlling the charging control circuit to provide a first electrical path via which the charge storage element receives the power provided by the received signal in case an expected power consumption of the device is above a predefined threshold, the first electrical path having a first resistance, and to provide a second electrical path via which the charge storage element receives the power provided by the received signal in case an expected power consumption of the device is below the predefined threshold, the second electrical path having a second resistance (e.g., greater than the first resistance).

In some aspects, the method <NUM> may include controlling the charging control circuit to connect the first electrical path in case an expected power consumption of an operation defined by the data provided by the received signal is above a predefined threshold, and controlling the switching circuit to disconnect the first electrical path in case the expected power consumption of the operation defined by the data provided by the received signal is below the predefined threshold.

In some aspects, the method <NUM> may include controlling the charging control circuit to disconnect the first electrical path after completion of the operation defined by the data provided by the received signal.

In some aspects, the method <NUM> may include controlling the charging control circuit to connect the second electrical path in response to the received signal being at a first (e.g., high) level and to disconnect the second electrical path in response to the received signal being at a second (e.g., low) level. In some aspects, the method <NUM> may include controlling the charging control circuit to maintain the second electrical path connected as long as the received signal is in at the first level.

In some aspects, the method <NUM> may include controlling the charging control circuit to provide an electrical path via which the charge storage element receives the power provided by the received signal bypassing a decoupling element (e.g., a diode) to which the charge storage element is connected.

Claim 1:
A device (<NUM>) configured to receive a signal (<NUM>), the signal (<NUM>) being configured to provide power and data to the device (<NUM>); the device (<NUM>) comprising:
a charge storage element (<NUM>) configured to be charged by the power provided by the received signal (<NUM>); and
a charging control circuit (<NUM>, 300a, 300b, 300c, 300d) configured to control a charging of the charge storage element (<NUM>) by the power provided by the received signal (<NUM>) based on the data provided by the received signal (<NUM>),
wherein the data provided by the received signal (<NUM>) encode one or more instructions instructing an operation to be carried out by the device (<NUM>), and
wherein the charging control circuit (<NUM>, 300a, 300b, 300c, 300d) is configured to control the charging of the charge storage element (<NUM>) based on an expected power consumption associated with the operation to be carried out by the device (<NUM>) instructed by the one or more instructions encoded in the data,
characterised in that
the charging control circuit (<NUM>, 300a, 300b, 300c, 300d) is configured to control the charging of the charge storage element (<NUM>) such that the charge storage element (<NUM>) receives a first power from the received signal (<NUM>) in case the expected power consumption of the device (<NUM>) is above a predefined threshold and such that the charge storage element (<NUM>) receives a second power from the received signal (<NUM>) in case the expected power consumption of the device (<NUM>) is below the predefined threshold,
wherein the second power is lower than the first power.