Patent Description:
Mass Spectrometry provides for the identification of chemical components of a substance by separating gaseous ions of the substance according to ion mass and charge. Various instruments and techniques have been developed for determining the masses of such separated ions, and one such technique is known as charge detection mass spectrometry (CDMS). In CDMS, ion mass is determined as a function of measured ion mass-to-charge ratio, typically referred to as "m/z," and measured ion charge.

High levels of uncertainty in m/z and charge measurements with early CDMS detectors has led to the development of an electrostatic linear ion trap (ELIT) detector in which ions are made to oscillate back and forth through a charge detection cylinder. Multiple passes of ions through such a charge detection cylinder provides for multiple measurements for each ion, and it has been shown that the uncertainty in charge measurements decreases with n<NUM>/<NUM>, where n is the number of charge measurements. However, spurious, extraneous and/or other charges picked up on the charge detector can present challenges to distinguishing valid and detectable charges from charge detector noise, and this effect becomes even more pronounced as charge signal levels approach the noise floor of the charge detector. From an Article by <NPL>, a charge detection mass spectrometer including gain drift compensation is known, comprising:.

It is desirable to seek improvements in ELIT design and/or operation which extend the range of valid, detectable charge measurements over those obtainable using current ELIT designs.

The present invention provides an improved charge detection mass spectrometer according to claim <NUM> as well as systems for separating ions according to claims <NUM> and <NUM>, which include the charge detection mass spectrometer of the present invention.

For the purposes of promoting an understanding of the principles of this disclosure, reference will now be made to a number of illustrative embodiments shown in the attached drawings and specific language will be used to describe the same.

This disclosure relates to an electrostatic linear ion trap (ELIT) including an apparatus for calibrating or resetting the charge detector thereof, and to means and methods for controlling both. In one embodiment, an example of which will be described in detail below with respect to FIGS. 3A - 3E, the calibration apparatus is controlled in a manner which calibrates or resets the charge detector of the ELIT to a predefined reference charge level between ion measurement events. In another embodiment, an example of which will be described in detail below with respect to <FIG>, the calibration apparatus is controlled in a manner which calibrates or resets the charge detector of the ELIT to a predetermined reference charge level between charge detection events. For purposes of this disclosure, the phrase "charge detection event" is defined as detection of a charge associated with an ion passing a single time through the charge detector of the ELIT, and the phrase "ion measurement event" is defined as a collection of charge detection events resulting from oscillation of an ion back and forth through the charge detector a selected number of times or for a selected time period.

Referring to <FIG>, a charge detection mass spectrometer (CDMS) <NUM> is shown including an embodiment of an electrostatic linear ion trap (ELIT) <NUM> with control and measurement components coupled thereto and including an apparatus for calibrating or resetting the charge detector of the ELIT <NUM>. In the illustrated embodiment, the CDMS <NUM> includes an ion source <NUM> operatively coupled to an inlet of the ELIT <NUM>. As will be described further with respect to <FIG>, the ion source <NUM> illustratively includes any conventional device or apparatus for generating ions from a sample and may further include one or more devices and/or instruments for separating, collecting, filtering, fragmenting and/or normalizing ions according to one or more molecular characteristics. As one illustrative example, which should not be considered to be limiting in any way, the ion source <NUM> may include a conventional electrospray ionization source, a matrix-assisted laser desorption ionization (MALDI) source or the like, coupled to an inlet of a conventional mass spectrometer. The mass spectrometer may be of any conventional design including, for example, but not limited to a time-of-flight (TOF) mass spectrometer, a reflectron mass spectrometer, a Fourier transform ion cyclotron resonance (FTICR) mass spectrometer, a quadrupole mass spectrometer, a triple quadrupole mass spectrometer, a magnetic sector mass spectrometer, or the like. In any case, the ion outlet of the mass spectrometer is operatively coupled to an ion inlet of the ELIT <NUM>. The sample from which the ions are generated may be any biological or other material.

In the illustrated embodiment, the ELIT <NUM> illustratively includes a charge detector CD surrounded by a ground chamber or cylinder GC and operatively coupled to opposing ion mirrors M1, M2 respectively positioned at opposite ends thereof. The ion mirror M1 is operatively positioned between the ion source <NUM> and one end of the charge detector CD, and ion mirror M2 is operatively positioned at the opposite end of the charge detector CD. Each ion mirror M1, M2 defines a respective ion mirror region R1, R2 therein. The regions R1, R2 of the ion mirrors M1, M2, the charge detector CD, and the spaces between the charge detector CD and the ion mirrors M1, M2 together define a longitudinal axis <NUM> centrally therethrough which illustratively represents an ideal ion travel path through the ELIT <NUM> and between the ion mirrors M1, M2 as will be described in greater detail below.

In the illustrated embodiment, voltage sources V1, V2 are electrically connected to the ion mirrors M1, M2 respectively. Each voltage source V1, V2 illustratively includes one or more switchable DC voltage sources which may be controlled or programmed to selectively produce a number, N, programmable or controllable voltages, wherein N may be any positive integer. Illustrative examples of such voltages will be described below with respect to <FIG> to establish one of two different operating modes of each of the ion mirrors M1, M2 as will be described in detail below. In any case, ions move within the ELIT <NUM> along the longitudinal axis <NUM> extending centrally through the charge detector CD and the ion mirrors M1, M2 under the influence of electric fields selectively established by the voltage sources V1, V2.

The voltage sources V1, V2 are illustratively shown electrically connected by a number, P, of signal paths to a conventional processor <NUM> including a memory <NUM> having instructions stored therein which, when executed by the processor <NUM>, cause the processor <NUM> to control the voltage sources V1, V2 to produce desired DC output voltages for selectively establishing ion transmission and ion reflection electric fields, TEF, REF respectively, within the regions R1, R2 of the respective ion mirrors M1 , M2. P may be any positive integer. In some alternate embodiments, either or both of the voltage sources V1, V2 may be programmable to selectively produce one or more constant output voltages. In other alternative embodiments, either or both of the voltage sources V1, V2 may be configured to produce one or more time-varying output voltages of any desired shape. It will be understood that more or fewer voltage sources may be electrically connected to the mirrors M1, M2 in alternate embodiments.

The charge detector CD is illustratively provided in the form of an electrically conductive cylinder which is electrically connected to a signal input of a charge sensitive preamplifier (or charge sensitive amplifier) CP, and the signal output of the charge preamplifier CP is electrically connected to the processor <NUM>. The charge preamplifier CP is illustratively operable in a conventional manner to receive a charge signal (CH) corresponding to a charge induced on the charge detection cylinder CD by an ion passing therethrough, to produce a charge detection signal (CHD) corresponding thereto and to supply the charge detection signal CHD to the processor <NUM>. In some embodiments, the charge preamplifier CP may include conventional feedback components, e.g., one or more resistors and/or other conventional feedback circuitry, coupled between the output and at least one of the inputs thereof. In some alternate embodiments, the charge preamplifier CP may not include any resistive feedback components, and in still other alternate embodiments the charge preamplifier CP may not include any feedback components at all. In any case, the processor <NUM> is, in turn, illustratively operable to receive and digitize charge detection signals CHD produced by the charge preamplifier CP, and to store the digitized charge detection signals CHD in the memory <NUM>. The processor <NUM> is further illustratively coupled to one or more peripheral devices <NUM> (PD) for providing signal input(s) to the processor <NUM> and/or to which the processor <NUM> provides signal output(s). In some embodiments, the peripheral devices <NUM> include at least one of a conventional display monitor, a printer and/or other output device, and in such embodiments the memory <NUM> has instructions stored therein which, when executed by the processor <NUM>, cause the processor <NUM> to control one or more such output peripheral devices <NUM> to display and/or record analyses of the stored, digitized charge detection signals.

The voltage sources V1, V2 are illustratively controlled in a manner, as described in detail below, which selectively traps an ion entering the ELIT <NUM> and causes the trapped ion to oscillate back and forth between the ion mirrors M1, M2 such that it repeatedly passes through the charge detection cylinder CD. A plurality of charge and oscillation period values are measured at the charge detection cylinder CD, and the recorded results are processed to determine mass-to-charge ratio, charge and mass values of the ion trapped in the ELIT <NUM>.

Referring now to <FIG>, embodiments are shown of the ion mirrors M1, M2 respectively of the ELIT <NUM> depicted in <FIG>. Illustratively, the ion mirrors M1, M2 are identical to one another in that each includes a cascaded arrangement of <NUM> spaced-apart, electrically conductive mirror electrodes. For each of the ion mirrors M1, M2, a first mirror electrode <NUM><NUM> has a thickness W1 and defines a passageway centrally therethrough of diameter P1. An endcap <NUM> is affixed or otherwise coupled to an outer surface of the first mirror electrode <NUM><NUM> and defines an aperture A1 centrally therethrough which serves as an ion entrance and/or exit to and/or from the corresponding ion mirror M1, M2 respectively. In the case of the ion mirror M1, the endcap <NUM> is coupled to, or is part of, an ion exit of the ion source <NUM> illustrated in <FIG>. The aperture A1 for each endcap <NUM> illustratively has a diameter P2.

A second mirror electrode <NUM><NUM> of each ion mirror M1, M2 is spaced apart from the first mirror electrode <NUM><NUM> by a space having width W2. The second mirror electrode <NUM><NUM>, like the mirror electrode <NUM><NUM>, has thickness W1 and defines a passageway centrally therethrough of diameter P2. A third mirror electrode <NUM><NUM> of each ion mirror M1, M2 is likewise spaced apart from the second mirror electrode <NUM><NUM> by a space of width W2. The third mirror electrode <NUM><NUM> has thickness W1 and defines a passageway centrally therethrough of width P1.

A fourth mirror electrode <NUM><NUM> is spaced apart from the third mirror electrode <NUM><NUM> by a space of width W2. The fourth mirror electrode <NUM><NUM> illustratively has a thickness of W1 and is formed by a respective end of the ground cylinder, GC disposed about the charge detector CD. The fourth mirror electrode <NUM><NUM> defines an aperture A2 centrally therethrough which is illustratively conical in shape and increases linearly between the internal and external faces of the ground cylinder GC from a diameter P3 defined at the internal face of the ground cylinder GC to the diameter P1 at the external face of the ground cylinder GC (which is also the internal face of the respective ion mirror M1, M2).

The spaces defined between the mirror electrodes <NUM><NUM> - <NUM><NUM> may be voids in some embodiments, i.e., vacuum gaps, and in other embodiments such spaces may be filled with one or more electrically non-conductive, e.g., dielectric, materials. The mirror electrodes <NUM><NUM> - <NUM><NUM> and the endcaps <NUM> are axially aligned, i.e., collinear, such that a longitudinal axis <NUM> passes centrally through each aligned passageway and also centrally through the apertures A1, A2. In embodiments in which the spaces between the mirror electrodes <NUM><NUM> - <NUM><NUM> include one or more electrically non-conductive materials, such materials will likewise define respective passageways therethrough which are axially aligned, i.e., collinear, with the passageways defined through the mirror electrodes <NUM><NUM> - <NUM><NUM> and which illustratively have diameters of P2 or greater. Illustratively, P1 > P3 > P2, although in other embodiments other relative diameter arrangements are possible.

A region R1 is defined between the apertures A1, A2 of the ion mirror M1, and another region R2 is likewise defined between the apertures A1, A2 of the ion mirror M2. The regions R1, R2 are illustratively identical to one another in shape and in volume.

As described above, the charge detector CD is illustratively provided in the form of an elongated, electrically conductive cylinder positioned and spaced apart between corresponding ones of the ion mirrors M1, M2 by a space of width W3. In on embodiment, W1 > W3 > W2, and P1 > P3 > P2, although in alternate embodiments other relative width arrangements are possible. In any case, the longitudinal axis <NUM> illustratively extends centrally through the passageway defined through the charge detection cylinder CD, such that the longitudinal axis <NUM> extends centrally through the combination of the passageways defined by the regions R1, R2 of the ion mirrors M1, M2 and the passageway defined through the charge detection cylinder CD. In operation, the ground cylinder GC is illustratively controlled to ground potential such that the fourth mirror electrode <NUM><NUM> of each ion mirror M1, M2 is at ground potential at all times. In some alternate embodiments, the fourth mirror electrode <NUM><NUM> of either or both of the ion mirrors M1, M2 may be set to any desired DC reference potential, or to a switchable DC or other time-varying voltage source.

In the embodiment illustrated in <FIG>, the voltage sources V1, V2 are each configured to each produce four DC voltages D1 - D4, and to supply the voltages D1 - D4 to a respective one of the mirror electrodes <NUM><NUM> - <NUM><NUM> of the respective ion mirror M1, M2. In some embodiments in which one or more of the mirror electrodes <NUM><NUM> - <NUM><NUM> is to be held at ground potential at all times, the one or more such mirror electrodes <NUM><NUM> - <NUM><NUM> may alternatively be electrically connected to the ground reference of the respective voltage supply V1, V2 and the corresponding one or more voltage outputs D1 - D4 may be omitted. Alternatively or additionally, in embodiments in which any two or more of the mirror electrodes <NUM><NUM> - <NUM><NUM> are to be controlled to the same non-zero DC values, any such two or more mirror electrodes <NUM><NUM> - <NUM><NUM> may be electrically connected to a single one of the voltage outputs D1 - D4 and superfluous ones of the output voltages D1 - D4 may be omitted.

Each ion mirror M1, M2 is illustratively controllable and switchable, by selective application of the voltages D1 - D4, between an ion transmission mode (<FIG>) in which the voltages D1 - D4 produced by the respective voltage source V1, V2 establishes an ion transmission electric field (TEF) in the respective region R1, R2 thereof, and an ion reflection mode (<FIG>) in which the voltages D1 - D4 produced by the respect voltage source V1, V2 establishes an ion reflection electric field (REF) in the respective region R1, R2 thereof. As illustrated by example in <FIG>, once an ion from the ion source <NUM> flies into the region R1 of the ion mirror M1 through the inlet aperture A1 of the ion mirror M1, the ion is focused toward the longitudinal axis <NUM> of the ELIT <NUM> by an ion transmission electric field TEF established in the region R1 of the ion mirror M1 via selective control of the voltages D1 - D4 of V1. As a result of the focusing effect of the transmission electric field TEF in the region R1 of the ion mirror M1, the ion exiting the region R1 of the ion mirror M1 through the aperture A2 of the ground chamber GC attains a narrow trajectory into and through the charge detector CD, i.e., so as to maintain a path of ion travel through the charge detector CD that is close to the longitudinal axis <NUM>. An identical ion transmission electric field TEF may be selectively established within the region R2 of the ion mirror M2 via like control of the voltages D1 - D4 of the voltage source V2. In the ion transmission mode, an ion entering the region R2 from the charge detection cylinder CD via the aperture A2 of M2 is focused toward the longitudinal axis <NUM> by the ion transmission electric field TEF within the region R2 so that the ion exits the ion mirror M2 through the aperture A1 thereof.

As illustrated by example in <FIG>, an ion reflection electric field REF established in the region R2 of the ion mirror M2 via selective control of the voltages D1 - D4 of V2 acts to decelerate and stop an ion entering the ion region R2 from the charge detection cylinder CD via the ion inlet aperture A2 of M2, to accelerate the ion in the opposite direction back through the aperture A2 of M2 and into the end of the charge detection cylinder CD adjacent to M2 as depicted by the ion trajectory <NUM>, and to focus the ion toward the central, longitudinal axis <NUM> within the region R2 of the ion mirror M2 so as to maintain a narrow trajectory of the ion back through the charge detector CD toward the ion mirror M1. An identical ion reflection electric field REF may be selectively established within the region R1 of the ion mirror M1 via like control of the voltages D1 - D4 of the voltage source V1. In the ion reflection mode, an ion entering the region R1 from the charge detection cylinder CD via the aperture A2 of M1 is decelerated and stopped by the ion reflection electric field REF established within the region R1, then accelerated in the opposite direction back through the aperture A2 of M1 and into the end of the charge detection cylinder CD adjacent to M1, and focused toward the central, longitudinal axis <NUM> within the region R1 of the ion mirror M1 so as to maintain a narrow trajectory of the ion back through the charge detector CD and toward the ion mirror M2. An ion that traverses the length of the ELIT <NUM> and is reflected by the ion reflection electric field REF in the ion regions R1, R2 in a manner that enables the ion to continue traveling back and forth through the charge detection cylinder CD between the ion mirrors M1, M2 as just described is considered to be trapped within the ELIT <NUM>.

Example sets of output voltages D1 - D4 produced by the voltage sources V1, V2 respectively to control a respective one of the ion mirrors M1, M2 to the ion transmission and reflection modes described above are shown in TABLE I below. It will be understood that the following values of D1 - D4 are provided only by way of example, and that other values of one or more of D1 - D4 may alternatively be used.

While the ion mirrors M1, M2 and the charge detection cylinder CD are illustrated in <FIG> as defining cylindrical passageways therethrough, it will be understood that in alternate embodiments either or both of the ion mirrors M1, M2 and/or the charge detection cylinder CD may define non-cylindrical passageways therethrough such that one or more of the passageway(s) through which the longitudinal axis <NUM> centrally passes represents a cross-sectional area and profile that is not circular. In still other embodiments, regardless of the shape of the cross-sectional profiles, the cross-sectional areas of the passageway defined through the ion mirror M1 may be different from the passageway defined through the ion mirror M2.

The voltage sources V1, V2 are illustratively controlled in a manner which selectively establishes ion transmission and ion reflection electric fields in the region R1 of the ion mirror M1 and in the region R2 of the ion mirror M2 in a manner which allows ions to enter the ELIT <NUM> from the ion source <NUM>, and which causes an ion to be selectively trapped within the ELIT <NUM> such that the trapped ion repeatedly passes through the charge detector CD as it oscillates within the ELIT <NUM> between the ion mirrors M1 and M2. A charge induced on the charge detector CD each time an ion passes therethrough is detected by the charge preamplifier CP, and a corresponding charge detection signal (CHD) is produced by the charge preamplifier CP. The magnitude and timing of timing of the charge detection signal (CHD) produced by the charge preamplifier CP is recorded by the processor <NUM> for each charge detection event as this term is defined herein. Each charge detection event record illustratively includes an ion charge value, corresponding to a magnitude of the detected charge, and an oscillation period value, corresponding to the elapsed time between charge detection events, and each charge detection event record is stored by the processor <NUM> in the memory <NUM>. The collection of charge detection events resulting from oscillation of an ion back and forth through the charge detector CD a selected number of times or for a selected time period, i.e., a making up an ion measurement event as this term is defined herein, are then processed to determine charge, mass-to-charge ratio and mass values of the ion.

In one embodiment, the ion measurement event data are processed by computing, with the processor <NUM>, a Fourier Transform of the recorded collection of charge detection events. The processor <NUM> is illustratively operable to compute such a Fourier Transform using any conventional digital Fourier Transform (DFT) technique such as for example, but not limited to, a conventional Fast Fourier Transform (FFT) algorithm. In any case, the processor <NUM> is then illustratively operable to compute an ion mass-to-charge ratio value (m/z), an ion charge value (z) and ion mass values (m), each as a function of the computed Fourier Transform. The processor <NUM> is illustratively operable to store the computed results in the memory <NUM> and/or to control one or more of the peripheral devices <NUM> to display the results for observation and/or further analysis.

It is generally understood that the mass-to-charge ratio (m/z) of an ion oscillating back and forth through the charge detector CD of an ELIT between opposing ion mirrors M1, M2 thereof is inversely proportional to the square of the fundamental frequency ff of the oscillating ion according to the equation:
<MAT>
where C is a constant that is a function of the ion energy and also a function of the dimensions of the respective ELIT, and the fundamental frequency ff is determined directly from the computed Fourier Transform. The value of the ion charge, z, is proportional to the magnitude FTMAG of the fundamental frequency ff, taking into account the number of ion oscillation cycles. In some cases, the magnitude(s) of one or more of the harmonic frequencies of the FFT may be added to the magnitude of the fundamental frequency for purposes of determining the ion charge, z. In any case, ion mass, m, is then calculated as a product of m/z and z. The processor <NUM> is thus operable to compute m/z = C/ff<NUM>, z = F(FTMAG) and m = (m/z)(z). Multiple, e.g., hundreds or thousands or more, ion trapping events are typically carried out for any particular sample from which the ions are generated by the ion source <NUM>, and ion mass-to-charge, ion charge and ion mass values are determined/computed for each such ion trapping event. The ion mass-to-charge, ion charge and ion mass values for such multiple ion trapping events are, in turn, combined to form spectral information relating to the sample. Such spectral information may illustratively take different forms, examples of which include, but are not limited to, ion count vs. mass-to-charge ratio, ion charge vs. ion mass (e.g., in the form of an ion charge/mass scatter plot), ion count vs. ion mass, ion count vs. ion charge, or the like.

Referring again to <FIG>, the illustrated ELIT <NUM> further includes a charge generator CG electrically connected to the processor <NUM> and electrically connected to a charge generator voltage source VCG. In the illustrated embodiment, the charge generator voltage source VCG is programmable or manually controllable to produce one or more DC voltages, voltage pulses and/or voltage waveforms of any magnitude, shape, duration and/or frequency. In alternate embodiments, the charge generator voltage source VCG may be operatively coupled to the processor <NUM> so that the processor <NUM> may control the charge generator voltage source VCG to produce one or more DC voltages, voltage pulses and/or voltage waveforms of any magnitude, shape, duration and/or frequency. In the illustrated embodiment at least one charge outlet passage <NUM> of the charge generator CG illustratively extends through the ground chamber GC such that a charge outlet <NUM> of the charge outlet passage <NUM> is in fluid communication with a space <NUM> defined between the inner surface of the ground chamber GC and the outer surface of the charge detection cylinder CD. In the illustrated embodiment, a single charge outlet passage <NUM> is shown extending through the ground chamber GC, although in alternate embodiments multiple charge outlet passages may extend through the ground chamber GC. In such embodiments, two or more charge outlet passages may be singly spaced apart, or spaced apart in groups of two or more, axially and/or radially along the charge detection cylinder CD.

In one embodiment, the charge generator CG is configured to be responsive to a control signal C produced by the processor <NUM> to generate free charges <NUM> which pass through the charge outlet <NUM> of the one or more charge outlet passages <NUM> into the space <NUM> defined between the inner surface of the ground chamber or cylinder GC and the outer surface of the electrically conductive charge detection cylinder CD. In the illustrated embodiment, the charges <NUM> produced by the charge generator are positive charges, although the charge generator CG may in alternate embodiments be configured to produce negative charges or to selectively produce positive or negative charges.

In one embodiment, the charge generator CG is configured, or controllable using conventional control circuitry and/or conventional control techniques, to be responsive to activation of the control signal C produced by the control circuit <NUM> to generate and supply to the space <NUM> within the ELIT <NUM> a predictable number of free charges <NUM>, within any desired tolerance level, per unit of time. The unit of time may have any desired duration. In such embodiments, the total number of charges <NUM> supplied by the charge generator CG to the space <NUM> within the ELIT <NUM> in response to a single activation of the control signal C is thus controllable as a function of the number of charges <NUM> produced by the charge generator CG per unit time and a duration, i.e., pulse width, of the active portion of the control signal C. In alternate embodiments, the charge generator CG may be configured to produce a programmable number of charges <NUM> per unit time. In still other embodiments, the charge detector CG may be configured such that the number of charges <NUM> produced thereby in response to the control signal C is constant and predictable, or programmable, within any desired tolerance level, regardless and independently of the duration of the control signal C. In such embodiments, the number of charges <NUM> supplied by the charge generator CG to the space <NUM> within the ELIT <NUM> in response to any single activation of the control signal C is thus constant and predictable, and the total number of charges <NUM> that may be supplied by the charge generator CG to the space <NUM> within the ELIT <NUM> is controllable as a function of the total number of charges <NUM> produced with each single activation of the control signal C and the total number of activations of the control signal C produced by the processor <NUM>.

The charge generator CG may be provided in the form of any conventional charge generator. As one example, the charge generator CG may be or include a conventional filament responsive to a voltage or current applied thereto to generate and produce the free charges <NUM>. As another example, the charge generator CG may be or include an electrically conductive mesh or grid responsive to a voltage or current applied thereto to generate and produce the free charges <NUM>. As yet another example, the charge generator CG may be or include a particle charge generator configured to produce the free charges in the form of charged particles from a sample source. Examples of such particle charge generators may include, but are not limited to, an electrospray ionization (ESI) source, a matrix-assisted Laser Desorption Ionization (MALDI) source, or the like. In any case, the charge generator CG is operable to generate and supply charges to the space <NUM> within the ELIT <NUM> via the charge outlet(s) of the one or more charge outlet passages extending into, and/or fluidly coupled to, the space <NUM>.

With no charge induced on the charge detector CD by a charged particle passing therethrough or by one or more free charges <NUM> produced by the charge generator GC, the charge detection cylinder CD illustratively operates at or near a reference charge level CHREF. As the charge detection cylinder CD is not powered or grounded, the reference charge level CHREF is typically tens of charges (i.e., elementary charges "e") or less, although in some applications the reference charge level CHREF may be more than tens of charges.

As described above, the charge generator CG is responsive to control signals C produced by the processor <NUM> or other control signal generating circuitry to generate charges <NUM> of desired polarity which then pass into the space <NUM> between the inner surface of the ground cylinder GC and the outer surface of the charge detection cylinder CD. As the ground cylinder GC is generally maintained at ground potential and the charge detection cylinder CD typically operates at or near ground potential, the space <NUM> is substantially a field-free region. In some embodiments, the one or more charge outlet passages <NUM> and/or the body of the charge generator CG illustratively include(s) one or more regions in which an electric field of suitable direction is established by the voltage source VCG (or by some other source(s)) for the purpose of accelerating the generated charges <NUM> into the field free region <NUM> so that the accelerated charges <NUM> then travel through the field free region <NUM> toward and into contact with the outer surface of the charge detection cylinder CD. When such charges <NUM> contact the outer surface of the charge detection cylinder CD, they impart their respective charges onto the charge detection cylinder CD. In this regard, the generation of charges <NUM> by the charge generator GC, and travel of the generated charges through the field free region <NUM> toward and into contact with the outer surface of the charge detection cylinder to thereby impart their charges onto the charge detection cylinder defines a "charge injection" process via which the generated charges <NUM> calibrate or reset the charge detection cylinder CD and/or the charge sensitive preamplifier CP in some embodiments thereof. Such injected charges may illustratively be removed from the charge detection cylinder CD by applying an equal amount of opposite charge, and may therefore illustratively be used to calibrate and/or reset the charge detection cylinder in some applications and/or to calibrate or reset the charge preamplifier in other applications.

The "charge injection" process just described is different from a "charge induction" process in which charge may be induced on the charge detection cylinder CD by establishing a voltage difference between the charge detection cylinder CD and a voltage reference, e.g., ground potential. One illustrative technique for inducing charge on the charge detection cylinder CD without physically coupling one or more wires and/or one or more electronic devices to the charge detection cylinder CD is to configure the charge generator GC such that the voltage source VCG establishes a potential of desired polarity on the at least one charge outlet passage <NUM>. Establishing a DC potential on the at least one charge outlet passage <NUM> without generating charges <NUM> will generally create an electric field between the at least one charge outlet passage <NUM> and the charge detection cylinder CD, thus inducing a DC voltage and, in turn, a charge on the charge detection cylinder CD. The magnitude of the induced charge will generally be dependent upon the strength of the established electric field and thus upon the magnitude of the voltage applied by the voltage source VCG to the at least one charge outlet passage <NUM>. Such induced charges may illustratively be removed or modified by applying a different voltage, e.g., ground or other potential, to the charge detection cylinder CD, and may therefore be used to compensate for switching voltages applied to the ion mirror(s) M1 and/or M2, and for calibrating the charge preamplifier CP in some embodiments thereof. In alternate embodiments of the charge generator CG described above in which the charge generator CG is operable to generate free charges, the charge generator CG may thus be configured to operate as a charge induction antenna. In such embodiments, the voltage source VCG is controlled, illustratively by the processor <NUM>, to produce a DC voltage, a voltage pulse or a series of voltage pulses, or a voltage waveform which is/are applied to the charge outlet passage(s) <NUM> to create or establish one or more corresponding electric fields between the charge outlet passage(s) <NUM> generally (and in some embodiments the charge outlet(s) <NUM> specifically) and the charge detection cylinder CD to thereby induce a corresponding charge or charges on the charge detection cylinder. In such embodiments, the charge outlet passage(s) <NUM> may, but need not, include one or more charge outlets <NUM> in fluid communication with the space <NUM>. In some embodiments, for example, in which the charge generator CG is configured strictly for charge induction, the charge outlet passage(s) <NUM> may be or include one or more electrically conductive rods, probes, filaments or the like which does/do not include any outlets for dispensing or otherwise producing free charges. In other embodiments in which the charge generator CG is configured to operate as a charge induction device and a charge injection device, the charge outlet passage(s) <NUM> will illustratively include one or more charge outlets <NUM> as described above for dispensing or otherwise producing free charges <NUM>.

Thus, in some embodiments, the charge generator CG is illustratively configured to operate strictly as a charge injection device in which the charge generator CG is responsive to control signals C to generate charges <NUM> of suitable polarity and to accelerate the generated charges <NUM> out of the at least one charge outlet <NUM> of the at least one charge outlet passage <NUM> and into the field free region <NUM> such that the generated charges <NUM> travel through the field free region <NUM> toward and into contact with the external surface of the charge detection cylinder CD to impart their charges on the charge detection cylinder CD. In alternate embodiments, the charge generator CG may illustratively be configured to operate strictly as a charge induction device in which the charge generator CG is responsive to control signals C to apply at least one voltage of suitable magnitude and polarity to establish a corresponding electric field within the region <NUM> between the at least one charge outlet passage <NUM> and the charge detection cylinder CD to induce a DC voltage, and thus a charge, on the charge detection cylinder CD. In other alternate embodiments, the charge generator CD may illustratively be configured to operate both (e.g., simultaneously or separately) as a charge injection device and as a charge induction device in which the charge generator CG is responsive to control signals C produced by the processor <NUM> to generate charges <NUM> of suitable polarity and/or to apply one or more voltages of suitable magnitude and polarity to establish an electric field within the region <NUM> between the at least one charge outlet passage <NUM> and the charge detection cylinder CD to (i) induce a DC voltage, and thus a charge, on the charge detection cylinder CD, and (ii) to also accelerate the generated charges <NUM>, under the influence of the established electric field within the region <NUM>, toward and into contact with the external surface of the charge detection cylinder CD to impart their charges on the charge detection cylinder CD. The charge generator CG may thus be configured and operable strictly as a charge injector, strictly as a charge inducer or as a combination charge injector and charge inducer.

In embodiments in which the charge generator CG is configured and operable as a charge injector to produce a controlled number of charges <NUM> which then travel to, or are transported to, and in contact with the outer surface of the charge detection cylinder CD, such charges illustratively impart a target charge level, CHT, on the charge detection cylinder CD. In one embodiment, the number and polarity of the generated charges <NUM> may be selected to impart a target charge level CHT that is greater than CHREF, e.g., to achieve a constant target charge level CHT which is above CHREF and any noise induced thereon, and in other embodiments the number and polarity of the generated charges <NUM> may be selected to impart a target charge level CHT that is less than CHREF, e.g., to achieve a target charge level CHT at or near a zero charge level. In embodiments in which the charge generator CG is configured and operable as a charge inducer to controllably establish an electric field which induces a DC voltage or potential on the charge detection cylinder CD, such DC voltage or potential illustratively induces the target charge level CHT of suitable magnitude and polarity on the charge detection cylinder CD. In embodiments in which the charge generator CG is configured and operable as a combination charge injector and charge inducer, the net charge induced and imparted on the charge detection cylinder is the target charge CHT of suitable magnitude and polarity.

The reference charge level CHREF on the charge detection cylinder CD is subject to one or more potentially significant sources of charge noise which may introduce uncertainty in charge detection events as a result of uncertainty in the reference charge level at any point in time. Referring to <FIG>, for example, a plot is shown of charge CH on the charge detection cylinder CD vs. time in which no charge detection events are present but in which an example charge noise waveform <NUM> is shown superimposed on the reference charge level CHREF. In embodiments in which the charge sensitive preamplifier CP does not include feedback components, one such source of such charge noise <NUM> is an accumulation of charges on the charge detection cylinder CD and thus at the input of the charge sensitive preamplifier CP during normal operation thereof. In this and other embodiments, capacitance of the charge detector CD also contributes, as does spurious noise caused by external events and extraneous charges induced on the charge detection cylinder resulting from switching of either or both of the ion mirrors M1, M2 between ion transmission and ion reflection modes of operation.

Such charge noise <NUM>, from any source, is undesirable as it can produce false charge detection events and/or can require setting a charge detection threshold higher than desired. As an example of the former case, the plot of <FIG> further illustrates an example charge detection threshold CHTH1 implemented in the ion mass detection system <NUM> for the purpose of distinguishing valid charge detection events from the reference charge level CHREF. In the illustrated example, two peaks <NUM>, <NUM> of the charge noise <NUM> present at and around CHREF exceed CHTH1 and will thus be incorrectly or falsely detected as valid charge detection events, thereby corrupting the ion measurement event data for the ion(s) being evaluated. As an example of the latter case, a second example charge detection threshold CHTH2 is also illustrated in <FIG> which is illustratively positioned safely above the highest peak of the charge noise <NUM> so as to avoid false charge detection events of the type just described. However, the higher charge detection threshold CHTH2 leaves an undesirably large range of undetectable charge values between CHTH2 and CHREF which would otherwise be detectable but for the high level of charge noise <NUM>.

In the embodiment of the ELIT <NUM> illustrated in <FIG>, the charge generator CG is illustratively implemented and controlled to selectively generate a target number of charges <NUM> which are transported through the field free region <NUM> to, and into contact with, the outer surface of the charge detection cylinder CD, e.g., under the influence of one or more suitably directed electric fields at or within the charge generator CG as described above. The charges <NUM> deposited on the charge detection cylinder CD illustratively combine with any charge noise carried on the charge detection cylinder CD to produce a substantially constant, predictable and repeatable target charge level, CHT, on the charge detection cylinder CD. In one example embodiment, the target number and polarity of the generated charges <NUM> may be selected to impart a target charge level CHT on the charge detection cylinder which is greater in magnitude than the combination of the reference charge level CHREF and any charge noise present on the charge detection cylinder CD. The target charge level CHT in this example embodiment thus envelopes and overrides the combination of CHREF and any charge noise, leaving a new and substantially constant charge reference in the form of CHT. Alternatively or additionally, the charge generator CG may be controlled to induce a suitable charge on the charge detection cylinder CD by controlling the voltage source VCG to apply one or more corresponding voltages to the charge generator CG.

In alternate embodiments, the target number and polarity of the generated charges <NUM> may be selected to neutralize at least one or the combination of the reference charge level CHREF and any charge noise present on the charge detection cylinder CD so as to induce a resulting target charge level CHT on the charge detection cylinder CD which is less than CHREF, e.g., to achieve a target charge level CHT or near a zero charge level. Such a result may illustratively be accomplished by controlling the charge generator CG to first inject positive charges and to then inject negative charges, or to alternatively induce a suitable charge on the charge detection cylinder CD by controlling the voltage source VCG to apply one or more corresponding voltages to the charge generator CG. In some embodiments in which an amount of charge noise <NUM> at the input charge sensitive preamplifier CP is specifically targeted (e.g., in embodiments in which the charge sensitive preamplifier does not include any feedback components as described above), the target charge level CHT may be a charge magnitude and/or polarity which, when deposited or imparted on the charge detection cylinder CD, acts to clear such charge noise <NUM> therefrom and thus from the input of the charge preamplifier so as to reset the charge sensitive preamplifier CP to predictable operating conditions.

In any case, the target number of charges <NUM> generated by the charge generator CG and transported to, and in contact with, the outer surface of the charge detection cylinder CD and/or the charge induced on the charge detection cylinder CD by the operation of the charge generator CG, operate to set the charge detection cylinder CD to a substantially predictable and repeatable target charge level CHT, as illustrated by example in <FIG>. The target charge level CHT establishes a "new" reference charge level against which subsequent charge detection events are measured. As the new reference charge level CHT is substantially repeatable, a substantial reduction in the charge difference between a charge detection threshold CHTH3 and CHT can be realized as also illustrated in <FIG>, thereby increasing the range of detectable ion charge as compared with conventional ELITs.

Referring now to <FIG>, simplified diagrams of the ELIT <NUM> of <FIG> are shown demonstrating sequential control and operation of the ion mirrors M1, M2, as described above, and of the charge generator CG to calibrate or reset the charge detection cylinder CD between ion measurement events. Referring to <FIG>, the ELIT <NUM> has just concluded an ion measurement event in which an ion was trapped in the ELIT <NUM> and in which the processor <NUM> was operable to control the voltage sources V1, V2 to control the ion mirrors M1, M2 to the ion reflection modes of operation (R) in which ion reflection electric fields were established in the regions R1, R2 of each respective ion mirror M1, M2. The ion thus oscillated back and forth between M1 and M2, each time passing through the charge detection cylinder CD whereupon the charge induced thereby on the charge detection cylinder CD was detected by the charge preamplifier CP and the ion detection event was recorded by the processor <NUM>. After the ion had oscillated back and forth through the ELIT <NUM> between the ion mirrors M1, M2 a selected number of times or for a selected time period, the processor <NUM> was operable to control the voltage source V2 to control the ion mirror M2 to the ion transmission mode (T) of operation by establishing an ion transmission field within the region R2 of the ion mirror M2, while maintaining the ion mirror M1 in the ion reflection mode (R) of operation as illustrated in <FIG>. As a result, the trapped ion exits the ion mirror M2 via the aperture A2 of M2 as illustrated by the ion trajectory <NUM> in <FIG>.

When the ELIT <NUM> has been operating in the state illustrate in <FIG> for a selected time period, or for a selected time period in which no charge detection events occur, the processor <NUM> is operable to supply a control signal C to the charge generator CG to cause the charge generator CG to controllably generate a target number of free charges <NUM> and supply the free charges <NUM> to the space <NUM> defined between the ground cylinder GC and the charge detection cylinder CD, as illustrated in <FIG>. In charge injection operation of the charge generator CG, the generated free charges <NUM> travel toward, and into contact with, the external surface of the charge detection cylinder CD through the field-free region <NUM> as described above. In charge induction operation, an electric field established by the charge generator voltage source VCG or other electric field generation structure induces a charge, on the charge detection cylinder CD. As the ion mirror M1 has been in the reflection mode (R) of operation and the ion mirror M2 has been in the transmission mode (T) of operation for a time period sufficient to clear the ELIT <NUM> of an ions, no ions are transported through the charge detection cylinder CD as the free charges <NUM> are generated and travel to the charge detection cylinder CD during charge injection operation. As such, the target number of charges <NUM> generated by the charge generator CG contacting the outer surface of the charge detection cylinder CD and imparting their charges thereon operate to calibrate or reset the charge detection cylinder CD to a substantially constant, predictable and repeatable target charge level CHT as described above. In charge induction operation, the charge induced on the charge detection cylinder CD by the electric field established by the charge generator CG may similarly be used for calibration and/or reset.

Referring now to <FIG>, after the charge detection cylinder CD has been calibrated to the target charge level CHT, the processor <NUM> is operable to control the voltage source V1 to control the ion mirror M1 to the ion transmission mode of operation (T) by establishing an ion transmission field within the region R1 of the ion mirror M1, while also maintaining the ion mirror M2 in the ion transmission mode (T) of operation. As a result, ions generated by the ion source <NUM> and entering the ion mirror M1 are passed through the ion mirror M1, through the charge detection cylinder CD, through the ion mirror M2 and out of the ion mirror M2 via the aperture A1 of the ion mirror M2 as described above and as illustrated by the ion trajectory <NUM> in <FIG>. In some embodiments, a conventional ion detector <NUM>, e.g., one or more microchannel plate detectors, is positioned adjacent to the ion exit aperture A1 of the ion mirror M2, and ion detection information provided by the detector <NUM> to the processor <NUM> may be used to adjust one or more of the components and/or operating conditions of the ELIT <NUM> to ensure adequate detection of ions passing through the charge detection cylinder CD.

Referring now to <FIG>, after both of the ion mirrors M1, M2 have been operating in ion transmission operating mode for a selected time period, the processor <NUM> is operable to control the voltage source V2 to control the ion mirror M2 to the ion reflection mode (R) of operation by establishing an ion reflection field within the region R2 of the ion mirror M2, while maintaining the ion mirror M1 in the ion transmission mode (T) of operation as shown. As a result, ions generated by the ion source <NUM> and entering the ion mirror M1 are passed through the ion mirror M1, through the charge detection cylinder CD, and into the ion mirror M2 where they are reflected back into the charge detection cylinder CD by the ion reflection field (R) established in the region R2 of M2, as illustrated by the ion trajectory <NUM> in <FIG>.

Referring now to <FIG>, the processor <NUM> is operable to control the voltage source V1 to control the ion mirror M1 to the ion reflection mode (R) of operation by establishing an ion reflection field within the region R1 of the ion mirror M1, while maintaining the ion mirror M2 in the ion reflection mode (R) of operation as shown. In one embodiment, the processor <NUM> is illustratively operable, i.e., programmed, to control the ELIT <NUM> in a "random trapping mode" in which the processor <NUM> is operable to control the ion mirror M1 to the reflection mode (R) of operation after the ELIT has been operating in the state illustrated in <FIG>, i.e., with M1 in ion transmission mode and M2 in ion reflection mode, for a selected time period. Until the selected time period has elapsed, the ELIT <NUM> is controlled to operate in the state illustrated in <FIG>. In an alternate embodiment, the processor <NUM> is operable, i.e., programmed, to control the ELIT <NUM> in a "trigger trapping mode" in which the processor <NUM> is operable to control the ion mirror M1 to the reflection mode (R) of operation until an ion is detected at the charge detector CD. Until such detection, the ELIT <NUM> is controlled to operate in the state illustrated in <FIG>. Detection by the processor <NUM> of a charge on the charge detector CD is indicative of an ion passing through the charge detector CD toward the ion mirror M1 or toward the ion mirror M2, and serves as a trigger event which causes the processor <NUM> to control the voltage source V1 to switch the ion mirror M1 to the ion reflection mode (R) of operation to thereby trap the ion within the ELIT <NUM>.

With both of the ion mirrors M1, M2 controlled to the ion reflection operating mode (R), the ion is made to oscillate back and forth between the regions R1 and R2 of the respective ion mirrors M1, M2 by the ion reflection electric fields established therein, as described above and as illustrated by the ion trajectory <NUM> depicted in <FIG>. In one embodiment, the processor <NUM> is operable to maintain the operating state illustrated in <FIG> until the ion passes through the charge detection cylinder CD a selected number of times. In an alternate embodiment, the processor <NUM> is operable to maintain the operating state illustrated in <FIG> for a selected time period after controlling M1 to the ion reflection mode (R) of operation. When the ion has passed through the charge detection cylinder CD a selected number of times or has oscillated back-and-forth between the ion mirrors M1, M2 for a selected period of time, the processor <NUM> is operable, i.e., programmed, to control the voltage source V2 to control the ion mirror M2 to the ion transmission mode (T) of operation by establishing an ion transmission field within the region R2 of the ion mirror M2, while maintaining the ion mirror M1 in the ion reflection mode (R) of operation as illustrated in <FIG>. The process then repeats for as many times as desired.

The charge cylinder calibration or reset technique described with respect to <FIG> may alternatively or additionally be implemented with the ELIT <NUM> between charge detection events. It will be understood, however, that in such embodiments dimensions of the ELIT <NUM>, and the axial lengths of the ion mirrors M1, M2 in particular, must be sized to allow for the activation of and subsequent generation of the free charges <NUM> by the charge generator GC, the deposition of the generated free charges <NUM> on the external surface of the charge detection cylinder CD and stabilization of the resulting target charge level CHT on the charge detection cylinder CD, and/or of charge inducement on the charge detection cylinder CD by a suitably established electric field, all between the time that a trapped ion traveling through the ELIT <NUM> leaves the charge detection cylinder CD and is reflected back into the charge detection cylinder by one of the ion mirrors M1, M2.

Referring now to <FIG>, simplified diagrams of the ELIT <NUM> of <FIG> are shown demonstrating sequential control and operation of the ion mirrors M1, M2, as described above, and of the charge generator CG to calibrate or reset the charge detection cylinder CD between such charge detection events. Referring to <FIG>, a single ion <NUM> is shown traveling through the ELIT <NUM> at a time T1 in the direction of the arrow A from the region R1 of the ion mirror M1 toward the charge detection cylinder CD. As illustrated in the accompanying plot of charge CH on the charge detection cylinder CD vs. time, the detected charge signal <NUM> is at the charge reference CHREF. In <FIG>, the ion <NUM> is shown at a subsequent time T2 in which it has progressed along the direction A of travel and entered the charge detection cylinder CD. The detected charge signal <NUM> accordingly shows a step just prior to T2 indicative of the detected charge induced on the charge detection cylinder CD by the ion <NUM> contained therein. At a further subsequent time T3, the ion <NUM> has progressed further along the direction A of travel and has approached the end of the charge detection cylinder CD, as illustrated in <FIG>. The peak of the charge detection signal <NUM> is accordingly reaching its end at T3.

At still a further subsequent time T4, the ion <NUM> still traveling in the direction A has just exited the charge detection cylinder CD and is poised to enter the region R2 of the ion mirror M2 as illustrated in <FIG>. Upon detecting the attendant falling edge of the charge detection signal <NUM> at time T4, i.e., upon detection by the processor <NUM> of the absence of the charge detection signal that is produced by the charge preamplifier CP when an ion is passing through the charge detection cylinder CD and is inducing its charge on the charge detection cylinder, the processor <NUM> is operable to produce the control signal C at time T5 to activate the charge generator CG as indicated by the rising edge of the control signal <NUM>. At a subsequent time T6, the charge generator CG is responsive to the control signal C to produce a selected number of free charges <NUM>, and such free charges <NUM> then travel through the field-free region <NUM> and into contact with the exterior surface of the charge detection cylinder CD to deposit the target number of free charges <NUM> thereon. Alternatively or additionally, the charge generator CG may be responsive to the control signal C to generate an electric field between the at least one charge outlet passage <NUM> and the charge detection cylinder CD which induces a corresponding charge, on the charge detection cylinder CD.

At a subsequent time T7, the ion reflection electric field (R) established in the region R2 of the ion mirror M2 has trapped and reversed the direction of the ion <NUM> so that it is now traveling in the opposite direction B toward the entrance of the charge detection cylinder CD adjacent to the ion mirror M2 as illustrated in <FIG>. The processor <NUM> has deactivated the control signal C at T7 as indicated by the falling edge of the control signal <NUM>. In response to deactivation of the control signal C, the charge generator CG has stopped generating free charges <NUM>, and the last of the generated charges <NUM> are shown in <FIG> moving toward the exterior surface of the charge detection cylinder CD. Alternatively or additionally, the charge generator CG may be responsive to the control signal C at T7 to stop generating the electric field described above. Thereafter at time T8, the ion <NUM> traveling in the direction B has reentered the charge detection cylinder CD as indicated by the rising edge of the charge detection signal <NUM> at T8 as illustrated in <FIG>. Between T7 and T8, the generated free charges <NUM> deposited on the charge detection cylinder CD settle and stabilize to result in the target charge level CHT on the charge detection cylinder CD which becomes the new charge reference for the charge detection signal <NUM> as also illustrated in <FIG>. Alternatively or additionally, calibration or reset may be accomplished via charge induction as described above. A process identical to that illustrated in <FIG> occurs at the opposite end of the ELIT <NUM> and continues with each oscillation of the ion <NUM> within the ELIT <NUM> until the ion mirror M2 is opened to allow the ion <NUM> to exit the aperture A1 thereof.

The following examples are provided to illustrate three specific applications; one in which the charge generator CG is controlled to selectively produce free charges <NUM> as part of a charge injection process to deposit or impart a respective net charge on the charge detection cylinder CD, one in which the charge generator CG is controlled as part of a charge induction process to selectively induce a charge on the charge detection cylinder, and one in which the charge generator CG is controlled as part of a charge preamplifier calibration process to selectively induce a high frequency charge on the charge detection signal during normal operation of the ELIT in which mass and charge of a charged particle is measured thereby, to process the detected high frequency charges and to use the information provided thereby to compensate for any drift in gain of the charge preamplifier over time. It will be understood that such applications are provided only by way of example, and should not be understood to limit the concepts described herein in any way.

The first example application is specifically targeted at embodiments in which the charge sensitive preamplifier does not include any feedback components, or at least in which the charge sensitive preamplifier does not include any feedback components operable to bleed or otherwise dissipate or remove charges that may build up or otherwise accumulate on the charge detection cylinder CD as charges are induced thereon by trapped ions passing therethrough. In such embodiments, charge that builds up or accumulates on the charge detection cylinder raises the base charge level at the input of the charge sensitive preamplifier, thus causing the output of the charge preamplifier to drift upwardly and, eventually, to the level of the supply voltage of the charge sensitive preamplifier. In such embodiments, the charge generator CG is configured to operate in charge injection mode, and the processor <NUM> is operable to control the charge generator CG to generate free charges <NUM> of appropriate polarity and quantity which, when deposited or imparted on the charge detection cylinder CD, counteracts the accumulated or built up charge thereby resetting the charge level of the charge detection cylinder CD and the input of the charge sensitive preamplifier to the reference charge level CHREF or other selectable charge level.

The second example application is specifically targeted at embodiments in which the charge generator is configured to operate in charge induction mode to counteract or at least reduce charges induced on the charge detection cylinder CD by electric field transients produced when switching either or both of the ion mirrors M1, M2 between ion transmission and ion reflection modes as described above. Generally, each time the voltage source V1 and/or V2 is controlled by the processor <NUM> to modify the respective voltages applied to the ion mirror M1 and/or the ion mirror M2 to switch from an ion transmission electric field TEF to an ion reflection electric field REF or vice versa, the switching from one electric field to the other creates an electric field transient which induces a corresponding transient charge on the charge detection cylinder CD. This transient charge, at least in some instances, saturates the output of the charge sensitive preamplifier for some period of time, and in other instances causes the charge sensitive preamplifier to produce one or more pulses detectable by the processor <NUM>. In either instance, such outputs produced by the charge sensitive preamplifier do not correspond to charges induced on the charge detection cylinder CD by a trapped ion passing therethrough, and following any such switching of either ion mirror M1, M2 or simultaneously of both ion mirrors M1, M2 charge detection data collection by the processor <NUM> is conventionally paused or delayed for a period of time to allow the transient charge induced on the charge detection cylinder CD to dissipate. In this regard, the processor <NUM> is operable in this second example to control the charge generator CG and/or the voltage source VCG to produce a counter-pulse each time one or both of the ion mirrors M1, M2 is/are switched between ion transmission and reflection modes, wherein such counter-pulse induces a charge on the charge detection cylinder CD equal or approximately equal and opposite to the transient charge induced on the charge detection cylinder CD by the switching of the ion mirror(s) M1 and/or M2 so as to counteract or at least reduce the net transient charge induced on the charge detection cylinder by such switching of the ion mirror(s) M1 and/or M2. Illustratively, the shape, duration and/or magnitude of the voltage counter-pulse produced by the voltage source VCG is controlled to create an electric field between the charge generator CG and the charge detection cylinder CD having a corresponding shape, duration and/or magnitude to induce a charge on the charge detection cylinder which is equal and opposite to the transient charge induced on the charge detection cylinder CD by the switching of the ion mirror(s) M1, M2. Such counter-pulsing by the voltage source VCG illustratively avoids saturating the charge preamplifier CP and, in any case, provides for the processing of charge detection data following switching of the ion mirror(s) M1 and/or M2 much sooner than in conventional ELIT and/or CDMS instruments.

It will be understood that the transient charge induced on the charge detection cylinder CD by the switching of the ion mirror M1 may be different from that induced by the switching of the ion mirror M2, either of which may be different from that induced when simultaneously switching both ion mirrors M1, M2, and that any such transient charges induced on the charge detection cylinder CD when switching either or both ion mirrors M1, M2 from transmission mode to reflection mode may be different than when switching from reflection mode to transient mode. The processor <NUM> may thus be programmed in this example application to control the shape, duration and/or magnitude of the voltage counter-pulse produced by the voltage source VCG differently, depending upon how and which of the ion mirrors M1, M2 (or both) are being switched, to selectively create an appropriate electric field between the charge generator CG and the charge detection cylinder CD which has a corresponding shape, duration and/or magnitude to induce a charge on the charge detection cylinder which is equal and opposite to any such transient charge being induced on the charge detection cylinder CD by such switching of the ion mirror(s) M1 and/or M2.

The third example application is specifically targeted at embodiments in which the charge sensitive preamplifier may be susceptible to drift in gain over time, e.g., due to one or any combination of, but not limited to, amplifier operating temperature, amplifier operating temperature gradients, and signal history. In such embodiments, the charge generator CG is illustratively controlled to selectively induce high frequency charges on the charge detection cylinder CD during normal operation of the ELIT <NUM> in which mass and charge of charged particles are measured thereby as described herein, to process the detected high frequency charges and to use information provided thereby to compensate for any drift in gain of the charge sensitive preamplifier CP over time. In this regard, the simplified flowchart of <FIG> illustrates an example process <NUM> for controlling the charge generator voltage source VCG and/or the charge generator CG to continually induce high frequency charges on the charge detection cylinder CD and to use the corresponding information in the resulting charge detection signals CHD to compensate for gain drift in the charge sensitive preamplifier over time. The process <NUM> is illustratively stored in the memory <NUM> in the form of instructions executable by the processor <NUM> to control operation of the charge generator voltage source VCG and/or the charge generator CG and to process the charge detection signals CHD as just described.

In this regard, the process <NUM> begins at step <NUM> where the processor <NUM> is operable to set a counter, j, equal to <NUM> or some other starting value. Thereafter at step <NUM> the processor <NUM> is operable to control the voltage source VCG and/or the charge generator CG to produce a high frequency voltage of suitable constant or stable magnitude to create a corresponding high-frequency electric field between the outlet <NUM>, e.g., in the form of an antenna or other suitable structure, of the charge generator CG and the charge detection cylinder CD which induces a corresponding high frequency charge on the charge detection cylinder CD. The term "high frequency," as used in this embodiment, should be understood to mean a frequency that is at least high enough so that the resulting portion of the frequency domain charge detection signal CHD during normal operation of the ELIT <NUM> is distinguishable from the portion of CHD resulting from detection of charge induced by a charged particle, i.e., an ion, passing through the charge detection cylinder. In this regard, the "high frequency" should at least be higher than the highest oscillation frequency of any ion oscillating back and forth in the ELIT <NUM> as described above. The high frequency voltage produced by VCG and/or CG may take any shape, e.g., square, sinusoidal, triangular, etc., and have any desired duty cycle. In one example embodiment, which should not be considered limiting in any way, the high frequency voltage produced at the antenna <NUM> is a square wave which, in the frequency domain, includes only the fundamental frequency and odd harmonics.

Following step <NUM>, the process <NUM> advances to step <NUM> where the processor <NUM> is operable to measure the charge, CI, induced on the charge detector CD by the high frequency signal produced at the antenna <NUM> by processing the corresponding charge detection signal CHD produced by the charge sensitive preamplifier CP. Thereafter at step <NUM>, the processor <NUM> is operable to convert the time-domain charge detection signal CHD to a frequency domain charge detection signal, CIF, e.g., using any conventional signal conversion technique such a discrete Fourier transform (DFT), fast Fourier transform (FFT) or other conventional technique. Thereafter at step <NUM>, the processor <NUM> is operable to determine the peak magnitude, PM, of the fundamental frequency of the charge detection signal CIF. Thereafter at step <NUM>, the processor <NUM> is operable to compare the counter value, j, to a target value, N. Generally, N will be the sample size of a data set containing multiple, sequentially measured values of PM, and will define the size of a moving average window used to track the drift of the charge sensitive preamplifier CP. In this regard, N may have any positive value. Generally, lower values of N will produce a more responsive but less smooth moving average, and higher values of N will conversely produce a less responsive but more smooth moving average. Typically, N will be selected based on the application. In one example application, which should not be considered limiting in any way, N is <NUM>, although in other applications N may be less than <NUM>, several hundred, <NUM> or several thousand.

If, at step <NUM>, the processor <NUM> determines that j is less than or equal to N, the process <NUM> advances to step <NUM> where the processor <NUM> is operable to add PM(j) to an N-sample data set stored in the memory <NUM>. Thereafter at step <NUM>, the processor is operable to increment the counter, j, and to then loop back to step <NUM>. If, at step <NUM>, the processor <NUM> instead determines that j is greater than N, the process <NUM> advances to step <NUM> where the processor <NUM> is operable to determine an average, AV, of the N-sample data set value PM<NUM>-N. In one embodiment, the processor <NUM> is illustratively operable at step <NUM> to compute AV as an algebraic average of PM<NUM>-N, although in alternate embodiments the processor <NUM> may be operable at step <NUM> to compute AV using one or more other conventional averaging techniques or processes.

Steps <NUM>-<NUM> of the process <NUM> are illustratively executed prior to operation of the instrument <NUM> to measure a spectrum of masses and charges of ions generated from a sample as described herein. In this regard, the purpose of steps <NUM>-<NUM> is to build an N-sample data set of peak magnitude values PM and to establish a baseline gain or gain factor, AV, of the charge sensitive preamplifier CP prior to normal operation of the ELIT <NUM> to measure ion mass and charge as described herein. It will be understood, however, that in other embodiments steps <NUM>-<NUM> may be re-executed at any time, e.g., randomly, periodically or selectively, to reestablish the baseline gain or gain factor.

Following step <NUM>, the processor <NUM> is illustratively operable to begin a CDMS analysis of a sample by the instrument <NUM> as described herein, e.g., by controlling the voltage sources V1 and V2 to measure masses and charges of ions generated from a sample with the ELIT <NUM>. Thereafter at step <NUM>, as such operation of the instrument <NUM> and ELIT <NUM> is taking place, and as the charge generator CG is continually controlled to induce the high frequency charge HFC on the charge detection cylinder CD, the processor <NUM> is operable, for each charge detection signal CHD produced by the charge sensitive preamplifier in response to a charge induced on the charge detection cylinder CD by a charged particle passing therethrough, to (a) determine PM, e.g., in accordance with steps <NUM>-<NUM> or other conventional process for determining PM, (b) add PM to the N-sample data set and delete the oldest PM value so as to advance the N-sample data set "window" by one data point, (c) determine a new average, NAV, of the now updated N-sample data set, e.g., in accordance with step <NUM> or other conventional averaging techniques, (d) determine a charge sensitive preamplifier gain calibration factor, GCF, as a function of AV and NAV, and (e) modify the portion of the charge detection signal CHD produced by the charge sensitive preamplifier in response to a charge induced on the charge detection cylinder CD by a charged particle passing therethrough as a function of GCF to compensate for any drift in gain of the charge sensitive preamplifier CP.

It will be understood that any of several conventional techniques may be used by the processor <NUM> at step <NUM>(d) to determine GCF. In one embodiment, for example, GCF may be the ratio GCF = NAV/AV or GCF = AV/NAV. In other embodiments, AV may be normalized, e.g., to a value of <NUM> or some other value, and NAV may be similarly normalized as a function of the normalized AV to produce GCF in the form of a normalized multiplier. Other techniques will occur to those skilled in the art, and it will be understood that any such other techniques are intended to fall within the scope of this disclosure. In any case, the processor <NUM> is illustratively operable at step <NUM>(e) to modify the portion of the charge detection signal CHD produced by the charge sensitive preamplifier in response to a charge induced on the charge detection cylinder CD by a charged particle passing therethrough to compensate for any drift in gain of the charge sensitive preamplifier CP by multiplying the peak magnitude of this portion of the charge detection signal CH by GCF. Those skilled in the art will recognize other techniques for executing step <NUM>(e) to include in GCF other factors that may affect the gain of CP, to include one or more weighting values to boost or attenuate the gain of CP based on one or more factors, or the like.

Referring now to <FIG>, an example plot of CHD vs. frequency is shown depicting an example of the charge detection signal CHD processed at step <NUM>(a) which includes charge peaks <NUM> corresponding to detection of charge induced on the charge detection cylinder CD of the ELIT <NUM> by a charged particle passing therethrough and additional charge peaks <NUM> corresponding to detection of the high frequency charge HFC simultaneously induced on the charge detection cylinder CD by the charge generator CG. As described herein, the frequency of the high-frequency charges induced on the charge detection cylinder CD by the antenna <NUM> of the charge generator CG is at least sufficiently higher than the oscillation frequency of the charged particle oscillating back and forth through the ELIT <NUM> to enable the two charge sources to be distinguishable from one another. The peak magnitude PM of the fundamental frequency of the induced high frequency charge HFC determined at step <NUM>(a) of the process <NUM> is also illustrated in <FIG>.

Referring to <FIG>, an example plot of the peak magnitude PM of the fundamental frequency of the high frequency charge HFC induced on the charge detection cylinder CG by the charge generator vs. time <NUM> is shown which includes the baseline gain value AV computed at step <NUM> and which includes an example drift in the gain of the charge sensitive preamplifier CP over time during operation of the instrument <NUM>. It will be understood that whereas <FIG> depicts the gain drift as being linearly increasing over time, the gain drift may alternatively be non-linear or piecewise liner and/or may decrease over time or increase at times and decrease at others. In any case, the baseline gain value AV computed at step <NUM> occurs during the time window W1 between times T0 and T1, step <NUM> is executed at time T1, and the charge sensitive preamplifier gain drifts thereafter between T1 and T3. <FIG> further depicts progressive movement of the N-sample time window repeatedly executed at step <NUM>(b), i.e., with each charge detection signal CHD resulting from a charge induced on the charge detection cylinder CD by a charged particle passing therethrough. One such example time window W2 is shown extending from midway between T0 and T1 to T2, and another example time window W3 is shown extending between times T2 and T.

Referring now to <FIG>, a plot is shown of an N-sample data set moving average (NAV) <NUM> over time of the peak magnitude signal <NUM> illustrated in <FIG>, as determined by the processor <NUM> at step <NUM>(c) of the process <NUM>. In the illustrated example, the moving average NAV smooths the peak magnitude signal <NUM> to a linearly increasing function from the baseline gain or gain factor AV. As described above, NAV and AV are illustratively used by the processor <NUM> at steps <NUM>(d) and <NUM>(e) to modify the portion of the charge detection signal CHD produced by the charge sensitive preamplifier in response to a charge induced on the charge detection cylinder CD by a charged particle passing therethrough to compensate for any drift in gain of the charge sensitive preamplifier CP by multiplying the peak magnitude of this portion of the charge detection signal CH by GCF.

Referring now to <FIG>, a simplified block diagram is shown of an embodiment of an ion separation instrument <NUM> which may include the ELIT <NUM> illustrated and described herein, and which may include the charge detection mass spectrometer (CDMS) <NUM> illustrated and described herein, and which may include any number of ion processing instruments which may form part of the ion source <NUM> upstream of the ELIT <NUM> and/or which may include any number of ion processing instruments which may be disposed downstream of the ELIT <NUM> to further process ion(s) exiting the ELIT <NUM>. In this regard, the ion source <NUM> is illustrated in <FIG> as including a number, Q, of ion source stages IS<NUM> - ISQ which may be or form part of the ion source <NUM>. Alternatively or additionally, an ion processing instrument <NUM> is illustrated in <FIG> as being coupled to the ion outlet of the ELIT <NUM>, wherein the ion processing instrument <NUM> may include any number of ion processing stages OS<NUM> - OSR, where R may be any positive integer.

Focusing on the ion source <NUM>, it will be understood that the source <NUM> of ions entering the ELIT <NUM> may be or include, in the form of one or more of the ion source stages IS<NUM> - ISQ, one or more conventional sources of ions as described above, and may further include one or more conventional instruments for separating ions according to one or more molecular characteristics (e.g., according to ion mass, ion mass-to-charge, ion mobility, ion retention time, or the like) and/or one or more conventional ion processing instruments for collecting and/or storing ions (e.g., one or more quadrupole, hexapole and/or other ion traps), for filtering ions (e.g., according to one or more molecular characteristics such as ion mass, ion mass-to-charge, ion mobility, ion retention time and the like), for fragmenting or otherwise dissociating ions, for normalizing or shifting ion charge states, and the like. It will be understood that the ion source <NUM> may include one or any combination, in any order, of any such conventional ion sources, ion separation instruments and/or ion processing instruments, and that some embodiments may include multiple adjacent or spaced-apart ones of any such conventional ion sources, ion separation instruments and/or ion processing instruments. In any implementation which includes one or more mass spectrometers, any one or more such mass spectrometers may be implemented in any of the forms described herein.

Turning now to the ion processing instrument <NUM>, it will be understood that the instrument <NUM> may be or include, in the form of one or more of the ion processing stages OS<NUM> - OSR, one or more conventional instruments for separating ions according to one or more molecular characteristics (e.g., according to ion mass, ion mass-to-charge, ion mobility, ion retention time, or the like) and/or one or more conventional ion processing instruments for collecting and/or storing ions (e.g., one or more quadrupole, hexapole and/or other ion traps), for filtering ions (e.g., according to one or more molecular characteristics such as ion mass, ion mass-to-charge, ion mobility, ion retention time and the like), for fragmenting or otherwise dissociating ions, for normalizing or shifting ion charge states, and the like. It will be understood that the ion processing instrument <NUM> may include one or any combination, in any order, of any such conventional ion separation instruments and/or ion processing instruments, and that some embodiments may include multiple adjacent or spaced-apart ones of any such conventional ion separation instruments and/or ion processing instruments. In any implementation which includes one or more mass spectrometers, any one or more such mass spectrometers may be implemented in any of the forms described herein.

As one specific implementation of the ion separation instrument <NUM> illustrated in <FIG>, which should not be considered to be limiting in any way, the ion source <NUM> illustratively includes <NUM> stages, and the ion processing instrument <NUM> is omitted. In this example implementation, the ion source stage IS<NUM> is a conventional source of ions, e.g., electrospray, MALDI or the like, the ion source stage IS<NUM> is a conventional ion filter, e.g., a quadrupole or hexapole ion guide, and the ion source stage IS<NUM> is a mass spectrometer of any of the types described above. In this embodiment, the ion source stage IS<NUM> is controlled in a conventional manner to preselect ions having desired molecular characteristics for analysis by the downstream mass spectrometer, and to pass only such preselected ions to the mass spectrometer, wherein the ions analyzed by the ELIT <NUM> will be the preselected ions separated by the mass spectrometer according to mass-to-charge ratio. The preselected ions exiting the ion filter may, for example, be ions having a specified ion mass or mass-to-charge ratio, ions having ion masses or ion mass-to-charge ratios above and/or below a specified ion mass or ion mass-to-charge ratio, ions having ion masses or ion mass-to-charge ratios within a specified range of ion mass or ion mass-to-charge ratio, or the like. In some alternate implementations of this example, the ion source stage IS<NUM> may be the mass spectrometer and the ion source stage IS<NUM> may be the ion filter, and the ion filter may be otherwise operable as just described to preselect ions exiting the mass spectrometer which have desired molecular characteristics for analysis by the downstream ELIT <NUM>. In other alternate implementations of this example, the ion source stage IS<NUM> may be the ion filter, and the ion source stage IS<NUM> may include a mass spectrometer followed by another ion filter, wherein the ion filters each operate as just described.

As another specific implementation of the ion separation instrument <NUM> illustrated in <FIG>, which should not be considered to be limiting in any way, the ion source <NUM> illustratively includes <NUM> stages, and the ion processing instrument <NUM> is again omitted. In this example implementation, the ion source stage IS<NUM> is a conventional source of ions, e.g., electrospray, MALDI or the like, the ion source stage IS<NUM> is a conventional mass spectrometer of any of the types described above. This is the implementation described above with respect to <FIG> in which the ELIT <NUM> is operable to analyze ions exiting the mass spectrometer.

As yet another specific implementation of the ion separation instrument <NUM> illustrated in <FIG>, which should not be considered to be limiting in any way, the ion source <NUM> illustratively includes <NUM> stages, and the ion processing instrument <NUM> is omitted. In this example implementation, the ion source stage IS<NUM> is a conventional source of ions, e.g., electrospray, MALDI or the like, and the ion processing stage OS<NUM> is a conventional single or multiple-stage ion mobility spectrometer. In this implementation, the ion mobility spectrometer is operable to separate ions, generated by the ion source stage IS<NUM>, over time according to one or more functions of ion mobility, and the ELIT <NUM> is operable to analyze ions exiting the ion mobility spectrometer. In an alternate implementation of this example, the ion source <NUM> may include only a single stage IS<NUM> in the form of a conventional source of ions, and the ion processing instrument <NUM> may include a conventional single or multiple-stage ion mobility spectrometer as a sole stage OS<NUM> (or as stage OS<NUM> of a multiple-stage instrument <NUM>). In this alternate implementation, the ELIT <NUM> is operable to analyze ions generated by the ion source stage IS<NUM>, and the ion mobility spectrometer OS<NUM> is operable to separate ions exiting the ELIT <NUM> over time according to one or more functions of ion mobility. As another alternate implementation of this example, single or multiple-stage ion mobility spectrometers may follow both the ion source stage IS<NUM> and the ELIT <NUM>. In this alternate implementation, the ion mobility spectrometer following the ion source stage IS<NUM> is operable to separate ions, generated by the ion source stage IS<NUM>, over time according to one or more functions of ion mobility, the ELIT <NUM> is operable to analyze ions exiting the ion source stage ion mobility spectrometer, and the ion mobility spectrometer of the ion processing stage OS<NUM> following the ELIT <NUM> is operable to separate ions exiting the ELIT <NUM> over time according to one or more functions of ion mobility. In any implementations of the embodiment described in this paragraph, additional variants may include a mass spectrometer operatively positioned upstream and/or downstream of the single or multiple-stage ion mobility spectrometer in the ion source <NUM> and/or in the ion processing instrument <NUM>.

As still another specific implementation of the ion separation instrument <NUM> illustrated in <FIG>, which should not be considered to be limiting in any way, the ion source <NUM> illustratively includes <NUM> stages, and the ion processing instrument <NUM> is omitted. In this example implementation, the ion source stage IS<NUM> is a conventional liquid chromatograph, e.g., HPLC or the like configured to separate molecules in solution according to molecule retention time, and the ion source stage IS<NUM> is a conventional source of ions, e.g., electrospray or the like. In this implementation, the liquid chromatograph is operable to separate molecular components in solution, the ion source stage IS<NUM> is operable to generate ions from the solution flow exiting the liquid chromatograph, and the ELIT <NUM> is operable to analyze ions generated by the ion source stage IS<NUM>. In an alternate implementation of this example, the ion source stage IS<NUM> may instead be a conventional size-exclusion chromatograph (SEC) operable to separate molecules in solution by size. In another alternate implementation, the ion source stage IS<NUM> may include a conventional liquid chromatograph followed by a conventional SEC or vice versa. In this implementation, ions are generated by the ion source stage IS<NUM> from a twice separated solution; once according to molecule retention time followed by a second according to molecule size, or vice versa. In any implementations of the embodiment described in this paragraph, additional variants may include a mass spectrometer operatively positioned between the ion source stage IS<NUM> and the ELIT <NUM>.

Referring now to <FIG>, a simplified block diagram is shown of another embodiment of an ion separation instrument <NUM> which illustratively includes a multi-stage mass spectrometer instrument <NUM> and which also includes the charge detection mass spectrometer (CDMS) <NUM> illustrated and described herein implemented as a high-mass ion analysis component. In the illustrated embodiment, the multi-stage mass spectrometer instrument <NUM> includes an ion source (IS) <NUM>, as illustrated and described herein, followed by and coupled to a first conventional mass spectrometer (MS1) <NUM>, followed by and coupled to a conventional ion dissociation stage (ID) <NUM> operable to dissociate ions exiting the mass spectrometer <NUM>, e.g., by one or more of collision-induced dissociation (CID), surface-induced dissociation (SID), electron capture dissociation (ECD) and/or photo-induced dissociation (PID) or the like, followed by an coupled to a second conventional mass spectrometer (MS2) <NUM>, followed by a conventional ion detector (D) <NUM>, e.g., such as a microchannel plate detector or other conventional ion detector. The CDMS <NUM> is coupled in parallel with and to the ion dissociation stage <NUM> such that the CDMS <NUM> may selectively receive ions from the mass spectrometer <NUM> and/or from the ion dissociation stage <NUM>.

MS/MS, e.g., using only the ion separation instrument <NUM>, is a well-established approach where precursor ions of a particular molecular weight are selected by the first mass spectrometer <NUM> (MS1) based on their m/z value. The mass selected precursor ions are fragmented, e.g., by collision-induced dissociation, surface-induced dissociation, electron capture dissociation or photo-induced dissociation, in the ion dissociation stage <NUM>. The fragment ions are then analyzed by the second mass spectrometer <NUM> (MS2). Only the m/z values of the precursor and fragment ions are measured in both MS1 and MS2. For high mass ions, the charge states are not resolved and so it is not possible to select precursor ions with a specific molecular weight based on the m/z value alone. However, by coupling the instrument <NUM> to the CDMS <NUM>, it is possible to select a narrow range of m/z values and then use the CDMS <NUM> to determine the masses of the m/z selected precursor ions. The mass spectrometers <NUM>, <NUM> may be, for example, one or any combination of a magnetic sector mass spectrometer, time-of-flight mass spectrometer or quadrupole mass spectrometer, although in alternate embodiments other mass spectrometer types may be used. In any case, the m/z selected precursor ions with known masses exiting MS1 can be fragmented in the ion dissociation stage <NUM>, and the resulting fragment ions can then be analyzed by MS2 (where only the m/z ratio is measured) and/or by the CDMS instrument <NUM> (where the m/z ratio and charge are measured simultaneously). Low mass fragments, i.e., dissociated ions of precursor ions having mass values below a threshold mass value, e.g., <NUM>,<NUM> Da (or other mass value), can thus be analyzed by conventional MS, using MS2, while high mass fragments (where the charge states are not resolved), i.e., dissociated ions of precursor ions having mass values at or above the threshold mass value, can be analyzed by CDMS <NUM>.

It will be understood that the dimensions of the various components of the ELIT <NUM> and the magnitudes of the electric fields established therein, as implemented in any of the systems <NUM>, <NUM>, <NUM> illustrated in the attached figures and described above, may illustratively be selected so as to establish a desired duty cycle of ion oscillation within the ELIT <NUM>, corresponding to a ratio of time spent by an ion in the charge detection cylinder CD and a total time spent by the ion traversing the combination of the ion mirrors M1, M2 and the charge detection cylinder CD during one complete oscillation cycle. For example, a duty cycle of approximately <NUM>% may be desirable for the purpose of reducing noise in fundamental frequency magnitude determinations resulting from harmonic frequency components of the measured signals. Details relating to such dimensional and operational considerations for achieving a desired duty cycle, e.g., such as <NUM>%, are illustrated and described in co-pending <CIT>, co-pending <CIT> and co-pending <CIT>, all entitled ELECTROSTATIC LINEAR ION TRAP DESIGN FOR CHARGE DETECTION MASS SPECTROMETRY.

It will be further understood that one or more charge detection optimization techniques may be used with the ELIT <NUM> in any of the systems <NUM>, <NUM>, <NUM>, e.g., for trigger trapping or other charge detection events. Examples of some such charge detection optimization techniques are illustrated and described in co-pending <CIT> and in co-pending <CIT>, both entitled APPARATUS AND METHOD FOR CAPTURING IONS IN AN ELECTROSTATIC LINEAR ION TRAP.

It will be still further understood that the charge detection cylinder calibration or reset apparatus and techniques illustrated in the attached figures and described herein may be used in each of two or more ELITs and/or in each of two or more ELIT regions in applications which include at least one ELIT array having two or more ELITs or having two or more ELIT regions. Examples of some such ELITs and/or ELIT arrays are illustrated and described in co-pending <CIT> and in co-pending <CIT>, both entitled ION TRAP ARRAY FOR HIGH THROUGHPUT CHARGE DETECTION MASS SPECTROMETRY.

It will be further understood that one or more ion source optimization apparatuses and/or techniques may be used with one or more embodiments of the ion source <NUM> as part of or in combination with any of the systems <NUM>, <NUM>, <NUM> illustrated in the attached figures and described herein, some examples of which are illustrated and described in co-pending <CIT> and entitled HYBRID ION FUNNEL-ION CARPET (FUNPET) ATMOSPHERIC PRESSURE INTERFACE FOR CHARGE DETECTION MASS SPECTROMETRY, and in co-pending <CIT> and entitled INTERFACE FOR TRANSPORTING IONS FROM AN ATMOSPHERIC PRESSURE ENVIRONMENT TO A LOW PRESSURE ENVIRONMENT.

It will be still further understood that any of the systems <NUM>, <NUM>, <NUM> illustrated in the attached figures and described herein may be implemented in or as part of systems configured to operate in accordance with real-time analysis and/or real-time control techniques, some examples of which are illustrated and described in co-pending <CIT> and co-pending International Patent Application No. <CIT>, both entitled CHARGE DETECTION MASS SPECTROMETRY WITH REAL TIME ANALYSIS AND SIGNAL OPTIMIZATION.

It will be still further understood that in any of the systems <NUM>, <NUM>, <NUM> illustrated in the attached figures and described herein, the ELIT <NUM> may be replaced with an orbitrap, and that the charge detection cylinder calibration or reset apparatus and techniques illustrated in the attached figures and described herein may be used with such an orbitrap. An example of one such orbitrap is illustrated and described in co-pending <CIT> and in co-pending International Patent Application No. <CIT>, both entitled ORBITRAP FOR SINGLE PARTICLE MASS SPECTROMETRY.

It will be yet further understood that one or more ion inlet trajectory control apparatuses and/or techniques may be used with the ELIT <NUM> of any of the systems <NUM>, <NUM>, <NUM> illustrated in the attached figures and described herein to provide for simultaneous measurements of multiple individual ions within the ELIT <NUM>. Examples of some such ion inlet trajectory control apparatuses and/or techniques are illustrated and described in co-pending <CIT> and in co-pending International Patent Application No. <CIT>, both entitled APPARATUS AND METHOD FOR SIMULTANEOUSLY ANALYZING MULTIPLE IONS WITH AN ELECTROSTATIC LINEAR ION TRAP.

Claim 1:
A charge detection mass spectrometer, CDMS, (<NUM>) including gain drift compensation, comprising:
an electrostatic linear ion trap, ELIT, (<NUM>) having a charge detection cylinder (CD) disposed between first and second ion mirrors (M1, M2),
a source of ions (<NUM>) configured to supply ions to the ELIT (<NUM>),
a charge generator (CG) for generating a high frequency charge for inducing a charge on the charge detection cylinder (CD),
a charge sensitive preamplifier (CP) having an input coupled to the charge detection cylinder (CD) and an output configured to produce a charge detection signal (CHD) corresponding to charge induced on the charge detection cylinder (CD), and
a processor (<NUM>) configured to (a) control the charge generator to induce the high frequency charge on the charge detection cylinder (CD), (b) control operation of the first and second ion mirrors (M1, M2) to trap an ion from the source of ions (<NUM>) therein and to thereafter cause the trapped ion to oscillate back and forth between the first and second ion mirrors (M1, M2) each time passing through the charge detection cylinder (CD) and inducing a corresponding charge thereon, and (c) process the charge detection signal (CHD) produced by the charge sensitive preamplifier (CP) to (i) determine a gain factor as a function of the high frequency charge induced by the charge generator (CG) on the charge detection cylinder (CD), and (ii) modify a magnitude of the portion of the charge detection signal (CHD) resulting from the charge induced on the charge detection cylinder (CD) by the trapped ion passing therethrough as a function of the gain factor.