Patent Description:
<CIT> relates to a magnetic current sensor including a conductor including a first sheet metal layer having a first thickness and including at least one notch extending inwardly from a first edge of the first sheet metal layer, and a second sheet metal layer having a second thickness less than the first thickness and including at least one notch, the second sheet metal layer being coupled to the first sheet metal layer such that the at least one notch of the first sheet metal layer is generally aligned with the at least one notch of the second sheet metal layer; and an integrated circuit (IC) die including at least one magnetic sensor element and being coupled to the conductor such that the at least one magnetic sensor element is generally aligned with a tip of the at least one notch of the second sheet metal layer.

<CIT> relates to a current sensor packaged in an integrated circuit package to include a magnetic field sensing circuit, a current conductor and an insulator that meets the safety isolation requirements for reinforced insulation under the UL <NUM>-<NUM> Standard. The insulator is provided as an insulation structure having at least two layers of thin sheet material. The insulation structure is dimensioned so that plastic material forming a molded plastic body of the package provides a reinforced insulation.

<CIT> relates to an integrated circuit current sensor including a lead frame having at least two leads coupled to provide a current conductor portion, and a substrate having a first surface in which is disposed one or more magnetic field sensing elements, with the first surface being proximate to the current conductor portion and a second surface distal from the current conductor portion.

<CIT> discloses a semiconductor chip package and a method to manufacture a semiconductor chip package. In one example, a substrate and a semiconductor chip are disposed on the substrate and laterally surrounded by a packaging material. The package further comprises a current rail adjacent the semiconductor chip, the current rail isolated from the semiconductor chip by an isolation layer, a first external pad, and a via contact contacting the current rail with the first external pad.

In one aspect, the invention provides a current sensor as defined in claim <NUM>.

In another aspect, the invention provides a method as defined in claim <NUM>.

The foregoing features of the invention, as well as the invention itself may be more fully understood from the following detailed description of the drawings, in which:.

Described herein are techniques to fabricate a package such as a plastic small outline flat (PSOF) lead package, for example. The fabrication of the package includes fabricating leads. The leads are fabricated using a second etch process to allow easy detachability from a lead frame. The leads are also fabricated, using the second etch process, to include recessed surfaces that contribute to a locking mechanism to enable the leads to be secured with the mold compound of the package.

Referring to <FIG>, an example of a process to fabricate leads for use in a package for an electronic circuit is a process <NUM>. Process <NUM> applies a photoresist to surface of a metal substrate (<NUM>). In one example, the metal substrate is a copper substrate.

Process <NUM> performs photolithography on the metal substrate (<NUM>). In one example, a photoresist is applied to both surfaces of the metal substrate. A first mask is placed over a top surface of the metal substrate and the exposed portions of the photoresist are radiated with an ultraviolet (UV) light. A second mask is placed on a bottom surface of the metal substrate and the exposed portions of the photoresist are radiated with the UV light. The second mask exposes less portions of the photoresist and as will be described herein, these exposed portions contribute to fabricating recessed portions of the leads.

The photoresist exposed on both surfaces to the UV light is generally removed by a developer solution leaving exposed portions of the metal substrate in a pattern corresponding to the mask used for that surface. In some examples, the photoresist is baked prior to applying the first or second mask. In other examples, the photoresist is baked after the developer solution is applied. While use of positive photoresist is described herein, one of ordinary skill in the art would recognize that the photolithography process may also be performed using negative photoresist instead.

Process <NUM> performs a first etch on one surface of the metal substrate (<NUM>). For example, the exposed portions of the metal substrate are etched away. The result of the first etch is a lead frame <NUM> depicted in <FIG>. The first etch may be performed using a dry etch or a wet etch process.

Process <NUM> performs a second etch on an opposite surface of the metal substrate (<NUM>). For example, the exposed portions of the metal substrate are etched. The second etch is performed to a depth that is less than a depth performed by the first etch leaving some portion of the metal to form the recessed portions. In one example, the second etch removes the metal down to a depth that is about <NUM>% to <NUM>% of a depth removed by the first etch. In one particular example, the second etch removes the metal down to a depth that is about <NUM>% of a depth removed by the first etch. The second etch may be performed using a dry etch or a wet etch process.

The result of the second etch is a lead frame <NUM> depicted in <FIG> and <FIG> from a bottom or angled bottom view. The portions <NUM> and <NUM> are the areas that are etched during the second etch. After the second etch, the portions <NUM> are used to easily detach leads from the lead frame <NUM>. The portions <NUM> are used as part of a locking mechanism to lock the leads with the mold compound as described in <FIG>, for example.

It is understood by one of ordinary skill in the art that the first etch and the second etch may be performed concurrently. For example, both the top and bottom surfaces may be patterned with a respective mask and exposed to UV light prior to etching both the top surface and the bottom surface concurrently.

Process <NUM> removes the photoresist (<NUM>). For example, positive photoresist is removed using organic solvents such as acetone and negative photoresist is removed using hot sulfuric acid immersion, for example. In other examples, a photoresist stripper is used.

Process <NUM> attaches a die to a lead frame (<NUM>). For example, a die is attached to a curved component <NUM> and secondary leads 304b-304d (<FIG>) using solder bumps. In one example, the die is oriented in a flip-chip arrangement with an active surface of the die which supports electrical components adjacent to the lead frame.

Process <NUM> overmolds the die and a portion of the lead frame (<NUM>) and removes portions of the lead frame (<NUM>). For example, the mold compound engages the recessed portions formed by the second etch to form a locking mechanism, an example of which is shown in <FIG>. In one example, the overmold material forms a housing for the package. The overmold material may be a plastic or other electrically insulative and protective material to form an integrated circuit (IC) package. Suitable materials for the non-conductive mold material include thermoset and thermoplastic mold compounds and other commercially available IC mold compounds.

Referring to <FIG>, the process <NUM> is used to fabricate a lead frame <NUM> including primary leads 302a, 302b that are part of a curved component <NUM> and secondary leads 304a-304f. In one example, the curved component <NUM> is in a shape of a half circle. The primary leads 302a, 302b are configured to carry current of about <NUM> amps. The outer two secondary leads 304a, 304f bend at an angle towards the primary leads. Each of the secondary leads includes corners such as a corner <NUM> on secondary lead 304f in <FIG>. The corner <NUM> contributes to a more effective soldering of the secondary lead to other objects (e.g., a printed circuit board) because the solder wicks easily in the corner <NUM>.

<FIG> is an example of the primary and secondary leads used in a PSOF lead package. For example, the PSOF lead package includes the mold compound <NUM>, the die <NUM>, the curved component <NUM> with primary leads 302a, 302b, and secondary leads 304a-304f. The curved component <NUM> is attached to the die <NUM> with solder bumps 412a, 412b, for example. The secondary leads 304b-304d are attached to the die <NUM> with solder bumps 412c, 412d, for example. The die <NUM> includes a Hall effect sensor 406a and a Hall effect sensor 406b. The curved component <NUM> at least partially wraps around the Hall effect sensor 406a.

Each area of pads attached to the primary leads 302a, 302b are generally larger than each area of pads attached to each of the secondary leads 304a-304f. For example, pads 470a, 470b are attached to the primary leads 302a, 302b, respectively. The pads 480a-480f are attached to the secondary leads 480a-480f. In one example, each area of pads 470a, 470b is at least <NUM> times larger than each area of pads 480a-480f. In other examples, each area of pads 470a, 470b is at least <NUM> to <NUM> times larger than each area of pads 480a-480f.

<FIG> depicts an example of a locking mechanism. For example, a curved component <NUM> includes the recessed portion <NUM> which forms a locking mechanism <NUM> with a mold compound <NUM>. While <FIG> depicts a curved component <NUM>, the locking mechanism is also provided by the recessed portion <NUM> for secondary leads 304a-304f in a manner similar to what is depicted in <FIG>. The curved component <NUM> also forms part of a bottom portion <NUM> of the PSOF lead package. The primary leads 302a, 302b and the secondary leads 304a-304f also form part of the bottom portion <NUM> of the PSOF lead package. The exposed leads 302a, 302b, 304a-304f contribute to an easy soldering process.

<FIG> depicts a schematic representation of an example of a die that may be used in a PSOF lead package. For example, the die in <FIG> is a magnetic field sensor, and in accordance with an embodiment is a current sensor <NUM>. The current sensor <NUM> includes a conductor <NUM> represented by a line having circuit board mounting mechanisms 516a, 516b, such as may take the form of the above-described curved component <NUM>. An illustrative magnetic field sensor <NUM> includes the sensor die <NUM> and leads <NUM>, here labeled 515a, 515b, and 515c. Lead 515a provides a power connection to the Hall effect current sensor <NUM>, lead 515b provides a connection to the current sensor output signal, and lead 515c provides a reference, or ground connection to the current sensor.

The magnetic field sensor includes a magnetic field sensing element 514a such as a Hall effect element that senses a magnetic field induced by a current flowing in the conductor <NUM>, producing a voltage in proportion to the magnetic field <NUM>. The magnetic field sensing element 514a is coupled to a dynamic offset cancellation circuit <NUM>, which provides a DC offset adjustment for DC voltage errors associated with the Hall effect element 514a. When the current through the conductor <NUM> is zero, the output of the dynamic offset cancellation circuit <NUM> is adjusted to be zero.

The dynamic offset cancellation circuit <NUM> is coupled to an amplifier <NUM> that amplifies the offset adjusted Hall output signal. The amplifier <NUM> is coupled to a filter <NUM> that can be a low pass filter, a high pass filter, a band pass filter, and/or a notch filter. The filter is selected in accordance with a variety of factors including, but not limited to, desired response time, the frequency spectrum of the noise associated with the magnetic field sensing element 514a, the dynamic offset cancellation circuit <NUM>, and the amplifier <NUM>. In one particular embodiment, the filter <NUM> is a low pass filter. The filter <NUM> is coupled to an output driver <NUM> that provides an enhanced power output for transmission to other electronics (not shown).

A trim control circuit <NUM> is coupled to lead 515a through which power is provided during operation. Lead 515a also permits various current sensor parameters to be trimmed, typically during manufacture. To this end, the trim control circuit <NUM> includes one or more counters enabled by an appropriate signal applied to the lead 515a.

The trim control circuit <NUM> is coupled to a quiescent output voltage (Qvo) circuit <NUM>. The quiescent output voltage is the voltage at output lead 515b when the current through conductor <NUM> is zero. Nominally, for a unipolar supply voltage, Qvo is equal to Vcc/<NUM>. Qvo can be trimmed by applying a suitable trim signal through the lead 515a to a first trim control circuit counter within the trim control circuit <NUM> which, in turn, controls a digital-to-analog converter (DAC) within the Qvo circuit <NUM>.

The trim control circuit <NUM> is further coupled to a sensitivity adjustment circuit <NUM>. The sensitivity adjustment circuit <NUM> permits adjustment of the gain of the amplifier <NUM> in order to adjust the sensitivity of the current sensor <NUM>. The sensitivity can be trimmed by applying a suitable trim signal through the lead 515a to a second trim control circuit counter within the trim control circuit <NUM> which, in turn, controls a DAC within the sensitivity adjustment circuit <NUM>.

The trim control circuit <NUM> is further coupled to a sensitivity temperature compensation circuit <NUM>. The sensitivity temperature compensation circuit <NUM> permits adjustment of the gain of the amplifier <NUM> in order to compensate for gain variations due to temperature. The sensitivity temperature compensation can be trimmed by applying a suitable trim signal through the lead 515a to a third trim control circuit counter within the trim control circuit <NUM> which, in turn, controls a DAC within the sensitivity temperature compensation circuit <NUM>.

It will be appreciated by those of ordinary skill in the art that the circuitry shown in <FIG> is illustrative only of exemplary circuitry that may be associated with and integrated into a magnetic field sensor. In another embodiment, additional circuitry may be provided for converting the magnetic field sensor into a "digital fuse" which provides a high or low output signal depending on whether the magnetic field induced by the current through the conductor <NUM> is greater or less than a predetermined threshold level. The additional circuitry for this alternative embodiment can include a comparator and/or a latch, and/or a relay.

In one example, a tape may be applied to the current sensor to increase the isolation voltage if desired. For example, some prior current sensors employ a layer of underfill material or have an insulating tape between die and current conductor. Examples of such devices are described in <CIT> and <CIT> (the latter being assigned to Allegro Microsystems, Inc. , Assignee of the subject application).

In other examples, a die that may be used in a PSOF lead package may include at least one of a magnetic field sensing element or a magnetic field sensor.

As used herein, the term "magnetic field sensing element" is used to describe a variety of electronic elements that can sense a magnetic field. The magnetic field sensing element can be, but is not limited to, a Hall effect element, a magnetoresistance element, or a magnetotransistor. As is known, there are different types of Hall effect elements, for example, a planar Hall element, a vertical Hall element, and a Circular Vertical Hall (CVH) element. As is also known, there are different types of magnetoresistance elements, for example, a semiconductor magnetoresistance element such as Indium Antimonide (InSb), a giant magnetoresistance (GMR) element, an anisotropic magnetoresistance element (AMR), a tunneling magnetoresistance (TMR) element, and a magnetic tunnel junction (MTJ). The magnetic field sensing element may be a single element or, alternatively, may include two or more magnetic field sensing elements arranged in various configurations, e.g., a half bridge or full (Wheatstone) bridge. Depending on the device type and other application requirements, the magnetic field sensing element may be a device made of a type IV semiconductor material such as Silicon (Si) or Germanium (Ge), or a type III-V semiconductor material like Gallium-Arsenide (GaAs) or an Indium compound, e.g., Indium-Antimonide (InSb).

As used herein, the term "magnetic field sensor" is used to describe a circuit that uses a magnetic field sensing element, generally in combination with other circuits. Magnetic field sensors are used in a variety of applications, including, but not limited to, an angle sensor that senses an angle of a direction of a magnetic field, a current sensor that senses a magnetic field generated by a current carried by a current-carrying conductor, a magnetic switch that senses the proximity of a ferromagnetic object, a rotation detector that senses passing ferromagnetic articles, for example, magnetic domains of a ring magnet or a ferromagnetic target (e.g., gear teeth) where the magnetic field sensor is used in combination with a back-biased or other magnet, and a magnetic field sensor that senses a magnetic field density of a magnetic field.

Claim 1:
A current sensor (<NUM>), comprising:
a die (<NUM>) comprising at least two magnetic field sensing elements (514a); and
a curved component (<NUM>) at least partial wrapped around one of the at least two magnetic field sensing elements (514a) and attached to the die (<NUM>), the curved component (<NUM>) having a first end and a second end and configured to receive current at one of the first end or the second end;
wherein the current sensor further comprises secondary leads (304a-304f), at least some of the secondary leads (304a-304f) attached to the die (<NUM>), at least one of the secondary leads (304a-304f) comprising a first recessed portion, wherein the curved component (<NUM>) has two primary leads (302a, 302b), each primary lead (302a, 302b) located at a respective end of the curved component (<NUM>), the curved component (<NUM>) comprising a second recessed portion (<NUM>), and
characterized in that at least one of the first recessed portion or the second recessed portion forms a locking mechanism.