Patent Description:
Finding a substring within a string is a common task in computer processing. For instance, in database queries, or in general in any text processing or parsing application, a facility to find a substring within a string may be employed. The basic approach is to check at every position for the substring. Unfortunately, this can be very inefficient, and bring a huge overhead to the process. Also, certain languages, such as C, have a concept of a zero terminating string, where a search should stop. This is generally handled with a supplementary test of the characters and a branch in the code, which results in additional processing overhead.

<CIT> describes a processor unit being used to rapidly search a string of characters including vector registers each having M vector elements, each vector element having n bits of data.

Shortcomings of the prior art are overcome and additional advantages are provided through the provision of a computer program product for facilitating processing within a computing environment according to claim <NUM>.

There is also provided a computer system according to claim <NUM>. There is also provided a computer-implemented method according to claim <NUM>.

Additional features and advantages are realized through the techniques of the present invention. Other embodiments and aspects of the invention are described in detail herein and are considered a part of the claimed invention.

One or more aspects of the present invention are particularly pointed out and distinctly claimed as examples in the claims at the conclusion of the specification. The foregoing and other objects, features, and advantages of the invention are apparent from the following detailed description taken in conjunction with the accompanying drawings in which:.

In accordance with the present invention, a capability is provided to facilitate processing within a computing environment. A single instruction (e.g., a single architected hardware machine instruction at the hardware/software interface) is provided to perform a function (also referred to as an operation) of a string search. The instruction is part of a general-purpose processor instruction set architecture (ISA), which is dispatched by a program (e.g., a user program) on the general-purpose processor. By using an ISA instruction to perform string search, execution time within a processor, such as a general-purpose processor, is reduced.

The string search instruction, when processing, searches the string specified in one operand of the instruction using the substring specified in another operand of the instruction. Based on the searching locating a first full match of the substring within the string, a full match condition indication is returned, along with position of the first full match in the string, and based on the searching locating only a partial match of the substring at a termination of the string, a partial match condition indication is returned, along with position of the partial match of the string.

The searching includes a non-zero-terminated search mode and a zero-terminated search mode, and the processing determines, based on whether a zero-search flag in a field of the instruction is set, whether the string can contain a zero termination. Based on the searching being in the zero-terminated search mode, and based on the searching reaching a zero termination within the string without a match, the searching is terminated and a no-match with zero-termination condition indication is returned, along with a search completion position of n, where n is a length of the string in bytes.

One embodiment of a computing environment to incorporate and use one or more aspects of the present invention is described with reference to <FIG>. The computing environment <NUM> includes a processor <NUM> (e.g., a central processing unit), a memory <NUM> (e.g., main memory; a. , system memory, main storage, central storage, storage), and one or more input/output (I/O) devices and/or interfaces <NUM> coupled to one another via, for example, one or more buses <NUM> and/or other connections.

In one example, processor <NUM> is based on the z/Architecture® hardware architecture offered by International Business Machines Corporation, Armonk, New York, and is part of a server, such as an IBM Z® server, which is also offered by International Business Machines Corporation and implements the z/Architecture hardware architecture. One embodiment of the z/Architecture hardware architecture is described in a publication entitled, "<NPL>, which is hereby incorporated herein by reference in its entirety. The z/Architecture hardware architecture, however, is only one example architecture; other architectures and/or other types of computing environments may include and/or use one or more aspects of the present invention. In one example, the processor executes an operating system, such as the z/OS® operating system, also offered by International Business Machines Corporation.

Processor <NUM> includes a plurality of functional components used to execute instructions. As depicted in <FIG>, these functional components include, for instance, an instruction fetch component <NUM> to fetch instructions to be executed; an instruction decode unit <NUM> to decode the fetched instructions and to obtain operands of the decoded instructions; an instruction execute component <NUM> to execute the decoded instructions; a memory access component <NUM> to access memory for instruction execution, if necessary; and a write back component <NUM> to provide the results of the executed instructions. One or more of these components may, in accordance with one or more aspects of the present invention, include at least a portion of or have access to one or more other components used in string search processing, as described herein. The one or more other components include, for instance, search string component <NUM>.

Another example of a computing environment to incorporate and use one or more aspects of the present invention is described with reference to <FIG>. In one example, the computing environment is based on the z/Architecture hardware architecture; however, the computing environment may be based on other architectures offered by International Business Machines Corporation or others.

Referring to <FIG>, in one example, the computing environment includes a central electronics complex (CEC) <NUM>. CEC <NUM> includes a plurality of components, such as, for instance, a memory <NUM> (a. , system memory, main memory, main storage, central storage, storage) coupled to one or more processors (a. , central processing units (CPUs)) <NUM>, and to an input/output subsystem <NUM>.

Memory <NUM> includes, for example, one or more logical partitions <NUM>, a hypervisor <NUM> that manages the logical partitions, and processor firmware <NUM>. One example of hypervisor <NUM> is the Processor Resource/System Manager (PR/SM™) hypervisor, offered by International Business Machines Corporation, Armonk, New York. As used herein, firmware includes, e.g., the microcode of the processor. It includes, for instance, the hardware-level instructions and/or data structures used in implementation of higher level machine code. In one embodiment, it includes, for instance, proprietary code that is typically delivered as microcode that includes trusted software or microcode specific to the underlying hardware and controls operating system access to the system hardware.

Each logical partition <NUM> is capable of functioning as a separate system. That is, each logical partition can be independently reset, run a guest operating system <NUM> such as the z/OS operating system, or another operating system, and operate with different programs <NUM>. An operating system or application program running in a logical partition appears to have access to a full and complete system, but in reality, only a portion of it is available.

Memory <NUM> is coupled to processors (e.g., CPUs) <NUM>, which are physical processor resources that may be allocated to the logical partitions. For instance, a logical partition <NUM> includes one or more logical processors, each of which represents all or a share of a physical processor resource <NUM> that may be dynamically allocated to the logical partition. In one example, processor <NUM> includes search string component <NUM> to perform search processing, as described herein.

Further, memory <NUM> is coupled to I/O subsystem <NUM>. I/O subsystem <NUM> may be a part of the central electronics complex or separate therefrom. It directs the flow of information between main storage <NUM> and input/output control units <NUM> and input/output (I/O) devices <NUM> coupled to the central electronics complex.

Many types of I/O devices may be used. One particular type is a data storage device <NUM>. Data storage device <NUM> may store one or more programs <NUM>, one or more computer readable program instructions <NUM>, and/or data, etc. The computer readable program instructions may be configured to carry out functions of embodiments of aspects of the invention.

Computer readable program instructions configured to carry out functions of embodiments of aspects of the invention may also or alternatively be included in memory <NUM>. Many variations are possible.

Central electronics complex <NUM> can include and/or be coupled to removable/non-removable, volatile/non-volatile computer system storage media. For example, it may include and/or be coupled to a non-removable, non-volatile magnetic media (typically called a "hard drive"), a magnetic disk drive for reading from and writing to a removable, non-volatile magnetic disk (e.g., a "floppy disk"), and/or an optical disk drive for reading from or writing to a removable, non-volatile optical disk, such as a CD-ROM, DVD-ROM or other optical media. It should be understood that other hardware and/or software components could be used in conjunction with central electronics complex <NUM>. Examples include, but are not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data archival storage systems, etc..

Further, central electronics complex <NUM> can be operational with numerous other general purpose or special purpose computing system environments or configurations. Examples of well-known computing systems, environments, and/or configurations that may be suitable for use with central electronics complex <NUM> include, but are not limited to, personal computer (PC) systems, server computer systems, thin clients, thick clients, handheld or laptop devices, multiprocessor systems, microprocessor-based systems, set top boxes, programmable consumer electronics, network PCs, minicomputer systems, mainframe computer systems, and distributed cloud computing environments that include any of the above systems or devices, and the like.

Although various examples of computing environments are described herein, one or more aspects of the present invention may be used with many types of environments. The computing environments provided herein are only examples.

In accordance with an aspect of the present invention, a computing environment, such as computing environment <NUM> or central electronics complex (CEC) <NUM>, executes an instruction to perform a string search. The instruction is, for instance, a vector string search instruction. In one or more embodiment, this instruction is part of a vector facility. The vector facility provides, for instance, fixed size vectors ranging from one to sixteen elements. Each vector includes data which is operated on by vector operations/instructions. In one embodiment, if a vector is made up of multiple elements, then each element is processed in parallel with the other elements. Instruction completion does not occur until processing of all of the elements is complete.

Vector data appears in storage, for instance, in the same left-to-right sequence as other data formats. Bits of a data format that are numbered <NUM>-<NUM> constitute the byte in the leftmost (lowest-numbered) byte location in storage, bits <NUM>-<NUM> form the byte in the next sequential location, and so on. In a further example, the vector data may appear in storage in another sequence, such as right-to-left.

Referring to <FIG>, a Vector String Search (VSS) instruction <NUM> includes operation code fields 302a (e.g., bits <NUM>-<NUM>), 302b (e.g., bits <NUM>-<NUM>) indicating a Vector String Search operation; a first vector register field <NUM> (e.g., bits <NUM>-<NUM>) used to designate a first vector register (V<NUM>); a second vector register field <NUM> (e.g., bits <NUM>-<NUM>) used to designate a second vector register (V<NUM>); a third vector register field <NUM> (e.g., bits <NUM>-<NUM>) used to designate a third vector register (V<NUM>); a first mask field (M<NUM>) <NUM> (e.g., bits <NUM>-<NUM>); a second mask field (M6) <NUM> (e.g., bits <NUM>-<NUM>); a fourth vector register field <NUM> (e.g., bits <NUM>-<NUM>) used to designate a fourth vector register (V<NUM>); and an RXB field <NUM> (e.g., bits <NUM>-<NUM>). Each of the fields <NUM>-<NUM>, in one example, is separate and independent from the operational code field(s). Further, in one embodiment, they are separate and independent from one another; however, in other embodiments, more than one field may be combined. Further information on the use of these fields is described below.

In one example, the register extension bit or RXB, includes the most significant bit for each of the vector register designated operands. Bits for register designations not specified by the instruction are to be reserved and set to zero.

In one example, the RXB field includes four bits (e.g., bits <NUM>-<NUM>), and the bits are defined as follows:.

Each bit is set to zero or one by, for instance, the assembler depending on the register number. For instance, for registers <NUM>-<NUM>, the bit is set to <NUM>, for registers <NUM>-<NUM>, the bit is set to <NUM>, etc..

In one embodiment, each RXB bit is an extension bit for a particular location in an instruction that includes one or more vector registers. For instance, in one or more vector instructions, bit <NUM> of RXB in an extension bit for location <NUM>-<NUM>, which is assigned to e.g., V<NUM>; bit <NUM> of RXB is an extension bit for location <NUM>-<NUM>, which is assigned to e.g., V<NUM>; and so forth.

In a further embodiment, the RXB field includes additional bits, and more than one bit is used as an extension for each vector or location.

During processing of the instruction of <FIG>, the substring specified in the third operand (V<NUM>) is searched for in the string specified in the second operand (V<NUM>). The length of the substring in the third operand (V<NUM>) is dependent on the zero-search (ZS) flag in the M<NUM> field. When the ZS flag is zero (indicative of a non-zero-terminated search mode), the length in bytes is specified as an unsigned binary integer in bits <NUM>-<NUM> of the fourth operand (V<NUM>). When the ZS flag is one (indicative of a zero-terminated search mode), the length in bytes is specified by the smaller of, the unsigned binary integer in bits <NUM>-<NUM> of the fourth operand (V<NUM>), and of the number of left-most bytes of the operand that contain non-zero values within elements (from zero to <NUM>). Detailed embodiments of the non-zero-terminated process and zero-terminated process are depicted in <FIG> & <FIG>, respectively, and described below.

If the zero-search (ZS) flag in the M<NUM> field is one, and a zero element is contained in the third operand at a position less than the length specified by the fourth operand, then the position of the left-most byte of the zero element is used as the length of the substring. If the ZS flag is zero, then the length specified in the fourth operand is used. More particularly, if the zero-search flag in the M<NUM> field is <NUM>, then the substring length is determined by the smallest of the fourth operand and the number of left-most non-zero byte(s) in the substring. If the zero-search flag is zero, then the substring length is determined by the fourth operand. Note that an effect of the zero-search flag being <NUM> is that the search string (in V<NUM>) is "virtually" shortened from its full length to the number of left-most non-zero byte(s) in the search string, as explained herein.

A first intermediate result is computed at the left-most byte position in the second operand where the elements, left-to-right, of the substring are matching the elements in the second operand for the length of the substring. If such a position exists, then a full match exists. Otherwise, the longest partial string, left-to-right, of the substring matching the right-most elements of the second operand is computed as the intermediate result. If such a match is found, it is called a partial match. Otherwise, there is no-match, and the intermediate position result is n, where n is a length of the string in bytes (e.g., <NUM> in the example below).

If the zero-search (ZS) flag in the M<NUM> field is one, and the index of the first substring matching position is greater than the position of the left-most byte of the left-most zero element in the second operand, then the match is ignored. If a non-ignored match is found, then the starting position in bytes of the match in the second operand is stored in, for instance, byte element seven of the first operand (V<NUM>), or else a value of <NUM> is stored. All other bytes of the first operand can be set to zero. Byte element <NUM> of the fourth operand (V<NUM>) specifies the length of the substring in bytes, and is in the range of <NUM>-<NUM>, in one or more embodiments.

The M<NUM> field specifies the size of the elements in the vector register operands. If a reserved value is specified, a specification exception is recognized. By way of example, M<NUM> could include a value zero, indicative of a <NUM>-byte element size, a value <NUM>, indicative of a <NUM>-byte element size (half-word), or a value <NUM>, indicative of a <NUM>-byte element size (word). If the M<NUM> field specifies a half-word or word element size, and the length of the substring in bytes is not a multiple of this element size, then processing ends, or is adjusted to a proper element size multiple.

In one or more embodiments, the M<NUM> field can be a <NUM>-bit field with bits <NUM>, <NUM>, and <NUM> reserved, and with bit <NUM> indicating a zero-terminated-search. If bit <NUM> is <NUM>, then the position of the left-most <NUM> byte element marks the string length, that is, where the string includes a zero termination.

By way of further example, <FIG> depicts one embodiment of instruction processing in a non-zero-terminated search mode, in accordance with one or more aspects of the present invention. In the examples of <FIG> & <FIG>, Vx[y] denotes the y-th byte element of the x-th operand, V[i:k] denotes the concatenated bytes i through k of operand V, and M5 denotes the value of the M<NUM> field. The substring length is read via, for instance, the fourth vector register field, and the variable k is initialized to zero (substr_len = V4[<NUM>]; k = <NUM>) <NUM>. The value of the first mask field (M<NUM>) is obtained, and processing determines whether the value is zero, indicative of a <NUM>-byte element size (M5 = <NUM>?) <NUM>. If "yes", then the number of bytes per element (or character) is saved to a char_size variable (char_size = <NUM>) <NUM>. Assuming that M<NUM> does not contain a zero value, then processing determines whether it contains a <NUM> value (M5 = <NUM>?) <NUM>. If "yes", then the M<NUM> field is indicative of a <NUM>-byte element size (half-word), and the char_size is set to <NUM> (char_size = <NUM>) <NUM>. Otherwise, processing determines whether the M<NUM> field specifies a value <NUM> (M5 = <NUM>?) <NUM>, indicative of a <NUM>-byte element size (word), and if so, char_size is set to <NUM> (char_size = <NUM>) <NUM>. In one or more implementations, based on the M<NUM> field specifying a value other than <NUM>, <NUM> or <NUM>, an exception (spec excpt) <NUM> has occurred, and the search is handled by another approach than specified herein.

In one or more implementations, processing determines whether the substring length equals zero (substr_len = <NUM>?) <NUM>. If so, then a special case is identified, where the search and match were determined using, for instance, a higher language process. Based on this indication, a full match condition indication (CC2 (full match)) <NUM> is returned.

Assuming that the substring length is greater than zero, processing determines whether the substring length is a multiple of the character size (substr_len % char_size = <NUM>?) <NUM>, where % denotes the remainder of "substr_len" divided by "char_size". If there is a remainder, meaning that the substring length is not an integer multiple of the character size, then processing ends (end) <NUM>, as a non-deterministic result is obtained.

Assuming that the substring length is a multiple of the element (or character) size, then a loop is entered testing the elements in the string to determine whether there is a match. Specifically, processing determines whether the variable k equals the total number of bytes in the string, with <NUM> being noted by way of example only (k = <NUM>?) <NUM>. From the current position k in the string, the substring length is added and processing determines whether the combination is less than <NUM> (k + substr_len <= <NUM>?) <NUM>. If "yes", then a search is made for the full length of the substring into the string (V2[k:k + substr_len-<NUM>] = V3[<NUM>:substr_len-<NUM>]?) <NUM>, where V2[k:k + substr_len-<NUM>] denotes the concatenated bytes k through substr_len-<NUM> of the string being compared against the substring specified in the third operand V3. If "yes", meaning that the substring matches the particular bytes in the string, then a full match condition indication is returned with position of the first full match in the string (V1[<NUM>:<NUM>; <NUM>:<NUM>] = zeros; V1[<NUM>] = k; CC2 (full match)) <NUM>, where (as noted) the full match condition indication can refer to, in one or more embodiments, a condition code <NUM> (CC2), and the first vector register is set with zeros, with byte <NUM> (in one example only) being set equal to k, to designate position of the first full match in the string.

Assuming that there is no match from inquiry <NUM>, then processing increments the variable k with the element size (char_size) determined previously (k = k + char_size) <NUM>. This results in a stepwise walking through the string based on element size.

Should k reach the end of the string, <NUM> in this example, without a match, then from inquiry (k = <NUM>?) <NUM>, a no-match condition indication is returned, along with an element position of n, where n is the last byte in the string (V1[<NUM>:<NUM>; <NUM>:<NUM>] = zeros, V1[<NUM>] = <NUM>; CCO (no-match)) <NUM>. By way of example, and as noted, the no-match condition indication could be a condition code <NUM> (CC0), and the position where left off in the search could be returned (by way of example only) as byte <NUM> of the first vector V1.

From inquiry (k + substr_len <= <NUM>?) <NUM>, if the value of k + substr_len is not less than <NUM><NUM>, then the substring will not fit any more into the elements of the string being searched into, and only a partial match is possible. Processing determines whether there is a partial match with the remaining portion of the string being searched (V2[k:<NUM>] = V3[<NUM>:<NUM>-k]?) <NUM>. If "no", then processing loops back to increment k (k = k + char_size) <NUM> with the element size. If "yes", then a partial match is identified, and a partial match condition indication with position of the partial match in the string is returned (V1[<NUM>:<NUM>; <NUM>:<NUM>] = zeros; V1[<NUM>] = k; CC3 (partial match)) <NUM>. For instance, and as noted, a partial match condition code CC3 can be indicated, along with position of the partial match in the string.

<FIG> depicts one embodiment of instruction processing in a zero-terminated search mode, in accordance with one or more aspects of the present invention. In this example, the substring length is read, for instance, from the fourth vector register field, and the variables str_len, i, k, and eos are initialized to zero (substr_len = V4[<NUM>], str_len = <NUM>, i = <NUM>, k = <NUM>, eos = <NUM>) <NUM>. The value of the first mask field (M<NUM>) is obtained, and processing determines whether the value is zero, indicative of a <NUM>-byte element size (M5 = <NUM>?) <NUM>. If "yes", then the number of bytes per element (or character) is saved to a char_size variable (char_size = <NUM>) <NUM>. Assuming that M<NUM> does not contain a zero value, then processing determines whether it contains a <NUM> value (M5 = <NUM>?) <NUM>. If "yes", then the M<NUM> field is indicative of a <NUM>-byte element size (half-word), and the char_size is set to <NUM> (char_size = <NUM>) <NUM>. Otherwise, processing determines whether the M<NUM> field specifies a value <NUM> (M5 = <NUM>?) <NUM>, indicate of a <NUM>-byte element size (word), and if so, char_size is set to <NUM> (char_size = <NUM>) <NUM>. In one or more implementations, based on the M<NUM> specifying a value other than <NUM>, <NUM> or <NUM>, an exception (spec excpt) <NUM> has occurred, and the search is handled by another approach than specified herein.

In one or more implementations, processing determines whether the substring include a zero termination (i < <NUM> and V3[i:i + char_size-<NUM>] ! = <NUM>) <NUM>, where valid values for i are multiple integers of character size. The process increments until a zero character is identified or, for instance, i = <NUM> in this example (i = i + char_size) <NUM>. A determination is made whether a zero-termination with location i is found in the substring at a position less than a length of the substring (i < substr_len?) <NUM>. If "yes", then the substring length is changed to equal i (substr_len = i) <NUM>.

Assuming that the substring length is greater than zero, processing determines whether the variable k = <NUM> (in this example) (k = <NUM>?) <NUM>. Assuming "no", then processing determines whether a zero termination is found in the string (V2[k:k = char_size-<NUM>] = <NUM>?) <NUM>. If "no", then the variable k is incremented by the element size (k = k + char_size) <NUM>, and the process repeats. Assuming that a zero-termination is found in the string, then the variable eos is set (eos = <NUM>) <NUM>, and the string length variable is set to location k, where the zero termination is located (str_len = k, k = <NUM>) <NUM>.

In one or more embodiments, processing determines whether the substring length is a multiple of the character size (substr_len % char_size <NUM>?) <NUM>, where % denotes the remainder of "substr_len" divided by "char_size". If there is a remainder, meaning that the substring length is not an integer multiple of the character size, then the processing ends (end) <NUM>, as a non-deterministic result is obtained.

Assuming that the substring length is a multiple of the element (or character) size, then a loop is entered, testing the elements in the string to determine whether there is a match. Specifically, processing determines whether the variable k is less than the string length (k < str_len?) <NUM>. Assuming so, processing determines whether the variable eos equals zero, or the current position k plus the length of the substring is less than or equal to the string length (eos = <NUM> or k + substr_len <= str_len?) <NUM>. If "yes", then processing determines whether a current position k plus the substring length is less than or equal to the string length (k + substr+len <= str_len?) <NUM>. If "yes", then a search is made for the full length of the substring into the string (V2[k:k + substr_len-<NUM>] = V3[<NUM>:substr_len-<NUM>]?) <NUM>. If "yes", meaning that the substring matches the particular bytes in the string, then a full match condition indication is returned with position of the first full match in the string (V1[<NUM>:<NUM>; <NUM>:<NUM>] = zeros, V1[<NUM>] = k, CC2 (full match)) <NUM>. Note that the position is returned, in one example, with the first vector register being set to all zeros, except for, for instance, byte <NUM> being equal to k, to designate position or offset of the first full match in the string.

Assuming no-match from inquiry <NUM>, then processing increments the variable k with the element size (char_size) determined previously (k = k + char_size) <NUM>.

From inquiry <NUM>, should k plus the substring length being greater than the string length remaining, then processing looks for a partial match of the substring at the termination of the string (V2[k:<NUM>] = V3[<NUM>:<NUM> - k]?) <NUM>. If there is a partial match, then a partial match condition indication is returned with position of the partial match in the string (V1[<NUM>:<NUM>; <NUM>:<NUM>] = zeros, V1[<NUM>] = k, CC3 (partial match)) <NUM>.

Should k reach the end of the string (inquiry <NUM>), or from inquiry <NUM>, should the end of string variable (eos) be other than zero, and k + substr_len be greater than the string length <NUM>, then processing determines whether the end of string variable is set (eos = <NUM>?) <NUM>. If "no", then a no-match condition indication is returned, along with an element position of n, where n is a length of the string in bytes (<NUM> in this example) (V1[<NUM>:<NUM>; <NUM>:<NUM>] = zeros, V1[<NUM>] = <NUM>, CC0 (no-match)) <NUM>. Otherwise, a no-match with zero-termination condition indication is returned, along with an element position of n (V1[<NUM>:<NUM>; <NUM>:<NUM>] = zeros, V1[<NUM>] = <NUM>, CC1(no match, zero char)) <NUM>.

Further details of one embodiment of facilitating processing within a computing environment, as it relates to one or more aspects of the present invention, are described with reference to <FIG>.

Referring to <FIG>, in one embodiment an instruction to be processed is obtained, where the instruction is defined to be string search instruction to locate occurrence of a substring within a string (<NUM>). The instruction is executed on a processor of the computing environment (<NUM>), and based on executing the instruction, processing searches the string specified in one operand of the instruction using the substring specified in another operand of the instruction (<NUM>). Based on the searching locating a first full match of the substring within the string, a full match condition indication is returned, along with position of the first full match in the string (<NUM>). Based on the searching locating only a partial match of the substring at a termination of the string, a partial match condition indication with position of the partial match of the string is returned (<NUM>).

In one or more implementations, the processing further includes, based on the searching locating no match of the substring within the string, a no-match condition indication is returned, along with a search completion position indication of n, where n is a length of the string in bytes (<NUM>).

Referring to <FIG>, in one or more implementations, the processing further includes determining a mode for the searching, where the searching includes a non-zero-terminated search mode and a zero-terminated search mode, and the determining is based on whether a zero-search flag in a field of the instruction is set to indicate that the string or substring can contain a zero termination that truncates the string or substring, respectively, for the searching (<NUM>). For instance, the processing includes, based on the mode of searching being a zero-terminated search mode, determining that the string includes a zero termination, and based thereon, setting a zero-termination found indicator (<NUM>). Further, the processing can include, based on the searching reaching the zero-termination within the string without a match, terminating the string and returning, with reference to the zero-termination found indicator, a no-match with zero-termination condition indication, along with a search completion position of n, where n is a length of the string in bytes (<NUM>).

In one or more implementations, the determining can further include determining that a length of the string before the zero termination within the string is smaller than the substring length, and based thereon, determining whether a portion of the substring matches the string before the zero termination (<NUM>).

In one embodiment, the searching can proceed, based on a length of the substring being a multiple of a size of elements within the string, where the size is determined from the field of the instruction (<NUM>). Further, the searching can be based, in part, on the size of the elements within the string, with the searching including an element-based stepping through the string, where the size can be <NUM> byte, <NUM> bytes, or <NUM> bytes (<NUM>).

In one or more embodiments, the string search instruction is an architected hardware machine instructions of an instruction set architecture (<NUM>). For instance, the architected hardware machine instruction can be a vector string search instruction (<NUM>).

Other variations and embodiments are possible.

Aspects of the present invention may be used by many types of computing environments. Another embodiment of a computing environment to incorporate and use one or more aspects of the present invention is described with reference to <FIG>. In this example, a computing environment <NUM> includes, for instance, a native central processing unit (CPU) <NUM>, a memory <NUM>, and one or more input/output devices and/or interfaces <NUM> coupled to one another via, for example, one or more buses <NUM> and/or other connections. As examples, computing environment <NUM> may include a PowerPC® processor offered by International Business Machines Corporation, Armonk, New York; an HP Superdome with Intel Itanium II processors offered by Hewlett Packard Co. , Palo Alto, California; and/or other machines based on architectures offered by International Business Machines Corporation, Hewlett Packard, Intel Corporation, Oracle, or others. IBM, z/Architecture, IBM Z, z/OS, PRISM and PowerPC are trademarks or registered trademarks of International Business Machines Corporation in at least one jurisdiction. Intel and Itanium are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.

Native central processing unit <NUM> includes one or more native registers <NUM>, such as one or more general purpose registers and/or one or more special purpose registers used during processing within the environment. These registers include information that represents the state of the environment at any particular point in time.

Moreover, native central processing unit <NUM> executes instructions and code that are stored in memory <NUM>. In one particular example, the central processing unit executes emulator code <NUM> stored in memory <NUM>. This code enables the computing environment configured in one architecture to emulate another architecture. For instance, emulator code <NUM> allows machines based on architectures other than the z/Architecture hardware architecture, such as PowerPC processors, HP Superdome servers or others, to emulate the z/Architecture hardware architecture and to execute software and instructions developed based on the z/Architecture hardware architecture.

Further details relating to emulator code <NUM> are described with reference to <FIG>. Guest instructions <NUM> stored in memory <NUM> comprise software instructions (e.g., correlating to machine instructions) that were developed to be executed in an architecture other than that of native CPU <NUM>. For example, guest instructions <NUM> may have been designed to execute on a processor based on the z/Architecture hardware architecture, but instead, are being emulated on native CPU <NUM>, which may be, for example, an Intel Itanium II processor. In one example, emulator code <NUM> includes an instruction fetching routine <NUM> to obtain one or more guest instructions <NUM> from memory <NUM>, and to optionally provide local buffering for the instructions obtained. It also includes an instruction translation routine <NUM> to determine the type of guest instruction that has been obtained and to translate the guest instruction into one or more corresponding native instructions <NUM>. This translation includes, for instance, identifying the function to be performed by the guest instruction and choosing the native instruction(s) to perform that function.

Further, emulator code <NUM> includes an emulation control routine <NUM> to cause the native instructions to be executed. Emulation control routine <NUM> may cause native CPU <NUM> to execute a routine of native instructions that emulate one or more previously obtained guest instructions and, at the conclusion of such execution, return control to the instruction fetch routine to emulate the obtaining of the next guest instruction or a group of guest instructions. Execution of the native instructions <NUM> may include loading data into a register from memory <NUM>; storing data back to memory from a register; or performing some type of arithmetic or logic operation, as determined by the translation routine.

Each routine is, for instance, implemented in software, which is stored in memory and executed by native central processing unit <NUM>. In other examples, one or more of the routines or operations are implemented in firmware, hardware, software or some combination thereof. The registers of the emulated processor may be emulated using registers <NUM> of the native CPU or by using locations in memory <NUM>. In embodiments, guest instructions <NUM>, native instructions <NUM> and emulator code <NUM> may reside in the same memory or may be disbursed among different memory devices.

The computing environments described above are only examples of computing environments that can be used. Other environments, including but not limited to, non-partitioned environments, partitioned environments, and/or emulated environments, may be used; embodiments are not limited to any one environment.

Each computing environment is capable of being configured to include one or more aspects of the present invention. For instance, each may be configured to provide overflow processing, in accordance with one or more aspects of the present invention.

One or more aspects may relate to cloud computing.

On-demand self-service: a cloud consumer can unilaterally provision computing capabilities, such as server time and network storage, as needed automatically without requiring human interaction with the service's provider.

Measured service: cloud systems automatically control and optimize resource use by leveraging a metering capability at some level of abstraction appropriate to the type of service (e.g., storage, processing, bandwidth, and active user accounts). Resource usage can be monitored, controlled, and reported, providing transparency for both the provider and consumer of the utilized service.

Software as a Service (SaaS): the capability provided to the consumer is to use the provider's applications running on a cloud infrastructure. The applications are accessible from various client devices through a thin client interface such as a web browser (e.g., web-based email).

Infrastructure as a Service (laaS): the capability provided to the consumer is to provision processing, storage, networks, and other fundamental computing resources where the consumer is able to deploy and run arbitrary software, which can include operating systems and applications. The consumer does not manage or control the underlying cloud infrastructure but has control over operating systems, storage, deployed applications, and possibly limited control of select networking components (e.g., host firewalls).

Private cloud: the cloud infrastructure is operated solely for an organization. It may be managed by the organization or a third party and may exist on-premises or off-premises.

Workloads layer <NUM> provides examples of functionality for which the cloud computing environment may be utilized. Examples of workloads and functions which may be provided from this layer include: mapping and navigation <NUM>; software development and lifecycle management <NUM>; virtual classroom education delivery <NUM>; data analytics processing <NUM>; transaction processing <NUM>; and string search processing <NUM>.

Aspects of the present invention may be a system, a method, and/or a computer program product at any possible technical detail level of integration.

In addition to the above, one or more aspects may be provided, offered, deployed, managed, serviced, etc. by a service provider who offers management of customer environments. For instance, the service provider can create, maintain, support, etc. computer code and/or a computer infrastructure that performs one or more aspects for one or more customers. In return, the service provider may receive payment from the customer under a subscription and/or fee agreement, as examples. Additionally, or alternatively, the service provider may receive payment from the sale of advertising content to one or more third parties.

In one aspect, an application may be deployed for performing one or more embodiments. As one example, the deploying of an application comprises providing computer infrastructure operable to perform one or more embodiments.

As a further aspect, a computing infrastructure may be deployed comprising integrating computer readable code into a computing system, in which the code in combination with the computing system is capable of performing one or more embodiments.

As yet a further aspect, a process for integrating computing infrastructure comprising integrating computer readable code into a computer system may be provided. The computer system comprises a computer readable medium, in which the computer medium comprises one or more embodiments. The code in combination with the computer system is capable of performing one or more embodiments.

Although various embodiments are described above, these are only examples. For example, computing environments of other architectures can be used to incorporate and use one or more embodiments. Further, different instructions or operations may be used. Additionally, different types of indicators may be specified. Many variations are possible.

Further, other types of computing environments can benefit and be used. As an example, a data processing system suitable for storing and/or executing program code is usable that includes at least two processors coupled directly or indirectly to memory elements through a system bus. The memory elements include, for instance, local memory employed during actual execution of the program code, bulk storage, and cache memory which provide temporary storage of at least some program code in order to reduce the number of times code must be retrieved from bulk storage during execution.

Input/Output or I/O devices (including, but not limited to, keyboards, displays, pointing devices, DASD, tape, CDs, DVDs, thumb drives and other memory media, etc.) can be coupled to the system either directly or through intervening I/O controllers. Network adapters may also be coupled to the system to enable the data processing system to become coupled to other data processing systems or remote printers or storage devices through intervening private or public networks. Modems, cable modems, and Ethernet cards are just a few of the available types of network adapters.

It will be further understood that the terms "comprises" and/or "comprising", when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and/or groups thereof.

Claim 1:
A computer program product for facilitating processing within a computing environment, the computer program product comprising:
a computer-readable storage medium readable by a processing circuit and storing instructions for performing a method comprising:
obtaining an instruction to be processed, the instruction defined to be a string search instruction to locate occurrence of a substring within a string;
processing the instruction, the processing comprising:
searching the string specified in one operand of the instruction using the substring specified in another operand of the instruction;
based on the searching locating a first full match of the substring within the string, returning a full match condition indication with position of the first full match in the string; and
based on the searching locating only a partial match of the substring at a termination of the string, returning a partial match condition indication with position of the partial match in the string wherein the processing further comprises determining a mode for the searching, the searching including a non-zero-terminated search mode and a zero-terminated search mode, and the determining being based on whether a zero-search flag in a field of the instruction is set to indicate that the string or substring can contain a zero termination that truncates the string or substring, respectively, for the searching; and
wherein the processing further comprises:
based on the mode for the searching being the zero-terminated search mode, determining that the string includes the zero termination, and based thereon, setting a zero-termination found indicator; and
based on the searching reaching the zero termination within the string without a match, terminating the searching and returning, with reference to the zero-termination found indicator, a no-match with zero termination condition indication, with a search completion position of n, n being a length of the string in bytes, and
wherein in the zero-termination search mode, the length of the substring is determined by the smallest of a length in bytes specified in a defined operand of the instruction and a number of left-most non-zero byte(s) in the substring, the defined operand of the instruction being distinct from the one operand and the another operand of the instruction.