Patent Description:
EEG is the commonly used abbreviation for Electro Encephalo-Gram, which is generally speaking a method of electrically monitoring brain activity of a person. Systems for monitoring EEGs have been known for many years. However with the general technological development, EEG monitoring systems, which may be carried or worn continuously by a person to be monitored, have been devised.

It is known to measure EEG by placing electrodes on the scalp of a person, and to record and analyse the EEG signal for various diagnostic purposes.

A system for such a use is known from <CIT>, which describes measurement of brain waves by use of electrodes placed in connection with at least one of the ears of the subject, i.e. placed on an outer ear part or placed in the ear canal. The measurements are used particularly for detecting the onset of an epileptic seizure. <CIT> also describes the use of electrodes in pairs as detection and reference electrodes respectively, such a setup being well known in the field of electroencephalography.

<CIT> discloses an ear-worn EEG monitoring device with electrodes, acquisition circuitry, and an RF module is designed to be worn on one or both ears.

<CIT> discloses a cradiac rhythm management apparatus, that consists of a proximal housing, a distal housing, and a lead. The proximal housing houses a first energy storage device, while the distal module, which is implanted within the patient's heart, contains a second energy storage device, at least one electrode, and a control module.

<CIT> describes a wireless apparatus and method for measuring and monitoring bioelectric signal patterns related to EEG, EOG, and EMG readings. The device includes three bioelectric sensing electrodes, with at least one electrode designed for secure placement within the ear canal.

<CIT> introduces a biopotential measurement system that employs active, digital electrodes to acquire signals like Electroencephalograms (EEG), Electrocardiograms (ECG), and Electromyograms (EMG).

EEG monitors may also be applied for surveillance of persons having diabetes, where blood sugar levels are monitored in order to warn against hypoglycaemic attacks caused by low blood sugar levels. Hypoglycaemic attacks may lead to unconsciousness and even death. A system for such surveillance of an eminent hypoglycaemic attack is disclosed in <CIT>. This is, however, an implanted subcutaneous system.

<CIT> describes an ear plug for measuring EEG-signals. The ear plug comprises an exterior shell with electrodes, the shell being made of a soft, compressible material. The signals obtained with the ear plug are transmitted to external units for processing and monitoring.

Typically, a personal EEG monitor will be made in two parts as mentioned above. a base part with signal processing means and an electrode part with at least two electrodes for measuring the EEG signal of a person. Preferably the electrode part will be made as small as possible, such that it is easily attached to the skin surface on the head of the person. The base part often comprises the power supply means, and is therefore larger. The base part would typically be arranged in a less visible position.

The two parts will be connected through wires. The electrodes for measuring the EEG signal are often prepared to be arranged with skin contact in the ear region of a person. The electrodes may also be capacitive.

Since the electrode part is adapted for being arranged at or in the ear or ear region of a person, it will often comprise a receiver or speaker applied for giving sound or voice messages to the user. This could be warnings about an eminent hypoglycemic seizure. But the receiver may be applied for any type of sounds.

The electrode part could also be applied for other types of transducers. Examples of such transducers in the electrode part could be a microphone for transforming sounds into electrical signals or a temperature sensor or an accelerometer. Also other transducers could be considered relevant to arrange in the electrode part. The electrical signal from such a transducer needs to be transferred to the signal processing means of the base part of the EEG monitor, normally by an extra pair of wires, for further processing, logging or transmission to a remote device.

One problem in having such a transducer, e.g. a microphone, is that the wires used for transferring the signal from the transducer to the base part will gather electromagnetic interference. The electrical signal generated in e.g. a microphone may be relatively weak, e.g. <NUM> - <NUM>µV, and therefore rather sensitive to noise.

This problem is larger when a receiver is arranged in the electrode part, since the wires supplying the receiver signal, which may be <NUM> V at peak level, will be arranged close to the wires transferring the signal from the EEG electrodes and e.g. from a transducer. Therefore, it is likely that the receiver signal will induce noise into the wires carrying the EEG signal and any transducer signal.

<CIT> describes a databus which can be applied for a hearing aid between a base part and a peripheral component. This databus is described as needing transfer of power, clock and synchronization signal.

One problem is that the number of wires should be as low as possible in order to keep the total diameter of the bundle of wires connecting the two parts as small as possible. Each wire is connected both to the electrode part and to the base part, e.g. through a connector. This connection will take up some space, and will in general be a weak point in the construction, i.e. there is a risk of losing the electrical connection at this point. Furthermore the connectors typically applied are relatively expensive components. Therefore, keeping the necessary number of connections to a minimum is to be preferred.

The above problems are solved by the present invention as defined by the independent claims. An EEG monitor having a databus comprises two electrical wires adapted for transmission of signal from the EEG electrode part to the base part and further adapted for providing power supply from one part to the other part through the two electrical wires.

A databus is here understood to be a digital communication line which can be set up for communication between different units, suitable for carrying signals in one or two directions. The databus is a serial databus, and is here also understood to be able to transfer power.

A transducer is here understood as a device which can transfer a physical parameter into an electrical signal in the EEG monitor. This definition includes an electrode being able to read a voltage potential, such that the potential in some form can be transferred to the signal processing means of the EEG monitor.

The electrodes may be prepared for arrangement with skin contact, e.g. in the ear region of the person. The electrode may also be of the capacitive type where an EEG signal can be detected without a direct electrical contact to the skin.

In an embodiment of the EEG monitor not covered by the claims at least two different states of the databus are applied in different time slots, where a first state is for transfer of power and a second state is for transmission of signal from said electrode part to said base part.

In an EEG monitor according to the claimed invention, at least three different states of the databus are applied in different time slots, where a first state is for transfer of power, a second state is for transmission of signal from said base part to said electrode part, and a third state is for transmission of signal from said electrode part to said base part. A receiver or speaker, e.g. for providing sound messages to the person wearing the EEG monitor, is provided in the electrode part.

When separating the power transfer from the data transfer in time the risk of noise problems is reduced. The term different time slots refer to this separation in time of power transfer and data or signal transfer in both directions. At the same time the invention facilitates a two wire databus without the need of any further electrical wires.

In an embodiment of the EEG monitor a fourth state is added which is set to low, i.e. to "<NUM>", in order for the first state for power transfer to start with a rising edge. Such a rising edge occurring at a known place in the sequence is important in order to interpret the signal on the databus.

According to the claimed invention, the power supply is arranged in the base part and a capacitor is arranged in the electrode part, said capacitor is being charged during said first state for transfer of power, and is supplying power in periods where no power is transmitted through the databus. There will typically be more space in the base part and therefore more room for power suppply, the powerr supply being a battery.

In an embodiment of the EEG monitor the first state for transfer of power takes up at least <NUM> %, preferably at least <NUM>% of the time on the databus. This has been found to result in a sufficiently small power loss and a not too large capacitor for supplying power in the rest of the time.

A receiver is arranged in the electrode part, the receiver is connected such that it will not draw any power in the time where data is transferred on the databus, but only in the time where power is transferred. This is achieved by short-circuiting the receiver during the transfer of data. The advantage of this will be that the receiver will not need to draw power from the capacitor in the electrode part during the time where there is no transfer of power from the base part. This means that the capacitor in the electrode part can be made much smaller, since it will only need to supply power to the electronic circuit of the electrode part. A smaller capacitor will also have smaller physical dimensions, whereby the electrode part can be made smaller In further configurations useful to understand the claimed invention, there are possible variations, e.g. where the receiver draws power in smaller part of the time where data is transferred.

In an embodiment of the EEG monitor the electrode part comprises an electronic chip, i.e. integrated circuit (IC) connected with the transducer, the chip or IC being connected with the databus. The chip is a space efficient way of collecting the necessary circuits, e.g. for handling the databus communication and power transfer. One circuit is a voltage regulator for the power supply. Another circuit is an analogue to digital converter for converting an analogue signal from the EEG electrodes and any other transducer into a digital signal. This analogue to digital converter is often a sigma-delta converter.

In an embodiment of the EEG monitor a clock frequency generator is arranged in either the base part or in the electrode part of the EEG monitor, and wherein a clock frequency is regenerated, by a clock frequency regenerator, in the part of the EEG monitor without clock frequency generator. Preferably, this regenerated clock frequency is synchronized with the clock frequency of said clock frequency generator. Usually the clock frequency generator is arranged in the base part of the EEG monitor, and often the synchronization is performed by a phase-locked loop.

In an embodiment of the EEG monitor the electrode part is an ear canal plug comprising at least two electrodes on the external surface, said electrodes being arranged for having contact with the ear canal of the user in order to be able to detect electrical potentials from the person being EEG monitored.

In an embodiment of the EEG monitor the electrode part is connected with a transducer for measuring a physical or physiological parameter. Such a transducer could be adapted for measuring temperature, blood pressure, movement e.g. acceleration, orientation, i.e. is the person lying down. Preferably such transducer is connected to the electronic module of the electrode part and is prepared for transferring data to the signal processing means in said base part through the serial databus. When the electrode part is arranged as an ear plug, an appropriate transducer for detecting the correct placement of the ear plug in the ear canal could also be applied. This could be a capacitive transducer.

In a second aspect the disclosure is related to a method for communicating between two parts of an EEG monitor comprising power supply means, and comprising the following steps. <NUM>) Arranging a base part outside the ear canal of a person to wear an EEG monitor, where the base part comprises signal processing means. <NUM>) Arranging an electrode part in the ear canal of a person to be monitored, where the electrode part comprises EEG electrodes. <NUM>) Connecting the electrode part with the base part through a databus, where the databus comprises two electrical wires adapted for transmission of the signal to the receiver or speaker, and for transmission of the signal from the EEG electrodes to the base part, and the databus is adapted for providing power supply either from the base part to the electrode part, or, from the electrode part to the base part, through the two electrical wires. <NUM>) Applying two different states of the two wire databus sequentially in different time spans, where a first state is for transfer of power, a second state is for transmission of signal from the electrode part to the base part.

According to the claimed invention, at least three different states of the two wire databus are applied sequentially in different time spans, where a first state is for transfer of power, a second state is for transmission of signal from the base part to the electrode part, and a third state is for transmission of signal from the electrode part to the base part.

Embodiments of the invention will now be explained in further detail with reference to the figures.

<FIG> shows the principles of an EEG monitor where the base part <NUM>, often arranged behind the ear, comprises an electronic module <NUM>, and a battery <NUM>. The electronic module <NUM> comprises signal processing means <NUM>, a clock generator <NUM> and a controller <NUM> for controlling the communication on the data line or databus <NUM>. The base part may also comprise a microphone <NUM>, which can be applied for building hearing aid function into the EEG monitor or for adjusting the sound pressure level of any sounds from the receiver <NUM> in the electrode part <NUM> to the background acoustical noise level. Both for <FIG> and the following figures the description is focused on embodiments where a bidirectional databus is applied, and where a receiver or speaker is arranged in the electrode part.

The electrode part <NUM> of the EEG monitor comprises an electronic module <NUM> (i.e. an electronic chip or an integrated circuit) and two or more EEG electrodes <NUM>, <NUM> for measuring the EEG signal of a person to be monitored. The electrodes are connected with analogue to digital converters <NUM>. The electrode part <NUM> also comprises a receiver <NUM>.

The electronic module <NUM> of the electrode part <NUM> may comprise a digital to analogue converter <NUM> for driving the receiver <NUM>, and an analogue to digital converter <NUM> for digitizing the signal from the EEG electrodes <NUM>, <NUM> and e.g. any transducer. The digital to analogue converters may be implemented in the form of delta sigma converters, known from <CIT>. A delta sigma converter comprises a delta sigma modulator and a low pass filter. The delta sigma modulator may be arranged in the base part.

For driving the receiver an H-bridge is applied. An H-bridge is covered by the claims, described in <CIT> and is also illustrated in <FIG>.

The receiver <NUM> in the electrode part may be one single unit handling the whole frequency spectrum of interest. However, the receiver could also be composed of two separate receiver units, one for higher frequencies and one for lower frequencies.

Two electrical wires <NUM>, <NUM> or lines are connecting the base part with the electrode part in the embodiment illustrated in <FIG>. The two wires making up the databus are for both the power supply and for the digital communication. A protocol is applied for controlling when power is transmitted and when data is transmitted in either direction on the serial databus. Different types of protocols may be applied for controlling the transmission.

The databus signal may also be sent as a balanced signal on a pair of wires. This will also reduce the risk of noise influencing the databus communication. A balanced pair of wires could be twisted in order to further reduce noise influence.

Usually the battery is arranged in the base part and a voltage regulator is applied for supplying a stable voltage VDD for the electronic modules. The voltage transferred through the two wires as part of the protocol needs to charge a capacitor from which power is drawn during the data transmission on the databus. Often a local voltage regulator <NUM> in the electrode part is provided.

<FIG> shows an example with three main states A, B and C of the databus. In the first state A the battery <NUM> in the base part <NUM> is connected through the databus <NUM>, illustrated as a twisted two electrical wire connection, to the electrode part <NUM>, where the supply voltage will charge the capacitor <NUM> and power the sound output stage, i.e. the switches <NUM>, <NUM>, <NUM>, <NUM> in the H-bridge and the receiver <NUM>, e.g. through a voltage regulator. Switches (not shown) in both the base part and in the electrode part are applied for reconnecting the circuit into the B state in <FIG>. In this state the power supply to the electrode part is disconnected. Instead a transmitter <NUM> in the base part is connected through the databus <NUM> to a data receiver <NUM> in the electrode part. During the B state data is transferred from the transmitter <NUM> to the data receiver <NUM>. Typically, one bit is transferred during each B state period.

The one or more bit transferred in the B state sets the conditions for the four switches <NUM>, <NUM>, <NUM>, <NUM> in the H-bridge in the time during other states until a new bit or bits have been transferred in the next B state. The data receiver <NUM> should be connected to control logic (not shown) for controlling the switches <NUM>, <NUM>, <NUM>, <NUM> in the H-bridge. The control logic will hold the input to the switches until new data have been received. If more than one bit is transferred to the electrode part in each B state, the control logic should be set up for storing these bits and for presenting the correct bit to the input of the switches <NUM>, <NUM>, <NUM>, <NUM> at the appropriate time during the time from one B state to the next.

In an example indicated in <FIG>, bn is the level of the one bit transmitted to the data receiver <NUM> in the B state. The level bn is stored by the control logic, and when shifting from B state to the following C state the control logic will shift the input on the switches <NUM>, <NUM>, <NUM>, <NUM> from bn-<NUM> to bn. This input bn will be held until the end of the next B state where it is shifted to bn+<NUM>. The input bn-<NUM> to the switches <NUM>, <NUM>, <NUM>, <NUM> was transmitted to the data receiver <NUM> in the B state previous to the one shown in <FIG>. As illustrated in <FIG> the switches <NUM>, <NUM>, <NUM>, <NUM> in the H-bridge are switched to be open in one diagonal (e.g. <NUM> and <NUM>) and closed in the other (e.g. <NUM> and <NUM>). This will open for current through the coil of the receiver in one direction. When the diagonal where the switches <NUM>, <NUM>, <NUM>, <NUM> are open changes, the direction of the current, and thereby the movement of the membrane, also changes.

The last state shown in <FIG> is the C state following the B state when switches (not shown) in both the base part and in the electrode part are applied for reconnecting the circuit into the C state. In the C state a transmitter <NUM> in the electrode part <NUM> transmits one or more bits through the databus <NUM> to a data receiver <NUM> in the base part. These data transmitted out of the electrode part is the digitized EEG signal. Data from any further transducer will be digitized by an A/D converter <NUM> and packed for transmission in a control unit <NUM> in the electrode part.

A further D state where a low bit or a "<NUM>" is sent on the databus is often following the C state, in order to initiate the A state with a rising edge. Such a rising edge is used for synchronization between the base part and the electrode part as described below.

The capacitor <NUM> will be the power source to the receiver <NUM>, H-bridge and other power demanding circuits in the electrode part during the B, C and D states where no power, but only data, is transferred through the databus <NUM>. The voltage regulator <NUM> (see <FIG>) will ensure that the correct voltage is provided in all states. The databus <NUM> will thus face a relatively low impedance in the A state. In the B state the transmitter <NUM> will have low output impedance whereas the data receiver <NUM> will have high impedance. In the C state the transmitter <NUM> will have low output impedance whereas the data receiver <NUM> will have high input impedance.

In practice the capacitor <NUM> may be implemented as two capacitors in parallel (not shown). This would facilitate that one of these two capacitors could be applied for providing power supply to the H-bridge in the B and C state, and the other of these two capacitors could be applied for providing power supply to either the data receiver <NUM> in the B state or to the transmitter <NUM> in the C state.

According to the claimed invention the receiver <NUM> or speaker is connected such that it will not draw any power in the time where data is transferred on the databus, but only in the time where power is transferred, the four switches <NUM>, <NUM>, <NUM>, <NUM> in the H-bridge should be operated differently. The control logic controlling the switches <NUM>, <NUM>, <NUM>, <NUM> in the H-bridge, will then hold the input to the switches as described above only in the state where power is transferred, i.e. state A in the example. In the other states the receiver <NUM> is short circuited in order not to draw any power from the capacitor <NUM>. Short circuiting the receiver <NUM> may be achieved by opening switches <NUM>, <NUM> simultaneously and closing switches <NUM>, <NUM> simultaneously. It could also be opposite, i.e. closing switches <NUM>, <NUM> and opening switches <NUM>, <NUM>.

<FIG> and <FIG> shows one example on how the power supply and the communication through a two wire bidirectional serial databus <NUM> could be handled. In <FIG> pane a, a <NUM> clock frequency generated in the base part <NUM> is shown. A corresponding <NUM> clock frequency is generated in the electrode part <NUM> by application of a phase-locked loop (PLL) circuit <NUM> (see <FIG>). The PLL <NUM> regenerates the <NUM> clock frequency by application of the databus signal. The PLL continuously adjusts the synchronization between the two <NUM> clock frequencies, by application of rising edges in the data line signal. When the clock generator <NUM> is arranged in the base part, as in this example, the PLL is arranged in the electrode part. This synchronization is important for the proper functioning of the communication between the base part <NUM> and the electrode part <NUM>.

The <NUM> clock frequency is to be regarded as an example. Also other clock frequencies can be applied.

As illustrated in <FIG> pane a, the <NUM> clock cycles can be divided into four different states (see top of <FIG>) called A, B, C and D. In state A power is transferred from the base part to the electrode part. In state B data is transferred from the base part to the electrode part. This would typically be the electrical signal to the receiver for the receiver to generate the acoustic signal. In state C data is transferred from the electrode part to the base part. Such data is the digitized signal from the EEG electrodes and maybe other transducers in the electrode part. The state D is always low or "<NUM>" such that the state A will start with a rising edge. This gives a rising edge for every cycle where the rising edges have a well defined time interval. These rising edges are then applied for synchronization of the clock frequency between the base part and the electrode part. The order of the suggested states may be different. The state A could also be divided into two, or more, parts, separated by interchanging B and C states. It is also possible to add further states with other purposes in between the described states.

<FIG> pane b and c show an example on sending one bit from the base part to the electrode part, where a "<NUM>" is sent in <FIG> pane b and a "<NUM>" is sent in <FIG> pane c. In both <FIG> pane b and in <FIG> pane c a "<NUM>" is sent out of the electrode part.

<FIG> pane d and e show an example on sending one bit from the electrode part to the base part, where a "<NUM>" is sent in pane d and a "<NUM>" is sent in pane e. In both <FIG> pane d and e a "<NUM>" is sent out of the base part.

<FIG> pane f shows the resulting signal on the bidirectional databus, where the dashed lines indicate that the signal can follow one of the two possible routes, resulting in either a "<NUM>" or a "<NUM>" being sent. This resulting signal on the databus is a summation of signals from <FIG> pane b or c, and <FIG> pane d or e. In the example there will be a rising edge, indicated by an arrow in <FIG> pane f, in the databus signal for every <NUM> rising edges in the <NUM> clock frequency. This means that the signal on the databus must go low before this rising edge, which is also the case in the databus signal shown in <FIG> pane f, due to the D state. A change in the databus signal level only occurs on rising edges of the <NUM> clock frequency.

The mentioned rising edges in the data line signal, indicated with an arrow in <FIG> pane f, are applied for the PLL to synchronize the clock signals between the base part and the electrode part.

<FIG> shows signals applied in the synchronization of the clock frequency. <FIG> pane a further illustrates the counting of phases by a phase counter. A phase counter is present in both the base part and in the electrode part. The phase counter is part of a control means <NUM> of the electrode part. The two phase counters are synchronized by the PLL via rising edges on the databus. The phase counter starts on <NUM> on a rising edge of the databus signal and increments by one for each rising edge on the <NUM> clock until <NUM>. After <NUM> the phase counter starts from <NUM> again. The phase counters could also be incremented by half by identifying the falling edges on the <NUM> clock.

The phase counters are applied for identifying the states A where power is to be transferred, and the states B and C where either the base part or the electrode part is sending data out.

<FIG> pane b repeats the <NUM> clock frequency, and <FIG> pane c repeats the databus signal, both for ease of comparison in <FIG>. It is seen from <FIG> and <FIG> that the state A is active in the phase <NUM> - <NUM>, the state B is active in the phase <NUM>, the state C is active in the phase <NUM> and the state D, where a "<NUM>" is transmitted, is active in the phase <NUM>. The phase count is also applied for shifting between the different setups illustrated in <FIG> for the different states. The different phases with the different states are regarded as different time slots.

The rising edge between the state D and the state A is intended for synchronization of the clock frequency in the base part and in the electrode part. This rising edge is illustrated with arrows in <FIG> pane f and in <FIG> pane c. A different rising edge will occur between state B and C every time a "<NUM>" is sent out of the base part followed by a "<NUM>" sent out of the electrode part. In order to discriminate between these two rising edges the control unit <NUM> of the electronic module <NUM> of the electrode part <NUM> is arranged for generating a signal to be applied for this discrimination. This signal is called Trig_on and is illustrated in <FIG> pane d.

The Trig_on signal is set to "<NUM>" (or high), when the phase equals <NUM> or <NUM>. The Trig_on signal is set to "<NUM>" (or low), when the phase is from <NUM> to <NUM>. At least Trig_on should be low in phase <NUM> and <NUM>.

<FIG> shows an example of the phase locked loop (PLL) circuit <NUM> applied for synchronizing the <NUM> clock frequency between the base part and the electrode part by application of rising edges marked with arrows in <FIG> pane f and <FIG> pane c. The data line signal goes to an AND operator <NUM> together with the Trig_on signal. The output of the AND operator <NUM> will thus only go high for the rising edges of the data line signal, marked with an arrow, and not for the rising edge when a "<NUM>" is sent out of the base part followed by a "<NUM>" sent out of the electrode part (see <FIG> pane c and d). This is because the Trig_on signal is high at the data line rising edge marked with an arrow, while it is low when sending signal bits out of the base part or out of the electrode part.

The signal from the AND operator <NUM> is the reference input to the phase frequency detector (PFD) <NUM>. The other input to the PFD <NUM> is the feedback from the voltage controlled oscillator (VCO) <NUM> through a divider <NUM>. The two outputs QA and QB of the PFD <NUM> control a first switch <NUM> and a second switch <NUM> through a train of pulses. A first constant current generator <NUM> and a second constant current generator <NUM> will either charge or discharge a capacitor <NUM>, thereby determining the input voltage to the VCO <NUM>. The two current generators <NUM>, <NUM> usually generate the same current. A pulse on QA will close the first switch <NUM> connected with QA, whereby the first constant current generator <NUM> will be charging the capacitor <NUM>. A pulse on QB will close the second switch <NUM> connected with QB, whereby the second constant current generator <NUM> will be discharging the capacitor <NUM>.

When the two signals on the inputs of the PFD <NUM> are synchronized or locked, the length of the pulses QA and QB are the same and the voltage on the VCO <NUM> input remains unchanged. If the two signals on the inputs of the PFD <NUM> are out of synchronization, the pulses on one of the outputs QA and QB of the PFD <NUM> become longer than the pulses on the other output, thereby either charging or discharging the capacitor <NUM>. This will adjust the input voltage on the VCO <NUM> to a level where the output frequency of the VCO is synchronized with the databus signal.

When starting up the databus, especially in the example of the bidirectional databus, e.g. when turning on the EEG monitor, or when resetting the databus, the controller <NUM> should wait for the PLL to lock, i.e. for the two <NUM> frequencies to become synchronized. This is the case when the length of the pulses QA and QB are the same or approximately the same. When this happens, the electrode part will be waiting for a rising edge on the data line. When the controller <NUM> detects a rising edge on the data line, the phase counter is set to <NUM>. From this point in time the phase counter will continue as shown in <FIG> pane a, and as described above. In order for this start up procedure to function properly, the situation in <FIG> pane i should be avoided, i.e. a "<NUM>" from the base part followed by a "<NUM>" from the electrode part should be avoided during start up in order not to get any other rising edge which could disturb the synchronization. This means that the databus signal initially has to look like the signal in <FIG> pane g, h or j.

Resetting the databus, and subsequent application of the above start-up procedure, can be initialized if the connection at one or more lines or wires is temporarily lost. Such a temporary loss of connection can be detected by the control circuit <NUM> of the electronic module <NUM> in the electrode part. This could be done by checking the voltage over the capacitor <NUM> in the PLL <NUM> (see <FIG>). The rising edges of the databus signal stops, this voltage will fall towards zero, and when the control circuit <NUM> detects this, the electrode part should stop sending data on the databus and at the same time the above start-up procedure should be initialized. The control circuit <NUM> may also be set up for detecting any temporary loss of connection on the power supply wires.

A specific code may be applied for confirming that the clock frequencies are properly synchronized. This code, or a different code, could also be sent with specific time intervals to confirm that the communication is functioning as scheduled. If this code stops, or the time intervals are not properly followed, a reset procedure could also be initialized. Such code will need to be sent as part of the signals sent out of the base part or out of the electrode part arranged at specific times in the sequence of data signals.

In the above example of the data communication one cycle of the clock frequency is applied for sending one bit from the base part to the electrode part and one bit from the electrode part to the base part. The data communication could be arranged in many other ways. Other options within the embodiments of the invention could be to send e.g. <NUM> or <NUM> bits from the base part followed by the same, or a different, number of bits sent from the electrode part to the base part. The advantage of only sending one bit at a time is that the capacitor needed in the electrode part for holding the supply voltage can be relatively smaller since the time in which the supply voltage needs to be held, without the capacitor receiving extra charge, will be relatively shorter. The number of bits sent in each of the two directions does not have to be the same. This could depend on the needs of the databus and the one or more transducers in the electrode part.

Also the clock frequency will influence the necessary size of the capacitor. With a <NUM> clock frequency power will be transferred in the fraction <NUM>/<NUM> of time according to the example above where data is sent out of the base part at <NUM> Mbit/s and data is sent out of the electrode part at <NUM> Mbit/s. This means that the capacitor <NUM> only needs to hold the supply voltage in <NUM>/<NUM> of a microsecond. If the clock frequency was <NUM> and the demands for data transfer were the same, the capacitor would need to hold the supply voltage for <NUM>/<NUM> of a microsecond. At the same time power would only be transferred in the fraction <NUM>/<NUM> of time. This means that the capacitor should be larger and that the current running through the databus while transferring power would need to be higher in order to supply the necessary charge.

A higher current during the power supply period, i.e. state A, will lead to a higher power loss compared to the power loss of a lower current.

When the time fraction where no power is transferred is increased, the size of the capacitor <NUM> needs to be increased, in order for the capacitor to hold enough charge to be able to supply power in the time without power supply. Larger capacity also means physical larger dimensions of the capacitor. Due to the need for a small electrode part, a small capacitor, and thereby a relatively high clock frequency will often be preferred.

A higher frequency will, however, also lead to a higher dynamic efficiency loss in the p-n junctions of the control circuit. This power loss is caused by charging the capacitive load of logic gates. For the databus alone the actual frequency causing this power loss is lower than the clock frequency, since the databus will be on the same level during the cycles of the A state. The number of shifts between "<NUM>" and "<NUM>" will therefore often be considerably lower than the controlling clock frequency, i.e. <NUM> in the example. Thereby, the dynamic efficiency loss is also reduced.

<NUM> Mbit/s should be sufficient for supplying the receiver <NUM> with an electrical sound signal of the necessary quality. For electrodes <NUM>, <NUM> in the electrode part <NUM> the signal is digitized by A/D converters <NUM> and this may result in a signal of less than around <NUM> Mbit/s. The EEG signals, there may be several from different electrodes, will usually be pre-processed in the electrode part and thereby reduced to approximately <NUM> kbit/s or less. Signals from other transducers in the electrode part will also be pre-processed and transferred as part of this signal. A signal at this rate can easily be transmitted through the databus of the above example. The preprocessing is a decimation of the signal by a reduction of the sampling frequency and a low pas filtering, whereby high frequency quantification noise is removed.

Since the receiver <NUM> or speaker is connected such that it will not draw any power in the time where data is transferred on the databus, but only in the time where power is transferred, the maximum acoustic output effect from the receiver <NUM> will be reduced slightly. In the example with a <NUM> clock frequency where power is transferred in the fraction <NUM>/<NUM> of the time the reduction in maximum acoustic output effect from the receiver <NUM> will be <NUM>/<NUM> or approximately <NUM> dB. When adding further transducers to the electrode part, where data needs to be transferred through the databus to the base part, further bandwidth of the databus is necessary. Depending on the type of these transducers the amount of data to transfer may vary significantly. If the transducer is a thermometer or an accelerometer for detection of movements, the necessary amount of data for transfer may be relatively limited, whereas when the transducer is a microphone more data needs to be transferred.

When a number of transducers are comprised in or connected with the electrode part, the data from these may be collected by the electronic module <NUM> of the electrode part and packaged into a format suitable for sending via the databus together with the digitized EEG signal.

<FIG> shows an example of an EEG monitor with the base part <NUM> prepared to be arranged behind the ear with the electrode part <NUM> prepared to be arranged in the ear canal of the person who needs to have the EEG signal monitored. The base part and the electrode part are connected by two electrical wires <NUM>. The electrode part <NUM> is here illustrated as having two electrodes <NUM>, <NUM>, but will often have more electrodes e.g. three, four or five. With a higher number of electrodes it may be possible to select the EEG signal from the electrodes having the best contact or for other reasons receiving the best EEG signal. Also differences in the EEG signal between different sets of electrodes may be applied in the analysis of the EEG signal.

The electrode part is formed as an ear plug shaped to fit the ear canal of the person who needs to wear the EEG monitor. By shaping the ear plug to the ear canal of the individual, the electrode part will be lees annoying to wear, and it is ensured that the electrodes will always be placed at the same spot in the ear canal.

The electrode part will usually be provided with a through going opening <NUM> in order for sound to pass into the ear canal without being obstructed. The speaker arranged in the ear plug may apply this opening <NUM> or a different opening for supplying sound into the inner part of the ear canal.

Claim 1:
A personal wearable EEG monitor with a battery (<NUM>), said EEG monitor (<NUM>) comprises
- a base part (<NUM>) having signal processing means,
- an electrode part (<NUM>) with at least two electrodes (<NUM>, <NUM>) for measuring an EEG signal of a person, said electrode part (<NUM>) comprises means for converting the EEG signal into a digital signal, and
- a databus (<NUM>) comprising two electrical wires for transferring data between said base part (<NUM>) and said electrode part (<NUM>) and for providing power either from the base part (<NUM>) to the electrode part (<NUM>) or from the electrode part (<NUM>) to the base part (<NUM>) through said two electrical wires,
wherein the databus (<NUM>) is configured to apply at least three different states in different time slots, where a first state is for transfer of power from the battery (<NUM>) to the electrode part (<NUM>), a second state is for transmission of signal from said base part (<NUM>) to said electrode part (<NUM>), and a third state is for transmission of signal from said electrode part (<NUM>) to said base part (<NUM>),
wherein said battery (<NUM>) is arranged in the base part (<NUM>) and a capacitor (<NUM>) is arranged in the electrode part (<NUM>), wherein said capacitor is configured to be charged during said first state for transfer of power, and is configured to supply power in the second and third state where no power is transmitted from the battery (<NUM>) through the databus (<NUM>), wherein said electrode part (<NUM>) comprises a receiver (<NUM>) for providing a sound signal to said person, wherein said receiver (<NUM>) is configured to be short-circuited during the second and third state during transmission of signal through the databus (<NUM>), wherein short-circuiting the receiver (<NUM>) is achieved by controlling four switches (<NUM>-<NUM>) of an H-bridge included in the electrode part (<NUM>), such that the receiver (<NUM>) will not draw any power in the time where data is transferred on the databus (<NUM>), but only in the time where power is transferred.