Patent Description:
A bandgap voltage reference circuit may generate a reference voltage having a small temperature dependence. <CIT>, <CIT>, and <CIT> disclose examples of temperature sensor circuits comprising a PTAT circuit and a trimmable reference voltage generator.

According to a first aspect of the present disclosure there is provided an apparatus for determining temperature comprising:.

In one or more examples, the dynamic calibration module includes a logic module to determine the predetermined number of bits to one of add or subtract from the predetermined calibration value based on the PTAT voltage.

In one or more examples, the apparatus includes predetermined calibration value modification logic configured to receive the predetermined calibration value from the memory and add or subtract the predetermined number of bits determined by the logic module.

In one or more examples, the logic module is configured to determine which of a plurality contiguous voltage ranges the PTAT voltage is within and wherein the predetermined number of bits to one of add or subtract from the predetermined calibration value is based on the determined voltage range, wherein each voltage range of the plurality contiguous voltage ranges is associated with a word defining the predetermined number of bits to one of add or subtract.

In one or more embodiments, the predetermined number of bits added to or subtracted from the predetermined calibration value by the dynamic calibration module comprise a subset of the plurality of bits of the digital word.

In one or more examples, the apparatus comprises an apparatus for determining temperature of a battery pack.

In one or more embodiments, the subset comprises the least significant bits and wherein the least significant bits of the predetermined calibration value and trim value provide for fine control of the reference voltage generated by the BGVR circuit and the most significant bits of the predetermined calibration value and trim value provide for course control of the reference voltage generated by the BGVR circuit.

Thus, the trim circuit may be configured to provide for two or more connections to the sense-resistor that are close together and thereby provide a small difference in the voltage detected at them and wherein the trim circuit is configured to selectively couple one of the first terminal and the second terminal to the two or more connections based on the least significant bits of the trim value. Likewise, the trim circuit may be configured to provide for two or more second connections to the sense-resistor that are further apart and thereby provide a larger difference in the voltage detected at them and wherein the trim circuit is configured to selectively couple one of the first terminal and the second terminal to the two or more second connections based on the most significant bits of the trim value.

In one or more embodiments, the memory is configured to store the trim value generated by the dynamic calibration module as a current trim value, and wherein based on the detection, by the dynamic calibration module, of the change in the PTAT voltage, the dynamic calibration module is configured to generate a next trim value by one of adding a least significant bit to, or subtracting a least significant bit from, the current trim value and is configured to provide the generated next trim value to the trim circuit.

In one or more embodiments, the dynamic calibration module is configured to determine a current voltage range, the current voltage range comprising a voltage range of a contiguous set of voltage ranges that the PTAT voltage is within, wherein each voltage range is defined by a lower limit voltage and an upper limit voltage; and.

In one or more embodiments, the dynamic calibration module comprises:.

In one or more embodiments, the dynamic calibration module is configured to provide a start-up-routine, the start-up-routine comprising:
stepping through the contiguous set of voltage ranges by defining a candidate voltage range as different ones of the set of voltage ranges until one or both of the first comparator and second comparator are indicative of the PTAT voltage being within the candidate voltage range.

In one or more embodiments, the dynamic calibration module includes a circuit configured to generate a reference voltage across a second sense-resistor, the second sense-resistor comprising a voltage divider having a plurality of voltage tapping points that are provided to define the upper limit voltage and the lower limit voltage for each of the contiguous set of voltage ranges; and
wherein the dynamic calibration module includes a plurality of switches configured to:.

In one or more embodiments, the trim circuit comprises at least a first switch and a second switch, wherein the first switch is configured to selectively couple the first terminal to a plurality of different positions along the sense-resistor, and the second switch is configured to selectively couple the second terminal to a plurality of different positions along the sense-resistor, wherein the position to which each of the first switch and second switch selectively couple along the sense-resistor determine the resistance thereof and thereby the reference voltage provided between the first terminal and the second terminal.

In one or more embodiments, the dynamic calibration module includes a logic module configured to receive the output of at least the first comparator and the second comparator and generate a control signal to add or subtract bits from the predetermined calibration value to generate the trim value.

In one or more embodiments, the BGVR circuit comprises a first transistor, a second transistor, and a comparator, wherein.

In one or more embodiments, the PTAT circuit comprises:
the summing module and a follower arrangement comprising:.

In one or more embodiments, at least one of the voltage ranges of the set of contiguous voltage ranges differs in size in terms of the voltage range between the lower limit voltage and the upper limit voltage than one other of the voltage ranges of the set of contiguous voltage ranges.

According to a second aspect of the disclosure we provide a method of operating the apparatus of the first aspect, wherein the method comprises:.

The above discussion is not intended to represent every example embodiment or every implementation within the scope of the current or future Claim sets.

The figures and Detailed Description that follow also exemplify various example embodiments. Various example embodiments may be more completely understood in consideration of the following Detailed Description in connection with the accompanying Drawings.

A bandgap voltage reference may be used as part of a temperature measurement apparatus, as will be known to those skilled in the art. The accuracy of the bandgap voltage reference and, in particular, the degree of invariance in the voltage reference it provides, despite changes in temperature, impacts the accuracy of the measured temperature. As will be known, the output of a practical bandgap voltage reference, includes a curvature (when plotted graphically) in the voltage output with temperature. In some examples, this "curvature" results in around <NUM>. 5mV variation in the voltage reference for a 120C temperature range. For some applications this variation is much too big.

A bandgap voltage reference circuit is typically calibrated at manufacture such that it provides a predetermined "calibrated" output at a single temperature.

For example, the bandgap voltage reference circuit may be calibrated to provide the predetermined output at room temperature, such as <NUM>. In one or more examples described herein a predetermined calibration value may be stored in a memory and used to calibrate (such as by scaling or offsetting the output of the bandgap voltage reference circuit) to the predetermined output.

In one or more of the present example embodiments, an apparatus is provided that includes a memory for storing a predetermined calibration value of the bandgap voltage reference and, in particular, circuitry to provide for dynamic calibration during use in response to temperature.

<FIG> shows an example apparatus <NUM> for determining temperature. <FIG> shows a more detailed example of the apparatus <NUM> and the same reference numerals have been used to designate similar parts. The apparatus <NUM> comprises a proportional to absolute temperature, PTAT, circuit <NUM>. As will be known to those skilled in the art, a PTAT circuit provides a PTAT voltage output, at terminal <NUM> in <FIG>, that is a voltage proportional to absolute temperature.

The apparatus <NUM> further comprises a bandgap voltage reference circuit <NUM>, referred to hereinafter as BGVR circuit. The BGVR circuit <NUM> is configured to generate a voltage across a sense-resistor <NUM>. The voltage generated over the sense-resistor <NUM> requires calibration to ensure its output is at a predetermined value at a particular temperature and therefore its output over its operating range of temperatures is within a known tolerance. In some examples, the sense-resistor <NUM> may be physically modified to achieve this. However, in the present example, the reference voltage is provided between a first terminal <NUM> and a second terminal <NUM> of the BGVR circuit <NUM>, wherein the first terminal and the second terminal couple to the sense-resistor <NUM>. Thus, the first terminal <NUM> and the second terminal <NUM> couple at different locations along the length of the sense-resistor and thus act as a voltage divider and provide a reference voltage that is based on the voltage across the sense-resistor as a whole. As can be appreciated, the positions at which the first terminal <NUM> and second terminal <NUM> couple to the sense-resistor over its length may be controlled and therefore provides the calibration. The reference voltage between the first terminal <NUM> and second terminal <NUM> is thus a controlled fraction of the voltage across the whole sense-resistor <NUM>. The output of the reference voltage is provided at terminal <NUM>.

The apparatus <NUM> further comprises a calibration circuit comprising a memory <NUM>, a trim circuit <NUM> and a dynamic calibration module <NUM>.

The memory <NUM> may be configured to store a predetermined calibration value.

The predetermined calibration value may be a scaling factor, offset or instruction that calibrates the reference voltage output by the BGVR circuit <NUM>. The calibration value may be used to make the reference voltage output by the BGVR circuit <NUM> a calibrated voltage value at a particular temperature. In some examples, the effect of the calibration value is satisfactory even when the actual temperature deviates from the particular temperature. However, in other examples, the use of a single calibration value to calibrate the reference voltage output at a single temperature (or two temperatures in some examples if we consider the typical curve of a bandgap voltage reference circuit) does not provide sufficient accuracy.

In the present example, the predetermined calibration value is stored as a digital word comprising a plurality of bits for use in calibration of the bandgap voltage reference circuit <NUM>. In the present example <NUM> bits are used and thus the predetermined calibration value stored in the memory comprises a <NUM> bit word.

The trim circuit <NUM> is configured to receive a trim value based on the predetermined calibration value to control where one or both of the first terminal <NUM> and the second terminal <NUM> couple to the sense-resistor <NUM> for said calibration and the provision of the reference voltage. Thus, the trim circuit <NUM> may be configured to determine where along the sense-resistor <NUM> the first terminal <NUM> couples and thus from where the reference voltage is tapped. The trim circuit <NUM> may be configured to determine where along the sense-resistor <NUM> the second terminal <NUM> couples and thus from where the reference voltage is tapped. It will be appreciated that in some examples, both the first terminal <NUM> and the second terminal are configurable in terms of where along the sense-resistor <NUM> they couple. In other examples, only one of the first terminal <NUM> and the second terminal <NUM> are configurable.

In one or more examples, the trim circuit <NUM> comprises at least a first switch <NUM> and a second switch <NUM>, wherein the first switch <NUM> is configured to selectively couple the first terminal <NUM> to a plurality of different positions, represented by terminals <NUM>, along the sense-resistor <NUM>. The number of different terminal positions <NUM> and the spacing between them may vary between embodiments depending on the granularity of the control over the voltage reference that is required. The second switch <NUM> is configured to selectively couple the second terminal <NUM> to a plurality of different positions, represented by terminals <NUM>, along the sense-resistor <NUM>. The number of different terminal positions <NUM> and the spacing between them may vary between embodiments depending on the granularity of the control over the voltage reference that is required.

As can be appreciated, the position of the terminals <NUM>, <NUM> to which each of the first switch <NUM> and the second switch <NUM> selectively couple along the sense-resistor <NUM> determines the resistance of the portion of the sense-resistor between the selected ones of the terminals <NUM>, <NUM>. Thus, by selection of the which of the terminals <NUM>, <NUM> the first and second switches <NUM>, <NUM> couple, the reference voltage provided between the first terminal <NUM> and the second terminal <NUM> can be controlled and thereby calibrated.

The dynamic calibration module <NUM> is configured to receive the PTAT voltage from terminal <NUM>. The dynamic calibration module <NUM> is configured to receive the predetermined calibration value from the memory <NUM> and generate the trim value by making predetermined adjustments to the predetermined calibration value. Thus, the dynamic calibration module <NUM> may thus sense temperature and make dynamic adjustments to the predetermined calibration value to generate the trim value, such as in response to the temperature deviating away from the temperature at which the predetermined calibration value was set. Accordingly, the predetermined calibration value provides a first level of calibration and the dynamic calibration module <NUM> being configured to make adjustments to the predetermined calibration value to generate the trim value provides a second level of calibration, that is a function of temperature.

In the present examples, the dynamic calibration module <NUM>, based on detection of a change in temperature, as represented by a change in the PTAT voltage <NUM>, is configured to generate the trim value by one of adding or subtracting one or more bits from the predetermined calibration value and provide the generated trim value to the trim circuit <NUM>. Thus, given that the voltage reference output by a BGVR circuit <NUM> is known to follow a curve, the need to add bits or subtract bits will depend on what temperature the predetermined calibration value was configured to provide the calibrated voltage output and whether the change in temperature has the effect of increasing the voltage reference or decreasing the voltage reference. Thus, if the change in temperature has the effect of increasing the voltage reference, then the trim value may be adjusted to cause the trim circuit <NUM> to connect the first and second terminals <NUM>, <NUM> to terminals <NUM>, <NUM> that reduce the voltage reference. Likewise, if the change in temperature has the effect of decreasing the voltage reference, then the trim value may be adjusted to cause the trim circuit <NUM> to connect the first and second terminals <NUM>, <NUM> to terminals <NUM>, <NUM> that increase the voltage reference. Accordingly, in the present and one or more examples, the trim value has the effect of increasing or decreasing the resistance of the resistor (e.g. the portion of the sense-resistor <NUM>) over which the reference voltage is generated by the BGVR circuit <NUM>.

The apparatus <NUM> also includes an output, which may be considered its principal output, configured to provide a signal indicative of temperature sensed by the apparatus <NUM>. The signal indicative of temperature may be considered accurate because it is based on the PTAT voltage and the reference voltage, which is dynamically calibrated by virtue of the dynamic calibration module <NUM> making adjustments to the trim value, which cause the trim circuit <NUM> to adjust where the first and second switches <NUM>, <NUM> couple to the sense-resistor <NUM>.

Turning to the more detail of <FIG>, we will describe the BGVR circuit <NUM> and PTAT circuit <NUM>. It will be appreciated that, in the apparatus <NUM>, the BGVR circuit <NUM> and PTAT circuit <NUM> are integrated together to enable the apparatus <NUM> to provide its output. Thus, the boundaries designated between the BGVR circuit <NUM> and PTAT circuit <NUM> are not to be interpreted as strict lines of separation. In practice, it can be understood that there is one combined circuit and there will be a first combination of components therein that work together to provide the reference voltage (i.e. the output of the BGVR circuit) and there will be a second combination of the components that work together to provide the PTAT voltage (i.e. the output of the PTAT circuit), and there may or may not be overlap between the components in those first and second combinations. However, for ease of explanation, the BGVR circuit <NUM> comprises a first transistor <NUM>, a second transistor <NUM> and a comparator <NUM>. It will be appreciated that the present examples are primarily concerned with the calibration of the reference voltage output by the BGVR circuit <NUM> and therefore the BGVR circuit <NUM> itself may take different forms. As an example, only, the first transistor <NUM> comprises a Field Effect Transistor or N channel FET. The first transistor <NUM> comprises a first, drain, terminal <NUM> coupled to a voltage supply terminal <NUM>; a second, source, terminal coupled to a first terminal of the sense-resistor <NUM>; and a third, gate, terminal coupled to the output of the comparator <NUM>.

The second transistor <NUM> comprises an NPN bipolar junction transistor and comprises a first, collector, terminal <NUM> coupled to a second terminal (i.e. at the other end of) of the sense-resistor <NUM>. A second, emitter, terminal <NUM> of the second transistor <NUM> is coupled to a reference voltage terminal <NUM> that may provide a ground. A third, base, terminal <NUM> is coupled to an input <NUM> of a summing module <NUM>, which may be considered part of the PTAT circuit <NUM>.

The summing module <NUM> is configured to determine a sum of the change in the base-emitter voltage of the second transistor <NUM>. The summing module <NUM> determines a sum of a predetermined number of delta Vbe voltages. As will be familiar to those skilled in the art, the summing module <NUM> will thus provide a voltage with a positive slope (the PTAT voltage). This PTAT voltage is added with the base emitter voltage (Vbe) of second transistor <NUM> (which has a negative slope) and therefore provides a zero temperature coefficient at the output <NUM> (except for the inaccuracy due to the bandgap curve, which is addressed by the module <NUM> described below). The summing module <NUM> provides an output at output <NUM> to a first terminal <NUM> of the comparator <NUM>. In this example, the input <NUM> of the summing module <NUM> is coupled to the second terminal <NUM> (lower voltage terminal) of the BGVR circuit. Further, a second terminal <NUM> of the comparator <NUM> is coupled to both the first terminal <NUM> (higher voltage terminal) and the PTAT circuit <NUM>. Thus, the comparator <NUM> provides an output to the first transistor <NUM> based on a comparison of the output of the summing module <NUM> and the voltage at the first terminal <NUM>.

The operation of the BGVR circuit <NUM> will not be described here apart from the output of the reference voltage is controlled by the trim circuit <NUM> based on the trim value it receives at trim circuit input <NUM> from the dynamic calibration module <NUM>.

Turning to the PTAT circuit <NUM>, it includes the summing module <NUM> mentioned above and, in this example, includes a follower amplifier arrangement. It will be appreciated that the present examples are primarily concerned with the calibration of the reference voltage output by the BGVR circuit <NUM> and therefore the PTAT circuit <NUM> itself may take different forms. However, in general, the PTAT circuit <NUM> comprises the summing module <NUM> and the follower amplifier comprises a first transistor <NUM> of a differential pair having a first terminal coupled to the voltage supply terminal <NUM>, a second terminal coupled to the PTAT output <NUM> and a control terminal coupled to the comparator <NUM> of the BGVR circuit <NUM>.

The PTAT circuit <NUM> also includes a second transistor <NUM> of the differential pair having a first, collector, terminal coupled to the voltage supply terminal <NUM> and to a gate terminal of a third transistor <NUM>. The second transistor <NUM> comprises a second terminal coupled to the PTAT output <NUM> and a control, base, terminal coupled to the emitter terminal of the third transistor <NUM>. The collector terminal of the third transistor <NUM> is coupled to the voltage supply terminal <NUM>. The PTAT output <NUM> is coupled to the reference voltage terminal <NUM> via a direct current source <NUM>. The PTAT voltage is provided at the output <NUM> between the direct current source <NUM> and the second, emitter, terminals of the first and second PTAT transistors <NUM>, <NUM>. Thus, the PTAT voltage provided at output terminal <NUM> is provided by a copy of the zero temperature coefficient voltage from BGVR circuit <NUM> minus a negative slope voltage provided by the base-emitter voltage, Vbe, of the third transistor <NUM> and the second transistor <NUM>.

As mentioned, although the PTAT circuit <NUM> and BGVR circuit <NUM> are described as separate circuits it will be appreciated that the components thereof work together to provide the output of the apparatus <NUM>. Further, the dividing line between the circuits <NUM>, <NUM> provided in the figure is only an example for the ease of explanation. Considered more generally, the apparatus <NUM> has a BGVR circuit <NUM> to provide the reference voltage and a PTAT circuit <NUM> to provide a PTAT voltage and the use of those circuits and the calibration of the BGVR circuit is the focus of the one or more embodiments herein.

<FIG> shows an example "bandgap curve" <NUM> comprising how the output of the voltage reference <NUM> from the BGVR circuit varies with temperature. Accordingly, voltage is shown on the y-axis <NUM> and temperature is represented on the x-axis <NUM>. The y-axis <NUM>, in this example, shows a variation in the voltage reference of about <NUM> microvolts over the temperature range shown. The y-axis represents a temperature range of -<NUM> to <NUM>, i.e. <NUM> ± <NUM>. The predetermined calibration value may be set at <NUM> represented by point <NUM>. Accordingly, at this temperature point <NUM>, the reference voltage is the "calibrated" voltage presented at point <NUM>. It is desirable to keep the reference voltage at the "calibrated" voltage represented by point <NUM>. However, as shown by the curve <NUM>, the reference voltage will, in this example calibration, decrease either side of the temperature point <NUM>.

In one or more examples, the dynamic calibration circuit <NUM> may be configured to generate a trim value that provides a reference voltage having the voltage at "calibrated" voltage point <NUM> over a range of temperatures, such as over the entire range shown in <FIG>. Thus, as an example, at temperature <NUM>, a predetermined number of bits are added or subtracted (whichever causes an increase in the reference voltage due to the action of the trim circuit <NUM>) from the predetermined calibration value to generate the trim value. It can be seen from <FIG> that for the temperature <NUM>, the bits <NUM> are added to whatever the digital word that represents the predetermined calibration value.

Thus, the predetermined calibration value stored in the memory <NUM> may be <NUM>. The dynamic calibration module <NUM>, based on the PTAT voltage being at temperature <NUM>, may be configured to add <NUM> bits. Thus, the trim value comprises:.

By providing the dynamically generated trim value to the trim circuit <NUM>, the BGVR circuit <NUM> will output a voltage reference with a voltage shown by line <NUM> rather than a voltage <NUM> (which would be generated without the dynamic generation of the trim value and instead using the unmodified predetermined calibration value).

The one or more bits added to or subtracted from the predetermined calibration value by the dynamic calibration module <NUM> comprise a subset of the plurality of bits of the digital word. Thus, in this example, the predetermined calibration value comprises <NUM> bits and the size of the word that represents the number of bits added or subtracted comprise up to a <NUM> bit word, that is less than the number of bits of the predetermined calibration value.

In the present example, number of bits added or subtracted from the predetermined calibration value comprise the least significant bits. That is because, in this example, the least significant bits of the predetermined calibration value and trim value provide for fine control of the reference voltage generated by the BGVR circuit and the most significant bits of the predetermined calibration value and trim value provide for course control of the reference voltage generated by the BGVR circuit.

Thus, the trim circuit <NUM> may be configured such that the two or more connections <NUM> to the sense-resistor <NUM> are close together and thereby provide a small difference in the voltage detected at them. Likewise, the trim circuit may be configured such that the two or more second connections <NUM> to the sense-resistor are further apart and thereby provide a larger difference in the voltage detected at them. The trim circuit <NUM> may be configured to interpret the digital trim value such that the trim circuit is configured to selectively couple one of the first terminal <NUM> and the second terminal <NUM> to the two or more connections <NUM> based on the least significant bits of the trim value and wherein the trim circuit is configured to selectively couple the other of the first terminal <NUM> and the second terminal <NUM> to the two or more second connections <NUM> based on the most significant bits of the trim value. Thus, the least significant bits of the trim value may be configured to provide for the finest control of the reference voltage.

It will be appreciated that the connections <NUM>, <NUM> may be arranged with any pattern of spacing and the trim circuit <NUM> may be configured to interpret the trim value in different ways. However, in one or more examples, the apparatus <NUM> may be configured to make the finest adjustment to the reference voltage provided by the trim circuit <NUM> in response to changes in temperature because this will provide the greatest accuracy. In other examples, the finest accuracy may not be necessary and more course adjustments of to where the first and second electrodes <NUM>, <NUM> couple to the sense-resistor <NUM> may be made.

In the example of <FIG>, the number of bits added to or subtracted from the predetermined calibration value is determine by which of a plurality temperature ranges the current temperature lies within. Thus, the dynamic calibration module <NUM> may be configured to define a contiguous set of voltage ranges <NUM> to <NUM>. <FIG> shows many more ranges but only ranges <NUM> to <NUM> are labelled for clarity. The dynamic calibration module <NUM> thus determines which range <NUM> to <NUM> the current temperature is within based on the PTAT voltage. In the present example, if the current temperature is in range <NUM>, the bits <NUM> are added to the predetermined calibration value to generate the trim value. In the present example, if the current temperature is in range <NUM>, the bits <NUM> are added to the predetermined calibration value to generate the trim value. If the current temperature is in range <NUM>, the bits <NUM> are added; if the current temperature is in range <NUM>, the bits <NUM> are added; if the current temperature is in range <NUM>, the bits <NUM> are added; if the current temperature is in range <NUM>, the bits <NUM> are added; if the current temperature is in range <NUM>, the bits <NUM> are added; and if the current temperature is in range <NUM>, the bits <NUM> are added.

<FIG> shows a graph of the PTAT voltage <NUM> from terminal <NUM> received at the dynamic calibration module <NUM> on the y-axis <NUM> versus temperature on the x-axis. As expected, the PTAT voltage <NUM> is substantially linear with temperature. The set of ranges <NUM> illustrate the contiguous set of voltage ranges and correspond to the ranges <NUM>-<NUM> shown along the x-axis of <FIG>, although not all of them are shown in <FIG>.

Each voltage range, taking the range <NUM> as an example, is defined by a lower limit voltage <NUM> and an upper limit voltage <NUM>. When the PTAT voltage <NUM> is in a voltage range <NUM>, that is between the lower limit voltage <NUM> and the upper limit voltage <NUM>, the dynamic calibration module <NUM> is configured to add or subtract a predetermined number of bits from the predetermined calibration value to generate the trim value.

The dynamic calibration module <NUM> is configured to detect a change in the PTAT voltage <NUM>, such as the due to the temperature increasing (or decreasing in other examples) such that the PTAT voltage becomes the value <NUM>. In such an event, the dynamic calibration module <NUM> is configured to detect a change in the PTAT voltage <NUM> that results in the PTAT voltage leaving the current voltage range <NUM> by exceeding the upper limit voltage <NUM> (or falling below the lower limit voltage in other examples). The current PTAT voltage <NUM> now lies within an adjacent voltage range <NUM>. The dynamic calibration module <NUM> is now configured to add or subtract a different predetermined number of bits from the predetermined calibration value to generate the trim value. Thus, for the range <NUM>, the predetermined number of bits may comprise <NUM>, in this example. For the range <NUM>, the predetermined number of bits may comprise <NUM>, in this example. With the PTAT voltage now in range <NUM>, the lower limit voltage comprises lower limit voltage <NUM> and the upper limit voltage comprises upper limit voltage <NUM>. The dynamic calibration module <NUM> is now configured to detect the change in the PTAT voltage <NUM> by determining whether it leaves range <NUM> by exceeding the lower limit voltage <NUM> or the upper limit voltage <NUM>.

An example of the dynamic calibration module <NUM> will now be described with reference to <FIG>, to illustrate how the apparatus <NUM> may detect the PTAT voltage <NUM> leaving the current range <NUM>, <NUM>, <NUM>-<NUM> by comparing the PTAT voltage <NUM> to the current lower limit voltage and the current upper limit voltage for the current range.

Thus, the dynamic calibration module <NUM> may comprise a first comparator <NUM> and a second comparator <NUM>. It will be appreciated that other examples may utilise other means of detecting which range <NUM>, <NUM>, <NUM>-<NUM> the PTAT voltage is currently within and monitoring for changes.

The first comparator <NUM> is configured to receive the PTAT voltage from terminal <NUM> at a first terminal (in this example the inverting input terminal) and receive the upper limit voltage for the current voltage range at a second terminal (in this example the non-inverting input terminal). Thus, the first comparator <NUM> may be configured to determine if the PTAT voltage from <NUM> is outside the current voltage range by virtue of it being greater than the upper limit voltage of the current voltage range.

Likewise, the second comparator <NUM> is configured to receive the PTAT voltage from terminal <NUM> at a first terminal (in this example the inverting input terminal) and receive the lower limit voltage for the current voltage range at a second terminal (in this example the non-inverting input terminal). Thus, the second comparator <NUM> may be configured to determine if the PTAT voltage is outside the current voltage range by virtue of it being less than the lower limit voltage of the current voltage range.

The signal output by the comparators <NUM>, <NUM> is indicative of whether the PTAT voltage is more than or less than the (upper or lower) voltage limit provided to the comparator. The dynamic calibration module <NUM> may include a logic module <NUM> configured to receive the output of at least the first comparator and the second comparator and determine which range of the contiguous set of ranges the PTAT voltage is currently in and generate a corresponding control signal to add or subtract the predetermined number of bits from the predetermined calibration value to generate the trim value. The logic module <NUM> may also be configured to change the value of the upper and lower voltage limits <NUM>, <NUM> and <NUM>, <NUM> provided to the first and second comparators <NUM>, <NUM> as the temperature represented by the PTAT voltage <NUM> moves through the ranges <NUM>-<NUM>, <NUM>.

Thus, as the signal from the comparators <NUM> is triggered by a change in the temperature and therefore the PTAT voltage, the dynamic calibration module may be configured to:.

In the present example, the voltage values provided to the first and second comparators <NUM>, <NUM> as the lower limit voltage and upper limit voltage are generated by a voltage divider <NUM> having a plurality of voltage tapping points <NUM>. The dynamic calibration module includes a plurality of switches <NUM> configured to couple the first comparator <NUM> to one of the voltage tapping points <NUM> corresponding to the upper limit voltage for the current voltage range; and couple the second comparator <NUM> to a different one of the voltage tapping points <NUM> corresponding to the lower limit voltage for the current voltage range. The switches <NUM> are controlled by a control signal from the logic module <NUM>. It will be appreciated that other examples (not shown) rather than switching the upper and lower limit voltages provided to the comparators <NUM>, <NUM>, at least a pair of comparators may be provided for each of the voltage ranges <NUM>.

In the present examples, the voltage generated over the voltage divider <NUM> is provided by the copy of the reference voltage provided by the follower amplifier arrangement described above. Thus, the reference voltage output of the BGVR circuit is copied by the follower amplifier arrangement comprising transistors <NUM>, <NUM> and <NUM>, which will be familiar to those skilled in the art as a basic follower stage with a high impedance input base terminal of first transistor <NUM> and a low impedance output provided by the third, NMOS, transistor <NUM>. The voltage divider comprises a second sense-resistor having the plurality of voltage tapping points <NUM> (only two labelled for clarity) that are provided at predetermined points along the second sense resistor to define the upper limit voltages and the lower limit voltages for each of the ranges in the contiguous set of voltage ranges.

The apparatus <NUM> may be configured to operate in numerous different ways. For example, the dynamic calibration module <NUM> may be configured to make an absolute determination of which range the PTAT voltage is currently in and then provide for addition or subtraction of a predetermined number of bits corresponding to the determined range. In other examples, the dynamic calibration module <NUM> may be configured to relative changes in PTAT voltage rather than the absolute PTAT value.

Thus, in one or more examples, the memory <NUM> is configured to store the trim value generated by the dynamic calibration module <NUM> as a current trim value. That is the trim value that applies the voltage range <NUM>-<NUM>, <NUM> the PTAT voltage is currently within. Then, based on the detection, by the dynamic calibration module <NUM>, of a change in the PTAT voltage, the dynamic calibration module is configured to generate a next trim value by one of adding a least significant bit to, or subtracting a bit from, the current trim value and is configured to provide the generated next trim value to the trim circuit. Thus, as the first comparator and/or the second comparator indicate that the PTAT voltage has left the current voltage range and thereby entered an adjacent voltage range, the dynamic calibration module <NUM> may be configured to modify the previous trim value in order to generate the trim value for the said adjacent voltage range. It will be appreciated that this assumes that the difference in modification between adjacent voltage ranges is one bit. However, in other examples, this need not be the case and there may be multiple bits of different between the trim value for one range and the trim value for an adjacent voltage range.

In the example of <FIG>, the dynamic calibration module <NUM> includes a third comparator <NUM>. The third comparator <NUM> is optional and may be used to determine which side of the peak of the voltage reference "curve" <NUM> the BGVR circuit is currently on. As explained previously, the curve <NUM> shows how the voltage reference varies with temperature if it were not calibrated by the dynamic calibration module <NUM>. On the left side of the curve <NUM>, it can be seen from <FIG> that the calibration required for decreasing temperature is increasing with the decreasing temperature (i.e. more bits are added to the predetermined calibration value the further from the peak). On the right side of the curve <NUM>, it can be seen from <FIG> that the calibration required for increasing temperature is increasing with increasing temperature (i.e. more bits are added to the predetermined calibration value the further to the right from the peak). Thus, the third comparator <NUM> is configured to determine if bits need subtracting from the current trim value to generate the next trim value (such as when temperature is increasing but on the left-hand side of the curve) and determine if bits need adding to the current trim value to generate the next trim value(such as when temperature is increasing but on the righthand side of the curve <NUM>).

Thus, in this "relative change" mode of operation with the third comparator, the dynamic calibration module comprises:.

Accordingly, the logic module <NUM> of the dynamic calibration module <NUM> is configured to, if the third comparator <NUM> determines that the PTAT voltage is below the predetermined threshold, then an increase in the PTAT voltage determined by the first comparator <NUM> is configured to provide for adding of the one or more bits to the previous trim value to generate the current trim value. Further, a decrease in the PTAT voltage determined by the second comparator <NUM> is configured to provide for subtracting of the one or more bits from the previous trim value to generate the current trim value.

Thus, if the third comparator <NUM> determines that the PTAT voltage is above the predetermined threshold, then an increase in the PTAT voltage determined by the first comparator <NUM> is configured to provide for subtracting of the one or more bits from the previous trim value to generate the current trim value and a decrease in the PTAT voltage determined by the second comparator <NUM> is configured to provide for adding of the one or more bits to the previous trim value to generate the current trim value.

In summary, the closer the temperature (as indicated by the PTAT voltage) is to the peak of the bandgap curve <NUM> the smaller the modification to the predetermined calibration value to generate the trim value, assuming that the predetermined calibration value is calibrated at the temperature of said peak. Thus, if the temperature is on the left hand side of the curve <NUM>, increases in temperature may result in generation of a trim value that deviates less from the predetermined calibration value compared to the previous trim value. However, if the temperature is on the right hand side of the curve <NUM>, increases in temperature may result in generation of a trim value that deviates more from the predetermined calibration value compared to the previous trim value.

The example of <FIG> also shows trim value generation logic <NUM> or, put another way, predetermined calibration value modification logic. The logic <NUM> is configured to receive the predetermined calibration value from the memory <NUM> and add or subtract the predetermined number of bits determined by the logic module <NUM>. Thus, the logic module <NUM> may be configured to output an instruction to the logic <NUM> to cause it to one of add or subtract, to/from the predetermined calibration value, a number of bits that correspond to whichever of the ranges the PTAT voltage is determined to be within. The trim value generated by the logic <NUM> is provided to the trim circuit <NUM>.

<FIG> illustrates an example of the apparatus <NUM> in use. The x-axis <NUM> shows time. The upper part of the y-axis <NUM> represents voltage and shows the PTAT voltage <NUM> from terminal <NUM> and the changing upper limit voltages as line <NUM> and the changing lower limit voltages as line <NUM>.

The lower part of the y-axis shows the output of the first comparator <NUM> as line <NUM>, the output of the second comparator <NUM> as line <NUM> and an initialization signal as line <NUM>.

The dynamic calibration module <NUM> is configured to provide a start-up-routine to discover which of the contiguous set of voltage ranges is the current voltage range. Thus, the start-up-routine comprise stepping through the contiguous set of voltage ranges by setting the current voltage range to be different ones of the set of voltage ranges until one or both of the signals <NUM> and <NUM> are indicative of the PTAT voltage being within the current voltage range.

Thus, at time <NUM>, the line <NUM> shows the lower limit voltage being set to that of the lowest "candidate" range of the set of voltage ranges. In this "candidate" voltage range, the trim value is set to "<NUM>" as shown at <NUM>. The signals <NUM> and <NUM> are both low, which in this example indicates that the PTAT voltage <NUM> is not in the "candidate" voltage range between <NUM> and <NUM> at time <NUM>.

At time <NUM>, the logic module <NUM> has provided an initialization signal (a spike) that causes the dynamic calibration module <NUM> to step to the next "candidate" voltage range. Accordingly, at time <NUM>, the lower limit voltage <NUM> increases to that of the next "candidate" voltage range and the upper limit voltage <NUM> increases to that of the same, next "candidate" voltage range. In this next "candidate" voltage range, the trim value is set to "<NUM>" as shown at <NUM>. The signals <NUM> and <NUM> are both low, which in this example indicates that the PTAT voltage <NUM> is not in the next "candidate" voltage range either between <NUM> and <NUM> at time <NUM>.

At time <NUM>, the logic module <NUM> has provided an initialization signal (a spike) that causes the dynamic calibration module <NUM> to step to the second next "candidate" voltage range. Accordingly, at time <NUM>, the lower limit voltage <NUM> increases to that of the second next "candidate" voltage range and the upper limit voltage <NUM> increases to that of the same, second next "candidate" voltage range. In this second next "candidate" voltage range, the trim value is set to "<NUM>" as shown at <NUM>. The signal <NUM> has gone high and the signal <NUM> is low, which in this example indicates that the PTAT voltage <NUM> is within the second next "candidate" voltage range at time <NUM>. Thus, the current voltage range has been found. The dynamic calibration module <NUM> may now operate as described above by detecting subsequent changes in the PTAT voltage <NUM> relative to the upper and lower limit voltages <NUM>, <NUM> and changing the trim value accordingly. Thus, at time <NUM>, the signal <NUM> has provided an indication (i.e. the downward spike just before time <NUM>) that the PTAT voltage <NUM> has exceeded the upper limit voltage <NUM> set for time <NUM>. Thus, the current voltage range changes and trim value is changed accordingly to "<NUM>" in this example. Further, the upper limit voltage <NUM> and the lower limit voltage <NUM> are also updated for the changed current voltage range.

In one or more examples, the upper limit voltage <NUM> for a first voltage range of the set of voltage ranges is greater than the lower limit voltage <NUM> for a second voltage range of the set of voltage ranges, wherein the second voltage range is a directly adjacent the first voltage range in the set of voltage ranges. This can be seen in <FIG> by virtue of the small gap <NUM>. The provision of an offset between the upper limit voltage <NUM> and the lower limit voltage <NUM> for adjacent voltage ranges may prevent unwanted jumping back and forth between voltage ranges when the PTAT voltage <NUM> is on a border between ranges.

We also disclose a method, the method comprising operating an apparatus for determining temperature, the apparatus comprising the apparatus <NUM>: wherein the method comprises, by a dynamic calibration module,.

Claim 1:
An apparatus (<NUM>) for determining temperature comprising:
a proportional to absolute temperature, PTAT, circuit (<NUM>) configured to provide a PTAT voltage comprising a voltage proportional to absolute temperature; a sense-resistor (<NUM>);
a bandgap voltage reference circuit, BGVR circuit (<NUM>) configured to generate a voltage across the sense-resistor (<NUM>) wherein a reference voltage is provided between a first terminal (<NUM>) and a second terminal (<NUM>) of the BGVR circuit (<NUM>), wherein the first terminal (<NUM>) and the second terminal (<NUM>) couple to the sense-resistor (<NUM>);
a calibration circuit for calibrating the BGVR circuit (<NUM>), comprising:
a memory (<NUM>) configured to store a predetermined calibration value as a digital word comprising a plurality of bits for use in calibration of the bandgap voltage reference circuit (<NUM>);
a trim circuit (<NUM>) configured to receive a trim value based on the predetermined calibration value to control where one or both of the first terminal (<NUM>) and the second terminal (<NUM>) couple to the sense-resistor (<NUM>) for said calibration and the provision of the reference voltage;
a dynamic calibration module (<NUM>) configured to receive the PTAT voltage and based on detection of a change in the PTAT voltage, generate the trim value by one of adding or subtracting a predetermined number of bits from the predetermined calibration value and provide the generated trim value to the trim circuit (<NUM>);
wherein the apparatus comprises an output configured to provide a signal indicative of temperature based on the PTAT voltage and the reference voltage.