Patent Description:
Communication bus based networks that comprise a pair of wires may require a particular resistance between the wires to enable differential signalling to be effectively provided over the bus wires. <CIT> discloses a device for connecting to a two-wire communications bus and a bus station that, while utilizing the device, is able to send messages, represented on the bus lines as dominant and recessive bus levels, to additional connected bus stations and receive same from them. <CIT> discloses a ringing suppressor circuit connected to a differential signal transmission line that includes a high potential signal line and low potential signal line pair for transmitting high and low level differential signals, and includes a ringing suppressor and a stopper.

A differential bus network comprises a network in which nodes of the network are coupled by a common physical medium comprising the bus. The bus provides the medium through which the nodes can communicate. In the case of a differential bus, the bus typically comprises two conductors or wires, such as a twisted pair cable. Signalling on the bus is provided by applying a first voltage to one of the wires while applying a second voltage of typically opposite polarity to the other wire. The data is represented by the difference in voltage between wires of the bus and, accordingly, said signalling is known as differential signalling. Such a differential signal is used to avoid electromagnetic emissions to the environment. If both bus lines are carrying the same signal shapes, but with opposite polarities, the electromagnetic fields of both wires are compensating each other in an ideal way resulting in no emissions to the environment, and any interference absorbed by the wires is typically is absorbed by both wires such that the interference is cancelled out when the voltage difference between the wires is determined.

A common differential bus network comprises a controller area network (CAN) or FlexRay network. Example <FIG> shows an example CAN network. The bus is often used in automotive and industrial automation applications. The CAN bus standard is described in the ISO <NUM> standard. A CAN bus can support bit-rates rates up to 1Mb/s in case of classic CAN, and up to 5Mbps or 8Mbps in case of CAN FD (defined in ISO11898-<NUM>:<NUM>) when the network topology is correctly terminated.

<FIG> shows a CAN bus <NUM> comprising a first wire <NUM> and a second wire <NUM>. The network comprises a plurality of nodes, shown as n nodes comprising first node <NUM>, a second node <NUM>, a third node <NUM>, a n-<NUM>th node <NUM> and a nth node. Each node is coupled to both the first wire <NUM>, known as the CANH wire, and the second wire <NUM>, known as the CANL wire to provide the differential signalling to the bus and receive differential signalling from the bus.

The CAN standard requires the bus wires <NUM>, <NUM> to be terminated at each end of the bus by coupling the CANH and CANL wires <NUM>, <NUM> together via a termination resistor <NUM>, <NUM>. The terminations are shown at the first node <NUM> and the nth node <NUM>. The termination resistor typically comprises <NUM> Ohms since they represent the typical wire impedance of a twisted pair cable and, as such, are "terminating" the most distant ends of the cable with the typical impedance to avoid signal reflections. A consequence is that these two end nodes <NUM>, <NUM> are "specially equipped" nodes different to the other network nodes because they carry the <NUM> Ohms termination resistors inside.

The theoretical speed of a CAN network can only be met if the proper termination resistance (<NUM> Ohm) is present at the end-nodes <NUM>, <NUM> and the nodes without termination resistors are connected to the main cable via short stubs <NUM>,<NUM>,<NUM> that connect the node to the main length of cable of the bus <NUM>. The stubs in general need to be short to avoid long lasting reflections from open cable ends.

Example <FIG> shows an example CAN network <NUM> comprising a two wire bus (shown as a single line in this example) in a real-world implementation having nodes <NUM>-<NUM>. While in the CAN network of <FIG> the end-nodes were readily identifiable, in the example of <FIG>, the presence of numerous branches and long and short stubs make the ends less identifiable. In this example, nodes <NUM> and <NUM> are designated the terminating nodes and therefore include the termination resistors that couple the two wires of the bus together.

When any of the nodes <NUM>-<NUM> start sending data, reflections in the network <NUM> will cause signal disturbances which depend on the physical position of the sending node relative to the termination resistors at nodes <NUM>, <NUM> and the cable branches. The use of proper bus termination resistors can only avoid signal reflections in an ideal condition, which is a true point to point connection of two nodes at the bus ends or, as an approximation, a very linear bus having more nodes but with very short stubs, similar to as shown in <FIG>.

As can be appreciated from comparing <FIG>, there are many more nodes connected within real systems and there is no obvious beginning or end of an ideal cable in such a topology anymore. As such, it is questionable where to place the terminating resistors <NUM>, <NUM>, which are required according to current CAN standard.

The terminating resistors typically perform two functions. They reduce signal reflections and are used to drain the energy of the bus when there is a transition between differential signaling that creates a high potential difference between the bus wires and differential signaling that requires a lower or zero potential difference between the bus wires. The termination resistors are therefore required to drain energy out of the bus within a reasonable time to ensure the different states represented by the signaling are discernable from each other within a reasonable time before the transition to the next differential signalling bit.

Each node <NUM>-<NUM> typically comprises a transceiver and a controller. The transceiver is a device which includes a transmitter arrangement and a receiver arrangement. The transmitter arrangement typically converts a digital transmit data stream into a differential analog signal which can be transported through the bus. The receiver arrangement is configured to convert the differential analogue signal back towards a digital receive data stream. The digital transmit data is received by the transceiver from the associated controller. The digital receive data is passed to the controller by the receiver arrangement of the transceiver. The controller may include a protocol controller which implements the rules of the protocol to send and receive data between the nodes.

Example <FIG> shows an example differential bus network <NUM> in accordance with an embodiment of the disclosure. Example <FIG> shows a differential bus network <NUM> comprising a bus <NUM> having at least two bus wires <NUM>, <NUM>. In the differential bus network <NUM> of the disclosure, each of the nodes <NUM>-<NUM> in the network has a common transceiver design in terms of the presence a resistor that couples the bus wires <NUM>, <NUM> together. The use of a common transceiver design in a differential bus network may be advantageous in some examples.

As an implementation of the concept, the network <NUM> comprises at least three nodes and, in particular, n nodes <NUM>-<NUM> in this example where n≥<NUM>. Thus, the example network <NUM> comprises only said at least three nodes, such that the only nodes in the network are those that have the common transceiver design. With reference to example <FIG>, each of the at least three nodes <NUM>-<NUM> comprise a common transceiver design in terms of comprising bus terminals <NUM>, <NUM> for coupling, respectively, to the at least two wires <NUM>, <NUM> of the bus <NUM>. The transceiver of each of the nodes is further common in terms of comprising a receiver arrangement <NUM> configured to receive differential signalling from the bus terminals <NUM>, <NUM> and determine a digital receive signal based on said differential signalling. The digital receive signal may be provided to a controller (not shown) via a receive output <NUM>. The transceiver <NUM> further comprises a transmitter arrangement <NUM> configured to apply differential signalling to the bus terminals <NUM>, <NUM> based on a digital transmit signal, which may be received from a transmit input <NUM> from a controller (not shown).

the transmitter arrangement <NUM> comprises a first transmitter <NUM> configured to increase the potential difference between the at least two wires <NUM>, <NUM> of the bus to a first differential voltage state and maintain the first differential state. The transmitter arrangement further comprises a suppression element <NUM> configured to decrease the potential difference between the at least two wires <NUM>, <NUM> of the bus towards a second differential voltage state. The suppression element <NUM> may be considered to comprise a dynamic "termination" resistor because it may be configured to be selectively activated to decrease the potential difference between the wires of the bus. The transmitter arrangement <NUM> further comprises said resistor coupled between the bus terminals <NUM>, <NUM> and configured to at least maintain the second differential voltage state. The use of a suppression element <NUM> to actively drive the potential difference of the bus towards the second differential voltage state may provide for a sharper transition (i.e. transition at a greater rate) between the first differential voltage state and the second differential voltage state. The suppression element <NUM> may be switchable so that it can be activated when the signalling needs to adopt the second differential voltage state from the first differential voltage state. The resistor <NUM> may act to drain any remaining energy or other voltage disturbances from the bus wires to maintain the second differential voltage state.

Thus, in one or more examples, the resistor <NUM> coupled between the bus terminals in each of the nodes is configured to perform the function of a termination resistor at each end of the differential bus as defined by the CAN protocol in that it drains energy from the bus wires to enable the provision of the second differential voltage state from the first differential state in combination with the suppression element <NUM>. Thus, the suppression element, when activated, may be considered to promote the decrease in the voltage difference between the bus wires <NUM>, <NUM> and once the suppression element is deactivated the resistor of each transceiver will continue to act to drain any energy in the bus to maintain the second differential level. Accordingly, the differential bus network is absent a dedicated pair of nodes containing termination resistors that couple the at least two bus wires together. Accordingly, the at least two wires <NUM>, <NUM> of the bus of the differential bus network may be uncoupled except at the nodes <NUM>-<NUM> where they are coupled by the resistor <NUM>.

The provision of a CAN transceiver of such a design may, in one or more examples, obviate a system designer from having to place two termination resistors in selected nodes (i.e. those at opposite ends of the bus), which make these nodes "special nodes". In practice, the position of the special nodes may be physically located at not ideal locations from a bus cable topology point of view. This places design restrictions on the system designer.

Further, when a network (as illustrated in <FIG>) requires the so-called special nodes, it is more difficult to use a standard node design in different networks because on one network the node may need to include the termination resistors <NUM>, <NUM> but in the other network it may not. That results in node variants, which adds cost.

A broken bus wire near one of the nodes <NUM>, <NUM> could lead to a loss of one of the termination resistors <NUM>, <NUM>. This will change the bus impedance drastically and with that the overall bus communication between any of the nodes is jeopardised by just a single bus fault.

The provision of a common transceiver design which includes a resistor between the bus terminals may, in one or more examples, be advantageous.

The resistor therefore provides a resistance irrespective of the operational state of the transmitter arrangement or receiver arrangement to drain energy from the bus wires. Since the suppression element transmitter <NUM> acts like a dynamic termination resistance to suppress ringing in the bus, the passive resistor <NUM> of all nodes <NUM>-<NUM> in parallel may be allowed to be higher than the specified maximum DC bus resistance of <NUM> Ohms in the ISO <NUM>-<NUM> standard but it may be desirable that the resistance should not become lower than the specified minimum DC bus resistance of <NUM> Ohm. Accordingly, where n is the maximum number of network nodes coupled to the communication bus the value of resistor <NUM> may greater than (50Ω x n). As an example, a practical CAN network in an automotive setting assumes a maximum number of nodes of <NUM>. This would result in resistor <NUM> having a minimum resistance of <NUM>*<NUM> = <NUM> kOhms. As a further example, if the exact number of nodes, n, in the network is fixed then the resistance of resistor <NUM> may be x*n, where x is between <NUM> and <NUM>Ω and optionally <NUM>Ω.

In one or more examples, the bus <NUM> comprises a Controller Area Network, CAN, bus and wherein the transceiver <NUM> of each of said at least three nodes is configured to provide the digital receive signal to, and receive the digital transmit signal from, a CAN protocol controller <NUM> (shown in <FIG>). While the examples herein relate to a CAN bus network, in other examples, the differential bus network may comprise a FlexRay differential bus network configured to operate, at least in part, in accordance with the FlexRay protocol.

In this and other examples, the resistor <NUM> comprises a discrete resistor coupled between the bus terminals <NUM>, <NUM> downstream of the transmitter arrangement <NUM>, i.e. on the output side of the transmitter arrangement <NUM>, and upstream of the receiver arrangement <NUM>, i.e. on the input side of the receiver arrangement <NUM>. It will be appreciated that the resistor <NUM> may or may not be physically coupled to the bus terminals and may be spaced from the bus terminals that coupled to the bus wires. For example, and as shown in <FIG>, the terminal ends of the bus terminals <NUM>, <NUM> are spaced from where the resistor <NUM> couples the bus terminals together. In some examples, the resistor <NUM> may be readily removable so that its value can be changed to suit the number of nodes to be installed in the network. Accordingly, the resistor may be configured to snap into a holder in which it couples the bus terminals. In other examples, the transceiver <NUM> may include a connector to removably connect the resistor to the bus terminals <NUM>, <NUM>.

Examples <FIG> shows a timing diagram illustrating the voltage of the transmit signal over time at <NUM>. The differential bus voltage on the two bus wires over time is shown at <NUM>. The digital receive signal that may be derived from the differential signalling at <NUM> is shown at <NUM>. The dashed lines show the signals without use of the suppression element <NUM> and the solid lines show the signals with the use of the suppression element <NUM>.

During the period <NUM>, the digital transmit signal is logic high. In this example, logic high is represented by the second differential state and therefore the differential signalling at <NUM> provides a zero potential difference between the first wire and second wire of the bus, shown by the lines being together and therefore appearing as one line. The digital receive signal is shown as detecting a logic high state because the differential signal is below a threshold used by the receiver arrangement to distinguish between the first and second differential states. At period <NUM>, the digital transmit signal is logic low. In this example, logic low is represented by the first differential state and therefore the first transmitter <NUM> drives the bus wires to provide differential signalling at <NUM> that provides a non-zero potential difference between the first wire and second wire of the bus. This is shown by the lines <NUM> and <NUM> being separate illustrating the difference between the voltages on the wires. Line <NUM> shows the potential of the CANH wire and line <NUM> shows the potential of the CANL wire. The first transmitter <NUM> drives the bus wires to the first differential state relatively quickly, and the receiver arrangement shows the detection of a logic low state in trace <NUM> as soon as the threshold (or a second threshold) used by the receiver to distinguish between the first and second differential states is passed.

During the period <NUM>, the digital transmit signal is logic high and therefore the differential signalling is required to transition from the first differential state to the second differential state, which comprises a decrease in the potential difference between the wires of the bus. The suppression element <NUM> acts to actively drive the bus wires to the lower potential difference and therefore the line <NUM> shows a relatively quick change from the first differential state to the second differential state. The transmitter <NUM> (or suppression element more generally) may be considered to act like a dynamic termination resistor while driving the bus voltage to the recessive or second differential state. The digital receive signal in trace <NUM> is shown to detect that the differential signalling indicates the logic high state at time <NUM>. Dashed line <NUM> shows the change in the differential signalling from the first differential state to the second differential state when the suppression element is not used, such as in the network of <FIG>, in which the terminating resistors <NUM>, <NUM> instead provide for the draining of energy from the bus wires. It will be appreciated that it takes much longer for the potential difference between the bus wires to decrease to the second differential state and, accordingly, the receiver arrangement detects that the differential signalling indicates the logic high state at later time <NUM>. Accordingly, the use of a suppression element <NUM> and the common resistor <NUM> may provide a node that is able to communicate more effectively.

In summary, the first differential state may comprise the provision of a potential difference between the at least two bus wires shown by trace <NUM> at time <NUM>. The potential difference is greater than a threshold voltage and it therefore signals a bit of the digital transmit signal of a first logic level comprising logic low. The second differential state may comprise the provision of a smaller potential difference, which in this example is a substantially zero potential difference between the at least two bus wires. The potential difference is less than said threshold voltage and it signals a bit of a second logic level, comprising the logic high level.

Returning to <FIG>, the transmitter arrangement <NUM> may include a suppression controller <NUM> coupled with the suppression element <NUM>. The suppression controller <NUM> may be configured to activate the suppression element <NUM> (from a deactivated or low-power state) based on when the differential signalling is required to transition from the first differential state to the second differential state. In one or more examples, the suppression controller <NUM> is configured to receive the digital transmit signal by branch <NUM> and is configured to, on detection of a transition between the first logic level and the second logic level in the digital transmit signal (e.g. logic low to logic high), that requires the transition from the first differential state to the second differential state, activate the suppression element <NUM> for a predetermined time. The suppression element <NUM> may take the form of a feed forward signal improvement transceiver. It may be known how quickly the suppression element <NUM> is able to drive the bus to the second differential state and therefore activation for a predetermined period of time may provide a convenient way of applying the differential signalling to the bus. In one or more examples, at the end of the predetermined time, the suppression controller <NUM> is configured to deactivate the suppression element <NUM>, such as until the next transition between logic states in the digital transmit signal that requires the transition from the first differential state to the second differential state. The predetermined time should be less than the bit time of the logic levels and less than the time the resistor(s) <NUM> would take to drain the energy from the bus.

It will be appreciated that in other examples the disabling of the suppression element <NUM> may be based on detection of the second differential state being reached. Accordingly, a sensor (not shown) may be provided at the bus terminals to sense the potential difference between the at least two bus wires. the suppression element <NUM> is configured to decrease the potential difference between the at least two wires of the bus towards the second differential voltage state by application of a potential difference to the at least two bus wires of an opposite polarity to that applied by the first transmitter <NUM> to achieve the first differential voltage state. The transmitter arrangement <NUM> may be configured to disable the suppression element when the second differential state is reached using the sensor or predetermined time, for example. The suppression element <NUM> may comprise a further transmitter. The transmitters may be provided by arrangements of transistors, as will be known to those skilled in the art. In other examples not illustrated herein, the suppression element may comprise a further resistor that may be switched to couple the bus wires together or to be disconnected from the bus.

Accordingly, in one or more examples, the transmitter arrangement is configured to signal a transition from the second logic level to the first logic level, logic low, by activating the first transmitter <NUM> to provide the potential between the bus wires as shown at <NUM>, <NUM> and by not activating the suppression element. The first transmitter <NUM> therefore provides the differential signalling to achieve and maintain the first differential state against the effect of the resistors <NUM>, which passively drain energy from the bus. Further, in one or more examples, the transmitter arrangement is configured to signal a transition from the first logic level to the second logic level, logic high, by deactivating the first transmitter <NUM> and by activating the suppression element <NUM> for the predetermined time. The suppression element <NUM> may then be deactivated before the end of the bit time for said second logic level.

It will be appreciated that to maintain the first logic level during the next bit time the first transmitter <NUM> remains active. It will also be appreciated that to maintain the second logic level during the next bit time the first transmitter <NUM> remains deactivated and there is no need to activate the suppression element <NUM> because the second differential state is already achieved.

Example <FIG> shows a CAN node <NUM> and the same reference numerals as used in <FIG> have been used for like parts. <FIG> shows the controller <NUM> coupled to the CAN transceiver <NUM> by a first connection and a second connection that respectively couple the transmit input <NUM> and the receive output <NUM> to transfer the digital transmit signal and digital receive signal between the controller <NUM> and the transceiver <NUM>.

The controller <NUM> comprises a protocol controller <NUM> that implements the CAN-based protocol. It will be appreciated that reference to the CAN protocol may refer to the original CAN protocol or the extensions thereto, such as CAN FD (ISO11898-<NUM>:<NUM>) and the proposed CAN XL.

It will be appreciated that the network of <FIG> may be provided in an uncoupled form for installing in a device, such as an automobile or other machine. Accordingly, a kit of parts may be provided for forming a differential bus network. The kit comprises a bus comprising at least two bus wires, which may be in the form of a harness for routing around the automobile. The kit may include at least three nodes, wherein each of the at least three nodes comprise a transceiver comprising bus terminals for coupling, respectively, to the at least two wires of the bus and a receiver arrangement configured to receive differential signalling from the bus terminals and determine a digital receive signal based on said differential signalling; and a transmitter arrangement configured to apply differential signalling to the bus terminals based on a digital transmit signal, the transmitter arrangement comprising a first transmitter element configured to increase the potential difference between the at least two wires of the bus to a first differential voltage state and maintain the first differential state and a second transmitter configured to decrease the potential difference between the at least two wires of the bus towards a second differential voltage state, the transmitter arrangement further comprising a resistor coupled between the bus terminals configured to at least maintain the second differential voltage state.

The kit may further include one or more controllers <NUM> for coupling with the transceivers <NUM>.

<FIG> shows an example method of forming a differential bus network, the method comprising:.

When forming a differential bus network a preestablished protocol may be adhered to, wherein the protocol may define one or more of a physical specification of components of the differential bus network, minimum performance requirements, timing requirements, voltage level requirements, message frame format and other factors. In particular, the protocol may define a minimum impedance of the bus, and the method may include determining the resistance of the resistor of each of said at least three nodes wherein the resistor has a resistance, in Ohms, greater than the minimum impedance of the bus multiplied by one of: the number of at least three nodes or a maximum number of nodes that the bus of the network is configured to couple to. Thus, once the resistance is determined, the nodes may be configured such that the resistor has said determined resistance. It will be appreciated that as nodes are added to the bus, the resistors are connected in parallel, which reduces the overall impedance of the bus and therefore, accordingly, the network may have a limit to the number of nodes that are permitted to couple to it.

The method may further include coupling a controller <NUM> that implements the communication protocol, such as CAN or FlexRay, to one or each of the transceivers.

Claim 1:
A differential bus network (<NUM>) comprising:
a bus (<NUM>) comprising at least two bus wires (<NUM>, <NUM>);
at least three nodes (<NUM> - <NUM>), wherein each of the at least three nodes comprise:
a transceiver (<NUM>) comprising:
bus terminals (<NUM>, <NUM>) for coupling, respectively, to the at least two wires of the bus;
a receiver arrangement (<NUM>) configured to receive differential signalling from the bus terminals and determine a digital receive signal based on said differential signalling; and
a transmitter arrangement (<NUM>) configured to apply differential signalling to the bus terminals based on a digital transmit signal, the transmitter arrangement (<NUM>) comprising a first transmitter (<NUM>) configured to increase the potential difference between the at least two wires of the bus to a first differential voltage state and maintain the first differential voltage state and a suppression element (<NUM>) configured to decrease the potential difference between the at least two wires of the bus towards a second differential voltage state, the transmitter arrangement (<NUM>) further comprising a resistor (<NUM>) coupled between the bus terminals configured to at least maintain the second differential voltage state, and a suppression controller (<NUM>) coupled to the suppression element (<NUM>) configured to activate the suppression element (<NUM>) when the differential signalling is required to transition from the first differential voltage state to the second differential voltage state, wherein
the suppression element (<NUM>) is configured to decrease the potential difference between the at least two wires (<NUM>, <NUM>) of the bus (<NUM>) towards the second differential voltage state by application of a potential difference to the at least two bus wires of an opposite polarity to that applied by the first transmitter (<NUM>) to achieve the first differential voltage state, the transmitter arrangement (<NUM>) configured to disable the suppression element when the second differential voltage state is reached.