Patent Description:
The present disclosure relates to the field of circuit technology, in particular to a switch control circuit, a multiplexer switch circuit and a control method for multiplexer switch control circuit.

In an integrated circuit, the switch can be embodied as a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET), which is also called a field-effect transistor switch, and control signal thereof is the gate electrode voltage. By inputting a high level or a low level to the gate electrode of the MOSFET, the MOSFET is controlled to be turned on or off.

However, the noise of the gate electrode voltage may be coupled into the circuit where the source and drain electrodes are located, through the parasitic capacitor between the gate electrode and the source electrode of the MOSFET, thereby greatly impairing the signal-to-noise ratio. The gate electrode voltage of the switch is usually connected to the power source or reference ground, therefore, the use of the switches puts forward higher requirements for reducing power source noise.

In order to reduce the power source coupling noise, the existing general method is to use a low dropout regulator (LDO) with a high power source rejection ratio to generate the power source voltage. However, using LDO technology to reduce power source noise may introduce quiescent current and increase power consumption. For example, <CIT> discloses a flat panel display having a current control circuit.

One of the objectives of the present disclosure includes providing a switch control circuit
for reducing power source coupling noise and improving signal transmission quality.

In order to achieve the foregoing objectives, the technical solutions adopted in the embodiments of the present disclosure are as follows:
In the first aspect, an embodiment of the present disclosure provides a switch control circuit, comprising:.

In the implementation, the switch control circuit further comprises:.

In the implementation, the first end of the first control switch is configured to receive the power source signal, and the second end of the first control switch is electrically connected to the first end of the first capacitor; the second end of the first capacitor is grounded; and the gate electrode of the field-effect transistor switch is connected to the first end of the first capacitor.

In a possible implementation, the charging voltage released by the first capacitor is greater than the ON voltage drop of the field-effect transistor switch.

In the implementation, the signal processing circuit is an analog front end, and the analog front end comprises:.

In a possible implementation, the field-effect transistor switch comprises one of an NMOS switch, a PMOS switch or a CMOS switch.

In the implementation, when the first control switch is turned on and the second control switch is turned on, the signal processing circuit works in the reset state; and when the first control switch is turned off and the second control switch is turned off, the signal processing circuit works in the amplified state.

In the second aspect, an embodiment of the present disclosure also provides a multiplexer switch circuit, comprising:.

In a possible implementation, the multiplexer switch circuit further comprises:.

In a possible implementation, the signal processing circuit is an analog front end, and the analog front end comprises:.

In a possible implementation, the second control switch is connected in parallel to two ends of the sampling capacitor.

In the third aspect, an embodiment of the present disclosure also provides a control method, wherein the method is applied to the multiplexer switch circuit provided in the present disclosure, and the method comprises:.

In a possible implementation, the power source signal is a high level signal, and the method further comprises:
controlling and inputting a low level signal to the first control switch(s) to which no power source signal is input.

In a possible implementation, the multiplexer switch circuit further comprises: at least one group of the second control switch and the signal processing circuit, wherein the second control switch is connected in parallel to the signal processing circuit, and the signal processing circuit is connected to each group of switch control circuits; the method further comprises:
controlling the second control switch to be turned off, when the first control switch is turned off, wherein the analog signal transmitted by the field-effect transistor switch is processed through the signal processing circuit.

In a possible implementation, the control method further comprises:
controlling the second control switch to be turned on, when the first control switch is turned on, wherein the analog signal transmitted by the field-effect transistor switch is output through the second control switch.

In the switch control circuit, the multiplexer switch circuit and the control method for a multiplexer switch control circuit provided by the embodiments of the present disclosure, when the first control switch is turned off, the charging voltage released by the first capacitor can control the field-effect transistor switch to be turned on, at this time, because the first control switch is turned off, the power source signal cannot reach the gate electrode of the field-effect transistor switch, so the power source noise cannot be coupled into the circuit where the source and drain electrodes of the field-effect transistor switch are located, therefore, in the discharge stage of first capacitor, the discharge voltage can be used as a control signal to control the field-effect transistor switch to be turned on, thereby reducing power source coupling noise.

In order to illustrate the technical solutions of the embodiments of the present disclosure more clearly, the drawings need to be used in the embodiments of the present disclosure will be briefly introduced below.

The technical solutions in the embodiments of the present disclosure will be described below in conjunction with the drawings in the embodiments of the present disclosure.

Similar labels and letters represent similar items in the following drawings, therefore, once a certain item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. At the same time, in the description of the present disclosure, the terms "first", "second" and the like are merely used to distinguish between descriptions, and cannot be understood as indicating or implying importance in relativity.

<FIG> is a schematic view of a switch control circuit <NUM> provided by an embodiment of the present disclosure; the switch control circuit <NUM> comprises: a first control switch <NUM>, a first capacitor <NUM> and a field-effect transistor switch <NUM>.

One end of the first control switch <NUM> is connected to a signal source, wherein the signal source is configured to output the power source signal VDD to the subsequent circuit when the first control switch <NUM> is turned on. The first control switch <NUM> is configured to receive the power source signal, and control the ON-OFF state of the power source signal; the first end of first capacitor <NUM> is connected to the first end of the first control switch <NUM>, the second end of the first capacitor <NUM> is grounded, the first capacitor <NUM> is configured to receive the power source signal VDD for charging, when the first control switch <NUM> is turned on, and the first capacitor <NUM> is also configured to release electrical energy when the first control switch <NUM> is turned off, the gate electrode of the field-effect transistor switch <NUM> is connected to the first end of the first capacitor <NUM>, optionally, the charging voltage released when the first capacitor <NUM> is discharged is greater than the ON voltage drop of the field-effect transistor switch <NUM>, and when the first capacitor <NUM> is discharged, the field-effect transistor switch <NUM> controls the field-effect transistor switch <NUM> to be turned on by the charging voltage released by the first capacitor <NUM>.

In a possible implementation, the field-effect transistor switch <NUM> and the first control switch <NUM> may be N-Metal-Oxide-Semiconductor (NMOS) switches, Positive channel Metal Oxide Semiconductor (PMOS) switches or Complementary Metal Oxide Semiconductor (CMOS) switches.

In the switch control circuit <NUM> provided by the foregoing embodiments, when the first control switch <NUM> is turned off, the first capacitor <NUM> is converted from a charged state to a discharged state, and the charging voltage released by the first capacitor <NUM> can control the field-effect transistor switch <NUM> to be turned on, at this time, since the first control switch <NUM> is turned off, the power source signal VDD cannot reach the gate electrode of the field-effect transistor switch <NUM>, so the power source noise cannot be coupled into the circuit where the source and drain electrodes of the field-effect transistor switch <NUM> are located, therefore, when the first capacitor <NUM> is in discharging phase, the discharge voltage of the first capacitor <NUM> can be used as a control signal of the field-effect transistor switch <NUM> to control the field-effect transistor switch <NUM> to be turned on, thereby reducing the power source coupling noise.

As shown in the implementation of <FIG>, the switch control circuit further comprises a second control switch <NUM> and a signal processing circuit <NUM>. The second control switch <NUM> is connected to the drain electrode of the field-effect transistor switch <NUM>, and controls the second control switch <NUM> to be turned on when the first capacitor <NUM> is charged, and to be turned off when first capacitor <NUM> is discharged. That is, when the first control switch <NUM> is turned on, the second control switch <NUM> is turned on; and when the first control switch <NUM> is turned off, the second control switch <NUM> is turned off.

The signal processing circuit <NUM> is connected in parallel with the second control switch <NUM>, wherein the signal processing circuit <NUM> is configured to process the input analog signal when the second control switch <NUM> is turned off.

In a possible implementation, when the first control switch <NUM> is turned on, the first capacitor <NUM> is charged, and the field-effect transistor switch <NUM> is turned on, at this time, in order to prevent power source noise from being coupled into the analog signal received by the signal processing circuit <NUM>, the second control switch <NUM> is turned on, so that the analog signal is directly output through the second control switch <NUM> without passing through the signal processing circuit <NUM>.

When the first control switch <NUM> is turned off, the first capacitor <NUM> is discharged and the field-effect transistor switch <NUM> is turned on, at this time, the power source noise may not be coupled into field-effect transistor switch <NUM>, and the second control switch <NUM> is controlled to be turned off, the analog signal may be processed by the signal processing circuit <NUM>, thereby reducing the noise contained in the analog signal.

In the implementation, as shown in <FIG>, the signal processing circuit <NUM> is an analog front end (Analog Front End, AFE). The analog front end comprises: an operational amplifier <NUM> and a sampling capacitor <NUM>. The reverse input end of the operational amplifier <NUM> is connected to the drain electrode of the field-effect transistor switch <NUM>, and the forward input end of the operational amplifier <NUM> is configured to receive the reference voltage; one end of the sampling capacitor <NUM> is connected to the reverse input end of the operational amplifier <NUM>, and the other end of the sampling capacitor <NUM> is connected to the output end of the operational amplifier <NUM>; and the second control switch <NUM> is connected in parallel to two ends of the sampling capacitor <NUM>.

<FIG> shows a timing schematic view of the ON and OFF of each switch, and as it may be affected by different factors in actual situations, the ON or OFF of the first control switch <NUM> and the second control switch <NUM> may not be completely synchronized, and the slight time difference may be ignored.

Optionally, when the first control switch <NUM> is turned off and the second control switch <NUM> is turned off, the signal processing circuit <NUM> works in an amplified state. When the first control switch <NUM> is turned on and the second control switch <NUM> is turned on, the signal processing circuit <NUM> works in a reset state.

For example, please refer to <FIG> in combination, <FIG> is a state view that matches the ON/OFF conditions and the analog front end states of switches in the circuit shown in the timing view of <FIG>. Please refer to <FIG> in combination, during the time period from t0 to t1, the first control switch <NUM> is ON, the second control switch <NUM> is ON or OFF. In this interval, gate electrode input signal of the first control switch <NUM> is at a low level, the source and drain electrodes of the first control switch <NUM> are turned off (non-conduction), and gate electrode input signal of the field-effect transistor switch <NUM> is at a low level, the source electrode and drain electrode of the field-effect transistor switch <NUM> are turned off (non-conduction), so the signal is not transmitted to the signal processing circuit <NUM>. And the signal processing circuit <NUM> is in a reset (RST) or amplified (AMP) state.

Please refer to <FIG> and <FIG> in combination, during the time period from t1 to t2, the first control switch <NUM> receives the power source signal VDD (high level), and the first control switch <NUM> and the second control switch <NUM> are both ON. In this interval, the first control switch <NUM> receives the power source signal VDD, the first capacitor is charged, and the gate electrode input signal of the field-effect transistor switch <NUM> is at a high level, the source electrode and drain electrode of the field-effect transistor switch <NUM> are turned on (conduction). Since the second control switch <NUM> is ON during this time period, the input signal is directly output through the second control switch <NUM>, and may not enter the signal processing circuit <NUM> for processing. The signal processing circuit <NUM> is in a reset state.

Please refer to <FIG> and <FIG> in combination. From t2 to t3, the first control switch <NUM> and the second control switch <NUM> are both OFF. In this interval, since the first control switch <NUM> is OFF, the first capacitor <NUM> releases the voltage, the gate electrode input signal of the field-effect transistor switch <NUM> is at a high level, so that the source and the drain electrodes of the field-effect transistor switch <NUM> are turned on (conduction). The input signal enters the signal processing circuit <NUM> for sampling, and the signal processing circuit <NUM> works in an amplified state.

<FIG> is structural schematic view of a multiplexer switch circuit <NUM> provided by the present embodiment. The multiplexer switch circuit <NUM> comprises a switch array <NUM>, wherein the switch array <NUM> comprises multiple groups of the switch control circuits <NUM>, and the multiple groups of the switch control circuits <NUM> are connected in parallel. In the present embodiment, the switch array <NUM> comprising <NUM> groups of switch control circuits <NUM> is taken as an example, and this application is not limited to this. The structure of each group of switch control circuits <NUM> can be as shown in <FIG>, and may not be repeated here.

In a possible implementation, if it is necessary to select the first group of switch control circuits <NUM> to be turned on, the power source signals of the first group of switch control circuits <NUM> may be controlled to be at a high level, and the power source signals of other groups of switch control circuits are at a low level, so that only the first capacitor <NUM> of the first group of switch control circuits <NUM> is charged, therefore, in the discharging phase of the first capacitor <NUM>, only the field-effect transistor switch <NUM> of the first group of switch control circuits <NUM> may be turned on, and only one line may be selected for signal transmission.

In a possible implementation, as shown in <FIG>, the multiplexer switch circuit <NUM> may further comprise: a second control switch <NUM> and a signal processing circuit <NUM>, wherein the second control switch <NUM> is connected to the drain electrode of the field-effect transistor switch <NUM> in each group of switch control circuits <NUM>, and configured to be turned on when the first capacitor <NUM> of the switch control circuit <NUM> is charged, and to be turned off when the first capacitor <NUM> is discharged.

The signal processing circuit <NUM> is connected in parallel with the second control switch <NUM>, wherein the signal processing circuit <NUM> is configured to process, in the case that the second control switch <NUM> is OFF, the analog signal transmitted by the field-effect transistor switch <NUM> in the switch control circuit <NUM>.

In a possible implementation, as shown in <FIG> , the signal processing circuit <NUM> comprises: an operational amplifier <NUM> and a sampling capacitor <NUM>, wherein the reverse input end of the operational amplifier <NUM> is connected to the drain electrode of the field-effect transistor switch <NUM> in each group of switch control circuits <NUM>, and the forward input end of the operational amplifier <NUM> is configured to input the reference voltage; and one end of the sampling capacitor <NUM> is connected to the reverse input end of the operational amplifier <NUM>, and the other end of the sampling capacitor <NUM> is connected to the output end of the operational amplifier <NUM>; wherein the second control switch <NUM> is connected in parallel to two ends of the sampling capacitor <NUM>.

<FIG> is a flowchart schematic view of a control method provided by an embodiment of the present disclosure. This method may be applied to the multiplexer switch circuit described in the foregoing embodiments. The method may comprise the following steps.

Step <NUM>: transmitting a power source signal to the first control switch of at least one group of switch control circuits.

In a possible implementation, the high level signal of the power source is transmitted to the first control switch of one group of switch control circuits, and the low level signal is transmitted to the first control switch of the other groups of switch control circuits.

Step <NUM>: controlling the first control switch to be turned on, and charging the first capacitor through the power source signal.

In a possible implementation, the multiplexer switch circuit further comprises: at least one group of second control switch and signal processing circuit, wherein the second control switch is connected in parallel to the signal processing circuit, and the signal processing circuit is connected to each group of switch control circuits; therefore, in the case that the first control switch is ON the second control switch may also be controlled to be turned on, so that the analog signal transmitted by the field-effect transistor switch is output through the second control switch.

Step <NUM>: controlling the first control switch to be turned off, after the charging is completed, and using the charging voltage released by the first capacitor to drive the field-effect transistor switch to be turned on.

In a possible implementation, the second control switch may be controlled to be turned off, when the first control switch is turned off, such that the analog signal transmitted by the field-effect transistor switch is processed through the signal processing circuit.

Claim 1:
A switch control circuit (<NUM>), comprising:
a first control switch (<NUM>), configured to transmit a power source signal when being turned on;
a first capacitor (<NUM>), wherein the first capacitor (<NUM>) is connected to the first control switch (<NUM>), and configured to receive the power source signal for charging, and to release a charging voltage when the first control switch (<NUM>) is turned off; and
a field-effect transistor switch (<NUM>), connected to the first capacitor (<NUM>), wherein the field-effect transistor switch (<NUM>) is configured to receive the charging voltage released by the first capacitor (<NUM>) to control the field-effect transistor switch (<NUM>) to be turned on;
a second control switch (<NUM>), connected to a drain electrode of the field-effect transistor switch (<NUM>), and configured to be turned on when the first capacitor (<NUM>) is charged, and turned off when the first capacitor (<NUM>) is discharged; and
a signal processing circuit (<NUM>), connected in parallel to two ends of the second control switch (<NUM>), wherein the signal processing circuit (<NUM>) is configured to process, when the second control switch (<NUM>) is turned off, an analog signal transmitted by the field-effect transistor switch (<NUM>);
wherein the signal processing circuit (<NUM>) is an analog front end, and the analog front end comprises:
an operational amplifier (<NUM>), wherein a reverse input end of the operational amplifier (<NUM>) is connected to the drain electrode of the field-effect transistor switch (<NUM>), and a forward input end of the operational amplifier (<NUM>) is configured to receive a reference voltage; and
a sampling capacitor (<NUM>), wherein one end of the sampling capacitor (<NUM>) is connected to the reverse input end of the operational amplifier (<NUM>), and the other end is connected to an output end of the operational amplifier (<NUM>),
wherein the second control switch (<NUM>) is connected in parallel to two ends of the sampling capacitor (<NUM>),
wherein a working state of the signal processing circuit (<NUM>) comprises a reset state and an amplified state;
wherein, when the first control switch (<NUM>) is turned on and the second control switch (<NUM>) is turned on, the signal processing circuit (<NUM>) works in the reset state; and
wherein, when the first control switch (<NUM>) is turned off and the second control switch (<NUM>) is turned off, the signal processing circuit (<NUM>) works in the amplified state.