Patent Description:
It may be advantageous to face recognition or, more generally, object recognition with high accuracy, and with less computational and memory resource requirements in a variety of contexts. It is with respect to these and other considerations that the present improvements have been needed. Such improvements may become critical as the desire to perform face or object recognition in a variety of contexts becomes more widespread.

<NPL>, relates to an automated system to identify plant diseases as easily as possible. This document proposes a very light-weight convolutional neural network architecture that is trained to classify images of corn leaves into one of the four categories: common rust disease, northern leaf blight disease, gray leaf spot disease, or healthy. The architecture of this document is based on the bottleneck architecture and the MobileNet architecture. A depth-wise separable convolution is combined with the bottleneck architecture.

<NPL>, describes an end-to-end CNN acceleration framework to efficiently deploy domain-specific applications on FPGA by transfer learning that adapts pre-trained models to specific domains, replacing standard convolution layers with efficient convolution blocks, and applying layer fusion to enhance hardware design performance.

Aspects and embodiments are set out in the appended claims.

The material described herein is illustrated by way of example and not by way of limitation in the accompanying figures. For example, the dimensions of some elements may be exaggerated relative to other elements for clarity. Further, where considered appropriate, reference labels have been repeated among the figures to indicate corresponding or analogous elements. In the figures:.

One or more embodiments or implementations are now described with reference to the enclosed figures. While specific configurations and arrangements are discussed, it should be understood that this is done for illustrative purposes only. Persons skilled in the relevant art will recognize that other configurations and arrangements may be employed. It will be apparent to those skilled in the relevant art that techniques and/or arrangements described herein may also be employed in a variety of other systems and applications other than what is described herein.

While the following description sets forth various implementations that may be manifested in architectures such as system-on-a-chip (SoC) architectures for example, implementation of the techniques and/or arrangements described herein are not restricted to particular architectures and/or computing systems and may be implemented by any architecture and/or computing system for similar purposes. For instance, various architectures employing, for example, multiple integrated circuit (IC) chips and/or packages, and/or various computing devices and/or consumer electronic (CE) devices such as set top boxes, smart phones, etc., may implement the techniques and/or arrangements described herein. Further, while the following description may set forth numerous specific details such as logic implementations, types and interrelationships of system components, logic partitioning/integration choices, etc., claimed subject matter may be practiced without such specific details. In other instances, some material such as, for example, control structures and full software instruction sequences, may not be shown in detail in order not to obscure the material disclosed herein.

The material disclosed herein may be implemented in hardware, firmware, software, or any combination thereof. The material disclosed herein may also be implemented as instructions stored on a machine-readable medium, which may be read and executed by one or more processors. A machine-readable medium may include any medium and/or mechanism for storing or transmitting information in a form readable by a machine (e.g., a computing device). For example, a machine-readable medium may include read only memory (ROM); random access memory (RAM); magnetic disk storage media; optical storage media; flash memory devices; electrical, optical, acoustical or other forms of propagated signals (e.g., carrier waves, infrared signals, digital signals, etc.), and others.

References in the specification to "one implementation", "an implementation", "an example implementation", etc., indicate that the implementation described may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same implementation. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to affect such feature, structure, or characteristic in connection with other implementations whether or not explicitly described herein. As used herein the terms "approximately" or "substantially" indicate a deviation from the target value of +/-<NUM>% unless otherwise specified.

Methods, devices, apparatuses, computing platforms, and articles are described herein related to face recognition using convolutional neural networks with depth-wise convolution, condense point-wise convolution, and expansion point-wise convolution operations.

As described above, it may be advantageous to perform semantic object recognition such as face recognition in a variety of contexts. In face recognition, systems provide face identification (i.e., identifying a face as one of N subjects) and/or face verification (i.e., verifying a face belongs to a particular person). For example, face identification may be useful in identifying faces in images and albums of images, surveillance, etc. and face verification may be useful in security such as unlocking locked devices. As is discussed herein, a convolutional neural network (CNN) for object recognition input image data applies, to input feature maps, a depth-wise convolution to generate multiple separate 2D feature maps, a condense point-wise convolution to generate multiple first combined feature maps having a first number of channels, and an expansion point-wise convolution to the first combined feature maps to generate second combined feature maps having second number of channels greater than the first number of channels. Such processing is performed at one or more stages of the CNN and the input feature maps may be from any previous CNN stage.

Such techniques, and additional techniques discussed herein, provide an ultra-efficient object recognition (e.g., face recognition) system based on a condense-expansion-depth-wise network (CEDNet). CNNs discussed herein (i.e., CEDNet) may be implemented in any context, and, in particular, may be advantageous for resource-limited devices (e.g., computing resource limited, memory resource limited, battery life resource limited, etc.) such as edge computing devices, mobile devices, etc. In some embodiments, the discussed CNNs have fewer than <NUM> million #MAdd (multiply-add) operations such that the computing cost is reduced with respect to prior CNNs (e.g., up to <NUM>/<NUM> computing cost reduction) while recognition accuracy is maintained.

<FIG> illustrates an example device <NUM> for performing object recognition using a CNN having a condense-expansion-depth-wise stage, arranged in accordance with at least some implementations of the present disclosure. As shown in <FIG>, device <NUM> includes an imaging device <NUM>, a face detection and normalization module <NUM>, a convolutional neural network (CNN) module <NUM>, and a controller <NUM>. Device <NUM> may be implemented in any suitable form factor device such as motor vehicle platform, a robotics platform, a personal computer, a laptop computer, a tablet, a phablet, a smart phone, a digital camera, a gaming console, a wearable device, a display device, an all-in-one device, a two-in-one device, or the like. For example, device <NUM> may perform object recognition as discussed herein.

As shown, imaging device <NUM> attains image data <NUM>. Imaging device <NUM> may be any suitable imaging device such as an RGB camera or the like. In some embodiments, device <NUM> receives image data <NUM> or normalized input image data <NUM> from another device via a communications channel (not shown). In some embodiments, image data <NUM> is attained for processing from a memory (not shown) of device <NUM>. Image data <NUM> may include any suitable picture, frame, or the like or any data structure representing a picture or frame at any suitable resolution. In an embodiment, image data <NUM> is RGB image data having R (red), G (green), and B (blue), values for pixels thereof. In an embodiment, image data <NUM> is RGB-D image data having R, G, B, D (depth) values for pixels thereof. In an embodiment, imaging device <NUM> is a 3D imaging device. For example, imaging device <NUM> may include a left camera, a right camera, and an IR transmitter such that the IR transmitter projects an IR texture pattern onto a scene and an IR texture pattern residual from the left and right camera is used to perform stereoscopy to generate depth values of image data <NUM>. In an embodiment, image data <NUM> is single channel infra-red image data having a single value (e.g., an intensity value) at each pixel thereof (e.g., a thermogram).

Image data <NUM> is received by face detection and normalization module <NUM> and face detection and normalization module <NUM>, using image data <NUM>, performs facial detection using any suitable technique or techniques such as landmark detection to generate a bounding box around the face (if any). Face detection and normalization module <NUM> detects face(s) within image data <NUM> and normalizes image data corresponding to the detected face(s) to a predetermined size and/or scale to generate normalized input image data <NUM>. In an embodiment, image data <NUM> includes, for example, a query face for face recognition including face identification or face verification.

<FIG> illustrates example face detection and normalization, arranged in accordance with at least some implementations of the present disclosure. As shown in <FIG>, image data <NUM> includes a representation of a face <NUM>. Face detection is performed using image data <NUM> using any suitable technique or techniques such as facial landmark detection techniques, Viola-Jones object detection framework based on Haar features and cascade classifiers, histogram of oriented gradients (HOGs) based classifiers, etc. As shown, in some embodiments, landmark points <NUM> (only one of which is labeled for the sake of clarity) are detected and located based on such face detection techniques and such landmark points (and/or other techniques) are used to generate a bounding box <NUM> corresponding to face <NUM>. Based on bounding box <NUM> and landmark points <NUM>, normalized input image data <NUM> is generated. For example, face detection and normalization module <NUM> may crop and adjust image data <NUM> to generate normalized input image data <NUM> at a common size and scale for processing by CNN module <NUM>.

Normalized input image data <NUM> may include any suitable data structure. In an embodiment, normalized input image data <NUM> has a single channel (e.g., gray scale image data) such that normalized input image data <NUM> has a single value for each pixel thereof. In an embodiment, normalized input image data <NUM> has three color channels (e.g., RGB image data) such that normalized input image data <NUM> has three values (e.g., an R value, a G value, and a B value) for each pixel thereof. Although discussed herein with respect to RGB image data, any suitable image data format (e.g., YUV, YCbCr, etc.) may be used. In an embodiment, normalized input image data <NUM> has three color channels and a depth channel (e.g., RGB-D image data) such that normalized input image data <NUM> has four values (e.g., an R value, a G value, a B value, and a D value) for each pixel thereof. Although discussed herein with respect to RGB-D depth image data, any suitable depth image data format may be used. Furthermore, normalized input image data <NUM> may have any suitable size. In an embodiment, normalized input image data <NUM> may represent any suitable size of normalized image such as a 128x128 pixel normalized image, a 100x100 pixel normalized image, a <NUM>×<NUM> pixel normalized image, etc..

Returning to <FIG>, normalized input image data <NUM> is received by CNN module <NUM>, which applies a CNN as discussed herein to normalized input image data <NUM> to generate CNN output data <NUM>. CNN output data <NUM> may include any suitable data structure such as an N-dimensional vector with each value indicating a likelihood or score that a feature is within normalized input image data <NUM>. As shown, CNN output data <NUM> is provided to controller <NUM>, which receives CNN output data <NUM> and generates object recognition data <NUM>. Object recognition data <NUM> includes any suitable data structure indicating an object (such as a face) is identified for verified in normalized input image data <NUM>. For example, object or face recognition may be divided into identification and verification in practical implementation.

Object or face identification corresponds to a <NUM>:N matching problem such that normalized input image data <NUM> may be attempted to be matched to one of N subjects. For example, a backend database may contain more N subjects each with about K images and associated identities. Object or face identification finds the best match to normalized input image data <NUM> and, if the best matching score is larger than pre-defined threshold, for example, object recognition data <NUM> includes an indicator identifying the best match subject. In an embodiment, if the matching score is less than the threshold, no match is provided. In such embodiments, controller <NUM> receives CNN output data <NUM> and determines a best match based on CNN output data <NUM> (e.g., by comparing CNN output data <NUM> to output data for the N available subjects), optionally compares the score of the best match to a threshold, and, if the score of the best match compares favorably to the threshold, indicates the match via object recognition data <NUM>. For example, object recognition data <NUM> may include an identifier indicating a best facial match for normalized input image data <NUM> in face identification contexts. Such best facial match data may be used by device <NUM> to tag a photo with a name, to identify a person under surveillance, etc..

Object or face verification targets corresponds to a <NUM>:<NUM> matching problem such that normalized input image data <NUM> may be attempted to be matched to a particular, single subject. For example, a backend database may store several images from the subject and, for a query face, a determination is made as to whether normalized input image data <NUM> includes the subject or not. Thereby, object or face verification determines whether normalized input image data <NUM> corresponds to the subject. For example, CNN output data <NUM> may be compared to output data for the subject using a sum of square differences and comparison to a threshold or similar techniques. In such embodiments, controller <NUM> receives CNN output data <NUM>, determines whether a match is found, and, if so, indicates the match via object recognition data <NUM>. For example, object recognition data <NUM> may include an identifier indicating whether or not facial match for normalized input image data <NUM> is made face verification contexts. Such data indicating a match or not may be used by device <NUM> to allow or reject access to device <NUM> (e.g., to provide device access through face matching).

<FIG> illustrates an example convolutional neural network <NUM>, arranged in accordance with at least some implementations of the present disclosure. As shown in <FIG>, convolutional neural network (CNN) <NUM> includes multiple stages <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, which are labeled as s1, s2, s3, s4, s5, respectively. As shown, stage <NUM> (s1) receives normalized input image data <NUM>, which is illustrated as 128x128 pixels of a single channel (e.g., grayscale). However, normalized input image data <NUM> may include any suitable input image data discussed herein. As shown, stage <NUM> (s1) operates on normalized input image data <NUM> to generate feature maps <NUM>. In the illustrated embodiment, feature maps <NUM> include 64x64 element feature maps for <NUM> output channels. That is, feature maps <NUM> include <NUM> feature maps each having 64x64 (<NUM>,<NUM>) feature values. However, any size of feature maps for any number of output channels may be used. For example, stage <NUM> (s1) receives a data volume having dimensions of <NUM>×<NUM>×<NUM> and outputs a data volume having dimensions of 64x64x32.

Stage <NUM> (s1) generates feature maps <NUM> using any suitable convolutional technique or techniques. In an embodiment, stage <NUM> (s1) generates feature maps <NUM> using standard convolutional techniques such that <NUM>, for example, kernels are each applied to locations within normalized input image data <NUM>. Each kernel may be any suitable size such as 3x3, 5x5, etc. with each kernel being the same size or kernels being different sizes. Stage <NUM> (s1) may also include pooling, scaling, and/or rectified linear unit (ReLU) operations as is known in the art. Furthermore, in embodiments where normalized input image data <NUM> includes multiple channels, each kernel may be summed across the channels at each location within normalized input image data <NUM>. For example, a standard convolution in a CNN is a multi-channel and multi-kernel convolution. For a convolution layer having 'n' input channels (e.g., the number of channels of normalized input image data <NUM>) and 'm' output channels (e.g., the number of channels of feature maps <NUM>), with kernel-size kxk=k<NUM>. For each output channel (i.e., for each kernel), standard convolution performs 2D convolution for each input channel and adds all 'n' convolution results as the output response.

Stage <NUM> (s2) receives feature maps <NUM> as input and generates feature maps <NUM> as output using any suitable convolutional technique or techniques. For example, stage <NUM> (s2) may generate feature maps <NUM> using depth-wise-condense-expansion convolutions as discussed herein below. In an embodiment, depth-wise-condense-expansion convolution includes three steps.

First, a depth-wise convolution is applied to input feature maps (e.g., feature maps <NUM>) to generate multiple separate 2D feature maps. As used herein, the term depth-wise convolution indicates a convolution that does not sum, average, or otherwise exchange information across input channels. The term separate 2D feature maps indicates feature maps performed by a convolution that does not sum, average, or otherwise exchange information across input channels. The depth-wise convolution applies, to 'n' input channel depth maps, 'm' kxkx1 kernels to generate 'm' separate 2D feature maps.

Second, a condense point-wise convolution is applied to the 'm' separate 2D feature maps to generate 'n/g' combined feature maps such that the combined feature maps have n/g channels. As used herein, the term combined feature maps is used to indicate feature maps that have been generated by sharing information across the input channels. For example, 'n/g' 1x1xm kernels are applied to the separate 2D feature maps to generate the first combined feature maps.

Third, an expansion point-wise convolution is applied to the 'n/g' combined feature maps to generate 'n' combined feature maps such that the combined feature maps have n channels. As used herein, the term condense is used to indicate the number of output channels is reduced and the term expansion is used to indicate the number output channels is increased. The factor 'g' is characterized as a condense factor such that the ratio of the number of channels after expansion to the number channels prior to expansion (and after condense) is 'g'. For example, 'n' 1x1x(n/g) kernels are applied to the first combined feature maps to generate second combined feature maps. Such depth-wise-condense-expansion convolutions provide a variety of advantages as discussed further herein. At a particular stage, such as stage <NUM> (s2), the discussed depth-wise-condense-expansion convolutions may be performed once (as discussed with respect to <FIG>), with optional pooling, scaling, and/or ReLU operations or multiple times (such as twice as discussed with respect to <FIG>) to stack them at a stage.

As shown, in an embodiment, stage <NUM> (s2) receives a data volume having dimensions of 164x64x32 and outputs a data volume having dimensions of <NUM>×<NUM>×<NUM> However, any suitable data sizes may be used. Furthermore, CNN <NUM> includes additional stages <NUM>, <NUM>, <NUM>. Stages <NUM>, <NUM>, <NUM> receive feature maps <NUM>, <NUM>, <NUM>, respectively, as input and generate feature maps <NUM>, <NUM> and feature vector <NUM> as output using any suitable convolutional technique or techniques. For example, any of stages <NUM>, <NUM>, <NUM>, <NUM>, <NUM> may use standard convolution techniques discussed herein. As will be appreciated, feature maps <NUM>, <NUM>, <NUM>, <NUM> and feature vector <NUM> are associated with normalized input image data <NUM> and image data <NUM> in that they are generated when processing input image data <NUM> and/or image data <NUM>. Furthermore, any of stages <NUM>, <NUM>, <NUM>, <NUM>, <NUM> uses depth-wise-condense-expansion convolutions (either single or stacked) as discussed herein. In addition, any of stages <NUM>, <NUM>, <NUM>, <NUM>, <NUM> may use depth-wise convolutions and point-wise convolutions without condense-expansion. For example, depth-wise convolutions and point-wise convolutions may first apply per-channel 2D convolutions that output separate 2D feature map and then mix each channel with the others using 1x1 or point-wise convolution.

As shown, in an embodiment, stage <NUM> (s3) receives a data volume of feature maps <NUM> having dimensions of 32x32x64 and outputs a data volume of feature maps <NUM> having dimensions of <NUM>×<NUM>×<NUM>, stage <NUM> (s4) receives a data volume of feature maps <NUM> having dimensions of <NUM>×<NUM>×<NUM> and outputs a data volume of feature maps <NUM> having dimensions of 8x8x256, and stage <NUM> (s5) receives a data volume of feature maps <NUM> having dimensions of 8x8x256 and outputs a one-dimensional feature vector <NUM> having any number of elements. However, any suitable feature maps numbers and sizes (e.g., volumes) and feature vector sizes may be used.

In the illustrated embodiment, CNN <NUM> includes five stages, however, CNN <NUM> may include any number of stages such as <NUM>, <NUM>, <NUM>, or more. Furthermore, each successive stage of CNN <NUM> outputs feature maps of decreasing size and increasing number of channels. Such processing may increase the abstraction of features detected by CNN <NUM> across stages <NUM>, <NUM>, <NUM>, <NUM>, <NUM>.

<FIG> illustrates an example convolutional neural network stage <NUM> including example depth-wise-condense-expansion convolutions, arranged in accordance with at least some implementations of the present disclosure. As shown in <FIG>, convolutional neural network (CNN) stage <NUM> includes an input <NUM>, a depth-wise convolution (DW-Conv) module <NUM>, a point-wise condense convolution (PW-Conv) module <NUM>, a point-wise expansion convolution (PW-Conv) module <NUM>, an optional adder <NUM>, and an output <NUM>. CNN stage <NUM> may be implemented via any CNN stage discussed herein.

As shown, CNN stage <NUM>, via input <NUM>, receives, for example from a previous CNN stage, input feature maps <NUM> such that input feature maps <NUM> have 'n' channels. Furthermore, input feature maps <NUM> may have any suitable size such that input feature maps <NUM> provide an input volume to CNN stage. For example, input feature maps <NUM> may each have HxW elements and input feature maps <NUM> have 'n' channels such that input feature maps <NUM> have an HxWxn data volume. For example, input feature maps <NUM> may be 64x64x32, 42x32x64, <NUM>×<NUM>×<NUM>, <NUM>×<NUM>×<NUM> as discussed herein, although any suitable dimensions may be used.

Depth-wise convolution module <NUM> receives input feature maps <NUM> and applies a depth-wise convolution to input feature maps <NUM> to generate multiple separate 2D feature maps <NUM>. For example, depth-wise convolution module <NUM> applies a per-channel 2D convolution that outputs 'n' separate 2D feature maps <NUM> using 'n' convolution kernels of size kxkx1 such that there is no information exchange between the input channels. As discussed, such separate 2D feature maps <NUM> are generated without adding, averaging, or otherwise exchanging information across the 'n' input channels of input feature maps <NUM>. Such processing may be contrasted with standard convolutional processing, which adds or averages across channels.

<FIG> illustrates an example depth-wise convolution <NUM>, arranged in accordance with at least some implementations of the present disclosure. As shown in <FIG>, input feature maps <NUM> include 'n' feature maps <NUM>, <NUM>, <NUM>, <NUM> (also labeled <NUM>, <NUM>, <NUM>, n), each of which has HxW elements or features. That is, a linear cross-section of each of feature maps <NUM>, <NUM>, <NUM>, <NUM> is illustrated in <FIG>. As shown, a kernel of size kxkx1 is applied to each of feature maps <NUM>, <NUM>, <NUM>, <NUM> such that 'n' kernels such as kernels <NUM>, <NUM>, <NUM>, <NUM> are applied to feature maps <NUM>, <NUM>, <NUM>, <NUM>, respectively, to generate 'n' separate 2D feature maps <NUM>, <NUM>, <NUM>, <NUM>, of size HxW to provide separate 2D feature maps <NUM>. As discussed, separate 2D feature maps <NUM>, <NUM>, <NUM>, <NUM> are generated without any cross-channel information exchange between feature maps <NUM>, <NUM>, <NUM>, <NUM>. Kernels <NUM>, <NUM>, <NUM>, <NUM> may be of any suitable size or sizes such as 3x3, <NUM>×<NUM>, etc. and separate 2D feature maps <NUM>, <NUM>, <NUM>, <NUM>, may be of any suitable size.

As shown, at a particular location of feature map <NUM>, kernel <NUM> is applied by convolving kernel <NUM> with the feature values of feature map <NUM> at the location to generate a feature value <NUM> of separate 2D feature map <NUM>. The location of kernel <NUM> is then moved and the process is repeated using the feature values of feature map <NUM> at the new location to generate another feature value, and so on throughout feature map <NUM>. Each of feature maps <NUM>, <NUM>, <NUM> are processed in a similar manner by kernels <NUM>, <NUM>, <NUM>, respectively, to generate feature values such as feature values <NUM>, <NUM>, <NUM> of separate 2D feature maps <NUM>, <NUM>, <NUM>.

Returning to <FIG>, point-wise condense convolution module <NUM> receives separate 2D feature maps <NUM> and applies a point-wise convolution to separate 2D feature maps <NUM> to generate combined feature maps <NUM>. Point-wise condense convolution module <NUM> applies a linear mix across channels using 'n/g' 1x1xn convolutions.

<FIG> illustrates an example point-wise condense convolution <NUM>, arranged in accordance with at least some implementations of the present disclosure. As shown in <FIG>, separate 2D feature maps <NUM> include 'n' separate feature maps <NUM>, <NUM>, <NUM>, <NUM> (also labeled <NUM>, <NUM>, <NUM>, n), generated as discussed with respect to <FIG> such that each has H×W elements or features. That is, a linear cross-section of each of separate feature maps <NUM>, <NUM>, <NUM>, <NUM> is illustrated in <FIG> and <FIG>. As shown, a kernel <NUM> of size <NUM>×1xn is applied across separate feature maps <NUM>, <NUM>, <NUM>, <NUM> to generate values or features of, for example, combined feature map <NUM>. For example, kernel <NUM> is applied at a particular position across separate feature maps <NUM>, <NUM>, <NUM>, <NUM> and kernel <NUM> is convolved with feature values <NUM>, <NUM>, <NUM>, <NUM> corresponding to the particular position to generate feature value <NUM> of combined feature map <NUM>.

Kernel <NUM> is then moved throughout separate feature maps <NUM>, <NUM>, <NUM>, <NUM> with a feature value of combined feature map <NUM> being generated at each position. Similarly, another <NUM>×1xn kernel is applied across separate feature maps <NUM>, <NUM>, <NUM>, <NUM> to generate feature value <NUM> and by moving throughout separate feature maps <NUM>, <NUM>, <NUM>, <NUM>, each feature value of combined feature map <NUM>. In like fashion, each value of combined feature map <NUM> (including feature value <NUM>), combined feature map <NUM> (including feature value <NUM>), and all other 'n/g' combined feature maps <NUM> are generated. For example, 'n/g' kernels such as kernel <NUM> are applied to separate feature maps <NUM>, <NUM>, <NUM>, <NUM> to generate combined feature maps <NUM> with 'n/g' output channels. As discussed, combined feature maps <NUM>, <NUM>, <NUM>, <NUM> are generated with cross-channel information exchange between separate feature maps <NUM>, <NUM>, <NUM>, <NUM>. As used herein, the term combined with reference to feature maps indicate feature maps generated with information exchange across the input channels.

As shown, the point-wise condense convolution condenses the 'n' channels of separate 2D feature maps <NUM> to 'n/g' channels such that 'g', which is characterized as a condense factor herein, is an integer greater than one. The condense factor, 'g' is any suitable integer value greater than one such as <NUM>, <NUM>, or <NUM>, with <NUM> being particularly advantageous.

Returning to <FIG>, point-wise expansion convolution module <NUM> receives combined feature maps <NUM> and applies a point-wise expansion convolution to combined feature maps <NUM> to generate combined feature maps <NUM>. For example, point-wise condense convolution module <NUM> applies a linear mix across channels using 'n' 1x1x(n/g) convolutions.

<FIG> illustrates an example point-wise expansion convolution <NUM>, arranged in accordance with at least some implementations of the present disclosure. As shown in <FIG>, combined feature maps <NUM> include 'n/g' combined feature maps <NUM>, <NUM>, <NUM>, <NUM> (also labeled <NUM>, <NUM>, <NUM>, n/g), generated as discussed with respect to <FIG> such that each has H×W elements or features. That is, a linear cross-section of each of combined feature maps <NUM>, <NUM>, <NUM>, <NUM> is illustrated in <FIG>. As shown, a kernel <NUM> of size 1x1x(n/g) is applied across combined feature maps <NUM>, <NUM>, <NUM>, <NUM> to generate values or features of, for example, combined feature map <NUM>. For example, kernel <NUM> is applied at a particular position across combined feature maps <NUM>, <NUM>, <NUM>, <NUM> and kernel <NUM> is convolved with feature values <NUM>, <NUM>, <NUM>, <NUM> corresponding to the particular position to generate feature value <NUM> of combined feature map <NUM>.

Kernel <NUM> is then moved throughout combined feature maps <NUM>, <NUM>, <NUM>, <NUM> with a feature value of combined feature map <NUM> being generated at each position. Similarly, another lxlx(n/g) kernel is applied across combined feature maps <NUM>, <NUM>, <NUM>, <NUM> to generate feature value <NUM> and by moving throughout combined feature maps <NUM>, <NUM>, <NUM>, <NUM>, each feature value of combined feature map <NUM>. In like fashion, each value of combined feature map <NUM> (including feature value <NUM>), combined feature map <NUM> (including feature value <NUM>), and all other 'n' combined feature maps <NUM> are generated. For example, 'n' kernels such as kernel <NUM> are applied to combined feature maps <NUM>, <NUM>, <NUM>, <NUM> to generate combined feature maps <NUM> with 'n' output channels. As discussed, combined feature maps <NUM>, <NUM>, <NUM>, <NUM> are generated with cross-channel information exchange between separate combined feature maps <NUM>, <NUM>, <NUM>, <NUM>. As shown, the point-wise expansion convolution expands the 'n/g' channels of combined feature maps <NUM> to 'n' channels in combined feature maps <NUM>.

Returning to <FIG>, adder <NUM> receives combined feature maps <NUM> and sums combined feature maps <NUM> with input feature maps <NUM> to generate output feature maps <NUM>. For example, CNN stage <NUM>, via adder <NUM>, provides residual connection by adding feature maps <NUM> with input feature maps <NUM>. Such residual connections may provide for CNN stage to estimate changes in features, which may be easier to estimate and train. However, in some embodiments, adder <NUM> is not implemented and CNN stage outputs combined feature maps <NUM>.

As discussed, depth-wise-condense-expansion convolutions are provided within a stage of a CNN. Notably, the point-wise condense convolution layer (e.g., applied at point-wise condense convolution module <NUM>) condenses the 'n' channel output of the depth-wise convolution layer (e.g., separate 2D feature maps <NUM>) into 'n/g' output channels (e.g., combined feature maps <NUM>) such that g (the condense factor) is greater than <NUM> (e.g., g = <NUM>). Such a point-wise condense convolution advantageously reduces redundancy among the channels of the depth-wise convolution layer output and reduces computations as discussed further herein. Furthermore, residual connections are provided by adding (e.g., via adder <NUM>) combined feature maps <NUM> with input feature maps <NUM>. To ensure the residual summation is workable, input feature maps <NUM> and combined feature maps <NUM> have the same resolution (e.g., HxW) and the same number channels (e.g., 'n'). To provide for the same resolution of input feature maps <NUM> and combined feature maps <NUM>, expansion is provided by point-wise expansion convolution module <NUM> such that the number of input channels of combined feature maps <NUM> is 'n/g' while the number of output channels of combined feature maps <NUM> is still 'n'.

Such processing techniques provide low computational resource requirements and storage requirements as the number of CNN parameters are reduced. For example, assuming a convolutional stage having 'n' input channels, 'n' output channels, WxH feature map sizes, and k<NUM> kernel size, standard convolutional processing requires a computing complexity of w*h*k<NUM>*n<NUM>; depth-wise and point-wise convolution without condense and expansion and without residual summation requires a computing complexity of w*h*(k<NUM>*n-+-n<NUM>); depth-wise and point-wise convolution without condense and expansion with residual summation requires a computing complexity of w*h*(k<NUM>*n+n<NUM>-n'; and depth-wise-condense-expansion convolution with residual summation requires a computing complexity of w*h*(k<NUM>*n+n<NUM>/g+n<NUM>/g +n). Further assuming a condense factor, 'g' of <NUM>, the computing cost reduction with respect to standard convolutional processing is 9n(<NUM>+n) and the computing cost reduction with respect to depth-wise and point-wise convolution without condense and expansion and without residual summation is (<NUM>+n)/(<NUM>+n/<NUM>). Therefore, for smaller n with n=<NUM>, the techniques discussed herein speed up over standard convolutional processing by <NUM>. 2X and over depth-wise and point-wise convolution without condense and expansion and without residual summation by <NUM>. For larger n with n=<NUM>, the techniques discussed herein speed up over standard convolutional processing by <NUM>. 8X and over depth-wise and point-wise convolution without condense and expansion and without residual summation by <NUM>. Furthermore, the discussed techniques require fewer CNN model parameters and improved CNN convergence during training.

<FIG> illustrates an example convolutional neural network stage <NUM> including multiple example depth-wise-condense-expansion convolutions, arranged in accordance with at least some implementations of the present disclosure. As shown in <FIG>, convolutional neural network (CNN) stage <NUM> includes an input <NUM>, a depth-wise convolution (DW-Conv) module <NUM>, a point-wise condense convolution (PW-Conv) module <NUM>, a point-wise expansion convolution (PW-Conv) module <NUM>, an optional adder <NUM>, a depth-wise convolution (DW-Conv) module <NUM>, a point-wise condense convolution (PW-Conv) module <NUM>, a point-wise expansion convolution (PW-Conv) module <NUM>, an optional adder <NUM>, and an output <NUM>. CNN stage <NUM> may be implemented via any CNN stage discussed herein.

CNN stage <NUM> receives, via input <NUM>, for example from a previous CNN stage, input feature maps <NUM> such that input feature maps <NUM> have 'n' channels. Furthermore, input feature maps <NUM> may have any suitable size such that input feature maps <NUM> provide an input volume to CNN stage. For example, input feature maps <NUM> may each have H×W elements and input feature maps <NUM> have 'n' channels as discussed herein. Depth-wise convolution module <NUM> receives input feature maps <NUM> and applies a depth-wise convolution to input feature maps <NUM> to generate multiple separate 2D feature maps <NUM>. Depth-wise convolution module <NUM> applies a per-channel 2D convolution that outputs 'n' separate 2D feature maps <NUM> using 'n' convolution kernels of size kxkx1 such that there is no information exchange between the input channels as discussed with respect to <FIG>. Point-wise condense convolution module <NUM> receives separate 2D feature maps <NUM> and applies a point-wise condense convolution to separate 2D feature maps <NUM> to generate combined feature maps <NUM> having 'n/g' channels by applying 'n/g' <NUM>×1xn convolutions to separate 2D feature maps <NUM> as discussed with respect to <FIG>. Point-wise expansion convolution module <NUM> receives combined feature maps <NUM> and applies a point-wise expansion convolution to combined feature maps <NUM> to generate combined feature maps <NUM> having 'n' channels by applying 'n' 1x1x(n/g) convolutions to separate combined feature maps <NUM> as discussed with respect to <FIG>. Adder <NUM> receives combined feature maps <NUM> and sums combined feature maps <NUM> with input feature maps <NUM> to generate intermediate feature maps <NUM>. In some embodiments, adder <NUM> may not be implemented and combined feature maps <NUM> are provided to depth-wise convolution module <NUM>.

Depth-wise convolution module <NUM> receives intermediate feature maps <NUM> (or combined feature maps <NUM>) and applies a depth-wise convolution to intermediate feature maps <NUM> (or combined feature maps <NUM>) to generate multiple separate 2D feature maps <NUM>. Depth-wise convolution module <NUM> applies a per-channel 2D convolution that outputs 'n' separate 2D feature maps <NUM> using 'n' convolution kernels of size kxkx1 such that there is no information exchange between the input channels as discussed with respect to <FIG>. Point-wise condense convolution module <NUM> receives separate 2D feature maps <NUM> and applies a point-wise condense convolution to separate 2D feature maps <NUM> to generate combined feature maps <NUM> having 'n/g' channels by applying 'n/g' Ixlxn convolutions to separate 2D feature maps <NUM> as discussed with respect to <FIG>. Point-wise expansion convolution module <NUM> receives combined feature maps <NUM> and applies a point-wise expansion convolution to combined feature maps <NUM> to generate combined feature maps <NUM> having 'n' channels by applying 'n' 1x1x(n/g) convolutions to separate combined feature maps <NUM> as discussed with respect to <FIG>. Adder <NUM> receives combined feature maps <NUM> and sums combined feature maps <NUM> with intermediate feature maps <NUM> (or input feature maps <NUM>) to generate output feature maps <NUM>. In some embodiments, adder <NUM> and adder <NUM> are not implemented and combined feature maps <NUM> are output from CNN stage <NUM>.

<FIG>, <FIG>, and <FIG> illustrates an example convolutional neural network <NUM>, arranged in accordance with at least some implementations of the present disclosure. As shown in <FIG>, <FIG>, and <FIG>, convolutional neural network (CNN) <NUM> receives normalized input image data <NUM> via convolution layer <NUM>, which applies n (e.g., <NUM>) kxk (e.g., 3x3) convolution kernels to normalized input image data <NUM> (e.g., 128x128x1 image data). Pooling layer <NUM> receives the resultant data and provides a pooling (e.g., max pooling at stride <NUM>) to generate output feature maps (e.g., <NUM>×<NUM>×<NUM> feature maps) from a first stage of CNN <NUM>. In <FIG>, <FIG>, and <FIG>, numeral instances (e.g., Convolution <NUM>, Convolution <NUM>, etc.) are to indicate each instantiation of such processing in CNN <NUM>.

Convolution layer <NUM> receives the feature maps and applies, for example, <NUM>1x1x32 convolution kernels, batch normalization, scaling, and ReLU to the feature maps from the first stage and provides the resultant data (e.g., 64x64x64 data) to depth-wise-condense-expansion convolution layer <NUM> and summation and ReLu layer <NUM>. Depth-wise-condense-expansion convolution layer <NUM> applies kernels (e.g., <NUM> kernels) of size kxk (e.g., 3x3) in a depth-wise convolution manner to generate separate feature maps as discussed herein. Then, depth-wise-condense-expansion convolution layer <NUM> applies a point-wise condense convolution (e.g., <NUM> = <NUM>/<NUM>, where <NUM> is the condense factor, 1x1x64 kernels) to generate first combined feature maps (e.g., 64x64x16 data). Finally, depth-wise-condense-expansion convolution layer <NUM> applies a point-wise expansion convolution (e.g., <NUM>1x1x16 kernels) to generate second combined feature maps (e.g., 64x64x64 data). Notably, the output of convolution layer <NUM> and depth-wise-condense-expansion convolution layer <NUM> are the same size. Summation and ReLu layer <NUM> receives the output of convolution layer <NUM> and depth-wise-condense-expansion convolution layer <NUM>, sums them, and applies ReLU to generate output data, which is provided to depth-wise-condense-expansion convolution layer <NUM> and summation and ReLu layer <NUM>. Depth-wise-condense-expansion convolution layer <NUM> applies kernels (e.g., <NUM> kernels) of size kxk (e.g., 3x3) in a depth-wise convolution manner to generate separate feature maps as discussed herein. Then, depth-wise-condense-expansion convolution layer <NUM> applies a point-wise condense convolution (e.g., <NUM> = <NUM>/<NUM>, where <NUM> is the condense factor, <NUM>×<NUM>×<NUM> kernels) to generate first combined feature maps (e.g., 64x64x16 data). Finally, depth-wise-condense-expansion convolution layer <NUM> applies a point-wise expansion convolution (e.g., <NUM><NUM>×<NUM>×<NUM> kernels) to generate second combined feature maps (e.g., 64x64x64 data). Notably, the output of summation and ReLu layer <NUM> and depth-wise-condense-expansion convolution layer <NUM> are the same size. Summation and ReLu layer <NUM> receives the output of summation and ReLu layer <NUM> and depth-wise-condense-expansion convolution layer <NUM>, sums them, and applies ReLU to generate output data. Pooling layer <NUM> receives the resultant data and provides a pooling (e.g., max pooling at stride <NUM>) to generate output feature maps (e.g., <NUM>×<NUM>×<NUM> feature maps) from a second stage of CNN <NUM>.

Turning now to <FIG>, convolution layer <NUM> receives the feature maps and applies, for example, <NUM>1x1x64 convolution kernels, batch normalization, scaling, and ReLU to the feature maps from the second stage and provides the resultant data (e.g., 32x32x128 data) to depth-wise-condense-expansion convolution layer <NUM> and summation and ReLu layer <NUM>. Depth-wise-condense-expansion convolution layer <NUM> applies kernels (e.g., <NUM> kernels) of size kxk (e.g., 3x3) in a depth-wise convolution manner to generate separate feature maps as discussed herein. Depth-wise-condense-expansion convolution layer <NUM> then applies a point-wise condense convolution (e.g., <NUM> = <NUM>/<NUM>, where <NUM> is the condense factor, 1x1x128 kernels) to generate first combined feature maps (e.g., <NUM>×<NUM>×<NUM> data). Finally, depth-wise-condense-expansion convolution layer <NUM> applies a point-wise expansion convolution (e.g., <NUM>1x1x32 kernels) to generate second combined feature maps (e.g., 32x32x128 data). The output of convolution layer <NUM> and depth-wise-condense-expansion convolution layer <NUM> are the same size. Summation and ReLu layer <NUM> sums the output of convolution layer <NUM> and depth-wise-condense-expansion convolution layer <NUM> and applies ReLU to generate output data, which is provided to depth-wise-condense-expansion convolution layer <NUM> and summation and ReLu layer <NUM>. Depth-wise-condense-expansion convolution layer <NUM> applies kernels (e.g., <NUM> kernels) of size kxk (e.g., 3x3) in a depth-wise convolution manner to generate separate feature maps as discussed herein. Depth-wise-condense-expansion convolution layer <NUM> then applies a point-wise condense convolution (e.g., <NUM> = <NUM>/<NUM>, where <NUM> is the condense factor, 1x1x128 kernels) to generate first combined feature maps (e.g., 32x32x32 data). Finally, depth-wise-condense-expansion convolution layer <NUM> applies a point-wise expansion convolution (e.g., <NUM><NUM>×<NUM>×<NUM> kernels) to generate second combined feature maps (e.g., 32x32x128 data). The output of summation and ReLu layer <NUM> and depth-wise-condense-expansion convolution layer <NUM> are the same size. Summation and ReLu layer <NUM> sums the output of summation and ReLu layer <NUM> and depth-wise-condense-expansion convolution layer <NUM> and applies ReLU to generate output data. Pooling layer <NUM> receives the resultant data and provides a pooling (e.g., max pooling at stride <NUM>) to generate output feature maps (e.g., 16x16x128 feature maps) from a third stage of CNN <NUM>.

Convolution layer <NUM> receives the feature maps and applies, for example, <NUM><NUM>×<NUM>×<NUM> convolution kernels, batch normalization, scaling, and ReLU to the feature maps from the second stage and provides the resultant data (e.g., <NUM>×<NUM>×<NUM> data) to depth-wise-condense-expansion convolution layer <NUM> and summation and ReLu layer <NUM>. Depth-wise-condense-expansion convolution layer <NUM> applies kernels (e.g., <NUM> kernels) of size kxk (e.g., 3x3) in a depth-wise convolution manner to generate separate feature maps as discussed herein. Depth-wise-condense-expansion convolution layer <NUM> then applies a point-wise condense convolution (e.g., <NUM> = <NUM>/<NUM>, where <NUM> is the condense factor, <NUM>×<NUM>×<NUM> kernels) to generate first combined feature maps (e.g., 16x16x64 data). Finally, depth-wise-condense-expansion convolution layer <NUM> applies a point-wise expansion convolution (e.g., <NUM>1x1x64 kernels) to generate second combined feature maps (e.g., 16x16x256 data). The output of convolution layer <NUM> and depth-wise-condense-expansion convolution layer <NUM> are the same size. Summation and ReLu layer <NUM> sums the output of convolution layer <NUM> and depth-wise-condense-expansion convolution layer <NUM> and applies ReLU to generate output data, which is, turning to <FIG>, provided to depth-wise-condense-expansion convolution layer <NUM> and summation and ReLu layer <NUM>. Depth-wise-condense-expansion convolution layer <NUM> applies kernels (e.g., <NUM> kernels) of size kxk (e.g., 3x3) in a depth-wise convolution manner to generate separate feature maps as discussed herein. Depth-wise-condense-expansion convolution layer <NUM> then applies a point-wise condense convolution (e.g., <NUM> = <NUM>/<NUM>, where <NUM> is the condense factor, 1x1x256 kernels) to generate first combined feature maps (e.g., 16x16x64 data). Finally, depth-wise-condense-expansion convolution layer <NUM> applies a point-wise expansion convolution (e.g., <NUM>1x1x64 kernels) to generate second combined feature maps (e.g., 16x16x256 data). The output of summation and ReLu layer <NUM> and depth-wise-condense-expansion convolution layer <NUM> are the same size. Summation and ReLu layer <NUM> sums the output of summation and ReLu layer <NUM> and depth-wise-condense-expansion convolution layer <NUM> and applies ReLU to generate output data. Pooling layer <NUM> receives the resultant data and provides a pooling (e.g., max pooling at stride <NUM>) to generate output feature maps (e.g., <NUM>×<NUM>×<NUM> feature maps) from a fourth stage of CNN <NUM>.

Convolution layer <NUM> receives the feature maps and applies, for example, <NUM><NUM>×<NUM>×<NUM> convolution kernels, batch normalization, scaling, and ReLU to the feature maps from the second stage and provides the resultant data (e.g., 8x8x256 data) to depth-wise-condense-expansion convolution layer <NUM> and summation and ReLu layer <NUM>. Depth-wise-condense-expansion convolution layer <NUM> applies kernels (e.g., <NUM> kernels) of size kxk (e.g., 3x3) in a depth-wise convolution manner to generate separate feature maps as discussed herein. Depth-wise-condense-expansion convolution layer <NUM> then applies a point-wise condense convolution (e.g., <NUM> = <NUM>/<NUM>, where <NUM> is the condense factor, 1x1x512 kernels) to generate first combined feature maps (e.g., 8x8x128 data). Finally, depth-wise-condense-expansion convolution layer <NUM> applies a point-wise expansion convolution (e.g., <NUM><NUM>1x1x128 kernels) to generate second combined feature maps (e.g., 8x8x512 data). The output of convolution layer <NUM> and depth-wise-condense-expansion convolution layer <NUM> are the same size. Summation and ReLu layer <NUM> sums the output of convolution layer <NUM> and depth-wise-condense-expansion convolution layer <NUM> and applies ReLU to generate output data, which is provided to depth-wise-condense-expansion convolution layer <NUM> and summation and ReLu layer <NUM>. Depth-wise-condense-expansion convolution layer <NUM> applies kernels (e.g., <NUM> kernels) of size kxk (e.g., 3x3) in a depth-wise convolution manner to generate separate feature maps as discussed herein. Depth-wise-condense-expansion convolution layer <NUM> then applies a point-wise condense convolution (e.g., <NUM> = <NUM>/<NUM>, where <NUM> is the condense factor, 1x1x512 kernels) to generate first combined feature maps (e.g., 8x8x128 data). Finally, depth-wise-condense-expansion convolution layer <NUM> applies a point-wise expansion convolution (e.g., <NUM>1x1x128 kernels) to generate second combined feature maps (e.g., 8x8x512 data). The output of summation and ReLu layer <NUM> and depth-wise-condense-expansion convolution layer <NUM> are the same size. Summation and ReLu layer <NUM> sums the output of summation and ReLu layer <NUM> and depth-wise-condense-expansion convolution layer <NUM> and applies ReLU to generate output data. Pooling layer <NUM> receives the resultant data and provides a pooling (e.g., global average pooling) to generate output features such as an output feature vector, which is provided to softmax module <NUM> and accuracy module <NUM>. Softmax module <NUM> may implement a softmax function to the output feature vector to an output feature vector of values in the range (<NUM>, <NUM>] such that all the entries add up to <NUM>. The resultant output feature vector may be used (e.g., by controller <NUM>) to determine a best match of the output feature vector (e.g., a highest value that also exceeds a threshold) or to determine whether match is found.

Table <NUM> summarizes CNN <NUM>, the number of multiply and add operations (#MAdd), the number of parameters (#Parameters), and the number of residual addition operations (Residual-ADD at each stage. In Table <NUM>, (k, n) indicates a standard convolution, where the first number 'k' indicates the squared 2D kernel size (e.g., k×k) and the 2nd number 'n' indicates the number of output-channels. For example, in Conv11, (<NUM>, <NUM>) indicates 3x3 kernels with <NUM> output channels. Furthermore, <k, n> indicates a depth-wise convolution as discussed herein, where the first number 'k' indicates 2D kernel size and the 2nd number 'n' is the output channel number. For example, <<NUM>, <NUM>> indicates 3x3 2D kernels with <NUM> output channels. As shown in Table <NUM>, each depth-wise convolution is followed by one condense point-wise convolution and one expansion point-wise convolution as discussed herein. In the network, each convolution layer is followed by batch-normalization layer (BN), scaling layer, ReLU activations, which are not shown for clarity of presentation. Furthermore, the presented network has only <NUM> #MAdd and <NUM> #Parameters, which provides significant computational complexity and model compression with respect to prior networks. The accuracy of the networks discussed herein, benchmarked using available object detection data sets provide for <NUM>% accuracy, <NUM>% TPR@FPR=<NUM>% (i.e., number of correct positives while testing <NUM>,<NUM> objects with only <NUM> false alarm), and <NUM>% rank-<NUM> DIR@FAR=<NUM>%.

<FIG> is a flow diagram illustrating an example process <NUM> for training a convolutional neural network including depth-wise-condense-expansion convolutions, arranged in accordance with at least some implementations of the present disclosure. Process <NUM> may include one or more operations <NUM>-<NUM> as illustrated in <FIG>. Process <NUM> may be performed by any device or system discussed herein to train any CNN having depth-wise-condense-expansion convolutions as discussed herein. Process <NUM> or portions thereof may be repeated for any CNN training, training sets, etc. Process <NUM> may be used to train any CNN discussed herein. The parameter weights generated by process <NUM> may be stored to memory and implemented via a processor, for example.

Process <NUM> begins at operation <NUM>, where a training corpus of input images having any characteristics discussed with respect to image data <NUM> are attained. The training corpus or training data may include any suitable corpus of image data <NUM> such as images having objects (e.g., faces) that are to be detected by the CNN labeled with accurate labels as well as false labels. Processing continues at operation <NUM>, where one or more normalized input images are extracted from each of the training images. Such normalization may be performed using any suitable technique or techniques and may match those to be implemented in an implementation phase such as those discussed with respect to detection and normalization module <NUM>. Although discussed with respect to face detection and recognition, any object type may be detected and recognized using the technique discussed herein.

Processing continues at operation <NUM>, where each normalized input image segment (e.g., normalized input image data) attained at operation <NUM> is used to train the CNN. In an embodiment, CNN parameter weights for implementation of the CNN, including filter weights and fully connected layer weights are generated using each image segment based on back propagation training techniques. For example, CNN filter sizes, numbers, strides, and channels may be preformatted or preselected for a multi-stage CNN. For example, any characteristics discussed herein with respect to CNN <NUM>, CNN stage <NUM>, CNN stage <NUM>, CNN <NUM>, or any other CNN with respect to kernel sizes, numbers, pooling characteristics, strides, and channels may be selected.

During training, such CNN characteristics may be used and CNN parameter weights may be trained. for example, the CNN characteristics may be fixed and the CNN parameter weights may be initially randomized to establish random CNN parameter weights. Then, at each training stage, the CNN is applied, in a forward pass, to an image segment that is passed through the entire CNN. The CNN output data are then provided to a loss function using the known object label to define a loss or error using any suitable technique or techniques such as mean squared error. A backward pass through the CNN may then be made to determine weights that contributed the most to the loss or error and modifying them to reduce or minimize the loss or error. The CNN parameter weights are thereby adjusted and processing continues with addition training image segments. Furthermore, some or all training image segments may be used again in an iterative manner. Such processing may continue until a loss target is met for a particular subset of images, after a fixed number of iterations, or the like.

Processing continues at operation <NUM>, where the resultant CNN parameter weights are output. For example, the selected CNN characteristics and resultant CNN parameter weights after training may be stored to memory and/or transmitted to another device for implementation.

<FIG> is a flow diagram illustrating an example process <NUM> for implementing a convolutional neural network having depth-wise-condense-expansion convolutions, arranged in accordance with at least some implementations of the present disclosure. Process <NUM> includes operations <NUM>-<NUM> as illustrated in <FIG>. Process <NUM> forms at least part of a convolutional neural network process. By way of non-limiting example, process <NUM> may form at least part of a face recognition process performed by device <NUM> as discussed herein during an implementation phase of the convolutional neural network. Furthermore, process <NUM> will be described herein with reference to system <NUM> of <FIG>.

<FIG> is an illustrative diagram of an example system <NUM> for implementing a convolutional neural network having depth-wise-condense-expansion convolutions, arranged in accordance with at least some implementations of the present disclosure. As shown in <FIG>, system <NUM> may include one or more central processing units (CPU) <NUM>, a graphics processing unit <NUM>, and memory stores <NUM>. Also as shown, graphics processing unit <NUM> may include or implement face detection and normalization module <NUM>, CNN module <NUM>, and controller <NUM>. Such modules are implemented to perform operations as discussed herein. In the example of system <NUM>, memory stores <NUM> may store input image data, normalized input image data, CNN output data, CNN weighs, CNN kernels, 3D image segment data, CNN characteristics and parameters data, binary neural features, object recognition data, or any other data or data structure discussed herein.

As shown, in some examples, face detection and normalization module <NUM>, CNN module <NUM>, and controller <NUM> are implemented via graphics processing unit <NUM>. In other examples, one or more or portions of face detection and normalization module <NUM>, CNN module <NUM>, and controller <NUM> are implemented via central processing units <NUM> or an image processing unit (not shown) of system <NUM>. In yet other examples, one or more or portions of face detection and normalization module <NUM>, CNN module <NUM>, and controller <NUM> are implemented via an imaging processing pipeline, graphics pipeline, or the like.

Graphics processing unit <NUM> may include any number and type of graphics processing units, that may provide the operations as discussed herein. Such operations may be implemented via software or hardware or a combination thereof. For example, graphics processing unit <NUM> may include circuitry dedicated to manipulate image data, CNN data, etc. obtained from memory stores <NUM>. Central processing units <NUM> may include any number and type of processing units or modules that may provide control and other high level functions for system <NUM> and/or provide any operations as discussed herein. Memory stores <NUM><NUM> may be any type of memory such as volatile memory (e.g., Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), etc.) or non-volatile memory (e.g., flash memory, etc.), and so forth. In a non-limiting example, memory stores <NUM> may be implemented by cache memory. In an embodiment, one or more or portions of face detection and normalization module <NUM>, CNN module <NUM>, and controller <NUM> are implemented via an execution unit (EU) of graphics processing unit <NUM>. The EU may include, for example, programmable logic or circuitry such as a logic core or cores that may provide a wide array of programmable logic functions. In an embodiment, one or more or portions of face detection and normalization module <NUM>, CNN module <NUM>, and controller <NUM> are implemented via dedicated hardware such as fixed function circuitry or the like. Fixed function circuitry may include dedicated logic or circuitry and may provide a set of fixed function entry points that may map to the dedicated logic for a fixed purpose or function. In some embodiments, one or more or portions of face detection and normalization module <NUM>, CNN module <NUM>, and controller <NUM> are implemented via an application specific integrated circuit (ASIC). The ASIC may include an integrated circuitry customized to perform the operations discussed herein.

Returning to discussion of <FIG>, process <NUM> begins at operation <NUM>, where a depth-wise convolution is applied to multiple input feature maps to generate a plurality of separate 2D feature maps such that the input feature maps are associated with input image data. The input image data may be any suitable input image data discussed herein. In an embodiment, the input image data is RGB image data. In an embodiment, the input image data is RGB-D image data. In an embodiment, an input image is normalized to include a detected object that is to be recognized (e.g., a face) to generate the input image data. The input feature maps correspond to the input image data in that the input feature maps are generated by a CNN when processing the input image data. The depth-wise convolution is applied to the input feature maps at any stage of the CNN and the input feature maps may be of any dimensions (e.g., height, width, and channels). The depth-wise convolution is applied using any suitable technique or techniques such that information is not shared across the input channels of the input feature maps. In an embodiment, applying the depth-wise convolution comprises a number of kernels (e.g., kxkx1 kernels) to each of the input feature maps.

Processing continues at operation <NUM>, where a condense point-wise convolution is applied to the separate 2D feature maps to generate multiple combined feature maps (e.g., first combined feature maps) having a first number of channels. The condense point-wise convolution is applied using any suitable technique or techniques such that information is shared across the channels of the separate 2D feature maps. In the claimed embodiment of the invention, applying the condense point-wise convolution includes applying a first number, n/g, of kernels to the separate 2D feature maps such that g is a condense factor that is greater than <NUM>. In an embodiment, n is the number of kernels applied at operation <NUM> and the number of channels of the input feature maps received at operation <NUM>.

Processing continues at operation <NUM>, where an expansion point-wise convolution is applied to the combined feature maps generated at operation <NUM> to generate multiple combined feature maps (e.g., second combined feature maps) having a second number of channels greater than the first number of channels. The expansion point-wise convolution is applied using any suitable technique or techniques such that information is shared across the channels of the combined feature maps generated at operation <NUM>. In the claimed embodiment of the invention, applying the expansion point-wise convolution includes applying the second number, n, of 1x1x(n/g) kernels to the combined feature maps.

Processing continues at operation <NUM>, where object recognition data is output corresponding to the input image data based at least in part on the combined feature maps generated at operation <NUM>. For example, the CNN may provide further processing to generate CNN output data, which may be used to generate object recognition data. The object recognition data may include any suitable data indicative of an object (e.g., face) being recognized (or not) or indicative of a particular object (e.g., face) being recognized. In an embodiment, the object recognition data includes an indicator of whether the input image data corresponds to a face of a user. In an embodiment, the object recognition data includes a label corresponding to one of a plurality of candidate faces.

As discussed, the combined feature maps generated at operation <NUM> may be further processed by the CNN. In an embodiment, process <NUM> further includes performing a residual connection by adding the input feature maps received at operation <NUM> and the combined feature maps generated at operation <NUM> to generate output feature maps and providing the output feature maps or a second output feature maps corresponding to the output feature maps (e.g., the second output feature maps being generated by further processing the second output feature maps by ReLU or the like) to a second depth-wise convolution of the CNN. In some embodiments, process <NUM> further includes applying, in turn, the second depth-wise convolution, a second condense point-wise convolution, and a second expansion point-wise convolution to the output feature maps or the second output feature maps to generate third output feature maps such that the third output feature maps has a third number of channels greater than the second number of channels discussed above. In an embodiment, the second condense point-wise convolution generates third combined feature maps having a third number of channels, the second expansion point-wise convolution generates fourth combined feature maps having a fourth number of channels and a ratio of the second number of channels to the first number of channels is the same as a ratio of the fourth number of channels to the third number of channels (e.g., both ratios are the condense factor, g). In an embodiment, process <NUM> further includes applying, in turn, a second depth-wise convolution, a second condense point-wise convolution, and a second expansion point-wise convolution to the second combined feature maps to generate third combined feature maps such that the third output feature maps has a third number of channels equal to the second number of channels.

Process <NUM> may provide for generating object (e.g., face) recognition data or object label data based on input image data. Process <NUM> may be repeated any number of times either in series or in parallel for any number of input image data segments, input images, or the like. As discussed, process <NUM> may provide for high quality object recognition results with low computational and memory requirements.

Various components of the systems described herein may be implemented in software, firmware, and/or hardware and/or any combination thereof. For example, various components of devices or systems discussed herein may be provided, at least in part, by hardware of a computing System-on-a-Chip (SoC) such as may be found in a computing system such as, for example, a computer, a laptop computer, a tablet, or a smart phone. For example, such components or modules may be implemented via a multi-core SoC processor. Those skilled in the art may recognize that systems described herein may include additional components that have not been depicted in the corresponding figures.

In addition, any one or more of the operations discussed herein may be undertaken in response to instructions provided by one or more computer program products. Such program products may include signal bearing media providing instructions that, when executed by, for example, a processor, may provide the functionality described herein. The computer program products may be provided in any form of one or more machine-readable media. Thus, for example, a processor including one or more graphics processing unit(s) or processor core(s) may undertake one or more of the blocks of the example processes herein in response to program code and/or instructions or instruction sets conveyed to the processor by one or more machine-readable media. A amachine-readable medium conveys software in the form of program code and/or instructions or instruction sets that causes any of the devices and/or systems described herein to implement the discussed operations, modules, or components discussed herein.

As used in any implementation described herein, the term "module" refers to any combination of software logic, firmware logic, hardware logic, and/or circuitry configured to provide the functionality described herein. The software may be embodied as a software package, code and/or instruction set or instructions, and "hardware", as used in any implementation described herein, may include, for example, singly or in any combination, hardwired circuitry, programmable circuitry, state machine circuitry, fixed function circuitry, execution unit circuitry, and/or firmware that stores instructions executed by programmable circuitry. The modules may, collectively or individually, be embodied as circuitry that forms part of a larger system, for example, an integrated circuit (IC), system on-chip (SoC), and so forth.

<FIG> is an illustrative diagram of an example system <NUM>, arranged in accordance with at least some implementations of the present disclosure. In various implementations, system <NUM> may be a computing system although system <NUM> is not limited to this context. For example, system <NUM> may be incorporated into a personal computer (PC), laptop computer, ultra-laptop computer, tablet, phablet, touch pad, portable computer, handheld computer, palmtop computer, personal digital assistant (PDA), cellular telephone, combination cellular telephone/PDA, television, smart device (e.g., smart phone, smart tablet or smart television), mobile internet device (MID), messaging device, data communication device, peripheral device, gaming console, wearable device, display device, all-in-one device, two-in-one device, and so forth.

In various implementations, system <NUM> includes a platform <NUM> coupled to a display <NUM>. Platform <NUM> may receive content from a content device such as content services device(s) <NUM> or content delivery device(s) <NUM> or other similar content sources such as a camera or camera module or the like. A navigation controller <NUM> including one or more navigation features may be used to interact with, for example, platform <NUM> and/or display <NUM>. Each of these components is described in greater detail below.

In various implementations, platform <NUM> may include any combination of a chipset <NUM>, processor <NUM>, memory <NUM>, antenna <NUM>, storage <NUM>, graphics subsystem <NUM>, applications <NUM><NUM> and/or radio <NUM>. Chipset <NUM> may provide intercommunication among processor <NUM>, memory <NUM>, storage <NUM>, graphics subsystem <NUM>, applications <NUM> and/or radio <NUM>. For example, chipset <NUM> may include a storage adapter (not depicted) capable of providing intercommunication with storage <NUM>.

Processor <NUM> may be implemented as a Complex Instruction Set Computer (CISC) or Reduced Instruction Set Computer (RISC) processors, x86 instruction set compatible processors, multi-core, or any other microprocessor or central processing unit (CPU). In various implementations, processor <NUM> may be dual-core processor(s), dual-core mobile processor(s), and so forth.

Memory <NUM> may be implemented as a volatile memory device such as, but not limited to, a Random Access Memory (RAM), Dynamic Random Access Memory (DRAM), or Static RAM (SRAM).

Storage <NUM> may be implemented as a non-volatile storage device such as, but not limited to, a magnetic disk drive, optical disk drive, tape drive, an internal storage device, an attached storage device, flash memory, battery backed-up SDRAM (synchronous DRAM), and/or a network accessible storage device. In various implementations, storage <NUM> may include technology to increase the storage performance enhanced protection for valuable digital media when multiple hard drives are included, for example.

Graphics subsystem <NUM> may perform processing of images such as still images, graphics, or video for display. Graphics subsystem <NUM> may be a graphics processing unit (GPU), a visual processing unit (VPU), or an image processing unit, for example, In some examples, graphics subsystem <NUM> may perform scanned image rendering as discussed herein. An analog or digital interface may be used to communicatively couple graphics subsystem <NUM> and display <NUM>. For example, the interface may be any of a High-Definition Multimedia Interface, DisplayPort, wireless HDMI, and/or wireless HD compliant techniques. Graphics subsystem <NUM> may be integrated into processor <NUM> or chipset <NUM>. In some implementations, graphics subsystem <NUM> may be a stand-alone device communicatively coupled to chipset <NUM>.

The image processing techniques described herein may be implemented in various hardware architectures. For example, image processing functionality may be integrated within a chipset. Alternatively, a discrete graphics and/or image processor and/or application specific integrated circuit may be used. As still another implementation, the image processing may be provided by a general purpose processor, including a multi-core processor. In further embodiments, the functions may be implemented in a consumer electronics device.

Radio <NUM> may include one or more radios capable of transmitting and receiving signals using various suitable wireless communications techniques. Such techniques may involve communications across one or more wireless networks. Example wireless networks include (but are not limited to) wireless local area networks (WLANs), wireless personal area networks (WPANs), wireless metropolitan area network (WMANs), cellular networks, and satellite networks. In communicating across such networks, radio <NUM> may operate in accordance with one or more applicable standards in any version.

In various implementations, display <NUM> may include any flat panel monitor or display. Display <NUM> may include, for example, a computer display screen, touch screen display, video monitor, television-like device, and/or a television. Display <NUM> may be digital and/or analog. In various implementations, display <NUM> may be a holographic display. Also, display <NUM> may be a transparent surface that may receive a visual projection. Such projections may convey various forms of information, images, and/or objects. For example, such projections may be a visual overlay for a mobile augmented reality (MAR) application. Under the control of one or more software applications <NUM>, platform <NUM> may display user interface <NUM> on display <NUM>.

In various implementations, content services device(s) <NUM> may be hosted by any national, international and/or independent service and thus accessible to platform <NUM> via the Internet, for example. Content services device(s) <NUM> may be coupled to platform <NUM> and/or to display <NUM>. Platform <NUM> and/or content services device(s) <NUM> may be coupled to a network <NUM> to communicate (e.g., send and/or receive) media information to and from network <NUM>. Content delivery device(s) <NUM> also may be coupled to platform <NUM> and/or to display <NUM>.

In various implementations, content services device(s) <NUM> may include a cable television box, personal computer, network, telephone, Internet enabled devices or appliance capable of delivering digital information and/or content, and any other similar device capable of uni-directionally or bi-directionally communicating content between content providers and platform <NUM> and/display <NUM>, via network <NUM> or directly. It will be appreciated that the content may be communicated uni-directionally and/or bi-directionally to and from any one of the components in system <NUM> and a content provider via network <NUM>. Examples of content may include any media information including, for example, video, music, medical and gaming information, and so forth.

Content services device(s) <NUM> may receive content such as cable television programming including media information, digital information, and/or other content. Examples of content providers may include any cable or satellite television or radio or Internet content providers. The provided examples are not meant to limit implementations in accordance with the present disclosure in any way.

In various implementations, platform <NUM> may receive control signals from navigation controller <NUM> having one or more navigation features. The navigation features of navigation controller <NUM> may be used to interact with user interface <NUM>, for example. In various embodiments, navigation controller <NUM> may be a pointing device that may be a computer hardware component (specifically, a human interface device) that allows a user to input spatial (e.g., continuous and multi-dimensional) data into a computer. Many systems such as graphical user interfaces (GUI), and televisions and monitors allow the user to control and provide data to the computer or television using physical gestures.

Movements of the navigation features of navigation controller <NUM> may be replicated on a display (e.g., display <NUM>) by movements of a pointer, cursor, focus ring, or other visual indicators displayed on the display. For example, under the control of software applications <NUM>, the navigation features located on navigation controller <NUM> may be mapped to virtual navigation features displayed on user interface <NUM>, for example. In various embodiments, navigation controller <NUM> may not be a separate component but may be integrated into platform <NUM> and/or display <NUM>. The present disclosure, however, is not limited to the elements or in the context shown or described herein.

In various implementations, drivers (not shown) may include technology to enable users to instantly turn on and off platform <NUM> like a television with the touch of a button after initial boot-up, when enabled, for example. Program logic may allow platform <NUM> to stream content to media adaptors or other content services device(s) <NUM> or content delivery device(s) <NUM> even when the platform is turned "off. " In addition, chipset <NUM> may include hardware and/or software support for <NUM> surround sound audio and/or high definition <NUM> surround sound audio, for example. Drivers may include a graphics driver for integrated graphics platforms. In various embodiments, the graphics driver may comprise a peripheral component interconnect (PCI) Express graphics card.

In various implementations, any one or more of the components shown in system <NUM> may be integrated. For example, platform <NUM> and content services device(s) <NUM> may be integrated, or platform <NUM> and content delivery device(s) <NUM> may be integrated, or platform <NUM>, content services device(s) <NUM>, and content delivery device(s) <NUM> may be integrated, for example. In various embodiments, platform <NUM> and display <NUM> may be an integrated unit. Display <NUM> and content service device(s) <NUM> may be integrated, or display <NUM> and content delivery device(s) <NUM> may be integrated, for example. These examples are not meant to limit the present disclosure.

In various embodiments, system <NUM> may be implemented as a wireless system, a wired system, or a combination of both. When implemented as a wireless system, system <NUM> may include components and interfaces suitable for communicating over a wireless shared media, such as one or more antennas, transmitters, receivers, transceivers, amplifiers, filters, control logic, and so forth. An example of wireless shared media may include portions of a wireless spectrum, such as the RF spectrum and so forth. When implemented as a wired system, system <NUM> may include components and interfaces suitable for communicating over wired communications media, such as input/output (I/O) adapters, physical connectors to connect the I/O adapter with a corresponding wired communications medium, a network interface card (NIC), disc controller, video controller, audio controller, and the like. Examples of wired communications media may include a wire, cable, metal leads, printed circuit board (PCB), backplane, switch fabric, semiconductor material, twisted-pair wire, co-axial cable, fiber optics, and so forth.

Platform <NUM> may establish one or more logical or physical channels to communicate information. The information may include media information and control information. Media information may refer to any data representing content meant for a user. Examples of content may include, for example, data from a voice conversation, videoconference, streaming video, electronic mail ("email") message, voice mail message, alphanumeric symbols, graphics, image, video, text and so forth. Data from a voice conversation may be, for example, speech information, silence periods, background noise, comfort noise, tones and so forth. Control information may refer to any data representing commands, instructions or control words meant for an automated system. For example, control information may be used to route media information through a system, or instruct a node to process the media information in a predetermined manner. The embodiments, however, are not limited to the elements or in the context shown or described in <FIG>.

As described above, system <NUM> may be embodied in varying physical styles or form factors. <FIG> illustrates an example small form factor device <NUM>, arranged in accordance with at least some implementations of the present disclosure. In some examples, system <NUM> may be implemented via device <NUM>. In other examples, other systems, components, or modules discussed herein or portions thereof may be implemented via device <NUM>. In various embodiments, for example, device <NUM> may be implemented as a mobile computing device a having wireless capabilities. A mobile computing device may refer to any device having a processing system and a mobile power source or supply, such as one or more batteries, for example.

Examples of a mobile computing device may include a personal computer (PC), laptop computer, ultra-laptop computer, tablet, touch pad, portable computer, handheld computer, palmtop computer, personal digital assistant (PDA), cellular telephone, combination cellular telephone/PDA, smart device (e.g., smartphone, smart tablet or smart mobile television), mobile internet device (MID), messaging device, data communication device, cameras (e.g. point-and-shoot cameras, super-zoom cameras, digital single-lens reflex (DSLR) cameras), and so forth.

Examples of a mobile computing device also may include computers that are arranged to be implemented by a motor vehicle or robot, or worn by a person, such as a wrist computers, finger computers, ring computers, eyeglass computers, belt-clip computers, arm-band computers, shoe computers, clothing computers, and other wearable computers. In various embodiments, for example, a mobile computing device may be implemented as a smartphone capable of executing computer applications, as well as voice communications and/or data communications. Although some embodiments may be described with a mobile computing device implemented as a smartphone by way of example, it may be appreciated that other embodiments may be implemented using other wireless mobile computing devices as well.

As shown in <FIG>, device <NUM> may include a housing with a front <NUM> and a back <NUM>. Device <NUM> includes a display <NUM>, an input/output (I/O) device <NUM>, a color camera <NUM>, a color camera <NUM>, an infrared transmitter <NUM>, and an integrated antenna <NUM>. In some embodiments, color camera <NUM>, color camera <NUM>, and infrared transmitter <NUM> attain 3D image data as discussed herein. In some embodiments, device <NUM> does not include color camera <NUM> and <NUM> and device <NUM> attains input image data (e.g., RGB input image data) as discussed herein. Device <NUM> also may include navigation features <NUM>. I/O device <NUM> may include any suitable I/O device for entering information into a mobile computing device. Examples for I/O device <NUM> may include an alphanumeric keyboard, a numeric keypad, a touch pad, input keys, buttons, switches, microphones, speakers, voice recognition device and software, and so forth. Information also may be entered into device <NUM> by way of microphone (not shown), or may be digitized by a voice recognition device. As shown, device <NUM> may include color cameras <NUM>, <NUM>, infrared transmitter <NUM>, and a flash <NUM> integrated into back <NUM> (or elsewhere) of device <NUM>. In other examples, color cameras <NUM>, <NUM>, infrared transmitter <NUM>, and flash <NUM> may be integrated into front <NUM> of device <NUM> or both front and back sets of cameras may be provided. Color cameras <NUM>, <NUM> and a flash <NUM> may be components of a camera module to originate color image data with IR texture correction that may be processed into an image or streaming video that is output to display <NUM> and/or communicated remotely from device <NUM> via antenna <NUM> for example.

Aspects of the claimed embodiment are implemented by representative instructions stored on a machine-readable medium which represents various logic within the processor, which when read by a machine causes the machine to fabricate logic to perform the techniques described herein. Such representations, known as IP cores may be stored on a tangible, machine readable medium and supplied to various customers or manufacturing facilities to load into the fabrication machines that actually make the logic or processor.

Claim 1:
A computer-implemented method (<NUM>) for outputting object recognition data by implementing a convolutional neural network, CNN, comprising:
applying (<NUM>) a depth-wise convolution to a plurality of input feature maps (<NUM>, <NUM>) to generate a plurality of separate 2D feature maps (<NUM>, <NUM>), wherein the plurality of input feature maps (<NUM>, <NUM>) is associated with input image data, the plurality of input feature maps (<NUM>, <NUM>) having n channels;
applying (<NUM>) a condense point-wise convolution to the plurality of separate 2D feature maps (<NUM>, <NUM>) to generate a first plurality of combined feature maps (<NUM>, <NUM>), wherein the first plurality of combined feature maps (<NUM>, <NUM>) has a first number of channels, the first number of channels being n/g channels, where g is a condense factor that reduces the number of channels and where is greater than <NUM>;
applying (<NUM>) an expansion point-wise convolution to the first plurality of combined feature maps (<NUM>, <NUM>) to generate a second plurality of combined feature maps (<NUM>, <NUM>), wherein the second plurality of combined feature maps (<NUM>, <NUM>) has a second number of channels greater than the first number of channels, the second number of channels is equal to n channels; and
outputting (<NUM>) object recognition data corresponding to the input image data based at least in part on the second plurality of combined feature maps (<NUM>, <NUM>).