Patent Description:
In recent years, in various scenes, an image analysis is performed for detecting, tracking, estimating attribute, or the like of an object using an image captured by a monitoring camera, and image processing is performed such as estimating the number of objects based on a result of such an image analysis. Heretofore, such image processing has been performed by a high-performance computation apparatuses such as a PC or a server that executes actual image processing for a video which is taken by a monitoring camera and is transferred to the high-performance computation apparatuses. In contrast, as a result of improvement in processing ability of mobile computation apparatuses in recent years, image processing can be performed in a monitoring camera. The processing in the monitoring camera (image capturing apparatus) may be executed by a computation apparatus arranged in a monitoring camera body, for example. Also, by attaching a detachable device such as a USB in which a computation apparatus is arranged to a monitoring camera, the detachable device can execute at least a portion of processing performed in the monitoring camera.

Some detachable devices perform image processing operations using power and a clock signal that are supplied by an image capturing apparatus to which the detachable device is attached, as disclosed in <CIT>. However, among apparatuses, such as a PC and a camera, to which the detachable device is attached, there are apparatuses that operate with power supplied by a battery, and such battery-driven apparatuses are equipped with a function of stopping power supply and clock signal supply to the device in a period in which communication with the detachable device is not performed in order to save power, in general. However, if the clock signal supply is stopped, image processing cannot be properly executed in the detachable device. Regarding this issue, in <CIT>, a technique is disclosed in which, when clock signal supply is stopped, the operation is switched to an operation with a clock signal for self-running.

With the technique disclosed in <CIT>, addition of a circuit for detecting that a clock signal is stopped and a configuration for switching to an operation using a clock signal for self-running are needed in the detachable device, and therefore the circuit scale increases. Further prior art is disclosed in <CIT> showing a camera body and interchangeable lens.

Therefore, provided is an image capturing apparatus, to which a detachable device can be attached, that enables returning to a state in which image processing can be continued in the detachable device, even when clock signal supply is stopped, without incurring an increase in the circuit scale of the detachable device.

The present invention in its first aspect provides an image capturing apparatus, a control method of an image processing apparatus, and a computer program as specified in the respective claims.

Note, the following embodiments are not intended to limit the scope of the claimed invention as specified by the claims.

<FIG> shows an exemplary configuration of an image processing system of the present embodiment. The image processing system may be constructed as a system for tracking a specific person by analyzing captured images input from a plurality of image capturing apparatuses <NUM>, for example. Note that the embodiment is not limited to this embodiment, and the image processing system may be constructed as any system that outputs predetermined information by analyzing an image. The image processing system includes image capturing apparatuses 110a to 110d, a network <NUM>, and an input/output apparatus <NUM>. The image capturing apparatuses 110a to 110d each include a slot to and from which a device that can record a captured image can be attached and detached, for example. The detachable devices 100a to 100d are inserted into the respective slots, and the image capturing apparatuses 110a to 110d are connected to the respective detachable devices 100a to 100d. Hereinafter, the detachable devices 100a to 100d may be collectively referred to as a "detachable device <NUM>", and the image capturing apparatuses 110a to 110d may be collectively referred to as an "image capturing apparatus <NUM>". The apparatuses that constitute the system will be described below.

The detachable device <NUM> is a computation device that is configured to be attached to and detached from the image capturing apparatus <NUM>. The detachable device <NUM> can be configured as a device that is realized by mounting a predetermined processing circuit on a nonvolatile semiconductor memory device (e.g., SD card) that is configured to store an image captured by the image capturing apparatus <NUM>, for example. SD card slots are prepared in many existing image capturing apparatuses <NUM> such as network cameras, and therefore an expanded function can be provided to an existing image capturing apparatus <NUM> by connecting the detachable device <NUM> thereto. For example, the detachable device <NUM> is configured to be entirely insertable into the image capturing apparatus <NUM>, depending on the form of the SD card, and with this configuration, can be configured to be connectable to the image capturing apparatus <NUM> in a state in which no portion protrudes from the image capturing apparatus <NUM>.

Also, rather than configuring the detachable device <NUM> as an SD card, the detachable device <NUM> may also be configured to be attached to the image capturing apparatus <NUM> with any interface that is used when a storage apparatus that can store at least an image captured by the image capturing apparatus <NUM> is attached. For example, the detachable device <NUM> may also include a USB (Universal Serial Bus) interface, and be configured to be attached to a USB socket of the image capturing apparatus <NUM>. Moreover, the predetermined processing circuit to be mounted on the detachable device <NUM> can be implemented by afield programmable gate array (FPGA) that is programmed to execute predetermined processing, for example, but may also be implemented in another form.

The image capturing apparatus <NUM> is an image capturing apparatus such as a network camera, and can provide a captured image to the input/output apparatus <NUM> via the network <NUM>. In the present embodiment, the image capturing apparatus <NUM> is assumed to incorporate a computation apparatus that can process a captured image, but there is no limitation to this configuration. For example, an external computer such as a personal computer (PC) that is connected to the image capturing apparatus <NUM> may also be present, and the combination of these apparatuses may also be treated as the image capturing apparatus <NUM>. Also, in the present embodiment, it is assumed that the detachable devices <NUM> are attached to all of the image capturing apparatuses <NUM>, respectively. In <FIG>, four image capturing apparatuses <NUM> and detachable devices that are respectively attached thereto are illustrated, but the number of combinations of these apparatuses may be three or less, or may be five or more.

As a result of attaching the detachable device <NUM>, to the image capturing apparatus <NUM>, that has an image analysis processing function such as image analysis, image analysis or the like can be executed in the image capturing apparatus <NUM>, even though the image capturing apparatus <NUM> does not have an image analysis processing function such as image analysis. A specific example of the analysis processing will be described later. Also, in a mode in which a computation apparatus for image processing is arranged in the image capturing apparatus <NUM>, as in the present embodiment, as a result of attaching a detachable device <NUM> in which a computation apparatus is arranged to the image capturing apparatus <NUM>, it becomes possible to use the computation apparatus of the detachable device <NUM> along with the own computation apparatus of the image capturing apparatus <NUM>, and as a result, the variety and level of image processing that can be executed in the image capturing apparatus <NUM> can be increased.

The input/output apparatus <NUM> is an apparatus for receiving inputs from a user of the system and outputting information to the user (e.g., display of information). In the present embodiment, the input/output apparatus <NUM> can be a computer such as a PC, for example, and as a result of a browser or a native application installed in the computer being executed by the incorporated processor, input/output of information is performed. The image capturing apparatus <NUM> and the input/output apparatus <NUM> are communicably connected via the network <NUM>. The network <NUM> includes a plurality of routers that satisfies a communication standard such as the Ethernet (registered trademark), switches, cables, and the like, for example. In the present embodiment, the network <NUM> may be any network that enables communication between the image capturing apparatus <NUM> and the input/output apparatus <NUM>, and may be constructed with any scale, configuration, and communication standard to which the network is conformable. For example, the network <NUM> may be the Internet, a wired local area network (LAN), a wireless LAN, a wide area network (WAN), or the like. Also, the network <NUM> may be configured to perform communication with a communication protocol conforming to the Open Network Video Interface Forum (ONVIF) standard, for example. Note that there is no limitation to this configuration, and the network <NUM> may also be configured to perform communication with another communication protocol such as the original communication protocol, for example.

Next, an exemplary configuration of the image capturing apparatus <NUM> will be described with reference to <FIG> is a diagram illustrating an exemplary hardware configuration of the image capturing apparatus <NUM>. The image capturing apparatus <NUM> includes an image capturing unit <NUM>, an image processing unit <NUM>, a computation processing unit <NUM>, a distributing unit <NUM>, an SD I/F unit <NUM>, as its hardware configuration, for example. I/F is an abbreviation of interface.

The image capturing unit <NUM> includes a lens unit for forming an image by light and an image sensor for performing analog signal conversion in accordance with light with which an image is formed. The lens unit has a zoom function for adjusting the angle of view, a diaphragm function for adjusting the light amount, and the like. The image sensor has a gain function for performing sensitivity adjustment when light is converted to an analog signal. These functions are adjusted based on setting values notified from the image processing unit <NUM>. The analog signal generated by the image capturing unit <NUM> is converted to a digital signal by an analog to digital conversion circuit, and the digital signal is transferred to the image processing unit <NUM> as an image signal.

The image processing unit <NUM> includes an image processing engine, peripheral devices thereof, and the like. The peripheral device includes random access memory (RAM), I/F drivers, and the like, for example. The image processing unit <NUM> generates image data by performing image processing such as developing processing, filtering processing, sensor correction, noise removal, and the like on the image signal acquired from the image capturing unit <NUM>, for example. Also, the image processing unit <NUM> transmits setting values to the lens unit and the image sensor, and may execute exposure adjustment such that an appropriate exposure image can be acquired. The image data generated by the image processing unit <NUM> is transferred to the computation processing unit <NUM>.

The computation processing unit <NUM> includes one or more processors such as CPU and MPU, memories such as RAM and ROM, I/F drivers, and the like. Note that CPU is an acronym of Central Processing Unit, MPU is an acronym of Micro Processing Unit, and ROM is an acronym of Read Only Memory. The computation processing unit <NUM> executes various types of processing such as control and computation that are needed for the operations of the image capturing apparatus <NUM>. Also, in one example, assignment of portions of processing to be executed in the system described above to the image capturing apparatus <NUM> and the detachable device <NUM> for execution is determined, and the image capturing apparatus <NUM> and the detachable device <NUM> may execute the processing according to the determined assignment. The details of the processing contents and the assignment of processing will be described below. An image received from the image processing unit <NUM> is transferred to the distributing unit <NUM> or the SD I/F unit <NUM>. Also, the processing result data is also transferred to the distributing unit <NUM>.

The distributing unit <NUM> includes a network distribution engine and peripheral devices such as RAM and an ETH PHY module, for example. The ETH PHY module is a module for executing processing of the Ethernet physical (PHY) layer. The distributing unit <NUM> coverts the image data and processing result acquired from the computation processing unit <NUM> to a format for enabling distribution to the network <NUM>, and outputs the converted data to the network <NUM>.

The SD I/F unit <NUM> is an interface portion for connection with the detachable device <NUM>, and includes a mounting part such as a socket for attachment/detachment of a power supply and the detachable device <NUM>, for example. Here, it is assumed that the SD I/F unit <NUM> is configured following the SD standard defined by the SD Association. The communication between the detachable device <NUM> and the image capturing apparatus <NUM> such as transferring an image acquired from the computation processing unit <NUM> to the detachable device <NUM> and acquiring data from the detachable device <NUM> is performed through the SD I/F unit <NUM>.

Next, an exemplary functional configuration of the image capturing apparatus <NUM> will be described with reference to <FIG>. The image capturing apparatus <NUM> includes an image capturing control unit <NUM>, a signal processing unit <NUM>, a storing unit <NUM>, a control unit <NUM>, an analyzing unit <NUM>, a device communication unit <NUM>, and a network communication unit <NUM>, as its functional units.

The image capturing control unit <NUM> corresponds to the one or more processors such as CPU and MPU in the computation processing unit <NUM>, and executes control to capture images of the surrounding environment via the image capturing unit <NUM>. The signal processing unit <NUM> corresponds to the image processing unit <NUM>, and generates captured image data by performing predetermined processing on an image captured by the image capturing control unit <NUM>. In the following, the captured image data is simply referred to as a "captured image". The signal processing unit <NUM> encodes the image captured by the image capturing control unit <NUM>, for example. The signal processing unit <NUM> encodes still images using an encoding system such as the Joint Photographic Experts Group (JPEG), for example. Also, the signal processing unit <NUM> encodes moving images using an encoding system such as H. <NUM>/MPEG-<NUM> AVC (referred to as "H. <NUM>" below) or high efficiency video coding (HEVC). Also, the signal processing unit <NUM> may encode images using an encoding system selected by a user from a plurality of preset encoding systems, via an operation unit (unshown) of the image capturing apparatus <NUM>, for example.

The storing unit <NUM> corresponds to various storage apparatuses included in the image processing unit <NUM> and the computation processing unit <NUM>, and stores a list of analysis processing that can be executed in the analyzing unit <NUM> and a list of postprocessing for analysis processing results. Note that, in the present embodiment, the image processing to be executed is analysis processing, but any processing may also be executed, and the storing unit <NUM> stores an analysis processing list and a postprocessing list regarding processing related to the processing to be executed.

The control unit <NUM> corresponds to one or more processors such as CPU and MPU in the computation processing unit <NUM>, and controls the signal processing unit <NUM>, the storing unit <NUM>, the analyzing unit <NUM>, the device communication unit <NUM>, and the network communication unit <NUM> such that each of them executes predetermined processing.

The analyzing unit <NUM> corresponds to one or more processors such as CPU and MPU in the computation processing unit <NUM>, and selects image processing to be executed on a captured image from at least any of preprocessing for analysis, analysis processing, and postprocessing for analysis, which will be described later, and executes the selected image processing. The preprocessing for analysis is image processing to be executed on a captured image before executing the later-described analysis processing. It is assumed that, in the preprocessing for analysis of the present embodiment, processing for creating divided images by dividing a captured image is to be executed, as an example. The analysis processing is image processing for analyzing an input image and outputting information obtained by the analysis.

It is assumed that, in the analysis processing of the present embodiment, processing is executed in which at least any of human body detection processing, face detection processing, and vehicle detection processing is executed using the divided images obtained by the preprocessing for analysis as an input, and the analysis processing result is output, as an example. The analysis processing may be image processing configured to output the position of an object included in divided images using a machine learning model subjected to learning so as to be able to detect an object included in an image using a technique described in "<NPL>", for example.

That is, the image processing includes analysis processing using a trained neural network that can perform feature extraction for detecting a predetermined object. The postprocessing for analysis is image processing that is executed after the analysis processing has been executed. It is assumed that, in the postprocessing for analysis of the present embodiment, image processing is executed in which a value obtained by adding up the number of objects detected in divided images is output as the processing result, based on the results of analysis processing performed on the divided images, for example. Note that the analysis processing may also be processing in which an object in an image is detected by performing pattern matching, and the position of the object is output.

The device communication unit <NUM> corresponds to the SD I/F unit <NUM>, performs communication with the detachable device <NUM>, and supplies a clock signal for generating a later-described clock signal for processing to the detachable device <NUM>. The device communication unit <NUM> converts the format of input data to a format that the detachable device <NUM> can process, and transmits the data obtained by the conversion to the detachable device <NUM>. Also, the device communication unit <NUM> receives data from the detachable device <NUM>, and converts the format of the received data to a format that the image capturing apparatus <NUM> can process. In the present embodiment, it is assumed that the device communication unit <NUM> executes processing for converting decimals between a floating point format and a fixed point format, but there is no limitation to this type of processing, and another processing may also be executed by the device communication unit <NUM>. Also, in the present embodiment, it is assumed that the device communication unit <NUM> performs communication with the detachable device <NUM> by transmitting a request (or, command, command sequence) determined in advance in the range of the SD standard to the detachable device <NUM>, and receiving a response from the detachable device <NUM>. The network communication unit <NUM> corresponds to the distributing unit <NUM>, and performs communication with the input/output apparatus <NUM> via the network <NUM>.

Next, an exemplary hardware configuration of the detachable device <NUM> will be described with reference to <FIG>. The detachable device <NUM> includes an I/F unit <NUM>, an FPGA <NUM>, an SD controller <NUM>, and a storing unit <NUM>, for example. It is assumed that the detachable device <NUM> is formed with a shape for enabling insertion and removal to and from the socket of the SD I/F unit <NUM> included in the image capturing apparatus <NUM>, that is, formed with a shape conforming to the SD standard.

The I/F unit <NUM> is an interface portion for connecting the detachable device <NUM> to an apparatus such as the image capturing apparatus <NUM>. The I/F unit <NUM> includes electrical contact terminals and the like, receives supply of power from the image capturing apparatus <NUM>, and generates and distributes power supplies to be used in the detachable device <NUM>, for example. It is assumed that, similarly to the SD I/F unit <NUM> of the image capturing apparatus <NUM>, regarding items defined in the SD standard, the I/F unit <NUM> follows (in conformity to) the definitions. Reception of images and setting data from the image capturing apparatus <NUM> and transmission of data from the FPGA <NUM> to the image capturing apparatus <NUM> are executed via the I/F unit <NUM>.

The FPGA <NUM> includes an input/output control unit <NUM>, a processing switching unit <NUM>, and a computation processing unit <NUM>. The FPGA <NUM> is one type of semiconductor device whose internal logic circuit structure can be repeatedly reconfigured. A processing function can be added (provided) to an apparatus on which the detachable device <NUM> is mounted by processing realized by the FPGA <NUM>. Also, with the reconfiguring function of the FPGA <NUM>, the logic circuit structure can be changed later, and therefore, by attaching the detachable device <NUM> to an apparatus in a field in which technical advancement is rapid, the apparatus can execute appropriate processing at an appropriate time, for example.

In the present embodiment, an example in which an FPGA is used is described, but a general-purpose ASIC or a dedicated LSI may also be used, as long as later-describing processing can be realized, for example. The FPGA <NUM> is started by writing into setting data including information regarding the logic circuit structure to be generated from a dedicated I/F, or by reading out the setting data from the dedicated I/F. In the present embodiment, it is assumed that the setting data is retained in the storing unit <NUM>. Upon turning on a power supply, the FPGA <NUM> reads out the setting data from the storing unit <NUM>, generate a logic circuit, and then starts. Note that there is no limitation to this configuration, and a configuration may also be adopted in which, by implementing a dedicated circuit in the detachable device, the image capturing apparatus <NUM> writes setting data into the FPGA <NUM> via the I/F unit <NUM>, for example.

The input/output control unit <NUM> includes a circuit for transmitting and receiving images to and from the image capturing apparatus <NUM>, a circuit for analyzing a command received from the image capturing apparatus <NUM>, a circuit for performing control based on the analyzed result, and the like. The commands here are defined in the SD standard, and the input/output control unit <NUM> can detect some of the defined commands. The details of the functions will be described later. The input/output control unit <NUM> performs control such that, in the case of storing processing, an image is transmitted to the SD controller <NUM>, and in the case of image analysis processing, an image is transmitted to the computation processing unit <NUM>. Also, the input/output control unit <NUM>, upon receiving setting data for switching processing, transmits the setting data to the processing switching unit <NUM>.

The processing switching unit <NUM> includes circuits for acquiring information regarding an image processing function from the storing unit <NUM> based on setting data received from the image capturing apparatus <NUM>, and for writing the information into the computation processing unit <NUM>. The information regarding the image processing function is a setting parameter indicating the sequence and type of computation to be processed in the computation processing unit <NUM> and computation coefficients, for example. The computation processing unit <NUM> includes a plurality of computation circuits that are needed to execute the image processing function such as image analysis. The computation processing unit <NUM> executes computation processing based on information regarding the image processing function received from the processing switching unit <NUM>, and transmits the processing result to the image capturing apparatus <NUM>, and/or stores the processing result in the storing unit <NUM>.

The FPGA <NUM> extracts setting data of a processing function to be executed that is included in setting data corresponding to a plurality of processing functions that are retained in advance, and rewrites processing contents to be executed by the computation processing unit <NUM> based on the extracted setting data. Accordingly, the detachable device <NUM> can selectively execute at least one of the plurality of processing functions. Also, as a result of adding setting data for processing that is newly added as appropriate, latest processing can be executed in the image capturing apparatus <NUM>. Note that, in the following, the fact that a plurality of pieces of setting data respectively corresponding to the plurality of processing functions are included is expressed as including the plurality of processing functions. That is, even in a state in which the FPGA <NUM> of the detachable device <NUM> is configured to execute one processing function, if the processing contents of the computation processing unit <NUM> can be changed with setting data for another processing function, this fact is expressed as including a plurality of processing functions. The clock signal counter <NUM> will be described in detail in a second embodiment.

The SD controller <NUM> is a known control integrated circuit (IC) such as one defined in the SD standard, and executes control of a slave operation according to the SD protocol, and data read/write control for storing unit <NUM>. The storing unit <NUM> is constituted by a NAND-type flash memory, for example, and stores various types of information such as storage data written into by the image capturing apparatus <NUM>, information regarding an image analysis processing function to be written into the computation processing unit <NUM>, setting data of the FPGA <NUM>, and circuit data for analysis.

Next, an exemplary functional configuration of the detachable device <NUM> will be described with reference to <FIG>. The detachable device <NUM> includes an analyzing unit <NUM>, a communication unit <NUM>, and a storing unit <NUM>, as its functional configuration, for example. The analyzing unit <NUM> executes various types of image processing (computation processing) including analysis processing on an image. The analyzing unit <NUM> corresponds to the FPGA402, and upon receiving input of a setting request of analysis processing from the image capturing apparatus <NUM>, configures setting for entering a state in which the analysis processing is executable, for example. The setting request of analysis processing can include information for designating the type of analysis processing to be made executable, and the analyzing unit <NUM> configures setting for making the type of analysis processing designated by the setting request executable. Also, the analyzing unit <NUM>, upon receiving input of an image, executes the analysis processing that is set to be executable on the input image. The communication unit <NUM> corresponds to the I/F unit <NUM>, and performs communication with the image capturing apparatus <NUM>. The storing unit <NUM> corresponds to the SD controller <NUM> and the storing unit <NUM>, stores image data received from the image capturing apparatus <NUM>, and is also used as a work area for image processing in the analyzing unit <NUM>. In the present embodiment, the configuration is such that the result of analysis processing in the analyzing unit <NUM> is stored as appropriate in the storing unit <NUM>, even in a middle of processing.

In the present embodiment, the types of executable analysis processing include human body detection processing and face detection processing, but the example of executable analysis processing is not limited thereto. For example, the executable analysis processing may also be processing for determining whether or not an input image includes a subject (person, vehicle, object, or the like) stored in the storing unit <NUM> in advance, for example. Specifically, a matching degree between an image feature amount of a person stored in advance and an image feature amount of a person detected from the input image is calculated, and if the matching degree is a threshold value or more, it can be determined that the person stored in advance is present. Also, for the purpose of privacy protection, the executable analysis processing may also be processing of superimposing a predetermined mask image or performing mosaic processing on a person, an object, a region, or the like that has been detected from the input image. Also, the executable analysis processing may also be processing for detecting whether or not a person in an image is performing a specific action, using a learning model that has been subjected to learning regarding the specific action of a person by machine learning. Furthermore, the executable analysis processing may also be processing for determining what type of region is the region in an image. For example, the executable analysis processing may also be processing for determining what type of region is the region in an image using a learning model that has been subjected to learning regarding a building, a road, person, the sky, and the like by machine learning.

As described above, the executable analysis processing can be applied to image analysis processing using machine learning, and also to image analysis processing in which machine learning is not used. Also, the analysis processing described above may also be executed in cooperation with the image capturing apparatus <NUM>, instead of being performed by the detachable device <NUM> independently.

In the present embodiment, the computation processing unit <NUM> in the detachable device <NUM> can execute processing with clock signals supplied from the image capturing apparatus <NUM>, and when the clock signal supply is stopped, enters a state in which the processing will not end. Therefore, the image capturing apparatus <NUM> needs to continue the clock signal supply while the detachable device <NUM> is executing processing. However, when an attempt is made to control the detachable device <NUM> only by software added to the image capturing apparatus <NUM>, existing firmware that controls the I/F unit <NUM> of the image capturing apparatus <NUM> cannot ascertain whether the detachable device is performing image processing. Therefore, when communication is not performed through the I/F unit <NUM>, there is a possibility that, depending on the image capturing apparatus <NUM>, the state will transition to a power saving mode or the like, and the supply of clock signals used for analysis processing will be stopped.

Therefore, in the present embodiment, the image capturing apparatus <NUM> operates so as to maintain the clock signal supply after instructing to execute analysis processing such that the image processing in the detachable device <NUM> will not stop. The details of the processing corresponding to the present embodiment will be described below. First, with reference to <FIG>, an example of processing will be described that is to be executed between the image capturing apparatus <NUM> and the detachable device <NUM> for not causing the clock signal supply needed for image processing to stop. The processing corresponding to the flowchart can be realized, in the image capturing apparatus <NUM>, by one or more processors (CPU, MPU, and the like) that function as the control unit <NUM> executing a corresponding program (stored in a memory that functions as the storing unit <NUM>), for example. Also, in the detachable device <NUM>, the processing corresponding to the flowchart can be realized by the FPGA <NUM> that is started after reading out corresponding setting data from the storing unit <NUM> and generating the logic circuit.

First, in step S601, the control unit <NUM> of the image capturing apparatus <NUM> transmits a captured image on which analysis processing is to be performed to the detachable device <NUM> via the device communication unit <NUM>. In step S611, the communication unit <NUM> of the detachable device <NUM> receives the image. In step S602 next, the control unit <NUM> of the image capturing apparatus <NUM> issues an execution instruction command for commanding execution instruction of processing via the device communication unit <NUM> such that image processing such as analysis processing is started on the captured image. Upon receiving the execution instruction command, in step S612, the analyzing unit <NUM> of the detachable device <NUM> starts the analysis processing. In step S603 next, the control unit <NUM> of the image capturing apparatus <NUM> issues a command for clock signal supply (hereinafter, dummy command or first command) via the device communication unit <NUM>. The communication unit <NUM> of the detachable device <NUM> receives the dummy command in step S613.

In the SD I/F, clock signals continue to be supplied while communication is performed according to the protocol, and therefore the image capturing apparatus <NUM> continues to supply clock signals to the detachable device <NUM>, as a result of continuously issuing the dummy command. The detachable device <NUM> performs analysis processing using clock signals that are supplied when commands and data are communicated. A configuration may also be adopted in which information regarding the clock signals needed until the detachable device <NUM> ends analysis is retained in the storing unit <NUM> of the detachable device <NUM> as described above, and the image capturing apparatus <NUM> reads out the information before starting the analysis. As a result of ascertaining the number of clock signals needed until the end of the analysis, the image capturing apparatus <NUM> can determine the period during which the dummy commands are to be issued, and the timing of requesting the processing result (analysis result). The analyzing unit <NUM> of the detachable device <NUM> counts the number of clock signals received from the image capturing apparatus <NUM>, and in step S614, the analyzing unit <NUM> of the detachable device <NUM> ends the analysis processing at a point in time at which clock signals of a number needed for the analysis processing have been received from the image capturing apparatus <NUM>. Accordingly, a state is achieved in which the analyzing unit <NUM> can output a normal analysis result. In the image capturing apparatus <NUM>, after issuing dummy commands such that the clock signals of at least a number needed for the analysis processing are output, in step S604, the control unit <NUM> issues an output request command for requesting a processing result of the analysis processing via the device communication unit <NUM>, and the detachable device <NUM>, upon receiving the output request command in step S615, transmits a processing result to the image capturing apparatus <NUM> in step S616. In step S605, the image capturing apparatus <NUM> receives the processing result.

As a result of performing the sequence processing above, even in a case where a detachable device is attached to an apparatus that stops the clock signal supply when communication does not occur, as a result of the image capturing apparatus <NUM> issuing dummy commands in a period in which the detachable device <NUM> continues to perform analysis processing, the clock signal supply can be continued, and therefore clock signals continue to be supplied to the analyzing unit <NUM>, and the analysis processing can be normally ended.

The dummy command in the present embodiment may be, when the SD I/F is used, a data read command, or may also be a command for requesting a status response without exchanging data. In the SD I/F, when data communication is performed, a command is communicated in a command line, and data is communicated in a data line. Here, data to be communicated may be dummy data. On the other hand, in the case of communication in which only a status response is requested and data is not communicated, a command is similarly communicated in the command line, but the data line is not used because there is no data exchange. When a read command is used, the number of blocks may be set, in advance, such that the number of clock signals needed to output data of a number of data blocks to be read is similar to the number of clock signals (processing time) needed for the analysis processing. For example, a case where <NUM>,<NUM> clock signals are needed for the analysis processing is considered to be as follows. <NUM> byte-data is read per one block, and therefore when data is read in a setting in which the data line consists of <NUM> bits, <NUM> clock signals are supplied per one block. As a result, if the number of blocks is set to be about <NUM>, the analysis processing that needs <NUM>,<NUM> clock signals is ended. Note that, in actuality, because command communication is performed for each block, it is preferable that the number of clock signals needed for this communication is added.

In the processing in <FIG> described above, when a read command is used, the detachable device <NUM> may return data in which unique data or an identifier indicating that the analysis is ended is embedded in a read data block, at the timing of step S614 at which the analysis processing is ended. Also, when a command for requesting a status response is used, data exchange does not occur, and therefore predetermined data or an identifier indicating that the analysis is ended may also be embedded in an argument of the response. Accordingly, the image capturing apparatus <NUM> can determine that the processing in the detachable device <NUM> is ended by discriminating the unique data in a read data block or the predetermined identifier in an argument of the response, and the processing can be advanced to step S604. As described above, the image capturing apparatus <NUM> can immediately stop issuing a dummy command by detecting data indicating the end of analysis that is embedded in read data or a response, and therefore redundant clock signal supply is prevented, and the time from the analysis start until an analysis result is acquired can be reduced.

An example has been described in which dummy commands are continued to be issued when the SD I/F is used, but when an I/F different from the SD I/F is used, the operation is not limited to this type, and the operation need only be an operation for causing clock signal supply to be continued.

According to the present embodiment, even in a case where a detachable device <NUM> is attached to an image capturing apparatus <NUM> that stops clock signal supply when communication is not performed, the image capturing apparatus <NUM> can continue the clock signal supply by issuing dummy commands while the detachable device <NUM> continues analysis processing. Accordingly, the image capturing apparatus <NUM> can allow the detachable device <NUM> to normally end processing, and acquire a processing result.

In the embodiment described above, a case has been described in which clock signal supply is continued by indiscriminately transmitting dummy commands after starting analysis processing, but in the present embodiment, a case will be described in which whether clock signal supply is performed is determined, and if it is determined that clock signal supply is not performed, dummy commands are transmitted. In the present embodiment, whether or not clock signal supply is performed is determined using a clock counter, or is determined based on an analysis result. These cases will be described specifically described below.

A processing flow for determining whether or not an image capturing apparatus <NUM> stops clock signal supply to a detachable device <NUM> will be described with reference to <FIG>. The processing corresponding to the flowchart can be realized, in the image capturing apparatus <NUM>, by one or more processors (CPU, MPU, and the like) that function as a control unit <NUM> executing a corresponding program (stored in a memory that functions as a storing unit <NUM>), for example. Also, although not described in <FIG>, in the detachable device <NUM>, the processing corresponding to the flowchart can be realized by an FPGA <NUM> that is started after reading out corresponding setting data from a storing unit <NUM> and generating the logic circuit.

In the following, a method in which a clock counter <NUM> is included in the detachable device <NUM> will be described, as an example of determination processing for determining whether or not clock signal supply is performed. Specifically, as shown in <FIG>, the clock signal counter <NUM> for performing counting when a clock signal is supplied from the image capturing apparatus <NUM> is arranged in the FPGA <NUM> in the detachable device <NUM>.

Also, an analyzing unit <NUM> has a clock signal counter function corresponding to the counter circuit, counts the number of received clock signals, and outputs a count value of clock signals in response to a command for requesting the clock signal count value from the image capturing apparatus <NUM>. A storing unit <NUM> stores information such as the number of clock signals needed in a period from start to end of image processing such as analysis processing. The number of clock signals needed for the analysis processing indicates the number of clock signals to be supplied from the image capturing apparatus <NUM> in order for a computation processing unit <NUM> to end processing.

First, in step S701, the control unit <NUM> of the image capturing apparatus <NUM> issues a command for requesting the clock signal count value to the detachable device <NUM> via a device communication unit <NUM>, and reads out the value of the clock signal counter <NUM>. In the detachable device <NUM>, upon receiving the command for requesting the clock signal count value, the input/output control unit <NUM> reads out a current counter value of the clock signal counter <NUM>, and outputs the count value to the image capturing apparatus <NUM> via an I/F unit <NUM>.

In step S702 next, the control unit <NUM> performs waiting (stand-by state) for a predetermined time without issuing commands such that communication is not performed between the image capturing apparatus <NUM> and the detachable device <NUM>. In step S703 next, the control unit <NUM> again issues a command for requesting the clock signal count value, and reads out the value of the clock signal counter <NUM> from the detachable device <NUM>. With this operation, the count value can be read out at timings that are separate by the predetermined time. In the detachable device <NUM>, upon receiving the command for requesting the clock signal count value, the input/output control unit <NUM> again reads out a current counter value of the clock signal counter <NUM>, and outputs the count value to the image capturing apparatus <NUM> via the I/F unit <NUM>.

In step S704 next, the control unit <NUM> compares the clock signal count values that are read out at timings that are separate by the predetermined time in steps S701 and S703, and determines whether the number of clock signal changes by a predetermined amount (increase) in an amount corresponding to the fixed waiting time in step S702. For example, in a case where a high-speed mode (<NUM> clock) of the SD standard is used, when a waiting of <NUM> is inserted, if the count value has increased by about <NUM>,<NUM>, it can be determined that the count value has changed by the predetermined amount, and the clock signal supply from the image capturing apparatus <NUM> to the detachable device <NUM> is continued. On the other hand, if the value has increased by about <NUM>, the change is incurred by exchanging of clock signal count request commands, and it cannot be said that the count value has changed by the predetermined amount. Therefore, in this case, it can be determined that the clock signal supply stops. In the former case, it is estimated that the image capturing apparatus <NUM> continues the clock signal supply even if dummy commands are not supplied, but in the latter case, it is estimated that dummy commands need to be output in order to continue the clock signal supply from the image capturing apparatus <NUM>.

Therefore, in the determination in step S704, if it is determined that the count value has changed by the predetermined amount ("NO" in step S704), the processing is advanced to step S705, and if it is determined that the count value has not changed by the predetermined amount ("YES" in step S704), the processing is advanced to step S709. First, in step S705, the control unit <NUM> of the image capturing apparatus <NUM> transmits a captured image to be analyzed to the detachable device <NUM>, and issues a command for instructing execution of analysis processing on the captured image in step S706. In step S707 next, the control unit <NUM> issues dummy commands, which are for enabling clock signal supply needed for the analysis processing, in an amount corresponding to the number of clock signals needed for the analysis processing. Thereafter, in step S708, the control unit <NUM> issues a command for requesting an analysis result, and acquires the analysis result. Then, by repeating the processing in steps S705 to S708, the analysis processing can be executed by performing clock signal supply to the detachable device <NUM> using dummy commands, even in a case where the clock signal supply is stopped.

On the other hand, in step S709, the control unit <NUM> of the image capturing apparatus <NUM> transmits a captured image to be analyzed to the detachable device <NUM>, and issues a command for instructing execution of analysis processing in step S710. Thereafter, in step S711, the control unit <NUM> waits for a period of time needed for the analysis, then issues a command for requesting an analysis result in step S712, and acquires the analysis result. Then, by repeating the processing in steps S709 to S712, the analysis processing can be executed in the detachable device <NUM> using clock signal supply from the image capturing apparatus <NUM> when the clock signal supply is not stopped.

The response from the detachable device <NUM> in response to the command for requesting the count value transmitted in step S701 or S703 may be a response by a command that does not incur data communication, or may also be a response by data such as a read command. In the description above, requesting is made before starting analysis processing, for the sake of description, but requesting may be made regularly. Also, regarding the timing at which the count value is requested, the request is made in a period in which analysis processing is not executed, in particular, in a period in which communication regarding the analysis processing is not performed such as a period before the analysis is started, and as a result, issuance of a command for analysis processing can be prevented from being interrupted.

Next, a flow of processing for determining whether or not the clock signal is supplied from the image capturing apparatus <NUM> to the detachable device using an analysis result will be described with reference to <FIG>. In <FIG> described above, whether or not the clock signal is supplied is determined using a clock signal counter, but in <FIG>, whether or not the clock signal is supplied is determined using an actual result of analysis performed on a captured image. The processing corresponding to the flowchart can be realized, in the image capturing apparatus <NUM>, by one or more processors (CPU, MPU, and the like) that function as the control unit <NUM> executing a corresponding program (stored in a memory that functions as the storing unit <NUM>), for example. Also, although not described in <FIG>, in the detachable device <NUM>, the processing corresponding to the flowchart can be realized by the FPGA <NUM> that is started after reading out corresponding setting data from the storing unit <NUM> and generating the logic circuit.

First, in step S801, the control unit <NUM> of the image capturing apparatus <NUM> transmits a captured image to be analyzed to the detachable device <NUM>. In step S802 next, the control unit <NUM> issues a command for instructing execution of analysis processing on the transmitted captured image. In the detachable device <NUM>, upon receiving the command for instructing execution of analysis processing after receiving a captured image, the analyzing unit <NUM> starts the analysis processing on the captured image. The control unit <NUM> waits for a predetermined time needed for analysis or more in step S803 next, and in S804, acquires an analysis result by issuing a command for requesting the analysis result. Upon receiving the command for requesting the analysis result, the detachable device <NUM> outputs the result of analysis processing on the captured image performed by the analyzing unit <NUM> at the timing at which the command has been received (even in the middle of analysis) to the image capturing apparatus <NUM>. In the present embodiment, a configuration is adopted in which the result of analysis processing in the analyzing unit <NUM> is successively stored in the storing unit <NUM> even in the middle of processing. Therefore, the analysis result stored in the storing unit <NUM> at the timing at which the command for requesting the analysis result has been received need only be output.

Here, the predetermined time may not be a time needed for completely ending the analysis processing on a captured image, and it is sufficient that the predetermined time is a time for enabling confirmation of a certain change in the analysis result. In step S805, the control unit <NUM> determines whether or not an analysis has been performed in the predetermined time. If the analysis processing has been performed after the analysis processing is started in response to the command for instructing execution in step S802, a predetermined analysis result is considered to be obtained after the predetermined time. For example, if the analysis is ended, an analysis result indicating that the analysis is ended is considered to be obtained, and if the analysis processing is undergoing, a processing result indicating that analysis processing is undergoing is considered to be obtained. However, if the clock signal supply is stopped, and the analysis processing has not been normally performed, such a predetermined analysis result cannot be obtained.

In step S805, if a predetermined analysis result has not been obtained ("NO" in step S805), the processing is advanced to step S806, and if a predetermined analysis result has been obtained ("YES" in step S805), the processing is advanced to step S810. First, in step S806, the control unit <NUM> of the image capturing apparatus <NUM> transmits a captured image to the detachable device <NUM>, and issues a command for instructing execution of analysis processing in step S807. In step S808 next, the control unit <NUM> issues dummy commands, which are for enabling clock signal supply needed for the analysis processing, in an amount corresponding to the number of clock signals needed for the analysis processing. Thereafter, in step S809, the control unit <NUM> issues a command for requesting an analysis result, and acquires the analysis result. Then, by repeating the processing in steps S806 to S809, the analysis processing can be executed by performing clock signal supply to the detachable device <NUM> using dummy commands, even in a case where the clock signal supply is stopped.

On the other hand, in step S810, the control unit <NUM> of the image capturing apparatus <NUM> transmits a captured image to the detachable device <NUM>, and issues a command for instructing execution of analysis processing in step S811. Thereafter, in step S812, the control unit <NUM> waits for a predetermined time needed for the analysis processing, then issues a command for requesting an analysis result in step S813, and acquires the analysis result. Then, by repeating the processing in steps S810 to S813, the analysis processing can be executed using clock signal supply from the image capturing apparatus <NUM> when the clock signal supply is not stopped.

In the processing described above, whether or not clock signal supply is performed is determined by performing requesting of analysis result only once, but the configuration may be such that a request of analysis result is made a plurality of times, and determination is made based on whether or not there is a change in analysis results received in response to the respective requests. Also, determination is made based on whether the analysis processing is ended. Furthermore, it may be determined that the clock signal supply is stopped, when a result of analysis performed on an image to be analyzed outputted is an initial value of the storing unit <NUM> that stores analysis results, or all 0xFF or all 0x00 that cannot be output as the result. Also, it can also be determined that the clock signal supply is stopped, when a result of analysis performed on a previous image to be analyzed that is stored in the storing unit <NUM> is output. It is because of the fact that, in the present embodiment, when the analysis processing is performed, analysis results are successively stored in the storing unit <NUM>, and if the clock signal supply is performed, the result of analysis performed on the previous image to be analyzed cannot remain.

Also, the image to be transmitted in step S801 can be a predetermined image (referred to be a "test image") for which the analysis result is previously known, instead of a captured image in the image capturing apparatus <NUM>. When the content of analysis processing performed on an image that is executed by the detachable device <NUM> is the same, the results of the analysis processing performed on the same image match. Therefore, when an analysis result that is as determined in advance is not returned, it can be estimated that the clock signal is stopped. In the present embodiment, images for which analysis results are known can be stored in the storing unit <NUM> of the image capturing apparatus <NUM> in advance as test images. Also, the analysis results obtained by analyzing test images in advance can also be retained in the storing unit <NUM>.

As described above, in the present embodiment, the configuration is such that after determining whether clock signals are supplied from the image capturing apparatus <NUM> to the detachable device <NUM>, analysis processing is performed on a captured image in a mode corresponding to the determination result. Accordingly, in a system in which clock signals are supplied even in a case where communication is not performed through the SD I/F, issuance processing of dummy commands can be omitted while processing is being performed, and therefore the processing load can be reduced.

The present invention is not limited to the above embodiments and various changes and modifications can be made within the scope of the present invention. Therefore, to apprise the public of the scope of the present invention, the following claims are made.

Embodiments of the present invention can also be realized by a computer of a system or apparatus that reads out and executes computer executable instructions (e.g., one or more programs) recorded on a storage medium (which may also be referred to more fully as a 'non-transitory computer-readable storage medium') to perform the functions of one or more of the above-described embodiments and/or that includes one or more circuits (e.g., application specific integrated circuit (ASIC)) for performing the functions of one or more of the above-described embodiments, and by a method performed by the computer of the system or apparatus by, for example, reading out and executing the computer executable instructions from the storage medium to perform the functions of one or more of the above-described embodiments and/or controlling the one or more circuits to perform the functions of one or more of the above-described embodiments.

Claim 1:
An image capturing apparatus (<NUM>) including a mounting part for enabling attachment and detachment of a device (<NUM>), comprising:
generating means (<NUM>) for generating a command;
supplying means (<NUM>) for supplying clock signals to the device for the device to execute analysis processing; and
communicating means (<NUM>) for, in a state where a device having a function of executing the analysis processing is attached to the mounting part, transmitting an image to the device, transmitting an execution instruction for executing the analysis processing on the image to the device, and receiving a processing result obtained according to the execution instruction from the device,
determining means (<NUM>) for determining whether or not the analysis processing on the image is ended in the device;
characterized in that
the supplying means stop the supplying the clock signals to the device in a first period while a communication is not performed between the image capturing apparatus and the device;
the communicating means continuously transmit the command to the device after transmitting the execution instruction and at least in a second period until the determining means determines that the analysis processing performed on the image is ended in the device, thereby preventing clock signal supply needed for the analysis processing to stop.