Patent Description:
With development of a passive optical network (passive optical network, PON) technology, fiber to the home (fiber to the home, FTTH) or fiber to the curb (fiber to the curb, FTTC) has become a mainstream technology for high-bandwidth home access worldwide. A PON architecture includes an optical line termination (optical line termination, OLT) OLT, an optical distribution network (optical distribution network, ODN), and an optical network unit (optical network unit, ONU). One OLT may be connected to a plurality of ONUs through the ODN, and each ONU may be connected to a plurality of terminal devices.

The OLT is a core component of a PON. The OLT is connected to a network-side device (for example, a switch or a router) at an upper layer, and is connected to one or more ODNs at a lower layer. One OLT may provide a plurality of PON interfaces. A conventional OLT (including a centralized OLT and a distributed OLT) uses a plug-in frame structure and usually includes a line card and a main control board/network board used for centralized forwarding or centralized switching. However, the OLT solution is complex and costly. Another OLT uses a system on chip (system on chip, SOC) with a small capacity. The SOC usually includes one chip, but has a small quantity of ports and small traffic. <CIT> discloses methods and apparatuses facilitating the transition from a legacy network to an upgraded network by providing a converter that communicates between the legacy network and the upgraded network. The convert is provided such that legacy devices (such as ONUs) appear as upgraded devices to the upgraded network, while the upgraded network looks like a legacy network to the legacy devices. <CIT> discloses an OLT system for a PON including a processor, an OLT Medium Access Control (MAC) device communicatively coupled to PON ports, and a switch device communicatively coupled to the OLT MAC device via an Ethernet interface.

It is clear that an existing OLT cannot meet a user requirement, and a new type of OLT is urgently needed.

This application provides an optical processing module and an optical processing apparatus, to simplify the optical processing apparatus and reduce costs. Embodiments not falling within the scope of the claims are exemplary.

According to a first aspect of this application, an optical processing module is provided, including a processing unit.

The optical processing module further includes at least one first interface, at least one second interface, and at least one third interface.

The first interface is used to connect to and communicate with an upper-layer device, the second interface is used to connect to and communicate with a user-side device, and the third interface is used to connect to and communicate with a third interface of another optical processing module.

The processing unit is configured to process, according to a first control instruction, data received from the at least one first interface and the at least one third interface. The first control instruction indicates an actual data bandwidth allocated to the at least one first interface and an actual data bandwidth allocated to the at least one third interface in a downlink direction, and a sum of the actual data bandwidth allocated to the at least one first interface and the actual data bandwidth allocated to the at least one third interface is not greater than a processing capability of the optical processing module.

In an example implementation, that the processing unit is configured to process, according to a first control instruction, data received from the at least one first interface and the at least one third interface includes:
the processing unit is configured to perform at least data parsing, encapsulation, and scheduling on a part or all of the data received from the first interface and the third interface, and send processed data to the user-side device through the at least one second interface.

In another example implementation, that the processing unit is configured to process, according to a first control instruction, data received from the at least one first interface and the at least one third interface includes:
the processing unit is configured to send a part or all of the data received from the first interface and the third interface to another optical processing module through another third interface different from the interface used to receive the data.

In an example implementation, the first interface and the third interface are Ethernet interfaces, and the second interface is a passive optical network PON interface.

In an example implementation, the processing unit is further configured to process, according to a second control instruction, data received from the at least one second interface and the at least one third interface. The second control instruction indicates an actual data bandwidth allocated to the at least one second interface and the actual data bandwidth allocated to the at least one third interface in an uplink direction, and a sum of the actual data bandwidth allocated to the at least one second interface and the actual data bandwidth allocated to the at least one third interface is not greater than the processing capability of the optical processing module.

In an example implementation, that the processing unit is further configured to process, according to a second control instruction, data received from the at least one second interface and the at least one third interface includes:
the processing unit is configured to perform at least data parsing, encapsulation, and scheduling on a part or all of the data received from the second interface and the third interface, and send processed data to the upper-layer device through the at least one first interface.

In another example implementation, that the processing unit is further configured to process, according to a second control instruction, data received from the at least one second interface and the at least one third interface includes:
the processing unit is configured to send a part or all of the data received from the second interface and the third interface to another optical processing module through another third interface different from the interface used to receive the data.

According to a second aspect of this application, an optical processing apparatus is provided, including a plurality of optical processing modules according to any one of the examples above. At least two optical modules in the plurality of optical processing modules are connected through their respective third interfaces.

The optical processing apparatus further includes at least one bandwidth scheduling unit, configured to allocate actual data bandwidths to first interfaces and third interfaces in the plurality of optical processing modules.

In an example implementation, when two optical processing modules are disconnected, the two optical processing modules cannot communicate with each other.

In an example implementation, each optical processing module includes two first interfaces, and the two first interfaces are active/standby interfaces.

This application provides an optical processing module and an optical processing apparatus. The optical processing apparatus includes at least two optical processing modules. The optical processing module includes a processing unit, and further includes at least one first interface, at least one second interface, and at least one third interface. The first interface is used to connect to and communicate with an upper-layer device, the second interface is used to connect to and communicate with a user-side device, the third interface is used to connect to and communicate with a third interface of another optical processing module, and the processing unit is configured to process, according to a first control instruction, data received from the at least one first interface and the at least one third interface. The first control instruction indicates an actual data bandwidth allocated to the at least one first interface and an actual data bandwidth allocated to the at least one third interface in a downlink direction. A plurality of optical processing modules are interconnected to form a high-density box-shaped device or a medium-density box-shaped device. This solution is simple and cost-effective.

Current broadband access technologies are mainly categorized into copper access technologies (for example, various DSL technologies) and an optical access technology. An access network implemented by using the optical access technology is referred to as an optical access network (optical access network, OAN).

A PON is a technology for implementing the optical access network, and the PON is an optical access technology for point-to-multipoint transmission. A system architecture of the PON is shown in <FIG>. In <FIG>, an OLT is configured to provide a network-side interface for the OAN. The OLT is connected to a network-side device (for example, a switch or a router) at an upper layer, and is connected to one or more ODNs at a lower layer.

The ODN includes a passive optical splitter used for optical power allocation, a feeder fiber connected between the passive optical splitter and the OLT, and a distribution fiber connected between the passive optical splitter and an ONU. During downlink data transmission, the ODN transmits downlink data of the OLT to each ONU through the optical splitter. Similarly, during uplink data transmission, the ODN aggregates uplink data of ONUs and transmits aggregated uplink data to the OLT.

The ONU provides a user-side interface for the OAN and is connected to the ODN. If the ONU also provides a user port function, for example, the ONU provides an Ethernet (Ethernet) user port or a plain old telephone service (plain old telephone service, POTS) user port, the ONU is referred to as an optical network termination (optical network termination, ONT).

As shown in <FIG>, a conventional OLT is usually located in a central office (central office, CO), and the CO usually further includes the network-side device. The PON shown in <FIG> is applicable to a scenario in which the ONU and the ONT are deployed in an area such as a city close to the central office.

With popularization of broadband services, more ONUs and ONTs are deployed in a remote area. OLT devices need to be gradually deployed downstream from the central office to a remote area such as a village or a town. <FIG> is a diagram of another possible structure of a PON. As shown in <FIG>, an OLT device is no longer deployed in a central office, but is deployed closer to a device such as an ONT or an ONU. The PON shown in <FIG> may include more OLTs, so that more users in remote areas can access a broadband service.

For ease of understanding this application, several technical terms in this application are first described.

The PON is a point-to-multipoint optical access technology. The PON interface is a port used for data connection in a communications network for which the PON is used. A transmission medium connected to the PON interface is an optical fiber, used to receive or send an optical signal.

Because there are a plurality of types of PONs, for example, an asynchronous transfer mode PON (ATM passive optical network, APON), a broadband PON (broadband passive optical network, BPON), an Ethernet PON (ethernet passive optical network, EPON), a gigabit PON (gigabit passive optical network, GPON), and a <NUM> gigabits per second Ethernet PON (<NUM> ethernet passive optical network, <NUM>-EPON), there may also be a plurality of types of PON interfaces, for example, a GPON interface, an EPON interface, a symmetric <NUM>-GPON interface, an asymmetric <NUM>-GPON interface, <NUM>-EPON interface, a TWDM-PON interface, and another PON interface with a higher working rate that emerges in the future.

It may be understood that different PONs may use different protocols, and signal formats may be different when signals are transmitted by using different PON technologies.

In this application, different types of PON interfaces correspond to different protocols, and a signal that can be identified by and transmitted through the PON interface is a signal encapsulated by using a corresponding protocol. Therefore, if a device includes two PON interfaces of different types, protocol conversion processing needs to be performed on a signal received through one PON interface, and the signal can be sent through the other PON interface only after the signal is encapsulated by using a protocol corresponding to the other PON interface.

In this application, a type of a PON interface identifies a type of an optical access technology used by the PON interface, and also identifies a protocol corresponding to the PON interface.

It may be understood that the PON interface performs communication in a point-to-multipoint manner. For example, as shown in <FIG>, the OLT is connected to a user-side device through a PON interface, and may be connected to a plurality of ONTs through one PON interface. In other words, for a plurality of PON interfaces connecting the OLT to the user-side device in a downlink direction, each PON interface may correspond to a plurality of user-side devices.

The Ethernet (trade mark) is a most widely applied local area network communication mode and is also a protocol. An Ethernet interface (ethernet interface) is a port used for data connection in a network structure for which the Ethernet protocol is used. The Ethernet interface may be used to receive or send a signal, such as an Ethernet frame, for which the Ethernet protocol is used.

The Ethernet interface mentioned in this application may include a plurality of types, for example, at least one of an SC fiber interface, an RJ-<NUM> interface, an FDDI interface, an AUI interface, a BNC interface, and a console interface. A transmission medium connected to the Ethernet interface may include a coaxial cable, a twisted pair, an optical fiber, or the like.

The Ethernet interface performs communication in a point-to-point manner. For example, as shown in <FIG>, a switch is connected to an OLT through an Ethernet interface. When there are a plurality of OLTs, the switch needs to be connected to different OLTs through different Ethernet interfaces. In other words, in a plurality of Ethernet interfaces connecting the switch to the OLTs, each Ethernet interface corresponds to only one OLT.

<FIG> is a schematic diagram of a hardware structure of an optical processing module <NUM> according to this application. As shown in <FIG>, the optical processing module <NUM> includes a processing unit <NUM>, a first interface <NUM>, a second interface <NUM>, and a third interface <NUM>.

It may be understood that <FIG> is merely a schematic diagram of the optical processing module. In another embodiment of this application, the optical processing module <NUM> may further include more first interfaces <NUM>, second interfaces <NUM>, and third interfaces <NUM>. Quantities of the first interfaces <NUM>, the second interfaces <NUM>, and the third interfaces <NUM> that are included in the optical processing module <NUM> are not limited in this application.

The first interface <NUM> is used by the optical processing module <NUM> to connect to and communicate with an upper-layer device (for example, a switch or a router), the second interface <NUM> is used by the optical processing module <NUM> to connect to and communicate with a user-side device (for example, an ODN or an ONU), and the third interface <NUM> is used to connect to and communicate with a third interface of another optical processing module.

The processing unit <NUM> is configured to process, according to a first control instruction, data received from at least one first interface <NUM> and at least one third interface <NUM>. The first control instruction indicates an actual data bandwidth allocated to the at least one first interface <NUM> and an actual data bandwidth allocated to the at least one third interface <NUM> in a downlink direction.

A sum of the actual data bandwidth allocated to the at least one first interface <NUM> and the actual data bandwidth allocated to the at least one third interface <NUM> is not greater than (that is, less than or equal to) a processing capability of the optical processing module <NUM>.

In this embodiment of this application, a bandwidth of an interface of the optical processing module is an amount of data that can pass through the interface in per unit of time (usually <NUM> second), and is usually represented by bps (bit per second), that is, an amount of data that can be transmitted per second. For example, an actual transmission bandwidth of the first interface <NUM> is <NUM> (which is actually <NUM> Mbps, and bps is usually omitted). It indicates that an amount of data that can be transmitted through the first interface <NUM> within <NUM> second (s) is <NUM> MB.

The processing capability of the optical processing module <NUM> may be a size of a data packet that can be processed by the optical processing module <NUM> in per unit of time. For example, an amount of data that can be transmitted by the optical processing module in <NUM> second is <NUM> MB, the actual data bandwidth allocated to the first interface <NUM> is <NUM> Mbps, and the actual data bandwidth allocated to the third interface <NUM> is <NUM> Mbps.

The first control instruction may be sent by a bandwidth scheduling unit in an optical processing apparatus to the optical processing module <NUM>. The optical processing apparatus may include a plurality of optical processing modules, and the optical processing modules connect to and communicate with each other through their respective third interfaces. The bandwidth scheduling unit is configured to allocate an actual transmission bandwidth to each optical processing module in the optical processing apparatus.

The processing unit <NUM> is specifically configured to perform at least data parsing, encapsulation, and scheduling on a part or all of the data received from the first interface <NUM> and the third interface <NUM>, and send processed data to the user-side device through the at least one second interface <NUM>.

The processing unit <NUM> sends a part or all of the data received from the first interface <NUM> and the third interface <NUM> to another optical processing module through another third interface different from the interface used to receive the data.

If the optical processing module <NUM> has only one third interface <NUM>, downlink data received from the first interface <NUM> and the third interface <NUM> can be sent to the user-side device only through the second interface <NUM>.

If the optical processing module has a plurality of third interfaces <NUM>, for the downlink data received from the first interface <NUM> and the third interface <NUM>, a part of the downlink data may be sent to the user-side device through the second interface <NUM>, and the remaining downlink data is sent to another optical processing module through another third interface <NUM> different from the interface used to receive the data, and then is sent to the user-side device by the another optical processing module.

For the downlink data received from the first interface <NUM> and the third interface <NUM>, the processing unit <NUM> determines, based on an actual data bandwidth allocated to each interface and a status of each interface, whether the downlink data is sent through the second interface <NUM> or the third PON interface <NUM>.

The processing unit <NUM> is further configured to process, according to a second control instruction, data received from the at least one second interface <NUM> and the at least one third interface <NUM>. The second control instruction indicates an actual data bandwidth allocated to the at least one second interface <NUM> and an actual data bandwidth allocated to the at least one third interface <NUM> in an uplink direction.

A sum of the actual data bandwidth allocated to the at least one second interface <NUM> and the actual data bandwidth allocated to the at least one third interface <NUM> is not greater than the processing capability of the optical processing module. The second control instruction may be sent by the bandwidth scheduling unit in the optical processing apparatus to the optical processing module <NUM>.

For example, the processing unit <NUM> is configured to perform at least data parsing, encapsulation, and scheduling on a part or all of the data received from the second interface <NUM> and the third interface <NUM>, and send processed data to the upper-layer device through the at least one first interface <NUM>.

The processing unit <NUM> sends a part or all of the data received from the second interface and the third interface to another optical processing module through another third interface different from the interface used to receive the data.

If the optical processing module <NUM> has only one third interface <NUM>, uplink data received from the second interface <NUM> and the third interface <NUM> can be sent to the upper-layer device only through the first interface <NUM>.

If the optical processing module has a plurality of third interfaces <NUM>, for the uplink data received from the second interface <NUM> and the third interface <NUM>, a part of the uplink data may be sent to the user-side device through the second interface <NUM>, and the remaining uplink data is sent to another optical processing module through another third interface <NUM> different from the interface used to receive the data, and then is sent to the upper-layer device by the another optical processing module.

The first interface <NUM> and the third PON interface <NUM> are Ethernet interfaces, and the second interface <NUM> is a PON interface. The Ethernet interface is used to implement a function of processing an Ethernet MAC-layer protocol/processing an Ethernet physical-layer protocol when communicating with the upper-layer device.

The PON interface may include at least one of the following: a GPON interface, an EPON interface, a symmetric <NUM>-GPON interface, an asymmetric <NUM>-GPON interface, a <NUM>-EPON interface, a TWDM-PON interface, or a PON interface with a higher working rate that emerges in the future.

Because a type of the first interface <NUM> and the third interface <NUM> is different from a type of the second interface, the processing unit <NUM> is configured to perform protocol conversion on a received optical signal, so that a processed optical signal is applicable to a sending interface.

The following describes two conversion manners.

In a first manner, protocol conversion is directly performed on the optical signal. In an optional embodiment, during downlink data transmission, the processing unit <NUM> is configured to parse, by using a protocol corresponding to the first interface <NUM>, a first optical signal received from the first interface <NUM>, and encapsulate, by using a protocol corresponding to the second interface <NUM>, a parsed first optical signal, to complete protocol conversion on the first optical signal. During uplink data transmission, the processing unit <NUM> is configured to parse, by using the protocol corresponding to the second interface <NUM>, a second optical signal received from the second interface <NUM>, and encapsulate, by using the protocol corresponding to the first interface <NUM>, a parsed second optical signal, to complete protocol conversion on the second optical signal.

In a second manner, after the optical signal is converted into an electrical signal, protocol conversion is performed on the electrical signal. In an optional embodiment, <FIG> is a schematic diagram of another hardware structure of an optical processing module according to this application. The processing unit <NUM> includes a processor <NUM>, an optical module <NUM>, a first PON MAC chip <NUM>, and a second PON MAC chip <NUM>. The first PON MAC chip <NUM> uses the protocol corresponding to the first interface <NUM>, and the second PON MAC chip <NUM> uses the protocol corresponding to the second interface <NUM>.

During data downlink transmission, the processor <NUM> is specifically configured to: indicate the optical module <NUM> to convert the first optical signal received from the first interface <NUM> into a first electrical signal; indicate the first PON MAC chip <NUM> to perform protocol deframing on the first electrical signal; indicate the second PON MAC chip <NUM> to perform protocol framing on a first electrical signal obtained through protocol deframing; and indicate the optical module <NUM> to perform electrical-to-optical conversion on a first electrical signal obtained through protocol framing, to obtain a processed first optical signal, so as to complete protocol conversion on the first optical signal.

During data uplink transmission, the processor <NUM> is specifically configured to: indicate the optical module <NUM> to convert the second optical signal received from the second interface <NUM> into a second electrical signal; indicate the second PON MAC chip <NUM> to perform protocol deframing on the second electrical signal; indicate the first PON MAC chip <NUM> to perform protocol framing on a second electrical signal obtained through protocol deframing; and indicate the optical module <NUM> to perform electrical-to-optical conversion on a second electrical signal obtained through protocol framing, to obtain a processed second optical signal, so as to complete protocol conversion on the second optical signal.

Referring to <FIG>, the processing unit <NUM> further includes a memory <NUM>. The memory <NUM> is coupled to the processor <NUM>, and is configured to store various software programs and/or a plurality of sets of instructions. Specifically, the memory <NUM> may include a high-speed random access memory, and may also include a non-volatile memory, for example, one or more magnetic disk storage devices, flash memory devices, or other non-volatile solid-state storage devices. The memory <NUM> may store an operating system (which is referred to as a system below), for example, an embedded operating system such as ANDROID, iOS, WINDOWS, or LINUX. The memory <NUM> may further store a network communications program. The network communications program may be used to communicate with one or more optical line terminations, one or more user-side devices, or one or more network-side devices.

The processor <NUM> may be configured to read and execute computer-readable instructions, to complete a function of managing the optical processing module <NUM>, and to parse, control, or process a packet received by the optical processing module <NUM>. Specifically, the processor <NUM> may be configured to invoke the program stored in the memory <NUM>, and execute instructions included in the program. The instructions may be used to implement a signal transmission function of the optical processing module <NUM> in a PON communications network.

The processing unit <NUM> further includes a power management module <NUM>, configured to provide a stable power supply for the optical processing module <NUM>.

In this embodiment of this application, the optical processing module may be implemented by using a single SOC. <FIG> is a schematic diagram of still another hardware structure of an optical processing module according to this application. Referring to <FIG>, from a perspective of a protocol, the SOC may include one or more PON MAC chips configured to process a communication service between the SOC and an upper-layer device. The PON MAC chip is configured to complete a function of processing a PON media access control (media access control, MAC) layer protocol. The SOC may further include a component or a chip configured to implement a forwarding function. The component or the chip may be configured to implement local area network switching (LAN switching, LSW) and forwarding, network processing (network processing, NP), traffic management (traffic management, TM), or the like. The SOC further includes one or more PON MAC chips configured to process a communication service between the SOC and a lower-layer device. The PON MAC chip is configured to complete a function of processing a PON MAC layer protocol.

It may be understood that the optical processing module <NUM> may further include an uplink board, a backplane that provides a physical connection for each unit, a clock, a fan, a fan control unit, and the like.

It should be noted that the optical processing module <NUM> shown in <FIG> is merely an implementation of this application. During actual application, the optical processing module <NUM> may alternatively include more or fewer components. This is not limited herein.

In the foregoing embodiment, the optical processing module <NUM> connects to and communicates with another optical processing module through the third interface <NUM>. A plurality of interconnected optical processing modules constitute an optical processing apparatus. The optical processing apparatus includes at least two optical processing modules shown in <FIG>. The at least two optical processing modules connect to each other through a third interface, and the optical processing apparatus may be an OLT.

Each optical processing module in the optical processing apparatus may send data to the upper-layer device or a terminal-side device through an interface of the optical processing module, or may send data to the upper-layer device or a terminal-side device through an interface of another connected optical processing module.

When two optical processing modules are disconnected, the two optical processing modules cannot communicate with each other. Each optical processing module can send data to the upper-layer device or the terminal-side device only through an interface of the optical processing module.

<FIG> is a schematic diagram of a hardware structure of an optical processing apparatus according to this application. As shown in <FIG>, the optical processing apparatus includes three optical processing modules: an optical processing module <NUM>, an optical processing module <NUM>, and an optical processing module <NUM>, and a bandwidth scheduling unit <NUM>. The optical processing module <NUM>, the optical processing module <NUM>, and the optical processing module <NUM> each include one first interface, one second interface, and two third interfaces.

The optical processing module <NUM>, the optical processing module <NUM>, and the optical processing module <NUM> connect to each other through the third interface, to form a full mesh (full mesh). Any two optical processing modules connect to each other through an independent third interface.

As shown in <FIG>, a third interface <NUM> of the optical processing module <NUM> connects to a third interface <NUM> of the optical processing module <NUM>, a third interface <NUM> of the optical processing module <NUM> connects to a third interface <NUM> of the optical processing module <NUM>, and a third interface <NUM> of the optical processing module <NUM> connects to a third interface <NUM> of the optical processing module <NUM>. The optical processing module <NUM> further includes a first interface A and a second interface a, the optical processing module <NUM> further includes a first interface B and a second interface b, and the optical processing module <NUM> further includes a first interface C and a second interface c.

In this embodiment, each optical processing module can communicate with the other two optical processing modules through the third interface. The bandwidth scheduling unit <NUM> controls communication between a plurality of optical processing modules. The bandwidth control unit <NUM> may be an independent CPU, or may reuse a processing unit in an optical processing module.

The bandwidth scheduling unit <NUM> may allocate actual data bandwidths to first interfaces and third interfaces in the plurality of optical processing modules included in the optical processing apparatus.

The bandwidth scheduling unit <NUM> may determine, based on an interconnection bandwidth of each first interface, oversubscription ratios allowed by different service types, statistics of chip and port traffic (which may be statistics at microseconds (us) level to seconds level, and the like, the actual data bandwidth allocated to the third interfaces in the plurality of optical processing modules.

The bandwidth scheduling unit <NUM> further allocates an actual data bandwidth to the first interface of each optical processing module based on a processing capacity of the optical processing module and an actual data bandwidth allocated to the third interface.

Optionally, the bandwidth scheduling unit <NUM> may alternatively allocate actual data bandwidths to the first interface and the third interface in each optical processing module based on a load status of the optical processing module. For example, when a current load of the optical processing module <NUM> is relatively low, the bandwidth scheduling unit <NUM> allocates more bandwidths to the first interface and the third interface of the optical processing module <NUM>. When a current load of the optical processing module <NUM> is relatively high, the bandwidth scheduling unit <NUM> reduces bandwidths of the first interface and the third interface of the optical processing module <NUM>.

The bandwidth scheduling unit <NUM> allocates the actual data bandwidths to the first interface and the third interface in each optical processing module based on the load status of the optical processing module, so that the optical processing apparatus achieves optimal performance.

In this embodiment, the bandwidth scheduling unit <NUM> may collect statistics at microseconds (us) level to seconds level on traffic of each interface, to perform traffic control at microseconds (us) level to seconds level on the interface.

The optical processing module <NUM> is used as an example. It is assumed that the processing capability of the optical processing module <NUM> is that a size of a data packet that can be processed in <NUM> second is <NUM> MB, an actual data bandwidth allocated to the first interface A is <NUM> Mbps, an actual data bandwidth allocated to the third interface <NUM> is <NUM> Mbps, and an actual data bandwidth allocated to the third interface <NUM> is <NUM> Mbps. When a data packet of <NUM> MB is received from the first interface A, <NUM> MB of the data packet may be sent to a user-side device through the second interface a, and the remaining <NUM> MB of the data packet may be sent to the user-side device through the third interface <NUM> and/or the third interface <NUM>.

In a specific implementation, the optical processing module <NUM> may have a plurality of actual forms. In an optional embodiment, the optical processing module <NUM> may be implemented in a form of a box-shaped device or an integrated device.

<FIG> is a schematic diagram of another hardware structure of an optical processing apparatus according to this application. As shown in <FIG>, in comparison with the optical processing apparatus shown in <FIG>, in the optical processing apparatus in this embodiment, a third interface of each optical processing module is disconnected, and optical processing modules do not connect to each other.

Optionally, each optical processing module includes two first interfaces, and the two first PON interfaces may be active/standby interfaces.

As shown in <FIG>, an optical processing module <NUM> includes two first interfaces A1 and A2, and the optical processing module <NUM> includes one second interface a. An optical processing module <NUM> includes two first interfaces B1 and B2, and the optical processing module <NUM> includes one second interface b. An optical processing module <NUM> includes two first interfaces C1 and C2, and the optical processing module <NUM> includes one second interface c.

In this embodiment, an actual data bandwidth of the first interface of each optical processing module is allocated by a bandwidth scheduling unit.

Claim 1:
An optical processing device, comprising a processor (<NUM>), at least one first interface (<NUM>), at least one second interface (<NUM>), and at least one third interface (<NUM>);
the first interface (<NUM>) is used to connect to and communicate with an upper-layer device, the second interface (<NUM>) is used to connect to and communicate with a user-side device, and the third interface (<NUM>) is used to connect to and communicate with a third interface of another optical processing module; and
the processor (<NUM>) is configured to process, according to a first control instruction, data received from the at least one first interface (<NUM>) and the at least one third interface (<NUM>), wherein the first control instruction indicates an actual data bandwidth allocated to the at least one first interface (<NUM>) and an actual data bandwidth allocated to the at least one third interface (<NUM>) in a downlink direction, and a sum of the actual data bandwidth allocated to the at least one first interface (<NUM>) and the actual data bandwidth allocated to the at least one third interface (<NUM>) is not greater than a processing capability of the optical processing module (<NUM>);
wherein the processing capability of the optical processing module (<NUM>) is the size of a data packet that can be processed by the optical processing module (<NUM>) per unit of time; and
wherein the processor (<NUM>) is configured to send a part or all of the data received from the first interface (<NUM>) and the third interface (<NUM>) to another optical processing module through another third interface different from the interface used to receive the data.