Patent Description:
Many communication receivers require a secure communications channel to receive the RF signal, identify its modulation format and demodulate the RF signal. These RF receivers often incorporate an advanced interference excision circuit that automatically identifies and mitigates both intentional and unintentional interfering signal components, such as static tones, dynamic frequency tones, and modulated RF signals.

For example, it is possible by mistake for a party to broadcast interfering RF signals in the same frequency band that is occupied by other users, which may cause unintentional interference. Others may broadcast in that same frequency band to create intentional interference in an RF receiver to which a transmitted RF communications signal is intended. It often takes an extended time period for the intended recipient to determine who is sending the interfering signal and remove that interfering signal at the RF receiver. Usually the RF receiver incorporates a complex demodulator and remodulator circuit or a narrow band excision circuit, which may operate well with lower-order modulated RF signals, but often do not operate adequately when operating with higher-order RF signals.

A lower-order modulated RF signal, such as a quadrature phase shift key (QPSK) or binary phase shift key (BPSK) modulated signal, includes a low error rate, anti-jamming capability and low complexity, and thus, may be more readily processed at many RF receivers to determine and remove any lower-order interfering RF signal. For that reason, lower-order modulated RF signals are commonly used in intra-satellite communications, GPS navigation systems, and common communication data links. These lower-order modulated RF signals may be processed in more conventional lower-order demodulation circuits that quickly identify the lower-order modulated communication signals and determine the carrier frequency (Fc) and symbol rate (Fs) of any interfering, lower-order RF signal component.

Traditional circuits, such as delay and multiply circuits, may determine the symbol rate and the carrier frequency of lower-order interfering RF signals and may be supplemented by neural networks to determine the signal type. Traditional interference excision systems may remove the determined, interfering lower-order RF signal components. However, these traditional approaches that identify critical characteristics of interfering lower-order signals may not work for higher-order modulation schemes, for example, <NUM>-PSK RF signals, because of the intermodulation and multiplication of the signal and noise, which causes the noise floor to grow. As a result, it may be more difficult to discern the rate lines that are used to determine the center carrier frequency and symbol rate. This difficulty occurs with most other higher-order modulation schemes.

Further technological background is disclosed in the documents <NPL> and <NPL>.

Additionally, the document <CIT> an example for an RF receiver using PSK or QPSK.

Further emboniments are defined by the dependent claims.

In general, a Radio Frequency (RF) receiver may include a lower-order phase shift keying (PSK) demodulation circuit configured to generate at least one locking parameter when performing a lower-order PSK demodulation of an RF receive signal that includes an interfering PSK signal component. A higher-order PSK demodulation circuit may have a higher order than the lower-order PSK demodulation circuit, and may be configured to lock to the RF receive signal using the at least one locking parameter from the lower-order PSK demodulation circuit. The higher-order PSK modulation circuit may perform the higher-order PSK demodulation of the RF receive signal based upon locking to the RF receive signal to determine the interfering PSK signal component.

The RF receiver may include an interference removal circuit configured to remove the determined interfering PSK signal component from the RF receive signal. The lower-order PSK demodulation circuit may comprise a demodulator and a remodulator coupled thereto. The demodulator may comprise a first phase shifter, a detector coupled downstream from the first phase shifter, and a phase loop coupled between the detector and first phase shifter. The remodulator may comprise a second phase shifter, and a controller coupled thereto.

The at least one locking parameter may comprise a carrier frequency of the RF receive signal, and in another example, may comprise a symbol rate of the RF receive signal, or both. The lower-order PSK demodulation circuit may comprise one of a BPSK and QPSK demodulation circuit, for example. The higher-order PSK demodulation circuit may comprise one of an <NUM> PSK, <NUM> PSK, and <NUM> QAM demodulation circuit.

Another aspect is directed to a method for Radio Frequency (RF) reception that may comprise operating a lower-order phase shift keying (PSK) demodulation circuit to generate at least one locking parameter when performing a lower-order PSK demodulation of an RF receive signal that includes an interfering PSK signal component. The method may further include operating a higher-order PSK demodulation circuit, which has a higher order than the lower-order PSK demodulation circuit, to lock to the RF receive signal using the at least one locking parameter from the lower-order PSK demodulation circuit, and perform the higher-order PSK demodulation of the RF receive signal based upon locking to the RF receive signal to determine the interfering PSK signal component.

The present description is made with reference to the accompanying drawings, in which exemplary embodiments are shown. However, many different embodiments may be used, and thus, the description should not be construed as limited to the particular embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

Referring initially to <FIG>, a radio frequency (RF) receiver is illustrated generally at <NUM> and receives, for example, an RF signal such as a higher-order modulated communications signal from a first satellite <NUM>. Examples of this higher-order modulated communications signal include an <NUM>-PSK (phase shift keyed), <NUM>-PSK, or <NUM>-QAM (quadrature amplitude modulated), <NUM> QAM, <NUM> QAM, <NUM> QAM, and other higher order modulated signals. The RF receiver <NUM> may receive an interfering signal from another source such as the illustrated second satellite <NUM> or other sources of RF transmission on the ground or in the air. In an example, two or more transmitters may be on the ground, which transmits the signals to the satellite <NUM>, which retransmits the jammed signal. This interfering signal is to be determined and removed. The RF receiver <NUM> includes a lower-order phase shift keying (PSK) demodulation circuit <NUM> that is configured to generate at least one locking parameter when performing a lower-order PSK demodulation of the RF receive signal, which includes the interfering PSK signal component transmitted in this example from the second satellite <NUM>.

A higher-order PSK demodulation circuit <NUM> is coupled to the lower-order PSK demodulation circuit <NUM> and has a higher order than the lower-order PSK demodulation circuit and is configured to lock to the RF receive signal using the at least one locking parameter from the lower-order PSK demodulation circuit. This higher-order PSK demodulation circuit <NUM> performs the higher-order PSK demodulation of the RF receive signal based upon locking to the RF receive signal to determine the interfering PSK signal component. An interference removal circuit <NUM> is configured to remove the determined interfering PSK signal component from the RF receive signal and may be operatively coupled to the higher-order PSK demodulation circuit <NUM> as a separate circuit or integrated therewith as part of that circuit.

In an example, the at least one locking parameter may be a carrier frequency of the RF receive signal, and in another example, the at least one locking parameter may be a symbol rate of the RF receive signal, or both. The lower-order PSK demodulation circuit <NUM> may be formed by one of a binary phase shift keying (BPSK) and quadrature phase shift keying (QPSK) demodulation circuit. On the other hand, the higher-order PSK demodulation circuit <NUM> may include one of an <NUM>-PSK, <NUM>-PSK, and <NUM>-QAM (quadrature amplitude modulation), <NUM> QAM, <NUM> QAM, <NUM> QAM, or higher order demodulation circuit. An example RF receiver <NUM> may be incorporated with the Gatekeeper™ advanced interference excision system as manufactured by L3Harris Technologies, Inc.

The RF receiver <NUM> identifies and mitigates both intentional and unintentional interfering signals to restore performance of a host system. The RF receiver <NUM> may mitigate and remove interference caused by intentional or unintentional static tones, dynamic frequency tones, and similar modulated signals.

The lower-order PSK demodulation circuit <NUM> includes a demodulator <NUM> and a remodulator <NUM> coupled thereto, which are illustrated in greater detail in <FIG>, showing further components in block diagram of the demodulator and remodulator. The demodulator <NUM> and remodulator <NUM> operate as part of the lower-order PSK demodulation circuit <NUM> and together generate at least one locking parameter to lock onto a subset of a higher-order signal constellation such as an <NUM> PSK modulated RF signal. The demodulator <NUM> receives the RF receive signal as converted to a digital signal having the interfering PSK signal component into a first digital phase shifter <NUM> that operates as a mixer and rotates the I and Q components of the RF receive signal and shifts phase of the signal. The rotated, i.e., phase shifted signal, is received within a receive finite impulse response (FIR) filter <NUM>, and after filtering at the FIR filter, the signal is received into a variable gain attenuator (VGA) <NUM> followed by signal detection within a detector circuit <NUM> coupled downstream from the first digital phase shifter <NUM> as illustrated.

A phase loop <NUM> is coupled between the detector circuit <NUM> and first digital phase shifter <NUM> and operates to replicate and track frequency and phase when in lock. A timing loop <NUM> is coupled between the detector circuit <NUM> and receive finite impulse response filter <NUM> and aids in keeping time to allow the filter to settle to zero in finite time. An automatic level control (ALC) circuit <NUM> is coupled between the detector <NUM> and VGA <NUM> to help maintain the gain and control VGA operation. As noted before, the digital phase shifter <NUM> rotates the data by rotating the I and Q signal components respectively.

The remodulator circuit <NUM> receives the demodulated signal from the detector circuit <NUM> and delays that signal via a delay circuit <NUM> and passes the delayed signal into a transmit finite impulse response filter <NUM> to filter the signal and attenuate it at a variable gain attenuator <NUM>. A second digital phase shifter <NUM> shifts the I and Q signal components and is controlled via a digital phase shifter controller <NUM> connected thereto to impart the requisite rotation to aid in locking to a signal. The transmit finite impulse response (FIR) filter <NUM> receives a filter control signal <NUM> such as generated from the controller <NUM>. The delay circuit <NUM> also receives a delay signal to control the time, phase and amount of delay, which may be matched with other delays in a serial architecture of a plurality of serially connected demodulator <NUM> and remodulator <NUM> circuits, such as arranged in the circuit of <FIG>. Once signals are locked in time, the interfering signals can be subtracted and removed.

As shown in <FIG>, multiple, serially connected demodulator <NUM> and remodulator <NUM> circuits, which together are indicated generally at <NUM>, are connected in a serial configuration to each other to process multiple RF signal jammers. The signals of interest are received within a plurality of serially connected analog-to-digital converter delays <NUM> and summers <NUM> having two parallel paths as illustrated and switch mechanisms <NUM> for the respective demodulator/remodulator circuits <NUM> that each output into the summers as part of the lower-order PSK demodulation circuit <NUM>. The delays <NUM> may be matched to each other and initial sampling is usually at around Nyquist or just below.

The different locking parameters I<NUM>, I<NUM>, I<NUM>, I<NUM> are output from each of the demodulator <NUM> and remodulator <NUM> circuits, each shown generally at <NUM>, and are passed into a series of input multiplexers <NUM> that also receive a digital conversion of the RF signal (R) and an inverted, interfering signal (R-ΣJn), which are combined together and received into the classifier detector circuit <NUM>, processed, and output into a first output multiplexer <NUM> and channelizer <NUM> as a filter, and through the second output multiplexer <NUM>. Although the RF receiver <NUM> is described as processing <NUM> jammers, the RF receiver is scalable and may handle a fewer or larger number of jammers. The combined signal is processed at a variable gain attenuator (VGA) <NUM> to adjust amplitude. The output data from the VGA <NUM> is framed <NUM> and passed through a Fast Fourier Transform window circuit <NUM> as a data bandpass and processed at a <NUM> bit FFT circuit <NUM>.

At this point, the rate line spikes are obtained and those bins are processed and compared to obtain the center carrier frequency and symbol rate using the serial processing circuit illustrated generally at <NUM> that helps classify the signal, and having a FFT averaging circuit <NUM>, a queue as RAM <NUM>, block dump <NUM>, and circuit for scaling, rounding and classification <NUM>.

Thus, the demodulator <NUM> and serially connected remodulator <NUM> operate as part of the lower-order PSK demodulation circuit <NUM>, which initially receives data that is not locked in timing or phase, and locks it to be tracked and remodulated again so that it is lined up in time. It is then received within the higher-order PSK demodulation circuit <NUM> and locked onto the jammer or interfering PSK signal component, which is determined and subtracted out via the interference removal circuit <NUM>.

Referring now to <FIG>, there are illustrated graphs that compare and show how the <NUM>-PSK (phase shift keying) center frequency (Fc) and symbol rate (Rs) may be estimated in their value by locking onto the signal with a sub-constellation of QPSK parameters. <FIG> is a graph that illustrates when a received <NUM>-PSK RF waveform <NUM> is sampled randomly and the sampling points (shown as stars <NUM>) are used to calculate rate lines without locking with the QPSK or other sub-constellation using the RF receiver <NUM> of <FIG>. The rate lines are used to determine the center frequency and the symbol rate estimation.

<FIG> shows on its graph that the rate lines, which are determined without locking onto the QPSK sub-constellation are not well defined and are difficult to separate from each other and from the noise floor. When the <NUM>-PSK signal shown at <NUM> is sampled <NUM> with the QPSK lock (<FIG>), on the other hand, using the RF receiver <NUM> of <FIG>, the lower-order PSK demodulation circuit <NUM> generates the at least one locking parameter, and the rate lines for the center frequency (Fc) <NUM> and symbol rate (Rs) <NUM> are well-defined as shown in the graph of <FIG>. These well-defined rate lines in the graph of <FIG> may be compared to the low quality estimate for Fc and Rs in the graph of <FIG>, which impacts the ability to lock onto the <NUM>-PSK signal. When using the lower-order PSK demodulation circuit <NUM> to generate the at least one locking parameter and incorporate it for use by the higher-order PSK demodulation circuit <NUM>, the QPSK parameters initiate the lock and transition to the <NUM>-PSK modulation.

As shown in the graph of <FIG>, the QPSK parameters allow initial estimates to be a higher quality based on clear and identifiable rate lines. The center frequency corresponding to the carrier frequency is shown by the center vertical line <NUM>, and the symbol rates are shown by the side vertical lines <NUM>, indicative of the better locking onto the <NUM>-PSK signal when the RF receiver <NUM> of <FIG> is employed.

Referring now to <FIG>, there are illustrated graphs of different higher-order signal constellations and showing the lower-order sub-constellations that may be used to lock as the subset for the sub-constellation and obtain timing lock and determine the well-defined rate lines or peaks as shown in the graph of <FIG>. The different, higher-order symbols are shown as solid circles in all of the graphs of <FIG>, while the sub-constellations are shown by the larger circles that generally surround the solid circles, except in the graph of <FIG> as explained below. For example, in the graph of <FIG>, the <NUM>-PSK symbols are shown by the solid circles. Four QPSK sub-constellations as circles completely encircle four of the solid <NUM>-PSK symbols, which indicates the locking onto the subset of the QPSK sub-constellation and the timing alignment of the symbols.

The QPSK sub-constellations are shown by the circles at about the <NUM>°, <NUM>°, <NUM>°, and <NUM>° positions, while the alternate PSK sub-constellation of <FIG> shows the QPSK sub-constellations at about the <NUM>°, <NUM>°, <NUM>°, and <NUM>° positions, respectively. Binary phase shift keying (BPSK) sub-constellations are indicated by the circles in <FIG>, and shown relative to the <NUM>-PSK signal as solid circles. Only two BPSK sub-constellation circles are shown indicative of the binary phase shift keying as a binary sub-constellation. This graph may be compared to the four open circles of the quadrature sub-constellation of <FIG> and <FIG>.

<FIG> illustrates a graph of a <NUM>-PSK signal, showing the <NUM>-PSK symbols as solid circles with the QPSK sub-constellations at about the <NUM>°, <NUM>°, <NUM>°, and <NUM>° positions. An example of a <NUM>-QAM (quadrature amplitude modulation) signal with an <NUM>-PSK sub-constellation is shown in the graph of <FIG> and illustrates how the RF receiver <NUM> may not stay locked because the <NUM>-PSK sub-constellation circles do not circle completely the <NUM>-QAM symbols, indicating any locking is sporadic or short in duration, and thus, the estimated center frequency and symbol rate results may be similar to the poor results shown in the graph of <FIG>, where rate lines for the center frequency and symbol rate are near noise floor and not well identified. In many cases, rates are so bad that they are below the noise floor and not seen.

However, a <NUM>-QAM signal with a QPSK sub-constellation is shown in the graph of <FIG>. There is a locking, indicative by the QPSK sub-constellation circles completely encircling the <NUM>-QAM symbols. An alternate QPSK sub-constellation is shown with a <NUM>-QAM signal of <FIG> and illustrating how one quadrant of the signal constellation may be between <NUM>° and <NUM>°, and includes the four QPSK sub-constellations. The graph of <FIG> shows a second alternate QPSK sub-constellation with the <NUM>-QAM signal.

Claim 1:
A Radio Frequency, RF, receiver (<NUM>) comprising:
a lower-order phase shift keying, PSK, demodulation circuit (<NUM>) configured to generate at least one locking parameter when performing a lower-order PSK demodulation of an RF receive signal comprising an interfering PSK signal component, the locking parameter comprising at least one of a carrier frequency of the RF receive signal and a symbol rate of the RF receive signal, wherein the lower-order PSK demodulation includes at least one of a binary phase shift keying, BPSK, and quadrature phase shift keying, QPSK, demodulation; and
a higher-order PSK demodulation circuit (<NUM>), having a higher order than the lower-order PSK demodulation circuit, and configured to
lock to the RF receive signal using the at least one locking parameter from the lower-order PSK demodulation circuit,
perform the higher-order PSK demodulation of the RF receive signal based upon locking to the RF receive signal to determine the interfering PSK signal component, wherein the higher-order PSK demodulation includes at least one of a <NUM> PSK and <NUM> PSK and a <NUM> quadrature amplitude modulation, QAM, and a <NUM> QAM and a <NUM> QAM and a <NUM> QAM demodulation.