Patent Description:
Document <CIT> relates to a semiconductor device including a silicon carbide layer, a gate electrode, a gate insulating layer disposed between the silicon carbide layer and the gate electrode, a first region disposed in the silicon carbide layer and containing nitrogen, and a second region disposed between the first region and the gate insulating layer, and containing at least one element selected from the group consisting of nitrogen, phosphorus, arsenic, antimony, scandium, yttrium, lanthanum, lanthanoids, hydrogen, deuterium, and fluorine.

Document <CIT> relates to a semiconductor device including a silicon carbide layer having a first and a second planes, a first electrode located on a side of the first plane, a second electrode located on a side of the second plane, a gate electrode, an aluminum nitride layer containing an aluminum nitride crystal between the second silicon carbide region and the gate electrode, and an insulating layer between the aluminum nitride layer and the gate electrode and having a wider band gap than the aluminum nitride layer.

Document <CIT> relates to a method of manufacturing a semiconductor device including the steps of forming a silicon oxynitride film on a silicon carbide substrate, forming a silicon oxide film on the silicon oxynitride film, annealing the silicon carbide substrate, the silicon oxynitride film and the silicon oxide film, wherein the silicon oxide film is exposed to a gas containing hydrogen, and forming an aluminum oxynitride film on the silicon oxide film after the annealing.

Document <CIT> relates to a semiconductor device including a silicon carbide layer, a gate electrode, a gate insulating layer provided between the silicon carbide layer and the gate electrode, and a region located between the silicon carbide layer and the gate insulating layer, the region having a first bonding structure, the first bonding structure including a threefold coordinated first nitrogen atom bonded to three first silicon atoms, a threefold coordinated second nitrogen atom bonded to three second silicon atoms, and a threefold coordinated third nitrogen atom bonded to three third silicon atoms, the first to third nitrogen atoms being adjacent to each other in the first bonding structure.

One object to be achieved is to provide a method for producing a semiconductor device with the help of which the flat band voltage (VFB) can be engineered. VFB influences Vth and this in turn influences the device performance. A further object to be achieved is to provide a semiconductor device with an engineered flat band voltage, thereby having a proper threshold voltage in order to enhance the device's blocking and on-state performance.

This object is achieved by a method as defined in claim <NUM>. Exemplary further developments constitute the subject-matter of the dependent claims.

The method for producing the semiconductor device comprises a step of providing a semiconductor body of SiC. In a further step, a nitride-based dielectric layer is applied on this surface. Then, the dielectric layer is annealed in an atmosphere which contains hydrogen.

Conventional SiC semiconductor devices, like SiC MOSFETs or SiC IGBTs, usually have SiO<NUM> as the dielectric layer. Due to the defective interface between the dielectric layer and the SiC, such devices suffer from limited mobility values causing high RON values. To minimize the defect density at the interfaces SiO<NUM> can be annealed in NO or N<NUM>O ambient to improve the interface with the SiC. However, this treatment yields limited improvements in terms of mobility.

To decrease the RON, it is also possible to implement high-k insulators, e.g. as gate dielectrics. Such materials offer higher dielectric capacitance values leading to lower RON values with process optimization compared to their SiO<NUM> counterparts. However, these materials suffer from undesirably high VFB shifts (towards negative or positive values) when integrated into SiC semiconductor devices and annealed in inert atmospheres.

Indeed, annealing of nitride-based dielectric materials in inert atmospheres (mainly N<NUM>) at high temperature (><NUM>) creates nitrogen vacancies in the dielectric layer. These defects are responsible for deep-level trap creation in the material, shifting VFB to undesirably high (positive or negative) voltage levels. In the current invention, this problem is solved by hydrogen-based annealing of the nitride-based dielectric layer after its deposition. Reintroducing hydrogen into the dielectric layer replaces the nitrogen vacancies. It converts the deep traps into shallow ones, resulting in several volts, e.g. ~3V, reduction of the VFB which, in a MOSFET or IGBT, translates into less negative/positive VTH characteristics.

The semiconductor body of the semiconductor device comprises SiC, e.g. <NUM>-SiC or 3C-SiC. For example, the semiconductor body comprises a substrate on which SiC is epitaxially grown. The substrate may be of Si, SiO<NUM> or SiC. At least a portion of the semiconductor body, e.g. the SiC thereof, may be doped, for example n-doped.

The whole surface of the semiconductor body is formed of SiC, i.e. SiC is exposed at a surface of the semiconductor body. For example, the SiC of the surface is located at a top side of the semiconductor body or in a trench formed in the semiconductor body. The exposed SiC may be epitaxially grown SiC.

The nitride-based dielectric layer is applied onto the surface which is of SiC. The nitride-based dielectric layer is applied directly onto the exposed SiC such that it adjoins the SiC of the semiconductor body. An interface is then formed between the nitride-based dielectric layer and the semiconductor body at which SiC and the nitride-based dielectric material are in direct contact with each other.

In particular, the dielectric layer is or forms at least a part of a gate dielectric, i.e. the dielectric layer electrically insulates a gate electrode from the semiconductor body.

The nitride-based dielectric layer is, in particular, a high k dielectric layer. For example, the nitride-based dielectric layer is applied with a layer thickness between <NUM> and <NUM>, preferably between <NUM> and <NUM>.

After application of the dielectric layer, the dielectric layer is annealed in an atmosphere which contains hydrogen. In this step, hydrogen molecules come into contact with the dielectric layer and hydrogen atoms can diffuse into the dielectric layer. For example, annealing of the dielectric layer is only performed in the atmosphere containing hydrogen. Particularly, no annealing in a hydrogen-free atmosphere is performed before annealing in the atmosphere containing hydrogen.

The atmosphere in which the dielectric layer is annealed consists of nitrogen and hydrogen. For example, at least <NUM> at-% or at least <NUM> at-% of the atmosphere is formed by nitrogen (N2) and hydrogen (H2). at-% is herein used as the abbreviation of atomic percentage.

The concentration of hydrogen in the atmosphere, in which the dielectric layer is annealed, is at least <NUM> at-% or at least <NUM> at-%. Additionally, the concentration is at most <NUM> at-% or at most <NUM> at-%. For example, the concentration is <NUM> at-%.

The dielectric layer is annealed at a temperature of least <NUM>.

The dielectric layer is annealed at atmospheric pressure ± <NUM>% or at atmospheric pressure ± <NUM>%. That is, the pressure at which the dielectric layer is annealed is in the range between <NUM> mbar and <NUM> mbar, particularly in the range between <NUM> mbar and <NUM> mbar. The borders are included.

The dielectric layer is annealed for at least ten minutes or at least half an hour or at least one hour in the atmosphere containing hydrogen.

The dielectric layer
consists of at least one of: silicon nitride (Si<NUM>N<NUM>), silicon oxynitride (Si<NUM>N<NUM>O). For example, the dielectric layer consists of silicon nitride or of silicon oxynitride.

According to a further embodiment, the method comprises a further step of cleaning the surface which is at least partially formed of SiC. This step is performed before applying the dielectric layer. The surface is cleaned, for example, in a wet cleaning process.

According to a further embodiment, the method further comprises a step of applying an electrically conductive layer onto the dielectric layer after annealing of the dielectric layer. For example, the electrically conductive layer is formed of metal or highly-doped polysilicon. The electrically conductive layer is, for example, a gate electrode of the semiconductor device. The electrically conductive layer may be applied directly onto the dielectric layer so that the electrically conductive material of the electrically conductive layer adjoins the nitride-based dielectric material of the dielectric layer.

The dielectric layer is, in particular, applied directly onto the semiconductor body. For example, the semiconductor material of the semiconductor body adjoining the dielectric layer is at least partially, particularly completely, formed of SiC. This means that there can be an interface at which SiC adjoins the nitride-based dielectric layer.

According to a further embodiment, the concentration of hydrogen in the dielectric layer is at least <NUM> at-% or at least <NUM> at-% or at least <NUM> at-%.

According to a further embodiment, the semiconductor device is a power semiconductor device.

According to a further embodiment, the semiconductor device is an insulated gate device, particularly a transistor with an insulated gate electrode. Particularly, the dielectric layer serves as an insulation between a gate electrode and the semiconductor body. In other words, the dielectric layer forms at least a part of the gate dielectric.

According to a further embodiment, the semiconductor device is a MISFET or MOSFET or an IGBT or a JFET. The IGBT can be a normal IGBT or an RC IGBT.

Hereinafter, the method for producing a semiconductor device will be explained in more detail with reference to the drawings on the basis of exemplary embodiments. The accompanying figures are included to provide a further understanding. In the figures, elements of the same structure and/or functionality may be referenced by the same reference signs. It is to be understood that the embodiments shown in the figures are illustrative representations and are not necessarily drawn to scale. Insofar as elements or components correspond to one another in terms of their function in different figures, the description thereof is not repeated for each of the following figures. For the sake of clarity, elements might not appear with corresponding reference symbols in all figures.

<FIG> shows a first position in an exemplary embodiment of the method for producing a semiconductor device. A semiconductor body <NUM> is provided with a top side <NUM> and a bottom side <NUM>, opposite to the top side <NUM>. The top side <NUM> is formed of SiC. The semiconductor body <NUM> completely consists of SiC. Particularly, the semiconductor body <NUM> of <FIG> consists of n-doped semiconductor material.

<FIG> shows a position in which the top side <NUM> of the semiconductor body <NUM> is cleaned.

In the position of <FIG>, the semiconductor body <NUM> has been further processed. Particularly, p-doped base regions <NUM> have been formed inside the semiconductor body <NUM>, e.g. with the help of ion implantation. Furthermore, n-doped contact regions <NUM> have been formed, e.g. also with the help of ion implantation. The n-doped contact regions <NUM> are separated and spaced from a drift region <NUM> of the semiconductor body <NUM> by the base regions <NUM>. The drift region <NUM> is also n-doped.

An n-doped contact layer <NUM> has been formed at the bottom side <NUM> of the semiconductor body <NUM>.

<FIG> shows a position in which a dielectric layer <NUM> is deposited directly onto the top side <NUM> of the semiconductor body <NUM>. The dielectric layer <NUM> is a high k nitride-based dielectric layer. The dielectric layer <NUM> consists, for example, of Si<NUM>N<NUM>. The dielectric layer <NUM> may have been applied by vacuum deposition. Thereby, an interface is formed between the semiconductor body <NUM> and the dielectric layer <NUM>, at which the SiC and the nitride-based dielectric material adjoin each other.

<FIG> shows a position in which the dielectric layer <NUM> is annealed in an atmosphere which contains hydrogen. The dielectric layer <NUM> is annealed at a temperature of at least <NUM> and at atmospheric pressure. The atmosphere only comprises hydrogen and nitrogen and the concentration of hydrogen in the atmosphere is about <NUM> at-%. Annealing of the dielectric layer <NUM> may be done for at least half an hour, for example. During the annealing, nitrogen vacancies are formed. These nitrogen vacancies are at least partially filled with hydrogen atoms.

<FIG> shows a position after annealing of the dielectric layer <NUM> and after application of an electrically conductive layer <NUM> in the form of a gate electrode <NUM> onto the dielectric layer <NUM>. The gate electrode <NUM> is, for example, formed of highly-doped polysilicon. The dielectric layer <NUM> forms the gate dielectric.

<FIG> shows a position after finalizing of the semiconductor device <NUM>. The semiconductor device <NUM> is, in this case, MOSFET or MISFET, respectively. For finalizing the semiconductor device <NUM>, the gate electrode <NUM> has further been covered by dielectric material and main electrodes <NUM>, <NUM> have been applied onto the top side <NUM> and the bottom side <NUM>. The first main electrode <NUM> electrically contacts the contact regions <NUM> and the second main electrode <NUM> electrically contacts the contact layer <NUM>. The IGBT of <FIG> is of planar design or planar gate design, respectively.

<FIG> shows a further exemplary embodiment of the semiconductor device <NUM> which is produced with the method described herein. In this case, the semiconductor device <NUM> is a MOSFET or MISFET, respectively, of a trench design or trench gate design, respectively. Here, the gate electrode <NUM> is arranged in trenches <NUM> which extend from the top side <NUM> into the semiconductor body <NUM>. The gate electrode <NUM> inside the trenches <NUM> is electrically insulated from the semiconductor body <NUM> by the nitride-based dielectric layer <NUM>. The semiconductor body <NUM> may again consist of SiC. The dielectric layer <NUM> has again been annealed in an atmosphere containing hydrogen and, accordingly, comprises hydrogen atoms at nitrogen vacancies.

<FIG> show measurements of the capacitance voltage characteristics of different dielectric layers applied onto SiC epi wafers. The y-axis shows the relative capacitance C/Cmax and the x-axis shows the applied voltage Vg.

In <FIG>, the dielectric layer consists of Si<NUM>N<NUM>. The curve A1 shows the result when the dielectric layer <NUM> is annealed in a pure nitrogen atmosphere and the curve A2 shows the result when the dielectric layer is annealed in an atmosphere comprising nitrogen and hydrogen, namely about <NUM> at-% of hydrogen.

In <FIG>, a stack of an oxide layer and a nitride-based dielectric layer is applied onto the wafer. Curve B1 shows the result of this stack being annealed in a pure nitrogen atmosphere wherein curve B2 shows the result of the dielectric layer being annealed in an atmosphere comprising nitrogen and hydrogen.

In both <FIG> it can be seen that the annealing of the nitride-based dielectric layer <NUM> in a hydrogen containing atmosphere results in a clear shift of VFB towards <NUM> V.

<FIG> shows a further exemplary embodiment of the semiconductor device <NUM>. It is similar to the one of <FIG>. However, in this case, the contact layer <NUM> is p-doped so that the semiconductor device <NUM> constitutes an IGBT.

Claim 1:
Method for producing a semiconductor device (<NUM>) comprising the steps of
- providing a semiconductor body (<NUM>) of SiC, having a surface formed of SiC;
- applying a nitride-based dielectric layer (<NUM>) of Si<NUM>N<NUM> and/or Si<NUM>N<NUM>O directly on this surface;
- annealing the nitride-based dielectric layer (<NUM>) on the semiconductor body (<NUM>), at a temperature of at least <NUM> for at least <NUM> minutes, the nitride-based dielectric layer (<NUM>) being exposed to an atmosphere which consists of nitrogen and hydrogen at atmospheric pressure ± <NUM>%, wherein a concentration of hydrogen in the atmosphere is at least <NUM> atomic-% and at most <NUM> atomic-%.