Patent Description:
<CIT> relates to circuitry for isolation and communication of signals between circuits operating in different voltage domains using capacitive coupling. The capacitive coupling is provided by one or more capacitive structures having a breakdown voltage that is defined by way of the various components and their spacing.

Described herein are concepts, systems, circuits and techniques related to signal isolator integrated circuit (IC) packages and isolation barriers of signal isolator IC packages including an insulator (or insulating layers) with an improved time dependent dielectric breakdown (TDDB), for example. More particularly, in one aspect, a signal isolator IC package is provided according to claim <NUM>. The isolation barrier may separate the first and second voltage domains, which may be different from each other, for example, including different source potentials and different grounds.

Additionally, the isolation barrier can maintain galvanic isolation between the first and second voltage domains and the first and second die.

At least one edge of the first floating conductive plate may extend beyond an edge of both the first conductive layer and the second conductive layer to increase evenness of electric charge distribution. The first insulating layer and the second insulating layer may each have a respective thickness. The thickness of at least one of the first insulating layer and the second insulating layer may be selected to provide a first predetermined level of signal isolation between the first die and the second die. The first insulating layer and the second insulating layer may have a substantially similar thickness.

At least one of the first insulating layer and the second insulating layer may include a plurality of layers including one or more insulating materials. The first conductive layer and the second conductive layer may each have a respective thickness. The thickness of at least one of the first conductive layer and the second conductive layer may be selected to provide a first predetermined level of signal isolation between the first die and the second die. The first floating conductive plate may be spaced substantially equidistant from the first conductive layer and the second conductive layer. The first signal path may include one or more wirebonds.

The second die may have a first die area in the second voltage domain and a second die area in a third voltage domain. The IC package may include a second signal path from the first die area of the second die to the second die area of the second die via a second isolation barrier supported by the second die. The second isolation barrier may include a third conductive layer disposed over a surface of the second die and a third insulating layer disposed over the third conductive layer. The second isolation barrier may also include a fourth conductive layer disposed over the third insulating layer. The second isolation barrier may include a second floating conductive plate disposed between the third insulating layer and the fourth conductive layer and a fourth insulating layer disposed between the second floating conductive plate and the fourth conductive layer.

The third insulating layer and the fourth insulating layer of the second isolation barrier may each have a respective thickness. The thickness of at least one of the third insulating layer and the fourth insulating layer may be selected to provide a second predetermined level of signal isolation between the first die area and the second die area. The second floating conductive plate of the second isolation barrier may be spaced substantially equidistant from the third conductive layer and the fourth conductive layer. The third conductive layer and the fourth conductive layer of the second isolation barrier may each have a respective thickness. The thickness of at least one of the third conductive layer and the fourth conductive layer may be selected to provide a second predetermined level of signal isolation between the first die area and the second die area.

In another aspect of the concepts described herein, a signal isolator IC package is provided according to claim <NUM>.

In embodiments, at least one edge of the first floating conductive plate extends beyond an edge of both the first conductive layer and the second conductive layer to increase evenness of electric charge distribution. Additionally, in embodiments the first insulating layer and the second insulating layer each have a respective thickness. The thickness of at least one of the first insulating layer and the second insulating layer may be selected to provide a first predetermined level of signal isolation between the first die area and the second die area. In embodiments, the first conductive layer and the second conductive layer each have a respective thickness. The thickness of at least one of the first conductive layer and the second conductive layer may be selected to provide the first predetermined level of signal isolation between the first die area and the second die area. In embodiments, the floating conductive plate may be spaced substantially equidistant from the first conductive layer and the second conductive layer.

The above and below described signal isolator IC packages and isolation barriers of signal isolator IC packages according to the disclosure have been found to provide for an insulator (or insulating layers) of the isolation barriers having an improved time dependent dielectric breakdown (TDDB) in comparison to conventional capacitive signal isolator IC packages, for example. In embodiments, the foregoing is due to the floating conductive plates of the isolation barriers according to the disclosure distributing electric fields in the insulator more evenly, thereby reducing points of high electric field in the insulator which could initiate breakdown of the insulator. More particularly, the floating conductive plates of the isolation barriers, which are disposed between conductive layers of the isolation barriers, have been shown to improve the TDDB of the isolation barrier insulator for withstanding relatively high voltages over extended periods of time. It is believed that the floating conductive plates may enable the isolation barrier insulator to withstand hundreds of volts for twenty years or more, for example. As is known in the art, insulating materials or layers (e.g., dielectric layers) tend to breakdown when subjected to high voltages for extended periods of time. In other words, insulating materials or layers generally have an associated TDDB.

In embodiments, by increasing the TDDB of the isolation barrier insulator, the lifetime of the signal isolator IC packages may be increased, which may substantially reduce (or ideally eliminate) the need to replace signal isolator IC packages (or components of the IC packages) in systems in which the IC packages are provided. The foregoing may, for example, reduce waste as well as timely and costly repairs. In other words, ideally IC packages accordingly to the disclosure will outlast the lifetime (i.e., product lifetime) of the systems in which the IC packages are provided.

In embodiments, the various arrangements of floating conductive plates as described herein may be found particularly suitable in high voltage isolation integrated circuits such as digital isolators, analog isolators, current sensors or other devices needing a high voltage standoff insulation for signal transmission or sensing. Additionally, in embodiments the above and below described signal isolator IC packages may be found suitable for use in a variety of applications. For example, the IC packages may be found suitable for use in HEV applications and various energy harvesting applications such as solar energy harvesting.

In contrast to known prior art, isolation barriers of signal isolator IC packages according to the disclosure are provided on semiconductor die of the IC packages versus being used in other types of substrate (e.g., substrate outside of the IC packages). Example benefits of IC based isolators include the ability to integrate additional functionality, e.g., gate drivers, into an IC package and the increased integration possibilities of such an IC package. Other examples of signal isolators include pulse transformers and opto-couplers. Conventional pulse transformers generally comprise standalone passive components. Additionally, conventional opto-couplers generally do not have inherent integration capabilities.

The foregoing features of the disclosure, as well as the disclosure itself may be more fully understood from the following detailed description of the drawings, in which:.

Referring to <FIG>, an example signal isolator <NUM> in accordance with an embodiment of the disclosure is shown coupled to a first system S1 and to a second system S2. In embodiments, the first system S1 is configured to operate in a first voltage domain (e.g., voltages greater than about 100V). Additionally, in embodiments, the second system S2 is configured to operate in a second voltage domain (e.g., voltages less than about 10V) that is substantially different from the first voltage domain. The first and second voltage domains may include different source potentials and different grounds, for example.

In embodiments, the signal isolator <NUM> may provide a communication path between the first system S1 and the second system S2. In particular, the signal isolator <NUM> may receive signals from the first system S1 and provide the signals to the second system S2. Additionally, the signal isolator <NUM> may receive signals from the second system S2 and provide the signals to the first system S1. In embodiments, the signal isolator <NUM> may also be configured to provide signal isolation between the first system S1 and the second system S2, preventing communication of voltages from one domain to the other and protecting lower voltage circuitry of the first system S1 or the second system S2 from higher voltage signals which can damage the lower voltage circuitry, for example.

Referring now to <FIG>, an example signal isolator <NUM> that forms part of a signal isolator integrated circuit (IC) package <NUM> is shown. The IC package <NUM> includes a first die <NUM> and a second die <NUM>. The IC package <NUM> also includes a signal path <NUM> from the first die <NUM> to the second die <NUM>. In the example embodiment shown, the signal path <NUM> includes a first electrical connection <NUM>, a second electrical connection <NUM> and an isolation barrier <NUM>. Additionally, in the example embodiment shown, the signal path <NUM> extends from the first die <NUM> to the second die <NUM> across a spacing <NUM> between the first and second die <NUM>, <NUM>. The spacing <NUM> corresponds to a predetermined distance or region between the first and second die <NUM>, <NUM>. In embodiments, the spacing <NUM> (in conjunction with isolation barrier <NUM> and/or other isolation means) provides galvanic isolation between the first and second die <NUM>, <NUM>. It is understood that any suitable technique can be used to provide galvanic isolation between the first and second die <NUM>, <NUM>.

In the illustrated embodiment, the isolation barrier <NUM> and a first circuit <NUM> (e.g., a first transmitter/receiver circuit) are each supported by a respective surface 220a (e.g., an active surface) of the first die <NUM>. Additionally, a second circuit <NUM> (e.g., a second transmitter/receiver circuit) is supported by a respective surface 230a (e.g., an active surface) of the second die <NUM>. A terminal <NUM> (e.g., an input/output (I/O) terminal) of the first circuit <NUM> is coupled to a first portion of the isolation barrier <NUM> through first electrical connection <NUM> of the signal path <NUM>. Additionally, a terminal <NUM> (e.g., an I/O terminal) of the second circuit <NUM> is coupled to a second opposing portion of the isolation barrier <NUM> through second electrical connection <NUM> of the signal path <NUM>.

In embodiments, the first circuit <NUM> and the first die <NUM> operate in a first voltage domain and the second circuit <NUM> and the second die <NUM> operate in a second voltage domain that is substantially different from the first voltage domain. Additionally, in embodiments separate voltage supply signals and ground connections can be provided to each of the first and second dies <NUM>, <NUM> of the IC package <NUM> to support the respective first and second voltage domains from which the first and second circuits <NUM>, <NUM>, and the first and second die <NUM>, <NUM>, may operate in. For example, in embodiments the first die <NUM> is coupled to a first supply voltage in the first voltage domain and the second die <NUM> is coupled to a second supply voltage in the second voltage domain. In embodiments, a voltage differential between the first and second voltage domains can range from about zero volts to thousands of volts.

With the above-described arrangement of IC package <NUM>, an output signal (e.g., a digital or analog signal) of the first circuit <NUM> can be received by the second circuit <NUM> with signal isolation via isolation barrier <NUM>. Additionally, with the above-described arrangement of IC package <NUM>, an output signal of the second circuit <NUM> can be received by the first circuit <NUM> with signal isolation via isolation barrier <NUM>. In other words, the isolation barrier <NUM> may be used to pass signals between first and second voltage domains in which the first and second circuits <NUM>, <NUM>, and the first and second die <NUM>, <NUM>, may operate. The first circuit <NUM> may process signals received from the second circuit <NUM>. Additionally, the second circuit <NUM> may process signals received from the first circuit <NUM>.

In embodiments in which the IC package <NUM> is used for communication of digital signals and the first and second circuits <NUM>, <NUM> operate in first and second respective voltage domains, for example, the isolation barrier <NUM> may be coupled to receive signals from the first circuit <NUM> having one of two binary voltage levels referenced to a ground voltage of the first voltage domain via electrical connection <NUM> of the signal path <NUM>. Additionally, the isolation barrier <NUM> may be configured to allow transfer of signals to the second circuit <NUM> via electrical connection <NUM> of the signal path <NUM>, with the second circuit <NUM> referencing the received signals to a ground voltage of the second voltage domain. In embodiments, the isolation barrier <NUM>, which corresponds to an isolation barrier according to the disclosure, may transfer the signals using capacitive coupling techniques, for example.

More detailed descriptions of isolation barriers according to the disclosure are discussed in connection with figures below. However, let it suffice here to say that isolation barriers according to the disclosure (e.g., <NUM>, shown in <FIG>, as will be discussed) include a plurality of isolation layers which are stacked substantially vertically, perpendicular to a surface (e.g., an active surface) of the die(s) on which the isolations barriers are supported. In the illustrated embodiment, for example, isolation barrier <NUM> may include a plurality of isolation layers which are disposed over and stacked on surface 220a of first die <NUM>.

It is understood that a wide range of signal types can be transmitted between the first die <NUM> and the second die <NUM> via isolation barrier <NUM> without departing from the scope of the disclosure. Additionally, it is understood that a wide range of techniques can be used for transmitting signals between the first die <NUM> and the second die <NUM> via isolation batter <NUM> without departing from the scope of the disclosure. In embodiments, signals may be transferred between the first die <NUM> and the second die <NUM> using on-off keying techniques, for example.

It is also understood that while the second circuit <NUM> is shown as supported by a different die from the first circuit <NUM> in the illustrated embodiment, in embodiments the second circuit <NUM> may be supported by a same die as the first circuit <NUM>, as will be described further below in connection with <FIG>, for example. In embodiments, at least one of the first and second die <NUM>, <NUM> can support diagnostic circuitry which may be used to determine if signals are transferring correctly between the first and second circuits <NUM>, <NUM>. It is understood that any practical number of circuits can be formed on the first and/or second die <NUM>, <NUM> to meet the needs of a particular application.

More detailed aspects of signal isolator IC packages, with a particular focus on isolation barriers of IC package signal paths according to the disclosure, are described in connection with figures below.

Referring now to <FIG>, a cross-section of an example isolation barrier <NUM> of an IC package signal path according to the disclosure is shown. The isolation barrier <NUM> is coupled to a circuit <NUM> through an electrical connection <NUM> of the signal path. In embodiments, the isolation barrier <NUM> is supported by a first respective die of a signal isolator IC package (e.g., <NUM>, shown in <FIG>). Additionally, in embodiments the circuit <NUM> is a circuit supported by a second respective die in the IC package. Similar to isolation barrier <NUM> of <FIG>, in embodiments the isolation barrier <NUM> can be used to transmit or communicate signals between the first and second die using capacitive coupling techniques, for example. Additionally, in embodiments the isolation barrier <NUM> can be used to provide a predetermined level of signal isolation between the first and second die. The first and second die, and circuits supported by the first and second die, can operate in first and second different respective voltage domains.

Referring in closer detail to <FIG>, the isolation barrier <NUM> includes a plurality of conductive layers (here, conductive layers <NUM>, <NUM>), a plurality of insulating layers (here, insulating layers <NUM>, <NUM>), and at least one floating conductive plate (here, a floating conductive plate <NUM>). In the example embodiment shown, a first one of the insulating layers (also sometimes referred to herein as a "first insulating layer") <NUM> is disposed over a first one of the conductive layers (also sometimes referred to herein as a "first conductive layer") <NUM>. Additionally, a second one of the insulating layers (also sometimes referred to herein as a "second insulating layer") <NUM> is disposed over the first insulating layer <NUM> and a second one of the conductive layers (also sometimes referred to herein as a "second conductive layer") <NUM> is disposed over the second insulating layer <NUM>. Further, the floating conductive plate <NUM> is disposed between the first insulating layer <NUM> and the second insulating layer <NUM>. In the example embodiment shown, floating conductive plate <NUM> is not directly coupled to either first conductive layer <NUM> or second conductive layer <NUM>, i.e., floating conductive plate <NUM> is "floating.

In some embodiments, the first conductive layer <NUM> is disposed over a surface (e.g., an active surface) of a first die supporting the isolation barrier <NUM>. Additionally, in embodiments the conductive layers <NUM>, <NUM>, insulating layers <NUM>, <NUM>, and floating conductive plate <NUM> (collectively, isolation layers) are each stacked vertically, substantially perpendicular to the die surface.

In the illustrated embodiment, first conductive layer <NUM> of isolation barrier <NUM> is coupled to an electrical connection <NUM> of the signal path including the isolation barrier <NUM>. In embodiments, the electrical connection <NUM> is coupled to a circuit (e.g., <NUM>, shown in <FIG>) which is supported by a same die as the isolation barrier <NUM>. Additionally, second conductive layer <NUM> of isolation barrier <NUM> is coupled to electrical connection <NUM> of the signal path. In embodiments, at least one of electrical connection <NUM> and electrical connection <NUM> may include or be provided as a wirebond.

In the example embodiment shown, the conductive layers <NUM>, <NUM> and the floating conductive plate <NUM> each have a respective length and width. Additionally, the conductive layers <NUM>, <NUM> and the floating conductive plate <NUM> each have a first major surface (e.g., 361a, 365a, 364a) and a second opposing major surface (e.g., 361b, 365b, 364b). The second major surface may be parallel, or parallel within manufacturing tolerances, to the respective first major surface. A first dimension D1a across first major surface 361a (e.g., a major axis of the first major surface 361a) of first conductive layer <NUM> may correspond to a length of the first conductive layer <NUM> and a second dimension across the first major surface 361a (e.g., a minor axis of the first major surface 361a) may correspond to a width of the first conductive layer <NUM>. Additionally, a first dimension D1b across a first major surface 365a of second conductive layer <NUM> may correspond to a length of the second conductive layer <NUM> and a second dimension across the first major surface 365a may correspond to a width of the second conductive layer <NUM>. Further, a first dimension D1c across a first major surface 364a of the floating conductive plate <NUM> may correspond to a length of the floating conductive plate <NUM> and a second dimension across the first major surface 364a may correspond to a width of the floating conductive plate <NUM>.

In some embodiments, the length and width dimensions of the conductive layers <NUM>, <NUM> are substantially the same. For example, in one embodiment the length and width dimensions of the conductive layers <NUM>, <NUM> may be about <NUM> micrometers (µm) by about <NUM>. In another embodiment, the length and width dimensions of the conductive layers <NUM>, <NUM> may be about <NUM> by about <NUM>. In other embodiments, the length and width dimensions of the conductive layers <NUM>, <NUM> are substantially different from each other.

In the example embodiment shown, the conductive layers <NUM>, <NUM> each also have a respective thickness. A distance D2a between the first major surface 361a of first conductive layer <NUM> and the second major surface 361b of first conductive layer <NUM> may correspond to a thickness of the first conductive layer <NUM>. Additionally, a distance D2b between the first major surface 365a of second conductive layer <NUM> and the second major surface 365b of second conductive layer <NUM> may correspond to a thickness of the second conductive layer <NUM>.

Additionally, in the example embodiment shown, each of the insulating layers <NUM>, <NUM> has a respective thickness. Each of the insulating layers <NUM>, <NUM> also has a first major surface (e.g., 362a, 362b) and a second opposing major surface (e.g., 362b, 363b). A distance D3a between the first major surface 362a of first insulating layer <NUM> and the second major surface 362b of first insulating layer <NUM> may correspond to a thickness of the first insulating layer <NUM>. Additionally, a distance D3b between the first major surface 363a of second insulating layer <NUM> and the second major surface 363b of second insulating layer <NUM> may correspond to a thickness of the second insulating layer <NUM>.

In embodiments, the above-described thickness dimension of at least one of the conductive layers <NUM>, <NUM>, for example, is selected to provide a predetermined level of signal isolation between the first die (or die area) supporting the isolation barrier <NUM> and the second die (or die area) supporting the circuit <NUM>. For example, the thickness dimension of first conductive layer <NUM> may be selected to have a first dimension in some embodiments to provide a first predetermined level of signal isolation between the first die and the second die. In some embodiments, the first and second dies may be different dies (e.g., a first die <NUM> and a second die <NUM>), as discussed above in connection with <FIG>. Additionally, in some embodiments the first and second dies may be a same die, as will be discussed further below in connection with <FIG>.

The thickness dimension of the first conductive layer <NUM> may also be selected to have a second dimension which is greater than the first dimension in some embodiments to provide a second predetermined level of signal isolation that is greater than the first predetermined level of signal isolation. In embodiments, the predetermined level of signal isolation corresponds to the TDDB of the insulating layers <NUM>, <NUM> disposed between the conductive layers <NUM>, <NUM>. For example, an increase in the predetermined level of signal isolation (i.e., isolation capacity) may correspond to an increase in breakdown voltage of the insulating layers <NUM>, <NUM>.

Additionally, in embodiments the above-described thickness dimension of at least one of the insulating layers <NUM>, <NUM> is selected to provide the predetermined level of signal isolation between the first die and the second die. For example, first insulating layer <NUM> may have a first thickness selected to provide a first predetermined level of signal isolation between the first die and the second die in some embodiments. Additionally, first insulating layer <NUM> may have a second thickness selected to provide a second predetermined level of signal isolation that is substantially greater than the first predetermined level of signal isolation in some embodiments. In some embodiments, an increase in the thickness of at least one of the insulating layers <NUM>, <NUM> results in a corresponding increase (e.g., a substantially linear increase) in the predetermined level of signal isolation. In some embodiments, the first insulating layer <NUM> and the second insulating layer <NUM> have a substantially similar thickness. For example, in embodiments the insulating layers <NUM>, <NUM> are each relatively "thin" layers having a thickness of between a few micrometers to tens of microns.

In general, it has been found that dimensions (e.g., thickness) of the insulating layers <NUM>, <NUM> and conductive layers <NUM>, <NUM> can affect the predetermined level of signal isolation provided by isolation barrier <NUM> between the first die and the second die. In embodiments, materials of the insulating layers <NUM>, <NUM> and conductive layers <NUM>, <NUM> can also affect the predetermined level of signal isolation. In embodiments, the dielectric breakdown voltage of each material can be different and may be a function of the thickness of the material. For example, Polyimide (PI) can have a dielectric breakdown voltage in a range of <NUM> volts/micron and Silicon Dioxide (SiO<NUM>) can have a dielectric breakdown voltage in a range of about <NUM> volts/micron. In the illustrated embodiment, the conductive layers <NUM>, <NUM> each include one or more electrically conductive materials (e.g., Copper (Cu), conductive Silicon (Si), etc.). Additionally, the insulating layers <NUM>, <NUM> each include one or more electrically insulating materials (e.g., Silicon Dioxide (SiO<NUM>). In some embodiments, the first conductive layer <NUM> may be the same as or similar to the second insulating layer <NUM> (e.g., comprise same materials and have same dimensions). Additionally, in some embodiments the first insulating layer <NUM> may be the same as or similar to the second insulating layer <NUM>.

It has also been found that dimensions (e.g., thickness) of the floating conductive plate <NUM> can affect the evenness of electric charge distribution between the conductive layers <NUM>, <NUM>. In particular, it has been found that evenness of electric charge distribution between the conductive layers <NUM>, <NUM> is increased in embodiments in which at least one edge of the floating conductive plate <NUM> extends beyond an edge of at least one of the first conductive layer <NUM> and the second conductive layer <NUM>. In embodiments, by the at least one edge of the floating conductive plate <NUM> extending beyond an edge of at least one edge of the first conductive layer <NUM> and the second conductive layer <NUM>, the floating conductive plate <NUM> may reduce variability of capacitive coupling of fringing electric fields at edges of the first conductive layer <NUM> and/or the second conductive layer <NUM>. This is in contrast to conventional parallel plate/layer configurations in which electrical field strength is generally largest at edges of the plates, resulting in substantially uneven electric charge distribution between the plates.

The floating conductive plate <NUM> has a length dimension D1c that is greater than a length dimension D1a of the first conductive layer <NUM>, resulting in a first offset o1 between a first edge of the first conductive layer <NUM> and a first edge of the floating conductive plate <NUM> and a second offset o2 between a second edge of the first conductive layer <NUM> and a second edge of the floating conductive plate <NUM>. Additionally, in the illustrated embodiment the floating conductive plate <NUM> has a length dimension D1c that is greater than a length dimension D1b of the second conductive layer <NUM>, resulting in a third offset o3 between a first edge of the second conductive layer <NUM> and the first edge of the floating conductive plate <NUM> and a fourth offset o4 between a second edge of the second conductive layer <NUM> and the second edge of the floating conductive plate <NUM>. In embodiments in which the first conductive layer <NUM> has a same length dimension as the second conductive layer <NUM>, the first offset o1 may be the same as the third offset o3 and the second offset o2 may be the same as the fourth offset o4. In embodiments, the offsets (i.e., geometrical or alignment variations) occur due to normal process variations.

In some embodiments, insulating layers <NUM>, <NUM>, conductive layers <NUM>, <NUM> and floating conductive plate <NUM> may have substantially any geometry, for example, depending upon the particular application in which the isolation barrier <NUM> and the signal isolator IC package including the isolation barrier <NUM> are being used and a desired level of signal isolation.

It has further been found that spacings between the conductive layers <NUM>, <NUM> and the floating conductive plate <NUM> can affect the predetermined level of signal isolation provided by isolation barrier <NUM> between the first die and the second die.

In the example embodiment shown, the conductive layers <NUM>, <NUM> are each spaced apart from the floating conductive plate <NUM> by respective distances. In particular, the first conductive layer <NUM> is spaced apart from the floating conductive plate <NUM> by a first predetermined distance d1 (here, a same distance as a thickness dimension D3a of insulating layer <NUM>). Additionally, the second conductive plate <NUM> is spaced apart from the floating conductive plate <NUM> by a second predetermined distance d2. In embodiments, at least one of the first predetermined distance d1 and the second predetermined distance d2 is selected to provide the predetermined level of signal isolation between the first die and the second die. For example, in one embodiment the first predetermined distance d1 may be selected to provide a first predetermined level of signal isolation. Increasing the first predetermined distance d1 to a distance greater than the first predetermined distance may result in the signal isolation being increased to a level greater than the first predetermined level of signal isolation. In some embodiments the first predetermined distance d1 is substantially the same as the second predetermined distance d2 and floating conductive plate <NUM> is spaced substantially equidistant from the first conductive layer <NUM> and the second conductive layer <NUM>.

In embodiments, by disposing the floating conductive plate <NUM> between the first insulating layer <NUM> and the second insulating layer <NUM>, the floating conductive plate <NUM> is able to more uniformly distribute electric fields across the isolation barrier <NUM> (e.g., between conductive layers <NUM>, <NUM>) through capacitive coupling, for example, in response to the isolation barrier <NUM> receiving signals from electrical connection <NUM> and/or electrical connection <NUM>. Additionally, the floating conductive plate <NUM> is able to substantially reduce localized high electric field spots within the signal isolator IC package. Due to the foregoing, the floating conductive plate <NUM> may be found to increase the lifetime (and TDDB) of the first insulating layer <NUM> and the second insulating layer <NUM>, for example, in embodiments in which the first insulating layer <NUM> and the second insulating layer <NUM> are subjected to relatively high voltages (e.g., voltages greater than about 100V) for extended periods of time (e.g., hours, days, months or years). The relatively high voltages and associated extended periods of time may vary based upon the application in which isolation barrier <NUM>, and the IC package including isolation barrier <NUM>, are used. In embodiments, signals are transferred between conductive layers <NUM>, <NUM> of the isolation barrier <NUM> as changes in electrical fields across the conductive layers <NUM>, <NUM>. In some embodiments, the signal amplitude can be orders of magnitude lower than the isolation voltage.

Referring now to <FIG>, in which like elements of <FIG> are shown having like reference designations, another example isolation barrier <NUM> includes the first conductive layer <NUM>, the first insulating layer <NUM>, the second insulating layer <NUM>, the floating conductive plate <NUM> and the second conductive layer <NUM>. The first insulating layer <NUM> includes two layers (or sub-layers) <NUM>, <NUM> in the illustrated embodiment. In embodiments, layers <NUM>, <NUM> each have a respective thickness (here, D4a, D4b, respectively) and include one or more respective insulating materials. In some embodiments, layer <NUM> has a same or similar thickness as layer <NUM>. Additionally, in some embodiments, layer <NUM> includes one or more same or similar insulating materials (e.g., SiO<NUM>) as layer <NUM>. Layer <NUM> may also include one or more different types of insulating materials in some embodiments. Each of the insulating materials can have different properties (e.g., insulating properties). By having different types of insulators, multiple benefits (e.g., increased isolation capabilities) can be realized. It is understood that the second insulating layer <NUM> may also include a plurality of layers in some embodiments.

Referring now to <FIG>, in which like elements of <FIG> are shown having like reference designations, another example signal isolator <NUM> that forms part of a signal isolator IC package <NUM> is shown. The IC package <NUM> includes a first die <NUM> and a second die <NUM>. The second die <NUM> includes a first die area <NUM> and a second die area <NUM>. The first die area <NUM> is spaced apart from the second die area <NUM> by a spacing <NUM>. In embodiments, spacing <NUM>, similar to spacing <NUM>, may provide galvanic isolation between the first and second die <NUM>, <NUM> (in conjunction with isolation barrier <NUM>, as will be discussed below, and/or other isolation means).

In the illustrated embodiment, the IC package <NUM> also includes a signal path <NUM> (here, a first signal path <NUM>) from the first die <NUM> to the first die area <NUM> of the second die <NUM>. Additionally, in the illustrated embodiment the IC package <NUM> includes a second signal path <NUM> from the first die area <NUM> of the second die <NUM> to the second die area <NUM> of the second die <NUM>. First signal path <NUM> includes first electrical connection <NUM>, second electrical connection <NUM> and isolation barrier <NUM> (here, a first isolation barrier <NUM>). Additionally, second signal path <NUM> includes a third electrical connection <NUM>, a fourth electrical connection <NUM> and a second isolation barrier <NUM>.

In the illustrated embodiment, first isolation barrier <NUM> and first circuit <NUM> are each supported by surface 220a of the first die <NUM>. Additionally, in the illustrated embodiment second isolation barrier <NUM>, second circuit <NUM> and a third circuit <NUM> are each supported by a respective surface 430a (e.g., an active surface) of the second die <NUM>. More particularly, the second circuit <NUM> is supported by a selected portion of surface 430a on the first die area <NUM> of second die <NUM> and the third circuit <NUM> is supported by a selected portion of surface 430a on the second die area <NUM> of second die <NUM>.

Terminal <NUM> of the first circuit <NUM> is coupled to the first portion of the first isolation barrier <NUM> through first electrical connection <NUM> of the first signal path <NUM> and terminal <NUM> of the second circuit <NUM> is coupled to the second portion of the first isolation barrier <NUM> through second electrical connection <NUM> of the first signal path <NUM>. Additionally, a terminal <NUM> (e.g., an I/O terminal) of the second circuit <NUM> is coupled to a first portion of the second isolation barrier <NUM> through third electrical connection <NUM> of the second signal path <NUM>. Further, a terminal <NUM> of the third circuit <NUM> is coupled to a second opposing portion of the second isolation barrier <NUM> through fourth electrical connection <NUM> of the second signal path <NUM>.

In embodiments, the first circuit <NUM> and the first die <NUM> operate in a first voltage domain and the second circuit <NUM> and the first die area <NUM> of the second die <NUM> operate in a second voltage domain that is substantially different from the first voltage domain. Additionally, in embodiments the third circuit <NUM> and the second die area <NUM> of the second die <NUM> operate in a third voltage domain. In some embodiments, the third voltage domain is substantially the same as the first voltage domain, for example. Additionally, in some embodiments the third voltage domain is substantially different from both the first voltage domain and the second voltage domain. In embodiments, separate voltage supply signals and ground connections can be provided to each of the first and second dies <NUM>, <NUM> of the IC package <NUM> to support the respective first, second and third voltage domains from which the first, second and third circuits <NUM>, <NUM>, <NUM>, and the first die <NUM> and first and second die areas <NUM>, <NUM>, may operate. For example, in embodiments the first die <NUM> is coupled to a first supply voltage in the first voltage domain and the second die <NUM> is coupled to second and third supply voltage in second and third respective voltage domains.

With the above-described arrangement of IC package <NUM>, an output signal (e.g., a digital or analog signal) of the first circuit <NUM> can be received by the second circuit <NUM> with signal isolation via first isolation barrier <NUM>. Additionally, with the above-described arrangement of IC package <NUM>, an output signal of the second circuit <NUM> can be received by the first circuit <NUM> with signal isolation via first isolation barrier <NUM>.

Additionally, with the above-described arrangement of IC package <NUM>, an output signal of the second circuit <NUM> can be received by the third circuit <NUM> with signal isolation via second isolation barrier <NUM>. Additionally, with the above-described arrangement of IC package <NUM>, an output signal of the third circuit <NUM> can be received by the second circuit <NUM> with signal isolation via second isolation barrier <NUM>.

In embodiments in which the third circuit <NUM> and the second die area <NUM> of the second die <NUM> operate in a voltage domain (e.g., a third voltage domain) that is the same as or similar to a voltage domain (e.g., a first voltage domain) in which the first circuit <NUM> and the first die <NUM> operate, second isolation barrier <NUM> may be substantially the same as the first isolation barrier <NUM>. Additionally, in embodiments in which the third circuit <NUM> and the second die area <NUM> of the second die <NUM> operate in a voltage domain that is different from a voltage domain in which the first circuit <NUM> and the first die <NUM> operate, second isolation barrier <NUM> may be substantially similar to first isolation barrier <NUM> in that both second isolation barrier <NUM> and first isolation barrier <NUM> include a plurality of isolating layers (i.e., conductive layers, insulating layers, and at least one floating conductive plate). However, second isolation barrier <NUM> may comprise one or more characteristics (e.g., layer dimensions, layer materials, etc.) which are different from corresponding characteristics of the first isolation barrier <NUM>.

As discussed in figures above, it has been found that dimensions (e.g., thickness) of insulating layers and conductive layers of an isolation barrier according to the disclosure, for example, can affect a predetermined level of signal isolation provided by the isolation barrier. In the example embodiment shown, the first isolation barrier <NUM> can provide a first predetermined level of signal isolation between the first die <NUM> and the second die <NUM>. Additionally, the second isolation barrier <NUM> can provide a second predetermined level of signal isolation between the first and second die areas <NUM>, <NUM> of the second die <NUM>. In some embodiments, the first predetermined level of signal isolation may be substantially the same as the second predetermined level of signal isolation. Additionally, in some embodiments the first predetermined level of signal isolation may be substantially different from the second predetermined level of signal isolation.

Referring to <FIG>, in which like elements of <FIG> are shown having like reference designations, cross-sections of first and second example isolation barriers <NUM>, <NUM> of first and second respective IC package signal paths according to the disclosure are shown. In the illustrated embodiment, the first isolation barrier <NUM> is shown coupled to a first respective terminal <NUM> of a circuit <NUM> through an electrical connection <NUM> of the first signal path. Additionally, the second isolation barrier <NUM> is shown coupled to a second respective terminal <NUM> of the circuit <NUM> through an electrical connection <NUM> of the second signal path. In embodiments, the first signal path also includes an electrical connection <NUM> and the second signal path includes an electrical connection <NUM>. In embodiments, at least one of the electrical connections <NUM>, <NUM>, <NUM>, <NUM> of the signals paths includes or is provided as a wirebond.

In embodiments, the first isolation barrier <NUM> is supported by a first respective die (e.g., <NUM>, shown in <FIG>) of the IC package including the first isolation barrier <NUM>. Additionally, in embodiments the isolation barrier <NUM> and the circuit <NUM> are supported by a second respective die (e.g., <NUM>, shown in <FIG>) of the IC package including the second isolation barrier <NUM>.

In embodiments, first isolation barrier <NUM> corresponds to first isolation barrier <NUM> shown in <FIG>. Additionally, in embodiments second isolation barrier <NUM> corresponds to second isolation barrier <NUM> shown in <FIG>. Further, in embodiments circuit <NUM> corresponds to second circuit <NUM> shown in <FIG> or a conductive element.

As illustrated, similar to first isolation barrier <NUM> described above in connection with <FIG>, second isolation barrier <NUM> includes a plurality of conductive layers (here, conductive layers <NUM>, <NUM>), a plurality of insulating layers (here, insulating layers <NUM>, <NUM>), and at least one floating conductive plate (here, floating conductive plate <NUM>).

In the example embodiment shown, conductive layers <NUM>, <NUM>, insulating layers <NUM>, <NUM> and floating conductive plate <NUM> of second isolation barrier <NUM> are substantially the same as conductive layers <NUM>, <NUM>, insulating layers <NUM>, <NUM> and floating conductive plate <NUM> of first isolation barrier <NUM>, and thus are not described in detailed again herein. However, as discussed above, it is understood that one or more characteristics (e.g., dimensions and/or materials) of conductive layers, insulating layers and floating conductive plates of isolation barriers according to the disclosure may be selected such that the isolation barriers are able to provide a predetermined level of signal, for example, between a first die (or die area) and a second die (or die area).

In embodiments, isolation barrier <NUM> can receive signals from a first circuit via electrical connection <NUM> of the first signal path including isolation barrier <NUM> and the isolation barrier <NUM> can transfer the signals to circuit <NUM> (e.g., a second circuit) via electrical connection <NUM> of the first signal path. Additionally, in embodiments isolation barrier <NUM> can receive signals from a third circuit via electrical connection <NUM> of the second signal path including isolation barrier <NUM> and the isolation barrier <NUM> can transfer the signals to circuit <NUM> via electrical connection <NUM> of the second signal path.

In embodiments in which the third circuit and circuit <NUM> operate in a same voltage domain, for example, isolation barrier <NUM> may include a reduced number of isolation layers than that which is shown. For example, in one embodiment, second insulating layer <NUM> and floating conductive plate <NUM> can be removed from the isolation barrier <NUM> such that isolation <NUM> functions in a same or similar manner as a bypass capacitor type element, for example. In such embodiment, first insulating layer <NUM> is disposed over first conductive layer <NUM> and second conductive layer <NUM> is disposed over first insulating layer <NUM>. In embodiments, as a result of the modified isolation barrier <NUM> not having floating conductive plate <NUM>, for example, modified isolation barrier <NUM> may not have some of the advantages of isolation barrier <NUM> discussed above in connection with <FIG>. For example, insulating layer <NUM> in modified isolation barrier <NUM> may have a reduced lifetime compared to insulating layers <NUM>, <NUM> in original isolation barrier <NUM> (and isolation barrier <NUM>). Additionally, modified isolation barrier <NUM> may provide a reduced amount of signal isolation between the dies (or die areas) on which the third circuit and circuit <NUM> are supported compared, for example, to original isolation barrier <NUM>.

Conversely, in embodiments in which the third circuit and circuit <NUM> operate in voltage domains that are significantly different from each other, isolation barrier <NUM> may include an increased number of layers than that which is shown. For example, in one embodiment, a second conductive plate and a third insulating layer can be added to the isolation barrier <NUM> to provide an increased level of signal isolation between the dies (or die areas) on which the third circuit and circuit <NUM> are supported. In such embodiment, the third insulating layer can be disposed between the second insulating layer <NUM> and the second conductive layer <NUM> and the second conductive plate can be disposed between the second insulating layer <NUM> and the third insulating layer. It is understood that other embodiments of isolation barrier <NUM> and isolation barrier <NUM> are of course possible.

Referring now to <FIG>, in which like elements of <FIG> and <FIG> are shown having like reference designations, a further example signal isolator <NUM> that forms part of a signal isolator IC package <NUM> includes a die <NUM> having a first die area <NUM> and a second die area <NUM>. The IC package <NUM> also includes a signal path <NUM> from the first die area <NUM> to the second die area <NUM>. In the example embodiment shown, the signal path <NUM> includes a first electrical connection <NUM>, a second electrical connection <NUM> and an isolation barrier <NUM>. Additionally, in the example embodiment shown, the signal path <NUM> extends from the first die area <NUM> to the second die area <NUM> across a spacing <NUM> between the first and second die areas <NUM>, <NUM>. In embodiments, the spacing <NUM> (in conjunction with isolation barrier <NUM> and/or other isolation means) provides galvanic isolation between the first and second die areas <NUM>, <NUM>.

In the illustrated embodiment, first isolation barrier <NUM>, first circuit <NUM> and second circuit <NUM> are each supported by a respective surface 620a (e.g., an active surface) of the die <NUM>. More particularly, the first circuit <NUM> is supported by a selected portion of surface 620a on the first die area <NUM> of the die <NUM> and the second circuit <NUM> is supported by a selected portion of surface 620a on the second die area <NUM> of die <NUM>. Additionally, the first isolation barrier <NUM> is supported by a selected portion of surface 620a between the first and second die areas <NUM>, <NUM> in the illustrated embodiment. In embodiments, the first isolation barrier <NUM> may alternatively be supported by a selected portion of a respective one of the first and second die areas <NUM>, <NUM>.

In the illustrated embodiment, terminal <NUM> of the first circuit <NUM> is coupled to the first portion of the first isolation barrier <NUM> through first electrical connection <NUM> of the signal path <NUM>. Additionally, terminal <NUM> of the second circuit <NUM> is coupled to the second portion of the first isolation barrier <NUM> through second electrical connection <NUM> of the signal path <NUM>. In embodiments, the first circuit <NUM> and the first die area <NUM> operate in a first voltage domain and the second circuit <NUM> and the second die area <NUM> operate in a second voltage domain that is substantially different from the first voltage domain. In embodiments, the first voltage domain in which first circuit <NUM> and first die area <NUM> may operate in signal isolator IC package <NUM> is substantially closer to the second voltage domain in which second circuit <NUM> and second die area <NUM> may operate in signal isolator IC package <NUM> than the first and second voltage domains in which the first and second circuits <NUM>, <NUM> and first and second die <NUM>, <NUM> operate in signal isolator IC package <NUM> described above in connection with <FIG>, for example. As illustrated, the foregoing may reduce a need to provide the second circuit <NUM> on a different die from the first circuit <NUM> in signal isolator IC package <NUM>.

With the above-described arrangement of IC package <NUM>, an output signal of the first circuit <NUM> can be received by the second circuit <NUM> with signal isolation via isolation barrier <NUM>. Additionally, with the above-described arrangement of IC package <NUM>, an output signal of the second circuit <NUM> can be received by the first circuit <NUM> with signal isolation via isolation barrier <NUM>. In embodiments, isolation barrier <NUM> may be the same as or similar to isolation barrier <NUM> described above in connection with <FIG>, for example.

It should be appreciated that the signal isolator IC packages shown and described in connection with figures above (e.g., <NUM>, shown in <FIG>) are but several of many potential configurations of signal isolator IC packages in accordance with the embodiments of the disclosure. As one example, a signal isolator IC package according to a further embodiment of the disclosure may take the form of a three-dimensional (3D) IC package including a plurality of vertically stacked die and an isolation barrier (or barriers) supported by respective die of the IC package. The 3D IC package, similar to IC packages shown and described in connection with figures above, may support two or more voltage domains.

Additionally, it should be appreciated that the example isolation barriers of the signal isolator IC packages shown and described in connection with figures above (e.g., <NUM>, shown in <FIG>) are but several of many potential configurations of isolation barriers in accordance with the embodiments of the disclosure. For example, while the isolation barriers are shown as including a particular number of conductive layers, insulating layers, and floating conductive plates (collectively, "isolation layers"), it should be appreciated that isolation barriers in accordance with embodiments of the disclosure may include more the particular number of isolation layers in some embodiments.

As described above and as will be appreciated by those of ordinary skill in the art, embodiments of the disclosure herein may be configured as a system, method, or combination thereof. Accordingly, embodiments of the present disclosure may be comprised of various means including hardware, software, firmware or any combination thereof.

Having described preferred embodiments, which serve to illustrate various concepts, structures and techniques, which are the subject of this patent, it will now become apparent to those of ordinary skill in the art that other embodiments incorporating these concepts, structures and techniques may be used. Additionally, elements of different embodiments described herein may be combined to form other embodiments not specifically set forth above.

Claim 1:
A signal isolator integrated circuit package (<NUM>), comprising:
a first die (<NUM>) in a first voltage domain;
a second die (<NUM>) in a second voltage domain, wherein the first and second die (<NUM>, <NUM>) are galvanically isolated; and
a first signal path (<NUM>) from the first die (<NUM>) to the second die (<NUM>) via a first isolation barrier (<NUM>) supported by the first die (<NUM>), the first isolation barrier (<NUM>) comprising:
a first conductive layer (<NUM>) disposed over a surface of the first die (<NUM>);
a first insulating layer (<NUM>) disposed over the first conductive layer (<NUM>);
a second insulating layer (<NUM>) disposed over the first insulating layer (<NUM>);
a second conductive layer (<NUM>) disposed over the second insulating layer (<NUM>); and
a first floating conductive plate (<NUM>) disposed between the first insulating layer (<NUM>) and the second insulating layer (<NUM>), characterised in that at least one edge of the first floating conductive plate (<NUM>) extends beyond an edge of the first conductive layer (<NUM>) to increase evenness of electric charge distribution.