Patent Description:
In some examples, file systems, databases, or disk caches may be associated with different types of applications or an operating system (OS) in a computing system. For these examples, an application or OS may issue a transaction request such as a set of one or more write operations to a non-volatile memory (e.g., a write transaction) included in a storage device. The application or OS typically needs to ensure that the write transaction completes before issuing a next transaction. If a computing system needs to ensure that a write transaction is complete, the computing system may characterize operations associated with these types of write transactions as atomic write transactions.

When applications such file systems, databases, and disk caches update the data on a storage device, they must also update some metadata to allow for correct lookup/recovery of the data in the future. Many storage devices do not provide for atomic metadata per input/output (I/O) request, which results in requiring complex journaling or logging mechanisms and corresponding complex and expensive recovery methods for power loss handling. This requires additional I/O requests to be performed. In some computing environments, such journal/metadata writes may be combined to reduce additional I/O requests (e.g., writing them only on OS-flushes), however other scenarios (e.g., when users/admins disable volatile write buffering, commonly done in data center solutions) require an additional metadata write operation per data write operation. This doubles the number of write operations to the storage device, causing performance, power, and endurance degradation.

In some computing environments, applications or an OS may synthesize their respective needed atomicity guarantees for indivisibly writing arbitrarily sized and arbitrarily scattered data on an HDD or SSD by using one or more of known techniques like copy-and-update, journaling, ordered updates, two pass writes, sequenced additional metadata writes, etc. These techniques also generally double the number of write operations to a storage device and thus may significantly hurt both performance and endurance of the storage device.

Fused commands as described in the Non-Volatile Memory (NVM) Express standard (version <NUM>, available at nvmexpress. org), are not sufficient to solve the problem. These fused commands do not guarantee all-or-none atomic behavior, require sequenced operations, and also must have the same logical block addresses (LBAs), which is generally not possible for such applications.

<CIT> discusses techniques for a write transaction to one or more memory devices maintained at a storage device. The write transaction includes a disjointed atomic write transaction that includes a plurality of asynchronous write operations from an application or operating system executing on a computing platform to a storage device coupled with the computing platform. The disjointed atomic write transaction is associated with a multi-block transaction request initiated by the application or operating system.

<CIT> discusses generating an instruction set to replace a plurality of atomic operations with a single atomic operation. The instruction set includes an accumulation instruction to compute a prefix sum for a plurality of initial values associated with a plurality of processing lanes to generate a plurality of accumulated values. The instruction set also includes a broadcast instruction to return a pre-existing value to be added with each of the plurality of accumulated values to generate a plurality of intermediate accumulated values.

The invention is defined in the claims. In the following description, any embodiment referred to and not falling within the scope of the claims is merely an example useful to the understanding of the invention.

As contemplated in the present disclosure, applications or an OS associated with file-systems, databases, or disk caches may need to ensure that a write transaction to a storage device completes before issuing a next transaction. Ensuring the write transaction completes requires a logically atomic write transaction to provide data consistency for users of these applications or the OS. Logically atomic write transactions may allow for multiple operations to be grouped into a single logical entity that may enable these applications or the OS to either see all write transactions completed or none of the write transactions completed. In embodiments, in an atomic write transaction, data may be stored in one type of memory in a storage device and associated metadata may be stored in another type of memory in the storage device.

<FIG> illustrates an example system <NUM>. In some examples, as shown in <FIG>, system <NUM> includes a host computing platform <NUM> coupled to a storage device <NUM> through I/O interface <NUM> and I/O interface <NUM>. Also, as shown in <FIG>, host computing platform <NUM> may include an OS <NUM>, one or more system memory device(s) <NUM>, circuitry <NUM> and one or more application(s) <NUM>. For these examples, circuitry <NUM> may be capable of executing various functional elements of host computing platform <NUM> such as OS <NUM> and application(s) <NUM> that may be maintained, at least in part, within system memory device(s) <NUM>. Circuitry <NUM> may include host processing circuitry to include one or more central processing units (CPUs) and associated chipsets and/or controllers.

According to some examples, as shown in <FIG>, OS <NUM> may include a file system <NUM> and a storage device driver <NUM> and storage device <NUM> may include a storage controller <NUM>, one or more storage memory device(s) <NUM> and memory <NUM>. OS <NUM> may be arranged to implement storage device driver <NUM> to coordinate at least temporary storage of data for a file from among files <NUM>-<NUM> to <NUM>-n, where "n" is any whole positive integer > <NUM>, to storage memory device(s) <NUM>. The data, for example, may have originated from or may be associated with executing at least portions of application(s) <NUM> and/or OS <NUM>. As described in more detail below, the OS <NUM> communicates one or more commands and transactions with storage device <NUM> to write data to storage device <NUM>. The commands and transactions may be organized and processed by logic and/or features at the storage device <NUM> to implement an atomic write transaction to write the data to storage device <NUM>.

In some examples, storage controller <NUM> may include logic and/or features to receive a write transaction request for an atomic write transaction to storage memory device(s) <NUM> at storage device <NUM>. For these examples, the atomic write transaction may be initiated by or sourced from an application such as application(s) <NUM> that utilizes file system <NUM> to write data to storage device <NUM> through input/output (I/O) interfaces <NUM> and <NUM>.

In some examples, memory <NUM> may include volatile types of memory including, but not limited to, RAM, D-RAM, DDR SDRAM, SRAM, T-RAM or Z-RAM. One example of volatile memory includes DRAM, or some variant such as SDRAM. A memory subsystem as described herein may be compatible with a number of memory technologies, such as DDR4 (DDR version <NUM>, initial specification published in September <NUM> by JEDEC), LPDDR4 (LOW POWER DOUBLE DATA RATE (LPDDR) version <NUM>, JESD209-<NUM>, originally published by JEDEC in August <NUM>), WIO2 (Wide I/O <NUM> (WideIO2), JESD229-<NUM>, originally published by JEDEC in August <NUM>), HBM (HIGH BANDWIDTH MEMORY DRAM, JESD235, originally published by JEDEC in October <NUM>), DDR5 (DDR version <NUM>, currently in discussion by JEDEC), LPDDR5 (LPDDR version <NUM>, currently in discussion by JEDEC), HBM2 (HBM version <NUM>, currently in discussion by JEDEC), and/or others, and technologies based on derivatives or extensions of such specifications.

However, examples are not limited in this manner, and in some instances, memory <NUM> may include non-volatile types of memory, whose state is determinate even if power is interrupted to memory <NUM>. In some examples, memory <NUM> may include non-volatile types of memory that is a block addressable, such as for NAND or NOR technologies. Thus, a memory <NUM> can also include a future generation of types of non-volatile memory, such as a <NUM>-dimensional cross-point memory (3D XPoint™ commercially available from Intel Corporation), or other byte addressable non-volatile types of memory. According to some examples, the memory <NUM> may include types of non-volatile memory that includes chalcogenide glass, multi-threshold level NAND flash memory, NOR flash memory, single or multi-level Phase Change Memory (PCM), a resistive memory, nanowire memory, FeTRAM, MRAM that incorporates memristor technology, or STT-MRAM, or a combination of any of the above, or other memory.

In some examples, storage memory device(s) <NUM> may be a device to store data from write transactions and/or write operations. Storage memory device(s) <NUM> may include one or more chips or dies having gates that may individually include one or more types of non-volatile memory to include, but not limited to, NAND flash memory, NOR flash memory, <NUM>-D cross-point memory (3D XPoint™), ferroelectric memory, SONOS memory, ferroelectric polymer memory, FeTRAM, FeRAM, ovonic memory, nanowire, EEPROM, phase change memory, memristors or STT-MRAM. For these examples, storage device <NUM> may be arranged or configured as a solid-state drive (SSD). The data may be read and written in blocks and a mapping or location information for the blocks may be kept in memory <NUM>.

Examples are not limited to storage devices arranged or configured as SSDs, other storage devices such as a hard disk drive (HDD) are contemplated. In these instances, the storage memory device (s) <NUM> may include one or more platters or rotating disks having a magnet material to store data.

According to some examples, communications between storage device driver <NUM> and storage controller <NUM> for data stored in storage memory devices(s) <NUM> and accessed via files <NUM>-<NUM> to <NUM>-n may be routed through I/O interface <NUM> and I/O interface <NUM>. I/O interfaces <NUM> and <NUM> may be arranged as a Serial Advanced Technology Attachment (SATA) interface to couple elements of host computing platform <NUM> to storage device <NUM>. In another example, I/O interfaces <NUM> and <NUM> may be arranged as a Serial Attached Small Computer System Interface (SCSI) (or simply SAS) interface to couple elements of host computing platform <NUM> to storage device <NUM>. In another example, I/O interfaces <NUM> and <NUM> may be arranged as a Peripheral Component Interconnect Express (PCIe) interface to couple elements of host computing platform <NUM> to storage device <NUM>. In another example, I/O interfaces <NUM> and <NUM> may be arranged as a Non-Volatile Memory Express (NVMe) interface to couple elements of host computing platform <NUM> to storage device <NUM>. For this other example, communication protocols may be utilized to communicate through I/O interfaces <NUM> and <NUM> as described in industry standards or specifications (including progenies or variants) such as the Peripheral Component Interconnect (PCI) Express Base Specification, revision <NUM>, published in November <NUM> ("PCI Express specification" or "PCIe specification") or later revisions, and/or the Non-Volatile Memory Express (NVMe) Specification, revision <NUM>, also published in November <NUM> ("NVMe specification") or later revisions.

In some examples, system memory device(s) <NUM> may store information and commands which may be used by circuitry <NUM> for processing information. Also, as shown in <FIG>, circuitry <NUM> may include a memory controller <NUM>. Memory controller <NUM> may be arranged to control access to data at least temporarily stored at system memory device(s) <NUM> for eventual storage to storage memory device(s) <NUM> at storage device <NUM>.

In some examples, storage device driver <NUM> may include logic and/or features to forward commands associated with one or more write transactions and/or write operations originating from application(s) <NUM>. For example, the storage device driver <NUM> may forward commands associated with atomic write transactions such that data may be caused to be stored to storage memory device(s) <NUM> at storage device <NUM>. More specifically, storage device driver <NUM> can enable communication of the write operations from application(s) <NUM> at computing platform <NUM> to controller <NUM>.

System Memory device(s) <NUM> may include one or more chips or dies having volatile types of memory such RAM, D-RAM, DDR SDRAM, SRAM, T-RAM or Z-RAM. However, examples are not limited in this manner, and in some instances, system memory device(s) <NUM> may include non-volatile types of memory, including, but not limited to, NAND flash memory, NOR flash memory, <NUM>-D cross-point memory (3D XPoint™), ferroelectric memory, SONOS memory, ferroelectric polymer memory, FeTRAM, FeRAM, ovonic memory, nanowire, EEPROM, phase change memory, memristors or STT-MRAM.

According to some examples, host computing platform <NUM> may include, but is not limited to, a server, a server array or server farm, a web server, a network server, an Internet server, a work station, a mini-computer, a main frame computer, a supercomputer, a network appliance, a web appliance, a distributed computing system, a personal computer, a tablet computer, a smart phone, multiprocessor systems, processor-based systems, or combination thereof.

<FIG> illustrates an example process. In some examples, process as shown in <FIG> depicts a process to implement an atomic write transaction. For these examples, this process may be implemented by or use components or elements of system <NUM> shown in <FIG> such as application(s) <NUM>, OS <NUM>, storage device <NUM>, storage controller <NUM>, memory <NUM>, and/or storage memory device(s) <NUM>. However, this process is not limited to being implemented by or use only these component or elements of system <NUM>.

In embodiments of the present invention, a storage device <NUM> having multiple storage memory devices <NUM> (e.g., multiple media) may be extended to provide a write transaction that writes to two or more of the multiple media in the storage device simultaneously and atomically. In an embodiment, the storage memory devices <NUM> includes two or more non-volatile memories (NVMs). In an embodiment, a first NVM may be a NAND memory and a second NVM may be a power-protected DRAM memory. In an embodiment, the power-protected DRAM memory may comprise an Internal Memory Buffer (IMB). In an embodiment, primary user data such as cache lines (typically comprising multiple sectors) may be written to the first NVM, and metadata (such as cache metadata comprising multiple bytes) associated with the storage of the primary user data may be written to the second NVM. Multiple writes to either media may be combined. In some examples, at <NUM>, a write transaction request called Atomic Multimedia Write may be sent or submitted by application(s) <NUM> via OS <NUM> and/or storage device driver <NUM> for an atomic write transaction to be handled by storage device <NUM>. In embodiments, parameters of the Atomic Multimedia Write transaction comprise a starting logical block address (LBA) for a sector for storing user data in a first memory device ("L"), a number of sectors of user data ("N"), user data ("Data <NUM>"), a starting address for storing associated metadata in a second memory device ("A"), a number of words of metadata to be stored ("K"), and the metadata ("Data <NUM>"), although in other embodiments other parameter combinations may also be used.

Completion of the write request may be returned to the host application(s) <NUM> when all related writes are complete, with "all or none" behavior (i.e., the write transaction exhibits atomicity). In embodiments, a well-defined command start sequence, power loss imminent (PLI) power capability, and internal rollback capability may be used to ensure atomicity.

Embodiments of the present invention provide the benefits of atomic metadata support, while also leveraging the benefits of small granularity, fast media for storing the metadata.

While embodiments described herein show a storage device <NUM> with two storage memory devices <NUM>, storage device <NUM> may be extended to M media types to provide atomic operations across any subset of the M media, wherein M is a natural number. Similarly, while some embodiments describe a context of a single logical block address (LBA) range being written to the first media, this may be extended in other embodiments to multiple ranges per media.

<FIG> illustrates an example storage device <NUM>. In an embodiment, storage device <NUM> includes media <NUM><NUM> and media <NUM><NUM>. In an embodiment, media <NUM><NUM> may be a NAND NVM memory, and media <NUM><NUM> may be a 3D XPoint™ NVM memory. In other embodiments, additional NAND and/or DRAM and/or 3D XPoint™ memory may be added. In an embodiment, available data storage within media <NUM><NUM> may be exposed to application(s) <NUM> as a first namespace that has a write granularity of, for example, 512B sectors, and available data storage within media <NUM> may be exposed to application(s) <NUM> as a second namespace that has a write granularity of, for example, <NUM> KB double words. Other sizes may also be used. Embodiments of storage device <NUM> provide a command equivalent to "Write Media <NUM> (L, N, Data <NUM>) that writes N sectors of Data <NUM><NUM> starting at sector L in the first namespace. Embodiments of storage device <NUM> also provide a command equivalent to "Write Media <NUM> (A, K, Data <NUM>) that writes K double words of Data <NUM><NUM> starting at address A in the second namespace.

Embodiments of the present invention combine the two commands to provide a new command Atomic Multimedia Write (L, N, Data <NUM>, A, K, Data <NUM>) <NUM>. The command instructs storage device <NUM> to do both the Write Media <NUM> and Write Media <NUM> operations simultaneously, while ensuring that either both succeed or both fail. That is, to implement the Atomic Multimedia Write (L, N, Data <NUM>, A, K, Data <NUM>) command <NUM>, storage device atomically writes N sectors of Data <NUM><NUM> starting at sector L in the first namespace and writes K double words of Data <NUM><NUM> starting at address A in the second namespace. In an embodiment, Data <NUM><NUM> comprises user data and Data <NUM><NUM> comprises metadata relating to storage of Data <NUM><NUM>.

If either write fails, data on Media <NUM><NUM> and data on Media <NUM><NUM> may be left unchanged for both of the address LBA and address ranges (in Media <NUM><NUM> and Media <NUM>, respectively). In other embodiments, alternate schemes may be used to specify the atomic multimedia write operation, such as by using extensions to fused commands, or by using transaction IDs, with a difference being that in embodiments of the present invention the associated individual writes may refer to multiple media types. In other embodiments, other granularities and methods of exposing the data storage regions in the media may be used. In other embodiments, the Atomic Multimedia Write command may be exposed via NVMe or other protocol commands equivalent to the command described herein.

In embodiments, storage device <NUM> waits for both Data <NUM><NUM> and Data <NUM><NUM> buffers to be available in the storage device, e.g., for the appropriate corresponding direct memory accesses (DMAs) to complete. In an embodiment, the Atomic Multimedia Write command may be completed in a single DMA transfer. The storage device may then optionally return a completion indication of the atomic write transaction to storage device driver <NUM> at this time if the storage device has PLI power <NUM> protection capability. Storage device <NUM> executes Write Media <NUM> (L, N, Data <NUM>) <NUM> and/or Write Media <NUM> (A, K, Data <NUM>) <NUM> operations internally, and then may return completion indication of the atomic write command to storage device driver <NUM> if the storage device did not do so earlier. If the Write Media <NUM> (L, N, Data <NUM>) <NUM> and/or the Write Media <NUM> (A, K, Data <NUM>) <NUM> write operations are interrupted by a power loss event, then in an embodiment a PLI power <NUM> and/or a power loss recovery (PLR) scheme may be used to complete the write operations in a non-volatile manner.

In an embodiment, if storage device <NUM> does not have PLI power <NUM>, storage device may not early complete the Atomic Multimedia Write request <NUM>, and must wait for both Write Media <NUM><NUM> and Write Media <NUM><NUM> write operations to complete successfully to Media <NUM><NUM> and Media <NUM><NUM>, respectively, before returning a success indicator to storage device driver <NUM>. If storage device <NUM> returns a failure indicator (or if there is a power failure on a storage device without PLI power capability), then storage device <NUM> may roll back the writes of Write Media <NUM><NUM> and Write Media <NUM><NUM> using known roll back methods (such as internal journaling, for example).

Thus, in embodiment of the present invention, data may be written to first type of memory, and metadata associated with storing the data may be stored to a second type of memory simultaneously in an atomic operation.

<FIG> illustrates an example block diagram for an apparatus <NUM>. Although apparatus <NUM> shown in <FIG> has a limited number of elements in a certain topology, it may be appreciated that the apparatus <NUM> may include more or less elements in alternate topologies as desired for a given implementation.

The apparatus <NUM> may be supported by circuitry <NUM> and apparatus <NUM> may be a storage controller maintained at a storage device such as storage controller <NUM> for storage device <NUM> of system <NUM> shown in <FIG>. The storage device may be coupled to a host computing platform or device similar to host computing platform <NUM> also shown in <FIG>. Also, as mentioned above, the storage device may include one or more memory devices or dies to store data associated with an Atomic Multimedia Write transaction request placed by one or more applications hosted by the host computing platform. Circuitry <NUM> may be arranged to execute one or more software or firmware implemented components or modules <NUM>-a (e.g., implemented, at least in part, by a storage controller of a storage device). It is worthy to note that "a" and "b" and "c" and similar designators as used herein are intended to be variables representing any positive integer. Thus, for example, if an implementation sets a value for a = <NUM>, then a complete set of software or firmware for components or modules <NUM>-a may include components <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>, or <NUM>-<NUM>. Also, these "components" may be software/firmware stored in computer-readable media, and although the components are shown in <FIG> as discrete boxes, this does not limit these components to storage in distinct computer-readable media components (e.g., a separate memory, etc.).

According to some examples, circuitry <NUM> may include a processor or processor circuitry. The processor or processor circuitry can be any of various commercially available processors, including without limitation an AMD® Athlon®, Duron® and Opteron® processors; ARM® application, embedded and secure processors; IBM® and Motorola® DragonBall® and PowerPC® processors; IBM and Sony® Cell processors; Intel® Atom®, Celeron®, Core (<NUM>) Duo®, Core i3, Core i5, Core i7, Itanium®, Pentium®, Xeon®, Xeon Phi® and XScale® processors; and similar processors. According to some examples circuitry <NUM> may also include one or more application-specific integrated circuits (ASICs) and at least some components <NUM>-a may be implemented as hardware elements of these ASICs.

According to some examples, apparatus <NUM> may include a request component <NUM>-<NUM>. Request component <NUM>-<NUM> may be a logic and/or feature executed by circuitry <NUM> to receive a write request <NUM> for an Atomic Multimedia Write transaction to one or more storage memory devices. For these examples, the Atomic Multimedia Write transaction request may be included in write request <NUM> and the one or more storage memory devices may be located at the storage device that includes apparatus <NUM>. Write request <NUM>, for example, may have been sent from an application executing at a host computing device coupled with the storage device that includes apparatus <NUM>.

In some examples, apparatus <NUM> may also include a store data component <NUM>-<NUM>. Store component <NUM>-<NUM> may be a logic and/or feature executed by circuitry <NUM> to cause the data included in the Atomic Multimedia Write transaction to be stored to the one or more storage memory devices. In some examples, store component <NUM>-<NUM> may cause the data to be stored to physical memory addresses of the one or more storage memory devices of a first memory type.

In some examples, apparatus <NUM> may also include a store metadata component <NUM>-<NUM>. Store component <NUM>-<NUM> may be a logic and/or feature executed by circuitry <NUM> to cause the metadata included in the Atomic Multimedia Write transaction to be stored to the one or more storage memory devices. In some examples, store component <NUM>-<NUM> may cause the metadata to be stored to physical memory addresses of the one or more storage memory devices of a second memory type. When circuitry <NUM> successfully completes the Atomic Multimedia Write transaction, circuitry <NUM> may return a complete status <NUM> to the requesting application.

According to some examples, apparatus <NUM> may also include a power-fail component <NUM>-<NUM>. Power-fail component <NUM>-<NUM> may be a logic and/or feature executed by circuitry <NUM> to cause data and metadata stored to the one or more memory storage devices to be preserved or accessible following a detected power-fail event indicated in power-fail notice <NUM>.

Included herein is a set of logic flows representative of example methodologies for performing novel aspects of the disclosed architecture. While, for purposes of simplicity of explanation, the one or more methodologies shown herein are shown and described as a series of acts, those skilled in the art will understand and appreciate that the methodologies are not limited by the order of acts. Some acts may, in accordance therewith, occur in a different order and/or concurrently with other acts from that shown and described herein. For example, those skilled in the art will understand and appreciate that a methodology could alternatively be represented as a series of interrelated states or events, such as in a state diagram. Moreover, not all acts illustrated in a methodology may be required for a novel implementation.

A logic flow may be implemented in software, firmware, and/or hardware. In software and firmware embodiments, a logic flow may be implemented by computer executable instructions stored on at least one non-transitory computer readable medium or machine readable medium, such as an optical, magnetic or semiconductor storage.

<FIG> illustrates an example of a first logic flow <NUM>. Logic flow <NUM> may be representative of some or all of the operations executed by one or more logic, features, or devices described herein, such as apparatus <NUM>. More particularly, logic flow <NUM> may be implemented by one or more of request component <NUM>-<NUM>, store data component <NUM>-<NUM>, store metadata component <NUM>-<NUM>, and power fail component <NUM>-<NUM>.

According to some examples, a storage controller for a storage device may receive a write transaction request for an Atomic Multimedia Write transaction <NUM> to the one or more storage memory devices, when storage device <NUM> provides sufficient PLI power <NUM>. For these examples, request component <NUM>-<NUM> may receive the write transaction request for the Atomic Multimedia Write transaction. At block <NUM>, data <NUM><NUM> and associated metadata data <NUM><NUM> may be received and stored into a transfer buffer in memory <NUM>. At block <NUM>, the request may be completed to the host computing platform. At block <NUM>, commands to write media <NUM> (L, N, Data <NUM>) <NUM> and to write media <NUM> (A, K, Data <NUM>) <NUM> may be issued in parallel, without waiting for the commands to complete, using store data component <NUM>-<NUM> and store metadata component <NUM>-<NUM>, respectively. At block <NUM>, if a power loss event is received during execution of the write media <NUM> or write media <NUM> operations, any pending media <NUM> and media <NUM> write operations may be completed at least in part using PLI power <NUM> and power fail component <NUM>-<NUM>.

<FIG> illustrates an example of a second logic flow <NUM>. Logic flow <NUM> may be representative of some or all of the operations executed by one or more logic, features, or devices described herein, such as apparatus <NUM>. More particularly, logic flow <NUM> may be implemented by one or more of request component <NUM>-<NUM>, store data component <NUM>-<NUM>, store metadata component <NUM>-<NUM>, and power fail component <NUM>-<NUM>.

According to some examples, a storage controller for a storage device may receive a write transaction request for an Atomic Multimedia Write transaction <NUM> to the one or more storage memory devices, when storage device <NUM> provides minimal PLI power <NUM> and also supports atomic in-place write operations on individual media. For these examples, media <NUM><NUM> may be a NAND memory and media <NUM><NUM> may be a 3D XPoint™ memory. For these examples, Atomic Write Media <NUM> may be implemented using known rollback techniques and Atomic Write Media <NUM> may be implemented using minimal PLI power. Other implementations are possible. For these examples, request component <NUM>-<NUM> may receive the write transaction request for the Atomic Multimedia Write transaction. At block <NUM>, data <NUM><NUM> and associated metadata data <NUM><NUM> may be received and stored into a transfer buffer in memory <NUM>. At block <NUM>, a read operation may be executed to get the metadata starting at address A and of length K from media <NUM><NUM> and store this metadata, for future use in case of a power loss event, as temporary metadata in memory <NUM>. At block <NUM>, commands to Atomic Write Media <NUM> (L, N, Data <NUM>) <NUM> and to Atomic Write Media <NUM> (A, K, Data <NUM>) <NUM> may be issued in parallel, without waiting for the commands to complete, using store data component <NUM>-<NUM> and store metadata component <NUM>-<NUM>, respectively. At block <NUM>, the request to the host computing platform may be completed when both Atomic Write Media <NUM><NUM> and Atomic Write Media <NUM><NUM> operations are complete.

<FIG> illustrates an example of a third logic flow <NUM>. Logic flow <NUM> may be representative of some or all of the operations executed by one or more logic, features, or devices described herein, such as apparatus <NUM>. More particularly, logic flow <NUM> may be implemented by one or more of request component <NUM>-<NUM>, store data component <NUM>-<NUM>, store metadata component <NUM>-<NUM>, and power fail component <NUM>-<NUM>. Logic flow <NUM> illustrates processing by storage controller <NUM> when a power loss event is detected and communicated via power fail <NUM> during pending atomic writes.

At block <NUM> if no atomic write transactions are pending, no further power loss event processing is required, thereby ending processing at block <NUM>. If there is at least one Atomic Multimedia Write transaction still pending, block <NUM> determines if an Atomic Write Media <NUM> operation <NUM> (part of the Atomic Multimedia Write transaction) is complete. If so, at block <NUM>, a corresponding Atomic Write Media <NUM> operation <NUM> may be completed using minimal PLI power <NUM>. Processing continues with block <NUM>. If there is not an Atomic Write Media <NUM> operation <NUM> complete at block <NUM>, then the following steps may be performed. At block <NUM>, the Atomic Write Media <NUM> operation may be discarded (which may require a rollback on the next power-up of the storage device, if necessary). At block <NUM>, any pending Atomic Write Media <NUM> operations may be completed. At block <NUM>, a write media <NUM> operation may be performed to restore the temporary metadata obtained as described above in block <NUM> into media <NUM><NUM>. Processing may continue with block <NUM>.

<FIG> illustrates an example of a first storage medium. As shown in <FIG>, the first storage medium includes a storage medium <NUM>. The storage medium <NUM> may comprise an article of manufacture. In some examples, storage medium <NUM> may include any non-transitory computer readable medium or machine readable medium, such as an optical, magnetic or semiconductor storage. Storage medium <NUM> may store various types of computer executable instructions, such as instructions to implement logic flows <NUM>, <NUM>, and <NUM>. Examples of a computer readable or machine-readable storage medium may include any tangible media capable of storing electronic data, including volatile memory or non-volatile memory, removable or non-removable memory, erasable or non-erasable memory, writeable or re-writeable memory, and so forth. Examples of computer executable instructions may include any suitable type of code, such as source code, compiled code, interpreted code, executable code, static code, dynamic code, object-oriented code, visual code, and the like. The examples are not limited in this context.

<FIG> illustrates an example storage device <NUM>. In some examples, as shown in <FIG>, storage device <NUM> may include a processing component <NUM>, other storage device components <NUM> and a communications interface <NUM>. According to some examples, storage device <NUM> may be capable of being coupled to a host computing device or platform.

According to some examples, processing component <NUM> may execute processing operations or logic for apparatus <NUM> and/or storage medium <NUM>. Processing component <NUM> may include various hardware elements, software elements, or a combination of both. Examples of hardware elements may include devices, logic devices, components, processors, microprocessors, circuits, processor circuits, circuit elements (e.g., transistors, resistors, capacitors, inductors, and so forth), integrated circuits, ASIC, programmable logic devices (PLD), digital signal processors (DSP), FPGA/programmable logic, memory units, logic gates, registers, semiconductor device, chips, microchips, chip sets, and so forth. Examples of software elements may include software components, programs, applications, computer programs, application programs, device drivers, system programs, software development programs, machine programs, operating system software, middleware, firmware, software components, routines, subroutines, functions, methods, procedures, software interfaces, application program interfaces (API), instruction sets, computing code, computer code, code segments, computer code segments, words, values, symbols, or any combination thereof. Determining whether an example is implemented using hardware elements and/or software elements may vary in accordance with any number of factors, such as desired computational rate, power levels, heat tolerances, processing cycle budget, input data rates, output data rates, memory resources, data bus speeds and other design or performance constraints, as desired for a given example.

In some examples, other storage device components <NUM> may include common computing elements or circuitry, such as one or more processors, multi-core processors, co-processors, memory units, chipsets, controllers, interfaces, oscillators, timing devices, power supplies, and so forth. Examples of memory units may include without limitation various types of computer readable and/or machine readable storage media in the form of one or more higher speed memory units, such as read-only memory (ROM), RAM, DRAM, DDR DRAM, synchronous DRAM (SDRAM), DDR SDRAM, SRAM, programmable ROM (PROM), EPROM, EEPROM, flash memory, ferroelectric memory, SONOS memory, polymer memory such as ferroelectric polymer memory, nanowire, FeTRAM or FeRAM, ovonic memory, phase change memory, memristers, STT-MRAM, magnetic or optical cards, 3D XPoint™, and any other type of storage media suitable for storing information.

In some examples, communications interface <NUM> may include logic and/or features to support a communication interface. For these examples, communications interface <NUM> may include one or more communication interfaces that operate according to various communication protocols or standards to communicate over direct or network communication links. Direct communications may occur via use of communication protocols such as SMBus, PCIe, NVMe, QPI, SATA, SAS or USB communication protocols. Network communications may occur via use of communication protocols Ethernet, Infiniband, SATA or SAS communication protocols.

Storage device <NUM> may be arranged as an SSD or an HDD that may be configured as described above for storage device <NUM> of system <NUM> as shown in <FIG>. Accordingly, functions and/or specific configurations of storage device <NUM> described herein, may be included or omitted in various embodiments of storage device <NUM>, as suitably desired.

The components and features of storage device <NUM> may be implemented using any combination of discrete circuitry, ASICs, logic gates and/or single chip architectures. Further, the features of storage device <NUM> may be implemented using microcontrollers, programmable logic arrays and/or microprocessors or any combination of the foregoing where suitably appropriate. It is noted that hardware, firmware and/or software elements may be collectively or individually referred to herein as "logic" or "circuit.

It should be appreciated that the example storage device <NUM> shown in the block diagram of <FIG> may represent one functionally descriptive example of many potential implementations. Accordingly, division, omission or inclusion of block functions depicted in the accompanying figures does not infer that the hardware components, circuits, software and/or elements for implementing these functions would necessarily be divided, omitted, or included in embodiments.

<FIG> illustrates an example computing platform <NUM>. In some examples, as shown in <FIG>, computing platform <NUM> may include a storage system <NUM>, a processing component <NUM>, other platform components <NUM> and a communications interface <NUM>. According to some examples, computing platform <NUM> may be implemented in a computing device.

According to some examples, storage system <NUM> may be similar to storage device <NUM> of system <NUM> as shown in <FIG> and storage device <NUM> as shown in <FIG>, and includes a controller <NUM> and memory devices <NUM>. For these examples, logic and/or features resident at or located at controller <NUM> may execute at least some processing operations or logic for apparatus <NUM> and may include storage media that includes storage medium <NUM>. Also, memory devices <NUM> may include similar types of volatile or non-volatile memory (not shown) that are described above for storage device <NUM>.

According to some examples, processing component <NUM> may include various hardware elements, software elements, or a combination of both. Examples of hardware elements may include devices, logic devices, components, processors, microprocessors, circuits, processor circuits, circuit elements (e.g., transistors, resistors, capacitors, inductors, and so forth), integrated circuits, ASIC, PLD, DSP, FPGA/programmable logic, memory units, logic gates, registers, semiconductor device, chips, microchips, chip sets, and so forth. Examples of software elements may include software components, programs, applications, computer programs, application programs, system programs, software development programs, machine programs, operating system software, middleware, firmware, software modules, routines, subroutines, functions, methods, procedures, software interfaces, APIs, instruction sets, computing code, computer code, code segments, computer code segments, words, values, symbols, or any combination thereof. Determining whether an example is implemented using hardware elements and/or software elements may vary in accordance with any number of factors, such as desired computational rate, power levels, heat tolerances, processing cycle budget, input data rates, output data rates, memory resources, data bus speeds and other design or performance constraints, as desired for a given example.

In some examples, other platform components <NUM> may include common computing elements, such as one or more processors, multi-core processors, co-processors, memory units, chipsets, controllers, peripherals, interfaces, oscillators, timing devices, video cards, audio cards, multimedia I/O components (e.g., digital displays), power supplies, and so forth. Examples of memory units associated with either other platform components <NUM> or storage system <NUM> may include without limitation, various types of computer readable and machine readable storage media in the form of one or more higher speed memory units, such as ROM, RAM, DRAM, DDRAM, SDRAM, SRAM, PROM, EPROM, EEPROM, flash memory, ferroelectric memory, SONOS memory, polymer memory such as ferroelectric polymer memory, nanowire, FeTRAM or FeRAM, ovonic memory, nanowire, EEPROM, phase change memory, memristers, STT-MRAM, 3D XPoint™, magnetic or optical cards, an array of devices such as RAID drives, solid state memory devices, SSDs, HDDs or any other type of storage media suitable for storing information.

In some examples, communications interface <NUM> may include logic and/or features to support a communication interface. For these examples, communications interface <NUM> may include one or more communication interfaces that operate according to various communication protocols or standards to communicate over direct or network communication links. Direct communications may occur through a direct interface via use of communication protocols or standards described in one or more industry standards (including progenies and variants) such as those associated with the SMBus specification, the PCIe specification, the NVMe specification, the SATA specification, SAS specification or the USB specification. Network communications may occur through a network interface via use of communication protocols or standards such as those described in one or more Ethernet standards promulgated by the IEEE. For example, one such Ethernet standard may include IEEE <NUM>-<NUM>, Carrier sense Multiple access with Collision Detection (CSMA/CD) Access Method and Physical Layer Specifications, Published in December <NUM> (hereinafter "IEEE <NUM>").

Computing platform <NUM> may be part of a computing device that may be, for example, user equipment, a computer, a personal computer (PC), a desktop computer, a laptop computer, a notebook computer, a netbook computer, a tablet, a smart phone, embedded electronics, a gaming console, a server, a server array or server farm, a web server, a network server, an Internet server, a work station, a mini-computer, a main frame computer, a supercomputer, a network appliance, a web appliance, a distributed computing system, multiprocessor systems, processor-based systems, or combination thereof. Accordingly, functions and/or specific configurations of computing platform <NUM> described herein, may be included or omitted in various embodiments of computing platform <NUM>, as suitably desired.

The components and features of computing platform <NUM> may be implemented using any combination of discrete circuitry, ASICs, logic gates and/or single chip architectures. Further, the features of computing platform <NUM> may be implemented using microcontrollers, programmable logic arrays and/or microprocessors or any combination of the foregoing where suitably appropriate. It is noted that hardware, firmware and/or software elements may be collectively or individually referred to herein as "logic", "circuit" or "circuitry.

One or more aspects of at least one example may be implemented by representative instructions stored on at least one machine-readable medium which represents various logic within the processor, which when read by a machine, computing device or system causes the machine, computing device or system to fabricate logic to perform the techniques described herein. Such representations may be stored on a tangible, machine readable medium and supplied to various customers or manufacturing facilities to load into the fabrication machines that actually make the logic or processor.

Various examples may be implemented using hardware elements, software elements, or a combination of both. In some examples, hardware elements may include devices, components, processors, microprocessors, circuits, circuit elements (e.g., transistors, resistors, capacitors, inductors, and so forth), integrated circuits, ASICs, PLDs, DSPs, FPGAs, memory units, logic gates, registers, semiconductor device, chips, microchips, chip sets, and so forth. In some examples, software elements may include software components, programs, applications, computer programs, application programs, system programs, machine programs, operating system software, middleware, firmware, software modules, routines, subroutines, functions, methods, procedures, software interfaces, APIs, instruction sets, computing code, computer code, code segments, computer code segments, words, values, symbols, or any combination thereof. Determining whether an example is implemented using hardware elements and/or software elements may vary in accordance with any number of factors, such as desired computational rate, power levels, heat tolerances, processing cycle budget, input data rates, output data rates, memory resources, data bus speeds and other design or performance constraints, as desired for a given implementation.

Some examples may include an article of manufacture or at least one computer-readable medium. A computer-readable medium may include a non-transitory storage medium to store logic. In some examples, the non-transitory storage medium may include one or more types of computer-readable storage media capable of storing electronic data, including volatile memory or non-volatile memory, removable or non-removable memory, erasable or non-erasable memory, writeable or re-writeable memory, and so forth. In some examples, the logic may include various software elements, such as software components, programs, applications, computer programs, application programs, system programs, machine programs, operating system software, middleware, firmware, software modules, routines, subroutines, functions, methods, procedures, software interfaces, API, instruction sets, computing code, computer code, code segments, computer code segments, words, values, symbols, or any combination thereof.

According to some examples, a computer-readable medium may include a non-transitory storage medium to store or maintain instructions that when executed by a machine, computing device or system, cause the machine, computing device or system to perform methods and/or operations in accordance with the described examples. The instructions may include any suitable type of code, such as source code, compiled code, interpreted code, executable code, static code, dynamic code, and the like. The instructions may be implemented according to a predefined computer language, manner or syntax, for instructing a machine, computing device or system to perform a certain function. The instructions may be implemented using any suitable high-level, low-level, object-oriented, visual, compiled and/or interpreted programming language.

Some examples may be described using the expression "in one example" or "an example" along with their derivatives. These terms mean that a particular feature, structure, or characteristic described in connection with the example is included in at least one example. The appearances of the phrase "in one example" in various places in the specification are not necessarily all referring to the same example.

Some examples may be described using the expression "coupled" and "connected" along with their derivatives. For example, descriptions using the terms "connected" and/or "coupled" may indicate that two or more elements are in direct physical or electrical contact with each other.

Claim 1:
An apparatus (<NUM>) comprising:
a block addressable NAND non-volatile memory device (<NUM>) having a first write speed and a first namespace with a first write granularity;
a byte addressable three-dimensional cross point, 3DXP, non-volatile memory device (<NUM>) having a second write speed faster than the first write speed and a second namespace with a second write granularity smaller than the first write granularity; and
a storage controller (<NUM>) that includes logic configured to:
receive an atomic multimedia write transaction request to write user data (<NUM>) and meta data (<NUM>) associated with storage of the user data; and
cause the user data to be stored in the block addressable NAND non-volatile memory device, and cause the meta data to be stored in the byte addressable 3DXP non-volatile memory device, simultaneously and atomically, and cause roll back of storage of the user data and the meta data, when storage of the user data or storage of the meta data indicates a failure or when a power failure occurs for at least one of the block addressable NAND non-volatile memory device without a power loss imminent, PLI, capability and the byte addressable 3DXP non-volatile memory device without a PLI capability.