Patent Description:
The surface finish of a wafer metallization layer is of importance in various aspects of semiconductor device manufacturing. While a low surface roughness of a metallization layer improves the quality of wire bonding on the metallization layer and facilitates optical inspection of the metallized wafer, high roughness is favorable for obtaining high adhesive strength between the metallization layer and an encapsulation applied during packaging. Therefore, metal deposition parameters as well as subsequent surface roughening have been considered in the past to control the roughness of a metallization layer surface on a wafer.

<CIT> discloses a method of polishing a metal surface by using an etchant which contains a fluid and a gas. An electrochemical process is used for the deposition of the metal surface on the wafer. <CIT> describes a surface polishing process in which reversing of the polarity of a power supply is used for electropolishing or electroplating.

According to an aspect of the disclosure, a method of manufacturing a semiconductor wafer having a roughened metallization layer surface is described. The method comprises immersing the wafer in an electrolytic bath. Gas bubbles are generated in the electrolytic bath. A surface of the metallization layer on the wafer is electrochemically roughened in the presence of the gas bubbles by applying a reversing voltage between the metallization layer and an electrode of the electrolytic bath.

According to another aspect of the disclosure, an equipment for semiconductor wafer metallization layer surface roughening comprises an electrolytic bath. The equipment further comprises a first electrode and a second electrode, the first electrode and the second electrode are configured to be connected to a reversing voltage, wherein at least for one of the first electrode and the second electrode a metallization layer on the wafer is to be used. A first gas bubble generator is configured to treat the metallization layer with gas bubbles during electrochemical roughening.

The features of the various illustrated embodiments can be combined unless they exclude each other and/or can be omitted if not described to be necessarily required. Embodiments are depicted in the drawings and are exemplarily detailed in the description which follows.

It is to be understood that the features of the various exemplary embodiments and examples described herein may be combined with each other, unless specifically noted otherwise.

In many applications metal layers are deposited on semiconductor wafers. The process of depositing one or more metal layers on one or more surfaces of the wafer is also referred to as applying a metallization layer to the wafer or, briefly, as metallizing the wafer. The wafer metallization layer may provide for electrodes (i.e. die pads) on the wafer and/or may provide for an efficient thermal coupling of the wafer to a heat sink or other heat dissipation tools.

The semiconductor wafers considered herein may be front-end processed, i.e. integrated circuits (ICs) may be monolithically integrated in each of the semiconductor wafer regions destined to be cut out of the semiconductor wafer to form a die. The ICs may represent power ICs, logic ICs, optical ICs, MEMS (micro-electro-mechanical systems) ICs, etc. In particular, the ICs may include or form power transistors, power diodes, or other power circuitry.

The generation of the metallization layer may be performed in various ways, e.g. by electroplating (i.e. galvanic deposition) or by electroless plating (i.e. non-galvanic deposition) or other deposition techniques. In particular in power applications, the metallization layer may be relatively thick, e.g. may have a thickness of equal to or greater than <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, or <NUM>. The metallization layer may substantially cover the entire area of one or both main surfaces of the semiconductor wafer or may cover a part (e.g. equal to or more than or less than <NUM>%, <NUM>%, <NUM>%, <NUM>%) of the area on one or both wafer surfaces.

The metallization layer may be unstructured or structured. If being structured, electrodes, die pads, conductive traces, or other conductive metal structures or patterns may have already been formed out of the metallization layer by, e.g., lithography or processes including, e.g., resist patterning and/or masking and/or etching, etc..

As mentioned above, surface properties of the metallization layer may play an important role in subsequent manufacturing processes and can be controlled by a variety of parameters. More specifically, the smoothness (or roughness) of a metallization layer surface may be controlled by the metal deposition process as such. Another possibility to control the smoothness (or roughness) of the metallization layer surface is to apply a certain post-treatment to this surface after metal deposition has been completed, e.g. a smoothing treatment or a roughening treatment.

At least for certain areas of the metallization layer surface a high degree of roughness can be desirable. The rougher the surface the better is the adhesive strength between the metallization layer and other layers applied later on to the metallization layer. In particular, a high roughness of the metallization layer may improve the adhesive strength between the metallization layer and organic materials applied on the metallization layer. Such organic materials may, e.g. be mold compounds or laminates used for an encapsulation during packaging and/or conductive adhesive materials which may, e.g., be used as an electrical coupling between the metallization layer and external terminals of a semiconductor package.

Referring to <FIG>, a method of manufacturing a semiconductor wafer having a roughened metallization layer surface is described by way of example. At S1 the semiconductor wafer is immersed in an electrolytic bath. At S2 gas bubbles are generated in the electrolytic bath. Then, at S3 a surface of the metallization layer on the semiconductor wafer is electrochemically roughened in the presence of the gas bubbles by application of a reversing voltage between the metallization layer and an electrode of the electrolytic bath.

As will be described in more detail further below, this process of wet-chemical roughening of the surface of the metallization layer allows to enhance the roughness of the surface to achieve a degree of roughness which is considerably higher than known from conventional roughening processes. Further, the process of wet-chemical roughening described herein provides for a high degree of controllability and reproducibility of the obtained surface properties (in particular the roughness of the surface). Further, the roughening treatment described herein is compliant with conventional semiconductor processing and can therefore be implemented in the wafer manufacturing process without any major obstacles.

<FIG> is an illustration of chemical reactions taking place at an anode A and at a cathode C during electrochemical roughening in an electrolyte <NUM> of an electrolytic bath. The anode A is electrically coupled to a positive potential of a reversing voltage power supply <NUM>, while a cathode C is electrically coupled to a negative potential of the reversing voltage power supply <NUM>. Since the reversing voltage power supply <NUM> provides for reversing polarity (i.e. for an alternating current flowing through the electrolytic bath), <FIG> represents a "snapshot", i.e. when reversing the voltage output at the reversing voltage power supply <NUM> the anode A in <FIG> becomes the cathode C and the cathode C in <FIG> becomes the anode A. The electrolyte <NUM> at the cathode C and the electrolyte <NUM> at the anode A are electrically coupled by schematically indicated coupling <NUM> to allow an electric current flow. The coupling <NUM> may be implemented by the electrolyte <NUM> contained in a (common) electrolytic bath or by an electrical connector connecting the electrolyte <NUM> at the cathode C with the separated electrolyte <NUM> at the anode A.

In <FIG> both the anode A and the cathode C are formed by metallization layers <NUM> and <NUM> on semiconductor wafers <NUM> and <NUM>, respectively. When biased as an anode A, metal of the metallization layer <NUM> is removed from the metallization layer <NUM> (see the arrows pointing away from <NUM>) and dissolved in the electrolyte <NUM>. On the other hand, metal from the electrolyte <NUM> is deposited to the same amount on the metallization layer <NUM> of the wafer <NUM> biased as a cathode (see the arrows pointing towards <NUM>). After reversal of the polarity at the reversing voltage power supply <NUM>, the process reverses at the semiconductor wafers <NUM>, <NUM>, i.e. metal from the electrolyte <NUM> is deposited on the metallization layer <NUM> of the wafer <NUM> and metal from the metallization layer <NUM> of the wafer <NUM> is removed and transferred into the electrolyte <NUM>.

Generally, the metallization layer(s) <NUM>, <NUM> may be based on a metal or a metal alloy of, e.g., Cu, Ni, NiP, Au, Zn, Al, etc. In the following, for the purpose of explanation and without loss of generality, Cu is used as an example of the metal of the metallization layer. The wafer(s) <NUM>, <NUM> may comprise or be of a semiconductor material such as, e.g., Si, SiC, SiGe, GaAs, GaN, AlGaN, InGaAs, InAlAs, etc..

Further, as indicated in <FIG>, the cathode reaction and (optionally) the anode reaction is carried out in the presence of gas bubbles <NUM>. The gas bubbles <NUM> impede a uniform deposition of metal at the cathode C, thereby creating the desired roughness of the surface of the metallization layer <NUM>. Metal deposition at the cathode C may, e.g., also be partly or completely a metal re-deposition, since, e.g., virtually all deposited metal may have been removed from the metallization layer <NUM> during the time before when the metallization layer <NUM> was biased as an anode A.

The uniformity of the roughness can be controlled by the gas bubbles <NUM>. The smaller the average size of the gas bubbles <NUM>, the better is the uniformity of the roughness. Differently put, gas bubbles <NUM> may act to form a temporary and statistically distributed micro-masking of the surface of the metallization layer <NUM> during the electrochemical dissolution and deposition process on the surface of the metallization layer <NUM>.

Generally, the uniformity of the roughness obtained by using a stream of gas bubbles <NUM> in the immediate vicinity of the surface of the metallization layer <NUM> is significantly better than the uniformity of a "natural" surface roughness which may occur in a conventional electrolytic bath. As known in the art, the generation of such "natural" roughness at a surface of the metallization layer <NUM> can be prevented by specific additives, which are usually added to the electrolytic bath to avoid the generation of such "natural" surface roughness. The "natural" surface roughness (obtained without gas bubbles and without additives) is caused by variations in the conditions of the metallization layer surface which result in different deposition rates. It is characterized by a high degree of inhomogeneity and therefore cannot be used for the purposes described herein, e.g. for reliably improving the adhesive strength between the roughened metallization layer and, e.g., an encapsulation.

While <FIG> exemplifies both electrodes (the anode A and the cathode C) to be implemented by metallization layers <NUM>, <NUM> of wafers <NUM>, <NUM>, respectively, it is also possible that only one electrode is formed by a wafer metallization layer, while the other electrode is implemented by other means, e.g. by a metal plate immersed in the electrolytic bath. In this case, by virtue of the polarity reversal of the reversing voltage power supply <NUM>, the same processes as illustrated in <FIG> take place at the metallization layer of the wafer and the same results are achieved. The metal plate forming the other electrode does not even have to be made of the metal of the (wafer) metallization layer but may be made of an inert electrode material, since the process described herein may, e.g., completely rely on the re-deposition of metal (during the cathode reaction) which has been previously removed from the metallization layer (during the anode reaction).

More specifically, the entire electrochemical roughening process may be performed without any depletion of metal ions in the electrolyte <NUM>. In contrast to conventional electrochemical deposition processes, in which the electrolyte is depleted during deposition and therefore needs to be regenerated from time to time, electrolyte regeneration is not required during electrochemical roughening as described herein.

Differently put, the concentration of metal ions (of the metal of the metallization layer(s) <NUM>, <NUM>) in the electrolyte <NUM> may be constant over time (i.e. no depletion and no enrichment of metal ions in the electrolyte <NUM> over the entire process, in particular e.g. at any time during the process). Constant metal ion concentration may be achieved by applying a reversing voltage configured to set the anode reaction and the cathode reaction to equal rates.

The gas used to generate the gas bubbles <NUM> may be an inert gas or an oxidizing gas or a reducing gas or a mixture of any of those gases. Inert gases such as, e.g., N<NUM> or Ar merely exert a "masking effect" on the deposition (or re-deposition) of the metal during the cathode reaction. "Masking effect" means that each bubble <NUM> locally prevents deposition (or re-deposition) of metal at the location where the gas bubble <NUM> is temporarily in contact with the surface of the metallization layer <NUM>.

Reducing gases such as, e.g., N<NUM>H<NUM>, CO or oxidizing gases such as, e.g., air or O<NUM>, further act as a reaction agent during the cathode reaction and (optionally) during the anode reaction. In the cathode reaction the gas reacts with the metal which has just been deposited on the surface. Metal oxide secondary products (if an oxidizing gas is used) will be incorporated in the metallization layer <NUM> near its surface. For instance, if an oxidizing gas is used, it is possible that the surface of the metallization layer <NUM> is locally and partly or even completely insulated by the creation of punctual or extensive and/or continuous areas of metal oxide.

An extensive and continuous layer of metal oxide may even form an insulating layer on the roughened surface of the metallization layer <NUM> which may completely cover and electrically insulate the metallization layer <NUM>. In other words, in addition to the effect of uniformly roughening the surface of the metallization layer <NUM>, the gas bubbles <NUM> may further be used to generate functionalized surface(s) of the metallization layer(s) <NUM>, <NUM>.

Further, there is the option to mask certain areas of the metallization layer before emerging the wafer in the electrolytic bath so as to prevent roughening of the masked areas. As the roughening process described herein may be carried out in a material-neutral manner, i.e. the roughening process does not require any additional metal material for deposition, the mean metallization layer thickness may remain unchanged and/or the masked smooth areas and the roughened areas may remain on the same average level.

Further, the approach of masking may also or additionally be applied within the concept of functionalizing the surface of the metallization layer <NUM>. That is, it is possible that, e.g., a first mask is used to define a pattern of smooth and roughened surface areas and/or a second mask is used to define a pattern of chemically functionalized and non-functionalized surface areas of the metallization layer <NUM>. To this end, it may be possible to first roughen the surface of the metallization layer without functionalizing the roughened surface areas and then to apply a second mask (which may be different from the first mask) to the pre-roughened surface in order to functionalize certain areas of the pre-roughened surface of the metallization layer <NUM>.

In this and other cases, it is possible that a plurality of different gases is used during the roughening process. For instance, if a pattern of functionalized surface areas is to be created, the process may start with the introduction of an inert gas for roughening without functionalizing the surface and may then, e.g. after a masking step, continue with e.g. an oxidizing gas or a reducing gas for functionalizing the unmasked portions of the roughened surface.

<FIG> illustrate various examples of an equipment for electrochemical roughening a metallization layer surface on a semiconductor wafer. All process features and variants described above may be applied to any of the examples of <FIG>. Further, specific features of the process or the equipment for roughening a metallization layer surface as disclosed in the following description can be combined with any of the features disclosed in conjunction with the description of <FIG> or other examples throughout this specification.

Referring to <FIG>, an equipment <NUM> for roughening a metallization layer surface <NUM> on a semiconductor wafer <NUM> comprises an electrolytic bath <NUM> containing the electrolyte <NUM>. A first electrode <NUM> and a second electrode <NUM> are immersed in the electrolytic bath <NUM>. The first electrode <NUM> and the second electrode <NUM> are configured to be connected to a reversing voltage from a reversing voltage power supply <NUM>. At least one of the first electrode <NUM> and the second electrode <NUM> - in the example of <FIG> the second electrode <NUM> - is the metallization layer <NUM> on the semiconductor wafer <NUM>. Further, the equipment <NUM> includes a first gas bubble generator <NUM> which is configured to treat the metallization layer <NUM> with gas bubbles <NUM> during electrochemical roughening.

The first gas bubble generator <NUM> may be configured to generate a stream or "curtain" of fine gas bubbles <NUM> from a gas flow obtained via a supply line <NUM> connected to a gas reservoir (not shown). The first gas bubble generator <NUM> may comprise or be a gas diffusor. The gas diffusor may include a gas diffusor nozzle panel configured to generate a dense gas bubble stream across a sufficiently large cross-sectional area in the electrolytic bath <NUM>. The dense gas bubble stream may have a cross-sectional area sufficient large to completely embed the metallization layer <NUM> on the wafer <NUM>.

As shown in <FIG>, the metallization layer <NUM> on the wafer <NUM> may be structured. If the metallization layer <NUM> is structured in separated areas 222_1, 222_2, the separated areas 222_1, 222_2 may be electrically connected. For example, the electrical connection between the area 222_1 of the metallization layer <NUM> and the area 222_2 of the metallization layer <NUM> may be provided by an underlying electrically conductive layer <NUM>, e.g. a seed layer used during the metallization process.

The reversing voltage (e.g. an AC voltage) between the metallization layer <NUM> and the electrode <NUM> of the electrolytic bath <NUM> may be applied over a number of cycles. The cycle duration (which is the duration between consecutive reversals of the power supply) may be equal to or greater than <NUM>, <NUM>, <NUM>, <NUM>, or <NUM>. The number of cycles may be equal to or greater than <NUM>, <NUM>, or <NUM>. The voltage may, e.g., be in a range of <NUM> to <NUM> V, in particular <NUM> to <NUM> V and more in particular <NUM> to <NUM> V.

That is, a certain current I or a certain voltage U is predetermined for a certain period τ (cycle duration) during which the cathode reaction is carried out at one of the electrodes (e.g. in <FIG> the second electrode <NUM>). Then, the voltage is reversed and the anode reaction is carried out for, e.g., the same period of time τ. The current or the voltage during the anode reaction may be of the same amount than during the cathode reaction.

The voltage reversal may be periodical. The reversing voltage power supply <NUM> may be an AC (alternating current) power supply. The reversing voltage frequency used by the reversing voltage power supply <NUM> may, e.g., be equal to or less than <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, or <NUM>.

While in <FIG> the orientation of the wafer <NUM> may be parallel to the direction of the gas bubble stream, it is also possible that the semiconductor wafer <NUM> is held inclined relative to the direction of movement of the gas bubbles <NUM> in the electrolytic bath <NUM>. An inclined orientation of the semiconductor wafer <NUM> relative to the stream of gas bubbles <NUM> is illustrated in <FIG> illustrating another equipment <NUM> for electrochemical roughening a metallization layer surface on a semiconductor wafer <NUM>.

Further, still referring to <FIG>, the metallization layer <NUM> may be positioned in a region of the electrolytic bath <NUM> where the gas bubbles <NUM> render the electrolytic bath <NUM> foamy. As foam formation may mostly occur near the surface of the electrolytic bath <NUM>, the wafer <NUM> may be positioned near the surface of the electrolyte <NUM> of the electrolytic bath <NUM>. Therefore, in contrast to conventional wet-chemical electrolytic applications, where foam formation needs typically to be avoided, surface roughening in accordance with this disclosure may specifically use the formation of foam to support the roughening process.

It has been observed that the more foam is formed in the electrolyte <NUM> the higher is the degree of roughness which can be achieved. Hence, the roughening process may be carried out as a "foam roughening method" in which the roughening is achieved in the presence of a gas bubble foam of the electrolyte <NUM>. Optionally, a foaming agent may be added to the electrolyte <NUM> to increase foam formation.

<FIG> illustrates a further equipment <NUM> for electrochemical roughening a metallization layer surface on a semiconductor wafer. The equipment <NUM> includes an electrolytic bath <NUM> as previously described, and reference is made to the above description in order to avoid reiteration. The equipment <NUM> may further include one or more holders <NUM>, <NUM> for suspending a plurality of semiconductor wafers <NUM>, <NUM> in the electrolytic bath <NUM>. For instance, a number of equal to or greater than N wafers <NUM>, <NUM> may be processed simultaneously, with N being an integer equal to or greater than, e.g., <NUM>, <NUM>, <NUM>, <NUM>,. , while in the example of <FIG> there is N = <NUM>.

As illustrated in <FIG>, the equipment <NUM> may be symmetrical in terms of the anode/cathode reaction and/or the placement of the semiconductor wafers <NUM>, <NUM> and/or the generation of gas bubble streams in the presence of the semiconductor wafers <NUM>, <NUM>. Hence, the equipment <NUM> may include a second gas bubble generator <NUM> which may be positioned beneath the semiconductor wafer(s) <NUM>. The second gas bubble generator <NUM> is configured to treat the metallization layer on the further wafer(s) <NUM> with gas bubbles <NUM> during electrochemical roughening. The second gas bubble generator <NUM> may be designed the same way as described above for the first gas bubble generator <NUM>.

Further, a stirrer <NUM> may be provided in the electrolytic bath <NUM> for moving and intermixing the electrolyte <NUM>.

In <FIG> and throughout all examples, the entire electrochemical roughening process may be performed in a material-neutral way, i.e. without loss of metal material at the electrodes (in <FIG> the wafer(s) <NUM> and wafer(s) <NUM>). In total, no metal ions may be removed from the electrolyte <NUM>, since the rate of the metal-depleting anode reaction and the rate of the metal-depositing cathode reaction may be the same. That way, the roughening processes described herein may provide for a high homogeneity of roughness which can be obtained without any loss of metallization layer material. These conditions are usually not met by conventional roughening processes which rely on chemical etching or laser treatment. Further, surface functionalization as described above is not available by such conventional approaches.

<FIG> is a diagram illustrating the surface profile of a metallization layer having a certain roughness. The surface profile is depicted versus a sample length L. Sz denotes the maximum height of the surface profile. Sp denotes the maximum height of the peaks of the surface profile. Sv denotes the maximum height of valleys of the surface profile.

<FIG> illustrates an exemplary greyscale image of the surface roughness of a Cu metallization layer prior to the roughening treatment as described herein. The following parameters in accordance with the standard ISO <NUM> (Geometric Product Specifications - Surface Texture) were measured:.

Sa is the arithmetic mean height of the surface profile. Sq is the root mean square height of the surface profile.

As known in the art, Sq may be used as a measure of surface roughness. That is, the greater the value of Sq the rougher is the surface.

The initial roughness can be greatly enhanced by the metallization layer surface roughening process described herein. According to one example, a Cu metallization layer was applied to a wafer and the following height parameters were measured in accordance with ISO <NUM>:.

According to ISO <NUM>, Ssk denotes the skewness of the surface and Sku denotes the kurtosis of the surface.

After a roughening treatment of the metallization layer using a voltage of <NUM> V, a polarity reversal time of τ = <NUM> and a number of C = <NUM> cycles, the following roughness parameters were obtained:.

As may be seen from a comparison of Sq prior to and after the roughening treatment, the exemplary roughening process enhanced the roughness of the Cu surface nearly by a factor of <NUM>.

Neither such enhancement of roughness nor the absolute values of the parameters (in particular of Sq) disclosed herein are known to be achieved by conventional roughening treatments available in the art.

<FIG> illustrates an exemplary semiconductor package <NUM>. The semiconductor package <NUM> includes a semiconductor die <NUM> having at least one metallization layer <NUM>. The semiconductor package <NUM> further includes an encapsulation <NUM> embedding at least partially the semiconductor die <NUM> and the roughened surface of the metallization layer <NUM>. The roughened surface of the metallization layer <NUM> has a roughness of a route means square height (Sq) of equal to or greater than <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, or <NUM> (in accordance with ISO <NUM>).

The semiconductor die <NUM> may be a power die, e.g. a die including one or more power transistors and/or one or more power diodes or other power ICs. The metallization layer <NUM> may, e.g., include a die backside metallization layer <NUM>. The die backside metallization layer <NUM> may be a load electrode metallization layer of the power die <NUM>, e.g. a drain electrode metallization layer or a source electrode metallization layer.

As illustrated in <FIG>, the metallization layer <NUM> may optionally connect to a heat sink <NUM>. The heat sink <NUM> may be exposed from the encapsulation <NUM>. In other embodiments the metallization layer <NUM> may, e.g., form an external terminal of the semiconductor package <NUM> and may directly connect to external circuitries, e.g. to conducting traces on a PCB (printed circuit board).

The roughened surface of the metallization layer <NUM> may be confined to partial areas of the overall surface of the metallization layer <NUM>, e.g. to areas in which the (roughened) surface of the metallization layer <NUM> directly engages with the encapsulation <NUM>. In other words, in other areas, e.g. in the area where the heat sink <NUM> is connected to the metallization layer <NUM>, the surface of the metallization layer <NUM> may have been kept smooth by, e.g., masking during the roughening process.

The semiconductor die <NUM> may further include other metallization layers which have also been at least partly roughened by any of the processes described herein. By way of example, the semiconductor die may be equipped with a first separated area of metallization layer 222_1 (e.g. a load electrode metallization layer 222_1) and a second separated area of metallization layer 222_2 (e.g. a gate metallization layer 222_2). In other words, the metallization layer <NUM> may be separated in a plurality of disjointed metallization layer areas. Also these metallization layers 222_1, 222_2 may have been processed to have roughened surface areas at least in regions covered by the encapsulation <NUM>.

Hence, the metallization layers <NUM> and/or 222_1 and/or 222_2 may further comprise a smooth surface (e.g. in the central part of these metallization layers), wherein the roughness of the roughened surface is equal to or greater than <NUM>, <NUM>, <NUM> or <NUM> times the roughness of the smooth surface in terms of the root mean square height (Sq) of the respective surfaces.

Further, the semiconductor package <NUM> may include a roughened surface of a metallization layer <NUM> and/or 222_1 and/or 222_2, which may include metal oxide secondary products or metal halides secondary products. These secondary products are an unavoidable consequence of a functionalized metallization layer surface created by using either oxidizing or reducing gases during the roughening process.

Claim 1:
A method of manufacturing a semiconductor wafer having a roughened metallization layer surface, the method comprising:
immersing the wafer in an electrolytic bath;
generating gas bubbles in the electrolytic bath; and
electrochemically roughening a surface of the metallization layer on the wafer in the presence of the gas bubbles by applying a reversing voltage between the metallization layer and an electrode of the electrolytic bath.