Patent Description:
Typical spaceflight-capable solar cell panel assembly involves building long strings of solar cells. These strings are variable in length and can be very long, for example, up to and greater than <NUM> cells. Assembling such long, variable, and fragile materials is difficult, which has prevented automation of the assembly.

Existing solutions use solar cells assembled into CIC (cell, interconnect and coverglass) units. The CIC has metal foil interconnects connected to the front of the cell that extend in parallel from one side of the CIC. The CICs are located close to each other and the interconnects make connection to the bottom of an adjacent cell. Using these interconnects, the CICs are assembled into linear strings. These linear strings are built-up manually and then laid out to form a large solar cell array comprised of many strings of variable length.

Additionally, a bypass diode is used to protect the cells from reverse bias, when the cells become partially shadowed. The bypass diode generally connects the back contacts of two adjacent cells within the solar cell array.

When used in a satellite, the solar cell array is typically packaged as a panel. The dimensions of the panel are dictated by the needs of the satellite, including such constraints as needed power, as well as the size and shape necessary to pack and store the satellite in a launch vehicle. Furthermore, the deployment of the panel often requires that some portions of the panel are used for the mechanical fixtures and the solar cell array must avoid these locations. In practice, the panel is generally rectangular, but its dimensions and aspect ratio vary greatly. The layout of the CICs and strings to fill this space must be highly customized for maximum power generation, which results in a fabrication process that is highly manual.

<CIT> states, in accordance with its abstract, that a panel has a group of solar cells with triangular or rectangular surfaces and trimmed on their edges. An arrangement of the cells in form of grid provides reduced free spaces in gaps between the trimmings of neighboring cells. Two sets of openings of a collecting cable are formed in the spaces. A connection wire traversing the panel connects strings of cells together. Further, a satellite including a solar array panel is described.

<CIT> states, in accordance with its abstract, a solar cell assembly or sub-array that comprises a string of series connected solar cells, one of the solar cells being a final solar cell of the string of solar cells. The final solar cell has at least one oblique cut corner. The solar cell assembly further comprises a contact member connected to the final solar cell through a blocking diode, positioned in correspondence with the space provided by the space provided by the oblique cut corner.

<CIT> states, in accordance with its abstract, a method that involves providing a web for applying flexible thin-film solar cells. The electrically conductive contact points are applied on the web of sheet portions in contacting portions. A sequence of flexible thin-film solar cells is provided for designing the side portions in the electrically conductive terminals and forming photovoltaic active layer with electrical conductors.

<CIT> states, in accordance with its abstract, a contact arrangement for permitting a plurality of solar cells to be electrically interconnected. The device includes a solar cell having orthogonally oriented outer peripheral edges and oblique angled corner edges. A first pair of negative contacts is secured to a top surface of the cell proximal to a first adjacent pair of angled corner edges, and a second pair of negative contacts is secured to the cell proximal to a second adjacent pair of angled corner edges. A pair of positive contacts is secured to the top surface of the cell proximal to the second adjacent pair of angled corner edges and extends at least partially around the second pair of negative contacts. An elongated positive buss bar extends between the pair of positive contacts and along the top surface of the cell proximal to one of the outer peripheral edges. The negative contacts wrap around the respective angled corner edges and onto the top surface of the cell to permit for ease of electrically interconnecting a plurality of cells together in a series or parallel orientation.

<CIT> states, in accordance with its abstract, that a solar cell module is arranged such that is at least one of two-dimensionally arranged solar cells is positioned on an extended line of a boundary line between other adjacent solar cells. This makes it possible to provide a solar cell module which is less likely to be broken even if a bending stress and/or a twisting stress is applied, as compared to a conventional solar cell module.

<CIT> states, in accordance with its abstract, that a solar cell includes a p-type monocrystalline silicon substrate having first and second principal surfaces, an n-type diffusion layer formed on the first principal surface of the p-type monocrystalline silicon substrate, a plurality of grid electrodes formed on the n-type diffusion layer, a first collector electrode including a bus electrode that connects the grid electrodes to establish connection to the outside, and a second collector electrode formed on the second principal surface. The n-type diffusion layer has a lower impurity concentration in a first region surrounding the bus electrode than a second region away from the bus electrode.

What is needed, then, is a means for promoting automated manufacturing of solar arrays, while preserving the ability for customization of solar cell arrays.

The devices and methods of the claimed invention are defined in the independent claims <NUM> and <NUM>.

In the following description, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration a specific example in which the disclosure may be practiced. It is to be understood that other examples may be utilized and structural changes may be made without departing from the scope of the present disclosure.

A new approach to the design of solar cell arrays, such as those used for spaceflight power applications, is based on electrical connections among the solar cells in the array.

This new approach rearranges the components of a solar cell and the arrangements of the solar cells in the array. Instead of having solar cells connected into long linear strings and then assembled onto a substrate, the solar cells are attached individually to a substrate, such that corner regions of adjacent cells are aligned on the substrate, thereby exposing an area of the substrate. Electrical connections between cells are made by corner conductors formed on or in the substrate in these corner regions. Consequently, this approach presents a solar cell array design based on individual cells.

Thus, a single laydown process and layout can be used in the fabrication of solar cell arrays. Current flow between solar cells will be assisted with conductors embedded in the substrate. These electrical connections define the specific characteristics of the solar cell array, such as its dimensions, stayout zones, and circuit terminations. This approach simplifies manufacturing, enables automation, and bottoms costs and delivery times.

<FIG> and <FIG> illustrate conventional structures for solar cell panels <NUM>, which include a substrate <NUM>, a plurality of solar cells <NUM> arranged in an array, and electrical connectors <NUM> between the solar cells <NUM>. Half size solar cells <NUM> are shown in <FIG> and full size solar cells <NUM> are shown in <FIG>. Space solar cells <NUM> are derived from a round Germanium (Ge) substrate starting material, which is later fabricated into semi-rectangular shapes to improve dense packing onto the solar cell panel <NUM>. This wafer is often diced into one or two solar cells <NUM> herein described as half size or full size solar cells <NUM>. The electrical connectors <NUM> providing electrical connections between solar cells <NUM> are made along the long parallel edge between solar cells <NUM>. These series connections (cell-to-cell) are completed off-substrate, as strings of connected solar cells <NUM> are built having lengths of any number of solar cells <NUM>. The completed strings of solar cells <NUM> are then applied and attached to the substrate <NUM>.

In <FIG>, wiring <NUM> is attached at the end of a string of solar cells <NUM> to electrically connect the string to other strings, or to terminate the resulting circuit and bring the current off of the array of solar cells <NUM>. String-to-string and circuit termination connections are typically done on the substrate <NUM>, and typically using wiring <NUM>. However, some small solar cell panels <NUM> use a printed circuit board (PCB)-type material with embedded conductors.

Adjacent strings of connected solar cells <NUM> can run parallel or anti-parallel. In addition, strings of connected solar cells <NUM> can be aligned or misaligned. There are many competing influences to the solar cell <NUM> layout resulting in regions where solar cells <NUM> are parallel or anti-parallel, aligned or misaligned.

<FIG> illustrate improved devices and structures for a solar cell panel 10a, according to one example, wherein <FIG> is an enlarged view of the details in the dashed circle in <FIG>. The various components of the solar cell panel 10a are shown and described in greater detail in <FIG>.

The solar cell panel 10a includes a substrate <NUM> for solar cells <NUM> having one or more corner conductors <NUM> thereon. In one example, the substrate <NUM> is a multi-layer substrate <NUM> comprised of one or more Kapton® (polyimide) layers separating one or more patterned metal layers. The substrate <NUM> may be mounted on a large rigid panel 10a similar to conventional assembles. Alternatively, substrate <NUM> can be mounted to a lighter more sparse frame or panel 10a for mounting or deployment.

A plurality of solar cells <NUM> are attached to the substrate <NUM> in a two-dimensional (2D) grid of an array <NUM>. In this example, the array <NUM> is comprised of ninety-six (<NUM>) solar cells <NUM> arranged in four (<NUM>) rows by twenty-four (<NUM>) columns, but it is recognized that any number of solar cells <NUM> may be used in different implementations. Alternatively, the array <NUM> could be comprised of forty-eight (<NUM>) full-size solar cells <NUM> arranged in four (<NUM>) rows by twelve (<NUM>) columns, wherein each of the full-size solar cells <NUM> is configured in a manner similar to two half-size solar cells <NUM> arranged back-to-back (see, e.g., <FIG> below).

At least one of the solar cells <NUM> has at least one cropped corner <NUM> that defines a corner region <NUM>, as indicated by the dashed circle. The solar cells <NUM> are attached to the substrate <NUM>, such that corner regions <NUM> of adjacent ones of the solar cells <NUM> are aligned, thereby exposing an area <NUM> of the substrate <NUM>. The area <NUM> of the substrate <NUM> that is exposed includes one or more of the corner conductors <NUM>, and one or more electrical connections between the solar cells <NUM> and the corner conductors <NUM> are made in the corner regions <NUM> resulting from the cropped corners <NUM> of the solar cells <NUM>.

The corner conductors <NUM> are conductive paths attached to, printed on, buried in, or deposited on the substrate <NUM>, before and/or after the solar cells <NUM> are attached to the substrate <NUM>, which facilitate connections between adjacent solar cells <NUM>. The connections between the solar cells <NUM> and the corner conductors <NUM> are made after the solar cells <NUM> have been attached to the substrate <NUM>.

In one example, four adjacent solar cells <NUM> are aligned on the substrate <NUM>, such that four cropped corners <NUM>, one from each solar cell <NUM>, are brought together at the corner regions <NUM>. The solar cells <NUM> are then individually attached to the substrate <NUM>, wherein the solar cells <NUM> are placed on top of the corner conductors <NUM> to make the electrical connection between the solar cells <NUM> and the corner conductors <NUM>.

The solar cells <NUM> may be applied to the substrate <NUM> as CIC (cell, interconnect and coverglass) units. Alternatively, a bare solar cell <NUM> may be applied to the substrate <NUM>, and the coverglass later applied to the front of the solar cell <NUM> with a transparent adhesive. This assembly protects the solar cells <NUM> from damage from space radiation that would limit performance.

<FIG> illustrate an alternative structure for the solar cell panel 10a, according to one example, wherein <FIG> is an enlarged view of the details in the dashed circle in <FIG>. In this example, only a few corner conductors <NUM> are printed on or integrated with the substrate <NUM>. Instead, most of the corner conductors <NUM> are contained within a power routing module (PRM) <NUM> that is bonded to the substrate <NUM>.

<FIG> illustrates the front side of an exemplary solar cell <NUM> that may be used in the improved solar cell panel 10a of <FIG> and <FIG>. The solar cell <NUM>, which is a CIC unit, is a half-size solar cell <NUM>. (Full-size solar cells <NUM> could also be used.

The solar cell <NUM> is fabricated having at least one cropped corner <NUM> that defines a corner region <NUM>, as indicated by the dashed circle, such that the corner region <NUM> resulting from the cropped corner <NUM> includes at least one contact <NUM>, <NUM> for making an electrical connection to the solar cell <NUM>. In the example of <FIG>, the solar cell <NUM> has two cropped corners <NUM>, each of which has both a front contact <NUM> on the front side of the solar cell <NUM> and a back contact <NUM> on a back side of the solar cell <NUM>, where the contacts <NUM> and <NUM> extend into the corner region <NUM>. (Full-size solar cells <NUM> would have four cropped corners <NUM>, each of which would have a front contact <NUM> and a back contact <NUM>.

The cropped corners <NUM> increase utilization of the round wafer starting materials for the solar cells <NUM>. In conventional panels <NUM>, these cropped corners <NUM> would result in unused space on the panel <NUM> after the solar cells <NUM> are attached to the substrate <NUM>. The new approach described in this disclosure, however, utilizes this unused space. Specifically, metal foil interconnects, comprising the corner conductors <NUM>, front contacts <NUM> and back contacts <NUM>, are moved to the corner regions <NUM>. In contrast, existing CICs have interconnects attached to the solar cell <NUM> front side, and connect to the back side (where connections occur) during stringing.

The current generated by the solar cell <NUM> is collected on the front side of the solar cell <NUM> by one or more grids <NUM> comprised of thin metal fingers <NUM> and wide bus bars <NUM> that are connected to both of the front contacts <NUM>. There is a balance between the addition of metal in the grid <NUM>, which reduces the light entering the solar cell <NUM> and its output power, and the reduced resistance of having more metal. The bus bar <NUM> is a low resistance conductor that carries high currents and also provides redundancy should a front contact <NUM> become disconnected. Optimization generally desires a short bus bar <NUM> running directly between the front contacts <NUM>. Having the front contact <NUM> in the cropped corner <NUM> results in moving the bus bar <NUM> away from the perimeter of the solar cell <NUM>. This is achieved while simultaneously minimizing the bus bar <NUM> length and light obscuration. Additionally, the fingers <NUM> are now shorter. This reduces parasitic resistances in the grid <NUM>, because the length of the fingers <NUM> is shorter and the total current carried is less. This produces a design preference where the front contacts <NUM> and connecting bus bar <NUM> is moved to provide shorter narrow fingers <NUM>.

<FIG> illustrates the back side of the exemplary solar cell <NUM> of <FIG>. The back side of the solar cell <NUM> is covered by a full area metal back layer <NUM> that is connected to both of the back contacts <NUM>.

<FIG> illustrates solar cells <NUM> arranged into the 2D grid of the array <NUM>, according to one example. The array <NUM> comprises a plurality of solar cells <NUM> attached to a substrate <NUM>, such that corner regions <NUM> of adjacent ones of the solar cells <NUM> are aligned, thereby exposing an area <NUM> of the substrate <NUM>. Electrical connections (not shown) between the solar cells <NUM> are made in the exposed area <NUM> of the substrate <NUM> using the front contacts <NUM> and back contacts <NUM> of the solar cells <NUM> and corner conductors <NUM> (not shown) formed on or in the exposed area <NUM> of the substrate <NUM>.

During assembly, the solar cells <NUM> are individually attached to the substrate <NUM>. This assembly can be done directly on a support surface, i.e., the substrate <NUM>, which can be either rigid or flexible. Alternatively, the solar cells <NUM> could be assembled into the 2D grid of the array <NUM> on a temporary support surface and then transferred to a final support surface, i.e., the substrate <NUM>.

<FIG> illustrates an example of the array <NUM> where one or more bypass diodes <NUM> are added to the exposed area <NUM> of the substrate <NUM> in the corner regions <NUM>, for use in one or more of the electrical connections. The bypass diodes <NUM> protect the solar cells <NUM> when the solar cells <NUM> become unable to generate current, which could be due to being partially shadowed, which drives the solar cells <NUM> into reverse bias. In one example, the bypass diodes <NUM> are attached to the substrate <NUM> in the corner regions <NUM> independent of the solar cells <NUM>.

<FIG> illustrates an example where the bypass diode <NUM> is applied to the back side of the solar cell <NUM>, with an interconnect or contact <NUM> for the bypass diode <NUM> extending into the corner region <NUM> between the front and back contacts <NUM>, <NUM>.

<FIG> illustrates a front side view of the example of <FIG>, with the interconnect or contact <NUM> for the bypass diode <NUM> (not shown) extending into the corner region <NUM> between the front and back contacts <NUM>, <NUM>.

<FIG> illustrates the solar cells <NUM> of <FIG> and <FIG> arranged into the 2D grid of the array <NUM> and applied to the substrate <NUM>, where the bypass diodes <NUM> (not shown) are applied to the back side of the solar cells <NUM>, with the contacts <NUM> for the bypass diodes <NUM> extending into the corner regions <NUM> of the solar cells <NUM>.

One advantage of this approach is that the layouts illustrated in <FIG>, <FIG> and <FIG> are generalized layouts. Specifically, these layouts can be repeated across any panel 10a dimensions desired by a customer. This greatly simplifies assembly, rework, test, and inspection processes.

Following solar cell <NUM> and bypass diode <NUM> placement, there is another step where customization is accomplished. The front contacts <NUM> and back contacts <NUM> in the corner regions <NUM> of the solar cells <NUM> must be connected. This can be done in many combinations in order to route current through a desired path.

After attaching solar cells <NUM> to the substrate <NUM>, connections are made between the solar cells <NUM> and the corner conductors <NUM>. Front and back contacts <NUM>, <NUM> of the solar cells <NUM> are present in each corner region <NUM> for attachment to the corner conductors <NUM>. Interconnects for the front and back contacts <NUM>, <NUM> of each of the solar cells <NUM> are welded, soldered, or otherwise bonded onto the corner conductors <NUM> to provide a conductive path <NUM>, <NUM>, <NUM> for routing current out of the solar cells <NUM>.

Using the corner conductors <NUM>, any customization can be made in the electrical connections. Adjacent solar cells <NUM> can be electrically connected to flow current in up/down or left/right directions as desired by the specific design. Current flow can also be routed around stayout zones as needed. The length or width of the solar cell array <NUM> can be set as desired. Also, the width can vary over the length of the array <NUM>.

In one example, the electrical connections are series connections that determine a flow of current through the plurality of solar cells <NUM>. This may be accomplished by the connection schemes shown in <FIG> and <FIG>, wherein <FIG> shows up/down series connections <NUM> between the solar cells <NUM> of the array <NUM>, and <FIG> shows left/right series connections <NUM> between the solar cells <NUM> of the array <NUM>. In both <FIG> and <FIG>, these series connections <NUM>, <NUM> are electrical connections between the front contacts <NUM> and back contacts <NUM> of the solar cells <NUM>, and the bypass diodes <NUM>, are made using the corner conductors <NUM> formed on or in the exposed areas <NUM> of the substrate <NUM>. These series connections <NUM>, <NUM> determine the current (power) flow, as indicated by the arrows <NUM>, through the solar cells <NUM>, in contrast to the assembly of large strings off-substrate.

The corner conductors <NUM> between solar cells <NUM> can be in many forms. They could be accomplished using wires that have electrical connections made on both ends, which could be from soldering, welding, conducting adhesive, or other process. In addition to wires, metal foil connectors, similar to the interconnects, could be applied. Metal conductive paths or traces (not shown) can also be integrated with the substrate <NUM>, as in a flex sheet assembly or PCB.

<FIG> shows a side view of an example wherein the substrate <NUM> is a flex sheet assembly including multilayer conductors. The substrate <NUM> includes a polyimide base layer <NUM> with Cu layer 56a above and Cu layer 56b below, wherein Cu layers 56a, 56b may be patterned as the corner conductors <NUM>, other conductors, power lines, common lines, bridging lines, etc. Note that there may be one or multiple Cu layers 56a, 56b with polyimide layers <NUM> positioned between each of the layers 56a, 56b. A conducting back sheet of polyimide <NUM> can be applied to the polyimide layer <NUM>, which is useful in a space environment in that it will reduce the accumulation of charge. Another capability is the addition of a plated Silver (Ag) or Gold (Au) layer <NUM> on the Cu layer 56a as part of the corner conductors <NUM>, which improves the ability to make connections.

Shown on the right side is the solar cell <NUM> that is attached to the substrate <NUM> with adhesive <NUM>. Also visible is the metal foil interconnect <NUM> attached to the solar cell <NUM> and the plated Ag or Au layer <NUM> of the corner conductors <NUM>.

The substrate <NUM> also includes one or more insulating layers that separate and/or encapsulate the multilayer conductors. In one example, there are a top polyimide overlay layer 66a and bottom polyimide overlay layer 66b, wherein the top polyimide overlay layer 66a has holes drilled through it, and the holes are Cu-plated vias <NUM> that electrically connect Cu layer 56a with Cu layer 56b. By encasing the metal of the Cu layers 56a, 56b, the top and bottom polyimide overlay layers 66a, 66b provide valuable protection against ESD.

Electrical access is provided to the buried Cu layer 56b. This could be accomplished with the via <NUM> connection between Cu layer 56a and Cu layer 56b, or by having an interconnect directly connect to the lower Cu layer 56b. Also, there may be multiple connections between Cu layer 56a and Cu layer 56b. This redundancy is an important attribute and can be employed when possible.

In summary, this new approach attaches the solar cells <NUM> individually to a substrate <NUM> such that the corner regions <NUM> of two, three or four adjacent solar cells <NUM> are aligned on the substrate <NUM>. The solar cells <NUM> are laid out so that the cropped corners <NUM> are aligned and the corner regions <NUM> are adjacent, thereby exposing an area <NUM> of the substrate <NUM>. Electrical connections between solar cells <NUM> are made in these corner regions <NUM> between front contacts <NUM> and back contacts <NUM> on the solar cells <NUM>, bypass diodes <NUM>, and corner conductors <NUM> on or in the exposed area <NUM> of the substrate <NUM>, wherein these conductive paths are used to create a string of solar cells <NUM> in a series connection <NUM>, <NUM> comprising a circuit. The result is that more electrical connections are available in more corners, which simplifies the corner connections and provides redundancy.

Increasing the size of solar cells <NUM> is facilitated by this new approach, for example, using full-size solar cells <NUM>, because full-size solar cells <NUM> produce more power for a fixed amount of parts to assembly or labor cost. However, full-size solar cells <NUM> typically have one or more grids <NUM> with thin metal fingers <NUM> that cause high resistances, which result in power loss. One alternative is to have low resistance fingers <NUM> that are very wide, but wide fingers <NUM> block light from entering the solar cell <NUM> and also reduce power production. Another alternative is to use vias and backside connections.

This disclosure illustrates improved structures using full-size solar cells <NUM>, which extract current from multiple locations around the perimeter of the solar cell <NUM>. This process eliminates the resistance penalty of larger solar cells <NUM>. Furthermore, this disclosure describes a configuration of conductors that is highly manufacturable as well.

<FIG> illustrate how solar cells <NUM> are made from round wafers <NUM>, according to one example. Various solar cell <NUM> shapes are diced out of the wafer <NUM> in order to fill a panel 10a.

<FIG> illustrates a <NUM> diameter wafer <NUM> that is blank.

<FIG> shows a wafer <NUM> with a pair of rectangular half-size solar cells <NUM>, where there is a large area around the perimeters of the solar cells <NUM> that will be discarded. This discarded area is highly valuable, and it is desirable to maximize the utilization of the wafer material.

<FIG> shows a wafer <NUM> with a pair of half-size solar cells <NUM> having cropped corners <NUM>, wherein the cropped corners <NUM> improve utilization of the wafer <NUM> area. Specifically, there is a smaller area around the perimeters of the solar cells <NUM> that will be discarded, as compared to <FIG>.

<FIG> shows a wafer <NUM> with a single full-size solar cell <NUM> having cropped corners <NUM>. Like the half-size solar cells <NUM> of <FIG>, the cropped corners <NUM> of the single full-size solar cell <NUM> improve utilization of the wafer <NUM> area. Specifically, there is a smaller area around the perimeters of the solar cells <NUM> that will be discarded, as compared to <FIG>, wherein the area is roughly equivalent to the area around the perimeters of the solar cells <NUM> that will be discarded in <FIG>.

<FIG> shows a structure where nine (<NUM>) full-size solar cells <NUM> are assembled together in a solar cell array <NUM> comprised of three (<NUM>) rows by three (<NUM>) columns. Multiple grids <NUM> are shown in the face of the center solar cell <NUM>, wherein each of the grids <NUM> terminate at one or more of the front contacts <NUM> of the solar cell <NUM>. (Similar grids <NUM> would be present on the other solar cells <NUM> in the array <NUM>, but are omitted to simplify the figure. ) By extracting current at multiple points around the perimeter of the solar cell <NUM>, the length of the fingers <NUM> in each of the grids <NUM> can be minimized, as compared to a conventional structure for extracting current from a single side of the solar cell <NUM>. These four terminations minimize the distance the current needs to flow, which reduces the impact of resistance. Also, each termination carries one-fourth of the solar cell's current, thereby reducing energy loss, which is determined by the current squared.

<FIG> illustrates the use of buried conductors, according to one example. The solar cells <NUM> are omitted from this view, with their positions <NUM> when mounted on the substrate <NUM> indicated by dashed outlines.

The substrate <NUM> includes conductors 74a, 74b under or alongside each of the cell positions <NUM>. The conductors 74a, 74b are buried conductors patterned in one or more of the Cu layers 56a, 56b of the substrate <NUM>. An insulation layer is placed between these conductors 74a, 74b and the solar cells <NUM>.

In one example, the conductors 74a, 74b are both patterned in the same Cu layer 56a, 56b. The conductors 74a, 74b can also be patterned in different Cu layers 56a, 56b.

In one example, the conductors 74a, 74b are loops. However, different shapes may be used, as described in <FIG>, <FIG>, and <FIG> below.

In one example, the conductor 74a connects to the front contacts <NUM> of the solar cell <NUM> and the conductor 74b connects to the back contacts <NUM> of the solar cell <NUM> (which are shown without the solar cell <NUM> present). This configuration may be reversed, with the conducting loop of the back contact <NUM> being inside the conducting loop of the front contact <NUM>.

In one example, the conductors 74a, 74b are completely covered by the top polyimide overlay layer 66a, and are connected to the front contacts <NUM> and back contacts <NUM> of the solar cell <NUM> using the vias <NUM> between layers in the substrate <NUM>. Portions of the conductors 74a, 74b can be exposed through the top polyimide overlay layer 66a, and are connected to the front contacts <NUM> and back contacts <NUM> of the solar cell <NUM> by interconnects.

The conductor 74a can connect to one or more of the four front contacts <NUM> on the solar cell <NUM> and the conductor 74b can connect to one or more of the four back contacts <NUM> on the solar cell <NUM>. This provides redundancy, in case there is a failure of an interconnect or conducting trace.

Because they are buried in the substrate <NUM>, the conductors 74a, 74b do not block any light from entering the solar cells <NUM>. In addition, due to their shape, the conductors 74a, 74b carry current to all sides and corners of the solar cell <NUM>. Preferably, the conductors 74a, 74b are comprised of sufficient metal to be low resistance paths.

<FIG> illustrates one example of series connections between conductors 74a, 74b for adjacent solar cell positions <NUM> of the substrate <NUM>. Again, the solar cells <NUM> are omitted from this view, with their positions <NUM> on the substrate <NUM> indicated by dashed outlines. Only the connections adjacent to the center solar cell <NUM> are fully drawn.

The arrows <NUM> show the overall direction of current (power) between the cell positions <NUM>. The solar cell's <NUM> current flows from the front of the solar cell <NUM> to the backside of the solar cell <NUM>, and then continues to the next solar cell <NUM> in the string. In this example, the series connections are made in the corner regions <NUM> surrounding the center cell position <NUM>, and include corner conductors <NUM> and bypass diodes <NUM>. The series connections and bypass diodes <NUM> are similar to the example in <FIG>, wherein each full size solar cell <NUM> has a series connection and a bypass diode <NUM> on both sides leading to the next solar cell <NUM> in series.

<FIG> illustrates another example of series connections between conductors 74a, 74b for adjacent solar cell positions <NUM> of the substrate <NUM>. Again, the solar cells <NUM> are omitted from this view, with their positions <NUM> on the substrate <NUM> indicated by dashed outlines. Only the connections adjacent to the center solar cell <NUM> are fully drawn.

The arrows <NUM> show the overall direction of current (power) between the cell positions <NUM>. In this example, the series connections are again made in the corner regions <NUM> surrounding the center cell position <NUM>, and include corner conductors <NUM> and bypass diodes <NUM>.

However, in this example, each cell position <NUM> in the first and second columns has only one series connection that includes the corner conductors <NUM> and one bypass diode <NUM>, leaving the third column open. Moreover, there are fewer corner conductors <NUM> in the series connections, which can result in less space used on the substrate <NUM> and higher output, or more widely spaced conductors with a greater resistance to electrostatic discharge (ESD) that operate at higher voltage levels.

<FIG> illustrates another example of series connections between conductors 74a, 74b for adjacent cell positions <NUM> of the substrate <NUM>. Again, the solar cells <NUM> are omitted from this view, with their positions <NUM> on the substrate <NUM> indicated by dashed outlines. Only the connections adjacent to the center solar cell <NUM> are fully drawn.

The arrows <NUM> show the overall direction of current (power) between the cell positions <NUM>. In this example, the series connections are made only in a subset of the corner regions <NUM> surrounding the center cell position <NUM>, and include corner conductors <NUM> and bypass diodes <NUM>.

However, in this example, the series connections and bypass diodes <NUM> are only made on one side of the solar cells <NUM>. The series connections and bypass diodes <NUM> for the first and second columns of solar cells <NUM> are made in the space between these solar cells <NUM>. Between the second and third rows of solar cells <NUM>, there are no series connections or bypass diodes <NUM>.

<FIG> illustrates another example of series connections between conductors 74a, 74b for adjacent cell positions <NUM> of the substrate <NUM>. Again, the solar cells <NUM> are omitted from this view, with their positions <NUM> on the substrate <NUM> indicated by dashed outlines.

The arrows <NUM> show the overall direction of current (power) between the cell positions <NUM>. In this example, the series connections are again made in the corner regions <NUM> surrounding the center cell position <NUM>, and include corner conductors <NUM> and bypass diodes <NUM>. Only the connections adjacent to the center solar cell <NUM> are fully drawn.

In this example, the series connections are made on both sides of the solar cell <NUM> adjacent to the next solar cell <NUM> in series. The bypass diode <NUM> is only located on one side.

Many variations of these series connections, and other connections, are possible that balance trades of redundancy of conducting paths and connections versus complexity, needed diodes, and spacing between conductors.

<FIG> illustrates a variation in the configuration of buried conductors in the substrate <NUM>. In this example, each of the conductors 76a, 76b is U-shaped, with two substantially linear portions connected by an arcuate portion, where the linear portions are substantially parallel to each other. Each of the conductors 76a, 76b connect to all four cropped corners <NUM> around the perimeter of the cell position <NUM>.

<FIG> also illustrates a variation in the configuration of buried conductors in the substrate <NUM>. In this example, the conductors 78a, 78b have only up or down pathways that connect the cropped corners <NUM> of the cell position <NUM> in the up/down direction of the current flow <NUM>. This allows the conductors 78a, 78b to pass inside or outside of each other, without crossing. Moreover, the conductors 78a, 78b can be patterned in a single Cu layer 56a or Cu layer 56b without need for vias <NUM>, which simplifies fabrication of the circuit. However, this configuration does require series connection on both sides of the cell position <NUM>. Moreover, the back layer <NUM> of the solar cell <NUM> enables a single bypass diode <NUM> to be used.

<FIG> illustrates another variation in the buried conductors in the substrate <NUM>.

The back contact <NUM> does not connect to a buried conductor. Instead, the back layer <NUM> of the solar cell <NUM> is used to carry current to the back contacts <NUM> of the solar cell <NUM>, which eliminates the need for a buried conductor. The back contacts <NUM> carry current to the series-connected adjacent cell positions <NUM> via corner conductors <NUM>. There is also a bypass diode <NUM> in these series connections.

In addition, there is a single buried conductor <NUM> connected to the front contacts <NUM> and their respective grids <NUM>. Specifically, the conductor <NUM> connects between two front contacts <NUM> parallel to the direction of current flow <NUM>, which in this example is up/down and not left/right.

Examples of the disclosure may be described in the context of a method <NUM> of fabricating a solar cell <NUM>, solar cell panel 10a and/or satellite, comprising steps <NUM>-<NUM>, as shown in <FIG>, wherein the resulting satellite <NUM> having a solar cell panel 10a comprised of solar cells <NUM> are shown in <FIG>.

As illustrated in <FIG>, during pre-production, exemplary method <NUM> may include specification and design <NUM> of the solar cell <NUM>, solar cell panel 10a and/or satellite <NUM>, and material procurement <NUM> for same. During production, component and subassembly manufacturing <NUM> and system integration <NUM> of the solar cell <NUM>, solar cell panel 10a and/or satellite <NUM> takes place, which include fabricating the solar cell <NUM>, solar cell panel 10a and/or satellite <NUM>. Thereafter, the solar cell <NUM>, solar cell panel 10a and/or satellite <NUM> may go through certification and delivery <NUM> in order to be placed in service <NUM>. The solar cell <NUM>, solar cell panel 10a and/or satellite <NUM> may also be scheduled for maintenance and service <NUM> (which includes modification, reconfiguration, refurbishment, and so on), before being launched.

For the purposes of this description, a system integrator may include without limitation any number of solar cell, solar cell panel, satellite or spacecraft manufacturers and major-system subcontractors; a third party may include without limitation any number of venders, subcontractors, and suppliers; and an operator may be a satellite company, military entity, service organization, and so on.

As shown in <FIG>, a satellite <NUM> fabricated by exemplary method <NUM> may include systems <NUM>, a body <NUM>, solar cell panels 10a comprised of solar cells <NUM>, and one or more antennae <NUM>. Examples of the systems <NUM> included with the satellite <NUM> include, but are not limited to, one or more of a propulsion system <NUM>, an electrical system <NUM>, a communications system <NUM>, and a power system <NUM>. Any number of other systems <NUM> also may be included.

<FIG> is an illustration of the solar cell panel 10a in the form of a functional block diagram, according to one example. The solar cell panel 10a is comprised of the solar cell array <NUM>, which is comprised of one or more of the solar cells <NUM> individually attached to the substrate <NUM>. Each of the solar cells <NUM> absorbs light <NUM> from a light source <NUM> and generates an electrical output <NUM> in response thereto.

At least one of the solar cells <NUM> has at least one cropped corner <NUM> that defines a corner region <NUM>, such that an area <NUM> of the substrate <NUM> remains exposed when the solar cell <NUM> is attached to the substrate <NUM>. When a plurality of solar cells <NUM> are attached to the substrate <NUM>, the corner regions <NUM> of adjacent ones of the solar cells <NUM> are aligned, thereby exposing the area <NUM> of the substrate <NUM>.

The area <NUM> of the substrate <NUM> that remains exposed includes one or more corner conductors <NUM> attached to, printed on, or integrated with the substrate <NUM>, and one or more electrical connections between the solar cells <NUM> and the corner conductors <NUM> are made in a corner region <NUM>. The corner region <NUM> may also include one or more bypass diodes <NUM>.

The corner region <NUM> includes at least one contact, for example, a front contact <NUM> on a front side of the solar cell <NUM> and/or a back contact <NUM> on a back side of the solar cell <NUM>.

The substrate <NUM> may include buried conductors 74a, 74b, 76a, 76b, 78a, 78b, <NUM>, wherein the buried conductors 74a, 74b, 76a, 76b, 78a, 78b, <NUM> provide conductive paths for the front and back contacts <NUM>, <NUM> of the solar cell <NUM>. The buried conductors 74a, 74b, 76a, 76b, 78a, 78b, <NUM> also facilitate connections between solar cells <NUM>.

The examples discussed present series connections between the solar cells <NUM>. With slight modification, these can terminate strings as discussed in the cross-referenced patent applications identified above.

Further, the disclosure comprises to the following:
There is disclosed a device comprising: a solar cell with one or more grids on a surface thereof, wherein electrical connections are made to the grids in a plurality of locations positioned around a plurality of sides of the solar cell.

Preferably, the electrical connections are connected to conductors on a substrate.

Preferably, the conductors on the substrate distribute current between front or rear contacts of the solar cell to a next series-connected solar cell or string termination conductor.

Preferably, the conductors are located under the solar cell.

Preferably, the conductors comprise loops.

Preferably, at least one of the conductors located under the solar cell has two substantially linear portions connected by an arcuate portion, where the linear portions are substantially parallel to each other.

Preferably, the conductors located under the solar cell are parallel to a direction of current flow.

Preferably, the electrical connections comprise series connections to one or more other solar cells.

Preferably, the electrical connections comprise string termination connections to one or more output conducting lines.

Preferably, the plurality of locations comprises at least three locations.

Preferably, conductors located under the solar cell distribute current to the at least three locations.

Preferably, the solar cell comprises a full solar cell.

Preferably, the full solar cell has four cropped corners and current is distributed to the electrical connections in the cropped corners.

Preferably, there are a plurality of series connection between the solar cells.

Preferably, there is a bypass diode located along one or more of the series connections.

Also, there is disclosed a method, comprising: fabricating a solar cell with one or more grids on a surface thereof, wherein electrical connections are made to the grids in a plurality of locations positioned around a plurality of sides of the solar cell.

Further, there is disclosed a solar cell panel, comprising: a solar cell array comprised of at least one solar cell with one or more grids on a surface thereof, wherein electrical connections are made to the grids in a plurality of locations positioned around a plurality of sides of the solar cell.

Preferably, the conductors on the substrate distribute current between front or rear connections of the solar cell to a next series-connected solar cell or string termination conductor.

Claim 1:
A device, comprising:
a substrate (<NUM>); and
solar cells (<NUM>) individually attached to the substrate (<NUM>), each of the solar cells (<NUM>) having at least one cropped corner (<NUM>), the cropped corner (<NUM>) defining a corner region (<NUM>) such that an area (<NUM>) of the substrate (<NUM>) remains exposed, the corner region (<NUM>) including a front contact (<NUM>) on a front side of the respective solar cell (<NUM>); and
multiple grids (<NUM>) on a front surface of the solar cells (<NUM>); wherein:
each of the grids (<NUM>) is configured to collect current generated by respective one of the solar cells (<NUM>),
the substrate (<NUM>) includes one or more buried conductors configured to carry current to all of the cropped corners (<NUM>) of a respective one of the solar cells (<NUM>),
each of the grids (<NUM>) terminates at one of the front contacts (<NUM>) of the respective one of the solar cells (<NUM>), and
electrical connections are made to the grids (<NUM>) in a plurality of locations positioned around a perimeter of the respective one of the solar cells (<NUM>) and to the buried conductors of the substrate (<NUM>) via the front contacts (<NUM>) in the cropped corners of the respective one of the solar cells (<NUM>).