Patent Description:
Pulse width modulation (PWM), or pulse duration modulation (PDM), is a method of reducing the average power delivered by an electrical signal. In general, an electrical signal is chopped into a stream of discrete pulses that are sent at a set frequency. PWM is particularly suited for running loads such as motors, which are not as easily affected by this discrete switching because they have inertia and react relatively slowly compared to the PWM frequency. PWM switching frequencies are set high enough such that the resultant waveform, as perceived by the load, is relatively smooth.

The width of the pulse (e.g., the duty cycle) relative to the duration of the cycle (e.g., the wavelength) can be varied. A <NUM>% duty cycle effectively allows the electrical signal to stay "on" or "high" and effectively provides <NUM>% of that signal's electrical current to a load. A <NUM>% duty cycle effectively keeps the electrical signal "off" or "low" and effectively provides zero current to the load. A <NUM>% duty cycle effectively provides <NUM>% of the signal's current to the load, and so on.

The act of switching the PWM pulses on and off implements some form of high-speed, solid-state switching device. For current needs in the hundreds of amperes, IGBTs are generally used. For currents up to tens of amperes MOSFETs, which have lower losses and can handle higher frequencies, are generally used. When PWM-based amplifiers are used to drive brushless DC motors, the load requirements are usually large enough that the operating current is a few amperes and regulation near zero current is not common.

<CIT> discloses methods, control apparatus and computer readable mediums for controlling a switching inverter in which a controller selectively suspends PWM carrier signals to provide inverter switching control signals using zero vectors in response to a maximal pulse width value for a present PWM half cycle being greater than a threshold value, and accumulates a present output control value for individual output phases for use in a subsequent PWM half cycle.

<CIT> discloses that a control system for a motor includes a pulse-width modulation module, a pulse skip determination module, and a duty cycle adjustment module. The pulse-width modulation module generates three duty cycle values based on three voltage requests, respectively. A plurality of solid-state switches control three phases of the motor in response to the three duty cycle values, respectively. The pulse skip determination module generates a pulse skip signal. The duty cycle adjustment module selectively prevents the plurality of solid-state switches from switching during intervals specified by the pulse skip signal. <NPL>, discloses a multimode control strategy for operation of the buck converter over a wide load range. A method for control or synchronous rectifiers as a direct function of the load current is introduced. The function relating the synchronous-rectifier timing to the load current is optimized on-line with a gradient power-loss-minimizing algorithm. Only low-bandwidth measurements of the load current and a power-loss-related quantity are required.

<CIT> discloses a vector control unit that outputs current phase information, which is computed on the basis of phase current information from a phase current detector unit, to a pulse suspension control unit. The pulse suspension control unit outputs a phase pulse suspension control signal, which is generated on the basis of the current phase information, to a pulse width determination unit. The pulse width determination unit outputs a pulse start/suspension instruction, for the pulse width to remain above a given value, to a pulse control unit.

<CIT> discloses pulse skipping of a PWM signal for a multiple of a predetermined period in case of a light load.

In general, this document describes pulse width modulation (PWM) control systems.

The systems and techniques described here may provide one or more of the following advantages. First, a system can provide PWM control at near-zero outputs. Second, the system can improve the stability of load control at near-zero outputs. Third, the system can reduce current ripple of PWM outputs at near-zero outputs. Fourth, the system can reduce audible ringing and/or chatter in mechanical outputs driven by PWM signals at near-zero outputs.

This document describes systems and techniques for electrical pulse width modulation (PWM) or pulse duration modulation (PDM) control systems. In general, the techniques described in this document overcome problems that occur as a byproduct of providing very short PWM pulses (e.g., near zero output) to solid-state switching and/or amplification stages. In general, these problems are overcome by identifying conditions in which PWM duty cycle widths have dropped below a predetermined minimum threshold, and responding by skipping or blocking the transmission of a predetermined number of pulses before transmitting the next PWM pulse (e.g., sending one PWM pulse every "X" PWM cycles when the PWM pulse width is determined to be less than "Y" milliseconds long).

In some embodiments, these techniques can be used for controlling the amount of electrical current that is provided in order to drive torque motors used in electrohydraulic servo valves (EHSVs). These EHSVs are generally two-stage hydraulic control valves that can be used to drive linear or rotary hydraulic actuators that move aircraft control surfaces. However, in some other embodiments, these control techniques could be used for other types of motors or solenoids also.

In general, this document describes systems and techniques that overcome problems related to PWM switching limitations of MOSFETs and other solid-state devices at very low currents. Many existing applications use a linear amplifier using discrete analog electronic components to drive the current in the EHSV torque motors. Even though linear amplifiers are not as efficient as PWM-based amplifiers, the current requirements for an EHSV with low flow ratings is small enough that the losses in the amplifier may not present a matter of concern. However, for bigger EHSVs or in a direct drive EHSV where the torque motor drives the spool valve directly, the current requirements can be much larger and can prompt the use of a PWM-based amplifier. From an electronic design perspective, a PWM-based amplifier can offload the proportional-integral (PI) control to software, and can leverage features of a microcontroller to control the output waveform. This can result in the use of fewer parts and better integration, and hence lower cost and improved reliability.

Solid-state devices vary in their switching speeds, and each configuration of device can have a minimum turn-on time and a minimum turn-off time. The minimum turn-on time corresponds to the pulse width needed to turn on a MOSFET from an off state, whereas the minimum turn-off time corresponds to the minimum time taken by the MOSFET to completely turn off once the pulse width is zero (e.g., voltage is removed from its gate). This turn-off time ends up corresponding to the minimum duty ratio that can be used to command the MOSFET. These turn-on and turn-off times are relatively short (e.g., milliseconds), and while higher quality devices can exhibit shorter times, all known solid-state switches still exhibit this behavior to some degree.

In an ideal system, PWM output is directly and smoothly proportional to the duty cycle (e.g., a <NUM>% duty cycle gives <NUM>% current, a <NUM>% duty cycle gives <NUM>% current, a <NUM>% duty cycle gives <NUM>% current). However, due to the switching limitations of real-world solid-state switches, actual PWM outputs can lose linearity and/or stability near the zero current point (e.g., under conditions in which sufficiently short duty cycles are to be used). As the duty cycle of the pulses being used to drive the gate of a MOSFET become shorter than the minimum turn-off time of the MOSFET, the MOSFET can produce output pulses having the (e.g., relatively longer) minimum turn-off time, rather than the (e.g., relatively shorter) commanded PWM duty cycle. In some examples, this behavior could resemble a plateauing or "bottoming out" of output current as a stream of duty cycles transitions from being longer than the minimum turn-off time (e.g., which can produce a proportional drop in output current), to being equal to or shorter than the minimum turn-off time (e.g., at least a portion of which can all produce the same output current based on the minimum turn-off time rather than the duty cycle).

When PWM-based amplifiers are used to drive brushless DC motors, the load requirements are usually large enough that the operating current is a few amperes and regulation near zero current is not common. In such applications, the PWM duty cycle (e.g., the portion of the overall PWM cycle in which the signal is turned "on") is generally longer than the minimum turn-off time of the switch of the amplifier. However, when PWM-based amplifiers are used for controlling EHSV servos, the implementation may require regulation near zero current. In some applications, the PWM duty cycle may become shorter than the minimum turn-off time of the switch of the amplifier.

<FIG> is a schematic diagram that shows an example of a system <NUM> for pulse width modulation (PWM) control. The system <NUM> includes a PWM controller <NUM> that is configured to receive a setpoint value <NUM> (e.g., target output current, percent of output current) and provide a corresponding output signal to an electrical load <NUM> (e.g., an EHSV, an electric motor).

The PWM controller <NUM> includes a switch <NUM>. The switch <NUM> is a solid-state switching device, such as a MOSFET-backed H-bridge or IGBT, configured to act as a PWM signal transmitter to transmit PWM signals to the electrical load <NUM>. The switch <NUM> has an inherent minimum turn-on time and a minimum turn-off time (e.g., based on the physics of its underlying solid-state construction). For example, once the controlling signal is turned off, the switch <NUM> may remain on for at least a predetermined amount of time even if the control signal is removed before that time has elapsed. In another example, once turned off the switch <NUM> may remain off unless the turn-on signal is provided for at least a predetermined amount of time. This turn-on time is usually much smaller than the turn-off time (e.g., <NUM> microseconds compared to <NUM> microseconds).

In an example, a selected MOSFET can have finite turn-on and turn-off times, such as Ton = 22nsec and Toff= 2usec. For a <NUM> PWM frequency, this implies a "minimum" duty ratio command from the gate drive circuit of <NUM>% to turn the MOSFET on. Any duty ratio greater than <NUM>% and less than <NUM>% causes an effective duty ratio of <NUM>% due to the finite Toff. In the presence of this nonlinearity, a proportional-integral (PI) controller can become unstable for values of current commands in the -10mA to +10mA range. In essence, the PI controller does not "know" about the deadband and offset in the duty ratio command, so its integrator builds up until PI output changes sign. This causes the current to reverse direction in an effort to reduce the error. The cycle then repeats itself. In examples in which the current loop is running at <NUM>, these oscillations can have a frequency of <NUM> to <NUM> and can create an audible noise and vibration in a torque motor. The problem can become more severe as PWM voltages increase since duty ratios become proportionally smaller, e.g., duty ratios for a 28VDC supply are generally smaller for an equivalent current output than when using 12VDC supply.

Performance parameters such as these, and others, of the switch <NUM> can be known (e.g., based on manufacturers' specifications) or determined (e.g., measured), and used as a collection of predetermined switch parameters <NUM>.

The switch <NUM> is configured to amplify a PWM driving signal by rapidly switching current from a power source <NUM> (e.g., electrical current received at a transistor source input) to the electrical load <NUM> (e.g., electrically connected to a transistor drain output) based on a PWM control signal (e.g., received at a transistor gate input). The PWM driving signal can be a normal PWM signal <NUM> generated by a normal PWM signal (e.g., pulse) generator module <NUM>, or the PWM driving signal can be a modified PWM signal <NUM> generated by a modified PWM signal (e.g., pulse) generator <NUM>. In general, the normal PWM signal is a PWM signal that has a predetermined cycle or frequency and in which non-zero values are represented by one electrical pulse during each cycle, and the modified PWM signal is a PWM signal that has the predetermined cycle or frequency but for some non-zero values does not transmit an electrical pulse for each cycle. An example of a normal PWM signal is discussed further in the description of <FIG>, and examples of modified PWM signals are discussed further in the descriptions of <FIG> and <FIG>.

The determination for whether to present a normal or modified PWM signal to the switch <NUM> is performed by a monitor module <NUM>. In some implementations, the monitor module <NUM> can be a software algorithm performed by a processor, or it can be a function performed by a dedicated electronic circuit. The monitor module <NUM> includes an operational condition identification module <NUM> and a threshold module <NUM>.

The operational condition identification module <NUM> is configured to determine the duty cycle of the PWM signal to be produced (e.g., for amplification by the switch <NUM>) based on the setpoint value <NUM> received at an input port <NUM>. The PWM controller <NUM> is configured to provide a range of high power levels (e.g., <NUM>-10A, <NUM>-100A) from the switch <NUM> to the electrical load <NUM> based on a low power (e.g., <NUM>-5V, <NUM>-10V, -10mA to +10mA) or digital signal that is provided to the PWM controller <NUM> to represent the setpoint value <NUM>.

The operational condition identification module <NUM> is also configured to receive feedback or other information about the electrical load <NUM>, and use that information to determine the operational condition. For example, an electric actuator with no mechanical load may react to a selected PWM duty cycle differently than when the electric actuator is burdened with a high inertial load, and the operational condition identification module <NUM> may at least partly determine the operational condition or PWM duty cycle based on those conditions. In another example, two different mechanical loadings may behave differently to modified PWM signals (e.g., one load may audibly resonate or mechanically chatter whereas the other load may not, in response to the same modified PWM signal), and the operational condition identification module <NUM> may at least partly determine the operational condition or PWM duty cycle based on those conditions.

In some implementations, the operational condition identification module <NUM> can be configured to convert the setpoint value <NUM> into a PWM signal having a predetermined cycle and a duty cycle that is based on the setpoint value <NUM>. For example, the setpoint value <NUM> may represent "<NUM> percent", and the operational condition identification module <NUM> may respond by determining that the corresponding duty cycle is <NUM>% of the PWM cycle, and by determining duration of PWM pulses that correspond to a <NUM>% duty cycle. In such an example, the operational condition identification module <NUM> can determine that for a <NUM> PWM frequency the PWM cycle or frame time will be <NUM> seconds long, and that a <NUM>% duty cycle will result in PWM pulses having a <NUM>-second duration on a <NUM>-second interval). Such pulses control the amount of power switched by the switch <NUM> from the power source <NUM> to the electrical load <NUM> (e.g., <NUM>% of the power available from the power source <NUM> in this example). Similarly, a setpoint value of <NUM>% can cause the operational condition identification module <NUM> to determine that a <NUM>% duty cycle is appropriate, and may determine that a <NUM>% duty cycle will result in a PWM signal having pulses that are of a different duration (e.g., <NUM> seconds long for a PWM frequency of <NUM>).

In some embodiments, the operational condition identification module <NUM> can be configured to measure the pulse durations of an existing PWM signal. For example, the operational condition identification module <NUM> can be configured downstream from a PWM signal generator (e.g., instead of upstream from the PWM signal generators <NUM> and <NUM>, as in the illustrated example). In some embodiments, arranging the operational condition identification module <NUM> upstream to PWM signal generation may be useful for new controller designs, while arranging the operational condition identification module <NUM> downstream from PWM signal general may be useful for enhancing or retrofitting existing controller designs.

The threshold module <NUM> is configured to compare the determined duration of PWM pulses against the predetermined switch parameters <NUM>. The predetermined switch parameters <NUM> provide information that describes characteristics of the switch <NUM>, including the minimum turn-on time of the switch <NUM>. In some implementations, the predetermined switch parameters <NUM> can be provided directly, e.g., the predetermined switch parameters <NUM> can include an explicit value that describes the minimum turn-on time of the switch <NUM>. In some implementations, the predetermined switch parameters <NUM> can be provided indirectly, e.g., the predetermined switch parameters <NUM> can include values that describe construction, type, make and model, or other information that identifies the switch <NUM>, and the minimum turn-on time of the switch <NUM> can be determined (e.g., looked up, calculated) based on that information.

The threshold module <NUM> compares the determined duration of PWM pulses against the minimum turn-off time for the switch <NUM> to determine if the target PWM duty cycle results in PWM pulses that are equal to or longer than the minimum turn-off time for the switch <NUM>, or if the target PWM duty cycle results in PWM pulses that are shorter than the minimum turn-on time for the switch <NUM> (e.g., PWM duty cycles that are too short for the switch <NUM> to follow accurately).

If the threshold module determines that the PWM pulse durations are equal to or longer than the minimum turn-off time of the switch <NUM> (e.g., the switch <NUM> can follow the pulses accurately), then the normal PWM signal generator <NUM> is engaged to generate and provide the normal PWM signal <NUM> to the switch. However, if the threshold module determines that the PWM pulse durations are shorter than the minimum turn-off time of the switch <NUM> (e.g., the switch <NUM> cannot follow the pulses accurately), then the modified PWM signal generator <NUM> is engaged to generate and provide the modified PWM signal <NUM> to the switch.

<FIG> is a graph <NUM> of an example PWM waveform <NUM>. In some implementations, the PWM waveform <NUM> can be the example normal PWM signal <NUM> of <FIG>.

The PWM waveform <NUM> is a stream of PWM cycles <NUM>. Each of the PWM cycles <NUM> have a predetermined PWM cycle period <NUM>. At the start of the PWM cycle <NUM>, the PWM waveform <NUM> is brought high (e.g., signal power is turned on), and when the predetermined PWM cycle period <NUM> has elapsed the PWM waveform <NUM> is brought low (e.g., signal power is turned off) and remains low until the PWM cycle period <NUM> has elapsed, then the process repeats. For example, a PWM signal having a <NUM> frequency will have a <NUM> cycle period (e.g., <NUM>/100th of a second equals <NUM>). Typically, PWM signals are transmitted at substantially fixed, predetermined frequencies.

For non-zero PWM values, each of the PWM cycles <NUM> includes a PWM pulse <NUM>. Each of the PWM pulses <NUM> has a duty cycle, which is a fraction or percentage of the PWM cycle period <NUM>. The duty cycle determines the duration or period of the PWM pulse and in the illustrated example the PWM pulse duration is represented as <NUM>. For example, for a PWM signal having a <NUM>% duty cycle, the length of the PWM pulse duration <NUM> will be <NUM>% of the length of time of the PWM cycle period <NUM>. In another example, for a PWM signal having a <NUM> frequency and a <NUM>% duty cycle, the PWM pulses will be <NUM> long (e.g., <NUM>% of the <NUM> period equals <NUM>). For simplicity of illustration of explanation, the PWM waveform <NUM> represents a single value that is being transmitted for the illustrated duration of the PWM waveform <NUM>.

<FIG> is a graph of an example PWM cycle <NUM>. In some embodiments, the PWM cycle <NUM> can be an enlarged view of one of the PWM cycles <NUM>. The PWM cycle has a PWM cycle period <NUM> and a PWM pulse <NUM>. The PWM pulse has a PWM pulse duration <NUM>. A threshold period <NUM> represents an example minimum turn-on time of a switching amplifier (e.g., the example switch <NUM> of <FIG>).

In the illustrated example, the selected duty cycle of the PWM cycle <NUM> causes the PWM pulse duration <NUM> to be shorter than the threshold period <NUM>. In some examples, unless further steps are taken, the pulses provided by the switching amplifier can have a duration that approximates the threshold period <NUM> and not the PWM pulse duration <NUM>. As a result, in the absence of additional remediation, the actual output of the switching amplifier can become disproportional to the commanded output. For example, a high current based on a high PWM duty cycle can decrease proportionally with decreasing PWM duty cycles until the PWM duty cycle duration substantially equals the threshold period <NUM>. As the PWM duty cycle continues to decrease, the amplified current output can remain at the level caused by the switching amplifier's minimum turn-off period, as represented by the threshold period <NUM>. Under such conditions, and in the absence of additional remediation, the output of the switching amplifier will be higher than the commanded output level and will become increasingly more erroneous as the commanded output level approaches zero.

In situations in which the PWM pulse duration <NUM> is determined (e.g., by the example monitor circuit of <FIG>) to have a duration that is less than (or equal to or less than) the threshold period <NUM>, a modified PWM signal is provided to the switching amplifier (e.g., the switch <NUM>) to controllably adjust the output of the switching amplifier.

<FIG> is a graph <NUM> of an example modified PWM waveform <NUM>. In some implementations, the modified PWM waveform <NUM> can be the example modified PWM signal <NUM> of <FIG>. In general, the modified PWM waveform <NUM> can be used to adjust the output of a switching amplifier controllably (e.g., the example switch <NUM> of <FIG>) at levels that drive a PWM control signal to PWM duty cycles that are shorter than the minimum turn-off time of the switching amplifier. In general, this is accomplished by transmitting a PWM pulse during a first PWM cycle and then withholding, blocking, skipping, or otherwise preventing the transmission of PWM pulses for a predetermined number of subsequent PWM cycles before transmitting another PWM pulse.

In the illustrated example, the PWM waveform <NUM> includes a PWM cycle <NUM> having the PWM cycle period <NUM> and a PWM pulse duration <NUM> that defines a PWM pulse <NUM>. At the start of the PWM cycle <NUM>, the PWM waveform <NUM> is brought high (e.g., signal power is turned on), and when the predetermined PWM cycle period <NUM> has elapsed the PWM waveform <NUM> is brought low (e.g., signal power is turned off) and remains low until the PWM cycle period <NUM> has elapsed. However, unlike the example normal PWM waveform <NUM> of <FIG>, the modified PWM waveform <NUM> does not immediately repeat itself. Instead, the PWM waveform <NUM> remains low during a skipped PWM cycle <NUM> and a skipped PWM cycle <NUM>, each of which has the PWM cycle period <NUM>, before going high again for another PWM pulse duration equal to the PWM pulse duration <NUM>.

In the illustrated example, the PWM cycle <NUM> is followed by two skipped PWM cycles <NUM> and <NUM>. In some implementations, an appropriate number of PWM cycles may be skipped before another PWM pulse <NUM> is provided (e.g., <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, or more skipped cycles). In some implementations, the number of skipped PWM cycles can be determined dynamically, e.g., the number of skipped PWM cycles can be based on the PWM duty cycle or on a comparison of the PWM pulse duration <NUM> and the minimum turn-off time.

For example, for PWM duty cycles that cause PWM pulse durations nearly equal to the minimum turn-off time of the switch (e.g., the example switch <NUM> of <FIG>), zero skipped PWM cycles may be used, which would cause the switch to output an amplified PWM signal having approximately the minimum turn-off time. In another example, for PWM duty cycles that cause PWM pulse durations that are approximately half the minimum turn-off time of the switch, one skipped PWM cycle may be used between each pulsed PWM cycle, which would cause the switch to output an amplified PWM signal having half as many pulses per second, and would result in an amplified output that is approximately half of the output having zero skipped cycles. In yet another example, for PWM duty cycles that cause PWM pulse durations that are approximately one-third of the minimum turn-off time of the switch, two skipped PWM cycles may be used, which would cause the switch to output an amplified PWM signal having approximately one-third as many pulses per second, and would result in an amplified output that is approximately one-third of the output having zero skipped cycles.

In another example, the PWM driver <NUM> can be equipped to account for changes in the DC resistance of motor coils in the load <NUM>, and/or to account for changes in current command value (e.g., the number of frame skips may be increased as values of current command shrink). In a particular example, the voltage supply Vs and the nominal DC resistance can be known and fixed. For a maximum current Imax = Vs/(OC resistance), and assuming a <NUM>% duty ratio, gives a voltage of Vs across the torque motor winding. For a given current command Icmd, the required duty ratio is estimated as DR = Icmd / Imax. In examples in which DC resistance changes with temperature or from motor to motor, then such variables can be measured or estimated first. The calculation of the number of sample periods to skip n cycles can be as follows:.

<FIG> is a graph <NUM> of another example modified PWM waveform <NUM>. In some implementations, the modified PWM waveform <NUM> can be the example modified PWM signal <NUM> of <FIG>. In some implementations, the modified PWM waveform <NUM> can be the example modified PWM waveform <NUM> of <FIG>, but produced by a different technique. In general, whereas the modified PWM waveform <NUM> is produced by providing one PWM cycle with a pulse, followed by one or more cycles in which the pulse is kept low, blocked, or otherwise not be provided, the modified waveform <NUM> is produced by dynamically altering the PWM cycle frequency.

As discussed previously, when PWM duty cycles shorten to a PWM duration that is approximately equal to the minimum turn-off time of the switch (e.g., the example switch <NUM> of <FIG>), the amplified pulses output by the switch cannot be made shorter. In the illustrated example, instead of implementing skipped PWM cycles in order to further reduce the output of the switch (e.g., as was done in the example waveform <NUM>), the PWM frequency of the PWM waveform <NUM> is reduced by a predetermined amount.

The PWM waveform <NUM> is made up of a collection of repeating PWM cycles <NUM>. Each of the PWM cycles <NUM> has a PWM cycle period <NUM>, and for non-zero values each PWM cycle <NUM> includes one PWM pulse <NUM> having a PWM pulse duration <NUM>.

In the illustrated example, the PWM cycle period <NUM> is approximately 3x longer than the example PWM cycle period <NUM> of <FIG> and <FIG>, while the PWM pulse duration is not expanded (e.g., the PWM duty cycle is reduced by approximately one third to offset the lengthened PWM cycle period <NUM>). For example, if the PWM cycle period <NUM> is <NUM> and with a duty cycle of <NUM>%, then the PWM pulse duration <NUM> will be <NUM>. Continuing this example, if the PWM cycle period <NUM> is expanded to <NUM>, then the PWM pulse duration <NUM> can be kept at approximately <NUM>. By dynamically reducing the PWM frequency, the PWM waveform <NUM> can be used to provide switched, amplified outputs that are representative of PWM duty cycles that are shorter than what the minimum turn-off time of the switch would otherwise permit.

In the illustrated example, the PWM frequency has been reduced by approximately one-third, but in other examples any appropriate reduction may be used. For example, the PWM frequency (e.g., and the resulting amplified output) can be reduced by approximately one-half (e.g., compared to the example PWM waveform <NUM>) by setting the PWM cycle period <NUM> to be twice as long as the example PWM cycle period <NUM>. In other examples, any appropriate length of PWM cycle period can be used, such as <NUM>. 25x, 2x, <NUM>. 5x, 3x, 5x, or 10x the duration of the PWM cycle period of the normal (e.g., unmodified) PWM signal.

In <FIG>, the PWM waveforms were illustrated and described as being edge-aligned waveforms (e.g., in which the pulses' leading edges are aligned with the start of the PWM cycle). However, PWM signals, including those described in this document, are not limited to edge-aligned signals. For example, the systems and techniques described in this document can be adapted for use with center-aligned PWM waveforms (e.g., in which the pulse is appears to be symmetrically aligned with the center of the PWM cycle), or any other appropriate edge or offset for the timing and/or alignment of PWM pulses and PWM cycles.

<FIG> is a flow diagram that shows an example process <NUM> for determining an operational condition in which a PWM or modified PWM signal can be provided. In some implementations, the process <NUM> can be performed by the example PWM controller <NUM> of <FIG>.

At <NUM>, a PWM duty cycle is determined based on a setpoint <NUM> and a collection of feedback information <NUM>. For example, a PWM duty cycle can be selected based on a target output for the example switch <NUM> of <FIG>, and on information about the example electrical load <NUM> that is being driven, directly or indirectly, by the output of the switch <NUM>.

At <NUM>, a PWM pulse width is determined based on the determined PWM duty cycle. The PWM signal repeats on a predetermined or measurable interval of time, and the PWM duty cycle represents a fractional portion of that interval. The resulting portion is the PWM pulse duration. For example, a <NUM> PWM signal with <NUM>% duty cycle will have pulses that are <NUM> long and repeat every <NUM>.

At <NUM>, a determination is made based on the determined PWM pulse duration and a predetermined threshold value <NUM>. The threshold value <NUM> is based on the minimum turn-off time for a switch (e.g., solid-state device, transistor, IGBT, MOSFET) that will amplify the PWM signal. If the PWM pulse duration is approximately equal to or longer than a period of time determined from the threshold value <NUM> (e.g., the PWM pulses have a length that will not be affected by minimum turn-off times for the switch), then at <NUM> an unmodified (e.g., normal) PWM signal is provided to the switch (e.g., the normal PWM signal generator <NUM> is used to provide the normal PWM signal <NUM> to the switch <NUM>). If the PWM pulse duration is shorter than the period of time determined from the threshold value <NUM>, then at <NUM> a modified PWM signal is provided to the switch (e.g., the modified PWM signal generator <NUM> is used to provide the modified PWM signal <NUM> to the switch <NUM>).

<FIG> is a schematic diagram that shows an example of another system <NUM> for pulse width modulation (PWM) control. In some embodiments, the system <NUM> can be a modification or more specific configuration of the example system <NUM> of <FIG>.

The system <NUM> includes a PWM controller <NUM>. In the illustrated example, a PWM signal generator <NUM> is configured to generate either a normal PWM signal (e.g., with a pulse for each cycle) or a modified PWM signal (e.g., with one pulse per a selected number of cycles, or a reduced frequency signal) based on the setpoint value <NUM> and an operational condition, determined by the monitor module <NUM> based on the setpoint value <NUM>. The selected type of PWM signal is provided to the switch <NUM> to control a flow of power from the power source <NUM> to the electrical load <NUM>.

<FIG> is a schematic diagram that shows an example of another system <NUM> for pulse width modulation control. In some embodiments, the system <NUM> can be a modification or more specific configuration of the example system <NUM> of <FIG>.

The system <NUM> includes a PWM controller <NUM>. In the illustrated example, the normal PWM signal generator <NUM> is configured to always produce an unmodified PWM signal (e.g., the normal PWM signal <NUM>) based on the setpoint value <NUM>. The monitor module <NUM> is configured to determine an operational condition based on the setpoint. According to the present invention, the monitor module <NUM> is configured to determine if the setpoint will give rise to a PWM duty cycle that will have PWM pulse durations that are either equal or longer than the minimum turn-off time of the switch <NUM>, or PWM pulse duration that are shorter than the minimum turn-off time of the switch <NUM>.

A pulse inhibitor module <NUM> is configured to selectably modify the unmodified PWM signal provided by the PWM signal generator <NUM> or allow the unmodified PWM signal to remain unmodified, based on the operational condition determined by the monitor module <NUM>. Under operational conditions in which the frequency and the duty cycle of the unmodified PWM signal is determined (e.g., by the monitor module <NUM>) to cause PWM pulses that are either equal or longer than the minimum turn-off time of the switch <NUM>, then the pulse inhibitor module <NUM> can remain inactive and allow the unmodified PWM signal (e.g., the normal PWM signal <NUM>) to pass to the switch <NUM>.

Under operational conditions in which the frequency and the duty cycle of the unmodified PWM signal is determined (e.g., by the monitor module <NUM>) to cause PWM pulses that are shorter than the minimum turn-off time of the switch <NUM>, then the pulse inhibitor module <NUM> can activate to modify the unmodified PWM signal, and pass the resulting modified PWM signal (e.g., the modified PWM signal <NUM>) to the switch <NUM>. For example, the pulse inhibitor module <NUM> may be configured to turn on and off in synchronization with the PWM cycle durations to allow selected PWM cycles to pass to the switch <NUM> and inhibit or otherwise prevent other cycles from passing.

In operation, the pulse inhibitor module <NUM> can be configured to inhibit or otherwise block the transmission of a selected number of subsequent PWM cycles for each PWM cycle that it is configured to pass. For example, the pulse inhibitor module <NUM> can be configured allow a PWM cycle and its PWM pulse to pass to the switch <NUM>, and then block the next four PWM cycles before passing another PWM cycle and its PWM pulse before inhibiting the transmission of another subsequent four skipped cycles. In other examples, the pulse inhibitor module <NUM> can be configured to skip zero, one, two, three, four, ten, twenty, or any other appropriate number of PWM cycles.

In the illustrated example, the pulse inhibitor module <NUM> is configured to controllably pass and block low-level PWM pulses before they reach the switch <NUM> for amplification. In some embodiments, the pulse inhibitor module <NUM> can be configured to controllably pass and block high-level PWM signals. For example, the pulse inhibitor module <NUM> can be arranged to controllably pass and block the output of the switch <NUM>.

In the illustrated example, the pulse inhibitor module <NUM> is included as part of the PWM controller <NUM>. In some embodiments, the pulse inhibitor module <NUM> and/or the monitor module <NUM> can be external to the PWM controller <NUM>. For example, an existing (e.g., normal) PWM signal generator may be retrofitted or otherwise supplemented with the monitor module <NUM> to detect operational conditions based on the setpoint value <NUM>, and the pulse inhibitor module <NUM> can be arranged between the switch <NUM> and the electrical load <NUM>. In such arrangements, the pulse inhibitor module <NUM> can be configured to controllably pass or block amplified PWM signals as they travel from the PWM controller <NUM> to the electrical load <NUM>.

<FIG> is a flow chart of an example process <NUM> for PWM control in accordance with some embodiments in this document. In some implementations, the process <NUM> can be performed by the example system <NUM>, <NUM>, and/or <NUM> of <FIG>, <FIG>, and <FIG>.

At <NUM>, a first electrical current output setpoint is received. For example, the example setpoint value <NUM> is received by the PWM controller <NUM>.

At <NUM>, a determination is made. If a first operational condition is not identified based on the first electrical current output setpoint, then the process continues at <NUM>. If a first operational condition is identified based on the first electrical current output setpoint, then the process continues at <NUM>.

In some implementations, identifying the first operational condition can be based on determining a target duty cycle based on the first electrical current output setpoint, determining that the target duty cycle is equal to or longer than a predetermined threshold duty cycle, and providing the target duty cycle as the first predetermined duty cycle. For example, the monitor module <NUM> can determine, based on the switch parameters <NUM>, whether or not the setpoint value <NUM> will result in a PWM signal having a PWM duty cycle that results in PWM pulses that are approximately equal to or longer than the minimum turn-off time of the switch <NUM>.

At <NUM>, a first pulse width modulated (PWM) signal having a first predetermined duty cycle is provided based on the identified first operational condition. The first PWM signal is based on the first electrical current output setpoint, and is provided on a predetermined period. For example, the normal PWM signal generator <NUM> can be used to generate the normal PWM signal <NUM> when the PWM pulse durations are approximately equal to or longer than the minimum turn-off time of the switch <NUM>.

In some implementations, providing the first PWM signal can include determining a start of a PWM cycle having a first duration of time based on the predetermined period, providing an electrical signal, halting the electrical signal based on determining that the electrical signal has been provided for a second duration of time, based on the first predetermined duty cycle, has elapsed, and determining an end of the PWM cycle based on determining that the first duration of time has elapsed. For example, the example PWM waveform <NUM> includes the repeating collection of PWM cycles <NUM> having the PWM cycle period <NUM>. The start of the cycle <NUM> can be determined, and the output signal can be turned on. The output signal is kept on until the end of the PWM pulse duration <NUM>, and the turned off for the remainder of the PWM cycle period <NUM>.

At <NUM>, a second electrical current output setpoint is received. In some implementations, the second output setpoint can be the first output setpoint.

At <NUM>, another determination is made. If a second operational condition, different from the first operational condition, is not identified based on the second electrical current output setpoint, then the process continues at <NUM>. If a second operational condition is identified based on the second electrical current output setpoint, then the process continues at <NUM>.

In some implementations, identifying the second operational condition can be based on determining a target duty cycle based on the second electrical current output setpoint, determining that the target duty cycle is shorter than a predetermined threshold duty cycle, and determining the second predetermined duty cycle based on the target duty cycle. In the present invention, identifying the second operational condition is based on a minimum turn-off time of an electrical circuit configured to transmit the PWM signal, and can in addition be based on a minimum turn-on time of the electrical circuit. For example, the monitor module <NUM> can determine, based on the switch parameters <NUM>, whether or not the setpoint value <NUM> will result in a PWM signal having a PWM duty cycle that results in PWM pulses that are shorter than the minimum turn-off time of the switch <NUM>.

At <NUM>, a second PWM signal is provided, based on the identified second operational condition. The second PWM signal has a second predetermined duty cycle, based on the second electrical current output setpoint, and is provided on a predetermined multiple of the predetermined period. For example, the modified PWM signal generator <NUM> can be used to generate the modified PWM signal <NUM> when the PWM pulse durations are shorter than the minimum turn-off time of the switch <NUM>.

In some implementations, providing the second PWM signal can include generating a PWM pulse at a frequency based on the predetermined period, transmitting an electrical pulse based on the generated PWM pulse, and ignoring a predetermined number of PWM pulses based on the predetermined multiple. For example, one of the example PWM pulses <NUM> can be generated during each PWM cycle <NUM>, and no PWM pulse is generated during the PWM cycles <NUM> and <NUM>. In some implementations, PWM pulses can be ignored by configuring a PWM signal generator to not produce the pulses to be ignored or skipped. In some implementations, a PWM generator can produce pulses for every PWM cycle, but a filter (e.g., the pulse inhibitor module <NUM>) can block or otherwise effectively prevent selected ignored or skipped pulses from reaching an amplification stage (e.g., the switch <NUM>).

In some implementations, providing the second PWM signal can include determining a start of a PWM cycle having a second duration of time based on the predetermined period and the predetermined multiple, providing an electrical signal, halting the electrical signal based on determining that the electrical signal has been provided for a second duration of time, based on the second predetermined duty cycle, has elapsed, and determining an end of the PWM cycle based on determining that the second duration of time has elapsed. For example, the modified PWM waveform <NUM> of <FIG> can be provided, in which the example PWM cycle period <NUM> has a duration that is a predetermined multiple (e.g., three) of the example PWM cycle period <NUM>.

<FIG> is a flow chart of an example process <NUM> for providing a PWM signal in accordance with some embodiments in this document. In some implementations, the process <NUM> can be performed by the example system <NUM>, <NUM>, and/or <NUM> of <FIG>, <FIG>, and <FIG>, for example, to produce the example normal PWM waveform <NUM> of <FIG>. In some implementations, the process <NUM> can be performed as at least part of step <NUM> of the example process <NUM> of <FIG>.

At <NUM> a start of a first PWM cycle having a first duration of time based on the predetermined period is determined. For example, the start of the PWM cycle <NUM> having the PWM cycle period <NUM> can be determined or detected.

At <NUM>, an electrical signal is provided. For example, the output of the modified PWM signal generator <NUM> can be turned on or set high to start the PWM pulse <NUM>.

At <NUM> a determination is made, based on determining that a second duration of time has elapsed. For example, the determination can be based on whether or not the PWM pulse duration <NUM> has elapsed. If the second duration of time has not elapsed, then the process <NUM> continues at <NUM>. If the second duration of time has elapsed, then the process <NUM> continues at <NUM>.

At <NUM> the electrical signal is halted, based on determining that the second duration of time has elapsed. For example, the output of the modified PWM signal generator <NUM> can be turned off or set low when the PWM pulse duration <NUM> has elapsed to end the PWM pulse <NUM>.

At <NUM> another determination is made based on determining whether or not the first duration of time has elapsed. For example, if the PWM cycle period <NUM> has not elapsed, the PWM signal is kept low and the process continues at <NUM>. If the PWM cycle period <NUM> has elapsed, then the process <NUM> continues at <NUM>.

<FIG> is a flow chart of an example process <NUM> for modifying a PWM signal. In some implementations, the process <NUM> can be performed by the example system <NUM>, <NUM>, and/or <NUM> of <FIG>, <FIG>, and <FIG>, for example, to produce the example modified PWM waveform <NUM> of <FIG>. In some implementations, the process <NUM> can be performed as at least part of step <NUM> of the example process <NUM> of <FIG>.

At <NUM>, a start of a first PWM cycle having a first duration of time based on the predetermined period is determined. For example, the start of the example PWM cycle <NUM> of <FIG> or the example PWM cycle <NUM> of <FIG> can be identified.

At <NUM>, a determination is made. If PWM signals are to be produced in an unmodified (e.g., normal) mode, then the process <NUM> continues at <NUM>. If PWM signals are to be produced in a modified mode, the process <NUM> continues at <NUM>.

At <NUM>, an electrical signal is provided. For example, the example PWM pulse <NUM>, <NUM>, and <NUM> of <FIG> can be started (e.g., the signal power can be turned on).

At <NUM> a determination is made. If the duty cycle of the PWM signal has not elapsed, then the process continues at <NUM>. For example, if the example PWM pulse durations <NUM>, <NUM>, and <NUM> have not expired, then their respective PWM pulses <NUM>, <NUM>, and <NUM> are left turned on. If the duty cycle of the PWM signal has elapsed, then the process continues at <NUM>.

At <NUM>, the electrical signal is halted based on determining that a second duration of time has elapsed. The second duration of time is based on the first predetermined duty cycle or the second predetermined duty cycle (e.g., whichever was most recently determined from the setpoint value <NUM>). For example, the example PWM pulses <NUM>, <NUM>, and <NUM> can be turned off when their respective PWM pulse durations <NUM>, <NUM>, and <NUM> have expired.

At <NUM>, another determination is made based on the PWM cycle duration. If the PWM cycle duration has not expired, the process <NUM> continues at <NUM> and the PWM signal level is kept low. If the PWM cycle duration has expired, the process <NUM> continues at <NUM>. For example, the example, the example PWM waveforms <NUM> and <NUM> can kept low or off for the remainder of their respective PWM cycle period <NUM>.

If the process <NUM> is operating in a modified mode, the determination at <NUM> can include determining an end of the first PWM cycle based on determining that the first duration of time has elapsed. For example, if a modified PWM waveform is to include four skipped cycles for each pulsed (e.g., non-skipped) cycle, then the end of the pulsed cycle can be identified as the end of the first PWM cycle.

When the process <NUM> is determined, at <NUM>, to be operating in a modified PWM mode, the process continues at <NUM>. At <NUM>, another determination is made about the number of PWM cycles to skip, ignore, block, or otherwise not provide a corresponding PWM pulse. The start of a predetermined number, based on the predetermined multiple, of second PWM cycles having the first duration of time based on the predetermined period is determined, for example, by determining that a PWM pulse was sent in the previous cycle and resetting a skipped cycle counter. If the predetermined number of cycles has not occurred, then the process continues at <NUM> where the PWM signal output is set or kept low, and stays low until the cycle is complete. The process of keeping the PWM output low continues until the predetermined number of skipped cycles is determined to have been performed at step <NUM>. If the predetermined number of skipped cycles have occurred, then the process continues at <NUM>, where the next PWM pulse is started.

In some implementations, the process <NUM> can also include determining the predetermined multiple based on the second operational condition. For example, the setpoint value <NUM> can be analyzed to determine if zero, one, two, three, four, seven, thirteen, or any other appropriate number of cycles are to be provided without corresponding PWM pulses following a provided PWM pulse.

<FIG> is a flow chart of an example process <NUM> for modifying a PWM signal. In some implementations, the process <NUM> can be performed by the example system <NUM>, <NUM>, and/or <NUM> of <FIG>, <FIG>, and <FIG>, for example, to produce the example modified PWM waveform <NUM> of <FIG>.

At <NUM>, the start of a PWM cycle is determined. For example, the start of the example PWM cycle <NUM> of <FIG> or the example PWM cycle <NUM> of <FIG> can be identified.

At <NUM>, a determination is made. If a modified PWM output is not needed (e.g., the PWM pulse duration is long enough for the switch <NUM> to replicate accurately), then the process continues at <NUM>. If a modified PWM output is needed (e.g., the PWM pulse duration is too short for the switch <NUM> to replicate accurately), then the process <NUM> continues at <NUM>.

At <NUM>, the process <NUM> begins to operate in a "normal" PWM mode. At <NUM>, a normal (e.g., unmodified) PWM duty cycle is determined for an output signal, and at <NUM> the normal PWM signal is provided (e.g., to the example switch <NUM> of <FIG>).

At <NUM>, the process <NUM> begins to operate in a "modified" PWM mode. At <NUM>, a modified PWM duty cycle is determined. For example, the example PWM cycle period <NUM> can be expanded to become the example PWM cycle period <NUM>. In some examples, the example PWM duty cycle can be modified to provide the example PWM pulse duration <NUM> (e.g., to proportionally offset the expanded PWM cycle). In some implementations, step <NUM> can effectively reduce the frequency of the PWM signal by a predetermined amount (e.g., based on the setpoint value <NUM>, the switch parameters <NUM>, and/or the feedback from the electrical load <NUM>). At <NUM>, the modified signal is provided (e.g., to the switch <NUM>).

<FIG> is a schematic diagram of an example of a generic computer system <NUM>. The system <NUM> can be used for the operations described in association with the example process <NUM> according to one implementation. For example, the system <NUM> may be included in either or all of the PWM controller <NUM>, the PWM controller <NUM>, and the PWM controller <NUM>.

The system <NUM> includes a processor <NUM>, a memory <NUM>, a storage device <NUM>, and an input/output device <NUM>. Each of the components <NUM>, <NUM>, <NUM>, and <NUM> are interconnected using a system bus <NUM>. The processor <NUM> is capable of processing instructions for execution within the system <NUM>. In one implementation, the processor <NUM> is a single-threaded processor. In another implementation, the processor <NUM> is a multi-threaded processor. The processor <NUM> is capable of processing instructions stored in the memory <NUM> or on the storage device <NUM> to display graphical information for a user interface on the input/output device <NUM>.

In various different implementations, the storage device <NUM> may be is a non-volatile memory unit, a floppy disk device, a hard disk device, an optical disk device, or a tape device.

The features described can be implemented in digital electronic circuitry, or in computer hardware, firmware, software, or in combinations of them. The apparatus can be implemented in a computer program product tangibly embodied in an information carrier, e.g., in a machine-readable storage device for execution by a programmable processor; and method steps can be performed by a programmable processor executing a program of instructions to perform functions of the described implementations by operating on input data and generating output. The described features can be implemented advantageously in one or more computer programs that are executable on a programmable system including at least one programmable processor coupled to receive data and instructions from, and to transmit data and instructions to, a data storage system, at least one input device, and at least one output device. A computer program is a set of instructions that can be used, directly or indirectly, in a computer to perform a certain activity or bring about a certain result.

Claim 1:
A computer-implemented method (<NUM>) for electric current control, comprising:
receiving (<NUM>) a first electrical current output setpoint (<NUM>);
identifying (<NUM>) a first operational condition based on the first electrical current output setpoint (<NUM>);
providing (<NUM>), based on the identified first operational condition, a first pulse width modulated, PWM, signal having a first predetermined duty cycle, wherein the first PWM signal is based on the first electrical current output setpoint (<NUM>), and is provided on a predetermined period;
receiving (<NUM>) a second electrical current output setpoint (<NUM>);
identifying (<NUM>) a second operational condition different from the first operational condition based on the second electrical current output setpoint (<NUM>), wherein identifying (<NUM>) the second operational condition is based on a minimum turn-off time of a switch (<NUM>) configured to transmit the PWM signal to a load; and
providing (<NUM>), based on the identified second operational condition, a second PWM signal having a second predetermined duty cycle, wherein the second PWM signal is based on the second electrical current output setpoint (<NUM>), and is provided on a predetermined multiple of the predetermined period.