Patent Description:
High-speed digital-to-analog converters (DACs) are commonly implemented with a complementary current signal. In one case, a transmitter DAC can be configured to feed a transmitter analog baseband filter (BBF) with a complementary current ranging from 0mA to 2mA (or <NUM> mA to <NUM>. 4mA) in full scale. The complementary current includes common-mode current and differential-mode current. However, it is desirable to prevent the common-mode current from flowing into the BBF.

<CIT>discloses a differential drive circuit including at least a first or second drive system. The first drive system has first and second field effect transistors, first and second resistors, and first and second circuits controlling the source voltages of the first and second field effect transistors to equal first and second drive target voltages, the first and second field effect transistors having sources connected to a power potential via the first and second resistors, respectively. The second drive system has third and fourth field effect transistors, third and fourth resistors, and third and fourth circuits controlling the source voltages of the third and fourth field effect transistors to equal third and fourth drive target voltages, the third and fourth field effect transistors having sources connected to a reference potential via the third and fourth resistors, respectively. A common-mode voltage is driven to form a constant differential signal across a load resistance.

<CIT> discloses a method for operating a radio frequency transmitter chain component, as is a radio frequency transmitter chain component that operates in accordance with the method. The method includes receiving an input signal to be mixed with a signal output from an oscillator, where the input signal is received through an operational amplifier. The method further includes applying an output of the operational amplifier to an input of a mixing circuit, rectifying the input signal to produce a rectified input signal and controlling a common-mode output voltage of the operational amplifier with the rectified input signal. The process varies the power consumption of the component in a manner that is proportional to a value of the input signal. A further step couples a mixer output signal to an input of a VGA. The component may include both the mixer and the VGA. The input signal and the mixer output signal may be differential signals.

The present disclosure provides for removing the common-mode current from the DAC complementary current signal and maintaining proper operational amplifier input bias voltage and linearity.

Other features and advantages of the present disclosure should be apparent from the present description which illustrates, by way of example, aspects of the disclosure.

The details of the present disclosure, both as to its structure and operation, may be gleaned in part by study of the appended further drawings, in which like reference numerals refer to like parts, and in which:.

Since the range of the complementary output currents of a digital-to-analog converter (DAC) is variable, the output currents can be used for controlling the gain of a transmitter signal path. As described above, the complementary DAC currents (I+/I- or Q+/Q-) include common-mode currents and differential-mode currents which can be expressed as follows: <MAT> <MAT> <MAT> <MAT>.

Further, the differential-mode currents flow into the baseband filter (BBF) and produce useful signal voltages since these currents carry modulation information. However, the common-mode currents flowing into the BBF feedback resistors may cause the input common-mode voltage to differ from the output common-mode voltage. Accordingly, it is desirable to prevent the DAC common-mode currents from flowing into the BBF and potentially causing high voltage at the BBF input.

Several embodiments as described herein provide for removing the common-mode currents from the DAC complementary current signal and maintaining proper operational amplifier input bias voltage and linearity. After reading this description it will become apparent how to implement the disclosure in various implementations and applications. Although various implementations of the present disclosure will be described herein, it is understood that these implementations are presented by way of example only, and not limitation. As such, this detailed description of various implementations should not be construed to limit the scope or breadth of the present disclosure.

<FIG> is an exemplary wireless device <NUM> communicating with a wireless communication system <NUM>. The wireless system <NUM> may be a Long Term Evolution (LTE) system, a Code Division Multiple Access (CDMA) system, a Global System for Mobile Communications (GSM) system, a wireless local area network (WLAN) system, or some other wireless system. A CDMA system may implement Wideband CDMA (WCDMA), CDMA 1X, Evolution-Data Optimized (EVDO), Time Division Synchronous CDMA (TD-SCDMA), or some other version of CDMA. For simplicity, FIG. 1A shows wireless system <NUM> including two base stations <NUM> and <NUM> and one system controller <NUM>. In general, a wireless system may include any number of base stations and any set of network entities.

The wireless device <NUM> may also be referred to as a user equipment (UE), a mobile station, a terminal, an access terminal, a subscriber unit, a station, etc. The wireless device <NUM> may be a cellular phone, a smartphone, a tablet, a wireless modem, a personal digital assistant (PDA), a handheld device, a laptop computer, a smartbook, a netbook, a cordless phone, a wireless local loop (WLL) station, a Bluetooth device, etc. The wireless device <NUM> may communicate with a wireless system <NUM>. The wireless device <NUM> may also receive signals from broadcast stations (e.g., a broadcast station <NUM>), signals from satellites (e.g., a satellite <NUM>) in one or more global navigation satellite systems (GNSS), etc. The wireless device <NUM> may support one or more radio technologies for wireless communication such as LTE, WCDMA, CDMA 1X, EVDO, TD-SCDMA, GSM, <NUM>, etc..

<FIG> is a block diagram of an exemplary design of a wireless device <NUM> that is one embodiment of a wireless device <NUM> of <FIG>. In this exemplary design, the wireless device <NUM> includes a transceiver <NUM> coupled to an antenna <NUM>, and a data processor/controller <NUM>. The transceiver <NUM> includes antenna interface circuit <NUM>, a receiver path <NUM>, and a transmitter path <NUM>. Antenna interface circuit <NUM> may include switches, duplexers, transmit filters, receive filters, matching circuits, etc. The data processor/controller <NUM> may perform various functions for the wireless device <NUM>. For example, the data processor/controller <NUM> may perform processing for data being received via the receiver path <NUM> and data being transmitted via the transmitter path <NUM>. The data processor/controller <NUM> may control the operation of various circuits within the transceiver <NUM>. Memory <NUM> may store program codes and data for the data processor/controller <NUM>. The data processor/controller <NUM> may be implemented on one or more application specific integrated circuits (ASICs) and/or other ICs. The receiver path <NUM> includes a low noise amplifier (LNA) <NUM>, a mixer <NUM>, a phase locked loop (PLL) <NUM>, and a baseband filter <NUM>. An analog-to-digital converter (ADC) <NUM> is placed subsequent to the baseband filter <NUM> to digitize the baseband signal. The transmitter path <NUM> includes a baseband filter <NUM>, a PLL <NUM>, a mixer <NUM>, a driver amplifier (DA) <NUM>, and a power amplifier (PA) <NUM>. A digital-to-analog converter (DAC) <NUM> is placed between the data processor/controller <NUM> and the baseband filter <NUM> to convert the digital data to the analog baseband signal. In the illustrated embodiment of <FIG>, the receiver path <NUM> includes PLL <NUM> and the transmitter path <NUM> includes PLL <NUM> to provide local oscillator signals to the mixer <NUM>, <NUM>. However, in other embodiments, both receiver path <NUM> and transmitter path <NUM> can use a single common PLL. In one embodiment, the baseband filters <NUM>, <NUM> are lowpass filters.

For data reception, antenna <NUM> receives signals from base stations and/or other transmitter stations and provides a received radio frequency (RF) signal, which is routed through an antenna interface circuit <NUM> and presented as an input RF signal to the receiver path <NUM>. Within the receiver path <NUM>, the LNA <NUM> amplifies the input RF signal and provides an output RF signal to the mixer <NUM>. The PLL <NUM> generates a local oscillator signal. The mixer <NUM> mixes the output RF signal with the PLL-generated local oscillator signal to downconvert the output RF signal from RF to baseband. The baseband filter <NUM> filters the downconverted signal to provide an analog input signal to the ADC <NUM>, which converts the analog input signal to the digital data and provides the digital data to the data processor/controller <NUM>. The receiver path <NUM> may include other elements such as matching circuits, an oscillator, etc..

For data transmission, the data processor/controller <NUM> processes (e.g., encodes and modulates) data to be transmitted and provides a digital data to the DAC <NUM>, which converts the digital data to an analog output signal and provides the converted analog output signal to the transmitter path <NUM>. Within the transmitter path <NUM>, the baseband filter <NUM> amplifies and filters the analog output signal. The PLL <NUM> generates a local oscillator signal. The mixer <NUM> mixes the filtered analog output signal with the PLL-generated local oscillator signal to upconvert the filtered analog output signal from baseband to RF and provide a modulated RF signal. The transmitter path <NUM> may include other elements such as matching circuits, an oscillator, etc. The DA <NUM> and PA <NUM> receives and amplifies the modulated RF signal and provides a transmit RF signal having the proper output power level. The transmit RF signal is routed through antenna interface circuit <NUM> and transmitted via antenna <NUM>.

<FIG> is a detailed schematic diagram of a common-mode current removing unit <NUM> coupled to a baseband filter (BBF) <NUM> receiving complementary DAC currents from a DAC <NUM> in accordance with one embodiment of the present disclosure. In the illustrated embodiment of <FIG>, the diagram includes a DAC <NUM>, a BBF <NUM>, and a common-mode current removing unit <NUM>. In operation, the DAC <NUM> supplies the complementary currents (e.g., I+ and I-), each of which includes common-mode current (Icm) and differential-mode current (Idm) (see equations (<NUM>) and (<NUM>) shown above). The BBF <NUM> includes an op amp <NUM>, feedback resistors <NUM>, <NUM>, and feedback capacitors <NUM>, <NUM>. The op amp <NUM> includes an embedded common mode feedback sensor <NUM> which measures the difference between the output common-mode voltage (provided by common mode resistors <NUM>, <NUM> each having value Rcm) and the common-mode reference voltage (Vcm_ref).

In the illustrated embodiment of <FIG>, the common-mode current removing unit <NUM> is configured to remove the common-mode current from each of the complementary DAC currents (e.g., I+ and I-). The common-mode current removing unit <NUM> includes a generator unit <NUM>, a pair of current removing units <NUM>, <NUM>, and a measurement unit configured with an operational amplifier (op amp) <NUM>. In one embodiment shown in <FIG>, the generator unit <NUM> includes a pair of resistors <NUM>, <NUM> which are configured to generate a common-mode voltage of the pair of complementary current signals. In operation, op amp <NUM> measures the difference between the input common-mode voltage (Vcm_input) provided at the positive input terminal of op amp <NUM> by common mode resistors <NUM>, <NUM> (each having value Rcm) and the common-mode reference voltage (Vcm_ref) provided at the negative input terminal of op amp <NUM>. Op amp <NUM> then drives the pair of current removing units <NUM>, <NUM> to remove or sink the common-mode current (Icm) from each of the complementary DAC currents I+ and I_, respectively.

In one embodiment, the common-mode current removing unit <NUM> can be generalized as a circuit for removing common-mode current from a pair of complementary current signals, which includes a generator unit <NUM>, a pair of first and second current removing units <NUM>, <NUM>, and a measurement unit <NUM>. The generator unit <NUM> is configured to generate a common-mode voltage of the pair of complementary current signals (including first (I+) and second (I-) current signal) input to a filter (e.g. BBF <NUM>). The measurement unit <NUM> is configured to measure and output a difference signal between the common-mode voltage (Vcm_input) generated by the generator unit <NUM> and a common-mode reference voltage (Vcm_ref). The difference signal at the output of the measurement unit <NUM> drives the first current removing unit <NUM> to remove the common-mode current from the first current signal (I+) and drives the second current removing unit <NUM> to remove the common-mode current from the second current signal (I_).

<FIG> is a detailed schematic diagram of a common-mode current removing unit <NUM> in accordance with one aspect of the present disclosure. In the illustrated aspect of <FIG>, the generator unit <NUM> including resistors <NUM>, <NUM> generates a common-mode input voltage (Vcm_input) of the pair of complementary current signals (<NUM>+ and I-). In other aspect, the generator unit <NUM> is configured with elements other than resistors such as field-effect transistor (FET) resistors, inductors, or capacitors. The measurement unit configured as an op amp <NUM> measures the difference between the input common-mode voltage (Vcm_input) and the common-mode reference voltage (Vcm_ref). In an alternative embodiment, the op amp <NUM> can be replaced with any element(s) that is capable of measuring the difference between the input common-mode voltage and common-mode reference voltage. Thus, in one example, a transistor-based comparator can be used to measure the difference.

In <FIG>, the op amp <NUM> drives the field-effect transistors <NUM> and <NUM> to remove or sink the common-mode current (Icm) from each of the complementary current signals I+ and I-, respectively. Thus, by driving the gates of the transistors <NUM>, <NUM> with a difference signal between the common-mode voltage on the complementary signal lines and the common-mode reference voltage, the current removed by the transistors <NUM>, <NUM> is proportional to the difference signal. Accordingly, the amount of current removed is substantially equal to the common-mode current (Icm) in the complementary current signals.

<FIG> is a detailed schematic diagram of a common-mode current removing unit <NUM> coupled to a baseband filter (BBF) <NUM> receiving complementary DAC currents from a DAC <NUM> in accordance with another embodiment of the present disclosure. In the illustrated embodiment of <FIG>, the diagram includes a DAC <NUM>, a BBF <NUM>, and a common-mode current removing unit <NUM>. The DAC <NUM> supplies the complementary currents (e.g., I+ and I-), each of which includes common-mode current and differential-mode current (see equations (<NUM>) and (<NUM>)). The BBF <NUM> includes an op amp <NUM>, feedback resistors <NUM>, <NUM>, and feedback capacitors <NUM>, <NUM>. The op amp <NUM> includes an embedded common mode feedback sensor <NUM> which measures the difference between the output common-mode voltage (provided by common mode resistors <NUM>, <NUM> each having value Rcm) and the common-mode reference voltage (Vcm_ref).

In the illustrated embodiment of <FIG>, the common-mode current removing unit <NUM> is configured to remove the common-mode current from each of the complementary DAC currents (e.g., I+ and I-). In the common-mode current removing unit <NUM>, two resistors <NUM> and <NUM> (each having same value Rcm) are configured to remove or sink the common-mode current (Icm) from each of the complementary DAC currents I+ and I-, respectively. Therefore, resistor <NUM> is configured to sink common-mode current Icm from DAC current I+, while resistor <NUM> is configured to sink common-mode current Icm from DAC current I-. The values of the resistors <NUM>, <NUM> are selected based on the common-mode reference voltage to draw the desired amount of common-mode current from the DAC current.

The configuration of the common-mode current removing unit <NUM>, <NUM> as described above provides several advantages. For example, the configuration provides flexible DAC output current range, keeps ideal bias voltage for the op amp of the baseband filter, saves transmitter signal path current in the presence of high DAC common-mode DC current, tolerates large DAC current variation for transmitter gain control, and improves harmonic distortion in the filter.

Although several embodiments of the disclosure are described above, many variations of the disclosure are possible. Further, features of the various embodiments may be combined in combinations that differ from those described above. Moreover, for clear and brief description, many descriptions of the systems and methods have been simplified. Many descriptions use terminology and structures of specific standards. However, the disclosed systems and methods are more broadly applicable.

Those of skill will appreciate that the various illustrative blocks and modules described in connection with the embodiments disclosed herein can be implemented in various forms. Some blocks and modules have been described above generally in terms of their functionality. How such functionality is implemented depends upon the design constraints imposed on an overall system. Skilled persons can implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosure. In addition, the grouping of functions within a module, block, or step is for ease of description. Specific functions or steps can be moved from one module or block without departing from the disclosure.

The various illustrative logical blocks, units, steps, components, and modules described in connection with the embodiments disclosed herein can be implemented or performed with a processor, such as a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general-purpose processor can be a microprocessor, but in the alternative, the processor can be any processor, controller, microcontroller, or state machine. A processor can also be implemented as a combination of computing devices, for example, a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration. Further, circuits implementing the embodiments and functional blocks and modules described herein can be realized using various transistor types, logic families, and design methodologies.

Claim 1:
A system comprising a circuit for removing common-mode current from a pair of complementary current signals (I+, I-), and a baseband filter (<NUM>), wherein the pair of complementary current signals (I+, I-) is an output from a digital-to-analog converter, DAC, (<NUM>) and is an input to the baseband filter (<NUM>), the baseband filter (<NUM>) comprising an operational amplifier (<NUM>), feedback resistors (<NUM>, <NUM>) and feedback capacitors (<NUM>, <NUM>), the circuit comprising:
a generator unit (<NUM>) configured to generate a common-mode voltage of the pair of complementary current signals (I+, I-) comprising at least a first current signal and a second current signal;
a measurement unit (<NUM>) configured to measure and output a difference voltage configured to remove the common-mode current from the first current signal and the second current signal, wherein the difference voltage is based on a difference between the common-mode voltage generated by the generator unit and a common-mode reference voltage (Vcm_ref); and
first and second current removing units (<NUM>, <NUM>) connected to the output of the DAC, the first and second removing units (<NUM>, <NUM>) configured to receive a respective one of the first current signal and the second current signal output from the DAC,
wherein the difference voltage of the measurement unit (<NUM>) is configured to drive the first current removing unit (<NUM>) to remove the common-mode current from the first current signal, and drive the second current removing unit (<NUM>) to remove the common-mode current from the second current signal, thereby preventing the common-mode current from the first and second current signal from flowing into the baseband filter (<NUM>),
wherein the baseband filter (<NUM>) is configured to receive the common-mode reference voltage (Vcm_ref), wherein the common-mode reference voltage is used as a comparison value to the output common-mode voltage of the baseband filter (<NUM>) in an embedded common-mode feedback sensor in an operational amplifier (<NUM>) of the baseband filter (<NUM>).