Patent Description:
Integrated circuits for measuring a current by means of sensing a magnetic field generated by a current flow are known in the field. An advancing degree of device miniaturization and cost reduction, however, leads to increased current densities, related ohmic losses, and heat dissipation that require careful consideration of the circuit design on the one hand and a good trade-off between maximization of the sensed magnetic field strength and sufficient voltage insulation between the current carrying conductor and the sensing circuitry, as well as connected external circuitry, on the other hand.

Both flip-chip assemblies implementing insulation barriers in a wafer postprocessing step and die-up configurations with insulation barriers have been described in prior art. The former solution needs a specifically conceived redistribution layer to connect to the input and output connectors of the die to the pins of the package. Very thin lead fingers are required for a good input/output count, hence a custom leadframe design and an extra etching step are provided for this approach, and a careful alignment of fingers belonging to a secondary portion of the leadframe with respect to the flipped die establishes the electrical coupling between die and leadframe. The latter solution is more flexible having regard to the assembly of leadframe and die as wire bonding techniques can be used, but the signal weakness at the sensing element is a disadvantage of die-up configurations. Good voltage insulation can be achieved with ceramic interposers as insulation barriers, but these are not readily available during wafer postprocessing but are provided only during assembly. Therefore, there is a need for integrated current sensing circuits that provide good voltage insulation and signal strength, without adding additional assembly steps.

<CIT>) discloses a Hall effect sensing element and a method of manufacture thereof, wherein the Hall effect sensing element comprises a Hall plate having a thickness less than about <NUM> and an adhesion layer that is in direct contact with the Hall plate and having a thickness value ranging from about <NUM>,<NUM> to <NUM>. A sensor including the Hall effect sensing element is also described, wherein the Hall effect sensing element further contains a substrate comprising one of a semiconductor material or an insulator material and an insulation layer in direct contact with the substrate and the adhesion layer. An improved sensitivity of the Hall sensing element is obtained. However, using the Hall effect sensing element in an integrated current sensor with good electrical insulation requires the additional, separate steps of applying an insulating layer to a substrate and adhering the Hall plate to the insulation layer.

<CIT>) discloses a current sensing method and device with reduced frequency-dependent measurement uncertainties due to disturbances induced by the primary current, such as eddy currents generated in adjacent current conductors, skin effect, proximity effect. The disturbances are found to compensate at least partially over a frequency range at the position of measuring the magnetic field if a cross-sectional area and shape and a material of n primary conductors, and their distances to adjacent metal parts and corresponding magnetic field sensing devices are selected purposefully. The arrangement of the different conductor, magnetic field sensing elements and metal parts into a single device is a complex process and the disclosure is not dealing with the issue of improved electrical insulation.

In <CIT>), a magnetic current sensor is provided as a packaged integrated circuit. The magnetic current sensor comprises a die with at least three magnetic sense elements arranged on its first surface, a conductor, and an electrically isolating layer between the die and the conductor. The conductor has at least one slot formed in it. To obtain electrical isolation, an isolating film has to be applied to the wafer top side in one embodiment, or an isolating die attach tape or adhesive is provided in other embodiments, involving an additional manufacturing step.

In <CIT>), a thin-wafer IC current sensor and a method are disclosed which minimize drawbacks of wafer dicing, such as stress effects and defects. The thin-wafer IC current sensor includes a current conductor, a thin-wafer semiconductor chip, at least one magnetic field sensing element on a surface of the semiconductor chip and an isolation layer between the current conductor and the semiconductor chip for galvanic isolation. Providing the isolation layer between the current conductor and the semiconductor chip constitutes an additional step of the fabrication process.

In <CIT>), system and methods are described that are directed towards the integration of a shield layer into a current sensor for shielding the sensor from transient noise of external or internal noise sources. The current sensor comprises a conductor in contact with an insulation layer and a semiconductor substrate with a shield layer on a surface thereon that is proximal to the insulation layer. A magnetic field sensing element is supported by the substrate. Providing the insulation layer between the conductor and the semiconductor substrate constitutes an additional step of the fabrication process. A conductive shield in contact with the semiconductor substrate is generally required to be held at a reference potential of the magnetic field sensing element to not damage it.

It is an object of embodiments of the present invention to provide a reliable current sensing device suitable for sensing high currents of up to at least <NUM> A (rms) and <NUM> A (peak) while withstanding and insulating voltages up to at least 3kV, and a method for manufacturing such current sensing device.

The above objective is accomplished by a device and method in accordance with embodiments of the present invention.

In a first aspect, the present invention provides a circuit, e.g. an integrated circuit, for sensing current. The circuit comprises:.

wherein the substrate comprises a first insulation layer positioned between and away from the first major surface and the second major surface such that it is substantially buried in the substrate. The substrate material on either side of the first insulation layer is a semiconductor material, i.e., the substrate is a semiconductor-insulator-semiconductor (SOI) substrate, e.g., a silicon-insulator-silicon substrate, wherein the insulator forms the first insulation layer. It is an advantage to use such substrate, as semiconductor on insulator processing, e.g. silicon on insulator processing, is a mature technique.

With the first insulation layer being substantially buried in the substrate is meant that most, e.g. more than <NUM>%, more than <NUM>%, more than <NUM>% or all of its outward directed substance is interfacing a substrate material. In embodiments of the present invention, the first insulation layer may be completely buried in the substrate.

The first insulation layer may be fabricated during a wafer process, hence a cost-effective, reliable, and scalable, buried layer with high quality may be obtained. The first insulation layer can be thin. The required thickness of the buried insulation layer depends on the voltages that will be applied, and may correspond to about <NUM> per 500V. Hence for applications of about 2kV, the insulation layer thickness can be about <NUM>, but for applications up to 60V much lower insulation layer thicknesses are needed. No extra die attach layer for an interposer is required. Advantageously, strong currents are measurable at low risk.

In embodiments of the present invention, the at least one first insulation layer may be a buried insulating oxide layer or a buried insulating nitride layer. Silicon oxide, for example, has very good insulating properties. A nitride passivation layer also has good insulating properties, and moreover is good for moisture protection.

In a circuit according to embodiments of the present invention, the substrate may be an integrated sensor die.

In a particular configuration, the SOI substrate may comprise a semiconductor layer, a buried insulation layer and an EPI layer. In the EPI layer, at least two Hall plates, or at least two groups of Hall plates with their outputs connected in parallel, may be provided as magnetic field sensing element.

In embodiments of the present invention, the SOI substrate may be coupled to a reference potential, e.g. may be grounded, for instance by making use of a through-substrate via (TSV).

A circuit according to embodiments of the present invention may further comprise an external insulation layer positioned between the second major surface and the current conductor. For instance, in case of an SOI substrate as indicated above, an external insulation layer, for instance a voltage insulation tape, may be provided between the semiconductor layer of the SOI substrate and the current conductor. Such external insulation layer provides an additional protection for high current applications. Furthermore, such external insulation layer forms a second reinforcement layer. It can be deposited on the substrate or on the leadframe, or it can be placed in between both, e.g. by attachment layers. A circuit according to embodiments of the present invention may for instance comprise an insulating tape coupled to the second major surface of the substrate. This insulating tape may be used to physically attach the substrate to a current conductor, such as for instance to the leadframe.

A circuit according to embodiments of the present invention may further comprise a leadframe comprising a primary and a secondary portion, the primary and secondary portion each comprising a plurality of leads, wherein at least two of the leads of the primary portion of the leadframe are electrically connected to each other to form a current conductor. Many leads may be connected to support current to be measured, thus wider connection pads may be obtained, having lower resistivity and less heat dissipation.

In such a circuit according to embodiments of the present invention, at least two magnetic field sensing elements may be provided, at least one at each side of the current conductor, to measure the magnetic field. These sensors are advantageously used in inverted polarity so that an external magnetic field may be cancelled out.

In a circuit according to embodiments of the present invention, a thickness of the substrate may be reduced in the vicinity of the at least one magnetic field sensing element. Reducing the substrate thickness decreases the distance between the current conductor and the sensing element for increasing sensor sensitivity, for instance for obtaining better SNR.

In a circuit according to embodiments of the present invention, a cavity may be formed at the second major surface and in the vicinity of the at least one magnetic field sensing element. This way, a locally thin membrane may be formed for even more reduced distance and better sensitivity, without, however, losing structural support. The cavity may comprise chamfered side walls and/or straight side walls. The cavity may lock the conductor in place when aligning the leadframe with the substrate, without damaging the membrane.

In a circuit according to embodiments of the present invention, the first insulation layer may be partially exposed at the second major surface. This may be obtained by removing all the extra substrate at the backside, even if wafer is already thinned.

In particular embodiments of the present invention, both with SOI-types of substrate or with other substrates, the current conductor may comprise a flat section and a protruding section, the flat section extending in a plane parallel to the second major surface, and the protruding section extending out of said plane and into the cavity. Such conductor geometry enables a closer placement of the conductor and the sensing element. It is easily obtainable by deformation or stamping.

In a circuit according to particular embodiments of the present invention, the die only overlaps the primary portion of the leadframe in a plan view parallel to the first major surface. This means that the substrate may be resting only on the primary portion of the leadframe, without overlapping the secondary portion of the leadframe in a plan view parallel to the first major surface. This configuration enables smaller dies resting on the primary leadframe portion, thus smaller cost per die. Furthermore, longer primary/secondary distances are possible, which provides better insulation.

In a circuit according to embodiments of the present invention, the at least one magnetic field sensing element may be electrically coupled to the secondary portion of the leadframe, for instance via wire bonding. Wire bonding is a more flexible process than vias: wires are easier to place and assemble, the alignment tolerance is much more relaxed, longer wires are available, and less die processing steps are required.

In a circuit according to embodiments of the present invention, the substrate may further comprise at least one second insulation layer positioned between the first major surface and the second major surface, such that it is buried in the substrate and not touching the first insulation layer. This way, increased insulating properties are obtained, for instance for high current applications and/or operating voltages/spikes. A substrate material located between the first insulation layer and the second insulation layer may be electrically grounded. This grounded substrate material then forms an electrostatic shield, which avoids capacitive coupling of dV/dt transients from the primary conductor.

In a circuit according to embodiments of the present invention, the substrate may further comprise an insulating circumferential wall adjacent to its rim, the insulating wall extending transversely from the first insulation layer.

A circuit according to embodiments of the present invention may further comprise at least one flux concentrating magnetic layer arranged on the first major surface. This allows a local concentration of magnetic field lines, and thus a better sensitivity and SNR.

In a circuit according to embodiments of the present invention, the at least one magnetic field sensing element may be implemented in a foreign material which is electrically connected to the semiconductor material of the substrate. This way, high responsivity materials may be used for the sensing element.

In a circuit according to embodiments of the present invention, the at least one magnetic field sensing element may be a printed magnetic field sensing element. This is an easy and low-cost method for integration of magnetic field sensing elements.

A circuit according to embodiments of the present invention may form an integrated current sensor, whereby for instance all bits and pieces of the circuit are over-moulded in a single package.

In a second aspect, the present invention provides a method of manufacturing a device for measuring a current. The method comprises:.

A method according to embodiments of the present invention may further comprise providing a current conductor and physically coupling the current conductor to the second major surface.

In a method according to embodiments of the present invention, providing a current conductor may comprise:.

It is an advantage of this embodiment that the leadframe can be thick for better etching results. It is an advantage of this embodiment that the leadframe can be thick for better etching results.

A method according to embodiments of the present invention may further comprise the step of etching a cavity into the semiconductor substrate, the cavity being etched at the second major surface and in the vicinity of the at least one magnetic field sensing element. In accordance with embodiments of the present invention, etching can be wet or dry etching for controlling a side wall angle of the cavity. A method according to embodiments of the present invention may further comprise the step of filling the cavity with a low partial discharge susceptible silicone gel. The silicone may act as a sealing agent, as a thermal and electrical insulator, and/or as an adhesive.

In a method according to embodiments of the present invention, coupling said current conductor to the second major surface may include applying a conductive paste between the current conductor and the second major surface. This may provide improved adhesion, less heat, and/or a more uniform current flow at target distance.

A method according to embodiments of the present invention may further comprise the step of applying, at a pre-determined distance from the rim of the semiconductor substrate, a deep trench insulation process to the semiconductor substrate. This provides better intrinsic insulation with respect to other circuitry, thus enabling formation of a larger and/or more powerful device.

The invention will now be described further, by way of example, with reference to the accompanying drawings, in which:.

Moreover, directional terminology such as top, bottom, front, back, under, over and the like in the description and the claims is used for descriptive purposes with reference to the orientation of the drawings being described, and not necessarily for describing relative positions. Because components of embodiments of the present invention can be positioned in a number of different orientations, the directional terminology is used for purposes of illustration only, and is in no way intended to be limiting, unless otherwise indicated. It is, hence, to be understood that the terms so used are interchangeable under appropriate circumstances and that the embodiments of the invention described herein are capable of operation in other orientations than described or illustrated herein.

It should be noted that the use of particular terminology when describing certain features or aspects of the invention should not be taken to imply that the terminology is being re-defined herein to be restricted to include any specific characteristics of the features or aspects of the invention with which that terminology is associated.

A component or element arranged, provided, or formed on a surface, e.g. an electronic element arranged or formed on a substrate surface, may either be arranged, provided, or formed on top of that surface, the surface being a support for the component or element, or may be arranged, provided, or formed in such a way that it is in contact with that surface and is part of that surface but can, at the same time, extend into regions immediately below or above that surface.

In the context of the present invention, an insulation layer is considered substantially buried in a substrate if most of its outward directed substance is interfacing a substrate material. This includes two cases: a first one in which an insulation layer is completely buried in a substrate, meaning that all of its outward directed substance is interfacing a substrate material, and a second one in which a small amount of outward directed substance is interfacing a material not being part of the substrate. For the second case it is still true that where a volume of the substrate is defined, the insulation layer is buried in this volume, meaning that it is interfacing a substrate material everywhere in this volume. A small volume of the substrate may be removed such that another material is substituting the substrate material, e.g. air in a cavity formed in the substrate. In the context of the present invention, an insulation layer may be considered as being substantially buried in a substrate if the perimeter of the insulation layer is sandwiched within the substrate at both sides. In particular embodiments, an insulation layer may be considered as being substantially buried in a substrate if more than <NUM>%, for instance more than <NUM> % of its outward directed substance is interfacing a substrate material.

An embodiment in accordance with a first aspect of the invention is now described with reference to <FIG>, which is showing a schematic cross-sectional view of a circuit <NUM> suitable for sensing a current. The circuit <NUM>, which is preferably an integrated circuit, comprises a substrate <NUM> which may be coupled to a current conductor <NUM>. Two major surfaces <NUM>, <NUM>, opposite to each other, are defined for the substrate <NUM>. A first major surface <NUM> of the substrate <NUM> may be a top surface, and the second major surface <NUM> may be the bottom surface of the substrate <NUM>. On, on top, or in the first major surface <NUM>, at least one magnetic field sensing element <NUM> is arranged at a straight distance <NUM> from the current conductor <NUM>, provided that the current sensing circuit <NUM> is properly mounted thereon. The second major surface <NUM> may then be physically coupled to the current conductor <NUM>; for the example shown in <FIG>, a portion of the bottom side of the substrate <NUM> is attached to the current conductor <NUM> via an attachment layer <NUM>. A first insulation layer <NUM> is substantially buried inside the substrate <NUM>. For this particular embodiment, the first insulation layer <NUM> is completely buried in the substrate <NUM>, meaning that the first insulation layer <NUM> is positioned between the first and the second major surfaces <NUM>, <NUM> such that it is interfacing a substrate material <NUM>, <NUM> on either side.

Without being limited to an embodiment as shown in <FIG>, a current conductor <NUM> may be a portion of leadframe which provides the input and output terminals to the current sensing circuit <NUM>, e.g. input and output access to a standard packaged integrated circuit, such as QFN, SOIC, etc., which are surface mountable to a printed circuit board and have a small footprint. The leadframe may be implemented in copper, but other metals suitable for conducting a current are also usable. For example, the current conductor <NUM> may be formed as a primary portion of the leadframe, a secondary and other portions of the leadframe being electrically insulated from the primary portion for the packaged circuit. In some embodiments of the invention, the leadframe comprises a plurality of leads in both a primary portion and a secondary portion <NUM>, and a current conductor <NUM> may be obtained by electrically connecting at least two of these leads belonging to the primary portion. This has the advantage that a contacting surface can be increased such that ohmic losses at this contact surface are minimized. It also reduces local heating of the contacting leads that form the current conductor <NUM> and leads to a lower risk of heat induced failure of the current sensing circuit <NUM>. Especially in the case of miniaturized, integrated current sensing circuits, high current densities are the result of reduced cross-sectional areas of the leads or the current conductor inside the integrated circuit and elevated currents that are to be measured, e.g. currents higher than <NUM> A, higher than <NUM> A, higher than <NUM> A, higher than <NUM> A, even up to <NUM> A, e.g. currents between <NUM> A and <NUM> A, such as between <NUM> A and <NUM> A. The current conductor <NUM> may be physically coupled to the substrate <NUM> in a direct or an indirect manner. For some embodiments of the invention, an indirect coupling may be provided by means of an attachment layer <NUM> as shown in <FIG>. A non-limiting example of an attachment layer <NUM> may be or may comprise an insulating tape, an adhesive film, an adhesive polymer film, or glue. In embodiments of the invention for which leads belonging to the secondary portion <NUM> of the leadframe are used as output terminals, of which <FIG> is an example, the at least one magnetic field sensing element <NUM> is electrically coupled to one or more leads of the second portion <NUM> of the leadframe. A suitable electrical coupling may be achieved by providing one or more bond pads <NUM> on the first major surface <NUM> of the substrate <NUM> and wire-bonding them, with a thin wire connection <NUM>, e.g. a thin gold wire, to the one or more leads belonging to the secondary portion <NUM>. Long wire connections <NUM> are feasible such that the substrate <NUM> is only resting on the primary portion of the leadframe and therefore does not need to overlap, in a plan view parallel to the first major surface <NUM>, with a secondary portion <NUM> of the leadframe. Therefore smaller, more compact substrates <NUM>, e.g. smaller area semiconductor dies, may be used for an integrated current sensing circuit which decreases the manufacturing cost per device. Moreover, it is possible to maintain a longer distance between the primary and the secondary portion of the leadframe which improves the insulation properties of the circuit <NUM>, for example larger clearance and creepage distances. The one or more bond pads <NUM> are typically connected to outputs of signal processing circuitry on the active side of the sensor substrate (e.g. semiconductor die) for further processing a signal transduced by the at least one magnetic field sensing element <NUM>. The circuit <NUM> is typically an integrated, packaged one, meaning that the substrate <NUM>, the leadframe, and possible electrical connections between the substrate <NUM> and the secondary portion <NUM> of the leadframe are encapsulated into a housing <NUM>. A housing <NUM> may be provided as a hardened polymer, e.g. a solidified thermoset polymer in an injection molding process for which the substrate <NUM>, the leadframe, and possible electrical connections between the substrate <NUM> and the secondary portion <NUM> of the leadframe are placed into a molding cavity. Such a housing <NUM> confers additional structural strength to the circuit <NUM>, protects the electronics from contaminants like moisture, dust particles, etc., and also protects the user of possible harm. The housing also results in higher insulation, and increases the creepage and clearance compared to a similar case where the housing would not be present. For improved heat dissipation in high current sensing applications, the entire leadframe, or only a portion thereof, may be exposed to a surrounding medium at the bottom of the housing <NUM>, e.g. may be exposed to air or to a heat sinking metal or paste, and may additionally be made thicker to better resist the heat generated therein. However, the encapsulation of the circuit into a housing <NUM> is only an optional feature of the invention and does not have to be present in other embodiments.

The substrate <NUM> typically has a flat and thin body. The substrate may be a semiconductor-on-insulator, for instance a silicon-on-insulator substrate. The substrate may for instance have a thickness of less than <NUM>, e.g. less than <NUM>, such as less than <NUM>. Of course, the actual thickness of the substrate <NUM> depends on the thickness of the buried insulation layer, hence of the intended application of the device. A thin substrate reduces the straight distance <NUM> between the at least one magnetic field sensing element <NUM> and the current conductor <NUM>, which increases the signal seen by the current sensing circuit <NUM>. In general, the substrate <NUM> is provided as a semiconductor substrate, e.g. a die cut from a wafer. For example, silicon or germanium substrates, or other suitable semiconductor substrates may be selected for the substrate <NUM>. Providing the substrate <NUM> as a semiconductor die as the result of a wafer process is an attractive solution in terms of mass manufacturing capabilities, repeatability, reliability, and manufacturing costs. The substrate <NUM> includes a first insulation layer <NUM>, which is substantially incorporated into its body volume, and is typically required to have a high degree of purity, smooth material interfaces, and to be free of defects. Non-limiting examples of a buried, first insulation layer <NUM> are nitride or oxide layers of a semiconductor material, e.g. a silicon oxide layer or a silicon nitride layer. A substrate material <NUM>, <NUM> on either side of the first insulation layer <NUM> may be the same material, e.g. crystalline silicon, or may be a different material or the same material in a different phase, e.g. the top silicon <NUM> may have a stronger dopant concentration than the lower silicon <NUM>, or the top silicon <NUM> may be amorphous, whereas the lower silicon <NUM> is crystalline. Moreover, the top surface of the upper substrate material <NUM> is typically modified in some areas so as to implement electronic circuits in it. The lower substrate material <NUM> may be thinned in some embodiments of the invention, for instance, if the substrate <NUM> is a semiconductor die of a wafer, the wafer may undergo a wafer back-thinning process, e.g. by grinding and etching, so as to reduce the material thickness at a wafer back side, thus reducing the final thickness of the semiconductor die. One example of a substrate <NUM> including a first insulation layer <NUM>, as shown in <FIG>, may be a germanium-on-insulator or silicon-on-insulator substrate. An exemplary silicon-on-insulator substrate may be obtained by a controlled oxygen ion implantation process followed by an annealing step, by direct re-growth of a thin silicon layer on an oxidized silicon layer using seeding techniques, by wafer bonding techniques using, for instance, surface oxidized silicon wafers bonded onto a silicon handling wafer, etc. Therefore, the first insulation layer <NUM> may be implemented and substantially buried in a dielectric material that withstands high voltages without breakdown, e.g. a silicon oxide layer. Particularly miniaturized, e.g. small form factor integrated current sensing devices, are increasingly confronted with the problem of increased current densities which lead to elevated operative voltages (e.g. more than <NUM> kV, e.g. at least <NUM> kV ) under which the current sensing device still has to function in a reliable and safe way. Even a thin first, substantially buried insulation layer <NUM> is providing a substantial degree of insulation of the current sensing circuit <NUM> with respect to the high operating voltage ranges (e.g. up to <NUM> kV or more) in the current conductor <NUM> if it is formed as a dielectric material layer with high electrical breakdown voltage characteristics, e.g. a defect-free, crack-free, and uniform buried silicon oxide layer. Therefore, an electrical breakdown voltage for the current sensing device is determined by the insulating properties of the first insulation layer which insulates from each other the first major surface <NUM> and the second major surface <NUM>. An insulating property which is typically reported is the breakdown voltage, which, in the present case of a substantially buried insulation layer, depends on the insulation layer dielectric material, density, quality, thickness, interfaces, etc. Besides, the first insulation layer <NUM> is efficiently blocking possible leakage currents extending into the substrate <NUM> from its second major surface <NUM>, e.g. its bottom side. Leakage currents may be caused by aging, temperature induced stresses, microcracks during packaging, the application of overrated voltages at the current conductor <NUM>, etc..

In embodiments of the invention, the at least one magnetic field sensing element <NUM> may be a sensing element based on the Hall-effect, e.g. planar or vertical Hall plates of variable shape, such as circular, wedged, polygonal, etc. The at least one magnetic field sensing element <NUM> may be implemented in different materials, e.g. Si, Ge, GaAs, InGaAs, InSb, InAs, InP, other materials from the III-V compound semiconductor group, or any other suitable material. It could be deposited by using micro-transfer printing techniques in some embodiments of the invention. Yet, alternative, non-limiting choices for the at least one magnetic field sensing element <NUM> are offered by magnetotransistors or magnetoresistive sensing elements exploiting the giant magnetoresistance (GMR), the colossal magnetoresistance (CMR), the tunnel magnetoresistance (TMR), the extreme magnetoresistance (xMR), or the anisotropic magnetoresistance (AMR) of some materials. One or more magnetic field sensing elements <NUM> provided as a foreign material may be transferred, e.g. by printing, or attached to the first major surface <NUM> and electrically connected to electronic circuits also formed on the first major surface <NUM> of the substrate <NUM>, e.g. on the first major surface <NUM> of a semiconductor substrate. Magnetic flux concentrating layers may be locally applied in some embodiments of the invention. These flux concentrators are typically applied to the first major surface <NUM> of the substrate <NUM>, in vicinity to the at least one magnetic field sensing element <NUM> so as to locally concentrate the magnetic flux density in this region. This advantageously increases the sensitivity and signal-to-noise ratio of the current sensing circuit <NUM>. Magnetic flux concentrating layers, e.g. layers of ferromagnetic materials, may also be used to redirect magnetic field lines in close proximity to the at least one magnetic field sensing element <NUM> so as to optimize its relative position to the magnetic field lines generated by the current conductor <NUM>, and therefore optimize its responsivity, e.g. so as to have magnetic field lines traversing a planar Hall plate sensing element in near ninety degree angles. More than one magnetic field sensing element <NUM> may be arranged on the first major surface <NUM>, for example two or three magnetic field sensing elements may be provided, so as to enable differential measurements between almost identical magnetic field sensing elements. This is advantageous for calibration and accuracy of the current sensing circuit <NUM> as external magnetic fields, interfering with the generated magnetic field during the current measurement, can now be compensated for.

In operation, a current source, or a voltage source inducing a current flow, is connected to the current conductor <NUM>, e.g. via leads belonging to the primary portion of the leadframe. The current flowing through the current conductor <NUM> generates a constant or varying magnetic field, depending on whether the current flowing is a constant current or an alternating current. This magnetic field is characterized by magnetic field lines that wind in loops around the current conductor <NUM>, thus extending into regions of the substrate <NUM> away from the current conductor <NUM>. The at least one magnetic field sensing element <NUM> detects the magnetic field generated and transduces it into an electrical signal, e.g. a voltage signal, whose amplitude is proportional to the magnetic field strength under non-saturating conditions. A transduced electrical signal may be directly output from the magnetic field sensing element <NUM>, e.g. by directing it to one or more leads of the secondary portion <NUM> of the leadframe via suitable bond pads <NUM>, wire connections <NUM>, etc., or may be processed before being output. Processing steps may be carried out by suitable signal processing circuitry which is also formed in the substrate <NUM>, e.g. the semiconductor substrate, and which is adjacent to the magnetic field sensing element <NUM> to which it is connected. Pre-amplification, filtering, analog-to-digital conversion, modulation/demodulation, chopping, multiplexing/demultiplexing, sample/hold, averaging, correlated double sampling, output conversion to PWM signals, ratiometric signals, or encoded signal suitable for transmission in accordance with a protocol, etc., all constitute examples of processing steps.

<FIG> illustrates an embodiment of the invention which includes first and second insulation layers <NUM>, <NUM>, not in direct contact with each other and completely buried inside a substrate <NUM> of a circuit <NUM>, e.g. an integrated sensor die. Substrate materials <NUM>, <NUM>, <NUM> on either sides of the two insulation layers <NUM>, <NUM> may be the same, e.g. a semiconductor material, e.g. silicon, or may differ, e.g. a silicon bottom and intermediate material <NUM>, <NUM>, and a germanium top material <NUM>, or may be similar but of different phases or doping levels. The first and second insulation layers <NUM>, <NUM> may be buried oxide or nitride layers of a substrate material, e.g. buried silicon oxide or silicon nitride layers. As an example, two buried silicon oxide layers in a silicon substrate may be obtained by oxygen ion implantation on both sides of the silicon substrate, i.e. on its first and second major surfaces <NUM>, <NUM>, followed by an annealing step. A straight distance <NUM> from the current conductor <NUM> to the at least one magnetic field sensing element <NUM> of substrate <NUM> may be the same as the straight distance <NUM> with regard to substrate <NUM>, may be reduced, or may be increased. A straight distance <NUM> may be reduced so as to increase the magnetic field strength at the at least one sensing element <NUM>, and hence the sensitivity of the current sensing circuit <NUM>. This reduction may not negatively impact the insulating properties between the two major surfaces <NUM>, <NUM> of the substrate <NUM>, as the second insulation layer <NUM> provides reinforced electrical insulation. For this particular embodiment, an electrical breakdown voltage for the current sensing device is not solely determined by the insulating properties (e.g. electrical breakdown voltage) of the first insulation layer <NUM>, but also by the insulating properties of the at least one second insulation layer <NUM>. As an example of reinforced electrical insulation, one may consider the case of partial discharges negatively affecting the insulating properties of a substantially buried, second insulation layer <NUM>. The presence of the first insulation layer <NUM> then still guarantees good electrical insulation with respect to a strong potential difference (e.g. <NUM> kV or more, e.g. up to 3kV) between the two functional major surfaces <NUM>, <NUM> - one being coupled to the high voltage current conductor <NUM>, the other one carrying the sensitive low voltage electronic circuits. A straight distance <NUM> may be increased for current sensing applications for which the generated magnetic field strength are well above a detection limit, e.g. sensing high electrical currents exceeding <NUM> A, e.g. currents up to <NUM> A (rms) and <NUM> A (peak). Then the reinforced insulation of the substrate <NUM> may be increased by providing thicker insulation layers <NUM>, <NUM>, at the expense of lowering the sensitivity of the integrated circuit by a small amount. In all of the embodiments of the invention, an additional external insulation layer may be applied between the current conductor <NUM> and the substrate <NUM>, <NUM> for obtaining supplementary insulation, e.g. an externally applied insulation layer comprised by an attachment layer <NUM>, e.g. an insulating tape. A particular advantage of providing two insulation layers <NUM>, <NUM> and an intermediate substrate material <NUM> placed between them is that the intermediate substrate material <NUM> can be electrically grounded, e.g. by TSV connections providing conductive channels through one or both insulation layers. This means that, even in the event of failure of the second insulation layer <NUM>, leaking charges that accumulate at an interface between the intermediate substrate material <NUM> and the first insulation layer <NUM> can be efficiently removed whereby a risk of electrical shock or damage of the current sensing circuit <NUM> is greatly reduced.

<FIG> is a schematic perspective view of a part of a current sensing circuit, e.g. an integrated circuit, and <FIG> is a schematic cross-section (along the line IV-IV) thereof. The numerous details brought forth in <FIG> have already been described in respect of foregoing embodiments, except for a protruding section <NUM> of the current conductor <NUM> and for a cavity <NUM> formed at the second major surface <NUM> of the substrate. Forming a cavity <NUM> in vicinity of the at least one magnetic field sensing element <NUM> has the advantage of locally thinning the substrate whereby a straight distance <NUM>, <NUM> between the current conductor <NUM> and the at least one magnetic field sensing element <NUM> is reduced, which increases the signal seen by the current sensing integrated circuit. An alternative way of thinning the substrate and reducing a straight distance <NUM>, <NUM> between the current conductor <NUM> and the at least one magnetic field sensing element <NUM> is the partial, removal of substrate material <NUM> at the second major surface <NUM> of the substrate, e.g. by grinding, polishing, etching, etc. For embodiments in which the substrate is provided as a semiconductor die, this may be achieved in a wafer back side thinning process. The formation of the cavity <NUM> has the advantage that the reduction of a substrate thickness is only obtained locally, whereas the remainder of the substrate is unaffected and ensures the structural integrity of the substrate as a whole, e.g. avoids breaking or cracking of the already thin substrate during handling, assembly, and stress tests. In some embodiments of the invention, the cavity <NUM> is formed such that the at least one first insulation layer <NUM> is partially exposed at the bottom of the cavity <NUM> and accessible through the second major surface <NUM>. Yet, the first insulation layer <NUM> is still substantially buried in the remaining volume of the substrate. In cases for which there is more than one, e.g. more than the first insulation layer <NUM> in the substrate, i.e. there exists at least a second insulation layer <NUM>, the insulation layer which is located closest to the second major surface <NUM> may be partially exposed at the bottom of the cavity <NUM>. In other embodiments, the cavity <NUM> does not reach all the way through the substrate material <NUM> such that a substantially buried insulation layer is not exposed, e.g. forms a completely buried insulation layer. For some embodiments of the invention, a cavity <NUM> may be obtained at the second major surface <NUM> by chemical etching an opening into the substrate material <NUM>, e.g. by dry etching, wet etching, plasma etching, etc. If a dry etching process is used to form the cavity <NUM>, very steep cavity side walls that are substantially forming ninety degree angles with the second major surface <NUM> can be obtained.

In preferred embodiments of the invention, the current conductor <NUM> is formed to have a flat section, e.g. as a flat stripe, extending in a plane parallel to the second major surface <NUM> whereby a good coupling to the second major surface <NUM> can be obtained. The protruding section <NUM> is projecting out of a plane defined by the flat section of the current conductor <NUM> and is positioned with respect to the substrate such that it extends into the cavity <NUM>. This configuration of the current conductor <NUM> allows to position the current conductor <NUM> at an even closer straight distance to the at least one magnetic field sensing element <NUM>. This increases the sensitivity of the integrated circuit without removing or thinning an insulation layer. It also facilitates the positioning of the current conductor <NUM> with respect to the at least one magnetic field sensing element <NUM>. For a better responsivity and sensitivity of the current sensing circuit, and less offset compensation requirements due to positional asymmetries between the current conductor <NUM> and one or more magnetic field sensing elements <NUM>, a very accurate and precise positioning of the current conductor <NUM> during assembly of the current sensing circuit, e.g. at the time of coupling the current conductor <NUM> to the substrate, is mandatory. Embodiments of the invention which include the cavity <NUM> and a protruding section <NUM> have the advantage that the protruding section <NUM> may be easily locked into the cavity <NUM> as long as the relative dimensions are selected accordingly.

In some embodiments of the invention, the protruding section <NUM> of the current conductor <NUM> may be obtained by means of a stamping tool. In alternative embodiments, the protruding section <NUM> of the current conductor <NUM> may be obtained by means of etching an initially thick leadframe, or a thick primary portion, everywhere except for a portion protected from etching which corresponds to the protruding section <NUM> after finishing the etch.

At the time the integrated circuit is assembled, a thin layer of conductive paste <NUM> may be provided between the current conductor <NUM> and the second major surface <NUM> for some embodiments of the invention, as shown, for instance, in <FIG>. The conductive paste may be part of the attachment layer <NUM>. A thin layer of conductive paste <NUM> may improve the overall adhesion of the current conductor <NUM> with respect to the substrate, and it may also conduct excess heat away from the current conductor. Additionally, a more uniform current flow at a targeted straight distance between the current conductor <NUM> and the at least one magnetic field sensing element <NUM> may be the result of a smoother attachment interface, e.g. by smoothing out surface defects and roughness, or non-planar surface portions of the current conductor <NUM>. Therefore, a current can be measured more accurately by the current sensing circuit.

<FIG> illustrates a cross-section that is similar to the one shown in <FIG>, but which has chamfered cavity <NUM> side walls. A cavity <NUM> having chamfered side walls has a bigger cross-sectional area at the side of the second major surface <NUM> and a smaller cross-sectional area at its bottom part. This may facilitate even more the introduction of the protruding section <NUM> into the cavity <NUM>. Furthermore, it is an advantage of a cavity <NUM> having chamfered side walls that the substrate can rest on and being supported by the primary portion of the leadframe, by virtue of the protruding section <NUM> abutting on the chamfered side walls of the cavity <NUM>, as illustrated in <FIG>, without damaging the insulation layer, or more generally damaging the thin membrane comprising thinned substrate material <NUM>, the first insulation layer <NUM>, and other substrate material <NUM>. Damaging the first insulation layer <NUM> would negatively affect the insulation strength of the substrate and the current sensing circuit (e.g. integrated current sensor) as a whole. In other embodiments of the invention, the substrate may rest on and be supported by the flat section of the current conductor <NUM>, as depicted in <FIG>, thereby providing a larger and more robust support area.

In some embodiments of the invention, the cavity <NUM> may be partially or completely filled by a low partial discharge susceptible silicone gel before the substrate is physically coupled, e.g. attached by an attachment layer <NUM>, to the current conductor <NUM>. This is protecting the first insulation layer <NUM> because silicone acts as an insulator and sealing agent at the same time, preventing moisture and reactants from slowly degrading the one or more substantially buried insulation layers. In a synergic effect, silicone gel also provides good thermal and electrical insulation, and is a good adhesive. Temperature fluctuations at the at least one magnetic field sensing element <NUM> caused by a heating of the current conductor <NUM> may require regular recalibration of the (integrated) current sensing circuit to not impact the accuracy of the current measurement, and therefore, may be avoided by providing good heat sinking means and good thermal insulation of the at the at least one magnetic field sensing element <NUM>. In this respect, the first insulation layer <NUM>, e.g. a buried silicon dioxide layer, may also provide good thermal insulation means.

Claim 1:
A circuit (<NUM>, <NUM>) for sensing current, the circuit comprising:
- a substrate (<NUM>, <NUM>) having a first and a second major surface (<NUM>, <NUM>), the second major surface (<NUM>) being opposite to the first major surface (<NUM>), and the substrate (<NUM>, <NUM>) comprising a first insulation layer (<NUM>) positioned between and away from the first major surface (<NUM>) and the second major surface (<NUM>) such that it is substantially buried in the substrate (<NUM>, <NUM>);
- at least one magnetic field sensing element (<NUM>) arranged on said first major surface (<NUM>) of the substrate (<NUM>, <NUM>) and suitable for sensing a magnetic field caused by a current flow in a current conductor (<NUM>) coupled to the second major surface (<NUM>);
characterized in that the substrate (<NUM>, <NUM>) is a semiconductor-insulator-semiconductor substrate, wherein the insulator forms the first insulation layer (<NUM>).