Patent Description:
This application also relates to the following U. patent applications: <CIT>, and titled "ALE SMOOTHNESS: IN AND OUTSIDE SEMICONDUCTOR INDUSTRY" and <CIT>, and titled "DESIGNER ATOMIC LAYER ETCHING," for their disclosures relating to atomic layer etching of refractory metals.

Semiconductor fabrication processes include etching of various materials. As feature sizes shrink, there is a growing need for atomic scale processing such as Atomic Layer Etch, ALE.

<NPL>, discloses atomic layer etching of Al2O3 using BCI3/Ar for the interface passivation layer of III-V MOS devices.

<NPL>, discloses predicting synergy in atomic layer etching.

Etch processes that yield smooth, in at least some cases extremely smooth, etch front and line edge for refractory metals and other high surface binding energy materials, and in some cases improved selectivity to surrounding materials, are disclosed. Certain Atomic Layer Etch, ALE, processes have been demonstrated on refractory metals such as Mo, Ta and Ru, and could be used to process a variety of materials composed of grains. While ALE can be used for directional pattern transfer to produce smooth metal lines, it can also be applied for other purposes. For example, it is desired for both reliability and device electrical performance, to provide conformal liners (e.g., diffusion barrier or adhesion promoting layer) that are continuous, smooth and atomically thin. If, for example, an as-deposited liner is thicker and/or rougher than desired as deposited, ALE etchback may be utilized to appropriately thin and smooth the liner at the same time, thereby providing the desired result.

According to a first aspect of the present invention there is provided a method as specified in claim <NUM>.

The method may optionally be as specified in any one of claims <NUM> to <NUM>.

These and other aspects of this disclosure are further described in the detailed description that follows, including with reference to the figures.

In the following description, numerous specific details are set forth to provide a thorough understanding of the presented embodiments. The disclosed embodiments may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail to not unnecessarily obscure the disclosed embodiments. While the disclosed embodiments will be described in conjunction with the specific embodiments, it will be understood that it is not intended to limit the disclosed embodiments.

Etching processes often involve exposing a material to be etched to a combination of etching gases to remove the material. However, such removal may in some cases etch more than desired, or result in an undesirable feature profile. As feature sizes shrink, there is a growing need for atomic scale processing.

Some reactive ion etch, RIE, regimes are known to improve line width roughness (LWR) of sidewalls, however rarely less than <NUM>. Moreover, at the etch front in RIE, stochastic behavior forming the selvage layer tends to roughen the surface on a similar scale to <NUM>. There are many proposed mechanisms for why RIE would roughen the surface, including stochastic effects, ion-scattering, and micro-masking. These mechanisms kinetically hinder flattening of the surface, which would be thermodynamically favorable due to lower surface tension.

Smooth etch lines are increasingly desirable to help meet electric requirements for advanced semiconductor manufacturing. As feature size continues to shrink, the critical dimension of metals lines reaches the sub-<NUM> regime. However metals have a crystalline grain structure. Reactive ion etching typically has a faster reaction rate at grain boundaries than on the crystalline grains themselves. This preferential etch at the metal grain boundaries generates line edge roughness that causes variation and increases resistivity of metal contact lines.

Etch processes that yield smooth, in at least some cases extremely smooth (e.g., up to <NUM>% or more, <NUM>% or more, <NUM>% or more, <NUM>% or more, <NUM>% or more, or <NUM>% or more root mean square, RMS, smoother than pre-etch surface roughness) etch front and line edge for refractory metals and other high surface binding energy materials, and in some cases improved selectivity to surrounding materials, are disclosed. Certain Atomic Layer Etch, ALE, processes have been demonstrated on refractory metals such as Mo, Ta and Ru, and could be used to process a variety of materials composed of grains. While ALE can be used for directional pattern transfer to produce smooth metal lines, it can also be applied for other purposes. In this regard, it is desired for both reliability and device electrical performance, to provide conformal liners (e.g., diffusion barrier or adhesion promoting layer) that are continuous, smooth and atomically thin. If, for example, an as-deposited liner is thicker and/or rougher than desired as deposited, ALE etchback may be utilized to appropriately thin and smooth the liner at the same time, thereby providing the desired result.

ALE is a multi-step process used in advanced semiconductor manufacturing (e.g. technology node < <NUM>) for the blanket removal or pattern-definition etching of ultra-thin layers of material with atomic scale in-depth resolution and control. ALE is a technique that removes thin layers of material using sequential self-limiting reactions. Examples of atomic layer etch techniques are described in <CIT> and <CIT>.

The concept of an "ALE cycle" is relevant to the discussion of various embodiments herein. Generally an ALE cycle is the minimum set of operations used to perform an etch process one time, such as etching a monolayer. The result of one cycle is that at least some of a film layer on a substrate surface is etched. Typically, an ALE cycle includes a modification operation to form a modified layer, followed by a removal operation to remove or etch only this modified layer. The cycle may include certain ancillary operations such as sweeping, or purging, one of the reactants or byproducts. Generally, a cycle contains one instance of a unique sequence of operations. As an example, an ALE cycle may include the following operations: (i) delivery of a modification gas, (ii) purging of the reactant gas from the chamber, (iii) delivery of a removal gas and an optional plasma, and (iv) purging of the chamber. In some embodiments, etching may be performed nonconformally, including such that the resulting surface may be smoother, including much smoother, than the starting surface.

<FIG> shows two example schematic illustrations of an ALE cycle. Diagrams 171a-171e show a generic ALE cycle. In 171a, the substrate is provided. In 171b, the surface of the substrate is modified. In 171c, the next step is prepared. In 171d, the modified layer is being etched. In 171e, the modified layer is removed. Similarly, diagrams 172a-172e show an example of an ALE cycle for etching a refractory metal film. In 172a, an exposed Ru film surface on a substrate is provided, which includes many Ru metal atoms. In 172b, modification gas, for example including oxygen gas, introduced to the substrate modifies the Ru metal surface of the substrate. The schematic in 172b shows that some modification gas is adsorbed onto the surface of the substrate as an example. Although oxygen is depicted in <FIG>, a suitable oxygen-containing compound that forms volatile species with the metal atom may be used. In other embodiments, chlorine or suitable chlorine-containing gas that forms volatile species with the metal atom, may be used, or a combination of oxygen and chlorine gases, or suitable oxygen- and chlorine-containing gases, may be used to advantage with particular refractory metals, as further described below. In 172c, the modification gas is purged from the chamber. In 172d, a removal gas such as an inert gas including nitrogen, argon, neon, helium, or combinations thereof, for example argon, is introduced with a plasma, forming argon ions (energetic particles) as indicated by the Ar+ plasma species and arrows, and anisotropic ion bombardment is performed to remove the modified refractory metal surface of the substrate. During this operation, a bias is applied to the substrate to attract ions toward it. In 172e, the chamber is purged and the byproducts are removed.

A cycle may only partially etch about <NUM> to about <NUM> of material, or between about <NUM> and about <NUM> of material, or between about <NUM> and about <NUM> of material, or between about <NUM> and about <NUM> of material, or between about <NUM> and about <NUM> of material, or between about <NUM> and about <NUM> of material. The amount of material etched in a cycle may depend on the purpose of etching in a self-limiting manner. In some embodiments, a cycle of ALE may remove less than a monolayer of material.

ALE process conditions, such as chamber pressure, substrate temperature, plasma power, frequency, and type, and bias power, depend on the material to be etched, the composition of the gases used to modify the material to be etched, the material underlying the material to be etched, and the composition of gases used to remove the modified material.

ALE involves splitting the etch process into two (or more) separate operations: modification (operation A) and removal (operation B). For example, the modification operation modifies the surface layer so that it can be removed easily during the removal operation. A thin layer of material is removed per cycle, where a cycle includes modification and removal, and the cycle can be repeated until the desired depth is reached. Synergy means that favorable etching occurs due to interaction of operations A and B. In ALE, operations A and B are separated in either space or time.

Favorable atomic layer etching occurs due to the interaction of operations A and B, and the following "ALE synergy" metric is used to quantify the strength and impact of the synergistic interaction. ALE synergy is calculated by: <MAT> where EPC ("etch per cycle") is the thickness of substrate material removed in one ALE cycle, typically averaged over many cycles, and A and B are contributions to the EPC from the stand-alone modification and removal operations, respectfully, measured as reference points by performing these operations independently.

Synergy is a test that captures many aspects of ALE behavior, and is well-suited to compare different ALE conditions or systems. It is an underlying mechanism for why etching in operation B stops after reactants from operation A are consumed. It is therefore responsible for the self-limiting behavior in ALE benefits such as aspect ratio independence, uniformity, smoothness, and selectivity.

Disclosed embodiments are structured to achieve an ALE process with high synergy - the ideal being an ALE process with synergy being <NUM>%. This ideal may not be possible to achieve in all cases given practical considerations such as the accessible range of process conditions, wafer throughput requirements, etc. However, tolerance for synergy less than the ideal of <NUM>% will depend on the application and the technology node, and presumably each successive technology generation will demand higher levels of ideality.

Disclosed embodiments for designing an ALE process with high synergy is based on achieving a hierarchical relationship between energies that characterize an overall ALE process and the energy barriers that are overcome to achieve etch with synergy close to <NUM>%.

EO, Emod, and Edes are determined by properties of the material to be etched and the reactant.

EO is the surface binding energy of the unmodified material and is the cohesive force that keeps atoms from being removed from the surface.

Emod (sometimes Eads) is the adsorption barrier to modify the surface and arises from the need to dissociate reactants or reorganize surface atoms.

Edes is the desorption barrier, the energy used to remove a by-product from the modified surface.

Disclosed embodiments are suitable for performing ALE of refractory metals, including Mo, Ta and Ru. While W has long been integrated and studied in a semiconductor processing contexts, including our recent work on tungsten ALE removal and smoothing, ALE of other refractory metals has not to date been addressed to any significant extent. Anisotropic, or directional, ALE, in particular, is shown herein to provide advantageous smoothing, including extreme smoothing, results on refractory metals not previously studied to significant extent. Other high surface binding energy materials may also benefit from ALE processing as described.

Refractory metals are good candidates for ALE because they have high Eo. As further explained in "<NPL> and <NPL>. As explained therein, high Eo materials are expected to do well in terms of high synergy and self-limiting ALE. Excellent candidate ALE elemental materials with EO > <NUM> eV include C, along with refractory metals, such as Ta, Mo, and Ru, for example. Other high surface binding energy (high EO) materials include oxides such as Al<NUM>O<NUM>, In<NUM>O<NUM>, MgO, SnO, Ta<NUM>O<NUM>, TiO<NUM> and ZrO<NUM>; carbides such as BC, SiC and WC; nitrides such as BN, TaN, TiN; sulfides such as ZnS and MoS<NUM>; and superconductors such as YBCO. While materials with high EO (e.g., refractory metals and diamond) are known for resistance to heat, wear, and etching, the analysis indicates that when such materials are etched with ALE, it is more controllable (i.e., more ideal due to higher synergy).

Embodiments can be used to develop new or improved unit or integrated processes as well as standalone or clustered hardware for semiconductor processing or other applications. The methodology can be implemented with appropriate computer software for offline use or embedded in a process tool for recipe development, process qualification, or process control. In the following discussion, examples are provided for ALE resulting in smoothing, in some cases unexpected extreme smoothing, of molybdenum (Mo), ruthenium (Ru) and Tantalum, for example by more than <NUM>% RMS, more than <NUM>%, more than <NUM>%, more than <NUM>%, or more than <NUM>%, more than <NUM>%, more than <NUM>%, as much as <NUM>% or more, <NUM>% or more, or <NUM>% RMS or more, on the order of an order of magnitude increase in smoothness (decrease in roughness) from the initial film surface roughness.

Within one ALE cycle the reaction rate on the surface has been found to have been equalized, without differentiating grain boundaries from grains. This leads to technical advantages, including:.

Results show that ALE can produce an even smoother surface than that on which etching began. Unexpectedly, the effect can be particularly dramatic, producing extreme smoothing, for example more than <NUM>% RMS, more than <NUM>%, more than <NUM>%, more than <NUM>%, more than <NUM>%, or more than <NUM>%; such as for the <NUM>% smoothening after <NUM> cycles of Ru ALE using O<NUM> as the modification gas and Ar plasma for removal (<NUM> RMS roughness to <NUM>), as seen in <FIG> depicts scanning electron microscope (SEM) images of, on the left, an incoming substrate surface with visible damage, roughness, or grain boundaries that are all reduced by ALE, on the right, in accordance with an embodiment of this disclosure.

Suitable modification gas chemistry can react to form a volatile compound. Thermal desorption temperature measurements can usefully be referenced. Suitable modification gases can include O<NUM>, Cl<NUM>, BCl<NUM>, H<NUM> and CF<NUM>. For example, O<NUM> has been shown to be effective for etching and smoothing C, and to provide extreme smoothing of Ru; Cl<NUM> has been shown to be effective for etching and smoothing of Ta and W; and mixtures of Cl<NUM> and O<NUM> have been shown to be effective for etching and smoothing of Mo. And BCl<NUM>, H<NUM> and CF<NUM> are effective with the oxides.

In many instances, high synergy, for example greater than <NUM>%, or above <NUM>%, enhances smoothing.

Suitable conditions can be in the range of:.

Additional data is presented in <FIG>, showing a comparison of the ALE results obtained for Ru smoothing in accordance with an embodiment of this disclosure compared to other etch processes and chemistries. <FIG> shows a plot of etch per cycle, EPC, as a function of Ar bias for a Ru substrate for O<NUM>/Ar ALE as described herein, compared to other etch processes and chemistries. <FIG> shows SEM plot of the corresponding substrate surfaces, incoming, O<NUM> reactive ion etch (RIE) alone, Ar sputtering alone, and O<NUM>/Ar ALE. Both O<NUM> RIE and Ar sputtering alone resulted in rougher surfaces, while O<NUM>/Ar ALE resulted in a much smoother surface.

While this disclosure is not limited by any particular theory of operation, it is believed this smoothening phenomenon may be due to high-synergy self-limiting ALE processes, and there could be multiple reasons why the smoothening is so extreme. In the ALE modification operation, a small radius of curvature has higher reactivity which could preferentially etch sharp corners; a corner can bond to <NUM> to <NUM> modification gas atoms instead of <NUM> to <NUM> on flat or concave surfaces. Furthermore, in the ALE removal operation inert ions in the absence of reactants can smooth surfaces by amorphization of the top ~<NUM> of the surface, which promotes diffusion of surface atoms. In contrast, in RIE, diffusion is hindered by strong bonds of etch species (e.g., Cl) attached to the crystal structure of the material to be etched.

The resulting ultra-smooth a nanoscopic metal films would be expected to have decreased electrical resistivity due to less electron scattering at its surface, and might be able to be etched very thin while still keeping continuous to make a better barrier metal taking up less volume in a tiny 3D feature. In addition to the evident semiconductor processing applications, there may also be applications beyond the semiconductor industry.

Another example is Ta ALE in which an about <NUM>% reduction in surface roughness has been achieved (<NUM> to <NUM> RMS).

Still another example relates to smoothing via a ALE process that can also achieve high selectivity. Such a process has been demonstrated with Mo utilizing an O<NUM>/Cl<NUM> modification chemistry, as described and depicted in <FIG> and <FIG>. <FIG> shows that a Cl<NUM>/Ar ALE process maintains the initial Mo surface roughness prior to ALE. <FIG> shows that Cl<NUM> and O<NUM> modification mixture chemistries show <NUM>-<NUM> times faster etch rate of Mo blanket films compared to Cl<NUM> only or O<NUM> only modification chemistries. Also, a <NUM>% O<NUM>/<NUM>% Cl<NUM> modification chemistry provided a high degree (><NUM>:<NUM>) of etch selectivity relative to SiO<NUM> dielectric (compared to just <NUM>:<NUM> for <NUM>% Cl<NUM> modification chemistry).

Such processes may be extended to other refractory metals or to other high surface binding energy (high EO) materials to, depending on the specific metal and process conditions, provide ultra-smoothening with high etch rate and/or high selectivity with respect to a mask material (e.g., an ashable amorphous carbon hard mask). The chemistry could be a suitably chosen admixture of oxidizing/chlorinating species. For example, a very high O<NUM>/Cl<NUM> ratio or even <NUM>% O<NUM> could be used for Ru; and a very low O<NUM>:Cl<NUM> ratio could be used for Mo (e.g., <NUM>% O<NUM>/<NUM>% Cl<NUM>).

<FIG> shows a flow chart of a method of etching a refractory metal or other high EO material on a substrate in accordance with this disclosure. At <NUM> a substrate having an exposed refractory metal/high EO material surface is provided. At <NUM> the refractory metal/high EO surface is exposed to a modification gas to modify the surface and form a modified refractory metal surface. At <NUM> the modified refractory metal/high EO surface is exposed to an energetic particle to preferentially remove the modified refractory metal/high EO surface relative to an underlying unmodified refractory metal/high EO surface such that the exposed refractory metal / high EO surface after removing the modified refractory metal/high EO surface is as smooth or smoother than the substrate surface before exposing the substrate surface to the modification gas. The modification and removal operations may be followed by purging <NUM>, <NUM> of the process chamber, and are generally repeated until the desired level of etch and/or smoothness is achieved.

Inductively coupled plasma, ICP, reactors which may be suitable for atomic layer etching,ALE, operations are now described. Such ICP reactors have also described in <CIT>, and titled "IMAGE REVERSAL WITH AHM GAP FILL FOR MULTIPLE PATTERNING,". Although ICP reactors are described herein, it should be understood that capacitively coupled plasma reactors may also be used.

<FIG> schematically shows a cross-sectional view of an inductively coupled plasma etching apparatus <NUM> appropriate for implementing the method of etching the materials disclosed herein, an example of which is a Kiyo™ reactor, produced by Lam Research Corp. of Fremont, CA. The inductively coupled plasma apparatus <NUM> includes an overall process chamber <NUM> structurally defined by chamber walls <NUM> and a window <NUM>. The chamber walls <NUM> may be fabricated from stainless steel or aluminum. The window <NUM> may be fabricated from quartz or other dielectric material. An optional internal plasma grid <NUM> divides the overall processing chamber <NUM> into an upper sub-chamber <NUM> and a lower sub-chamber <NUM>. The plasma grid <NUM> may be removed, thereby utilizing a chamber space made of sub-chambers <NUM> and <NUM>. A chuck <NUM> is positioned within the lower sub-chamber <NUM> near the bottom inner surface. The chuck <NUM> is configured to receive and hold a semiconductor wafer <NUM> upon which the etching and deposition processes are performed. The chuck <NUM> can be an electrostatic chuck for supporting the wafer <NUM> when present. An edge ring (not shown) surrounds chuck <NUM>, and has an upper surface that is approximately planar with a top surface of a wafer <NUM>, when present over chuck <NUM>. The chuck <NUM> also includes electrostatic electrodes for chucking and dechucking the wafer. A filter and DC clamp power supply (not shown) may be provided for this purpose. Other control systems for lifting the wafer <NUM> off the chuck <NUM> can also be provided. The chuck <NUM> can be electrically charged using an RF power supply <NUM>. The RF power supply <NUM> is connected to matching circuitry <NUM> through a connection <NUM>. The matching circuitry <NUM> is connected to the chuck <NUM> through a connection <NUM>. In this manner, the RF power supply <NUM> is connected to the chuck <NUM>.

Elements for plasma generation include a coil <NUM> is positioned above window <NUM>. In some cases, a coil is not used. The coil <NUM> is fabricated from an electrically conductive material and includes at least one complete turn. The example of a coil <NUM> shown in <FIG> includes three turns. The cross-sections of coil <NUM> are shown with symbols, and coils having an "X" extend rotationally into the page, while coils having a "•" extend rotationally out of the page. Elements for plasma generation also include an RF power supply <NUM> configured to supply RF power to the coil <NUM>. In general, the RF power supply <NUM> is connected to matching circuitry <NUM> through a connection <NUM>. The matching circuitry <NUM> is connected to the coil <NUM> through a connection <NUM>. In this manner, the RF power supply <NUM> is connected to the coil <NUM>. An optional Faraday shield <NUM> is positioned between the coil <NUM> and the window <NUM>. The Faraday shield <NUM> is maintained in a spaced apart relationship relative to the coil <NUM>. The Faraday shield <NUM> is disposed immediately above the window <NUM>. The coil <NUM>, the Faraday shield <NUM>, and the window <NUM> are each configured to be substantially parallel to one another. The Faraday shield may prevent metal or other species from depositing on the dielectric window of the plasma chamber <NUM>.

Process gases (e.g. chlorine, argon, oxygen, etc.) may be flowed into the processing chamber <NUM> through one or more main gas flow inlets <NUM> positioned in the upper chamber <NUM> and/or through one or more side gas flow inlets <NUM>. Likewise, though not explicitly shown, similar gas flow inlets may be used to supply process gases to a capacitively coupled plasma processing chamber. A vacuum pump, e.g., a one or two stage mechanical dry pump and/or turbomolecular pump <NUM>, may be used to draw process gases out of the process chamber <NUM> and to maintain a pressure within the process chamber <NUM>. For example, the pump may be used to evacuate the chamber <NUM> during a purge operation of ALE. A valve-controlled conduit may be used to fluidically connect the vacuum pump to the processing chamber <NUM> so as to selectively control application of the vacuum environment provided by the vacuum pump. This may be done employing a closed-loop-controlled flow restriction device, such as a throttle valve (not shown) or a pendulum valve (not shown), during operational plasma processing. Likewise, a vacuum pump and valve controlled fluidic connection to the capacitively coupled plasma processing chamber may also be employed.

During operation of the apparatus, one or more process gases may be supplied through the upper gas flow inlets <NUM> and/or side gas flow inlets <NUM>. The process gas may be supplied only through the main upper gas flow inlet <NUM>, or only through the side gas flow inlet <NUM>. In some cases, the gas flow inlets shown in the figure may be replaced more complex gas flow inlets, one or more showerheads, for example. The Faraday shield <NUM> and/or optional grid <NUM> may include internal channels and holes that allow delivery of process gases to the chamber <NUM>. Either or both of Faraday shield <NUM> and optional grid <NUM> may serve as a showerhead for delivery of process gases. A liquid vaporization and delivery system may be situated upstream of the chamber <NUM>, such that once a liquid reactant or precursor is vaporized, the vaporized reactant or precursor is introduced into the chamber <NUM> via upper gas flow inlet <NUM> and/or side flow gas inlet <NUM>. Example liquid precursors include SiCl<NUM> and silicon amides.

Radio frequency power is supplied from the RF power supply <NUM> to the coil <NUM> to cause an RF current to flow through the coil <NUM>. The RF current flowing through the coil <NUM> generates an electromagnetic field about the coil <NUM>. The electromagnetic field generates an inductive current within the upper sub-chamber <NUM>. The physical and chemical interactions of various generated ions and radicals with the wafer <NUM> selectively etch features of and deposit layers on the wafer.

If the plasma grid is used such that there is both an upper sub-chamber <NUM> and a lower sub-chamber <NUM>, the inductive current acts on the gas present in the upper sub-chamber <NUM> to generate an electron-ion plasma in the upper sub-chamber <NUM>. The optional internal plasma grid <NUM> limits the amount of hot electrons in the lower sub-chamber <NUM>. The apparatus is designed and operated such that the plasma present in the lower sub-chamber <NUM> is an ion-ion plasma.

Both the upper electron-ion plasma and the lower ion-ion plasma may contain positive and negative ions, though the ion-ion plasma will have a greater ratio of negative ions to positive ions. Volatile etching and/or deposition byproducts may be removed from the lower sub-chamber <NUM> through port <NUM>. The chuck <NUM> disclosed herein may operate at temperatures ranging between about -<NUM> and about <NUM> or between about -<NUM> and about <NUM> for processing a substrate to etch tantalum, the chuck <NUM> may be set at a temperature less than about <NUM>. The temperature will depend on the process operation and specific recipe and the tool used.

Chamber <NUM> may be coupled to facilities (not shown) when installed in a clean room or a fabrication facility. Facilities include plumbing that provide processing gases, vacuum, temperature control, and environmental particle control. These facilities are coupled to chamber <NUM>, when installed in the target fabrication facility. Additionally, chamber <NUM> may be coupled to a transfer chamber that allows robotics to transfer semiconductor wafers into and out of chamber <NUM> using typical automation.

A system controller <NUM> (which may include one or more physical or logical controllers) controls some or all of the operations of a processing chamber. The system controller <NUM> may include one or more memory devices and one or more processors. In some implementations, the apparatus includes a switching system for controlling flow rates and durations. The apparatus may have a switching time of up to about <NUM>, or up to about <NUM>. Switching time may depend on the flow chemistry, recipe chosen, reactor architecture, and other factors.

In some implementations, a controller <NUM> is part of a system, which may be part of the above-described examples. Such systems can comprise semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and/or specific processing components (a wafer pedestal, a gas flow system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing of a semiconductor wafer or substrate. The electronics may be referred to as the "controller," which may control various components or subparts of the system or systems. The controller <NUM>, depending on the processing parameters and/or the type of system, may be programmed to control any of the processes disclosed herein, including the delivery of processing gases, temperature settings (e.g., heating and/or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and/or load locks connected to or interfaced with a specific system.

Broadly speaking, the controller <NUM> may be defined as electronics having various integrated circuits, logic, memory, and/or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and/or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions communicated to the controller in the form of various individual settings (or program files), defining operational parameters for carrying out a particular process on or for a semiconductor wafer or to a system. The operational parameters may be part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and/or dies of a wafer.

The controller <NUM>, in some implementations, may be a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller may be in the "cloud" or all or a part of a fab host computer system, which can allow for remote access of the wafer processing. The computer may enable remote access to the system to monitor current progress of fabrication operations, examine a history of past fabrication operations, examine trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process. In some examples, a remote computer (e.g. a server) can provide process recipes to a system over a network, which may include a local network or the Internet. The remote computer may include a user interface that enables entry or programming of parameters and/or settings, which are then communicated to the system from the remote computer. In some examples, the controller <NUM> receives instructions in the form of data, which specify parameters for each of the processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control. Thus as described above, the controller <NUM> may be distributed, such as by comprising one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes would be one or more integrated circuits on a chamber in communication with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) that combine to control a process on the chamber.

Without limitation, example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an ALD chamber or module, an ALE chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and/or manufacturing of semiconductor wafers.

As noted above, depending on the process step or steps to be performed by the tool, the controller might communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of wafers to and from tool locations and/or load ports in a semiconductor manufacturing factory.

<FIG> depicts a semiconductor process cluster architecture with various modules that interface with a vacuum transfer module <NUM> (VTM). The arrangement of transfer modules to "transfer" wafers among multiple storage facilities and processing modules may be referred to as a "cluster tool architecture" system. Airlock <NUM>, also known as a loadlock or transfer module, is shown in VTM <NUM> with four processing modules 820a-820d, which may be individual optimized to perform various fabrication processes. By way of example, processing modules 820a-820d may be implemented to perform substrate etching, deposition, ion implantation, wafer cleaning, sputtering, and/or other semiconductor processes. One or more of the substrate etching processing modules (any of 820a-820d) may be implemented as disclosed herein, i.e., for introducing a modification gas, for introducing a removal gas, and other suitable functions. Airlock <NUM> and process module <NUM> may be referred to as "stations. " Each station has a facet <NUM> that interfaces the station to VTM <NUM>. Inside each facet, sensors <NUM>-<NUM> are used to detect the passing of wafer <NUM> when moved between respective stations.

Robot <NUM> transfers wafer <NUM> between stations. In one implementation, robot <NUM> has one arm, and in another implementation, robot <NUM> has two arms, where each arm has an end effector <NUM> to pick wafers such as wafer <NUM> for transport. Front-end robot <NUM>, in atmospheric transfer module (ATM) <NUM>, is used to transfer wafers <NUM> from cassette or Front Opening Unified Pod (FOUP) <NUM> in Load Port Module (LPM) <NUM> to airlock <NUM>. Module center <NUM> inside process module <NUM> is one location for placing wafer <NUM>. Aligner <NUM> in ATM <NUM> is used to align wafers.

In an exemplary processing method, a wafer is placed in one of the FOUPs <NUM> in the LPM <NUM>. Front-end robot <NUM> transfers the wafer from the FOUP <NUM> to an aligner <NUM>, which allows the wafer <NUM> to be properly centered before it is etched or processed. After being aligned, the wafer <NUM> is moved by the front-end robot <NUM> into an airlock <NUM>. Because airlock modules have the ability to match the environment between an ATM and a VTM, the wafer <NUM> is able to move between the two pressure environments without being damaged. From the airlock module <NUM>, the wafer <NUM> is moved by robot <NUM> through VTM <NUM> and into one of the process modules 820a-320d. In order to achieve this wafer movement, the robot <NUM> uses end effectors <NUM> on each of its arms. Once the wafer <NUM> has been processed, it is moved by robot <NUM> from the process modules 820a-820d to an airlock module <NUM>. From here, the wafer <NUM> may be moved by the front-end robot <NUM> to one of the FOUPs <NUM> or to the aligner <NUM>.

It should be noted that the computer controlling the wafer movement can be local to the cluster architecture, or can be located external to the cluster architecture in the manufacturing floor, or in a remote location and connected to the cluster architecture via a network. A controller as described above with respect to <FIG> may be implemented with the tool in <FIG>.

Claim 1:
A method of etching a material on a substrate, the material being a refractory metal or a material having a high surface binding energy, the method comprising:
providing the substrate comprising the material having a surface exposed;
exposing the material surface to a modification gas to modify the surface and form a modified refractory material surface; and
exposing the modified material surface to an energetic particle to remove the modified material surface relative to an underlying unmodified material surface;
wherein the exposed material surface after removing the modified material surface is as smooth or smoother than the substrate surface before exposing the material surface to the modification gas; and
wherein the material surface is the refractory metal selected from the group consisting of Mo, Ta, Ru or a material selected from the group consisting of oxides such as Al<NUM>O<NUM>, In<NUM>O<NUM>, MgO, SnO, Ta<NUM>O<NUM>, TiO<NUM> and ZrO<NUM>; carbides such as BC, SiC and WC; nitrides such as BN, TaN, TiN; sulfides such as ZnS and MoS<NUM>; and superconductors such as YBCO;
wherein the modification gas comprises O<NUM> or other oxygen-containing gas when the refractory metal is Ru;
wherein the modification gas comprises Cl<NUM> or other chlorine-containing gas when the refractory metal is Ta;
wherein the modification gas comprises a mixture of about <NUM>% - <NUM>% O<NUM> and about <NUM>% - <NUM>% Cl<NUM> when the refractory metal is Mo;
wherein the modification gas comprises BCl<NUM>, H<NUM> and CF<NUM> when the material having a high surface binding energy comprises oxides.