Patent Description:
The technology of the disclosure relates generally to a power management apparatus.

Fifth generation (<NUM>) new radio (NR) (<NUM>-NR) has been widely regarded as the next generation of wireless communication technology beyond the current third generation (<NUM>) and fourth generation (<NUM>) technologies. In this regard, a wireless communication device capable of supporting the <NUM>-NR wireless communication technology is expected to achieve higher data rates, improved coverage range, enhanced signaling efficiency, and reduced latency across a wide range of licensed radio frequency (RF) spectrum, which can include low-band spectrum (below <NUM>), mid-band spectrum (<NUM> to <NUM>), and high-band spectrum (above s24 GHz).

In addition, the wireless communication device is also required to support local area networking technologies, such as Wi-Fi, in unlicensed <NUM> and <NUM> spectrums. Further, it may be necessary for the wireless communication device to support both licensed and unlicensed spectrums concurrently to enable communications based on, for example, licensed-assisted access (LAA) scheme. As such, it is desirable to ensure the wireless communication device can operate with flexible multi-band radio frequency (RF) front-end configurations to help reduce complexity and footprint. <CIT> discusses a supply modulator for providing a first power supply voltage and a second power supply voltage to a first power amplifier and a second power amplifier, respectively, and includes a first modulation circuit including a linear regulator and a switching regulator, the first modulation circuit being configured to generate a first modulation voltage in accordance with envelope tracking, and provide the first modulation voltage to the first power amplifier as the first power supply voltage; and a single inductor multiple output converter configured to generate a first output voltage and a second output voltage based on an input voltage having a fixed level, provide the first output voltage to the linear regulator of the first modulation circuit as a power supply voltage, and provide the second output voltage to the second power amplifier as the second power supply voltage.

Embodiments of the disclosure relate to a power management apparatus operatable with multiple configurations. In embodiments disclosed herein, the power management apparatus can be configured to concurrently generate multiple modulated voltages based on a configuration including a single power management integrated circuit (PMIC) or a configuration including a PMIC and a distributed PMIC. Regardless of the configuration, the power management apparatus employs a single switcher circuit, wherein multiple reference voltage circuits are configured to share a multi-level charge pump (MCP). As a result, it is possible to reduce footprint of the power management apparatus while improving isolation between the multiple modulated voltages.

Embodiments of the disclosure relate to a power management apparatus operable with multiple configurations. In embodiments disclosed herein, the power management apparatus can be configured to concurrently generate multiple modulated voltages based on a configuration including a single power management integrated circuit (PMIC) or a configuration including a PMIC and a distributed PMIC. Regardless of the configuration, the power management apparatus employs a single switcher circuit, wherein multiple reference voltage circuits are configured to share a multi-level charge pump (MCP). As a result, it is possible to reduce footprint of the power management apparatus while improving isolation between the multiple modulated voltages.

In this regard, <FIG> is a schematic diagram of an exemplary power management apparatus <NUM> configured according to an embodiment of the present disclosure to include a PMIC <NUM>. The PMIC <NUM> is configured to include a first voltage circuit 14A and a second voltage circuit 14B. The first voltage circuit 14A is configured to generate a first modulated voltage VCCA based on a first target voltage VTGTA and a first reference voltage VREFA. The second voltage circuit 14B is configured to generate a second modulated voltage VCCB based on a second target voltage VTGTB and a second reference voltage VREFB. Notably, the first modulated voltage VCCA and the second modulated voltage VCCB can be envelope tracking (ET) voltages or average power tracking (APT) voltages.

The PMIC <NUM> also includes a switcher circuit <NUM>, which is shared by the first voltage circuit 14A and the second voltage circuit 14B. The switcher circuit <NUM> includes a multi-level charge pump (MCP) <NUM>. The MCP <NUM> is configured to generate a low-frequency voltage VDC (e.g., a direct-current (DC) voltage) at a coupling node LX, as a function of a battery voltage VBAT. In a non-limiting example, the MCP <NUM> can be a buck-boost DC-DC converter that can operate in a buck mode to generate the low-frequency voltage VDC at <NUM> volt (V) or at VBAT or operate in a boost mode to generate the low-frequency voltage VDC at 2VBAT.

The switcher circuit <NUM> also includes a first reference voltage circuit 20A and a second reference voltage circuit 20B. In contrast to a conventional configuration wherein an MCP only supports a single reference voltage circuit, the first reference voltage circuit 20A and the second reference voltage circuit 20B are both coupled to the coupling node LX to share the MCP <NUM>. By sharing the MCP <NUM> between the first reference voltage circuit 20A and the second reference voltage circuit 20B, it is possible to reduce footprint of the power management apparatus <NUM> while improving isolation between the first modulated voltage VCCA and the second modulated voltage VCCB.

Specifically, the first reference voltage circuit 20A is coupled between the coupling node LX and the first voltage circuit 14A, and the second reference voltage circuit 20B is coupled between the coupling node LX and the second voltage circuit 14B. The first voltage circuit 14A and the second voltage circuit 14B are each configured to generate a respective one of the first reference voltage VREFA and the second reference voltage VREFB based on the low-frequency voltage VDC.

The PMIC <NUM> further includes a control circuit <NUM>, which can be a field-programmable gate array (FPGA) or an application-specific integrated circuit (ASIC), as an example. As discussed in detail below, the control circuit <NUM> is configured to determine an appropriate duty cycle based on a selected one of the first target voltage VTGTA and the second target voltage VTGTB to thereby cause the MCP <NUM> to generate the low-frequency voltage VDC at a desirable level.

Each of the first reference voltage circuit 20A and the second reference voltage circuit 20B may be an inductor-capacitor (LC) circuit. Specifically, the first reference voltage circuit 20A includes a first inductor LA and a first capacitor CA and the second reference voltage circuit 20B includes a second inductor LB and a second capacitor CB. In this regard, the first reference voltage circuit 20A and the second reference voltage circuit 20B can each resonate at a respective resonance frequency to generate a respective one of the first reference voltage VREFA and the second reference voltage VREFB as an average of the low-frequency voltage VDC. For example, if the battery voltage VBAT is <NUM> V and the MCP <NUM> is configured to toggle between <NUM> V, VBAT (<NUM> V), and 2VBAT (<NUM> V) based on a <NUM>-<NUM>-<NUM> duty cycle, then the average of the low-frequency voltage VDC will equal <NUM> V (<NUM> V * <NUM>% + <NUM> V * <NUM>% + <NUM> V * <NUM>%).

In a non-limiting example, the first inductor LA and the second inductor LB can be configured to have identical inductance, and the first capacitor CA and the second capacitor CB can be configured to have identical capacitance. As a result, the first reference voltage circuit 20A and the second reference voltage circuit 20B will resonate at an identical resonance frequency to thereby cause the first reference voltage VREFA to be substantially equal to the second reference voltage VREFB (e.g., VREFA = VREFB ± <NUM> V). It should be appreciated that it is also possible to configure the first reference voltage circuit 20A and the second reference voltage circuit 20B to resonate at different resonance frequencies to thereby cause the first reference voltage VREFA to be different from the second reference voltage VREFB.

The first voltage circuit 14A can be configured to include a first voltage amplifier VAA, a first offset capacitor COFFA, and a first hybrid circuit 24A. The first voltage amplifier VAA is configured to generate a first initial modulated voltage VAMPA based on the first target voltage VTGTA. The first offset capacitor COFFA is configured to raise the first initial modulated voltage VAMPA by a first offset voltage VOFFA to generate the first modulated voltage VCCA (VCCA = VAMPA + VOFFA). The first hybrid circuit 24A is configured to modulate the first offset voltage VOFFA based on the first reference voltage VREFA. The first voltage circuit 14A may also include a first feedback circuit 26A (denoted as "FB") to thereby make the first voltage circuit 14A a closed-loop voltage circuit.

Similarly, the second voltage circuit 14B can be configured to include a second voltage amplifier VAB, a second offset capacitor COFFB, and a second hybrid circuit 24B. The second voltage amplifier VAB is configured to generate a second initial modulated voltage VAMPB based on the second target voltage VTGTB. The second offset capacitor COFFB is configured to raise the second initial modulated voltage VAMPB by a second offset voltage VOFFB to generate the second modulated voltage VCCB (VCCB = VAMPB + VOFFB). The second hybrid circuit 24B is configured to modulate the second offset voltage VOFFB based on the second reference voltage VREFB. The second voltage circuit 14B may also include a second feedback circuit 26B (denoted as "FB") to thereby make the second voltage circuit 14B a closed-loop voltage circuit.

In an embodiment, the first hybrid circuit 24A and the second hybrid circuit 24B can each be configured to operate in a switch mode or a low dropout (LDO) mode. When operating in the switch mode, each of the first hybrid circuit 24A and the second hybrid circuit 24B can cause a respective one of the first offset voltage VOFFA and the second offset voltage VOFFB to be equal to a respective one of the first reference voltage VREFA and the second reference voltage VREFB. In contrast, when operating in the LDO mode, each of the first hybrid circuit 24A and the second hybrid circuit 24B can cause a respective one of the first offset voltage VOFFA and the second offset voltage VOFFB to be lower than a respective one of the first reference voltage VREFA and the second reference voltage VREFB.

As mentioned earlier, the control circuit <NUM> may determine an appropriate duty cycle based on a selected one of the first target voltage VTGTA and the second target voltage VTGTB to thereby cause the MCP <NUM> to generate the low-frequency voltage VDC at a desirable level. In an embodiment, the control circuit <NUM> can determine the selected one of the first target voltage VTGTA and the second target voltage VTGTB as any one of the first target voltage VTGTA and the second target voltage VTGTB having a higher root-mean-square (RMS) level.

In one non-limiting example, the control circuit <NUM> determines that the first target voltage VTGTA has the higher RMS level than the second target voltage VTGTB. As such, the control circuit <NUM> can determine the duty cycle based on the first target voltage VTGTA to thereby cause the MCP <NUM> to generate the low-frequency voltage VDC based on the first target voltage VTGTA. Accordingly, the control circuit <NUM> can cause the first hybrid circuit 24A to operate in the switch mode and cause the second hybrid circuit 24B to operate in the LDO mode.

In another non-limiting example, the control circuit <NUM> determines that the second target voltage VTGTB has the higher RMS level than the first target voltage VTGTA. As such, the control circuit <NUM> can determine the duty cycle based on the second target voltage VTGTB to thereby cause the MCP <NUM> to generate the low-frequency voltage VDC based on the second target voltage VTGTB. Accordingly, the control circuit <NUM> can cause the second hybrid circuit 24B to operate in the switch mode and cause the first hybrid circuit 24A to operate in the LDO mode.

In another non-limiting example, the control circuit <NUM> determines that the second target voltage VTGTB has an equal RMS level as the first target voltage VTGTA. As such, the control circuit <NUM> can determine the duty cycle based on any of the first target voltage VTGTA and the second target voltage VTGTB to thereby cause the MCP <NUM> to generate the low-frequency voltage VDC based on either the first target voltage VTGTA or the second target voltage VTGTB. Accordingly, the control circuit <NUM> can cause the second hybrid circuit 24B and the first hybrid circuit 24A to both operate in the switch mode.

The first voltage circuit 14A may provide the first modulated voltage VCCA to a first power amplifier circuit 28A (denoted as "PA") for amplifying a first radio frequency (RF) signal 30A. The second voltage circuit 14B may provide the second modulated voltage VCCB to a second power amplifier circuit 28B (denoted as "PA") for amplifying a second RF signal 30B. In a non-limiting example, the first RF signal 30A may be amplified for transmission in a licensed band and the second RF signal 30B may be amplified for transmission in an unlicensed band. In this regard, the power management apparatus <NUM> can be configured to enable communications based on, for example, a licensed-assisted access (LAA) scheme. In another non-limiting example, the first RF signal 30A and the second RF signal 30B may be amplified for simultaneous transmission in a licensed band(s) to enable communications based on, for example, a dual-connectivity (DC) scheme. In another non-limiting example, the first RF signal 30A and the second RF signal 30B may be amplified for simultaneous transmission in an unlicensed band(s) to enable communications based on, for example, a Wi-Fi multiple-input multiple-output (MIMO) scheme.

In an embodiment, the first voltage circuit 14A and the second voltage circuit 14B are each coupled to a respective one of the first power amplifier circuit 28A and the second power amplifier circuit 28B via a respective one of a first conductive line 32A and a second conductive line 32B. Notably, the first conductive line 32A and the second conductive line 32B can each introduce respective trace inductance that can distort a respective one of the first modulated voltage VCCA and the second modulated voltage VCCB to potentially cause amplitude clipping at a respective one of the first power amplifier circuit 28A and the second power amplifier circuit 28B.

In this regard, the PMIC <NUM> may be configured to include a first voltage equalizer 34A and a second voltage equalizer 34B (both denoted as "VRF"). The first voltage equalizer 34A and/or the second voltage equalizer 34B can be configured to equalize the first target voltage VTGTA and/or the second target voltage VTGTB to help offset the trace inductance caused by the first conductive line 32A and/or the second conductive line 32B. Notably, the trace inductance caused by the first conductive line 32A and/or the second conductive line 32B can correspond to a transfer function having a second-order complex pole term. In this regard, to offset the trace inductance caused by the first conductive line 32A and/or the second conductive line 32B, the first voltage equalizer 34A and/or the second voltage equalizer 34B can be configured to equalize the first target voltage VTGTA and/or the second target voltage VTGTB based on a transfer function with a second-order complex-zero term. For an example of the first voltage equalizer 34A and the second voltage equalizer 34B, please refer to <CIT>, entitled "EQUALIZER CIRCUIT AND RELATED POWER MANAGEMENT CIRCUIT.

Alternative to configuring the power management apparatus <NUM> to provide the first modulated voltage VCCA and the second modulated voltage VCCB based exclusively on the PMIC <NUM>, it is also possible to provide the first modulated voltage VCCA and the second modulated voltage VCCB based on more than the PMIC <NUM>. In this regard, <FIG> is a schematic diagram of an exemplary power management apparatus <NUM> configured according to another embodiment of the present disclosure to include a PMIC <NUM> and a distributed PMIC (DPMIC) <NUM> separated from the PMIC <NUM>. Common elements between <FIG> and <FIG> are shown therein with common element numbers and will not be re-described herein.

In contrast to the PMIC <NUM> in <FIG>, the second voltage circuit 14B is instead provided in the DPMIC <NUM> that is physically separated from the PMIC <NUM> (e.g., in different dies). Such configuration can provide an increased flexibility as to where the first power amplifier circuit 28A and the second power amplifier circuit 28B can be provided in a wireless communication device (e.g., smart phone). For example, the first power amplifier circuit 28A can be disposed close to an antenna(s) mounted on a top side of the wireless communication device, while the second power amplifier circuit 28B can be so disposed close to an antenna(s) mounted on a bottom side of the wireless communication device.

Claim 1:
A power management apparatus (<NUM>) comprising:
a switcher circuit (<NUM>) comprising:
a multi-level charge pump (MCP) (<NUM>) configured to operate based on a duty cycle to generate a low-frequency voltage as a function of a battery voltage;
a first reference voltage circuit (20A) configured to generate a first reference voltage based on the low-frequency voltage; and
a second reference voltage circuit (20B) configured to generate a second reference voltage based on the low-frequency voltage;
a control circuit (<NUM>) configured to determine the duty cycle based on a selected one of a first target voltage and a second target voltage to thereby cause the MCP (<NUM>) to generate the low-frequency voltage;
a first voltage circuit (14A) coupled to the first reference voltage circuit (20A) and configured to generate a first modulated voltage by raising a first initial modulated voltage generated based on the first target voltage by a first offset voltage modulated based on the first reference voltage; and
a second voltage circuit (14B) coupled to the second reference voltage circuit (20B) and configured to generate a second modulated voltage by raising a second initial modulated voltage generated based on the second target voltage by
a second offset voltage modulated based on the second reference voltage.