Patent Description:
Various aspects of this disclosure relate to a measurement system for temporal signal measurement of a device under test (DUT). Various aspects of this disclosure relate to a method of forming a measurement system for temporal signal measurement of a device under test (DUT). Various aspects of this disclosure relate to a method of measuring temporal signal of a device under test (DUT).

As the speed of transmission keeps increasing, it is important to characterize passive communications channels such as a cable to ensure that the distortion caused to the signal due to the channel transmission parameters is within acceptable limit. Typically, bit error ratio (BER) measurement or eye-diagram measurement is used for this assessment. However, BER measurement is time-consuming, whereas eye-diagram measurement can be intuitive and fast, and so it is a widely adopted measurement method. Currently available test setups for eye-diagram measurement employ a plurality of measurement equipment connected for performing the eye-diagram measurement. <CIT> discloses an electronic test and measurement equipment, e.g. an automated test equipment (ATE) that measures electrical signals. <CIT> discloses a testing apparatus for testing electronic devices that have mixed input and output signals, e.g. analog and digital signals.

According to various embodiments, there is provided a measurement system for temporal signal measurement of a device under test as defined in independent claim <NUM>.

According to various embodiments, there is provided a method of forming a measurement system for temporal signal measurement of a device under test as defined in independent claim <NUM>.

According to various embodiments, there is provided a method of measuring temporal signal of a device under test as defined in independent claim <NUM>.

The invention will be better understood with reference to the detailed description when considered in conjunction with the non-limiting examples and the accompanying drawings, in which:.

The following detailed description refers to the accompanying drawings that show, by way of illustration, specific details and embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention. Other embodiments may be utilized and structural, and logical changes may be made without departing from the scope of the invention. The various embodiments are not necessarily mutually exclusive, as some embodiments can be combined with one or more other embodiments to form new embodiments.

Embodiments described below in the context of the system are analogously valid for the respective methods, and vice versa. Furthermore, it will be understood that the embodiments described below may be combined, for example, a part of one embodiment may be combined with a part of another embodiment.

It should be understood that the terms "on", "over", "top", "bottom", "down", "side", "back", "left", "right", "front", "lateral", "side", "up", "down" etc., when used in the following description are used for convenience and to aid understanding of relative positions or directions, and not intended to limit the orientation of any system, device, or structure or any part of any system, device or structure.

Features that are described in the context of an embodiment may correspondingly be applicable to the same or similar features in the other embodiments. Features that are described in the context of an embodiment may correspondingly be applicable to the other embodiments, even if not explicitly described in these other embodiments. Furthermore, additions and/or combinations and/or alternatives as described for a feature in the context of an embodiment may correspondingly be applicable to the same or similar feature in the other embodiments.

In the context of various embodiments, the articles "a", "an" and "the" as used with regard to a feature or element include a reference to one or more of the features or elements.

Various embodiments may provide a measurement system for temporal signal measurement of a device under test (DUT).

<FIG> is an illustration of a measurement system <NUM> for temporal signal measurement of a device under test (DUT) <NUM> according to various embodiments.

In various embodiments, the measurement system <NUM> includes a reference clock synthesizer <NUM> configured to generate a master reference clock signal. The measurement system <NUM> includes a transmitter unit <NUM> connected to the reference clock synthesizer <NUM> and configured to connect to a first end <NUM> of the device under test (DUT) <NUM>. The measurement system includes a measurement control system <NUM> connected to the transmitter unit <NUM>, the measurement control system <NUM> configured to control the transmitter unit <NUM> to generate a test signal pattern based on a first reference clock signal derived from the master reference clock signal, and to generate a signal for passing through the device under test (DUT) <NUM> based on the test signal pattern.

In various embodiments, reference clock synthesizer <NUM> may be capable of providing a plurality of reference clock signals. In various embodiments, the master reference clock signal may be generated at a specified frequency. In various embodiments, the first reference clock signal may be generated at a specified frequency.

In various embodiments, the test signal pattern may be predetermined. In various embodiments, the test signal pattern may be a pseudo random binary sequence (PRBS). In various embodiments, the test signal pattern may be a square wave sequence. The type of the test signal pattern is not limited thereto, suitable the test signal pattern may be used.

According to the invention, the transmitter unit <NUM> is an optical transmitter unit. According to the invention, the signal for passing through the device under test (DUT) <NUM> is an optical signal.

In various embodiments, the first reference clock signal may be an integer or fractional multiple of the master reference clock signal. In various embodiments, the master clock signal and the first reference clock signal may be synchronized. In various embodiments, the first reference clock signal and the master reference clock signal may be phase-locked.

In various embodiments, the measurement system includes a receiver unit <NUM> connected to the reference clock synthesizer <NUM> and configured to connect to a second end <NUM> of the device under test (DUT) <NUM>, and the receiver unit <NUM> configured to detect the signal that passes through the device under test (DUT) <NUM> and further configured to generate a digital signal based on the signal detected and a second reference clock signal derived from the master reference clock signal. In various embodiments, the measurement control system <NUM> is connected to the receiver unit <NUM>.

According to the invention, the receiver unit <NUM> is an optical receiver unit. According to the invention, the signal that passes through the device under test (DUT) <NUM> is an optical signal.

In various embodiments, the second reference clock signal may be an integer or fractional multiple of the master reference clock signal. In various embodiments, the master clock signal and the second reference clock signal may be synchronized. In various embodiments, the second reference clock signal and the master reference clock signal may be phase-locked.

In various embodiments, the measurement control system <NUM> is further configured to provide an output signal including measurement results based on the digital signal.

In various embodiments, the measurement result may be an eye-diagram measurement. In various embodiments, the measurement result may be in any suitable form.

In various embodiments, the measurement control system <NUM> may provide the measurement result to an external device. The external device may be a display monitor or a computer or a storage device. The type of device is not limited thereto, suitable device may be used. In various embodiments, the measurement control system <NUM> may provide the measurement result to an inbuilt display device or computer.

In various embodiments, the measurement control system <NUM> may be connected to a device via a standard communication interface such as an Ethernet cable or by any other suitable means.

In various embodiments, the device under test (DUT) <NUM> may be a cable. The cable may be a copper cable or an optical fiber cable. The optical fiber cable may be a multi-fiber cable. The type of cable is not limited thereto, any suitable cable may be used.

In various embodiments, the device under test (DUT) <NUM> may be a semiconductor device or a printed circuit board (PCB). The type of device is not limited thereto, any suitable device may be used.

In various embodiments, the measurement system <NUM> for temporal signal measurement of a device under test (DUT) <NUM> may be a single test equipment. In various embodiments, in the single test equipment, the transmitter unit <NUM> and receiver unit <NUM> may use a common clock source.

In various embodiments, a period of a test signal may be spanned by <NUM>,<NUM> samples of sampling frequency.

In various embodiments, the signal for passing through the device under test (DUT) <NUM> based on the test signal pattern may be generated by the transmitter unit <NUM> at test frequency f_t.

In various embodiments, the signal that passes through the device under test (DUT) <NUM> may be sampled by the receiver unit <NUM> at a sampling frequency of f_s. The samples may be digitized to produce digitized received test pattern. In various embodiments, the sampling frequency f_s may be a fraction of the test frequency f_t such that some specific number N of consecutive samples may span a full waveform of the test signal.

In various embodiments, the measurement control system <NUM> may collect the digitized received test pattern. The measurement control system <NUM> may provide an output signal including measurement results. The measurement control system <NUM> may present the digitized received test pattern in the form of an eye diagram.

The table below shows an example of possible clock ratios of the test frequency f_t, the sampling frequency f_s and a fractional ratio of the test frequency f_t and the sampling frequency f_s.

<FIG> shows a flowchart of a method <NUM> of forming a measurement system <NUM> for temporal signal measurement of a device under test (DUT) <NUM> according to various embodiments.

In various embodiments, a first step <NUM> of the method <NUM> includes connecting a reference clock synthesizer <NUM> to a transmitter unit <NUM> and to a receiver unit <NUM>.

In various embodiments, a second step <NUM> of the method <NUM> includes connecting a measurement control system <NUM> to the transmitter unit <NUM> and to the receiver unit <NUM>.

In various embodiments, the transmitter unit <NUM> is configured to connect to a first end <NUM> of the device under test (DUT) <NUM> and the receiver unit <NUM> is configured to connect to a second end <NUM> of the device under test (DUT) <NUM>.

In various embodiments, the reference clock synthesizer <NUM> is configured to generate a master reference clock signal and the measurement control system <NUM> is configured to control the transmitter unit <NUM> to generate a test signal pattern based on a first reference clock signal derived from the master reference clock signal, and generate a signal for passing through the device under test (DUT) <NUM> based on the test signal pattern.

In various embodiments, the receiver unit <NUM> is configured to detect the signal that passes through the device under test (DUT) <NUM> and is configured to generate a digital signal based on the signal detected and a second reference clock signal derived from the master reference clock signal. In various embodiments, the measurement control system <NUM> is connected to the receiver unit <NUM>.

In various embodiments, the measurement system <NUM> for temporal signal measurement of a device under test (DUT) <NUM> may be formed as a single test equipment. In various embodiments, in the single test equipment, the transmitter unit <NUM> and receiver unit <NUM> may use a common clock source.

In various embodiments, the order of the steps of the method <NUM> is not limited thereto, any suitable order may be used. Various embodiments may also include methods related to any components included in the transmitter unit <NUM> and/or the receiver unit <NUM>.

<FIG> shows a flowchart of a method <NUM> of measuring temporal signal of a device under test (DUT) <NUM> according to various embodiments.

In various embodiments, the method <NUM> includes a first step <NUM> of generating a master reference clock signal using a reference clock synthesizer <NUM>.

In various embodiments, the method <NUM> includes a second step <NUM> of generating a test signal pattern based on a first reference clock signal derived from the master reference clock signal using a transmitter unit controlled by a measurement control system, wherein the measurement control system is connected to the transmitter unit.

In various embodiments, the method <NUM> includes a third step <NUM> of generating a signal for passing through the device under test (DUT) based on the test signal pattern using the transmitter unit, wherein the transmitter unit is connected to the reference clock synthesizer and is connected to a first end of the device under test (DUT).

In various embodiments, the method <NUM> includes a fourth step <NUM> of detecting the signal that passes through the device under test (DUT) <NUM> and includes generating a digital signal based on the signal detected and a second reference clock signal derived from the master reference clock signal, using the receiver unit <NUM> connected to the measurement control system <NUM>, the reference clock synthesizer <NUM> and to a second end <NUM> of the device under test (DUT) <NUM>.

In various embodiments, the method <NUM> includes a fifth step <NUM> of providing an output signal including measurement results based on the digital signal using the measurement control system <NUM>.

In various embodiments, the order of the steps in method <NUM> is not limited thereto, any suitable order may be used.

In various embodiments, a measurement system <NUM> includes a reference clock synthesizer <NUM>, a transmitter unit <NUM>, a measurement control system <NUM> and a receiver unit <NUM>.

In various embodiments, the transmitter unit <NUM> may include a signal generator <NUM> and/or a transmitter module <NUM> and/or a first switch <NUM>.

In various embodiments, the receiver unit <NUM> includes a detector module <NUM> and/or a track and hold device <NUM> and/or a response signal digitizer <NUM> and/or a second switch <NUM>.

In various embodiments, transmitter unit <NUM> is connected to the reference clock synthesizer <NUM> and is configured to connect to a first end <NUM> of a device under test (DUT) <NUM>. In various embodiments, the measurement control system <NUM> is connected to the transmitter unit <NUM>. In various embodiments, the receiver unit <NUM> is connected to the reference clock synthesizer <NUM> and is configured to connect to a second end <NUM> of the device under test (DUT) <NUM>. In various embodiments, the reference clock synthesizer <NUM> may be connected to the measurement control system <NUM>.

In various embodiments, the transmitter unit <NUM> may include a signal generator <NUM> connected to the reference clock synthesizer <NUM>. In various embodiments, the signal generator <NUM> may be configured to receive the first reference clock signal. The signal generator <NUM> may be configured to generate the test signal pattern based on the first reference clock signal derived from the master reference clock signal. In various embodiments, the signal generator <NUM> may be a radio frequency (RF) signal generator. In various embodiments, the signal generator <NUM> generates a predetermined test pattern clocked by a multiple of the first reference clock signal.

In various embodiments, the signal generator <NUM> may be connected to the measurement control system <NUM>.

In various embodiments, the transmitter unit <NUM> may include a transmitter module <NUM> connected to the signal generator <NUM>, the transmitter module <NUM> may be configured to generate the signal for passing through the device under test (DUT) <NUM> based on the test signal pattern.

According to the invention, the transmitter module <NUM> is an optical transmitter module According to the invention, the signal for passing through the device under test (DUT) <NUM> is an optical signal.

In various embodiments, the transmitter module <NUM> may be connected to the reference clock synthesizer <NUM> and the measurement control system <NUM>. In various embodiments, the transmitter module <NUM> may perform the function of the signal generator <NUM>.

In various embodiments, the receiver unit <NUM> includes a detector module <NUM> which is configured to detect the signal that passes through the device under test (DUT) <NUM> and is configured to generate a response signal based on the signal detected.

In various embodiments, the signal that passes through the device under test (DUT) <NUM> is an optical signal. The detector module <NUM> is an optical detector module. The detector module <NUM> may receive the optical signal from the device under test (DUT) <NUM> and may convert it to an electrical signal. In various embodiments, the detector module <NUM> may be configured to connect to a second end <NUM> of the device under test (DUT) <NUM>.

In various embodiments, the receiver unit <NUM> may include a track and hold device <NUM> connected to the detector module <NUM> and the reference clock synthesizer <NUM>, the track and hold device <NUM> may be configured to generate a sampled response signal based on the response signal and based on a third reference clock signal derived from the master reference clock signal. In various embodiments, the track and hold device <NUM> may be capable of tracking the response signal and holding the response signal when a clock edge is received, the output of the track and hold device <NUM> being the sampled response signal. The track and hold device <NUM> may sample the response signal at the edge of a third reference clock signal. The frequency of the third reference clock signal may be derived using sub-sampling based scheme such that a response to a complete predetermined test pattern may be sampled over a plurality of cycles of the predetermined test pattern.

In various embodiments, the holding of the response signal is not limited to the clock edge, the track and hold device <NUM> may track the response signal and hold the response signal at any suitable period.

In various embodiments, the third reference clock signal may be an integer or fractional multiple of the master reference clock signal. In various embodiments, the master clock signal and the third reference clock signal may be synchronized. In various embodiments, the third reference clock signal and the master reference clock signal may be phase-locked.

In various embodiments, the track and hold device <NUM> may be configured to connect to a second end <NUM> of the device under test (DUT) <NUM>. In various embodiments, the track and hold device <NUM> may perform the function of the detector module <NUM>.

In various embodiments, the receiver unit <NUM> may include a response signal digitizer <NUM> connected to the track and hold device <NUM> and the reference clock synthesizer <NUM>, the response signal digitizer <NUM> may be configured to generate the digital signal based on the sampled response signal and the second reference clock signal derived from the master reference clock signal.

In various embodiments, the measurement control system may be connected to the reference clock synthesizer <NUM> and the response signal digitizer <NUM>. In various embodiments, the measurement control system may be configured to provide the output signal including the measurement results based on the digital signal generated by the response signal digitizer <NUM>, and a fourth reference clock signal derived from the master reference clock signal.

In various embodiments, the fourth reference clock signal may be an integer or fractional multiple of the master reference clock signal. In various embodiments, the master clock signal and the fourth reference clock signal may be synchronized. In various embodiments, the fourth reference clock signal and the master reference clock signal may be phase-locked.

In various embodiments, the first reference clock signal, the second reference clock signal, the third reference clock signal, and the fourth reference clock signal may be an integer or fractional multiple of the master reference clock signal. In various embodiments, the first reference clock signal, the second reference clock signal, the third reference clock signal, and the fourth reference clock signal may be synchronized. In various embodiments, the first reference clock signal, the second reference clock signal, the third reference clock signal, and the fourth reference clock signal may be phase-locked.

In various embodiments, the transmitter unit <NUM> may include a first switch <NUM> and the signal generated by the transmitter unit <NUM> for passing through the device under test (DUT) <NUM> may pass to the device under test (DUT) <NUM> via the first switch <NUM>. In various embodiments, the receiver unit <NUM> may include a second switch <NUM> and the signal may pass through the device under test (DUT) <NUM> to the receiver unit <NUM> via the second switch <NUM>.

In various embodiments, the first switch <NUM> may be connected to transmitter module <NUM>. In various embodiments, the second switch <NUM> may be connected to the detector module <NUM>.

In various embodiments, the first switch <NUM> may be outside transmitter unit <NUM>. In various embodiments, the second switch <NUM> may be outside receiver unit <NUM>.

In various embodiments, the device under test (DUT) <NUM> is a multi-fiber cable. The multi-fiber cable may include a plurality of fiber cords. The first switch <NUM> may be configured to pass the signal from the transmitter unit <NUM> to one of the plurality of fiber cords, and the second switch <NUM> may be configured to receive the signal from the one of the plurality of fiber cords.

In various embodiments, the measurement control system <NUM> may control which fiber cord of the plurality of fiber cords is used to pass the signal.

In various embodiments, the measurement control system <NUM> may sequence through each fiber cord of the plurality of fiber cords and may perform measurement by appropriately configuring the first switch <NUM> and the second switch <NUM>.

In various embodiments, the transmitter module <NUM> may be an optical transmitter module <NUM> and may accept the predetermined test signal pattern and convert it to an optical predetermined test signal and further transmits the optical predetermined test signal to the first transmitter fiber cord.

In various embodiments, the first switch <NUM> may connect a first transmitter fiber cord of the plurality of fiber cords at an input to one of the plurality of fiber cables at an output.

In various embodiments, the output fiber is selected by an control input from the measurement control system <NUM>.

In various embodiments, the method may include a first step <NUM> of connecting the signal generator <NUM> in the transmitter unit <NUM> to the reference clock synthesizer <NUM>. The signal generator <NUM> may be configured to generate the test signal pattern based on the first reference clock signal derived from the master reference clock signal. In various embodiments, the signal generator <NUM> may be a radio frequency (RF) signal generator. In various embodiments, the signal generator <NUM> generates a predetermined test pattern clocked by a multiple of the first reference clock signal.

In various embodiments, the method may include a second step <NUM> of connecting the transmitter module <NUM> in the transmitter unit <NUM> to the signal generator <NUM>. The transmitter module <NUM> may be configured to generate the signal for passing through the device under test (DUT) <NUM> based on the test signal pattern.

According to the invention, the transmitter module <NUM> is an optical transmitter module. According to the invention, the signal for passing through the device under test (DUT) <NUM> is an optical signal.

In various embodiments, the receiver unit <NUM> includes a detector module <NUM>. The detector module <NUM> is configured to detect the signal that passes through the device under test (DUT) <NUM> and generates a response signal based on the signal detected.

In various embodiments, the method may include a third step <NUM> connecting a track and hold device <NUM> in the receiver unit <NUM> to the detector module <NUM> in the receiver unit <NUM> and to the reference clock synthesizer <NUM>. The track and hold device <NUM> may be configured to receive the response signal from the detector module <NUM>. The track and hold device <NUM> may be configured to generate a sampled response signal based on the response signal and based on a third reference clock signal derived from the master reference clock signal.

The track and hold device <NUM> may sample the response signal at the edge of a third reference clock signal. The frequency of the third reference clock signal may be derived using sub-sampling based scheme such that a response to a complete predetermined test pattern may be sampled over a plurality of cycles of the predetermined test pattern.

In various embodiments, the method may include a fourth step <NUM> of connecting a response signal digitizer <NUM> in the receiver unit <NUM> to the track and hold device <NUM> and to the reference clock synthesizer <NUM>. The response signal digitizer <NUM> may be configured to generate the digital signal based on the sampled response signal and the second reference clock signal derived from the master reference clock signal.

In various embodiments, the method may include a fifth step <NUM> of connecting the measurement control system to the reference clock synthesizer <NUM> and to the response signal digitizer <NUM>. The measurement control system may be configured to provide the output signal including the measurement results based on the digital signal and a fourth reference clock signal derived from the master reference clock signal.

In various embodiments, the transmitter unit <NUM> may include a first switch <NUM>.

In various embodiments, the receiver unit <NUM> may include a second switch <NUM>.

In various embodiments, the first switch <NUM> may be configured to pass the signal for passing through the device under test (DUT) <NUM> from the transmitter unit <NUM> to the device under test (DUT) <NUM>. In various embodiments, the second switch <NUM> may be configured to pass the signal for passing through the device under test (DUT) <NUM> from the device under test (DUT) <NUM> to the receiver unit <NUM>.

In various embodiments, the device under test (DUT) <NUM> may be a multi-fiber cable. The multi-fiber cable may include a plurality of fiber cords. In various embodiments, the signal may be passed from the transmitter unit <NUM> to one of the plurality of fiber cords using the first switch <NUM>. In various embodiments, the signal may be received by the receiver unit <NUM> from the one of the plurality of fiber cords using the second switch <NUM>.

The order of the steps of method <NUM> is not limited thereto, any suitable order of steps may be used. Also, some steps of method <NUM> may be omitted.

A system and method of implementing eye-diagram and other temporal signal quality measurement on the device under test ("DUT") by using a single test equipment with transmit and receive sections using a common clock source may be provided. The temporal response measurement system provided may be suitable for high-speed communications channels.

Claim 1:
A measurement system (<NUM>, <NUM>) for temporal signal measurement of a device under test (DUT) (<NUM>), the measurement system (<NUM>, <NUM>) comprising:
a reference clock synthesizer (<NUM>) configured to generate a master reference clock signal;
an optical transmitter unit (<NUM>) connected to the reference clock synthesizer (<NUM>) and configured to connect to a first end (<NUM>) of the device under test (DUT) (<NUM>);
a measurement control system (<NUM>) connected to the optical transmitter unit (<NUM>), the measurement control system (<NUM>) configured to control the optical transmitter unit (<NUM>) to generate a test signal pattern based on a first reference clock signal derived from the master reference clock signal, and to generate an optical signal for passing through the device under test (DUT) (<NUM>) based on the test signal pattern; and
an optical receiver unit (<NUM>) connected to the reference clock synthesizer (<NUM>) and configured to connect to a second end (<NUM>) of the device under test (DUT) (<NUM>), the optical receiver unit (<NUM>) configured to detect the optical signal that passes through the device under test (DUT) (<NUM>) and further configured to generate a digital signal based on the optical signal detected and a second reference clock signal derived from the master reference clock signal;
wherein the measurement control system (<NUM>) is connected to the optical receiver unit (<NUM>);
wherein the measurement control system (<NUM>) is further configured to provide an output signal comprising measurement results based on the digital signal;
wherein the optical receiver unit (<NUM>) comprises an optical detector module (<NUM>) configured to detect the optical signal that passes through the device under test (DUT) (<NUM>) and configured to generate a response signal, which is an electrical signal, based on the optical signal received.