Patent Description:
Substrates with electronically active components such as transistors or light-emitting diodes distributed over the extent of the substrate can be used in a variety of electronic systems, for example, flat-panel imaging devices such as flat-panel liquid crystal or organic light emitting diode (OLED) display devices and in flat-panel solar cells. A variety of methods may be used to distribute electronically active circuits over substrates, including forming the electronically active circuits on a substrate and forming the components on separate substrates and placing them on a substrate. In the latter case, a variety of assembly technologies for device packaging may be used.

Electronically active components are typically formed on a substrate by sputtering a layer of inorganic semiconductor material or by spin-coating organic material over the entire substrate. Inorganic semiconductor materials can be processed to improve their electronic characteristics. For example, amorphous silicon can be treated to form low-temperature or high-temperature poly-crystalline silicon. In other process methods, microcrystalline semiconductor layers can be formed by using an underlying seeding layer. These methods typically improve the electron mobility of the semiconductor layer. The substrate and layer of semiconductor material can be photo-lithographically processed to define electronically active components, such as transistors. Such transistors are known as thin-film transistors (TFTs) since they are formed in a thin layer of semiconductor material, typically silicon. Transistors may also be formed in thin layers of organic materials. In these devices, the substrate is often made of glass, for example Corning Eagle® or Jade® glass designed for display applications.

The above techniques have some limitations. Despite processing methods used to improve the performance of thin-film transistors, such transistors may provide performance that is lower than the performance of other integrated circuits formed in mono-crystalline semiconductor material. Semiconductor material and active components can be provided only on portions of the substrate, leading to wasted material and processing costs. The choice of substrate materials can also be limited by the processing steps necessary to process the semiconductor material and the photo-lithographic steps used to pattern the active components. For example, plastic substrates have a limited chemical and heat tolerance and do not readily survive photo-lithographic processing. Furthermore, the manufacturing equipment used to process large substrates with thin-film circuitry is relatively expensive. Other substrate materials that may be used include quartz, for example, for integrated circuits using silicon-on-insulator structures as described in <CIT> and <CIT>. However, such substrate materials can be more expensive or difficult to process.

Other methods used for distributing electronically functional components over a substrate in the circuit board assembly industry include, for example, pick-and-place technologies for integrated circuits provided in a variety of packages, for example, pin-grid arrays, ball-grid arrays, and flip-chips. However, these techniques may be limited in the size of the integrated circuits that can be placed.

In further manufacturing techniques, a mono-crystalline semiconductor wafer is employed as the substrate. While this approach can provide substrates with the same performance as integrated circuits, the size of such substrates may be limited, for example, to a <NUM>-inch diameter circle, and the wafers are relatively expensive compared to other substrate materials such as glass, polymer, or quartz.

In yet another approach, thin layers of semiconductor are bonded to a substrate and then processed. Such a method is known as semiconductor-on-glass or silicon-on-glass (SOG) and is described, for example, in <CIT>. If the semiconductor material is crystalline, high-performance thin-film circuits can be obtained. However, the bonding technique and the processing equipment for the substrates to form the thin-film active components on large substrates can be relatively expensive.

Publication No. <NUM>-<NUM> of the Patent Abstracts of Japan entitled Formation of Display Transistor Array Panel describes etching a substrate to remove it from a thin-film transistor array on which the TFT array was formed. TFT circuits formed on a first substrate can be transferred to a second substrate by adhering the first substrate and the TFTs to the surface of the second substrate and then etching away the first substrate, leaving the TFTs bonded to the second substrate. This method may require etching a significant quantity of material, and may risk damaging the exposed TFT array.

Other methods of locating material on a substrate are described in <CIT>. In this approach, a first substrate carries a thin-film object to be transferred to a second substrate. An adhesive is applied to the object to be transferred or to the second substrate in the desired location of the object. The substrates are aligned and brought into contact. A laser beam irradiates the object to abrade the transferring thin film so that the transferred thin-film adheres to the second substrate. The first and second substrates are separated by peeling the film in the abraded areas from the first substrate and transferring it to the second substrate. In one embodiment, a plurality of objects is selectively transferred by employing a plurality of laser beams to abrade selected area. Objects to be transferred can include thin-film circuits.

<CIT> describes a method of transferring a device from a first substrate onto a holding substrate by selectively irradiating an interface with an energy beam. The interface is located between a device for transfer and the first substrate and includes a material that generates ablation upon irradiation, thereby releasing the device from the substrate. For example, a light-emitting device (LED) is made of a nitride semiconductor on a sapphire substrate. The energy beam is directed to the interface between the sapphire substrate and the nitride semiconductor releasing the LED and allowing the LED to adhere to a holding substrate coated with an adhesive. The adhesive is then cured. These methods, however, may require the patterned deposition of adhesive on the object(s) or on the second substrate. Moreover, the laser beam that irradiates the object may need to be shaped to match the shape of the object, and the laser abrasion can damage the object to be transferred. Furthermore, the adhesive cure takes time, which may reduce the throughput of the manufacturing system.

Another method for transferring active components from one substrate to another is described in <NPL>. In this approach, small integrated circuits are formed over a buried oxide layer on the process side of a crystalline wafer. The small integrated circuits, or chiplets, are released from the wafer by etching the buried oxide layer formed beneath the circuits. A PDMS stamp is pressed against the wafer and the process side of the chiplets is adhered to the stamp. The chiplets are pressed against a destination substrate or backplane coated with an adhesive and thereby adhered to the destination substrate. The adhesive is subsequently cured. In another example, <CIT> entitled Optical Systems Fabricated by Printing-Based Assembly teaches transferring light-emitting, light-sensing, or light-collecting semiconductor elements from a wafer substrate to a destination substrate or backplane.

In such methods it is generally necessary to electrically connect the small integrated circuits or chiplets to electrically conductive elements such as backplane contact pads on the destination substrate. By applying electrical signals to conductors on the destination substrate the small integrated circuits are energized and made operational. The electrical connections between the small integrated circuits and the backplane contact pads are typically made by photolithographic processes in which a metal is evaporated or sputtered onto the small integrated circuits and the destination substrate to form a metal layer, the metal layer is coated with a photoresist that is exposed to a circuit connection pattern, and the metal layer and photoresist are developed by etching and washing to form the patterned electrical connections between the small integrated circuits and the connection pads on the destination substrate. Additional layers, such as interlayer dielectric insulators can also be required. This process is expensive and requires a number of manufacturing steps. Moreover, the topographical structure of the small integrated circuits over the destination substrate renders the electrical connections problematic. For example, it can be difficult to form a continuous conductor from the destination substrate to the small integrated circuit because of the differences in height over the surface between the small integrated circuits and the destination substrate. Moreover, many transfer printing steps can be necessary to transfer the densely packed chiplets on the source wafer to the more sparsely packed chiplets on the destination substrate.

There is a need, therefore, for structures and methods that enable the disposition and electrical interconnection of small integrated circuits, such as micro transfer printed chiplets or light-emitting diodes, on large-format destination substrates.

<CIT> describes micro assembled high frequency devices and arrays. Compound micro assembly allows arrays of microsystems containing small devices to be formed on an intermediate substrate by micro-transfer printing individual elements from native substrates. The micro-systems can then be micro-transfer printed to a destination substrate to form a macro-system.

Methods in accordance with the present invention are defined in appended claims <NUM> and <NUM>. In these methods, source devices can be light-emitting diodes (LEDs) such as inorganic light-emitting diodes made in crystalline inorganic semiconductor materials.

Because the source wafers are typically more expensive and smaller than the destination substrate and the spatial density of the source devices on the source wafer is much greater than the spatial density of the transferred source devices on the destination wafer, micro-transfer printing stamps transfer sparse arrays of source devices from the source wafer to the destination substrate. Because the arrays of source devices on the stamp are relatively sparse, a relatively large number of transfer steps with relatively fewer source devices is required. Since many transfer steps with fewer source devices takes a longer time than fewer transfer steps with more source devices, this process can take a longer time than is desirable.

Thus, according to methods of the present invention, an intermediate wafer having a patterned array of micro-transfer printable intermediate supports is provided and populated with source devices from the source wafer using a spatially dense source stamp. The intermediate wafer is larger than the source wafer. The size of source wafers is limited because the source devices are processed using photolithographic tools designed for semiconductor wafers and the tools have a limited size handling capability, for example handling <NUM>-, <NUM>-, <NUM>-, or <NUM>-inch wafers. In contrast, the intermediate wafer does not have to be a semiconductor substrate and can therefore be larger and have an alternative shape, such as a rectangular shape.

Once the larger intermediate wafer is populated at high density using the spatially dense source stamp, the source devices are micro-transfer printed from the intermediate wafer to the destination substrate using a larger spatially sparse intermediate stamp. The destination substrate is larger than the intermediate substrate which is larger than the source wafer. Thus, the larger intermediate stamp can transfer more source devices from the intermediate substrate to the destination substrate with fewer stamping operations than the smaller source stamp.

In a further embodiment, a plurality of source wafers with different source devices are provided and a plurality of the different source devices are micro-transfer printed onto the intermediate wafer. For example, the source wafers can supply red, green, and blue LEDs so that each intermediate device includes one each of the red, green, and blue LEDs and forms a full-color pixel in a display. In another embodiment, a small integrated circuit (chiplet) controller is also micro-transfer printed onto the intermediate support to control other source devices, for example, an active-matrix controller can control a full-color pixel having red, green, and blue LEDs.

In another embodiment, the plurality of devices in an intermediate device are electrically connected with electrical connections on the intermediate support. Because the intermediate wafer is smaller than the destination substrate, it is easier to provide higher resolution electrical connections at lower cost on the intermediate wafer than on the destination substrate. Electrical connections can also be provided on the destination substrate at a lower resolution than on the intermediate wafer.

In alternative embodiments of the present invention, the source devices or the intermediate devices, or both, include connection posts or spikes electrically connected to elements of the source or intermediate devices. The connection posts can contact electrical connections or electrical contact pads when the devices are micro-transfer printed. This method avoids forming electrical connections using photolithography after micro-transfer printing.

Systems in accordance with the present invention are defined in appended claims <NUM> and <NUM>.

Embodiments of the present invention enable the micro-transfer printing of spatially dense source devices from a relatively small source wafer to a spatially sparse arrangement of source devices, or intermediate devices including source devices, on a relatively large destination substrate with fewer printing steps, thereby reducing manufacturing time and cost.

In certain embodiments, the method includes providing a plurality of source wafers, each source wafer having a plurality of micro-transfer printable source devices arranged on or in the respective source wafers at a respective source spatial density, and micro-transfer printing the source devices from the plurality of source wafers to the intermediate supports of the intermediate wafer with one or more source stamps at the source transfer density so that each intermediate device has a plurality of source devices.

In certain embodiments, the source wafer is a first source wafer, the source devices are first source devices, the source stamp is a first source stamp, and the source spatial density is a first source spatial density and comprising providing a second source wafer having a plurality of micro-transfer printable second source devices arranged on or in the second source wafers at a second source spatial density, and micro-transfer printing the second source devices from the second source wafer to the intermediate supports of the intermediate wafer with one or more second source stamps at the second source transfer density so that each intermediate device has a first source device and a second source device.

In certain embodiments, the method includes forming intermediate electrical connections between the source devices on the intermediate support at an intermediate resolution and forming destination electrical connections between the intermediate devices on the destination substrate at a destination resolution less than the intermediate resolution.

In certain embodiments, the method includes forming intermediate electrical connections at an intermediate resolution of less than or equal to <NUM> microns, <NUM> microns, two microns or one micro and forming destination electrical connections at a destination resolution of greater than or equal to <NUM> microns, <NUM> microns, <NUM> microns or <NUM> microns.

In certain embodiments, the method includes providing the intermediate stamp with a larger extent over the intermediate wafer than the source stamp over the source wafer.

In certain embodiments, the method includes providing the source wafer with a <NUM>-inch diameter, an <NUM>-inch diameter, a <NUM>-inch diameter, or a <NUM>-inch diameter and comprising providing the intermediate wafer with a diameter, diagonal, or side of <NUM> inches, <NUM> inches, <NUM> inches, <NUM> inches, <NUM> inches, <NUM> inches, <NUM> inches, <NUM> inches, or <NUM> inches.

In certain embodiments, the method includes providing a red source wafer having source devices that are red light-emitting diodes that can emit red light, providing a green source wafer having source devices that are green light-emitting diodes that can emit green light, providing a blue source wafer having source devices that are blue light-emitting diodes that can emit blue light, and wherein each intermediate device includes a red, a green, and a blue light-emitting diode.

In certain embodiments, the method includes providing a chiplet source wafer having integrated circuit control chiplet source devices, and wherein each intermediate device includes an integrated circuit control chiplet.

In certain embodiments, the method includes providing the intermediate support with an extent that is greater than the extent of the source device.

In certain embodiments, the method includes one or more of providing the intermediate wafer with a spatial format matched to the source stamp or the intermediate stamp, providing the destination substrate with a spatial format matched to the intermediate stamp, and providing the intermediate wafer with a spatial format matched to the destination substrate.

In certain embodiments, the method includes providing the source stamp with a diameter, diagonal, or edge of less than or equal to <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, or <NUM> and providing the intermediate stamp with a diameter, diagonal, or edge of greater than or equal to <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, or <NUM>.

In certain embodiments, the method includes micro-transfer printing more source devices from the source wafer to the intermediate wafer with the source stamp in a single stamp operation than are transferred by micro-transfer printing intermediate devices from the intermediate wafer to the destination substrate with the intermediate stamp in a single stamp operation.

In certain embodiments, the method includes providing the source wafer with micro-transfer printable source devices having connection posts or providing the intermediate wafer with micro-transfer printable intermediate supports having connection posts.

In certain embodiments, the method includes providing destination electrical connections on the destination substrate and electrically connecting the intermediate devices to the electrical connections on the destination substrate with the connection posts.

In certain embodiments, the method includes providing intermediate electrical connections on the intermediate support and electrically connecting the source devices to the electrical connections on the intermediate support with the connection posts.

In certain embodiments, the method includes providing the source devices as light-emitting diodes or providing the destination substrate as a display substrate.

In certain embodiments, the source devices are light-emitting diodes or the destination substrate is a display substrate.

The foregoing and other objects, aspects, features, and advantages of the present disclosure will become more apparent and better understood by referring to the following description taken in conjunction with the accompanying drawings, in which:.

The features and advantages of the present disclosure will become more apparent from the detailed description set forth below when taken in conjunction with the drawings, in which like reference characters identify corresponding elements throughout. The figures are not drawn to scale since the variation in size of various elements in the Figures is too great to permit depiction to scale.

The present invention provides structures and methods for efficiently micro-transfer printing source devices from a source wafer to a destination substrate. Referring to the flow chart of <FIG> and the schematic illustration of <FIG>, in an embodiment of the present invention a method of making a micro-transfer printed system or device includes providing a source wafer <NUM> in step <NUM>. The source wafer <NUM> can be, for example, a semiconductor wafer or a compound semiconductor wafer. The source wafer <NUM> is provided in step <NUM> with a plurality of micro-transfer printable source devices <NUM> arranged in or on the source wafer <NUM> at a source spatial density. The source spatial density is the number of source devices <NUM> per unit area of the source wafer <NUM>. The source devices <NUM> can be formed using integrated circuit photolithographic processes and, in certain embodiment, the source devices <NUM> are or include electronic elements such as light-emitting diodes (LEDs). In certain embodiments the source devices <NUM> are or include electronic elements such as small integrated circuits such as chiplets including digital or analog logic circuits.

In step <NUM>, an intermediate wafer <NUM> is provided. The intermediate wafer <NUM> can be glass, polymer, metal, ceramic, or a semiconductor wafer such as a silicon wafer. In step <NUM>, a plurality of micro-transfer printable intermediate supports <NUM> are formed in the intermediate wafer <NUM> at an intermediate spatial density that is less than or equal to the source spatial density. The intermediate spatial density is the number of intermediate substrates <NUM> per unit area of the intermediate wafer <NUM>. The intermediate wafer <NUM> can be or include glass, polymer, quartz, metal, or semiconductor and can be any substrate on which the source devices <NUM> can be micro-transfer printed or interconnected on the micro-transfer printable intermediate supports <NUM>. A destination substrate <NUM> is provided in step <NUM> and can have electrical conductors (e.g., row conductors <NUM> and column conductors <NUM> arranged in orthogonal arrays) formed in step <NUM>. The destination substrate <NUM> can be, but is not necessarily, a display substrate <NUM> used in a flat-panel display (e.g., including glass, polymer, ceramic, or metal) and the row and column conductors <NUM>, <NUM> can be metal wires or electrical conductors formed using photolithographic methods and tools.

Referring next to step <NUM>, the source devices <NUM> are micro-transfer printed from the source wafer <NUM> to the intermediate supports <NUM> of the intermediate wafer <NUM> with a source stamp to make an intermediate device <NUM> on each intermediate support <NUM>. The source stamp has a plurality of source stamp posts at a source transfer density defined as the number of effective source stamp posts per unit area of the source stamp. An effective source stamp post is a source stamp post that picks up a source device <NUM>. The source transfer density can be less than or the same as the source spatial density. In certain embodiments, electrical conductors <NUM> (<FIG>) are formed to electrically connect the source devices <NUM> (not shown in <FIG>) on a respective intermediate support <NUM>. In step <NUM>, the intermediate devices <NUM> on the intermediate supports <NUM> of the intermediate wafer <NUM> are micro-transfer printed to the destination substrate <NUM> at a destination spatial density that is less than the source spatial density with an intermediate stamp. The intermediate stamp can have a plurality of intermediate stamp posts at an intermediate transfer density less than the source transfer density, the intermediate transfer density defined as the number of effective intermediate stamp posts per unit area of the intermediate stamp. An effective intermediate stamp post is an intermediate stamp post that picks up an intermediate device <NUM>. The intermediate devices <NUM> can be electrically connected on the destination substrate <NUM> with electrical conductors (e.g., row conductors <NUM> and column conductors <NUM>) using photolithographic methods and materials in step <NUM>.

As also shown in <FIG>, in a further embodiment of the present invention a plurality of source wafers <NUM> are provided. Each source wafer <NUM> has a plurality of micro-transfer printable source devices <NUM> arranged in or on the respective source wafers <NUM> at a respective source spatial density. The source devices <NUM> from the plurality of source wafers <NUM> are micro-transfer printed to the intermediate wafer <NUM> with one or more source stamps at the respective source transfer density so that each intermediate device <NUM> has a plurality of source devices <NUM>. For example, first and second source wafers <NUM> can be provided having respective first and second source devices <NUM> at respective first and second source spatial densities that are micro-transfer printed to the intermediate wafer <NUM> using respective first and second source stamps at respective first and second source transfer densities so that each intermediate device <NUM> has a first source device <NUM> and a second source device <NUM>. The first and second source spatial densities can be the same, or different and the first and second source transfer densities can also be the same, or different. Additional source wafers and source stamps may be used. A source stamp may be used to pick up and print devices from multiple source wafers (i.e., in different print operations) such that a single stamp can be used to print multiple devices to the same intermediate support.

As shown in <FIG>, the plurality of source wafers <NUM> can include a red source wafer 10R having source devices 12R that are red light-emitting diodes that can emit red light, a green source wafer <NUM> having source devices <NUM> that are green light-emitting diodes that can emit green light, and a blue source wafer 10B having source devices 12B that are blue light-emitting diodes that can emit blue light. Thus, each intermediate device <NUM> includes a red, a green, and a blue light-emitting diode on each respective intermediate support <NUM> and can be a full-color pixel in a display. In a further embodiment of the present invention, a chiplet source wafer <NUM> having integrated circuit control chiplet source devices <NUM> is provided so that each intermediate device <NUM> includes an integrated circuit control chiplet on the intermediate support <NUM>. The integrated circuit control chiplet source device <NUM> can control other source devices <NUM> in the intermediate device <NUM>. For example, the integrated circuit control chiplet source device <NUM> can provide active-matrix control to LEDs in a full-color pixel intermediate device <NUM>. Active-matrix control circuits can be formed in small integrated circuits using photolithographic integrated circuit methods, tools, and materials.

Referring to <FIG>, a source wafer <NUM> includes a source wafer substrate <NUM> having a patterned sacrificial layer <NUM> forming a plurality of sacrificial portions <NUM> spatially and laterally separated by anchors <NUM>. The anchors <NUM> can be portions of the source wafer substrate <NUM>. The source wafer substrate <NUM> can be a semiconductor or compound semiconductor. A source device <NUM>, for example, including an LED made of a compound semiconductor such as GaN, is disposed or formed on or over each sacrificial portion <NUM>. In the example of <FIG>, the LED includes source device electrical contacts <NUM> and patterned dielectric materials <NUM> to electrically insulate portions of the LED. The source device electrical contacts <NUM> are electrically connected to electrodes <NUM>. In certain embodiments, as shown here, and the entire source device <NUM> is encapsulated with an encapsulation layer <NUM> for environmental protection and to provide mechanical robustness.

In an embodiment, the electrodes <NUM> are electrically connected on the intermediate support <NUM> or the destination substrate <NUM> using photolithography. In an alternative embodiment, and as shown in <FIG>, the electrodes <NUM> form source connection posts <NUM> or spikes. When the source device <NUM> is micro-transfer printed, the source connection posts <NUM> can contact intermediate electrical conductors <NUM> (<FIG>) to form an electrical connection. Demonstrations have shown that the source connection posts <NUM> can deform or pierce the intermediate electrical conductors <NUM> to form the electrical connection. Connection posts <NUM> are discussed in more detail, in <CIT>, and in <CIT>. Additionally, systems and methods for driving display systems are described in <CIT>, entitled Serial Row-Select Matrix-Addressed System. Printable LEDs are described in <CIT>, entitled Micro-Transfer Printable LED Component.

The sacrificial layer <NUM> can be an oxide layer or a selected portion of the source wafer substrate <NUM> that can be anisotropically etched. The patterned dielectric material <NUM> can be silicon nitride or silicon dioxide, as can the encapsulation layer <NUM>. The electrodes <NUM> can be a metal, for example aluminum, gold, silver, tungsten, tantalum, titanium or other metals or metal alloys. These elements can be deposited (e.g., by evaporation or coating) and patterned (e.g., with photo-sensitive material and exposure masks) using photolithographic methods, materials, and tools.

The structure of <FIG> can be made by providing the source wafer substrate <NUM>, depositing and then patterning the sacrificial layer <NUM> to form the sacrificial portions <NUM> and anchors <NUM>. Forms for the spikes are pattern-wise etched into the sacrificial portions <NUM>. In one embodiment, a desired element (such as an LED or integrated circuit chiplet) is disposed on the sacrificial portions <NUM> by micro-transfer printing from a device substrate. In another embodiment, the desired element is formed on the sacrificial portions <NUM> using photolithographic techniques. In one method, a patterned epitaxial growth layer is provided upon the sacrificial layer <NUM> and structures are formed on the epitaxial growth layer. The electrodes <NUM> are then deposited and patterned, as is the encapsulation layer <NUM>.

In a method of the present invention, the patterned sacrificial layer <NUM> is a patterned layer of material different from the source wafer substrate <NUM> material that can be etched to form a gap between the source device <NUM> and the source wafer substrate <NUM>. In another method of the present invention, the patterned sacrificial layer <NUM> is a defined portion of the source wafer substrate <NUM> that can be anisotropically etched to form a gap between the source device <NUM> and the source wafer substrate <NUM>. In an embodiment, the sacrificial portions <NUM> are gaps. In any case, the gap results in a tether <NUM> that physically connects the source device <NUM> to the anchor <NUM> so that a stamp post of a micro-transfer stamp can contact the source device <NUM>, fracture the tether <NUM> to release the source device <NUM> from the source wafer <NUM>, and adhere the source device <NUM> to the stamp post and thereby enable the source device <NUM> to be micro-transferred to the intermediate support <NUM>.

Referring to <FIG>, an intermediate wafer <NUM> includes an intermediate wafer substrate <NUM> having a patterned sacrificial layer <NUM> forming a plurality of sacrificial portions <NUM> spatially separated by anchors <NUM>. The anchors <NUM> can be portions of the intermediate wafer substrate <NUM>. An intermediate support <NUM> is disposed on each sacrificial portion <NUM> and one or more source devices <NUM>, such as red, green, and blue source devices 12R, <NUM>, 12B, are disposed on or over each intermediate support <NUM>. Intermediate electrical conductors <NUM> (such as wires) can be formed on the intermediate support <NUM> and electrically connect the source devices <NUM> and the connection posts <NUM> (if present). For clarity, the red, green, and blue source devices 12R, <NUM>, 12B are illustrated in a linear arrangement rather than the triangular arrangement of <FIG>. However, the source devices <NUM> can be disposed on the intermediate support <NUM> in any desired arrangement.

In an embodiment, the electrodes <NUM> of the source devices <NUM> are electrically connected to the intermediate electrical conductors <NUM> using photolithography or the intermediate electrical conductors <NUM> are formed using photolithography. In an alternative embodiment, and as shown in <FIG>, the electrodes <NUM> form source connection posts <NUM> (<FIG>) that impinge upon or pierce the intermediate electrical conductors <NUM> to form an electrical connection. In a further embodiment, the intermediate electrical conductors <NUM> form intermediate connection posts <NUM> or spikes. When the intermediate device <NUM> is micro-transfer printed, the intermediate connection posts <NUM> can contact electrical conductors (e.g., row and column conductors <NUM>, <NUM>) on a destination substrate <NUM> to form an electrical connection.

The sacrificial layer <NUM> can be an oxide layer or a selected portion of the intermediate wafer substrate <NUM> that can be anisotropically etched, the intermediate support <NUM> can be silicon nitride, silicon dioxide, a resin, a cured resin, or a polymer. In various embodiments, the patterned intermediate supports <NUM> can be glass, resin, an oxide, or a nitride and can be deposited by coating, evaporation, or sputtering. In an embodiment, the intermediate device <NUM> is encapsulated (not shown), for example with a resin. The intermediate electrical conductors <NUM>, row conductors <NUM>, or column conductors <NUM> can be a metal, for example aluminum, gold, silver, tungsten, tantalum, titanium or other metals or metal alloys. These elements can be deposited (e.g., by evaporation or coating) and patterned (e.g., with photo-sensitive material and exposure masks) using photolithographic methods, materials, and tools.

The structure of <FIG> can be made by providing the intermediate wafer substrate <NUM>, depositing and then patterning the sacrificial layer <NUM> to form the sacrificial portions <NUM> and anchors <NUM>. An intermediate support <NUM> is provided, for example by evaporation or coating and patterned using photolithographic methods. Forms for the spikes are etched into the intermediate support <NUM> or sacrificial portions <NUM>. The source devices <NUM> are disposed on the intermediate support <NUM> by micro-transfer printing from the source wafer <NUM>. If source connection posts <NUM> are not used, the intermediate electrical conductors <NUM> are then deposited and patterned, as is the encapsulation layer, if present.

In a method of the present invention, the patterned sacrificial layer <NUM> is a patterned layer of material different from the source wafer substrate <NUM> material that can be etched to form a gap between the intermediate support <NUM> and the intermediate wafer substrate <NUM>. In another method of the present invention, the patterned sacrificial layer <NUM> is a defined portion of the intermediate wafer substrate <NUM> that can be anisotropically etched to form a gap between the intermediate device <NUM> and the intermediate wafer substrate <NUM>. In an embodiment, the sacrificial portions <NUM> are gaps. In any case, the gap results in a tether <NUM> that physically connects the intermediate device <NUM> to the anchor <NUM> so that a stamp post of a micro-transfer stamp can contact the intermediate device <NUM>, fracture the tether <NUM> to release the intermediate device <NUM> from the intermediate wafer <NUM> and adhere the intermediate device <NUM> to the stamp post and thereby enable the intermediate device <NUM> to be micro-transfer printed to the destination substrate <NUM>. In various embodiments of the present invention, the patterned sacrificial layer <NUM> or the sacrificial portions <NUM> are a pattern of etchable material distinct from the source wafer substrate <NUM> material, are a pattern of defined portions of the source wafer substrate <NUM> material that are anisotropically etchable, or are a pattern of gaps forming a space between the source devices <NUM> and the source wafer substrate <NUM>.

In another embodiment of the present invention, the source devices <NUM> micro-transfer printed onto the intermediate support <NUM> are electrically connected with intermediate electrical conductors <NUM> between the source devices <NUM> on the intermediate support <NUM> at an intermediate resolution. Destination substrate electrical conductors (e.g., the row conductors <NUM> and column conductors <NUM>) electrically connect the intermediate devices <NUM> on the destination substrate <NUM> at a destination resolution less than the intermediate resolution. The resolution of an electrical conductor or connection is the size of the smallest element in a dimension over an area that can be reliably made or the minimum spacing between components that can be reliably achieved without electrical shorts. In various embodiments, the intermediate electrical connections have an intermediate resolution of less than or equal to <NUM> microns, less than or equal to <NUM> microns, less than or equal to two microns or less than or equal to one micro and the destination electrical connections have a destination resolution of greater than or equal to <NUM> microns, greater than or equal to <NUM> microns, greater than or equal to <NUM> microns or greater than or equal to <NUM> microns.

In an embodiment of the present invention, the intermediate stamp is provided with a larger extent over the intermediate wafer <NUM> than the source stamp is provided with over the source wafer <NUM>. Wafers are typically relatively thin and flat, having an area with dimensions (typically represented as the x and y dimensions as shown in <FIG>) that are much greater than the thickness of the wafer (typically represented as the z dimension). The stamp extent is the contiguous area enclosed by a convex hull perimeter surrounding the stamp posts. In various embodiments, the source stamp is provided with a diameter, diagonal, or edge of less than or equal to <NUM>, less than or equal to <NUM>, less than or equal to <NUM>, less than or equal to <NUM>, less than or equal to <NUM>, or less than or equal to <NUM>. The intermediate stamp can be provided with a diameter, diagonal, or edge of greater than or equal to <NUM>, <NUM>, greater than or equal to <NUM>, greater than or equal to <NUM>, greater than or equal to <NUM>, greater than or equal to <NUM>, greater than or equal to <NUM>, or greater than or equal to <NUM>.

In an embodiment of the present invention, the intermediate wafer <NUM> is provided with a larger extent than the source wafer <NUM> and the destination substrate <NUM> is provided with a larger extent than the intermediate wafer <NUM>. Furthermore, the intermediate support <NUM> can be provided with an extent that is greater than the extent of the source device <NUM>. The extent of a wafer or substrate is the area of the wafer or substrate in the x, y dimensions or the contiguous area enclosed by a convex hull perimeter surrounding the source devices <NUM> on the wafer or substrate surface. The source wafers <NUM> can be provided with a <NUM>-inch diameter, an <NUM>-inch diameter, a <NUM>-inch diameter, a <NUM>-inch diameter, or a <NUM>-inch diameter, or less. The intermediate wafer <NUM> can be provided with a diameter, diagonal, or side of <NUM> inches, <NUM> inches, <NUM> inches, <NUM> inches, <NUM> inches, <NUM> inches, <NUM> inches, <NUM> inches, <NUM> inches, <NUM> inches, or more. In general, the source wafers <NUM> have a circular cross section with a flat edge forming a chord. The intermediate wafer <NUM> can have the shape of a conventional semiconductor wafer or have a rectangular shape as can the display substrate <NUM>.

In another embodiment, the intermediate wafer <NUM> is provided with a spatial format matched to the source stamp or the intermediate stamp. Alternatively or in addition, the destination substrate <NUM> is provided with a spatial format matched to the intermediate stamp. In yet another embodiment, the intermediate wafer <NUM> is provided with a spatial format matched to the destination substrate <NUM>. The spatial format of a wafer or substrate is the shape of the wafer or substrate, for example rectangular, square, or circular. Alternatively, the spatial format of a wafer or substrate is the shape of a contiguous area enclosed by a convex hull perimeter surrounding the source devices <NUM> or intermediate supports <NUM> on the wafer or substrate surface.

In a further embodiment of the present invention, more source devices <NUM> are micro-transfer printed from the source wafer <NUM> to the intermediate wafer <NUM> with the source stamp in a single stamp operation than are transferred by micro-transfer printing intermediate devices <NUM> from the intermediate wafer <NUM> to the destination substrate <NUM> with the intermediate stamp in a single stamp operation. In general, the source stamp will have a denser arrangement of stamp posts and a smaller extent than the intermediate stamp and the intermediate stamp will have a sparser arrangement of stamp posts and a greater extent than the source stamp.

In an embodiment of the present invention and as illustrated in <FIG>, the source wafer <NUM> is provided with micro-transfer printable source devices <NUM> having source connection posts <NUM>. The source connection posts <NUM> can electrically connect the electrodes <NUM> (<FIG>) to the intermediate electrical connections <NUM> on the intermediate support <NUM> to electrically connect the source devices <NUM> to the intermediate electrical connections <NUM> on the intermediate support <NUM> and to the intermediate connection posts <NUM> of the intermediate support <NUM>. Similarly, as illustrated in <FIG>, the intermediate wafer <NUM> is provided with micro-transfer printable intermediate supports <NUM> having intermediate connection posts <NUM>. The intermediate connection posts <NUM> can electrically connect the intermediate electrical connections <NUM> (and electrodes <NUM> of <FIG>) to the destination electrical connections (e.g., row conductors <NUM> and column conductors <NUM>) on the destination substrate <NUM> to electrically connect the source devices <NUM> to the row and column conductors <NUM>, <NUM> of the destination substrate <NUM>.

In operation, a controller (not shown) provides electrical signals, power, and a ground reference to the row conductors <NUM> and column conductors <NUM> on the destination substrate <NUM>. The electrical signals pass through the row conductors <NUM> and column conductors <NUM>, the intermediate connection posts <NUM>, the intermediate electrical conductors <NUM> of the intermediate wafer <NUM>, the source connection posts <NUM>, and the electrodes <NUM> to the source electronic element, such as an LED, to control the electronic element.

A system for making a micro-transfer printed device includes a source wafer <NUM> having a plurality of micro-transfer printable source devices <NUM> arranged in or on the source wafer <NUM> at a source spatial density; an intermediate wafer <NUM> having a plurality of micro-transfer printable intermediate supports <NUM> arranged in or on the intermediate wafer <NUM> at an intermediate spatial density less than or equal to the source spatial density; a destination substrate <NUM>; a source stamp having a source transfer density; an intermediate stamp having an intermediate transfer density less than the source transfer density; a micro-transfer printer for micro-transfer printing the source devices <NUM> from the source wafer <NUM> to the intermediate supports <NUM> of the intermediate wafer <NUM> with a source stamp at a source transfer density to make an intermediate device <NUM> on each intermediate support <NUM>; a micro-transfer printer for micro-transfer printing the intermediate devices <NUM> from the intermediate wafer <NUM> to the destination substrate <NUM> at a destination spatial density less than the source spatial density with an intermediate stamp at an intermediate transfer density less than the source transfer density. The source devices <NUM> can be light-emitting diodes. The destination substrate <NUM> can be a display substrate.

In a simplified theoretical illustration of the advantages of the present invention, the destination substrate <NUM> is a display substrate and the source devices <NUM> are LEDs <NUM>. A source wafer <NUM> has a <NUM> x <NUM> array of LEDs <NUM>, each LED <NUM> having an area of <NUM> microns x <NUM> microns on a <NUM>-micron pitch, so that the source wafer <NUM> has <NUM>,<NUM> LEDs <NUM> and an extent of <NUM> x <NUM>. The destination substrate <NUM> requires a <NUM>,<NUM> x <NUM>,<NUM> array of LEDs <NUM> on a <NUM> pitch so that the destination substrate <NUM> has <NUM>,<NUM>,<NUM> LEDs <NUM> and an extent of <NUM> x <NUM>. Thus, the spatial density of the LEDs on the source wafer <NUM> is <NUM> times the spatial density of the LEDs on the destination substrate <NUM>. Referring to <FIG>, the LEDs <NUM> on the source wafer <NUM> can be directly micro-transfer printed to the destination substrate <NUM> with a source stamp. Because of the size and density of the source wafer <NUM> compared to the destination substrate <NUM>, the source stamp can transfer a <NUM> x <NUM> array of LEDs <NUM> on a <NUM> pitch in each of the x and y dimensions. Therefore, <NUM> LEDs <NUM> are transferred in each stamp operation so that to completely populate the destination substrate <NUM> requires <NUM>,<NUM> stamp operations.

In contrast, and according to an embodiment of the present invention, referring again to <FIG>, the LEDs <NUM> are micro-transfer printed from the source wafer <NUM> to the intermediate wafer <NUM>. This transfer can be done multiple times at the same spatial density so that all <NUM>,<NUM> of the LEDs (i.e., LEDs <NUM>) on a source wafer <NUM> are transferred in one source stamp operation and the entire <NUM>,<NUM> x <NUM>,<NUM> array of LEDs (i.e., LEDs <NUM>) can be disposed on the intermediate substrate in <NUM> stamp operations from <NUM> different source wafers (i.e., source wafers <NUM>). The intermediate wafer (i.e., intermediate wafer <NUM>) must have an array of intermediate substrates (i.e., intermediate substrates <NUM>) at the same <NUM>-micron pitch in each of the x and y dimensions and a size of <NUM> in each dimension (<NUM>,<NUM> x <NUM> microns). The intermediate substrates (i.e., intermediate substrates <NUM>) can have any size up to <NUM> microns on a side, for example <NUM> microns x <NUM> microns. The intermediate devices (i.e., intermediate devices <NUM>) (including an LED <NUM> and intermediate support <NUM>) are then micro-transfer printed to the destination substrate (i.e., destination substrate <NUM>). The intermediate stamp can transfer an array of <NUM> x <NUM> intermediate devices (i.e., intermediate devices <NUM>) in each intermediate stamp operation since the difference in spatial density between the intermediate wafer (i.e., intermediate wafer <NUM>) and the destination substrate (i.e., destination substrate <NUM>) is a factor of <NUM> in each of the x and y dimensions. Therefore, <NUM>,<NUM> intermediate devices (i.e., intermediate devices <NUM>) are transferred in each intermediate stamp operation and <NUM> intermediate stamp operations are needed to fully populate the destination substrate (i.e., destination substrate <NUM>). Thus, according to this example of the present invention, <NUM> plus <NUM> equals <NUM> stamp operations are needed to micro-transfer print the LEDs <NUM> from the source wafer (i.e., source wafer <NUM>) to the destination substrate (i.e., destination substrate <NUM>) compared to <NUM>,<NUM> operations using a direct micro-transfer printing method, resulting in a reduction of <NUM>% in stamp operations.

In a further example, the display is a full-color display and three source devices (i.e., source devices <NUM> - a red LED 12R, a green LED <NUM>, and a blue LED 12B) are micro-transfer printed from the red, green, and blue source wafers (i.e., wafers 10R, <NUM>, and 10B). Using the direct printing method of <FIG>, three times the number of transfers are necessary, for a total of <NUM>,<NUM> transfers. Using a method of the present invention as illustrated in <FIG>, three times the number of transfers are needed to populate the intermediate supports (i.e., intermediate supports <NUM>) of the intermediate wafer (i.e., intermediate wafer <NUM>), totaling <NUM> micro transfer print operations. Each intermediate support (i.e., intermediate support <NUM>) can have a size of <NUM> microns x <NUM> microns and will then have one each of a red LED 12R, a green LED <NUM>, and a blue LED 12B to make up the intermediate device (i.e., intermediate device <NUM>). The intermediate devices (i.e., intermediate devices <NUM>) are then micro-transfer printed to the destination substrate (i.e., destination substrate <NUM>) in <NUM> print operations as before for a total of <NUM> micro-transfer print operations. This compares with the <NUM>,<NUM> print operations required in the illustration of <FIG> and is a reduction of <NUM>% in stamp operations.

In one example, red, green, and blue LEDs (i.e., 12R, <NUM>, 12B) are provided on source wafers (i.e., 10R, <NUM>, 10B), each source wafer (i.e., source wafer <NUM>) having <NUM> LEDs (i.e., LEDs <NUM>) per inch and <NUM>,<NUM>,<NUM> LEDs in total on the source wafer. One each of the red, green, and blue LED source wafers <NUM> can supply <NUM> displays with <NUM> pixels per inch for a VGA-resolution <NUM> x <NUM> display of <NUM> by <NUM> and <NUM>,<NUM> pixels per display. Using the direct print method of <FIG>, <NUM> print steps are required to populate the display, as shown in <FIG>. As illustrated in <FIG>, using the method of <FIG> and according to an embodiment of the present invention, an intermediate wafer (i.e., intermediate wafer <NUM>) has <NUM> LEDs (i.e., LEDs <NUM>) per inch and <NUM>,<NUM>,<NUM> intermediate supports (i.e., intermediate supports <NUM>), each forming a full-color pixel intermediate device (i.e., intermediate device <NUM>) with a red, green, and blue LED (e.g., 12R, <NUM>, 12B). Each intermediate wafer (i.e., intermediate wafer <NUM>) can supply enough intermediate devices (i.e., intermediate devices <NUM>) for <NUM> displays. Each display of <NUM>,<NUM> pixels can be micro-transfer printed in a single step, representing (on average) <NUM> transfer printing operations per display, a reduction of <NUM>% in micro-transfer print operations compared to the direct print approach.

In another example, red, green, and blue LED 12R, <NUM>, 12B are provided on <NUM> source wafers 10R, <NUM>, 10B each having <NUM> x <NUM> LEDs per inch and <NUM>,<NUM>,<NUM> LEDs (i.e., LEDs <NUM>) per source wafer <NUM> sufficient to supply <NUM> VGA (<NUM> x <NUM>) displays. Using a stamp size of <NUM> x <NUM>, it would again require <NUM> direct micro-transfer print operations using the direct micro-transfer printing method of <FIG>. A <NUM> intermediate wafer can be completely populated in <NUM> steps and can supply <NUM> displays, each display micro-transfer printed in a single micro-transfer print operation, representing (on average) <NUM> transfer printing operations per display, a reduction of <NUM>% in micro-transfer print operations compared to the direct print approach. In this example, the intermediate resolution can be <NUM>-micron lines and spaces and the destination resolution can be <NUM>-micron lines and spaces.

In another example using a single rectangle layout for the red, green, and blue LEDs 12R, <NUM>, 12B on the respective source wafers 10R, <NUM>, 10B, each source wafer (i.e., source wafer <NUM>) has <NUM>,<NUM>,<NUM> LEDs (i.e., LEDs <NUM>), enough to supply <NUM> displays. Using a larger stamp size of <NUM> x <NUM><NUM>, the number of micro-transfer print steps for the direct approach is reduced to <NUM>. The equivalent number of steps using a method of the present invention is <NUM> prints per display, for an improvement of <NUM>%. In general, if the wafers and stamps are larger and more expensive, the relative advantage of the method of the present invention is decreased, for example to <NUM>%, and if the wafers and stamps are smaller, the relative advantage is increased, for example to <NUM>%. Cost modeling demonstrates that methods of the present invention provide manufacturing cost savings.

The source devices <NUM> can be active components, for example including one or more active elements such as electronic transistors or diodes or light-emitting diodes and photodiodes that produce an electrical current in response to ambient light as well as passive components such as resistors, capacitors, or conductors. The source devices <NUM> can be semiconductor devices having one or more semiconductor layers, such as an integrated circuit. The source devices <NUM> can be unpackaged die. In yet another embodiment, the intermediate devices <NUM> are compound elements having a plurality of active or passive elements, such as multiple semiconductor devices with separate substrates, each with one or more active elements or passive elements, or both.

The source devices <NUM> made by methods of the present invention can include or be a variety of chiplets having semiconductor structures, including a diode, a light-emitting diode (LED), a transistor, or a laser. The source devices <NUM> can include inorganic materials such as silicon or gallium arsenide, or inorganic materials having various structures, including crystalline, microcrystalline, polycrystalline, or amorphous structures. The source devices <NUM> or intermediate devices <NUM> can also include insulating layers and structures such as silicon dioxide, nitride, and passivation layers and conductive layers or structures such as wires made of aluminum, titanium, silver, or gold that form an electronic circuit.

Chiplets are small integrated circuits and can be unpackaged dies released from a source wafer <NUM> and can be micro transfer printed. Chiplets can have at least one of a width, length, and height from <NUM> to <NUM>, <NUM> to <NUM>, <NUM> to <NUM>, or <NUM> to <NUM>. Chiplets can have a doped or undoped semiconductor substrate thickness of <NUM> to <NUM>, <NUM> to <NUM>, <NUM> to <NUM>, or <NUM> to <NUM>. The chiplet or source devices <NUM> can be micro-light-emitting diodes with a length greater than width, for example having an aspect ratio greater than or equal to <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, or <NUM> and electrical contact pads <NUM> that are adjacent to the ends of the printable semiconductor source devices <NUM> along the length of the printable semiconductor source devices <NUM>. This structure enables low-precision manufacturing processes to electrically connect wires to the source device electrical contact pads <NUM> without creating registration problems and possible unwanted electrical shorts or opens.

The chiplet source devices <NUM> can be made in a source semiconductor wafer (e.g., a silicon or GaN wafer) having a process side and a back side used to handle and transport the wafer. Source devices <NUM> are formed using lithographic processes in an active layer on or in the process side of the source wafer <NUM>. An empty release layer space (e.g., the etched sacrificial layer <NUM>) is formed beneath the source devices <NUM> with tethers <NUM> connecting the source devices <NUM> to the source wafer <NUM> in such a way that mechanical pressure applied against the source devices <NUM> breaks the tethers <NUM> to release the source devices <NUM> from the source wafer <NUM>. Methods of forming such structures are described, for example, in the paper AMOLED Displays using Transfer-Printed Integrated Circuits and <CIT>. Lithographic processes for forming source devices <NUM> in a source wafer <NUM>, for example transistors, wires, and capacitors, can be found in the integrated circuit art. <CIT>, entitled Micro Assembled Micro LED Displays and Lighting Elements, describes micro-transfer printing structures and processes useful with the present invention. For a discussion of micro-transfer printing techniques see also <CIT>,<CIT> and <CIT>. Micro-transfer printing using compound micro assembly structures and methods can also be used with the present invention, for example, as described in <CIT>, entitled Compound Micro-Assembly Strategies and Devices.

According to various embodiments of the present invention, the native source wafer <NUM> can be provided with the source devices <NUM>, sacrificial layer <NUM>, tethers <NUM>, anchors <NUM>, and source connection posts <NUM> already formed, or they can be constructed as part of the process of the present invention. In certain embodiments, the source device electrical contact pads <NUM> are planar electrical connections formed on the process side of the source devices <NUM> and source wafer <NUM>. Such source device electrical contact pads <NUM> are typically formed from metals such as aluminum or polysilicon using masking and deposition processes.

The intermediate devices <NUM> can include active elements such as electronic circuits formed using lithographic processes and can include passive elements such as electrical connections, e.g., wires, to the source device electrical contact pads <NUM> and intermediate connection posts <NUM>.

Connection posts <NUM>, <NUM> are electrical connections that extend generally perpendicular to the surface of the source device <NUM> or intermediate device <NUM>. Such connection posts <NUM>, <NUM> can be formed from metals such as aluminum, titanium, tungsten, copper, silver, gold, or other conductive metals. The connection posts <NUM>, <NUM> (as shown in <FIG> and <FIG>) can be formed by repeated masking and deposition processes that build up three-dimensional structures or by using a form. In some embodiments, the connection posts <NUM>, <NUM> are made of one or more high elastic modulus metals, such as tungsten. As used herein, a high elastic modulus is an elastic modulus sufficient to maintain the function and structure of the connection post <NUM>, <NUM> when pressed into an intermediate electrical conductor <NUM>, row conductors <NUM>, or column conductors <NUM> (or electrical contact pads, not shown).

In certain embodiments, the intermediate electrical connections <NUM> or row and column conductors <NUM>, <NUM> include patterned metal layers forming electrical contact pads. The electrical contact pads can be made using integrated circuit photolithographic methods. Likewise, the connection posts <NUM>, <NUM> can be made by etching one or more layers of evaporated or sputtered metal. Such structures can also be made by forming a layers, etching a well into a surface, filling the well with a conductive material such as metal, and then removing the layer.

The connection posts <NUM>, <NUM> can have a variety of aspect ratios and typically have a peak area smaller than a base area. The connection posts <NUM>, <NUM> can have a sharp point for embedding in or piercing electrical contact pads. Structures with protruding connection posts <NUM>, <NUM> generally are discussed in <CIT>, referenced above.

In micro-transfer printing process, a stamp (e.g., the source stamp or intermediate stamp) includes a plurality of stamp posts (also referred to as pillars) that are pressed against corresponding released components (e.g., source devices <NUM> or intermediate devices <NUM>) to adhere the components to the stamp posts to transfer the pressed components from the source wafer <NUM> to the stamp posts. By pressing the stamp against the components, the tethers <NUM> are broken and the components are adhered to the stamp posts, for example by van der Waal's forces. The stamp is removed from the source wafer <NUM>, leaving the components adhered to the stamp posts.

An optional adhesive layer is coated over the intermediate wafer <NUM> or destination substrate <NUM> (the substrate). The stamp is then placed adjacent to the substrate. The components on the stamp posts of the transfer stamp are brought into alignment with the electrical conductors (e.g., row and column conductors <NUM>, <NUM> or electrical contact pads of the destination substrate <NUM> or intermediate electrical conductors <NUM> of the intermediate support <NUM>) and pressed onto or into them by micro-transfer printing with sufficient mechanical pressure against the electrical conductors to drive the connection posts <NUM>, <NUM> into or through a surface of the electrical conductors to form a robust electrical contact between the connection posts <NUM>, <NUM> of the component and the substrate electrical conductors. A sufficient mechanical pressure can be an amount of force needed to cause the substrate electrical conductors or connection post <NUM>, <NUM> to plastically deform as the connection post <NUM>, <NUM> is pressed into the substrate electrical conductors. Thus, in this embodiment, the connection posts <NUM>, <NUM> on the components may have sharp points and/or a high elastic modulus, for example, by incorporating tungsten. A connection post <NUM>, <NUM> can have a sharp point, for example, if the top of the post has an area less than <NUM> microns square, less than <NUM> microns square, or less than one micron square. The substrate electrical conductors can also provide adhesion to help adhere the components to the substrate. In an alternative embodiment, the components do not have connection posts <NUM>, <NUM> but are adhered to the substrate with the adhesive and photolithographic methods are used to form the electrical connections.

The adhesion between the components and the receiving side of the substrate should be greater than the adhesion between the components and the stamp posts of the transfer stamp. Thus, when the transfer stamp is removed from the receiving side of the substrate, the components adhere more strongly to the substrate than to the transfer stamp, thereby transferring the components from the transfer stamp to the receiving side of the destination substrate <NUM>.

The transfer stamp is then removed leaving the components adhered to the substrate. An optional heat treatment can solder or weld the connection posts <NUM>, <NUM> (if present) of the components to the substrate electrical contacts. Thus, in a further method of the present invention, the substrate electrical contacts (or connection posts <NUM>, <NUM>) are heated, causing the substrate electrical contact metal to reflow and improve adhesion between the components and the substrate and improve the electrical connection to the connection posts <NUM>, <NUM>.

The spatial distribution of the source devices <NUM> or intermediate devices <NUM> is a matter of design choice for the end product desired.

The connection posts <NUM>, <NUM> can be made by pattern-wise etching a forming layer. For example, a silicon <NUM> wafer can be etched by a combination of dielectric hard masks, photolithography, mask etching, and anisotropic silicon wet etching with, for example KOH or TMAH, or dry etching. A layer of conductive material is deposited, for example with evaporation, e-beam deposition, sputtering, or CVD, and patterned by etching through a patterned photoresist mask, to form connection posts <NUM>, <NUM> at least in the form and optionally also on the planar surface of the underlying substrate (e.g., source wafer <NUM> or intermediate wafer <NUM>) and components (e.g., source device <NUM>) to form electrical conductors (e.g., electrodes <NUM> or intermediate electrical conductors <NUM>). Soft metals can be used, such as gold, silver, tin, solders, or hard materials such as Ti, W, Mo, Ta, Al, or Cu.

The intermediate wafer <NUM> or destination substrate <NUM> (the substrate) for receiving transfer-printed printable components can include a surface on or in which a plurality of nonplanar contact pads or electrical conductors are formed and exposed on the surface so that electrical connections can be made to the electrical conductors, such as electrical contact pads. The electrical contact pads can be multi-layer contact pads and can include a layer of solder. Alternatively, the electrical contact pads can be coated with a non-conductive layer or formed on a compliant non-conductive layer, to facilitate electrical connection and adhesion. The non-conductive layer can be a polymer or an adhesive or the compliant non-conductive layer can be a polymer.

A shrinkable material can be disposed in and underfill the volume between the printable component and the substrate. The shrinkable material can be an adhesive and can adhere the printable component and the substrate. By underfill is meant that the shrinkable material does not fill the volume between the printable component and the substrate. Furthermore, with a heat treatment provided after disposing the shrinkable material, the shrinkable material shrinks and provides compression between the printable component and the substrate to further strengthen and make robust the electrical connection between the connection posts <NUM>, <NUM> and the electrical conductors or contact pads.

According to one embodiment of the present invention, the source wafer <NUM> can be provided with electronic elements, electrodes <NUM>, and connection posts <NUM> already formed on the source wafer <NUM>. Alternatively, an unprocessed source wafer <NUM> can be provided and the electronic elements, electrodes <NUM>, and connection posts <NUM> formed on the source wafer <NUM>. An unprocessed source wafer <NUM> is a substrate that does not yet include the electronic elements, electrodes <NUM>, and connection posts <NUM>. The unprocessed source wafer <NUM> can have other processing steps completed, for example, cleaning, deposition of material layers, or heat or chemical treatments. Source devices <NUM> are formed, for example using photo-lithographic processes including forming masks over the source wafer <NUM>, etching materials, removing masks, and depositing materials. Using such processes, source devices <NUM> are formed on or in the source wafer <NUM>.

In some embodiments, the source devices <NUM> are small integrated circuits formed in a semiconductor wafer, for example gallium arsenide or silicon, which can have a crystalline structure. Processing technologies for these materials typically employ high heat and reactive chemicals. However, by employing transfer technologies that do not stress the source devices <NUM> or substrate materials, more benign environmental conditions can be used compared to thin-film manufacturing processes. Thus, the present invention has an advantage in that flexible substrates, such as polymeric substrates, that are intolerant of extreme processing conditions (e.g. heat, chemical, or mechanical processes) can be employed for the destination substrates <NUM>. Furthermore, it has been demonstrated that crystalline silicon substrates have strong mechanical properties and, in small sizes, can be relatively flexible and tolerant of mechanical stress. This is particularly true for substrates having <NUM>-micron, <NUM>-micron, <NUM>-micron, <NUM>-micron, or even <NUM>-micron thicknesses. Alternatively, the components can be formed in a microcrystalline, polycrystalline, or amorphous semiconductor layer.

The source devices <NUM> can be constructed using foundry fabrication processes. Layers of materials can be used, including materials such as metals, oxides, nitrides and other materials. Each source device <NUM> can be a complete semiconductor integrated circuit and can include, for example, transistors. The source devices <NUM> can have different sizes, for example, <NUM> square microns or <NUM>,<NUM> square microns, <NUM>,<NUM> square microns, or <NUM> square mm, or larger, and can have variable aspect ratios, for example <NUM>:<NUM>, <NUM>:<NUM>, <NUM>:<NUM>, or <NUM>:<NUM>. The source devices <NUM> can be rectangular or can have other shapes.

Embodiments of the present invention provide advantages over other methods described in the prior art. By employing connection posts <NUM>, <NUM> on source devices <NUM> and intermediate wafers <NUM> and a printing method that provides connection posts <NUM> adjacent to the intermediate support <NUM> or connection posts <NUM> adjacent to the destination substrate <NUM>, a low-cost method for printing chiplets in large quantities over a destination substrate <NUM> is enabled. Furthermore, additional process steps for electrically connecting the source devices <NUM> to the destination substrate <NUM> are obviated.

The source wafer <NUM> and source devices <NUM>, source transfer stamp, intermediate wafer <NUM>, intermediate transfer stamp, and destination substrate <NUM> can be made separately and at different times or in different temporal orders or locations and provided in various process states.

The method of the present invention can be iteratively applied to a single or multiple intermediate wafers <NUM> or destination substrates <NUM>. By repeatedly transferring sub-arrays of source devices <NUM> with a transfer stamp to an intermediate wafer <NUM> or destination substrate <NUM> and relatively moving the transfer stamp and intermediate wafer <NUM> or destination substrate <NUM> between stamping operations by a distance equal to the spacing of the selected source devices <NUM> in the transferred sub-array between each transfer of source devices <NUM>, an array of source devices <NUM> formed at a high density on a source wafer <NUM> can be transferred to an intermediate wafer <NUM> or destination substrate <NUM> at a much lower spatial density. In practice, the source wafer <NUM> is likely to be expensive, and forming source devices <NUM> with a high density on the source wafer <NUM> will reduce the cost of the source devices <NUM>, especially as compared to forming components on the destination substrate <NUM>.

In particular, in the case wherein the active source device <NUM> is an integrated circuit formed in a crystalline semiconductor material, the integrated circuit substrate provides sufficient cohesion, strength, and flexibility that it can adhere to the destination substrate <NUM> without breaking as the transfer stamp is removed.

In comparison to thin-film manufacturing methods, using densely populated source wafers <NUM> and transferring source devices <NUM> to a destination substrate <NUM> that requires only a sparse array of source devices <NUM> located thereon does not waste or require active layer material on a destination substrate <NUM>. The present invention can also be used in transferring source devices <NUM> made with crystalline semiconductor materials that have higher performance than thin-film active components. Furthermore, the flatness, smoothness, chemical stability, and heat stability requirements for a destination substrate <NUM> used in embodiments of the present invention may be reduced because the adhesion and transfer process is not substantially limited by the material properties of the destination substrate <NUM>. Manufacturing and material costs may be reduced because of high utilization rates of more expensive materials (e.g., the source substrate) and reduced material and processing requirements for the destination substrate <NUM>.

As is understood by those skilled in the art, the terms "over" and "under" are relative terms and can be interchanged in reference to different orientations of the layers, elements, and substrates included in the present invention. For example, a first layer on a second layer, in some implementations means a first layer directly on and in contact with a second layer. In other implementations a first layer on a second layer includes a first layer and a second layer with another layer therebetween.

Having described certain implementations of embodiments, it will now become apparent to one of skill in the art that other implementations incorporating the concepts of the disclosure may be used. Therefore, the disclosure should not be limited to certain implementations, but rather should be limited only by the scope of the following claims.

The various described embodiments of the invention may be used in conjunction with one or more other embodiments unless technically incompatible.

Throughout the description, where apparatus and systems are described as having, including, or comprising specific components, or where processes and methods are described as having, including, or comprising specific steps, it is contemplated that, additionally, there are apparatus, and systems of the disclosed technology that consist essentially of, or consist of, the recited components, and that there are processes and methods according to the disclosed technology that consist essentially of, or consist of, the recited processing steps.

Claim 1:
A method of making a micro-transfer printed system, comprising:
providing a source wafer (<NUM>) having a plurality of micro-transfer printable source devices (<NUM>) arranged in or on the source wafer at a source spatial density;
providing an intermediate wafer (<NUM>) having a plurality of micro-transfer printable intermediate supports (<NUM>) arranged in or on the intermediate wafer (<NUM>) at an intermediate spatial density less than or equal to the source spatial density;
providing a destination substrate (<NUM>);
micro-transfer printing the source devices (<NUM>) from the source wafer (<NUM>) to the intermediate supports (<NUM>) of the intermediate wafer (<NUM>) with a source stamp having a plurality of stamp posts at a source transfer density to make an intermediate device (<NUM>) on each intermediate support (<NUM>); and
micro-transfer printing the intermediate devices (<NUM>) from the intermediate wafer (<NUM>) to the destination substrate (<NUM>) at a destination spatial density less than the source spatial density with an intermediate stamp having a plurality of stamp posts at an intermediate transfer density less than the source transfer density, wherein the destination spatial density is less than the intermediate spatial density, and the destination substrate (<NUM>) is larger than the intermediate wafer (<NUM>) and the intermediate stamp has a larger extent than the source stamp.