Patent Description:
Mode converters are known in the prior art, as explained above. For example, <CIT> discloses a silicon waveguide comprising a first adiabatic tapering surrounded by a larger waveguide of low-index which surrounds the silicon waveguide on three of its sites. <CIT> relates to a mode converter which has a substrate and a silicon waveguide disposed on the substrate and having an adiabatic tapering. <CIT> shows the coupling of an optical fibre side and a high index difference waveguide side with two taperings. Further a waveguide arrangement is disclosed in which a first tapering is opposite a curved section.

The object of the present invention is to provide a mode converter and a mode converter fabrication method which allow an efficient mode conversion while reducing coupling losses. This object is solved by a mode converter and by a mode converter fabrication method according to claim <NUM> and <NUM>, respectively. Further advantageous embodiments and improvements of the present invention are listed in the dependent claims. This object is solved by the attached independent claims and further embodiments and improvements of the invention are listed in the attached dependent claims. Hereinafter, expressions like ". aspect according to the invention", "according to the invention", or "the present invention", relate to technical teaching of the broadest embodiment as claimed with the independent claims. Expressions like "implementation", "design", "optionally", "preferably", "scenario", "aspect" or similar relate to further embodiments as claimed, and expressions like "example", ". aspect according to an example", "the disclosure describes", or "the disclosure" describe technical teaching which relates to the understanding of the invention or its embodiments. Expressions like "not claimed" designate technical teaching which is not claimed but which still relate and contribute to the understanding of the invention as claimed. According to the invention, there is provided a mode converter comprising a substrate comprising a silicon dioxide (SiO2) material disposed on top of the substrate, a silicon waveguide comprising a first adiabatic tapering and enclosed in the silicon dioxide material, and a low-index waveguide disposed on top of the substrate and adjacent to the first adiabatic tapering.

In another not claimed embodiment, the disclosure includes a mode converter fabrication method comprising obtaining a mode converter comprising a substrate, a silicon waveguide disposed on the substrate and comprising a sidewall and a first adiabatic tapering, and a hard mask disposed on the silicon waveguide and comprising a silicon dioxide (SiO2) layer, wherein the hard mask does not cover the sidewall, and oxidizing the silicon waveguide and the hard mask, wherein oxidizing the silicon waveguide and the hard mask encloses the silicon waveguide within the silicon dioxide layer.

According to the invention, there is also provided a mode converter fabrication method comprising fabricating onto a substrate a silicon waveguide that comprises a first adiabatic tapering and a sidewall, wherein a hard mask is disposed on the silicon waveguide and does not cover the sidewall, and wherein the hard mask comprises silicon dioxide (SiO2) material, fabricating a second waveguide onto the substrate, wherein the second waveguide comprises a second hard mask enclosing the second waveguide, and oxidizing the silicon waveguide and the second waveguide until the silicon waveguide is enclosed within the silicon dioxide material.

Disclosed herein are various embodiments for creating silicon inverse taper waveguides that comprise a small tip using thermal oxidation processes. These silicon inverse taper waveguides can be used to convert between a small-size mode and a large-size mode while reducing coupling losses. In an embodiment, the top surface of the silicon inverse taper waveguide is protected by a hard mask while the sidewalls of the silicon inverse taper waveguide are exposed for oxidation, for example, thermal oxidation. Oxidizing the silicon inverse taper waveguide provides a protection layer for the silicon inverse taper waveguide, which substantially prevents the tip from contamination or mechanical damage. Further, the oxidation process may improve the surface roughness of the silicon inverse taper waveguide, which may further reduce propagation losses. Previously oxidation has not used for silicon waveguides because of design and implementation challenges. For example, oxidizing silicon waveguide is challenging to integrate into fabrication processes. Further, it is challenging to fabricate small features like a silicon waveguide tip without reducing the feature size of other waveguides and components.

<FIG> is a top view of an embodiment of a mode converter <NUM> before thermal oxidation. Mode converter <NUM> is configured to communicate light <NUM> along a silicon waveguide <NUM> and to transfer an optical mode of the light <NUM> between the silicon waveguide <NUM> and another waveguide (not shown). Mode coupler <NUM> is configured to transfer an optical mode in the first direction <NUM> to convert the optical mode to a larger optical mode. Converting an optical mode to a larger optical mode may be used in applications such as converting an optical mode from a waveguide to a fiber. Mode coupler <NUM> is also configured to transfer the optical mode of light <NUM> in a second direction <NUM> to convert the optical mode to a smaller optical mode. Converting an optical mode to a smaller optical mode may be used in applications such as converting an optical mode from a fiber to a chip. Mode converter <NUM> may be configured as shown or in any other suitable configuration as would be appreciated by one of ordinary skill in the art upon viewing this disclosure.

Cross-sectional graph <NUM> shows a cross-section of mode converter <NUM> along a first cut line AA' <NUM> and cross-sectional graph <NUM> shows a cross-section of mode converter <NUM> along a second cut line BB' <NUM>. In cross-sectional graph <NUM>, axis <NUM> indicates thickness in µm and axis <NUM> indicates width in µm. At first cut line AA' <NUM>, silicon waveguide <NUM> has a width of about <NUM> and a thickness of about <NUM>, silicon dioxide (SiO<NUM>) <NUM> has a width of about <NUM> and a thickness of about <NUM>, and silicon nitride (Si<NUM>N<NUM>) <NUM> has a width of about <NUM> and a thickness of about <NUM>. In cross-sectional graph <NUM>, axis <NUM> indicates thickness in µm and axis <NUM> indicates width in µm. As shown, the width of silicon waveguide <NUM> reduces from cut line AA' to cut line BB' as described further below. At second cut line BB' <NUM>, silicon waveguide <NUM> has a width of about <NUM> and a thickness of about <NUM>, silicon dioxide <NUM> has a width of about <NUM> and a thickness of about <NUM>, and silicon nitride <NUM> has a width of about <NUM> and a thickness of about <NUM>.

Mode converter <NUM> comprises silicon waveguide <NUM> disposed on the surface 102A of substrate <NUM>. Substrate <NUM> may be formed of materials including, but not limited to, buried oxide (BOX) on silicon, silicon oxide, silicon dioxide (SiO<NUM>), and oxides. Thickness is represented with respect to axis <NUM> into and out of the page.

Silicon waveguide <NUM> is adiabatically tapered from the first cut line AA' <NUM> to the second cut line BB' <NUM> such that the first cut line AA' <NUM> is wider than the second cut line BB' <NUM>. Adiabatic tapering provides a slow tapering transition to allow smooth optical mode transferring. Width is represented with respect to axis <NUM> and length is represented with respect to axis <NUM>. First cut line AA' <NUM> may be any suitable width. For example, the width of silicon waveguide <NUM> at the first cut line AA' <NUM> may be from about <NUM> to about <NUM>. The use of the term "about" means ±<NUM>% of the subsequent number, unless otherwise stated. Second cut line BB' <NUM> has a smaller width than first cut line AA' <NUM>. In an embodiment, second cut line BB' <NUM> is as narrow as fabrication processes allow. For example, second cut line BB' <NUM> may be about <NUM> or about <NUM>. Alternatively, second cut line BB' <NUM> may be any suitable width. Silicon waveguide <NUM> may be configured as shown or with any other suitable orientation, tapering, length, width, and/or thickness.

Silicon waveguide <NUM> is covered by hard mask that comprises silicon nitride <NUM> on top of silicon dioxide <NUM>. Silicon dioxide <NUM> is disposed onto a top surface 104A of silicon waveguide <NUM>. Silicon dioxide <NUM> is configured to at least partially cover the top surface 104A of silicon waveguide <NUM>. In an embodiment, silicon dioxide <NUM> covers the entire top surface 104A of silicon waveguide <NUM>. At least a portion of the sidewalls 104B of silicon waveguide <NUM> is not covered by silicon dioxide <NUM>.

Silicon nitride <NUM> is disposed onto a top surface 106A of silicon dioxide <NUM>. Silicon nitride <NUM> is configured to at least partially cover the top surface 106A of silicon dioxide <NUM>. In an embodiment, silicon nitride <NUM> covers the entire top surface 106A of silicon dioxide <NUM>. Examples of materials used for silicon nitride <NUM> include, but are not limited to, silicon nitride (Si<NUM>N<NUM>), tri-nitride, and nitrides.

<FIG> is a top view of an embodiment of a mode converter <NUM> after thermal oxidation. For example, thermal oxidation may comprise a <NUM> minute dry-thermal oxidation process at about <NUM>,<NUM> degrees Celsius (°C). In an embodiment, oxidation may occur at a temperature of at least about <NUM> for at least two minutes. Alternatively, oxidation may be performed using any suitable technique, temperature, and time as would be appreciated by one of ordinary skill in the art upon viewing this disclosure. Mode converter <NUM> is configured to communicate light <NUM> along a silicon waveguide <NUM> and to transfer an optical mode of the light <NUM> between the silicon waveguide <NUM> and another waveguide (not shown). Mode coupler <NUM> is configured to transfer an optical mode in the first direction <NUM> to convert the optical mode to a larger optical mode. Mode coupler <NUM> is also configured to transfer the optical mode of light <NUM> in a second direction <NUM> to convert the optical mode to a smaller optical mode. Mode converter <NUM> may be configured as shown or in any other suitable configuration as would be appreciated by one of ordinary skill in the art upon viewing this disclosure.

Cross-sectional graph <NUM> shows a cross-section of mode converter <NUM> at a first cut line AA' <NUM> and cross-sectional graph <NUM> shows a cross-section of mode converter <NUM> at a second cut line BB' <NUM>. In cross-sectional graph <NUM>, axis <NUM> indicates thickness in µm and axis <NUM> indicates width in µm. At the first cut line AA' <NUM>, silicon waveguide <NUM> has a width of about <NUM> and a thickness of about <NUM>, silicon dioxide <NUM> has a width of about <NUM> and a thickness of about <NUM>, and silicon nitride <NUM> has a width of about <NUM> and a thickness of about <NUM>. In cross-sectional graph <NUM>, axis <NUM> indicates thickness in µm and axis <NUM> indicates width in µm. In cross-sectional graph <NUM>, axis <NUM> indicates thickness in µm and axis <NUM> indicates width in µm. At the second cut line BB' <NUM>, silicon waveguide <NUM> has a width of about <NUM> and a thickness of about <NUM>.

Mode converter <NUM> may be configured similarly to mode converter <NUM> in <FIG> before thermal oxidation. Mode converter <NUM> comprises silicon waveguide <NUM> disposed on the surface 202A of substrate <NUM>. Substrate <NUM> is configured similarly to substrate <NUM> in <FIG>. Thickness is represented with respect to axis <NUM> into and out of the page.

Silicon waveguide <NUM> is configured similarly to silicon waveguide <NUM> in <FIG>. Silicon waveguide <NUM> is adiabatically tapered from the first cut line AA' <NUM> to the second cut line BB' <NUM> such that the first cut line AA' <NUM> is wider than the second cut line BB' <NUM>. Width is represented with respect to axis <NUM> and length is represented with respect to axis <NUM>. First cut line AA' <NUM> may be any suitable width. Second cut line BB' <NUM> has a smaller width than first cut line AA' <NUM>. In an embodiment, second cut line BB' <NUM> is as narrow as fabrication processes allow. Alternatively, second cut line BB' <NUM> may be any suitable width. After thermal oxidation the height and/or width of silicon waveguide <NUM> may be reduced compared to silicon waveguide <NUM> in <FIG>. For example, the thermal oxidation process may reduce the tip width of the silicon waveguide <NUM> from about <NUM> to about <NUM> or by about <NUM>% to about <NUM>%. Silicon waveguide <NUM> may be configured as shown or with any other suitable orientation, tapering, length, width, and/or thickness.

Silicon waveguide <NUM> is covered by hard mask that comprises silicon nitride <NUM> on top of silicon dioxide <NUM>. Silicon dioxide <NUM> is configured similarly to silicon dioxide <NUM> in <FIG>. After thermal oxidation, silicon dioxide <NUM> covers the top surface 204A, the sidewalls 204B, and the bottom surface 204C of silicon waveguide <NUM>. Silicon dioxide <NUM> substantially encloses the silicon waveguide <NUM> within silicon dioxide <NUM>. A portion of silicon dioxide <NUM> that covers the bottom surface 204C of silicon waveguide <NUM> becomes integrated with substrate <NUM>.

Silicon nitride <NUM> is configured similarly to silicon nitride <NUM> in <FIG>. Silicon nitride <NUM> is disposed onto a top surface 206A of silicon dioxide <NUM>. In an embodiment, silicon nitride <NUM> can be removed from silicon dioxide <NUM> to allow for additional fabrication processes to be performed. Further processing may be performed on the silicon waveguide after thermal oxidation. For example, silicon nitride <NUM> may be removed and the whole silicon waveguide <NUM> is covered in oxide.

<FIG> is a schematic diagram of an embodiment of a mode converter <NUM> configured to use mode coupling between a silicon waveguide <NUM> and a low-index waveguide <NUM>. Mode converter <NUM> is configured to communicate light <NUM> along the silicon waveguide <NUM> and to transfer an optical mode of the light <NUM> between the silicon waveguide <NUM> and the low-index waveguide <NUM>. Light <NUM> is represented by an arrowed line, but may also include directions of propagation that are not explicitly shown. Mode coupler <NUM> is configured to transfer an optical mode in the first direction <NUM> to convert the optical mode to a larger optical mode. Mode coupler <NUM> is also configured to transfer the optical mode of light <NUM> in a second direction <NUM> to convert the optical mode to a smaller optical mode. Mode converter <NUM> may be configured as shown or in any other suitable configuration as would be appreciated by one of ordinary skill in the art upon viewing this disclosure.

Silicon waveguide <NUM> is configured similarly to silicon waveguide <NUM> in <FIG> and silicon waveguide <NUM> in <FIG>. Silicon waveguide <NUM> is adiabatically tapered from the first location <NUM> to the second location <NUM> such that the first location <NUM> is wider than the second location <NUM>. Width is represented with respect to axis <NUM> and length is represented with respect to axis <NUM>. First location <NUM> may be any suitable width. Second location <NUM> has a smaller width than first location <NUM>. In an embodiment, second location <NUM> is as narrow as fabrication processes allow. Alternatively, second location <NUM> may be any suitable width. Silicon waveguide <NUM> may be configured as shown or with any other suitable orientation, tapering, length, width, and/or thickness.

Low-index waveguide <NUM> may be a suspended oxide waveguide fabricated by removing a silicon substrate beneath a buried oxide (BOX) of the substrate (e.g., substrate <NUM> in <FIG>). Examples of materials used to form the low-index waveguide <NUM> include, but are not limited to, silicon oxynitride (SiON), silicon-rich oxide (SiOx), aluminum nitride (AlN), aluminum oxide (Al<NUM>O<NUM>), silicon carbide (SiC), or other suitable polymers. In an embodiment, low-index waveguide <NUM> is a cladding, for example, a silicon oxide cladding. Low-index waveguide <NUM> may have a width and/or thickness between about <NUM> to about <NUM>. Low-index waveguide <NUM> is a low-index waveguide and has a lower refractive index than silicon waveguide <NUM>. Low-index waveguide <NUM> may have a refractive index in the range of about <NUM> to about <NUM>. In an embodiment, at least a portion <NUM> of silicon waveguide <NUM> is disposed within low-index waveguide <NUM>. For example, the adiabatic tapering <NUM> of silicon waveguide <NUM> is adjacent to low-index waveguide <NUM>. Low-index waveguide <NUM> may partially or completely cover silicon waveguide <NUM>. The amount of optical mode from light <NUM> that transfers between silicon waveguide <NUM> and low-index waveguide <NUM> is proportional to the ratio of the cross-sectional area of silicon waveguide <NUM> and the cross-sectional area of low-index waveguide <NUM> at a given location, for example, at the first location <NUM> or the second location <NUM> of silicon waveguide <NUM>.

<FIG> is a schematic diagram of an embodiment according to the invention of a mode converter <NUM> configured to use mode coupling between adiabatic tapers. Mode converter <NUM> is configured to communicate light <NUM> along a silicon waveguide <NUM> and to transfer an optical mode of the light <NUM> between the silicon waveguide <NUM> and a low-index waveguide <NUM>. Light <NUM> is represented by an arrowed line, but may also include directions of propagation that are not explicitly shown. Mode coupler <NUM> is configured to transfer an optical mode in the first direction <NUM> to convert the optical mode to a larger optical mode of light <NUM>. Mode coupler <NUM> is also configured to transfer the optical mode of light <NUM> in a second direction <NUM> to convert the optical mode to a smaller optical mode. Mode converter <NUM> may be configured as shown or in any other suitable configuration as would be appreciated by one of ordinary skill in the art upon viewing this disclosure.

Mode converter <NUM> is configured such that at least a portion of an adiabatic tapering <NUM> of silicon waveguide <NUM> and at least a portion of an adiabatic tapering <NUM> of low-index waveguide <NUM> are adjacent to each other. Gap <NUM> between silicon waveguide <NUM> and low-index waveguide <NUM> is substantially constant. The width of gap <NUM> may vary from about <NUM> to about <NUM>. Gap <NUM> may be filled with air, a cladding, or a second low-index material. In an alternative embodiment, silicon waveguide <NUM> and low-index waveguide <NUM> are in direct contact with each other and there is no gap between silicon waveguide <NUM> and low-index waveguide <NUM>. Mode converter <NUM> may be configured as shown or in any other suitable configuration as would be appreciated by one of ordinary skill in the art upon viewing this disclosure.

Silicon waveguide <NUM> is configured similarly to silicon waveguide <NUM> in <FIG> and silicon waveguide <NUM> in <FIG>. Silicon waveguide <NUM> is adiabatically tapered from a first location <NUM> to a second location <NUM> such that silicon waveguide <NUM> is wider at the first location <NUM> than at the second location <NUM>. Width is represented with respect to axis <NUM> and length is represented with respect to axis <NUM>. At the first location <NUM>, silicon waveguide <NUM> may be any suitable width. At the second location <NUM>, silicon waveguide <NUM> has a smaller width than at first location <NUM>. In an embodiment, silicon waveguide <NUM> is as narrow as fabrication processes allow at the second location <NUM>. Alternatively, silicon waveguide <NUM> may be any suitable width at the second location <NUM>. Silicon waveguide <NUM> may be configured as shown or with any other suitable orientation, tapering, length, width, and/or thickness.

Low-index waveguide <NUM> may be configured similarly to low-index waveguide <NUM> in <FIG>. Low-index waveguide <NUM> is adiabatically tapered from the first location <NUM> to the second location <NUM> such that low-index waveguide <NUM> is wider at the second location <NUM> than at the first location <NUM>. At the first location <NUM>, low-index waveguide <NUM> has a smaller width than at the second location <NUM>. In an embodiment, low-index waveguide <NUM> is as narrow as fabrication processes allow at the first location <NUM>. Alternatively, low-index waveguide <NUM> may be any suitable width at the first location <NUM>. At the second location <NUM>, low-index waveguide <NUM> may be any suitable width. Low-index waveguide <NUM> may be configured as shown or with any other suitable orientation, tapering, length, width, and/or thickness.

<FIG> is a schematic diagram of an embodiment of a mode converter <NUM> configured to use mode coupling between a silicon waveguide <NUM> and a second waveguide <NUM>. Mode converter <NUM> is configured to communicate light <NUM> along the silicon waveguide <NUM> and to transfer an optical mode of the light <NUM> between the silicon waveguide <NUM> and the second waveguide <NUM>. Light <NUM> is represented by an arrowed line, but may also include directions of propagation that are not explicitly shown. Mode coupler <NUM> is configured to transfer an optical mode in the first direction <NUM> to convert the optical mode to a larger optical mode. Mode coupler <NUM> is also configured to transfer the optical mode of light <NUM> in a second direction <NUM> to convert the optical mode to a smaller optical mode. Mode converter <NUM> may be configured as shown or in any other suitable configuration as would be appreciated by one of ordinary skill in the art upon viewing this disclosure.

Mode converter <NUM> is configured such that at least a portion of an adiabatic tapering <NUM> of silicon waveguide <NUM> and at least a portion of an adiabatic tapering <NUM> of second waveguide <NUM> are adjacent to each other and overlap with each other on a substrate <NUM>. For example, silicon waveguide <NUM> may be positioned above or below (as shown in <FIG>) the second waveguide <NUM>. Substrate <NUM> may be configured similarly to substrate <NUM> in <FIG>. In an embodiment, silicon waveguide <NUM> and the second waveguide <NUM> are separated from each other by a gap <NUM>. Gap <NUM> may be filled with silicon dioxide. Gap <NUM> may be any suitable distance as would be appreciated by one of ordinary skill in the art. Alternatively, silicon waveguide <NUM> may be in direct contact with second waveguide <NUM>. Mode converter <NUM> may be configured as shown or in any other suitable configuration as would be appreciated by one of ordinary skill in the art upon viewing this disclosure.

Examples of materials used for the second waveguide <NUM> include, but are not limited to, silicon oxide, silicon nitride (Si<NUM>N<NUM>), and silicon oxynitride (SiOxNy). Second waveguide <NUM> is adiabatically tapered from first location <NUM> to second location <NUM> such that the second waveguide <NUM> is wider at the second location <NUM> than at the first location <NUM>. At the first location <NUM>, the second waveguide <NUM> has a smaller width than at the second location <NUM>. In an embodiment, the second waveguide <NUM> is as narrow as fabrication processes allow at the first location <NUM>. Alternatively, the second waveguide <NUM> may be any suitable width at the first location <NUM>. At the second location <NUM>, the second waveguide <NUM> may be any suitable width. The second waveguide <NUM> may be configured as shown or with any other suitable orientation, tapering, length, width, and/or thickness.

<FIG> is a schematic diagram of an embodiment of a mode converter fabrication process <NUM>. Mode converter fabrication process <NUM> is configured to generate a silicon waveguide for a mode converter using a silicon waveguide taper first integration process. At step <NUM>, a silicon-on-insulator (SOI) substrate <NUM> that comprises a silicon layer on a BOX layer is obtained. A first hard mask <NUM> is deposited onto the SOI substrate <NUM>. The first hard mask <NUM> comprises a silicon nitride layer on top of a silicon dioxide layer and is deposited such that the silicon dioxide layer covers a top surface of the silicon layer and forms a layer between the silicon layer and the silicon nitride layer. The silicon layer and the first hard mask <NUM> experience one or more fabrication processes (e.g., photolithography and etching) to form structures, for example, waveguides, out of the silicon layer. Following the one or more fabrication processes, the silicon layer comprises a tapered portion. At least a portion of one of the sidewalls of the silicon layer are not covered by the hard mask <NUM>. The silicon layer, the silicon dioxide layer, and the silicon nitride layer may be configured similarly to silicon waveguide <NUM>, silicon dioxide <NUM>, and silicon nitride <NUM> in <FIG>, respectively. The first hard mask <NUM> may be fabricated using any suitable material and fabrication process techniques. At step <NUM>, thermal oxidation is performed on the silicon layer and the first hard mask <NUM>. Thermal oxidation may be performed using any suitable fabrication process techniques as would be appreciated by one of ordinary skill in the art upon viewing this disclosure. After thermal oxidation, the silicon layer, the silicon dioxide layer, and the silicon nitride layer may be configured similarly to silicon waveguide <NUM>, silicon dioxide <NUM>, and silicon nitride <NUM> in <FIG>, respectively. Silicon dioxide <NUM> covers the top surface, the sidewalls, and the bottom surface of the silicon layer. The silicon dioxide layer substantially encloses the silicon layer within silicon dioxide layer. A portion of silicon dioxide layer that covers the bottom surface of silicon layer becomes integrated with SOI substrate <NUM>. At step <NUM>, a second hard mask or photoresist <NUM> is fabricated onto the first hard mask <NUM> to define a silicon waveguide <NUM>. The second hard mask <NUM> is fabricated using any suitable material and fabrication process techniques as would be appreciated by one of ordinary skill in the art upon viewing this disclosure. At step <NUM>, a silicon waveguide <NUM> is processed (e.g., etched) and second hard mask <NUM> is removed. Additional structures may be patterned and fabricated, as needed.

<FIG> is a schematic diagram of another embodiment of a mode converter fabrication process <NUM> according to the invention. Mode converter fabrication process <NUM> is configured to generate a silicon waveguide using a silicon waveguide pattern first integration process. At step <NUM>, an SOI substrate is obtained that comprises a silicon substrate <NUM> and a silicon layer <NUM> and a BOX layer <NUM> covering at least a portion of the silicon substrate <NUM>. The silicon substrate <NUM> and the BOX layer <NUM> may together be referred to as a substrate. A first hard mask is deposited onto the silicon layer <NUM>. The first hard mask comprises a silicon nitride layer <NUM> according to the invention and a silicon dioxide layer <NUM> and is deposited such that the silicon dioxide layer <NUM> covers a top surface of the silicon layer <NUM> and forms a layer between the silicon layer <NUM> and the silicon nitride layer <NUM>. The silicon layer <NUM> and the first hard mask experience one or more fabrication processes (e.g., photolithography and etching) to form structures out of the silicon layer <NUM>. Following the one or more fabrication processes, the silicon layer <NUM> comprises a tapered portion at a first location <NUM> on the BOX layer <NUM>. At least one of the sidewalls of the silicon waveguide <NUM> is not covered by the first hard mask. The silicon layer <NUM>, the silicon dioxide layer <NUM>, and the silicon nitride layer <NUM> may be configured similarly to silicon waveguide <NUM>, silicon dioxide <NUM>, and silicon nitride <NUM> in <FIG>, respectively. Similarly, a second waveguide <NUM> is formed at a second location <NUM> on the BOX layer <NUM>. The second waveguide comprises a silicon layer <NUM>, a silicon dioxide layer <NUM>, and a silicon nitride layer <NUM> according to the invention. The combination of the silicon nitride layer <NUM> on top of the silicon dioxide layer <NUM> forms a first hard mask for the second waveguide. The first hard mask for the second waveguide is not part of the claimed invention. Alternatively, the second waveguide may comprise any suitable materials as would be appreciated by one of ordinary skill in the art upon viewing this disclosure. At step <NUM>, a second hard mask <NUM> is deposited onto the second waveguide <NUM>. The second hard mask <NUM> encapsulates the second waveguide <NUM> and protects the second waveguide <NUM> from one or more fabrication processes. In an embodiment, the second mask <NUM> comprises additional silicon nitride material.

At step <NUM>, thermal oxidation is performed using any suitable fabrication process techniques. After thermal oxidation, the silicon layer <NUM>, the silicon dioxide layer <NUM>, and the silicon nitride layer <NUM> may be configured similarly to silicon waveguide <NUM>, silicon dioxide <NUM>, and silicon nitride <NUM> in <FIG>, respectively. The silicon dioxide layer <NUM> covers the top surface, the sidewalls, and the bottom surface of the silicon layer <NUM>. The silicon dioxide layer <NUM> substantially enclosed the silicon layer <NUM> within silicon dioxide layer <NUM>. A portion of silicon dioxide layer <NUM> that covers the bottom surface of silicon layer <NUM> becomes integrated with BOX layer <NUM>. The silicon nitride layer <NUM> may be removed using any suitable fabrication processing technique, for example, nitride wet etching. The first hard mask <NUM> and the second hard mask <NUM> may also be removed from the second waveguide <NUM> using any suitable fabrication processing technique.

<FIG> is a flowchart of an embodiment of a mode converter fabrication method <NUM> for a mode converter. The mode converter may comprise a silicon waveguide configured similarly to silicon waveguide <NUM> in <FIG>, silicon waveguide <NUM> in <FIG>, silicon waveguide <NUM> in <FIG>, silicon waveguide <NUM> in <FIG>, and silicon waveguide <NUM> in <FIG>. Mode converter fabrication method <NUM> can be implemented to produce a silicon waveguide with a small tip that can be used to convert between a small-size mode and a large-size mode while reducing coupling losses. At step <NUM>, an SOI substrate that comprises a silicon layer on a BOX layer is obtained. At step <NUM>, a hard mask is deposited onto the silicon layer. The hard mask comprises a silicon nitride layer on top of a silicon dioxide layer. The silicon dioxide layer and the silicon nitride layer may be configured similarly to silicon dioxide <NUM> and silicon nitride <NUM> in <FIG>. At step <NUM>, a silicon waveguide is patterned. The silicon waveguide comprises an adiabatic tapering and may be configured similarly to silicon waveguide <NUM> in <FIG>, silicon waveguide <NUM> in <FIG>, silicon waveguide <NUM> in <FIG>, and silicon waveguide <NUM> in <FIG>. At least a portion of the sidewalls of the silicon waveguide is not covered by the hard mask. For example, at least one sidewall is not covered by the hard mask. The silicon dioxide layer may be configured similarly to silicon dioxide <NUM> in <FIG>. At step <NUM>, the silicon waveguide and the hard mask are oxidized, for example, using thermal oxidation. After oxidation, the silicon waveguide, the silicon dioxide layer, and the silicon nitride layer may be configured similarly to silicon waveguide <NUM>, silicon dioxide <NUM>, and silicon nitride <NUM> in <FIG>, respectively. The silicon dioxide layer covers the top surface, the sidewalls, and the bottom surface of the silicon waveguide. The silicon dioxide layer substantially enclosed the silicon waveguide within silicon dioxide layer. A portion of silicon dioxide layer that covers the bottom surface of silicon waveguide becomes integrated with the SOI substrate. At step <NUM>, one or more fabrication process may be performed. Examples of additional fabrication processes include, but are not limited to, removing the hard mask, depositing a second hard mask, etching, and fabricating a second waveguide according to the invention.

<FIG> shows energy density graphs along cross sections of a silicon waveguide tip and a low-index waveguide before thermal oxidation. <FIG> is shows energy density graph for a transverse electric (TE) mode of a cross-section of a silicon waveguide tip. The silicon waveguide tip may be configured similarly to silicon waveguide <NUM> in <FIG>. In <FIG>, axis <NUM> indicates an energy density distribution along a vertical axis z (e.g., axis <NUM> in <FIG>) in µm and axis <NUM> indicates an energy density distribution along a horizontal axis y (e.g., axis <NUM> in <FIG>) in µm.

<FIG> shows an energy density graph for a TE mode of a cross-section of a low-index waveguide. The low-index waveguide may be configured similarly to low-index waveguide <NUM> in <FIG>. In <FIG>, axis <NUM> indicates an energy density distribution along a vertical axis z in µm and axis <NUM> indicates an energy density distribution along a horizontal axis y in µm. The loss due to a TE mode mismatch between the silicon waveguide tip and the low-index waveguide is about -<NUM> decibels (dB).

<FIG> shows an energy density graph for a transverse magnetic (TM) mode of a cross-section of the silicon waveguide tip. In <FIG>, axis <NUM> indicates an energy density distribution along a vertical axis z in µm and axis <NUM> indicates an energy density distribution along a horizontal axis y in µm.

<FIG> shows an energy density graph for a TM mode of a cross-section of the low-index waveguide. In <FIG>, axis <NUM> indicates an energy density distribution along a vertical axis z in µm and axis <NUM> indicates an energy density distribution along a horizontal axis y in µm. The loss due to a TM mode mismatch between the silicon waveguide tip and the low-index waveguide is about -<NUM> dB.

<FIG> shows energy density graphs along cross sections for a silicon waveguide tip and a low-index waveguide after thermal oxidation. <FIG> shows an energy density graph for a TE mode of a cross-section of a silicon waveguide tip. The silicon waveguide tip may be configured similarly to silicon waveguide <NUM> in <FIG>. In energy density graph 1000A, axis <NUM> indicates an energy density distribution along a vertical axis z (e.g., axis <NUM> in <FIG>) in µm and axis <NUM> indicates an energy density distribution along a horizontal axis y (e.g., axis <NUM> in <FIG>) in µm.

<FIG> shows an energy density graph for a TE mode of a cross-section of a low-index waveguide. The low-index waveguide may be configured similarly to low-index waveguide <NUM> in <FIG>. In <FIG>, axis <NUM> indicates an energy density distribution along a vertical axis z in µm and axis <NUM> indicates an energy density distribution along a horizontal axis y in µm. The loss due to a TE mode mismatch between the silicon waveguide tip and the low-index waveguide is about -<NUM> dB. As such, the loss due to a TE mode mismatch is reduced after thermal oxidation when compared to the losses before thermal oxidation.

Claim 1:
A mode converter (<NUM>), comprising:
a substrate comprising a silicon dioxide, SiO<NUM>, material disposed on top of the substrate;
a silicon waveguide (<NUM>) comprising a first adiabatic tapering (<NUM>, <NUM>, <NUM>) and enclosed in the silicon dioxide material; and
a low-index waveguide (<NUM>, <NUM>) disposed on top of the substrate and adjacent to the first adiabatic tapering;
wherein the low-index waveguide comprises a second adiabatic tapering, and wherein the first adiabatic tapering is adjacent to the second adiabatic tapering, and a gap (<NUM>) between the first adiabatic tapering of the silicon waveguide (<NUM>) and the second adiabatic tapering of the low-index waveguide (<NUM>) is constant.