Patent Description:
The statements in this section merely provide background information related to the present disclosure and do not necessarily constitute prior art.

<CIT> discloses a series capacitor bank no-dead-zone protection method. A working current mutual inductor is connected with output ends of two parallel branches. The working current mutual inductor collects a load current and transmits the load current to a controller. A ratio between an unbalanced current and the load current is defined as a bridge difference ratio. When the bridge difference ratio obtained through calculation of the controller exceeds a bridge difference ratio prewarning value, the controller gives an alarm. According to the series capacitor bank no-dead-zone protection method, a 'bridge difference ratio' protection formed by adoption of the ratio between the unbalanced current and the load current is used as a main protection of a series capacitor bank, motion dead zones are eliminated and the protection motion dead zones of the series capacitor bank are controlled to be less than <NUM>% under any working conditions. Failure alarming dead zones of capacity of a single bridge arm capacitor can be controlled to be about <NUM>% under any working conditions. The protection sensitivity is high and the series capacitor bank no-dead-zone protection method is not affected by the load current.

<CIT> discloses a method and system for detecting voltage unbalance of a series capacitor bank. The method for detecting voltage unbalance of the series capacitor bank comprises the specific steps that voltage of capacitors is detected through an isolation DC/DC converter which is connected with the series capacitors in parallel, a maximum value and a minimum value of all detected values of the capacitors are used, comparison is carried out between a difference between the maximum value and the minimum value and a preset threshold value, and when the difference between the maximum value and the minimum value is smaller than the preset threshold value, the series capacitor bank is normal and can be used; when the difference between the maximum value and the minimum value is equal to or larger than the preset threshold value, the series capacitor bank is abnormal, and an alarm and protection signal is given out. According to the method and system for detecting the voltage unbalance of the series capacitor bank, due to the fact that the isolation DC/DC converter is used for detecting the voltage of the capacitors, cost is low; due to the fact that the difference between the maximum value and the minimum value of the voltage of the series capacitors is used for judging capacitor faults, accuracy and reliability are achieved. The method and system for detecting the voltage unbalance of the series capacitor bank are particularly applicable to voltage unbalance detection of middle direct-current capacitors of voltage type inverters.

<CIT> discloses a dynamic ground detector for monitoring a two-wire power distribution system, where both sides are nominally isolated from ground. A sampling bridge is connected between the lines, each shunt section of the bridge comprising a resistor and a capacitor having impedances in quadriture at the line frequency; and the junctions of the shunt sections of the sampling bridge are alternatively sampled by a switching network. The switching network connected through a phase shifting network comprising an RC filter to a detector network comprising a fullwave rectifier with suitable indicator and alarm apparatus. The rate of sampling is a multiple, including unity, of the line frequency. Additional circuitry may also be provided for sensing the direction and phase of any fault current caused by a fault to ground from either or both of the lines, so that the fault current may be opposed by insertion of another current having the same phase and opposite direction.

<CIT> provides active balancing modules that control voltage imbalances between capacitors stacked in a series arrangement and methods for their manufacture. These modules are simple and inexpensive to manufacture, and versatile. They may be used alone or they may be combined together to form a multi-module active balancing circuitry for a plurality of capacitors stacked in a series arrangement. The modules may further be aligned in either a side-by-side topology or an overlapping topology.

Please refer to <FIG> and <FIG>, which show block circuit diagrams of DC link capacitor voltage distribution of a conventional single-phase AC voltage conversion and a conventional three-phase AC voltage conversion, respectively. Take the DC link capacitor voltage distribution of the conventional single-phase AC voltage conversion as an example, an AC voltage VAC is converted by an AC-to-DC converter, for example, but not limited to a multi-level converter to provide a first DC voltage V<NUM> and a second DC voltage V<NUM> at a DC link, or a voltage of the DC link (DC link voltage) is converted into the AC voltage VAC by the AC-to-DC converter. A neutral node N is formed between the first DC voltage V<NUM> across a first capacitor C<NUM> and the second DC voltage V<NUM> across a second capacitor C<NUM>. Due to the three-level characteristic, the first DC voltage V<NUM> and the second DC voltage V<NUM> are limited to half of the DC link voltage V<NUM>. In general, in order to make the first capacitor C<NUM> and the second capacitor C<NUM> be able to averagely withstand the DC link voltage V<NUM>, a first balanced resistor R<NUM> is coupled in parallel to the first capacitor C<NUM> and a second balanced resistor R<NUM> is coupled in parallel to the second capacitor C<NUM>. In particular, the DC link voltage V<NUM> may be a voltage of a DC link of any power supply product, for example, but not limited to, a solar panel, a wind-energy device, or a microgrid. Since the operation principle of the DC link capacitor voltage distribution of the conventional three-phase AC voltage conversion shown in <FIG> is similar to that shown in <FIG>, the detail description is omitted here for conciseness.

Please refer to <FIG>, which shows a block circuit diagram of DC link capacitor voltage distribution of another conventional single-phase AC voltage conversion. With the maximum power and efficiency of power supply products, in order to maintain the same conduction loss of internal components thereof, it is imperative to increase the voltage range of power supply products. Therefore, a plurality of capacitors coupled in series are used to accommodate the increased DC link voltage V<NUM>, thereby increasing the output power of power supply products. Also, voltages at the DC link are withstood by the plurality of capacitors, that is, the first DC voltage V<NUM> is withstood by capacitors C<NUM>, C<NUM> and the second DC voltage V<NUM> is withstood by capacitors C<NUM>, C<NUM>. In order to averagely withstand the first DC voltage V<NUM> and the second DC voltage V<NUM> by the capacitors, each capacitor is coupled in parallel to one resistor to passively average the voltages. As shown in <FIG>, the capacitor C<NUM> and the capacitor C<NUM> are respectively coupled in parallel to a resistor R<NUM> and a resistor R<NUM>, and the capacitor C<NUM> and the capacitor C<NUM> are respectively coupled in parallel to a resistor R<NUM> and a resistor R<NUM>. In particular, the capacitances of the capacitors C<NUM>, C<NUM>, C<NUM>, C<NUM> are approximately equal, and the resistances of the R<NUM>, R<NUM>, R<NUM>, R<NUM> are approximately equal.

However, once any capacitor corresponding to the first DC voltage V<NUM> or the second DC voltage V<NUM> is open-circuit or short-circuit, the voltage of the abnormal capacitor will be withstood on other capacitors or components so as to damage these capacitors or components. In order to solve the problem, the current technology mainly uses the feedback mechanism for detecting the voltage of each capacitor, thereby determining whether the voltages are abnormal or not. However, the cost of the voltage detection using the feedback mechanism is higher, and it causes the increase of uncertainties in the feedback control. Furthermore, the greater the number of series-connected capacitors, the lower the efficiency of the current technology.

An object of the present disclosure is to provide a detection apparatus for unbalanced DC link capacitor voltage to solve the above-mentioned problems.

In order to achieve the above-mentioned object, the DC link provides a DC voltage and has a plurality of capacitors coupled in series to two ends of the DC link and a plurality of balanced resistors coupled in series to two ends of the DC link and corresponding to the capacitors. The detection apparatus includes a plurality of sense resistors and a current sensor. One end of each sense resistor is coupled to a common-connected node of two capacitors, and the other end of each sense resistor is coupled to a common-connected node of two balanced resistors. The current sensor is coupled to one of the sense resistors, and measures a current value of a current flowing through the sense resistor coupled to the current sensor.

In one embodiment, the DC voltage is acquired by converting an AC voltage by an AC-to-DC converter, or the DC voltage is provided to the AC-to-DC converter and converted into the AC voltage.

In one embodiment, the AC-to-DC converter is a multi-level converter.

In one embodiment, the DC voltage is acquired by converting another DC voltage by a DC-to-DC converter, or the DC voltage is provided to the DC-to-DC converter and converted into the another DC voltage.

In one embodiment, the current sensor is a Hall-effect current sensor or a current sense amplifier.

In one embodiment, the DC voltage is greater than <NUM> volts.

Accordingly, the detection apparatus for unbalanced DC link capacitor voltage is provided to determine whether the DC voltage withstood by a plurality of capacitors is balanced or not and to eliminate the situation of abnormal voltage.

Another object of the present disclosure is to provide a detection apparatus for unbalanced DC link capacitor voltage to solve the above-mentioned problems.

In order to achieve the above-mentioned object, the DC link has a neutral node and provides a first DC voltage and a second DC voltage, and has a plurality of capacitors coupled in series to two ends of the DC link and a plurality of balanced resistors coupled in series to two ends of the DC link and corresponding to the capacitors. The detection apparatus includes a plurality of sense resistors and a current sensor. One end of each sense resistor is coupled to a common-connected node of two capacitors, and the other end of each sense resistor is coupled to a common-connected node of two balanced resistors. The current sensor is coupled to one of the sense resistors, and measures a current value of a current flowing through the sense resistor coupled to the current sensor.

In one embodiment, the first DC voltage and the second DC voltage are acquired by converting an AC voltage by an AC-to-DC converter, or the first DC voltage and the second DC voltage are provided to the AC-to-DC converter and converted into the AC voltage; the AC-to-DC converter is a multi-level converter.

Further another object of the present disclosure is to provide a detection apparatus for unbalanced DC link capacitor voltage to solve the above-mentioned problems.

In order to achieve the above-mentioned object, the DC link has a neutral node and provides a first DC voltage and a second DC voltage, and has a plurality of capacitors coupled in series to two ends of the DC link and a plurality of balanced resistors coupled in series to two ends of the DC link and corresponding to the capacitors. The detection apparatus includes a plurality of sense resistors, a first current sensor, and a second current sensor. One end of each sense resistor is coupled to a common-connected node of two capacitors, and the other end of each sense resistor is coupled to a common-connected node of two balanced resistors. No sense resistor is coupled to the neutral node. The first current sensor is coupled to one of the sense resistors corresponding to the first DC voltage, and measures a first current value of a current flowing through the sense resistor coupled to the first current sensor. The second current sensor is coupled to one of the sense resistors corresponding to the second DC voltage, and measures a second current value of a current flowing through the sense resistor coupled to the second current sensor.

In one embodiment, the first current sensor and the second current sensor are a Hall-effect current sensor or a current sense amplifier.

Accordingly, the detection apparatus for unbalanced DC link capacitor voltage is provided to determine whether the first DC voltage and the second DC voltage withstood by a plurality of capacitors are balanced or not and to eliminate the situation of abnormal voltage.

It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the present disclosure as claimed. Other advantages and features of the present disclosure will be apparent from the following description, drawings and claims, wherein the scope of the invention is defined by the appended claims.

The present disclosure can be more fully understood by reading the following detailed description of the embodiment, with reference made to the accompanying drawing as follows:.

Reference will now be made to the drawing figures to describe the present disclosure in detail. It will be understood that the drawing figures and exemplified embodiments of present disclosure are not limited to the details thereof.

Please refer to <FIG>, which shows a block circuit diagram of a detection apparatus for unbalanced DC link capacitor voltage according to the present disclosure. In order to detect whether a first DC voltage V<NUM> and a second DC voltage V<NUM> are unbalanced at a DC link of an AC-to-DC converter, sense resistors RS1, RS2 are used. In particular, one end of the sense resistor RS1 is coupled to a common-connected node of two capacitors C<NUM>, C<NUM>, and the other end of the sense resistor RS1 is coupled to a common-connected node of two balanced resistors R<NUM>, R<NUM>. Similarly, one end of the sense resistor RS2 is coupled to a common-connected node of two capacitors C<NUM>, C<NUM>, and the other end of the sense resistor RS2 is coupled to a common-connected node of two balanced resistors R<NUM>, R<NUM>.

The principle of using the sense resistors RS1, RS2 to determine whether the first DC voltage V<NUM> and the second DC voltage V<NUM> are unbalanced is as follows. Take the first DC voltage V<NUM> as an example. When voltages of the capacitors (i.e., the capacitors C11, C12) corresponding to the first DC voltage V<NUM> are balanced, no current flows through the sense resistor RS1, and therefore a voltage across the sense resistor RS1 is zero volt.

If any voltage of the capacitor is abnormal, there is current instantly flowing through the sense resistor RS1, and therefore a voltage across the sense resistor RS1 is generated. For example, it is assumed that the first DC voltage V<NUM> is <NUM> volts, and a withstand voltage of the capacitor C<NUM> is <NUM> volts and a withstand voltage of the capacitor C<NUM> is <NUM> volts. It is apparent that unbalanced voltage occurs since the withstand voltage of the capacitor C<NUM> and that of the capacitor C<NUM> should be <NUM> volts when voltages of the capacitors C11, C12 are balanced. At this condition, a current flows through the capacitor C<NUM>, the sense resistor RS1, and the balanced resistor R<NUM>, and another current flows through the balanced resistor R<NUM>, the capacitor C<NUM>, and the sense resistor RS1. For the sense resistor RS1, a net current flowing through the sense resistor RS1 from left to right (see from the frontal view of <FIG>) is equal to the sum of the two currents. Therefore, if the current flowing through the sense resistor RS1 is not zero, it represents that voltages of the capacitors (i.e., the capacitors C11, C12) corresponding to the first DC voltage V<NUM> are not balanced. Similarly, it is assumed that the first DC voltage V<NUM> is <NUM> volts, and a withstand voltage of the capacitor C<NUM> is <NUM> volts and a withstand voltage of the capacitor C<NUM> is <NUM> volts. It is apparent that unbalanced voltage occurs since the withstand voltage of the capacitor C<NUM> and that of the capacitor C<NUM> should be <NUM> volts when voltages of the capacitors C11, C12 are balanced. At this condition, a current flows through the capacitor C<NUM>, the balanced resistor R<NUM>, and the sense resistor RS1, and another current flows through the balanced resistor R<NUM>, the sense resistor RS1, and the capacitor C<NUM>. For the sense resistor RS1, a net current flowing through the sense resistor RS1 from right to left (see from the frontal view of <FIG>) is equal to the sum of the two currents. Therefore, if the current flowing through the sense resistor RS1 is not zero, it represents that voltages of the capacitors (i.e., the capacitors C11, C12) corresponding to the first DC voltage V<NUM> are not balanced.

Therefore, as long as a current sensor, such as but not limited to a Hall-effect current sensor or a current sense amplifier implemented by an OPA shown in <FIG>, is provided with the sense resistor RS1, it can measure whether a current flowing through the sense resistor RS1 is zero to determine whether voltages of capacitors are balanced. For the current sense amplifier shown in <FIG>, as long as a current flowing through the sense resistor RS is zero, i.e., a current value Is of the current is zero, a voltage across the sense resistor RS is zero (i.e., VS is zero), and therefore an output voltage Vs' amplified/gained by resistor RB and resistor RA is also zero. On the contrary, as long as the current value IS of the current is not zero, the voltage across the sense resistor RS is not zero (i.e., VS is not zero), and therefore the output voltage Vs' amplified/gained by resistor RB and resistor RA is also not zero. Accordingly, it can determine whether voltages of the capacitors (i.e., the capacitors C11, C12) corresponding to the first DC voltage V<NUM> are balanced or not. Further, since the operation manner of the sense resistor RS2 is the same as that of the sense resistor RS1, the detail description is omitted here for conciseness.

Please refer to <FIG>, which shows a block circuit diagram of the detection apparatus for unbalanced DC link capacitor voltage according to a first embodiment of the present disclosure. The DC link provides a DC voltage VDC. In particular, the DC voltage VDC may be a DC voltage outputted from an AC-to-DC converter, such as a multi-level converter, by converting an AC voltage VAC by the AC-to-DC converter. Alternatively, the DC voltage VDC may be acquired by converting another DC voltage by a DC-to-DC converter, or the DC voltage VDC may be provided to the DC-to-DC converter and converted into the another DC voltage. In particular, the DC voltage VDC is greater than <NUM> volts. Furthermore, as shown in <FIG>, the DC link capacitor voltage distribution of a single-phase AC voltage conversion is exemplified. In different applications, it can also be the DC link capacitor voltage distribution of a three-phase AC voltage conversion (refer to <FIG>).

Refer to <FIG> again, the circuit structure includes capacitors C<NUM>-C1N, balanced resistors RB11-RB1N, sense resistors RS1-RSM, and a current sensor A. The capacitors C<NUM>-C1N are coupled in series to form the DC link and to averagely withstand the DC voltage VDC. The balanced resistors RB11-RB1N are coupled in series and correspond to the capacitors C<NUM>-C1N. For example, the balanced resistor RB11 corresponds to the capacitor C<NUM>, and so forth, the balanced resistor RB1N corresponds to the capacitor C1N. One end of each sense resistor RS1-RSM is coupled to a common-connected node of two capacitors C<NUM>-C1N and the other end of each sense resistor RS1-RSM is coupled to a common-connected node of two balanced resistors RB11-RB1N. For example, one end of the sense resistor RS1 is coupled to a common-connected node of the capacitor C<NUM> and the capacitor C<NUM>, and the other end of the sense resistor RS1 is coupled to a common-connected node of the balanced resistor RB11 and the balanced resistor RB12. The current sensor A is coupled to one of the sense resistors RS1-RSM and measures a current value of a current flowing through the sense resistor RS1-RSM coupled to the current sensor A. As shown in <FIG>, the current sensor A is used to measure a current value IS of a current flowing through the sense resistor RSM.

If the current value Is is not zero, the detection apparatus detects that voltages withstood by capacitors C<NUM>-C1N are not balanced. On the contrary, if the current value IS is zero, the detection apparatus detects that voltages withstood by capacitors C<NUM>-C1N are balanced. In this embodiment, the number of the capacitors C<NUM>-C1N and the number of the balanced resistors RB11-RB1N are N, and the number of the sense resistors RS1-RSM is M, and M=N-<NUM>. As shown in <FIG>, although the current sensor A is coupled to the sense resistor RSM and provided to measure a current value of a current flowing through the sense resistor RSM for determining whether the DC voltage VDC withstood by the capacitors C<NUM>-C1N are balanced or not. Alternatively, the current sensor A can also be coupled to other sense resistors. Also, according to the net current flowing through the sense resistor mentioned above, once the DC voltage VDC withstood by any one of the capacitors C<NUM>-C1N is unbalanced, it can be determined by a non-zero current value measured by the current sensor A.

Please refer to <FIG>, which shows a block circuit diagram of the detection apparatus for unbalanced DC link capacitor voltage according to a second embodiment of the present disclosure. The DC link has a neutral node N and provides a first DC voltage VDC1 and a second DC voltage VDC2. In particular, a sum voltage of the first DC voltage VDC1 and the second DC voltage VDC2 may be a DC link voltage V<NUM> outputted from an AC-to-DC converter, such as a multi-level converter, by converting an AC voltage VAC by the AC-to-DC converter. Alternatively, the sum voltage of the first DC voltage VDC1 and the second DC voltage VDC2 may be another DC link voltage V<NUM> by converting a DC voltage by a DC-to-DC converter. In particular, the first DC voltage VDC1 and the second DC voltage VDC2 are greater than <NUM> volts. Furthermore, as shown in <FIG>, the DC link capacitor voltage distribution of a single-phase AC voltage conversion is exemplified. In different applications, it can also be the DC link capacitor voltage distribution of a three-phase AC voltage conversion (refer to <FIG>).

Refer to <FIG> again, the circuit structure includes capacitors C<NUM>-C1P, C<NUM>-C2Q, balanced resistors RB11-RB11, RB21-RB2Q, sense resistors RS1-RSM, and a current sensor A. The capacitors C<NUM>-C1P, C<NUM>-C2Q are coupled in series to form the DC link and to averagely withstand the first DC voltage VDC1 and the second DC voltage VDC2, that is, the capacitors C<NUM>-C1P averagely withstand the first DC voltage VDC1 and the capacitors C<NUM>-C2Q averagely withstand the second DC voltage VDC2. The balanced resistors RB11-RB1P, RB21-RB2Q are coupled in series and correspond to the capacitors C<NUM>-C1P, C<NUM>-C2Q. For example, the balanced resistor RB11 corresponds to the capacitor C<NUM>, and so forth, the balanced resistor RB2Q corresponds to the capacitor C2Q. One end of each sense resistor RS1-RSM is coupled to a common-connected node of two capacitors C<NUM>-C1P, C<NUM>-C2Q and the other end of each sense resistor RS1-RSM is coupled to a common-connected node of two balanced resistors RB11-RB11, RB21-RB2Q. For example, one end of the sense resistor RS1 is coupled to a common-connected node of the capacitor C<NUM> and the capacitor C<NUM>, and the other end of the sense resistor RS1 is coupled to a common-connected node of the balanced resistor RB11 and the balanced resistor RB12. The current sensor A is coupled to one of the sense resistors RS1-RSM and measures a current value of a current flowing through the sense resistor RS1-RSM coupled to the current sensor A. As shown in <FIG>, the current sensor A is used to measure a current value Is of a current flowing through the sense resistor RSM.

If the current value Is is not zero, the detection apparatus detects that voltages withstood by capacitors C<NUM>-C1P, C<NUM>-C2Q are not balanced. On the contrary, if the current value IS is zero, the detection apparatus detects that voltages withstood by capacitors C<NUM>-C1P, C<NUM>-C2Q are balanced. In this embodiment, the number of the capacitors C<NUM>-C1P, C<NUM>-C2Q and the number of the balanced resistors RB11-RB11, RB21-RB2Q are P+Q, and the number of the sense resistors RS1-RSM is M, and M=P+Q-<NUM>. As shown in <FIG>, although the current sensor A is coupled to the sense resistor RSM and provided to measure a current value of a current flowing through the sense resistor RSM for determining whether the first DC voltage VDC1 withstood by the capacitors C<NUM>-C1P and the second DC voltage VDC2 withstood by the capacitors C<NUM>-C2Q are balanced or not. Alternatively, the current sensor A can also be coupled to other sense resistors. Also, according to the net current flowing through the sense resistor mentioned above, once the first DC voltage VDC1 withstood by any one of the capacitors C<NUM>-C1P or the second DC voltage VDC2 withstood by any one of the capacitors C<NUM>-C2Q is unbalanced, it can be determined by a non-zero current value measured by the current sensor A.

Please refer to <FIG>, which shows a block circuit diagram of the detection apparatus for unbalanced DC link capacitor voltage according to a third embodiment of the present disclosure. The DC link has a neutral node N and provides a first DC voltage VDC1 and a second DC voltage VDC2. In particular, the first DC voltage VDC1 and the second DC voltage VDC2 may be voltages outputted from an AC-to-DC converter, such as a multi-level converter, by converting an AC voltage VAC by the AC-to-DC converter. Alternatively, the first DC voltage VDC1 and the second DC voltage VDC2 may be another DC voltage by converting a DC voltage by a DC-to-DC converter. In particular, the first DC voltage VDC1 and the second DC voltage VDC2 are greater than <NUM> volts. Furthermore, as shown in <FIG>, the DC link capacitor voltage distribution of a single-phase AC voltage conversion is exemplified. In different applications, it can also be the DC link capacitor voltage distribution of a three-phase AC voltage conversion (refer to <FIG>).

Refer to <FIG> again, the circuit structure includes capacitors C<NUM>-C1N, C<NUM>-C2N, balanced resistors RB11-RB1N, RB21-RB2N, sense resistors RS11-RS1M, RS21-RS2M, a first current sensor A<NUM>, and a second current sensor A<NUM>. The capacitors C<NUM>-C1N, C<NUM>-C2N are coupled in series to form the DC link and to averagely withstand the first DC voltage VDC1 and the second DC voltage VDC2, that is, the capacitors C<NUM>-C1N averagely withstand the first DC voltage VDC1 and the capacitors C<NUM>-C2N averagely withstand the second DC voltage VDC2. The balanced resistors RB11-RB1N, RB21-RB2N are coupled in series and correspond to the capacitors C<NUM>-C1N, C<NUM>-C2N. For example, the balanced resistor RB11 corresponds to the capacitor C<NUM>, and so forth, the balanced resistor RB2N corresponds to the capacitor C2N. One end of each sense resistor RS11-RS1M, RS21-RS2M is coupled to a common-connected node of two capacitors C<NUM>-C1N, C<NUM>-C2N and the other end of each sense resistor RS11-RS1M, RS21-RS2M is coupled to a common-connected node of two balanced resistors RB11-RB1N, RB21-RB2N. However, no sense resistor RS11-RS1M, RS21-RS2M is coupled to the neutral node N. For example, one end of the sense resistor RS11 is coupled to a common-connected node of the capacitor C<NUM> and the capacitor C<NUM>, and the other end of the sense resistor RS11 is coupled to a common-connected node of the balanced resistor RB11 and the balanced resistor RB12. The first current sensor A<NUM> is coupled to one of the sense resistors RS11-RS1M corresponding to the first DC voltage VDC1 and measures a current value of a current flowing through the sense resistor RS11-RS1M coupled to the first current sensor A<NUM>. As shown in <FIG>, the first current sensor A<NUM> is used to measure a first current value IS1 of a current flowing through the sense resistor RS1M. If the first current value IS1 is not zero, the detection apparatus detects that the first DC voltage VDC1 withstood by the capacitors C<NUM>-C1N is not balanced. On the contrary, if the first current value IS1 is zero, the detection apparatus detects that the first DC voltage VDC1 withstood by the capacitors C<NUM>-C1N is balanced.

The second current sensor A<NUM> is coupled to one of the sense resistors RS21-RS2M corresponding to the second DC voltage VDC2 and measures a current value of a current flowing through the sense resistor RS21-RS2M coupled to the second current sensor A<NUM>. As shown in <FIG>, the second current sensor A<NUM> is used to measure a second current value IS2 of a current flowing through the sense resistor RS2M. If the second current value IS2 is not zero, the detection apparatus detects that the second DC voltage VDC2 withstood by the capacitors C<NUM>-C2N is not balanced. On the contrary, if the second current value IS2 is zero, the detection apparatus detects that the second DC voltage VDC2 withstood by the capacitors C<NUM>-C2N is balanced. In this embodiment, the number of the capacitors C<NUM>-C1N, C<NUM>-C2N and the number of the balanced resistors RB11-RB1N, RB21-RB2N are 2N, and the number of the sense resistors RS11-RS1M, RS21-RS2M is <NUM>, and M=N-<NUM>. As shown in <FIG>, although the first current sensor A<NUM> is coupled to the sense resistor RS1M and provided to measure a current value of a current flowing through the sense resistor RS1M for determining whether the first DC voltage VDC1 withstood by the capacitors C<NUM>-C1N is balanced or not. Alternatively, the first current sensor A<NUM> can also be coupled to other sense resistors. Also, according to the net current flowing through the sense resistor mentioned above, once the first DC voltage VDC1 withstood by any one of the capacitors C<NUM>-C1N is unbalanced, it can be determined by a non-zero current value measured by the first current sensor A<NUM>. Similarly, although the second current sensor A<NUM> is coupled to the sense resistor RS2M and provided to measure a current value of a current flowing through the sense resistor RS2M for determining whether the second DC voltage VDC2 withstood by the capacitors C<NUM>-C2N is balanced or not. Alternatively, the second current sensor A<NUM> can also be coupled to other sense resistors. Also, according to the net current flowing through the sense resistor mentioned above, once the second DC voltage VDC2 withstood by any one of the capacitors C<NUM>-C2N is unbalanced, it can be determined by a non-zero current value measured by the second current sensor A<NUM>.

The above-mentioned embodiments (examples) are described in an ideal situation. However, in actual situations, the net current flowing through the sense resistor may be not equal to zero even if the voltage withstood by the capacitors is balanced because of the tolerance of component values of the capacitors and the balanced resistors. Therefore, a non-zero threshold current value Ith can be provided to determine whether the voltage withstood by the capacitors is balanced or not. Specifically, when the net current measured by the current sensor is greater than (or equal to) the threshold current value Ith, the voltage withstood by the capacitors is determined to be unbalanced.

Claim 1:
A power conversion system with unbalance detection function, the power conversion system comprising:
a DC link, configured to provide a DC voltage (VDC),
a plurality of capacitors (C<NUM>-C1N), coupled in series to two ends of the DC link,
a plurality of balanced resistors (RB11-RB1N), coupled in series to two ends of the DC link and corresponding to the capacitors (C<NUM>-C1N),
a plurality of sense resistors (RS1-RSM), one end of each sense resistor (RS1-RSM) coupled to a common-connected node of two capacitors (C<NUM>-C1N), and the other end of each sense resistor (RS1-RSM) coupled to a common-connected node of two balanced resistors (RB11-RB1N), and
a current sensor (A) coupled to one of the sense resistors (RS1-RSM), and configured to measure a current value (Is) of a current flowing through the sense resistor (RS1-RSM) coupled to the current sensor (A).