Patent Description:
This section introduces aspects that may help facilitate a better understanding of the inventions.

Tunable filters are important components of wavelength tunable optical apparatuses such as wavelength-division multiplexing (WDM) receivers, optical system monitors and tunable lasers.

Tunable filters are often tuned by angular rotation, carrier injection or thermal means. Mechanical angle tuning can require large electrostatic or electromagnetic motor arrangements. Carrier injection can introduce absorption losses together with refractive index tuning. Thermal tuning can be subject to tuning crosstalk from unintended thermal variations from the environment or other co-integrated components that are dissipating varying heat loads over time.

<CIT>discloses a tunable Fabry Perot filter provided over a resistive layer on a support layer, wherein the support layer spans a cavity in an underlying substrate.

One embodiment is an optical apparatus according to claim <NUM>.

Any such embodiments of the apparatus can further include another etalon optical filter located on another membrane portion of the dielectric layer over another cavity in the surface of the semiconductor substrate, and another resistive heater located below the another etalon filter and on the another portion of the dielectric layer. The another resistive heater can be controllable by applying a current thereto and the another etalon optical filter can be wavelength tunable by the another resistive heater.

In some embodiments the dielectric layer can be a silica layer and the semiconductor substrate can be a silicon substrate. In some such embodiments, the semiconductor substrate can be a silicon optical bench substrate.

In any such embodiments of the apparatus an area footprint of the resistive heater on the membrane portion can be within an area footprint of the etalon optical filter on the membrane portion.

In some embodiments of the apparatus the resistive heater can be electrically connected to a metal filled via passing through the dielectric layer.

In some embodiments of the apparatus, the etalon optical filter can be coated with a partially reflective dielectric material layer.

In some embodiments of the apparatus, the cavity can have an undercut portion with an undercut length below the membrane portion that can be a value in a range from <NUM> to <NUM> microns, and a maximal cavity depth below the membrane portion that can be in a range from <NUM> to <NUM> microns.

Any such embodiments of the apparatus can include a thermally tunable optical filter that is part of a planar optical assembly that further includes a portion of an optical fiber positioned on semiconductor substrate to transmit a light of different selected wavelengths through the etalon optical filter. In some such embodiments, the optical fiber can be located to transmit the light via the etalon optical filter to a photodetector located on the semiconductor substrate.

In any such embodiments, the planar optical assembly can further include a tunable optical phase shifter chip physically located on a different one of the resistive heater layer and located between a first one of the etalon optical filter and a second one of the etalon optical filter, wherein the phase chip is thermally tunable by applying another current through the different one of the resistive layer.

In any such embodiments, the planar optical assembly can further include a reflective semiconductor optical amplifier gain chip located on the semiconductor substrate and optically located between the optical fiber and the thermally tuned optical filter.

In any such embodiments, the planar optical assembly can further include a lens located on the semiconductor substrate and between the photodetector and the thermally tunable optical filter.

In any such embodiments, the planar optical assembly can further include a lens located on the semiconductor substrate and between the optical fiber and a partial mirror or isolator located on the semiconductor substrate.

In any such embodiments, the planar optical assembly can be a wavelength-tunable optical receiver for a Wavelength Division Multiplexing Passive Optical Network.

Another embodiment is method of manufacturing an optical apparatus according to claim <NUM>.

In any embodiments of the method, the forming of the cavity can include, after forming the resistive layer and after forming the electrode layer, forming one or more openings in the dielectric layer and then etching the semiconductor substrate through the one or more openings.

In any embodiments of the method, the forming of the resistive layer and the forming of the electrode layer can include, after forming the cavity, sputter depositing a nickel-chromium layer on the dielectric layer and then patterning the nickel-chromium layer to form the resistive layer and the electrode layer connected to the resistive layer.

The embodiments of the disclosure are best understood from the following detailed description, when read with the accompanying FIGUREs. Some features in the figures may be described as, for example, "top," "bottom," "vertical" or "lateral" for convenience in referring to those features. Such descriptions do not limit the orientation of such features with respect to the natural horizon or gravity. Various features may not be drawn to scale and may be arbitrarily increased or reduced in size for clarity of discussion. Reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:.

In the Figures and text, similar or like reference symbols indicate elements with similar or the same functions and/or structures.

In the Figures, the relative dimensions of some features may be exaggerated to more clearly illustrate one or more of the structures or features therein.

Herein, various embodiments are described more fully by the Figures and the Detailed Description. Nevertheless, the invention is defined only by the appended claims.

Embodiments of the invention are driven by the desire to increase levels of integration for optical assemblies expected to have increasing thermal densities and gradients. The invention embodiments provide an optical assembly with improved thermal isolation of etalon optical filters. The assembly integrates a thermal isolation layer so that the optical filters are located on the layer and over a free space cavity in the substrate of the assembly. Other assembly components (e.g., detectors and gain chips) can thereby be thermally tuned while simultaneously being thermally isolated from power dissipating components on the same substrate.

As demonstrated herein these features also facilitate the manufacture of optical apparatus embodiments, such as optical assemblies, with reduced thermal crosstalk effects during tuning and consequently there is reduced complexity for adjusting filter and phase controls. Such adjustability can be over substantial parts of a laser power curve, with the lasing frequency unaffected by the large changes in a reflective semiconductor optical amplifier gain chip (RSOA) bias power.

One embodiment of the disclosure is an optical apparatus. , <FIG> and <FIG> presents a perspective view of an example embodiments of an optical apparatus <NUM> of the disclosure and <FIG> presents a detailed side view of a portion of the apparatus depicted in <FIG>. <FIG> presents a top down view of another example embodiment of an optical apparatus of the disclosure, similar to the optical apparatuses depicted in <FIG> and <FIG> presents a side view of the optical apparatus of depicted in <FIG>.

One embodiment of the disclosure is an optical apparatus. <FIG> and <FIG> present perspective views of example embodiments of an optical apparatus <NUM> of the disclosure. <FIG> presents a detailed side view of a portion of the apparatus depicted in <FIG>. <FIG> presents a top down view of another example embodiment of an optical apparatus of the disclosure, i.e., similar to the optical apparatus depicted in <FIG>. <FIG> presents a side view of the optical apparatus of depicted in <FIG>.

Embodiments of the dielectric layer <NUM> can be or include a low thermal conductance layer that can be made of silica (e.g., silicon dioxide, thermal conductance equal to about <NUM> W/mK at °C), silicon nitride <NUM> W/mK at <NUM>, aerogel (<NUM> W/mK at <NUM>) or similar materials familiar to those skilled in the pertinent art, such as materials having a thermal conductivity value in a range from <NUM> to <NUM> W/m K at <NUM>, or an upper thermal conductivity value of less than <NUM> W/mK at <NUM> in some embodiments.

Embodiments of the semiconductor substrate <NUM> can be or include a high thermal conductance layer that can be made of silicon (<NUM> W/mK at <NUM>), gallium arsenide (<NUM> W/mK at <NUM>), indium phosphide (<NUM> W/mK at <NUM>) or similar materials familiar to those skilled in the pertinent art, such as materials having a thermal conductivity value in a range from <NUM> to <NUM> W/m K at <NUM>, or an lower thermal conductivity value of greater than <NUM> W/mK at <NUM> in some embodiments.

In some embodiments, to facilitate thermal isolation of the etalon optical filter, the dielectric layer <NUM> (e.g., low thermal conductance layer) has a thermal conductance that is at least <NUM> (and in some embodiments, at least <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM> or <NUM>) or times lower than the thermal conductance of the semiconductor high thermal conductance layer.

Some embodiments of the resistive heater <NUM> can be or include a layer composed of chrome (e.g., chromium, resistivity equal to about 4e-<NUM>Ω·m at <NUM>), nickel-chromium (<NUM>. 1e-<NUM>Ω·m at <NUM>), tantalum nitride (<NUM>. 0e-<NUM>Ω·m at <NUM>) or similar materials familiar to those skilled in the pertinent art, such as materials having a resistivity value in a range from <NUM> to <NUM> e-<NUM>Ω·m at <NUM>, or a minimum resistivity value of equal to or greater than <NUM> e-<NUM>Ω·m in some embodiments. In some embodiments, the resistive heater <NUM> includes a nickel chromium alloy layer.

Some embodiments of the etalon optical filter can be or include high thermal conductance and low optical loss materials such as silicon, gallium arsenide or indium phosphide or similar materials familiar to those skilled in the pertinent art, such as materials providing an upper optical loss value of the etalon of less than <NUM>. 2dB in some embodiments.

Some embodiments of the membrane portion <NUM> can include or be dielectric low thermal conductance layer having a thickness <NUM> in a range from <NUM> to <NUM> microns (e.g., <NUM> micron).

As illustrated, embodiments of the etalon optical filter <NUM> include a silicon slab being upright on the dielectric layer <NUM>.

Embodiments of the apparatus <NUM> can include another etalon optical filter 140b located on another membrane portion 120b of the dielectric layer <NUM> over another cavity 125b in the surface <NUM> of the semiconductor substrate <NUM>, and another resistive heater 130b located below the another etalon filter 140b and on the another portion 120b of the dielectric layer <NUM>. The other resistive heater <NUM> can be controllable by applying a current thereto and the other etalon optical filter 140b can be wavelength tunable by the another resistive heater 130b.

For instance, the optical apparatus <NUM> can include one or more thermally-tuned optical filters <NUM>. For example each thermally-tuned optical filter <NUM> can include the dielectric low thermal conductance layer <NUM> located on a semiconductor high thermal conductance layer <NUM>, where a membrane portion <NUM> of the low thermal conductance layer is located over a cavity <NUM> in the high thermal conductance layer, the resistive heater <NUM> located on the membrane portion where a temperature of the resistive layer is controllable by a current applied from an electrode layer <NUM> connected to the resistive layer and the etalon optical filter <NUM> located on the resistive layer and over the cavity, where the optical passband through the etalon optical filter is tunable by changing a refractive index of the etalon optical filter from the temperature change of the resistive heater layer.

For instance, to provide enhanced composite optical tuning, the apparatus <NUM> can include two or more of the thermally tunable optical filters <NUM>, 102b each having two or more of the etalon optical filter 140a, 140b located on different ones of the resistive heater 130a, 130b which are located as layers on different ones of the membrane portions 120a, 120b and which are located over different ones of the cavities 125a, 125b in the semiconductor high thermal conductance layer <NUM>, where the different ones of the cavities are separated by a pillar portions <NUM> of the semiconductor high thermal conductance layer <NUM>, the pillar portions contacting the dielectric (e.g., low thermal conductance) layer <NUM>.

In some embodiments of the apparatus <NUM>, the dielectric layer <NUM> is a silica layer and the semiconductor substrate <NUM> is a silicon substrate. In some such embodiments, the semiconductor substrate <NUM> is a silicon optical bench substrate.

For instance, for some embodiment, the dielectric layer <NUM> (e.g., low thermal conductance layer) can include a silica layer and the semiconductor substrate <NUM> (e.g., high thermal conductance layer) can include a doped and annealed silicon layer located on a wafer substrate <NUM>. In some such embodiments the wafer substrate <NUM> can be our include a silicon optical bench substrate. In some such embodiments, the wafer substrate (e.g., substrate <NUM>) preferably has a thermal expansion coefficient that is the same or nearly the same (e.g., within <NUM>, <NUM>, <NUM>, <NUM>, <NUM> or <NUM> %) as the semiconductor high thermal conductance layer <NUM>.

As illustrated in <FIG> in some apparatus embodiments an area footprint <NUM> of the resistive heater 130a on the membrane portion 120a can be within an area footprint <NUM> of the etalon optical filter 140a on the membrane portion 120a. For instance, in some embodiments an area footprint <NUM> of the resistive heater <NUM>, in a plane <NUM> of the membrane portion <NUM> is less than and within an area footprint <NUM> of the etalon optical filter <NUM>. As a non-limiting examples, the area footprint <NUM> of the etalon optical filter can have a value in a range from <NUM> x <NUM> to <NUM> x <NUM> squared microns, and in some embodiments, <NUM> x <NUM> squared microns, and, the area footprint <NUM> of the resistive layer can have a value in a range from <NUM> x <NUM> squared microns to <NUM> x <NUM> squared microns and in some embodiments, <NUM> x <NUM> squared microns.

In some embodiments, to provide an alternate means to supply power to the resistive heater (<NUM>), a power supply source <NUM> is electrically connected to a metal filled via <NUM> passing through the dielectric layer <NUM>. For instance, in some embodiments, the electrode layer <NUM> can be connected to an electrically conductive metal filled via <NUM> passing through the dielectric layer <NUM> and semiconductor substrate <NUM> to an underlying power source <NUM> located on a wafer substrate <NUM>.

In any embodiments of the apparatus, the etalon optical filter is coated with a partially reflective material layer <NUM>. For instance, partially reflective material layer serving as Bragg coating layers <NUM> of the etalon optical filter <NUM> can have a thickness <NUM> in a direction that lies in the plane of a surface <NUM> of the dielectric low thermal conductance layer <NUM>, that are equal to about one-quarter wavelength of light (e.g., C and L bands; e.g., <NUM>) directable through the etalon optical filter.

For instance, a pair of silica and silicon coatings, serving as partially reflective material layers <NUM>, of approximately quarter wave optical thickness at <NUM> can be coated on both sides of a silicon wafer and the wafer diced to provide one-pair Bragg mirrors with approximately <NUM>% reflectivity per side. One skilled in the art would appreciate how the etalon optical filter's thickness (e.g., a value in a range from <NUM> to <NUM> microns for some embodiments) in the optical path direction (e.g., <FIG> direction of transmitted light <NUM>) would be decided by the filter's target free spectral range FSR and optical index.

As illustrated in <FIG>, some embodiments of the cavity <NUM> have an undercut portion <NUM> with an undercut length <NUM> below the membrane portion <NUM> that is a value in a range from <NUM> to <NUM> microns, and a maximal cavity depth <NUM> below the membrane portion <NUM> can be in a range from <NUM> to <NUM> microns. In some embodiments, the undercut portion <NUM> of the dielectric layer <NUM>, and in embodiments, the entire dielectric lay <NUM>, has a thickness <NUM> that is a value in a range from <NUM> to <NUM> microns; e.g., <NUM> microns in some embodiments. Such undercutting can further help in thermally isolating the etalon from the bulk of the highly thermally conductive semiconductor layer/substrate <NUM>.

Some embodiments of the optical apparatus are part of a planar optical assembly.

<FIG> presents a side view of an example planar optical assembly <NUM>, which can include any embodiments of the apparatus <NUM> disclosed in the context of <FIG>. <FIG> presents a top down view of the optical apparatus depicted in <FIG>. <FIG> presents another example embodiment of an optical apparatus similar to that shown in <FIG>. <FIG> presents another example embodiment of an optical apparatus similar to that shown in <FIG>.

With continuing reference to <FIG> throughout, some embodiments of the apparatus <NUM> include the thermally tunable optical filter <NUM> that is part of a planar optical assembly <NUM> (<FIG>) that can further include a portion of an optical fiber <NUM> (e.g., a fiber end segment). The thermally tunable optical filter <NUM> and optical fiber <NUM> can be positioned on the semiconductor substrate <NUM> to transmit a light <NUM> of different selected various wavelengths through the etalon optical filter (e.g., one or more filters 140a, 140b). In some such embodiments, the optical fiber <NUM> can be located to transmit a portion of the light <NUM> via the etalon optical filter to a photodetector <NUM> (e.g., a solid state photon counting detector) located on the semiconductor substrate <NUM> (e.g., high thermal conductance layer).

In some embodiments, the planar optical assembly <NUM> can further include a tunable optical phase shifter chip <NUM> physically located on a different resistive heater <NUM> and located between a first one of the etalon optical filter 140a and a second one of the etalon optical filter 140b, wherein the chip <NUM> is thermally tunable by applying another current through the different resistive heater <NUM>.

In some embodiments, the planar optical assembly <NUM> can further include a reflective semiconductor optical amplifier gain chip (RSOA) <NUM> located on the semiconductor substrate <NUM> and optically located between the optical fiber <NUM> and the thermally tunable optical filter 140a.

In some embodiments, the planar optical assembly <NUM> can further include a lens <NUM> located on the semiconductor substrate <NUM> and between the photodetector <NUM> and the thermally tunable optical filter 102a.

In some embodiments, the planar optical assembly <NUM> can further include includes a lens <NUM> located on the semiconductor substrate <NUM> and between the optical fiber <NUM> and a partial mirror <NUM> or isolator <NUM> located on the semiconductor substrate <NUM>. Some embodiments can further include both such lens <NUM>, <NUM> located as disclosed above.

In some embodiments, the planar optical assembly <NUM> can be or include a wavelength-tunable optical receiver for a Wavelength Division Multiplexing Passive Optical Network.

In some embodiments, the planar optical assembly <NUM> can be or include a standalone tunable receiver further including first optical fiber (e.g., fiber 205a, <FIG>) to direct light through the filter <NUM>, such as discloses elsewhere herein, to a second optical fiber (e.g., fiber 205b, <FIG>), or, to a detector <NUM> (e.g., a photodetector <FIG>) positioned on the semiconductor substrate <NUM> to receive the light <NUM> passing through the etalon optical filter <NUM>.

In some embodiments, the planar optical assembly <NUM> is a laser whose laser cavity is between the reflector of the RSOA <NUM> and the partially reflective mirror <NUM>. In such embodiments one or more etalon optical filters 140a, 140b are located to filter light in an optical laser cavity of the laser.

Another embodiment is a method of manufacturing an optical apparatus. <FIG> presents a flow diagram illustrating selected steps in an example method <NUM> of manufacturing an optical apparatus of the disclosure including any of the apparatus <NUM> or assembly <NUM> embodiments disclosed in the context of <FIG>.

With continuing reference to <FIG> throughout, embodiments of the method can include forming (step <NUM>) a thermally tunable optical filter <NUM>. Forming the filter <NUM> can include providing (e.g., a first step <NUM>) a semiconductor substrate <NUM> (e.g., any embodiments of the high thermal conductance layer disclosed herein) and depositing (e.g., then step <NUM>) a dielectric layer <NUM> (e.g., any embodiments of the low thermal conductance layer disclosed herein) on the semiconductor substrate. In some embodiments depositing the dielectric layer (step <NUM>) includes a PECVD process, e.g., depositing layer of PECVD doped silica and then annealing so that dielectric layer is stress matched to the semiconductor substrate.

Forming the thermally tunable optical filter <NUM> can also include forming a cavity <NUM> (step <NUM>) in the semiconductor substrate where a membrane portion <NUM> of the dielectric layer <NUM> will be located over the cavity in the semiconductor substrate. In some embodiments, forming the cavity (step <NUM>) can include patterning and etching openings in the dielectric layer using anisotropic reactive ion etching (RIE). For instance (e.g., silica glass) anisotropic etching materials can be selected such that etching terminates with high selectivity on the underlying semiconductor substrate. The forming step <NUM> can include then, isotropically etching the semiconductor substrate <NUM>, e.g., by subjecting the semiconductor substrate to an appropriate isotropic etchant (e.g., SF<NUM>) through the previously produced openings in the dielectric layer <NUM>.

Forming the filter <NUM> can further include forming (step <NUM>) a resistive heater <NUM> on the membrane portion <NUM> of the dielectric layer <NUM> and forming (step <NUM>) an electrode layer <NUM> connected to the resistive heater <NUM> such that a temperature of the resistive heater is controllable by a current applied by the electrode layer to the resistive heater.

Forming the filter <NUM> can further include positioning (step <NUM>) an etalon optical filter <NUM> to be located on (e.g., directly on) the resistive heater and on the membrane portion of the dielectric layer and over the corresponding cavity, wherein an optical passband through the etalon optical filter is tunable by changing a refractive index of the etalon optical filter from the temperature change due to heat applied thereto with the resistive heater.

In some such embodiments, forming the cavity (step <NUM>) includes, after forming <NUM> the resistive heater <NUM> (step <NUM>) and after forming <NUM> the electrode layer <NUM>, forming one or more openings in the dielectric layer <NUM> and then etching (e.g., isotropically etching) the semiconductor substrate through the one or more openings.

In some such embodiments, forming the resistive heater (step <NUM>) and the forming of the electrode layer (step <NUM>) can include, after forming the cavity (step <NUM>), sputter depositing a nickel-chromium layer (e.g., resistive heater layer <NUM>) on the dielectric layer <NUM> and then patterning the nickel-chromium layer to form the resistive layer and the electrode layer connected to the resistive layer. In some embodiments forming the resistive layer can include a lift-off process using evaporation of the NiCr onto pre-patterned photoresist.

In some such embodiments, the positioning (step <NUM>) of the etalon optical filter the resistive heater <NUM> and over the cavity <NUM> includes a pick and place process wherein the etalon optical filter <NUM> is positioned (e.g., as a vertical silicon slab) on an adhesive placed on the resistive heater.

Test optical apparatus assembly structures were manufactured and tested as further disclosed below.

A silica layer (e.g., silica low thermal conductance dielectric layer <NUM>, "silica") was deposited on a silicon wafer (e.g., silicon semiconductor high thermal conductance layer <NUM>, "wafer") by PECVD to form a doped silica layer which was then thermally annealed so that the layer was stress matched to the silicon wafer. Openings in the silica layer were formed by patterning and etching with etching terminated with high selectivity on the underlying silicon wafer. A metal resistive heating layer (e.g., resistive heater <NUM>, "heater") was deposited using sputtering of nickel-chromium. A thin encapsulation dielectric was deposited and vias were opened to the underlying heater. An electrode layer was then deposited to connect the heater and to provide wiring for a gain chip, thermistor and monitor photodiode. A membrane portion of the silica layer was formed by a reactive ion etching (SF<NUM> RIE) to form a cavity in the underlying portion of the silicon wafer. Ball lens cavities in the silicon wafer were also formed using SF<NUM> RIE.

Cross-sections of test etched cavities in test apparatuses, analogous to the cross-section shown in <FIG>, were fabricated and quantified. The dimensions of the membrane were determined based on the thickness of the optical etalon filter needed for a robust laser tuning design and the requirements of the pick-and-place equipment used to attach the filters to the membranes after fabrication. As shown in <FIG>, the silicon under-etch was not fully isotropic, with the etch depth (D) and undercut (U) varying depending on the relative mask opening area due to the dynamics of etchant gas propagation into the cavities. The series of test apparatus structures were fabricated with cavities to identify scaling rules and to ensure robustness to fabrication processes including wafer spinning and dicing. The resulting dependence of D and U based on mask opening area was measured and fitted to facilitate an appropriate design for an efficiently tunable etalon filter with robust mechanical properties.

Informed by the above analysis, test optical assemblies that included embodiments of the optical apparatus were built. The etalon optical filter dimensions was <NUM> microns thick, <NUM> microns wide and <NUM> microns tall. A resistive layer (resistive heater <NUM>) of approximately <NUM> squares of 36Q/square NiCr fitting between two silicon pillars was placed <NUM> microns center-to-center. This design facilitated heat generated in the resistive layer to be directed to travel into the etalon optical filter and then to the edges to reach the silicon pillar path to a thermal ground of the substrate (silicon optical bench substrate, SiOB). Since the silicon etalon optical filter's conductivity was about <NUM> times larger than the silica low thermal conductance layer and membrane, the filter was uniformly heated with substantially no variations in temperature across the filter sufficient to distort tuning behavior.

Silicon etalon optical filters were fabricated by depositing a pair of silica and silicon coatings of approximately quarter wave optical thickness at <NUM> on both sides of a silicon wafer. The resulting films provide one-pair Bragg mirrors with approximately <NUM>% reflectivity per side. Because of the thermal isolation design as disclosed herein, such coated silicon wafers could be used as etalon optical filters without further processing, thereby avoiding the need for integrating with complex heating structures. The ability to avoid such further processing would beneficially improve production yield since such thin wafers (e.g., <NUM> microns thick) are fragile and prone to damage. The optical spectrum of the etalon optical filters was measured using optical collimators and the resulting data was fitted to extract estimated losses and Finesse. Insertion losses of about <NUM> dB loss at peak, a <NUM> free-spectral range and filter Finesse of about <NUM> were measured.

The silica coated silicon wafers were diced into <NUM> micron by <NUM> micron chips to form the etalon optical filters for assembly on a SiOB substrate to form the test optical assembly having a single filter.

Light was coupled from an input optical fiber through the filter and into an output fiber by ball lenses that were actively aligned and then fixed in place with epoxy. The filter was tested by using a thermoelectric cooler (TEC) to increase the temperature of the entire assembly and measure the resulting change in the transmitted optical power. The thermistor used to provide the TEC control loop feedback was embedded in the aluminum base under the sample. The tuning range was small enough that there was a small offset between the recorded temperature of the thermistor and the filter. The optical spectrum as a function of temperature was measured and then, by fitting the shift of the etalon response, the thermo-optic coefficient of the filter material was determined <FIG> to have a value <NUM> per °C. Based on this a temperature change of <NUM> was estimate to provide tuning over one full free spectral range (FSR).

In a further test, the TEC was used to fix the assembly temperature to <NUM> and current was applied to the resistive layer to heat and thereby tune the filter. The applied current and measured voltage across the resistive layer was used to derive the dissipated electrical power and the change in transmitted optical power from a distributed feedback laser source (DFB, <NUM>) was measured over a range of powers. <FIG> shows the measured filter tuning as a function of electrical power (heating power). Tuning over one full FSR was obtained with only <NUM>. 3mW of injected electrical power due to the thermal isolation as disclosed herein.

Further testing was performed on an optical assembly with the apparatus including two etalon optical filters to achieve a wide frequency range of tuning. An assembly such as shown in <FIG> was fabricated.

A silicon phase chip (e.g., optical phase shifter chip <NUM>) was located on membrane portions (e.g., membrane portions <NUM>) and between first and second filters (e.g., filters 140a, 140b) to facilitate providing phase alignment of the composite tuning filter with the overall laser cavity modes and activated by the same thermal tuning mechanism as the filters. The phase chip had antireflection (AR) coatings on both facets to help prevent unwanted frequency ripples. The phase tuner was fabricated from <NUM> micron thick silicon wafers to simplify handling and so a larger membrane portion was employed below it. The Reflective Semiconductor Optical Amplifier (e.g., RSOA gain chip <NUM>) was mounted directly on SiOB substrate with a portion of the <NUM> micron silica low thermal conductance layer removed for efficient thermal transfer to the TEC located on the back side of the substrate. A glass partial mirror (e.g., partial mirror <NUM>) chip coated for <NUM>% transmission and <NUM>% back reflection was used to close the optical path of the laser cavity. After the back reflector (partial mirror), outside the laser cavity, a latched garnet optical isolator (e.g., isolator <NUM>) was added before the output optical fiber (e.g., fiber <NUM>) to help prevent parasitic external reflections from entering the laser cavity. Two ball lenses (e.g., lens <NUM>, <NUM>) were used to couple light (e.g., light <NUM>) from the RSOA to the fiber.

The physical path length of the composite laser cavity was about <NUM> which was equivalent to approximately <NUM> in free space (neglecting etalon optical filter resonant enhancement). The long optical cavity is thought to be beneficial for linewidth reduction for coherent communication purposes where low phase noise is critical for high-capacity modulation. The assembly size was <NUM> x <NUM>, but, since the components were relatively broadly spaced to ensure straightforward assembly for testing purposes, assemblies of reduced sizes can be made.

The FSR values of the two etalon optical filters were selected to yield a wide composite FSR (~<NUM>) for C + L band tuning. The etalon optical filters were fabricated from silicon wafers of about <NUM> microns thickness and two selected portions of the wafer were with appropriate thicknesses to provide the etalon optical filters. The calculated composite cascaded filter spectrum of the vernier pair is shown in <FIG> and is based on the measured single Bragg pair mirror Finesse. The total extended free spectral range was <NUM> THz and the excess loss of the filter from the main peak to the next highest peak was <NUM>. 3dB to ensure stable lasing. The cavity mode spacing estimated to be about <NUM>. The composite frequency filtering response was sufficiently narrow given the filter Finesse to select a single cavity mode for stable lasing.

Further testing including simulating the complete laser geometry to predict the thermal crosstalk between each etalon optical filter and the phase tuner and RSOA as a function of power dissipated in each element. Crosstalk between tuning and optical power controls is generally expected to cause calibration complexity in traditional photonic integrated tunable lasers.

The effect of thermal crosstalk from the phase tuning chip to the filters was simulated. Since the phase must be adjusted after any frequency tuning the crosstalk of the filters to the phase chip was not relevant. The temperature rise in each filter was calculated based on the heater power dissipated under the phase chip. The filter crosstalk terms were essentially symmetric due to the layout of the assembly on the SiOB substrate. The filter temperature rise was converted to a resulting etalon optical filer frequency shift as shown in <FIG>. Over the full phase tuning range, negligible filter detuning due to crosstalk of under <NUM> is expected and the required laser control precision was ± <NUM>. The low detuning due to crosstalk is attributed to the high thermal insulation of the membrane portions located under both of the filters as disclosed herein.

To experimentally demonstrate the successful minimization of laser calibration and control crosstalk scanned the tunable laser RSOA bias were scanned from threshold to full output. The RSOA bias power varied by <NUM> mW across this range.

It is generally expected, for both monolithic and hybrid wafer integrated lasers, there to be substantial thermal and/or electrical crosstalk effect during such tuning. Consequently, it is expected that substantial adjustment of both filter and phase controls will be necessary during optical power adaptation to avoid undesired mode hopping or other shifts from the target frequency.

First, the laser was tuned to <NUM> THz at 350mA RSOA bias based on a generated tuning map. This aligned the etalon and cavity modes together at the target frequency. Then the RSOA bias was swept from 80mA, just above threshold, to 360mA while adjusting only the phase tuning power at each step to realign the laser cavity mode after the change in carrier density of the RSOA has shifted the effective optical path length. The resistive layer heater power to the optical etalon filters was not adjusted.

Claim 1:
An optical apparatus, comprising:
a semiconductor substrate (<NUM>);
a dielectric layer (<NUM>) located on the semiconductor substrate, wherein a membrane portion of the dielectric layer is located over a cavity (<NUM>; 125a) in a surface of the semiconductor substrate;
a resistive heater (<NUM>; 130a) located on the membrane portion, the resistive heater being controllable by a current applied to the resistive heater; and
an etalon optical filter (<NUM>; 140a) located on the resistive heater and over the cavity, an optical passband of the etalon optical filter being wavelength tunable by the resistive heater;
characterised in that the etalon optical filter (<NUM>; 140a) includes a silicon slab being upright on the dielectric layer (<NUM>), wherein the silicon slab is coated on two opposite sides that are oriented perpendicular to the dielectric layer with partially reflective material layers (<NUM>).