Patent Description:
Hereinafter, a "Q" prefix in a word or phrase is indicative of a reference of that word or phrase in a quantum computing context unless expressly distinguished where used.

Molecules and subatomic particles follow the laws of quantum mechanics, a branch of physics that explores how the physical world works at the most fundamental levels. At this level, particles behave in strange ways, taking on more than one state at the same time, and interacting with other particles that are very far away. Quantum computing harnesses these quantum phenomena to process information.

The computers we use today are known as classical computers (also referred to herein as "conventional" computers or conventional nodes, or "CN"). A conventional computer uses a conventional processor fabricated using semiconductor materials and technology, a semiconductor memory, and a magnetic or solid-state storage device, in what is known as a Von Neumann architecture. Particularly, the processors in conventional computers are binary processors, i.e., operating on binary data represented in <NUM> and <NUM>.

A quantum processor (q-processor) uses the odd nature of entangled qubit devices (compactly referred to herein as "qubit," plural "qubits") to perform computational tasks. In the particular realms where quantum mechanics operates, particles of matter can exist in multiple states-such as an "on" state, an "off" state, and both "on" and "off" states simultaneously. Where binary computing using semiconductor processors is limited to using just the on and off states (equivalent to <NUM> and <NUM> in binary code), a quantum processor harnesses these quantum states of matter to output signals that are usable in data computing.

Conventional computers encode information in bits. Each bit can take the value of <NUM> or <NUM>. These <NUM> and <NUM> act as on/off switches that ultimately drive computer functions. Quantum computers, on the other hand, are based on qubits, which operate according to two key principles of quantum physics: superposition and entanglement. Superposition means that each qubit can represent both a <NUM> and a <NUM> at the same time. Entanglement means that qubits in a superposition can be correlated with each other in a non-classical way; that is, the state of one (whether it is a <NUM> or a <NUM> or both) can depend on the state of another, and that there is more information that can be ascertained about the two qubits when they are entangled than when they are treated individually.

Using these two principles, qubits operate as more sophisticated processors of information, enabling quantum computers to function in ways that allow them to solve difficult problems that are intractable using conventional computers. IBM has successfully constructed and demonstrated the operability of a quantum processor using superconducting qubits (IBM is a registered trademark of International Business Machines corporation in the United States and in other countries.

Superconducting devices such as qubits are fabricated using superconducting and semiconductor materials in known semiconductor fabrication techniques. A superconducting device generally uses one or more layers of different materials to implement the device properties and function. A layer of material can be superconductive, conductive, semi-conductive, insulating, resistive, inductive, capacitive, or have any number of other properties. Different layers of materials may have to be formed using different methods, given the nature of the material, the shape, size or placement of the material, other materials adjacent to the material, and many other considerations.

Superconducting devices are often planar, i.e., where the superconductor structures are fabricated on one plane. A non-planar device is a three-dimensional (3D) device where some of the structures are formed above or below a given plane of fabrication.

A q-processor is implemented as a set of more than one qubits. The qubits are fabricated as a lattice of co-planar devices on a single fabrication plane. Such an implementation of a q-processor is generally accepted as a fault-tolerant quantum architecture known as a Surface Code Scheme (SCS) or Surface Code Architecture (SCA). The paper of <NPL>, discloses a supercurrent switch, where a section of normal metal is placed between two superconducting leads to form a Josephson junction. The normal metal is also connected to additional leads, allowing a current of normal electrons to flow in the region of the junction. Varying this control current enables tuning of the maximum supercurrent in the junction.

The embodiments provide a superconducting device, and a method and system of fabrication therefor. A superconducting coupling device is provided in accordance with claim <NUM>.

In another embodiment, the varying of the inductance is a result of the gate varying a critical current of the gate-voltage tunable electron system. In another embodiment, the varying of the inductance induces a varying of a characteristic frequency of the resonator structure. In another embodiment, the varying of the characteristic frequency of the resonator structure enables the varying of the strength of coupling between the first device and the second device.

In another embodiment, the gate voltage is configured to vary the switch between a low inductance state with a high critical current, and a high inductance state with low critical current.

In another embodiment, at least a portion of the resonator structure is formed of a superconducting material. In another embodiment, the gate is formed of a metal material or of a superconducting material.

In another embodiment, the first device is capacitively coupled to the first end of the resonator structure, and the second device is capacitively coupled to the second end of the resonator structure.

Another embodiment further includes a ground plane coupled to the resonator structure by a shunt portion of the resonator structure. In another embodiment, the shunt portion of the resonator structure comprises the gate voltage-tunable electron system.

In another embodiment, the electron system is coupled between a first portion of the resonator structure and a second portion of the resonator structure.

Another embodiment further includes a substrate structure, wherein the electron system is disposed upon a surface of the substrate structure.

Another embodiment further includes an insulator disposed upon the gate voltage-tunable electron system, wherein the gate is disposed upon the insulating structure.

In another embodiment, the electron system includes a quantum well material disposed between a first barrier material and a second barrier material.

In another embodiment, the gate voltage-tunable electron system comprises at least one of a semiconductor material or a graphene material.

An embodiment includes a fabrication method for fabricating the superconducting device in accordance with claim <NUM>.

An embodiment includes a fabrication system for fabricating the superconducting device in accordance with claim <NUM>.

The invention and its embodiments are defined in the appended claims. The invention itself, as well as a preferred mode of use, further objectives and advantages thereof, will best be understood by reference to the following detailed description of the embodiments when read in conjunction with the accompanying drawings, wherein:.

The embodiments of the invention generally address and solve the above-described problems and other related problems by providing a tunable superconducting resonator for quantum computing devices. The embodiments also provide a fabrication method and system for fabricating a gate voltage-tunable electron system integrated with a superconducting resonator.

<FIG> depicts an example Surface Code Architecture (SCA) illustrating a problem that can be solved using an embodiment. Superconducting qubit architectures such as SCA <NUM> arrange a number of qubits <NUM>, 102A, and 102B in a lattice formation on a planar two-dimensional (2D) grid. The qubits are coupled with each other and communicate using resonant lines <NUM> (also known as a "bus"). The quantum state of a qubit <NUM> is read using read lines <NUM> capacitively coupled to particular qubits.

Typically, read lines <NUM> are resonant lines in which the qubit state of a particular qubit is measured using dispersive readout. Dispersive readout uses dispersive interaction with a resonator in which the interaction results in a dispersive shift that causes the frequency of the resonator to change depending on the state of the qubit. The resonator frequency is interrogated with a microwave pulse, typically at a frequency near the midpoint of the resonant frequencies corresponding to the ground and excited states. The phase and amplitude of the reflected signal are used to distinguish the state of the qubit.

However, existing architectures using dispersive readout are subject to microwave cross-talk and/or frequency collisions between qubits resulting in performance degradation in quantum state measurements and correspondingly reduced performance of quantum computers.

In order to address the above problems with existing architectures, attempts have been made to develop architectures to allow tuning of coupling between qubits. Experimentally, tuning qubit coupling has previously relied upon controlling circuit elements with magnetic flux. However, these flux-tunable qubits suffer from several disadvantages including reduced coherence times due to flux-noise, the necessity of fine tuning of magnetic flux, their susceptibility to on-chip cross-talk (e.g., as high as <NUM>%), heating due to current needed to generate the flux, and degradation of qubit performance due to shortened coherence time. Some recent activity has focused on developing voltage-controlled tuning of qubit coupling. One recent approach toward developing voltage-controlled tuning has included a proposal to controllably short two grounded transmons through a gate-tuned semiconductor switch. Another recent approach uses a voltage-controlled switch based on a semiconductor nanowire to controllably ground one end of a superconducting cavity to change coupling of grounded gatemons.

A solution is needed to provide for tunable superconducting resonators for quantum computing devices to address the above-described problems related to qubit coupling in order to provide advantages such as reduced microwave cross-talk and/or frequency collisions between qubits. For example, such a solution would enable controlling the coupling between qubit 102A and qubit 102B in order to reduce or eliminate microwave cross-talk and/or frequency collisions <NUM> between qubit 102A and qubit 102B during readout.

An embodiment provides a tunable coupling architecture for quantum computing devices. An embodiment includes a gate voltage-tunable electron system integrated with a superconducting resonator for a quantum computing device to form a gate voltage controlled switch integrated with a coupling resonator. In an embodiment, a portion of a gate-tunable electron system and gate are positioned to form a switch configured to interrupt superconducting resonator circuitry at key locations. In one or more embodiments, the gate-tunable electron system is a Josephson junction (JJ) switch. A Josephson junction (JJ) is formed of two or more superconductors coupled by a thin section of a non-superconducting material. In particular embodiments, the gate is formed of a metal material positioned proximate to the JJ switch.

In one or more embodiments, the gate disposed proximate to the JJ switch provides for a tunable JJ switch configured so that by providing a gate voltage to the gate, a critical current of the JJ switch is tuned based upon the gate voltage. The critical current in a superconducting material is the current below which the material is superconducting and above which the material is non-superconducting. By varying the critical current of the JJ switch, a Josephson inductance LJ of the JJ switch varies in an inversely proportional manner. In an embodiment, a voltage applied to a proximal metal gate tunes the switch between a low inductance state with a high critical current (e.g., approximately <NUM>-<NUM> microamps (µA)) and a high inductance state with a low critical current (e.g. <NUM> nanoamps (nA).

For currents through the JJ switch that are small compared to the critical current, the Josephson inductance is given by: <MAT> where Φ<NUM> where is the magnetic flux quantum and Ic is the critical current of the JJ switch. In an example, a critical current of <NUM>µA provides a Josephson inductance of <NUM> nH (nano Henry), and a critical current of <NUM> nA provides a Josephson inductance of <NUM> nH.

In the embodiment, varying gate voltage of the gate results in a varying of the Josephson inductance of the JJ switch and a corresponding varying of the characteristic frequency of the resonator coupling the qubits. Variation of the characteristic frequency of the resonator results in a variation of the strength of coupling between the qubits.

One or more embodiments provide for gradually tunable coupling between nearest-neighbor qubits via adjustment of the gate voltage. Another embodiment provides for multiplexed readout from qubits through gate voltage controlled JJ switch integration in readout resonators. Still another embodiment provides for the ability to shut off qubits with unwanted transition frequencies by shutting off or reducing the coupling of a qubit having unwanted transition frequencies with one or more other qubits. One or more embodiments provide for a novel quantum gate hardware approach with faster gates (e.g., approximately one nanosecond (ns) switch times) and tunable coupling strength between qubits.

Another embodiment provides a fabrication method for the gate voltage-tunable electron system integrated with a superconducting resonator, such that the method can be implemented as a software application. The application implementing a fabrication method embodiment can be configured to operate in conjunction with an existing superconducting fabrication system - such as a lithography system.

For the clarity of the description, and without implying any limitation thereto, the embodiments are described using an example number of qubits arranged in a lattice. An embodiment can be implemented with a different number of qubits, different arrangements in a lattice, a superconducting device other than a qubit, types of qubits not based on superconductors, or some combination thereof, within the scope of the embodiments An embodiment can be implemented to similarly improve other superconducting fabrications where a tunable coupling to a superconducting element is desired.

Furthermore, a simplified diagram of the example tunable coupling resonator is used in the figures and the embodiments. In an actual fabrication of a tunable coupling resonator, additional structures that are not shown or described herein, or structures different from those shown and described herein, may be present without departing the scope of the embodiments. Similarly, within the scope of the embodiments, a shown or described structure in the example tunable coupling resonator may be fabricated differently to yield a similar operation or result as described herein.

Differently shaded portions in the two-dimensional drawing of the example structures, layers, and formations are intended to represent different structures, layers, materials, and formations in the example fabrication, as described herein. The different structures, layers, materials, and formations may be fabricated using suitable materials that are known to those of ordinary skill in the art.

A specific shape, location, position, or dimension of a shape depicted herein is not intended to be limiting on the illustrative embodiments unless such a characteristic is expressly described as a feature of an embodiment. The shape, location, position, dimension, or some combination thereof, are chosen only for the clarity of the drawings and the description and may have been exaggerated, minimized, or otherwise changed from actual shape, location, position, or dimension that might be used in actual lithography to achieve an objective according to the embodiments.

Furthermore, the embodiments are described with respect to a specific actual or hypothetica superconducting device, e.g., a qubit, only as an example. The steps described by the various embodiments can be adapted for fabricating a variety of tunable coupling resonators in a similar manner, and such adaptations are contemplated within the scope of the embodiments.

An embodiment when implemented in an application causes a fabrication process to perform certain steps as described herein. The steps of the fabrication process are depicted in the several figures. Not all steps may be necessary in a particular fabrication process. Some fabrication processes may implement the steps in different order, combine certain steps, remove or replace certain steps, or perform some combination of these and other manipulations of steps, without departing the scope of the embodiments.

The embodiments are described with respect to certain types of materials, electrical properties structures, formations, layers orientations, directions, steps, operations, planes, dimensions, numerosity, data processing systems, environments, components, and applications only as examples. Any specific manifestations of these and other similar artifacts are not intended to be limiting to the invention. Any suitable manifestation of these and other similar artifacts can be selected within the scope of the embodiments.

The embodiments are described using specific designs, architectures, layouts, schematics, anc tools only as examples and are not limiting to the embodiments. The embodiments may be used in conjunction with other comparable or similarly purposed designs, architectures, layouts, schematics, and tools.

The examples in this disclosure are used only for the clarity of the description and are not limiting to the embodiments. Any advantages listed herein are only examples and are not intended to be limiting to the embodiments. Additional or different advantages may be realized by specific embodiments.

With reference to <FIG>, this figure depicts an example gate voltage-tunable electron system integrated with a superconducting resonator in accordance with an embodiment. Top view <NUM> depicts a tunable superconducting resonator structure having a resonator center conductor <NUM> constructed of a superconducting material coupled to a gate-tunable electron system <NUM>, and a gate <NUM> disposed proximal to gate-tunable electron system <NUM>. In one or more embodiments, gate-tunable electron system <NUM>, resonator center conductor <NUM>, and gate <NUM> include a Josephson junction (JJ) switch <NUM>. In one or more embodiments, a first end of resonator center conductor <NUM> is configured to be capacitively coupled to a first superconducting device such as a first qubit, and a second end of resonator center conductor <NUM> is configured to be capacitively coupled to a second superconducting device such as a second qubit.

In the illustrated embodiment, gate <NUM> is of a planar rectangular shape and positioned above, proximate, and orthogonal to a portion of gate-tunable electron system <NUM>. In other particular embodiments, gate <NUM> may be of any suitable shape, size, or configuration. In particular embodiments, gate <NUM> is formed of a superconducting material or a metal material. In other embodiments, other gate and qubit structures may be used. In other embodiments, more than one qubit may be capacitively coupled to the resonator center conductor <NUM> at different locations along its length. In one or more embodiments, gate <NUM> and gate-tunable electron system <NUM> are separated by an insulator material or a vacuum. In an embodiment, gate <NUM> may overlap only part of gate-tunable electron system <NUM>. In an embodiment, gate <NUM> may not overlap resonator center conductor <NUM>.

In particular embodiments, possible superconducting materials of which resonator center conductor <NUM> or gate <NUM> may be formed include one or more of aluminum, indium, niobium, niobium nitride, niobium titanium nitride, niobium diselenide, tantalum, titanium, or molybdenum rhenium. In particular embodiments, possible metallic or conductive gate materials of which gate <NUM> may be formed include gold, platinum, palladium, gold alloys (e.g. palladium gold), copper, or graphite. It should be understood that the foregoing is a non-exhaustive list of possible superconducting materials and metallic materials, and in other embodiments other suitable superconducting materials or metallic materials may be used.

In an embodiment, a gate voltage is applied to metal gate <NUM> to cause a controllable variation in critical current within JJ switch <NUM>, and thereby further cause a variation in Josephson inductance of JJ switch <NUM>. The variation in Josephson inductance further causes a change in the characteristic frequency of the resonator comprising center conductor <NUM>, which further changes the strength of coupling between two or more superconducting devices coupled to resonator center conductor <NUM>. Accordingly, the gate voltage is configurable to tune the Josephson inductance and hence capable of detuning the resonator comprising center conductor <NUM> to change the strength of coupling between superconducting devices, for example, between a strongly coupled state and a weakly coupled (or decoupled) state.

With reference to <FIG>, this figure depicts an example shunted gate-tunable coupling resonator in accordance with an embodiment. Top view <NUM> depicts a shunted tunable superconducting resonator structure having a resonator center conductor <NUM> constructed of a superconducting material connected to a first coupling pad 304A at one end and a second coupling pad 304B at another end. Resonator center conductor <NUM> is connected to a shunt portion <NUM> coupling resonator center conductor <NUM> to a ground plane <NUM>. In an embodiment, resonator center conductor <NUM> and shunt portion <NUM> may be composed of a continuous piece of the same superconducting material. A JJ switch <NUM> is integrated in shunt portion <NUM> to controllably shunt the resonator based upon a gate voltage applied to the gate <NUM> of integrated JJ switch <NUM>. In a particular embodiment, ground plane <NUM> is a superconducting ground plane formed of a superconducting material. In other embodiments, other gate and qubit structures may be used, and one or more JJ switches may be integrated into resonator center conductor <NUM> and/or the shunt portion <NUM> at any suitable locations along their respective lengths. In a particular embodiment, one JJ switch is integrated in resonator center conductor <NUM>, and the shunt portion <NUM> contains no JJ switch.

In some embodiments, the ground plane <NUM> may be constructed in such a way that the resonator comprises a coplanar waveguide. In this geometry, the ground plane is separated from the resonator center conductor <NUM>, as well as the shunt <NUM>, on either side by a distance which does not vary along the length of the resonator. The dimensions are typically guided by design specifications for a transmission line with <NUM> ohm impedance in the frequency regime of <NUM>-<NUM>. In the embodiment illustrated in <FIG>, this ground plane geometry is not shown for clarity. In the particular embodiment illustrated in <FIG>, resonator center conductor <NUM> is shown in a meandering configuration. In other particular embodiments, resonator center conductor <NUM> may be in a straight configuration or any other suitable resonator configuration.

In the particular embodiment illustrated in <FIG>, shunt portion <NUM> is shown in a straight configuration. In other particular embodiments, shunt portion <NUM> may be in a meandering configuration of any other suitable configuration. In other particular embodiments, the length of shunt portion <NUM> may be substantially longer than shown in <FIG>. In other particular embodiments, the length of shunt portion <NUM> may be no longer than is necessary to integrate the JJ switch (e.g. approximately the length of the JJ switch). In other embodiments, shunt portion <NUM> may connect to resonator center conductor <NUM> at a different location than shown in <FIG>.

First coupling pad 304A is configured to capacitively couple a first qubit 312A to resonator center conductor <NUM>, and second coupling pad 304B is configured to capacitively couple a second qubit 312B to resonator center conductor <NUM>. In other embodiments, first coupling pad 304A is configured to capacitively couple qubit 312A to resonator center conductor <NUM>, and second coupling pad 304B is configured to capacitively couple to another device. In some embodiments, first coupling pad 304A is configured to capacitively couple qubit 312A to resonator center conductor <NUM>, and second coupling pad 304B couples directly to readout measurement circuitry, for example using a wirebond or bump bond.

In an embodiment, a gate voltage is applied to the gate <NUM> of integrated JJ switch <NUM> to cause a controllable variation in critical current of the junction and thereby further cause a variation in Josephson inductance Lj. The variation in Josephson inductance LJ further causes a change in the characteristic frequency of the resonator comprising center conductor <NUM>, which further changes the strength of coupling between first qubit 312A and second qubit 312B. Accordingly, the gate voltage is configurable to tune the Josephson inductance Lj and hence capable of detuning the frequency of the resonator comprising center conductor <NUM> to change the strength of coupling between first qubit 312A and second qubit 312B.

With reference to <FIG>, this figure depicts an example inline integration of a gate voltage-tunable electron system integrated with a superconducting coupling resonator in accordance with an embodiment Top view <NUM> depicts an integrated 'T' shaped gate voltage-tunable electron system <NUM> and superconducting coupling resonator structure having a gate <NUM> disposed proximate and orthogonal to a portion of a JJ switch <NUM>. JJ switch <NUM> is coupled between two portions of a resonator center conductor <NUM> constructed of a superconducting material.

A portion of gate <NUM> is proximate to a first ground plane 410A, and a shunt portion <NUM> of electron system <NUM> is coupled to a second ground plane 410B. In a particular embodiment, first ground plane 410A and second ground plane 410B are each a superconducting ground plane formed of a superconducting material. In a particular embodiment, shunt portion <NUM> of electron system <NUM> has a resistance of less than or approximately equal to <NUM> kiloohm (Kohm). Resonator center conductor <NUM> is capacitively coupled to a first qubit 412A at one end and a second qubit 412B at another end.

Embodiments of the invention are flexible with respect to implementation of the shunt electron system <NUM>. In some embodiments, the geometry of shunt portion <NUM> and ground plane 410B may be chosen to determine the resistance of shunt portion <NUM>. Although ground plane 410B is shown with a cut-out rectangular portion near shunt <NUM>, in some embodiments ground plane 410B may not have this cut-out portion. In some embodiments the shunt portion of electron system <NUM> is superconducting due to proximity effect from ground plane 410B and resonator center conductor <NUM>. In some embodiments, shunt portion <NUM> connects ground plane 410B to resonator center conductor <NUM> at a different location from JJ switch <NUM>, such that shunt portion <NUM> and JJ switch <NUM> comprise two different electron systems.

In an embodiment, gate <NUM> and JJ switch <NUM> are configured to cause a controllable variation in the critical current of JJ switch <NUM>, and thereby cause a variation in the Josephson inductance LJ of JJ switch <NUM>. The variation in Josephson inductance LJ further causes a change in the characteristic frequency of the resonator in structure <NUM>, which further changes a strength of coupling between superconducting devices (e. qubit 412A and qubit 412B) coupled to the device. In other embodiments, other gate and gate-tunable electronic systems may be used, and the gate structure may gate all or part of the gate-tunable electronic system.

With reference to <FIG>, this figure depicts an example implementation of gate voltage-tunable electron systems integrated with superconducting resonators in an SCA arrangement accordance with an embodiment. Top view <NUM> depicts a number of qubits <NUM> in a lattice formation on a planar two-dimensional (2D) grid. The qubits are coupled with each other and communicate using resonant lines <NUM> (also known as a "bus"). The quantum state of a qubit <NUM> is read using read lines <NUM>, 506A capacitively coupled to particular qubits. Each of read lines 506A further include an integrated gate/JJ switch <NUM> disposed proximate thereto to form a gate voltage-tunable electron system integrated with a superconducting resonator such as described herein with respect to various embodiments.

In the illustrated embodiment, each of read lines 506A and the corresponding integrated gate/JJ switch <NUM> form a gate-tunable readout resonator configured to receive an individually controllable gate voltage to allow controlled coupling and decoupling of a particular qubit <NUM> from a read line <NUM>. In one or more embodiments, the individually gated sections of gate-tunable readout resonators provide for the capability of multiplexed readout of qubits <NUM> through tunable readout resonators.

With reference to <FIG>, this figure depicts a cross-section view of gate voltage-tunable electron system integrated with a superconducting resonator device structure <NUM> according to an embodiment. Structure <NUM> includes an insulating substrate structure <NUM> having first and second portions of superconducting material <NUM> formed on a surface (e.g., a top surface) of insulating substrate structure <NUM>. In particular embodiments, insulating substrate structure <NUM> can be formed of any suitable substrate material, such as silicon (Si) or sapphire.

Structure <NUM> further includes a semiconductor material layer <NUM> disposed on the surface of insulating substrate structure <NUM> between the first and second portions of superconducting material <NUM>. In the embodiment illustrated in <FIG>, portions of superconducting material <NUM> overlap portions of semiconductor material layer <NUM>. In a particular embodiment, semiconductor material layer <NUM> is formed of an indium arsenide (InAs) material. Together the junction of the first and second portions of superconducting material <NUM> and semiconductor material layer <NUM> form a gate tunable electron system such as a JJ switch.

Structure <NUM> further includes an insulator layer <NUM> deposited upon an exposed portion of semiconductor material layer <NUM> and the overlapping portions of superconducting material <NUM>. In a particular embodiment, insulator layer <NUM> is formed of an oxide material. Structure <NUM> further includes a gate material <NUM> deposited upon insulator layer <NUM> forming a gate of the gate voltage-tunable electron system integrated with a superconducting resonator device. In particular embodiments, possible metallic or conductive gate materials of which gate material <NUM> may be formed include gold, platinum, palladium, gold alloys (e.g. palladium gold), copper, or graphite. In particular embodiments, possible superconducting materials of which superconducting material <NUM> or gate material <NUM> may be formed include aluminum, indium, niobium, niobium nitride, niobium titanium nitride, niobium diselenide, tantalum, titanium, or molybdenum rhenium. It should be understood that the foregoing is a non-exhaustive list of possible superconducting materials and metallic materials, and in other embodiments other suitable superconducting materials or metallic materials may be used. It should also be understood that insulator <NUM> is optional and may not be present according to particular embodiments.

In an embodiment, a gate voltage is applied to gate material <NUM> to cause a controllable variation in critical current within the superconductor/semiconductor junction, and thereby further cause a variation in Josephson inductance Lj. The variation in Josephson inductance LJ further causes a change in the characteristic frequency of the resonator in structure <NUM>, which further changes a strength of coupling between superconducting devices (e.g., qubits) coupled to the device.

With reference to <FIG>, this figure depicts a cross-section view of gate voltage-tunable electron system integrated with a superconducting resonator device structure <NUM> according to another embodiment Structure <NUM> includes a molecular-beam epitaxy (MBE) grown heterostructure. Structure <NUM> includes a first barrier layer <NUM> having a quantum well layer <NUM> formed on a surface (e.g., a top surface) of first barrier layer <NUM>.

Structure <NUM> further includes first and second portions of a superconducting material <NUM> formed on a surface (e.g., a top surface) of quantum well layer <NUM> and a second barrier layer <NUM> disposed on the surface of quantum well layer <NUM> between the first and second portions of superconducting material <NUM>.

In some embodiments, superconducting material <NUM> may not be disposed on the surface of quantum well layer <NUM>, but instead may be formed in another suitable manner. For example, the superconductor <NUM> could extend into the quantum well <NUM>, or the bottom surface of the superconductor <NUM> could be disposed slightly above the quantum well in barrier <NUM>. Furthermore, although in <NUM> the bottom surface of superconductor <NUM> is depicted as flat, in some embodiments this may not be the case. For example, the superconductor <NUM> may contact the quantum well <NUM> in manner that is not spatially uniform, or superconducting material from superconductor <NUM> may migrate partially into the quantum well <NUM> as part of the fabrication process.

In the illustrated embodiment, first barrier layer <NUM>, quantum well layer <NUM>, and second barrier layer <NUM> form a quantum well. A quantum well is a potential well with discrete energy values which causes quantum confinement. In various embodiments, one or more of first barrier layer <NUM>, quantum well layer <NUM>, and second barrier layer <NUM> are formed using an MBE process. In a particular example, quantum well layer <NUM> is formed of an InAs material, and first barrier layer <NUM> and second barrier layer <NUM> are formed of an InGaAs material. In another particular example, quantum well layer <NUM> is formed of a Ge material, and first barrier layer <NUM> and second barrier layer <NUM> are formed of a SiGe material.

In other particular embodiments, possible materials for quantum well layer <NUM>, first barrier layer <NUM>, and second barrier layer <NUM> may include:.

In the embodiment illustrated in <FIG>, together the junction of the first and second portions of superconducting material <NUM>, first barrier layer <NUM>, quantum well layer <NUM>, and second barrier layer <NUM> form a gate tunable electron system such as a JJ switch.

Structure <NUM> further includes an insulator layer <NUM> deposited an exposed portion of second barrier layer <NUM> and overlapping portions of superconducting material <NUM>. In a particular embodiment, insulator layer <NUM> is formed of an oxide material. Structure <NUM> further includes a gate material <NUM> deposited upon insulator layer <NUM> forming a gate of the gate voltage-tunable electron system integrated with a superconducting resonator device.

In an embodiment, a gate voltage is applied to gate material <NUM> to cause a controllable variation in critical current within the superconductor/semiconductor junction, and thereby further cause a variation in Josephson inductance Lj. The variation in Josephson inductance LJ further causes a change in the characteristic frequency of the resonator in structure <NUM>, which further changes a strength of coupling between superconducting devices (e.g., qubits) coupled to the device.

In some embodiments, the structure in <NUM> may include dopants, or atoms inserted at certain locations in the structure. For example, dopants may be used to control the carrier density in the JJ switch when zero voltage is applied to the gate <NUM>. Hence, dopants may be used to control the range of gate voltage needed to operate the switch. In some embodiments, dopants may be disposed in a thin layer in barrier <NUM> and/or in barrier <NUM>, at a constant distance from the quantum well <NUM> (e.g. a delta-doping scheme).

In some embodiments, a quantum well may also be formed at an interface between two disparate semiconductors. For example, barrier <NUM> and quantum well <NUM> may both be composed of the same semiconductor (e.g. GaAs), and barrier <NUM> may be composed of a different semiconductor (e.g. AlGaAs). Furthermore, a delta-doping layer may be present in barrier <NUM>. In this circumstance a quantum well may form in the quantum well layer <NUM> near the interface with barrier <NUM>.

With reference to <FIG>, this figure depicts a cross-section view of gate voltage-tunable electron system integrated with a superconducting resonator device structure <NUM> according to another embodiment Structure <NUM> includes a MBE grown quantum well heterostructure with MBE grown superconducting contacts. Structure <NUM> includes a first barrier layer <NUM> having a quantum well layer <NUM> formed on a surface (e.g., a top surface) of first barrier layer <NUM>.

Structure <NUM> further includes a second barrier layer <NUM> disposed on the surface of quantum well layer <NUM> and first and second portions of a superconducting material <NUM> formed on a surface (e.g., a top surface) of second barrier layer <NUM>. In the illustrated embodiment, first and second portions of a superconducting material <NUM> are formed on second barrier layer <NUM> using an epitaxial process.

In the illustrated embodiment, first barrier layer <NUM>, quantum well layer <NUM>, and second barrier layer <NUM> form a quantum well. In various embodiments, one or more of first barrier layer <NUM>, quantum well layer <NUM>, and second barrier layer <NUM> are formed using an MBE process. In a particular example, quantum well layer <NUM> is formed of an InAs material, and first barrier layer <NUM> and second barrier layer <NUM> are formed of an InGaAs material. In another particular example, quantum well layer <NUM> is formed of a Ge material, and first barrier layer <NUM> and second barrier layer <NUM> are formed of a SiGe material.

Together the junction of the first and second portions of superconducting material <NUM>, first barrier layer <NUM>, quantum well layer <NUM>, and second barrier layer <NUM> form a gate tunable electron system such as a JJ switch.

Structure <NUM> further includes an insulator layer <NUM> deposited on an exposed portion of second barrier layer <NUM> and the first and second portions of superconducting material <NUM>. In a particular embodiment, insulator layer <NUM> is formed of an oxide material. Structure <NUM> further includes a gate material <NUM> deposited upon insulator layer <NUM> forming a gate of the gate voltage-tunable electron system integrated with a superconducting resonator device. It should be understood that insulator <NUM> is optional and may not be present according to particular embodiments.

With reference to <FIG>, this figure depicts a cross-section view of gate voltage-tunable electron system integrated with a superconducting resonator device structure <NUM> according to another embodiment Structure <NUM> includes a semiconducting substrate structure <NUM> having first and second portions of superconducting material <NUM> formed on a surface (e.g., a top surface) of semiconducting substrate structure <NUM>. In particular embodiments, semiconducting substrate structure <NUM> is a proximitized semiconducting substrate formed of a semiconducting material such as Si. Together the junction of the first and second portions of superconducting material <NUM> and semiconducting substrate layer <NUM> form a gate tunable electron system such as a JJ switch.

Structure <NUM> further includes an insulator layer <NUM> deposited upon an exposed portion of semiconducting substrate layer <NUM> and the overlapping portions of portions of superconducting material <NUM>. In a particular embodiment, insulator layer <NUM> is formed of an oxide material. Structure <NUM> further includes a gate material <NUM> deposited upon insulator layer <NUM> forming a gate of the gate voltage-tunable electron system integrated with a superconducting resonator device. In particular embodiments, possible metallic or conductive gate materials of which gate material <NUM> may be formed include gold, platinum, palladium, gold alloys (e.g. palladium gold), copper, or graphite. In particular embodiments, possible superconducting materials of which superconducting material <NUM> or gate material <NUM> may be formed include aluminum, indium, niobium, niobium nitride, niobium titanium nitride, niobium diselenide, tantalum, titanium, or molybdenum rhenium. It should be understood that the foregoing is a non-exhaustive list of possible superconducting materials and metallic materials, and in other embodiments other suitable superconducting materials or metallic materials may be used. It should also be understood that insulator <NUM> is optional and may not be present according to particular embodiments.

With reference to <FIG>, this figure depicts a cross-section view of gate voltage-tunable electron system integrated with a superconducting resonator device structure <NUM> according to an illustrative embodiment. Structure <NUM> includes an insulating substrate structure <NUM> having a graphene layer <NUM> formed of graphene material disposed on a portion of a surface (e.g., a top surface) of insulating substrate structure <NUM>. In a particular embodiment, insulating substrate structure <NUM> is formed of silicon. In a particular embodiment, insulating substrate material may be silicon with a boron nitride material disposed on a portion of its surface and underneath the graphene layer <NUM>.

Structure <NUM> further includes first and second portions of superconducting material <NUM> formed on the surface of insulating substrate structure <NUM> and a portion of graphene layer <NUM> with graphene layer <NUM> disposed between the first and second portions of superconducting material <NUM>. Together the junction of the first and second portions of superconducting material <NUM> and graphene layer <NUM> form a gate tunable electron system such as a JJ switch.

Structure <NUM> further includes an insulator layer <NUM> deposited upon an exposed portion of graphene layer <NUM> and the overlapping portions of portions of superconducting material <NUM>. In a particular embodiment, insulator layer <NUM> is formed of an oxide material. In a particular embodiment, insulator layer <NUM> is a boron nitride material. Structure <NUM> further includes a gate material <NUM> deposited upon insulator layer <NUM> forming a gate of the gate voltage-tunable electron system integrated with a superconducting resonator device. In particular embodiments, possible metallic or conductive gate materials of which gate material <NUM> may be formed include gold, platinum, palladium, gold alloys (e.g. palladium gold), copper, or graphite. In particular embodiments, possible superconducting materials of which superconducting material <NUM> or gate material <NUM> may be formed include aluminum, indium, niobium, niobium nitride, niobium titanium nitride, niobium diselenide, tantalum, titanium, or molybdenum rhenium. It should be understood that the foregoing is a non-exhaustive list of possible superconducting materials and metallic materials, and in other embodiments other suitable superconducting materials or metallic materials may be used.

In an embodiment, a gate voltage is applied to gate material <NUM> to cause a controllable variation in critical current within the superconductor/graphene junction, and thereby further cause a variation in Josephson inductance Lj. The variation in Josephson inductance LJ further causes a change in the characteristic frequency of the resonator in structure <NUM>, which further changes a strength of coupling between superconducting devices (e.g., qubits) coupled to the device.

In other particular embodiments, layer <NUM> may comprise thin film materials such as one or more of Bi<NUM>Te<NUM>, Bi<NUM>Se<NUM>, Sb<NUM>Te<NUM>, Sb<NUM>Se<NUM>. In particular embodiments, layer <NUM> may be monolayer graphene or bilayer graphene.

With reference to <FIG>, this figure depicts an example implementation of gate voltage-tunable electron systems integrated with superconducting resonators in a multi-qubit device architecture in accordance with an illustrative embodiment. Top view <NUM> depicts a number of qubits 1102A-1102D in a lattice formation on a planar two-dimensional (2D) grid. In some embodiments, qubits 1102A-1102D are transmon qubits. The quantum state of a qubit 1102A-1102D is read using read lines <NUM> capacitively coupled to particular qubits. The qubits are coupled with each other and communicate using resonant lines <NUM> (also known as a "bus").

Resonant lines <NUM> can further include a shunt <NUM> coupled thereto, including a JJ switch <NUM> and a gate <NUM> disposed proximate to the corresponding JJ switch <NUM> to form a gate-tunable resonator such as described herein with respect to various embodiments. In the illustrated embodiment, each of switch <NUM> and the corresponding gate <NUM> are configured to receive an individually controllable gate voltage to allow controlled coupling and decoupling of pairs of qubits 1102A-1102D. In one or more embodiments, the individually gated sections of gate-tunable resonators provide for the capability of gradually tuning coupling between nearest-neighbor qubits. In one or more embodiments, the individually gated sections of gate-tunable resonators provide for the capability of shutting off qubits with unwanted transition frequencies. In one or more embodiments, the individually gated sections of gate-tunable resonators provide for a novel quantum gate hardware approach with faster gates and tunable coupling strength between qubits.

Various embodiments of the present invention are described herein with reference to the related drawings. Although various connections and positional relationships (e.g., over, below, adjacent, etc.) are set forth between elements in the following description and in the drawings, persons skilled in the art will recognize that many of the positional relationships described herein are orientation-independent when the described functionality is maintained even though the orientation is changed. These connections and/or positional relationships, unless specified otherwise, can be direct or indirect, and the present invention is not intended to be limiting in this respect. Accordingly, a coupling of entities can refer to either a direct or an indirect coupling, and a positional relationship between entities can be a direct or indirect positional relationship. As an example of an indirect positional relationship, references in the present description to forming layer "A" over layer "B" include situations in which one or more intermediate layers (e.g., layer "C") is between layer "A" and layer "B" as long as the relevant characteristics and functionalities of layer "A" and layer "B" are not substantially changed by the intermediate layer(s).

Additionally, the term "illustrative" is used herein to mean "serving as an example, instance or illustration. " The terms "at least one" and "one or more" are understood to include any integer number greater than or equal to one, i.e. one, two, three, four, etc. The terms "a plurality" are understood to include any integer number greater than or equal to two, i.e. two, three, four, five, etc. The term "connection" can include an indirect "connection" and a direct "connection".

Claim 1:
A superconducting coupling device comprising:
a resonator structure, the resonator structure having a first end that is capacitively coupled to a first qubit (312A, 412A) and a second end that is capacitively coupled to a second qubit (312B, 412B);
a gate voltage-tunable electron system (<NUM>, <NUM>) coupled to the resonator structure; and
a gate (<NUM>, <NUM>, <NUM>) with gate material (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>) deposited on an insulator layer (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>) positioned proximal to a portion of the gate voltage-tunable electron system (<NUM>, <NUM>), the gate voltage-tunable electron system (<NUM>, <NUM>) and the gate (<NUM>, <NUM>, <NUM>) configured to interrupt the resonator structure at one or more predetermined locations forming a switch, the gate (<NUM>, <NUM>, <NUM>) configured to receive a gate voltage and vary an inductance of the gate voltage-tunable electron system (<NUM>, <NUM>) based upon the gate voltage, the varying of the inductance inducing the resonator structure to vary a strength of coupling between the first qubit (312A, 412A) and the second qubit (312B, 412B), wherein the resonator structure, the gate, voltage-tunable electron system (<NUM>, <NUM>) and the gate (<NUM>, <NUM>, <NUM>) with the gate material (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>) deposited on the insulator layer (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>) form a Josephson junction switch (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>).