Patent Description:
Superconducting devices can be utilized for many purposes in modern measurement and information systems. The quality and characteristics of the SIS or NIS junctions is often a dominating factor in the performance of the system.

Superconducting junctions can be created on a substrate by angle evaporation: a hollow structure is created in a resist, and films are deposited on the hollow structure from different angles through a patterned resist so that the films overlap with each other. Additional lithography may be needed for preparing electrical circuitry adjacent to the junction. But the lithography processes needed for patterning resists to create the hollow structure will often leave polymer residues on interfaces and on the substrate. Such residues are a potential source of two-level-systems in the superconducting junction, which can impair their function.

Document <CIT> discloses a Josephson device, which can be manufactured without lifting off a resist stencil, by joining two superconducting films, formed by angled deposition, with an insulating film in between, within a junction-forming groove provided in a substrate. Document <CIT> discloses a technique for forming a quantum circuit. A trench is formed in a dielectric material, by removing a portion of the dielectric material and a portion of (super)conductive material layered on top of the dielectric material, to enable creation of circuit components. The trench defines nubs to facilitate creating electrical leads.

An object of the present invention is to provide a technique which improves the performance of superconducting devices.

This object is achieved by a superconducting device and a corresponding manufacturing method which are characterized by what is stated in independent claims <NUM> and <NUM>, respectively.

The invention is based on the idea of forming superconducting junctions and capacitive elements within a recessed pattern in a superconducting layer with an angle evaporation method where resists are not needed. The pattern includes a trench which passes through a cavity. The superconducting junction is formed on the bottom of the cavity, and capacitive elements can be formed in the same angle evaporation process between the sidewalls of the trench.

An advantage of the invention is that high-quality superconducting junctions can be reliably formed and that they can easily be integrated with adjacent capacitive elements.

This disclosure describes a method for manufacturing a superconducting device in a superconducting base layer which at least partly covers a substrate. The substrate defines a device plane and the superconducting base layer comprises at least one trench which extends from a first point in the device plane to a second point in the device plane.

The superconducting base layer also comprises a cavity which lies between the first point and the second point, so that the trench crosses the cavity. The method comprises the steps of (<NUM>) placing a stencil mask which comprises an opening over the superconducting base layer so that the opening is aligned over the cavity, (<NUM>) performing a first angle evaporation through the stencil mask, where a first junction layer is deposited on a first sidewall of the cavity and on the cavity bottom, (<NUM>) performing an oxidation step where the first junction layer is oxidized to form a first insulating layer on the surface of the first junction layer, and (<NUM>) performing a second angle evaporation through the stencil mask, where a second junction layer is deposited on a second sidewall of the cavity and on the cavity bottom. The second sidewall of the cavity is opposed to the first sidewall of the cavity. The second junction layer overlaps with the first insulating layer on the cavity bottom.

The superconducting device may contain an SIS junction formed by the first and second junction layers. In this case the first junction layer is made of a superconducting material and the second junction layer is also made of a superconducting material.

Alternatively, the superconducting device may contain a NIS junction formed by the first and second junction layers. In this case the first junction layer is made of a superconducting material and the second junction layer is made of a non-superconducting metal.

The opening in the stencil mask may also extend to a part of the trench. The first junction layer may be deposited on a corresponding part of the first sidewall of the trench in the first angle evaporation step. The second junction layer may be deposited on a corresponding part of the second sidewall of the trench in the second angle evaporation step.

This disclosure also describes a superconducting device comprising a substrate which defines a device plane. The superconducting device comprises a superconducting base layer which at least partly covers the substrate. The superconducting base layer comprises a trench which extends from a first point in the device plane to a second point in the device plane. The superconducting base layer also comprises a cavity which lies between the first point and the second point, so that the trench crosses the cavity. The superconducting device further comprises (<NUM>) a first junction layer on a first sidewall of the cavity, on the bottom of the cavity and on a first sidewall of the trench, (<NUM>) a first insulating layer which covers the first junction layer at least on the bottom of the cavity, and (<NUM>) a second junction layer on a second sidewall of the cavity, on the bottom of the cavity and on a second sidewall of the trench. The second sidewall of the cavity is opposed to the first sidewall of the cavity. The second sidewall of the trench is opposed to the first sidewall of the trench, The second junction layer overlaps with the first insulating layer on the bottom of the cavity.

The superconducting device may contain a SIS junction formed by the first and second junction materials. In this case the first and second junction layers are made of superconducting materials. Alternatively, the superconducting device may contain a NIS junction formed by the first and second junction materials. In this case the first junction layer is made of a superconducting material and the second junction layer is made of a non-superconducting metal.

The cavity may have a diamond shape in the device plane, where the bases of two isosceles triangles are joined to each other. Alternatively, the cavity may have a rectangular shape in the device plane.

The superconducting base layer may optionally comprise a second cavity which lies between the first point and the second point, so that the trench also crosses the second cavity. The first junction layer then also extends to a first sidewall of the second cavity and to the bottom of the second cavity. A second insulating layer covers the first junction layer on the bottom of the second cavity. The second junction layer also extends to a second sidewall of the second cavity and to the bottom of the second cavity. The second sidewall of the second cavity is opposed to the first sidewall of the second cavity. The second junction layer overlaps with the second insulating layer on the bottom of the second cavity.

The second cavity may have a diamond shape in the device plane, where the bases of two isosceles triangles are joined to each other. The second cavity may alternatively have a rectangular shape in the device plane.

The superconducting device may be any device where superconductor - insulator - superconductor junctions (SIS) can be used, for example a qubit or a superconducting quantum interference devices (SQUID). Alternatively, the superconducting device may be any device where normal metal - insulator - superconductor (NIS) junctions can be used, for example a quantum circuit refrigerator or a low-temperature thermometer.

In this disclosure the device plane is illustrated and referred to as the xy-plane. The device plane may also be called the horizontal plane. The z-axis is perpendicular to the xy-plane, and the z-direction is referred to as the vertical direction. Expressions such as "top" and "bottom" refer to a corresponding vertical order. In this disclosure, the words "horizontal" and "vertical" only refer to the device plane and a direction perpendicular to the device plane, respectively. The words "horizontal" and "vertical" do not imply anything about how the device should be oriented during manufacture or usage.

<FIG> illustrates in the xz-plane a substrate <NUM>, a superconducting base layer <NUM> and a trench <NUM> in the superconducting base layer. <FIG> illustrates the same device in the xy-plane, where the trench <NUM> surrounds a cross-shaped inner area of the superconducting base layer <NUM>. The trench <NUM> thereby divides the superconducting base layer <NUM> into a first region <NUM> and a second region <NUM>. In the example of <FIG> the trench <NUM> forms a cross-shaped closed pattern in the superconducting base layer <NUM>. This pattern could for example be employed in a qubit. However, the trench <NUM> could alternatively define any other closed pattern which divides the base layer into two regions, or it could simply extend from one edge of the base layer <NUM> to another edge.

All trenches and cavities described in this disclosure may for example be formed in the superconducting base layer by reactive ion etching (RIE) or any other suitable method. It can be seen in <FIG> that the trench extends through the superconducting base layer in the vertical direction which is perpendicular to the device plane. The bottom of the trenches and cavities discussed in this disclosure is thereby recessed from the top of the superconducting base layer by a distance which is the depth D of the trench.

The trench <NUM> is typically etched some distance into the substrate <NUM> as <FIG> illustrates. This can allow the desired aspect ratios to be obtained in the trench even with a thinner base layer <NUM>, and it also removes the risk that remnants of the base layer <NUM> will cause short-circuits on the bottom of the trench <NUM>.

<FIG> illustrates a smaller region <NUM> of the device illustrated in <FIG>, where the trench <NUM> separates the superconducting base layer <NUM> into first and second regions <NUM> and <NUM>. The trench <NUM> continues beyond the region <NUM>. The trench <NUM> comprises a narrow section <NUM> which extends from a first point <NUM> to a second point <NUM>. It also comprises wide sections <NUM>. The capacitance between the first and second sections <NUM> and <NUM> of the superconducting base layer may in this case be primarily determined by the dimensions and the electric properties of the narrow section <NUM>. The region <NUM> could be located in any part of a trench <NUM> which separates the base layer into first and second regions in <FIG>.

The narrow section <NUM> of the trench <NUM> may for simplicity be referred to simply as the trench <NUM> when the formation of the SIS or NIS junction is discussed. The wide sections <NUM> of the trench are covered by the stencil mask when the first and second junction layers are deposited, so no junctions are formed in the wide sections <NUM>. The primary purpose of the wide sections <NUM> in the superconducting device is merely to separate the superconducting base layer <NUM> into two separate regions <NUM> and <NUM>.

The superconducting base layer in <FIG> also comprises a first cavity <NUM>. In this disclosure, the term "cavity" refers to a hollow opening which may for example have a rectangular shape, as <FIG> illustrates, a diamond shape or any other suitable shape in the xy-plane. Cavities can be etched in the superconducting base layer <NUM> in the same etching process where the trench is etched. The trench <NUM> crosses the cavity <NUM> in a first direction, which in <FIG> corresponds to the y-direction. The trench <NUM> does not necessarily have to extend in a straight line from the first point <NUM> to the second point <NUM>.

<FIG> illustrates an xz-cross section of the cavity <NUM> along the line A-A in <FIG>. The cavity <NUM> has a first cavity sidewall <NUM>, a second cavity sidewall <NUM> and a cavity bottom <NUM>. In the case illustrated in <FIG>, the first and second cavity sidewalls <NUM> and <NUM> are directly opposed to each other.

In this disclosure, the expression "opposed sidewalls" has the following meaning. Two sidewalls are opposed to each other if the first angle evaporation step can be carried out only onto the first sidewall, while keeping the second sidewall in the "shadow" of the superconducting base layer, and if the second angle evaporation step can be carried out only onto the second sidewall, while keeping the first sidewall in the "shadow" of the superconducting base layer. In the illustrations of this disclosure, this means that the sidewalls are separated from each other in the x-direction, as <FIG> illustrate. However, the two sidewalls do not necessarily have to fully parallel to the y-direction. They may have any shape in the xy-plane which extends substantially in the y-direction, for example the angled shape which produces the diamond-shaped cavity discussed below.

Furthermore, the sidewalls of the cavity <NUM> may be displaced from the narrow section <NUM> of the trench by the same distance in opposite x-directions. However, the cavity <NUM> does not necessarily have to be symmetric with respect to the y-axis defined by the narrow section <NUM>, and the sidewalls do not necessarily have to be parallel to that axis as they are in <FIG>.

<FIG> illustrates an xz-cross section of the narrow section <NUM> along the line B-B in <FIG>. The narrow section <NUM> has a first trench sidewall <NUM>, a second trench sidewall <NUM> and a trench bottom <NUM>.

It was mentioned above that the trench crosses the cavity <NUM> in the first direction, which in <FIG> is the direction which is perpendicular to the illustrated xz-plane. The width W<NUM> of the cavity <NUM> in a second direction, perpendicular to the first direction, is greater than the width W<NUM> of the narrow section <NUM> of the trench in the second direction. The second direction is the x-direction in <FIG>. If the sidewalls of the cavity <NUM> are not both parallel to the first direction, the width W<NUM> of the cavity <NUM> may be defined as the maximum distance between the first and second cavity sidewalls <NUM> and <NUM> in the second direction.

Assuming that the first cavity <NUM> and the trench <NUM> are formed in the same etching process, their depths D will be equal. The depth D may for example range from a few hundred nanometers up to <NUM>, or it may be in the range <NUM> - <NUM>. The aspect ratio D / W<NUM> of any first or second cavity presented in this disclosure may for example be in the range <NUM> - <NUM> or <NUM> - <NUM>. The aspect ratio D / W<NUM> of the narrow section of the trench may for example be in the range <NUM> - <NUM> or <NUM> - <NUM>. The aspect ratio D / W<NUM> nevertheless sets a lower limit for the aspect ratio D / W<NUM>, so the aspect ratio D / W<NUM> may be in the range D / W<NUM> - <NUM> or in the range D / W<NUM> - <NUM>.

The superconducting base layer is made of a first superconducting material. As mentioned before, the trench separates the superconducting base layer into a first region <NUM> and a second region <NUM> in the device plane, so that the first region of the superconducting base layer is electrically separated from the second region of the superconducting base layer.

The cavity <NUM>, which may be called a first cavity, lies between the first point <NUM> and the second point <NUM>, so that the trench <NUM> crosses the first cavity <NUM> in a first direction. The first cavity <NUM> extends through the superconducting base layer <NUM> in the direction which is perpendicular to the device plane. The first cavity <NUM> has a first cavity sidewall on the side of the first region <NUM> of the superconducting base layer and a second cavity sidewall on the side of the second region <NUM> of the superconducting base layer. The first cavity <NUM> has a first cavity bottom.

The narrow section <NUM> of the trench comprises a trench bottom, a first trench sidewall on the side of the first region <NUM> of the superconducting base layer and a second trench sidewall on the side of the second region <NUM> of the superconducting base layer <NUM>. The width of the first cavity <NUM> in a second direction is greater than the width of the narrow section <NUM> of the trench <NUM> in the second direction. The second direction is substantially perpendicular to the first direction.

<FIG> illustrates xz-cross sections which correspond to the cross-sections of <FIG>, respectively. Reference numbers <NUM>, <NUM>, <NUM>, <NUM> and <NUM> correspond to reference numbers <NUM>, <NUM>, <NUM>, <NUM> and <NUM>, respectively, in <FIG>. <FIG> illustrates a first junction layer <NUM> which extends from the first region <NUM> of the superconducting base layer to the first cavity sidewall, to the cavity bottom and to the first trench sidewall.

The superconducting device also comprises a first insulating layer <NUM> which covers the first junction layer <NUM> at least on the bottom of the cavity. The superconducting device also comprises a second junction layer <NUM> which extends from the second region <NUM> of the superconducting base layer to the second cavity sidewall, to the cavity bottom and to the second trench sidewall. The second junction layer <NUM> overlaps the first insulating layer <NUM> on the bottom of the cavity.

The substrate may be a silicon substrate, or any other suitable substrate. The superconducting base layer covers at least a part of the substrate. The first superconducting material may for example be Nb, Al, TiN, NbN or NbTiN. In this disclosure, the term "junction layer" refers to a layer which forms the first side of either an SIS junction or an NIS junction. In the case of SIS junctions, the first junction layer is made of a second superconducting material. The second superconducting material may for example be Nb, Al, TiN, NbN or NbTiN. In all embodiments of the present invention, the second superconducting material may be the same material as the first superconducting material mentioned above. Alternatively, the second superconducting material may be different from the first.

The first insulating layer <NUM> is typically an oxide layer which is formed spontaneously on the surface of the first superconducting layer <NUM> when it is exposed to oxygen.

In SIS junctions, the second junction layer is made of a third superconducting material, which may for example be Nb, Al or TiN, NbN or NbTiN. In NIS junctions the second junction layer is made of a non-superconducting metal (which may also be called a normal metal) which is suitable for NIS junctions, for example copper or silver.

In all embodiments of the present invention, the third superconducting material may be the same material as the first superconducting material mentioned above. Alternatively, the third superconducting material may be different from the first.

In the case of SIS junctions, the third superconducting material may be the same material as the second superconducting material mentioned above. Alternatively, the third superconducting material may be different from the second.

In other words, in an SIS junction the first junction layer can be made of a second superconducting material and the second junction layer can also be made of the second superconducting material. These junctions may for example be used in qubits.

In a NIS junction the first junction layer can be made of a second superconducting material and the second junction layer can be made of a non-superconducting metal. These junctions may for example be used in quantum circuit refrigerators or low-temperature thermometers.

An oxide layer may be formed on the surface of first junction layer <NUM>, on the top surface and on the trench sidewall, and the second junction layer <NUM> may also be oxidized on the top surface, in the cavity and in the trench. However, these additional oxide layers will not serve any particular technical purpose in the superconducting device. They may be removed in some areas for example by ion milling. The first insulating layer <NUM>, on the other hand, is an essential component of the SIS and NIS junctions which are created on the bottom of the cavity <NUM>.

In the narrow section <NUM> of the trench, the first and the second junction layers <NUM> and <NUM> will typically extend only along a portion of the sidewall without reaching the bottom of the trench. However, it is possible that the first and / or the second junction layer <NUM> / <NUM> extend to the trench bottom as long as they do not come into electrical contact with each other there.

The cavity may have a rectangular shape in the device plane. <FIG> illustrates a top view of the cavity <NUM> and the first and second junction layers <NUM> and <NUM> (with insulating layer <NUM>) which overlap on the bottom of the cavity <NUM>. When the manufacturing method described below is used to prepare the superconducting device, the overlap area where the second junction layer <NUM> overlaps with the insulating layer <NUM> and the first junction layer <NUM> will then also have a rectangular shape. A light rectangle has been drawn in <FIG> to illustrate the overlap area. The dimension of the rectangle in the x-direction will depend on the angles which are used in the angle evaporation process, and on the depth and width of the cavity <NUM>.

In both <FIG>, reference numbers <NUM> - <NUM>, <NUM>, <NUM> and <NUM> - <NUM> correspond to reference numbers <NUM> - <NUM>, <NUM>, <NUM> and <NUM> - <NUM>, respectively, in <FIG>.

The cavity may alternatively have a diamond shape in the device plane, where the bases of two isosceles triangles are joined to each other. This is illustrated in <FIG>. When the manufacturing method described below is used to prepare the superconducting device, the diamond shape leads to a diamond-shaped overlap area, illustrated with a light diamond shape in <FIG>. The size of the diamond-shaped overlap area will depend on the angles which are used in the angle evaporation process. It can be seen in <FIG> that the diamond shape allows the dimensions of the junction to be made significantly smaller than those of the cavity <NUM>.

All principles discussed above with reference to <FIG> can be applied also to superconducting devices which contain more than one cavity formed in the narrow section of the trench. <FIG> illustrates an example device where a first SIS junction is formed on the bottom of the first cavity and a second SIS junction is formed on the bottom of a second cavity where reference numbers <NUM> - <NUM>, <NUM>, <NUM> - <NUM>, <NUM>, <NUM> - <NUM> and <NUM> correspond to reference numbers <NUM> - <NUM>, <NUM>, <NUM> - <NUM>, <NUM>, <NUM> - <NUM> and <NUM>, respectively, in <FIG>.

In <FIG> the superconducting base layer also comprises a second cavity <NUM> which lies between the first point <NUM> and the second point <NUM>. The narrow section <NUM> of the trench <NUM> extends between the first cavity <NUM> and the second cavity <NUM> and crosses the second cavity <NUM> in the first direction. The second cavity <NUM> extends through the superconducting base layer in the direction which is perpendicular to the device plane. In direct analogy to the presentation which was given with reference to <FIG>, the second cavity <NUM> has a first second cavity sidewall on the side of the first region of the superconducting base layer and a second second cavity sidewall on the side of the second region of the superconducting base layer. The second cavity <NUM> also has a second cavity bottom. The width of the second cavity <NUM> in the second direction is greater than the width of the narrow section <NUM> in the second direction.

When the angle evaporation is carried out, the first and second junction layers are also deposited in the second cavity. In direct analogy to <FIG>, the first junction layer <NUM> will then also extend from the first region <NUM> of the superconducting base layer to the first second cavity sidewall and the second cavity bottom, and a second insulating layer will cover the first junction layer <NUM> at least on the second cavity bottom. The second junction layer <NUM> will extend from the second region <NUM> of the superconducting base layer to the second second cavity sidewall and to the second cavity bottom so that the second junction layer <NUM> overlaps with the second insulating layer on the bottom of the second cavity.

The first and second cavities may both have a diamond shape in the device plane, where the bases of two isosceles triangles are joined to each other. Alternatively, they may have a rectangular shape.

The superconducting device with a double SIS junction may for example be a superconducting quantum interference device where the parts of the superconducting base layer which are adjacent to the two junctions form the SQUID loop. The device may also be used as a qubit.

The method will now be described in more detail. As mentioned before, the method comprises the step of etching a pattern in a superconducting base layer which at least partly covers a substrate which defines a device plane. The superconducting base layer is made of a first superconducting material.

The pattern comprises at least one trench which extends through the superconducting base layer in a direction which is perpendicular to the device plane. The trench separates the superconducting base layer into a first region and a second region in the device plane, so that the first region of the superconducting base layer is electrically separated from the second region of the superconducting base layer. The trench may comprise a narrow section which extends from a first point in the device plane to a second point in the device plane, and a wider section which extends to other parts of the device plane to complete the separation of the two regions. The trench could alternatively have a uniform width.

The pattern further comprises a cavity which lies between the first point and the second point, so that the trench crosses the cavity. The cavity extends through the superconducting base layer in the direction which is perpendicular to the device plane. The cavity has a first sidewall on the side of the first region of the superconducting base layer and a second sidewall on the side of the second region of the superconducting base layer. The cavity has a cavity bottom.

The narrow section of the trench comprises a trench bottom, a first trench sidewall on the side of the first region of the superconducting base layer and a second trench sidewall on the side of the second region of the superconducting base layer. The width of the cavity in a second direction is greater than the width of the narrow section of the trench in the second direction. The second direction is substantially perpendicular to the first direction.

The opening in the stencil mask is aligned with the narrow section of the trench so that the first and second junction layers are deposited at least in the cavity. In practice, the opening in the stencil mask should be sufficiently small to be placed between the first and second points <NUM> and <NUM> in figure in <FIG>, so that the first and second junction layers are not deposited in the wider regions <NUM> of the trench. The opening in the stencil mask may be large enough to allow the deposition of the first and second junction layers into a part of the narrow section <NUM> of the trench. The dimensions of the narrow section <NUM> and the angles through which the angle evaporation is carried out should be selected so that the first and second junction layers do not overlap on the bottom of the narrow section <NUM> of the trench <NUM>. The first and second junction layers may nevertheless be deposited on the sidewalls of the narrow section, as <FIG> illustrates.

The method further comprises a first angle evaporation step where a first junction layer is deposited at least on the first sidewall of the cavity and on the cavity bottom. In practice, the first junction layer will also be deposited on some parts of the trench sidewall. In the oxidation step the first junction layer is oxidized to form a first insulating layer on the surface of the first junction layer at least on the bottom of the cavity. The method also comprises a second angle evaporation step where a second junction layer is deposited on the second sidewall of the cavity and on the bottom of the cavity. As before, this will in practice also involve deposition of the second junction layer on the second trench sidewall. The second junction layer then overlaps with the first insulating layer on the bottom of the cavity, but not on the bottom of the trench.

The stencil mask is aligned over the substrate during the first and second angle evaporation steps, and an opening in the stencil mask may be aligned with the narrow section of the trench and the cavity (and the second cavity, if it is present). The opening should not extend beyond the first and second points <NUM> - <NUM> and <NUM> - <NUM> in <FIG> and <FIG>, respectively, since the junction layers should not be deposited in the regular sections <NUM> / <NUM> of the trench <NUM> / <NUM>.

<FIG> illustrates the first angle evaporation step and <FIG> illustrates the second angle evaporation step. Reference numbers <NUM>, <NUM> - <NUM>, <NUM>, <NUM> and <NUM> - <NUM> correspond to reference numbers <NUM>, <NUM> - <NUM>, <NUM>, <NUM> and <NUM> - <NUM>, respectively, in <FIG>. The material which will form the first junction layer <NUM> is deposited onto the pattern in the superconducting base layer from a first deposition direction indicated by the arrows <NUM>. The substrate where the device is formed may for example be tilted by an angle Θ about the y-axis. The angle between the first deposition direction <NUM> and the vertical z-axis (which is defined in relation to the substrate) will then also be Θ. <FIG> also illustrates a stencil mask <NUM> which has an opening above the cavity <NUM> and the narrow section <NUM> of the trench.

When the opening in the stencil mask is aligned in a suitable manner, and when the angle Θ and the width of the narrow section <NUM> of the trench are given suitable values, the first junction layer <NUM> is deposited on the first sidewall of the cavity, the bottom of the cavity and on at least part of the first trench sidewall between the first and second points. The first junction layer <NUM> can, but does not have to, extend all the way to the bottom of the trench, as long as it does not come into direct contact with the second junction layer at the bottom of the trench.

In the oxidation step (not separately illustrated) the first junction layer is oxidized with high purity oxygen gas in a controlled environment to form a first insulating layer <NUM> on its surface. The in-situ oxidation process is done without breaking vacuum in between the first and second junction layer deposition. <FIG> then illustrates the second angle evaporation step where the second junction layer is deposited. The substrate where the device is formed may in this evaporation step be tilted by an angle ϕ about the y-axis in the opposite direction (compared to <FIG>). The angle between the second deposition direction <NUM> and the vertical axis (which is defined in relation to the substrate) will then be ϕ. The absolute value of ϕ may, but does not necessarily have to be, equal to the absolute value of Θ.

Again, when the opening in the stencil mask is dimensioned in a suitable manner, and when the angle ϕ is given a suitable value, the second junction layer <NUM> is deposited on the second sidewall of the cavity, the bottom of the cavity and on at least part of the second trench sidewall, and the second junction layer overlaps with the first insulating layer on the bottom of the cavity to complete the junction.

The same method may be used to prepare a superconducting device with multiple junctions. In this case the pattern also comprises a second cavity which also lies between the first point and the second point. The narrow section of the trench extends between the first cavity and the second cavity and crosses the second cavity. The second cavity extends through the superconducting base layer in the direction which is perpendicular to the device plane. The second cavity has a first second cavity sidewall on the side of the first region of the superconducting base layer and a second second cavity sidewall on the side of the second region of the superconducting base layer. The second cavity has a second cavity bottom, and the width of the second cavity in the second direction is greater than the width of the narrow section in the second direction.

In the first angle evaporation step the first junction layer is then also deposited on the first second cavity sidewall and the second cavity bottom. In the oxidation step the first junction layer is also oxidized to form a second insulating layer which on the surface of the first junction layer at least on the second cavity bottom. In the second angle evaporation step the second junction layer is also deposited on the second second cavity sidewall and the second cavity bottom, so that the second junction layer overlaps with the first insulating layer on the second cavity bottom.

Claim 1:
A method for manufacturing a superconducting device in a superconducting base layer (<NUM>) which at least partly covers a substrate (<NUM>), wherein the substrate defines a device plane and the superconducting base layer comprises at least one trench (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>) which extends from a first point (<NUM>, <NUM>) in the device plane to a second point (<NUM>, <NUM>) in the device plane,
wherein the superconducting base layer also comprises a cavity (<NUM>, <NUM>, <NUM>, <NUM>) which lies between the first point and the second point, so that the trench crosses the cavity, and the trench (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>) and the cavity (<NUM>, <NUM>, <NUM>, <NUM>) extend through the superconducting base layer,
the method comprising the steps of:
- placing a stencil mask (<NUM>) which comprises an opening over the superconducting base layer so that the opening is aligned over the cavity (<NUM>, <NUM>, <NUM>, <NUM>),
- performing a first angle evaporation through the stencil mask, where a first junction layer (<NUM>, <NUM>, <NUM>) is deposited on a first sidewall (<NUM>) of the cavity and on the cavity bottom (<NUM>),
- performing an oxidation step where the first junction layer is oxidized to form a first insulating layer (<NUM>, <NUM>, <NUM>) on the surface of the first junction layer, and
- performing a second angle evaporation through the stencil mask, where a second junction layer (<NUM>, <NUM>, <NUM>) is deposited on a second sidewall of the cavity and on the cavity bottom, wherein the second sidewall (<NUM>) of the cavity is opposed to the first sidewall of the cavity, so that the second junction layer overlaps with the first insulating layer on the cavity bottom,
wherein at least one of the first and second junction layers is made of a superconducting material.