Patent Description:
Wireless communication devices require a battery or external DC power supply for a power source. Within a wireless communication device, there are integrated circuits (ICs), which typically operate at a much lower DC voltage than either a battery or an external DC power supply attached to the wireless communication device. To facilitate integrated circuits operation at a low operating voltage, a switching voltage regulator is usually required to convert either an external DC power supply or battery voltage to the integrated circuits lower supply voltage. A switching voltage regulator is a control circuit configured for rapidly switching power transistors (e.g., MOSFETs) on and off in order to stabilize an output voltage or current. Switching regulators are typically used as replacements for the linear regulators when higher efficiency, smaller size or lighter weight is required. However, switching regulators are more complicated and their switching currents can cause noise problems if not carefully suppressed.

A buck regulator, which is an example of a switching regulator, is a step-down DC-to-DC converter. A buck regulator typically includes two switches (e.g., a transistor and a diode) as well as an inductor and a capacitor for filtering of an output voltage ripple. A synchronous buck regulator is a modified version of the basic buck regulator circuit topology in which the diode is replaced by a second transistor. Generally, a buck regulator alternates between connecting the inductor to a source voltage to store energy in the inductor ("on state") and discharging the inductor into a load ("off state").

Attention is drawn to <CIT> describing a method for a power converter system. The method includes: providing a primary current limit for the power converter system, wherein the power converter system has one or more transistors which can be switched on at a primary frequency to cause current to flow through an inductor of the power converter system; and using the primary current limit for over-current protection in the power converter system, wherein over-current protection does not employ any secondary frequency for switching of the one or more transistors and does not employ any secondary current limit.

A need exists for an enhanced buck regulator. More specifically, a need exists for embodiments related to protecting buck regulators against over-current conditions.

The present invention refers to a device according to claim <NUM> and a corresponding method according to claim <NUM>.

The detailed description set forth below in connection with the appended drawings is intended as a description of embodiments and examples of the present invention.

The term "exemplary" used throughout this description means "serving as an example, instance, or illustration," and should not necessarily be construed as preferred or advantageous over other exemplary embodiments. The detailed description includes specific details for the purpose of providing a thorough understanding of the exemplary embodiments of the invention. It will be apparent to those skilled in the art that the exemplary embodiments of the invention may be practiced without these specific details. In some instances, well-known structures and devices are shown in block diagram form in order to avoid obscuring the novelty of the exemplary embodiments presented herein.

<FIG> illustrates a buck regulator <NUM>, which may be used to decrease a voltage from a battery and supply a DC voltage to an electronic device. Buck regulator <NUM> includes transistors <NUM> and <NUM>, each of which that are controlled by a controller <NUM>. Buck regulator <NUM> also includes a diode <NUM>, a capacitor <NUM>, an inductor <NUM>, and a load <NUM>, which receives an output voltage of the buck regulator <NUM>. As will be understood, controller <NUM> is configured to vary the duty cycles at which the transistors <NUM> and <NUM> are turned on to alternately connect and disconnect inductor <NUM> to and from source voltage (Vin). As inductor <NUM> stores energy and discharges the energy, it produces the output voltage Vout, which is somewhat smaller than source voltage Vin.

Buck regulators are generally required to provide protection against short circuiting to ground at a regulated output node. Active current limiting may be implemented as peak current detection to decide when to override a normal control loop to turn off a p-type field effect transistor (PFET) of a regulator and turn on an n-type field effect transistor (NFET) of the regulator. A decision must be made as to what event to use to turn off the NFET and turn on the PFET and give the normal control loop an opportunity to resume control. Example implementations include using the rising edge of a buck switching clock or using a constant NFET on time value. Both of these methods exhibit problems when the output voltage is low or in a ground fault condition since there is often not enough negative differential across the inductor when the NFET is on to discharge the all the inductor energy that was added when the PFET was on. If such a condition exists, multiple consecutive cycles of a net increase in the inductor current will result in a condition called current limit runaway.

Practical limitations on the current limit detection speed require the PFET to be on for a minimum amount of time in order to declare a valid over-current condition. This results in finite overshoot of the desired current limit threshold. At low output voltages, the overshoot magnitude is largest. Overshoot results in more energy added while the PFET is on, and faults to ground keep the energy from being fully dissipated while the NFET is on, resulting in a worst case situation for runaway concerns. Current limit runaway can be a serious problem for reliability of the power FETs and the inductor. It can also lead to undesirable inrush currents that can overtax battery powered applications.

Exemplary embodiments, as described herein, are directed to devices and methods related to over-current protection for a voltage regulator. According to one exemplary embodiment, a device may include an inductor selectively coupled to an output and a power supply. The device may further include a controller configured to detect an over-current event if an amount of current flowing from the power supply to the inductor is equal to or greater than a current threshold. The controller may also be configured to detect a low-voltage event if a voltage at the output is less than or equal to a reference voltage. Moreover, in response to the over-current event and the low-voltage event, the controller may be configured to prevent current from flowing from the power supply to the inductor until substantially all energy stored by the inductor has been dissipated.

According to another exemplary embodiment, the present invention includes methods for protecting a voltage regulator from current runaway. Various embodiments of such a method may include comparing an output voltage of a voltage regulator to a reference voltage and comparing a current through an inductor of the regulator to a threshold current. Further, the method may include dissipating all energy stored by the inductor if the current through the inductor is greater than or equal to the threshold current and the output voltage is less than or equal to the reference voltage.

Other aspects, as well as features and advantages of various aspects, of the present invention will become apparent to those of skill in the art through consideration of the ensuing description, the accompanying drawings and the appended claims.

<FIG> illustrates a device <NUM>, in accordance with an exemplary embodiment of the present invention. By way of example, device <NUM> may comprise a buck regulator. Device <NUM> includes a programmable reference unit <NUM>, a modulator <NUM>, a controller <NUM>, and gate drivers <NUM>. An output of programmable reference unit <NUM> is coupled to one input of modulator <NUM>, and an output of modulator <NUM> is coupled to one input of controller <NUM>. Moreover, an output of controller <NUM> is coupled to an input of gate drivers <NUM>.

Device <NUM> further includes transistors M3 and M3 coupled between a supply voltage VDD and a ground voltage GND. More specifically, a source of transistor M3 is coupled to supply voltage VDD and a source of transistor M4 is coupled to ground voltage GND. Further, a drain of transistor M3 is coupled to a drain of transistor M4 at a node A, which may also be referred to as a "switching node. " In addition, a gate of each of transistor M3 and transistor M4 is coupled to and configured to receive a signal from gate drivers <NUM>. Transistors M3, which may comprise a PFET, may also be referred to herein as a "high side FET. " Further, Transistors M4, which may comprise an NFET, may also be referred to herein as a "low side FET. " Device <NUM> further includes an inductor L having one end coupled to node A and another end coupled to an output Vout. In addition, device <NUM> includes a capacitor C coupled between output Vout and ground voltage GND, and a load <NUM>, also coupled between output Vout and ground voltage GND.

As will be understood by a person having ordinary skill in the art, programmable reference unit <NUM> and modulator <NUM> provide a signal having a desired duty cycle to controller <NUM>. Based on the duty cycle, controller <NUM> and gate drivers <NUM> may be configured to turn transistor M3 "on" and "off' to store energy provided by supply voltage VDD in inductor L. Controller <NUM> and gate drivers <NUM> may be further configured to turn transistor M4 "on" and "off," based on the duty cycle, to discharge energy stored by inductor L through the load <NUM>. This discharged energy is provided at a desired output voltage that is typically designed to be less than supply voltage VDD. Device <NUM> provides an output across capacitor C and power provided by device <NUM> at this output is consumed by load <NUM>.

Device <NUM> may also include one or more current sensors (not shown in <FIG>; see <FIG>) for sensing a current through transistor M3 and inductor L while transistor M3 is operating in a conductive state, sensing a current through transistor M4 and inductor L while transistor M4 is operating in a conductive state, or both. As described more fully below, in the event the current through transistor M3 and inductor L is greater than a threshold current, controller <NUM> may be configured to turn "off" transistor M3 (i.e., cause transistor M3 to operate in a non-conductive state) and turn "on" transistor M4 (i.e., cause transistor M4 to operate in a conductive state).

Additionally, device <NUM> includes a comparator <NUM> having one input configured to receive a fixed reference voltage Vref from a reference generator <NUM> and another input coupled to output voltage Vout. By way of example only, reference voltage Vref may comprise a voltage of substantially <NUM> volts. An output of comparator <NUM> is coupled to an input of controller <NUM>. Comparator <NUM> is configured to compare reference voltage Vref and output voltage Vout, and, in response to the comparison, convey a signal to controller <NUM>. If output voltage Vout is greater than reference voltage Vref, comparator <NUM> may convey a signal indicative thereof to controller <NUM>. Similarly, if output voltage Vout is less than or equal to reference voltage Vref, comparator <NUM> may convey a signal indicative thereof to controller <NUM>. Stated another way, comparator <NUM> is configured to detect when the regulator output voltage Vout has dropped below a comparator threshold voltage (i.e., reference voltage Vref) and convey a signal indicating that a runaway condition could occur if the current through inductor L were to cross a current limit threshold value. According to at least one embodiment, comparator <NUM> may be configured to provide a hysteresis to establish a controlled response if the output voltage Vout of device <NUM> is hovering near threshold voltage Vth.

A contemplated operation of device <NUM> will now be described. During operation, controller <NUM>, via gate drivers <NUM>, may vary the duty cycles at which transistors M3 and M4 are turned on to alternately connect and disconnect inductor L to and from supply voltage VDD. As inductor L stores energy and discharges the energy, it produces output voltage Vout, which may be somewhat smaller than supply voltage VDD. Further, device <NUM> may monitor a current through the high-side FET M3 relative to a threshold current. In addition, device <NUM> may monitor output voltage Vout and compare output voltage Vout to reference voltage Vref. If at any time the sensed current rises above a threshold current and output voltage is greater than reference voltage, controller <NUM> may turn the high-side FET M3 "off' and turn the low-side FET "on" for a fixed amount of time. In contrast, if the sensed current rises above a threshold current and output voltage is less than or equal to reference voltage Vref, controller <NUM> may turn the high-side FET M3 "off' and turn the low-side FET "on" until the current flowing through inductor L is substantially equal to zero.

Another, more specific, contemplated operation of device will now be described. During operation, device <NUM> may monitor a current through the high-side FET M1 relative to a threshold current. Further, device <NUM> may monitor output voltage Vout relative to reference voltage Vref. In response to receipt of a signal from comparator <NUM> indicative of output voltage falling to a value equal to a less than reference voltage Vref, controller <NUM> may be configured to enable a current limit "foldback mode. " If, during the "foldback mode," the current through inductor L ("inductor current") exceeds a current limit threshold (i.e., a reference current), controller <NUM> may cause the inductor current to ramp down to substantially zero before the inductor current L is allowed to ramp up again. It is noted that the inductor current may be forced to discharge to substantially zero, regardless of the values of supply voltage VDD or output voltage Vout, thereby ensuring that the inductor current cannot runaway. As described with reference to <FIG> below, an inductor current upward ramp may be monitored by a comparator (i.e., comparator <NUM>) while transistor M3 is on (i.e., conducting) and an inductor current downward ramp may be monitored by a zero crossing comparator (i.e., comparator <NUM>) while transistor M4 is on (i.e., conducting).

The foldback mode may use two current limit levels (i.e., the current limit threshold and a zero current) to regulate an average inductor current. The average current delivered to the output of regulator <NUM> while operating in the foldback mode is half of the current limit value, hence the "foldback" terminology. Since the current limit threshold is usually set near a rated current of a regulator (e.g., device <NUM>) delivering half of the current limit value in foldback mode means that the rated load may not be supported in this mode. This is generally not a system limitation for normal operation if the fault comparator reference voltage Vref is set at a low enough threshold where load <NUM> is not expected to be able to draw the full rated current.

<FIG> illustrates a device <NUM>, in accordance with an exemplary embodiment of the present invention. Similar to device <NUM>, device <NUM> includes programmable reference <NUM>, modulator <NUM>, controller <NUM>, and gate drivers <NUM>. Device <NUM> further includes transistors M3 and M4, inductor L, capacitor C and load <NUM>. Additionally, device <NUM> includes comparator <NUM> having one input configured to receive a fixed reference voltage Vref and another input coupled to output voltage Vout. Further, device <NUM> includes another comparator <NUM> including one input coupled to a drain of transistor M3 and another input coupled to a drain of a reference transistor M5. Comparator <NUM> may be used to monitor a reference current Iref (i.e., a current flowing through transistor M5) relative to a current flowing through transistor M3 and, in response to thereto, convey a signal to controller <NUM>. As noted above, if the current flowing through transistor M3 rises to a value equal to or greater than a threshold current (i.e., reference current), and output voltage Vout is greater than reference voltage Vref, controller <NUM> may cause the current to be recirculated (i.e., via turning off transistor M3 and turning on transistor M4) for a fixed amount of time.

Moreover, as noted above, if the current through transistor M3 rises to a value equal to or greater than a threshold current, and output voltage Vout is less than or equal to reference voltage Vref, controller <NUM> may turn high-side FET M3 "off' and turn low-side FET M4 "on" until the current flowing through inductor L is substantially equal to zero. According to one exemplary embodiment, device <NUM> further includes a comparator <NUM> including one input coupled to a ground voltage and another input coupled to node A. Comparator <NUM> may be configured to compare the voltage at node A to the ground voltage and, in response to the comparison, convey a signal to controller <NUM> indicative of whether a current through inductor L has fallen to substantially zero.

<FIG> is a flowchart illustrating a method <NUM>, in accordance with an exemplary embodiment of the present invention. Method <NUM> will now be described with reference to <FIG>. At step <NUM> of method <NUM>, comparator <NUM> may compare output voltage Vout to a reference voltage Vref. If output voltage Vout is less than reference voltage Vref, comparator <NUM> may assert a fault flag <NUM>. As noted above, comparator <NUM> may be configured to use time or voltage hysteresis when comparing reference voltage Vref to output voltage Vout. For example, comparator <NUM> may output a fault flag <NUM> when output voltage Vout has been less than or equal to reference voltage Vref for a predetermined amount of time, rather than immediately asserting fault flag <NUM> as soon as output voltage Vout is less than or equal to reference voltage Vref.

In the event comparator <NUM> asserts fault flag <NUM>, controller <NUM> may enable a foldback mode of device <NUM> (depicted in step <NUM>). If device <NUM> is already in operating in the foldback mode, device <NUM> may remain in foldback mode. While in foldback mode, controller <NUM> may be configured to monitor an amount of current flowing from voltage supply VDD through transistor M3 to inductor L via a current flowing through node A (depicted by reference numeral <NUM>). At step <NUM>, controller <NUM> may determine, via the current flowing through node A, whether the amount of current flowing through transistor M3 exceeds a current limit. Typically, the current limit for device <NUM> may be set at a level higher than the amount of current that device <NUM> is normally expected to deliver to the load.

If controller <NUM> determines that the monitored current flowing through transistor M3 exceeds the current limit, controller <NUM>, at step <NUM>, may cause the energy stored in inductor L to drain. According to one exemplary embodiment, controller <NUM> may cause transistor M3 to be turned off and transistor M4 to be turned on (e.g., using gate drivers <NUM>) to drain the energy from inductor L. Transistor M3 may remain off and transistor M4 may remain on until substantially all of the energy stored by inductor L is drained. It is noted that controller <NUM> may determine when all of the energy has drain from inductor L by monitoring the current flowing through transistor M4. Controller <NUM> may monitor the current flowing through transistor M4 by monitoring, via comparator <NUM>, a current flowing through transistor M4.

At step <NUM>, controller <NUM> may determine whether the monitored current flowing through transistor M4 has crossed zero. If so, inductor L has drained substantially all of its energy and, at step <NUM>, controller <NUM> may resume standard control of transistors M3 and M4, alternately switching transistors M3 and M4 according to a normal duty cycle configured to provide a designed output voltage to the load <NUM>. Operation continues at step <NUM>, where comparator <NUM> again compares output voltage Vout to reference voltage Vref.

In the event controller <NUM> determines that the monitored current flowing through transistor M4 has not yet crossed zero, at step <NUM>, transistor M3 may remain off and transistor M4 may remain on so that the energy stored by inductor L continues to drain out of inductor L to ground via transistor M4 and the load. Ensuring that the energy stored by inductor L is drained before transistor M3 is allowed to turn on again may prevent device <NUM> from experiencing current limit runaway. Note that one result of the combination of steps <NUM>, <NUM>, and <NUM>, is that controller <NUM> may wait to resume standard control of transistors M3 and M4 until the zero crossing of the monitored current. Thus, controller <NUM> may wait to resume standard control until all or substantially all of the energy stored by inductor L has been drained no matter how long draining the energy may take. Stated another way, controller <NUM> may allow inductor L to drain its energy independent of any duty cycle or frequency provided by programmable reference <NUM> or modulator <NUM>. This may prevent the conditions described earlier that lead to current limit runaway.

Although method <NUM> is illustrated as a series of sequential steps, it should be appreciated that comparator <NUM>, at step <NUM>, may continuously compare output voltage Vout to reference Vref so that operation of device <NUM> can change as soon as the relationship between output voltage Vout and reference voltage Vref changes. For example, shortly or immediately after output voltage Vout is less than reference voltage Vref (i.e., taking into account any hysteresis settings as described above), controller <NUM> may enable foldback mode. Similarly, shortly or immediately after output voltage Vout is greater than reference voltage Vref (i.e., again taking into account any hysteresis setting), controller <NUM> may disable foldback mode.

Returning now to step <NUM>, if comparator <NUM> determines that output voltage Vout is greater than reference voltage Vref, comparator <NUM> may de-assert fault flag <NUM>. At step <NUM>, controller <NUM> may determine whether device <NUM> is already in foldback mode. If so, at step <NUM> controller <NUM> may disable foldback mode. If device <NUM> is not operating in foldback mode, operation may continue at step <NUM>. At step <NUM>, controller <NUM> may continue standard control of transistor M3 and transistor M4, alternately switching transistors M3 and M3 according to a normal duty cycle configured to provide a designed output voltage to the load.

<FIG> is a plot <NUM> depicting various signals of a regulator, such as device <NUM> illustrated in <FIG> or device <NUM> illustrated in <FIG>. Signal <NUM> represents a current flowing through inductor L of the regulator and signal <NUM> represents output voltage Vout of the regulator. Plot <NUM> further depicts a current limit value <NUM>. As depicted by reference numeral <NUM>, the current represented by signal <NUM> approaches the current limit value <NUM> (e.g., signal <NUM> is being limited to current limit value <NUM> using a constant off time). As depicted, the voltage represented by signal <NUM> begins to drop (e.g., because of a load fault or load short at an output) and when signal <NUM> crosses the reference voltage Vref at <NUM>, controller <NUM> (see <FIG> or <FIG>) may cause the regulator to enter foldback mode in which transistor M3 is turned off and transistor M4 is turned on. Consequently, signal <NUM> representing the current through inductor L begins to decrease as the energy stored by inductor L drains. Eventually, signal <NUM> crosses zero at <NUM>. At this point, controller <NUM> may resume standard control of transistors M3 and M4 as indicated by step <NUM> of method <NUM>. Consequently, signal <NUM> (i.e., the current through inductor L) increases sharply until it hits the current limit <NUM> at <NUM>. Note that since signal <NUM>, which represents output voltage Vout, is still below Vref, the buck regulator remains in foldback mode. After reaching the current limit <NUM> at <NUM>, in accordance with steps <NUM> and <NUM> of method <NUM>, signal <NUM> begins to fall again.

<FIG> is another plot <NUM> depicting a signal <NUM>, which represents a current through inductor L. As illustrated, signal <NUM> rapidly rises until it hits current limit <NUM>, and then falls until it crosses zero, at which point it rapidly rises again until it hits current limit <NUM>. These cycles illustrate foldback mode in which the average current delivered by the regulator "folds back" to a value of about one half of the current limit.

<FIG> is yet another plot <NUM> depicting a regulator (e.g., device <NUM>) exiting foldback mode and resuming normal duty cycle operation (i.e., non foldback current limit operation). Output voltage Vout is illustrated as signal <NUM>, current through inductor L is illustrated as plots <NUM> and <NUM>. Prior to a point depicted by reference numeral <NUM>, signal <NUM> (i.e., output voltage Vout) is below reference voltage Vref and the regulator is in foldback mode. Due to a short or fault associated with load <NUM>, current <NUM> oscillates between the current limit and zero in foldback mode. When output voltage <NUM> rises above Vref at point <NUM>, the regulator exits foldback mode. However, the short or fault associated with load <NUM> is still present to at least some degree. Consequently, current <NUM> hovers near the current limit.

<FIG> is a flowchart illustrating a method <NUM>, in accordance with one or more exemplary embodiments. Method <NUM> may include comparing an output voltage of a voltage regulator to a reference voltage (depicted by numeral <NUM>). Method <NUM> may also include comparing a current through an inductor of the regulator to a threshold current (depicted by numeral <NUM>). In addition, method <NUM> may include dissipating all energy stored by the inductor if the current through the inductor is greater than or equal to the threshold current and the output voltage is less than or equal to the reference voltage (depicted by numeral <NUM>).

<FIG> is a flowchart illustrating another method <NUM>, in accordance with one or more exemplary embodiments. Method <NUM> may include monitoring a current flowing through a high-side transistor and an inductor by comparing the current to a reference current flowing through a reference transistor (depicted by numeral <NUM>). In addition, method <NUM> may also include comparing an output voltage to a reference voltage (depicted by numeral <NUM>). Method <NUM> may also include causing the high-side transistor to operate in a non-conductive state and a low-side transistor to operate in a conductive state until the current through the inductor falls to substantially zero if the output voltage is less than or equal to the reference voltage (depicted by numeral <NUM>).

In comparison to conventional systems where a current limit runaway may occur when a current limit algorithm does not allow for sufficient time to dissipate more inductor energy during a high-side FET off time than the inductor energy that is put in during a high-side FET on time, the present invention forces the energy stored in an inductor of a buck regulator to dissipate completely or substantially completely when the output voltage of the buck regulator falls below a threshold voltage.

<FIG> is a block diagram of an electronic device <NUM>, according to an exemplary embodiment of the present invention. According to one example, device <NUM> may comprise a portable electronic device, such as a mobile telephone. Device <NUM> may include various modules, such as a digital module <NUM>, an RF module <NUM>, and power management module <NUM>. Digital module <NUM> may comprise memory and one or more processors. RF module <NUM>, which may comprise RF circuitry, may include a transceiver including a transmitter and a receiver and may be configured for bi-directional wireless communication via an antenna <NUM>. In general, wireless communication device <NUM> may include any number of transmitters and any number of receivers for any number of communication systems, any number of frequency bands, and any number of antennas. According to an exemplary embodiment of the present invention, power management module <NUM> may include one or more of voltage regulators <NUM>, which may comprise one or more of device <NUM> (see <FIG>), one or more of device <NUM> (see <FIG>), or a combination thereof.

Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the exemplary embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the exemplary embodiments of the invention.

The various illustrative logical blocks, modules, and circuits described in connection with the exemplary embodiments disclosed herein may be implemented or performed with a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein.

Claim 1:
A device (<NUM>), comprising:
an inductor (<NUM>, L) selectively coupled to an output and a power supply;
a first transistor (<NUM>, M3) coupled between the power supply and the inductor;
a second transistor (<NUM>, M4) coupled to the first transistor and between the inductor and a ground voltage;
a first comparator (<NUM>) configured to compare the voltage at the output and a reference voltage and convey a signal (<NUM>) indicative of the comparison;
a second comparator (<NUM>) coupled between the second transistor and the ground voltage, configured to detect an amount of current flowing through the second transistor; and
a controller (<NUM>) configured to:
detect (<NUM>) an over-current event if an amount of current flowing from the power supply to the inductor is equal to or greater than a current threshold
detect (<NUM>) a low-voltage event if a voltage at the output is less than or equal to a reference voltage, and
in response to the over-current event, switch off the first transistor and switch on the second transistor to prevent current from flowing from the power supply to the inductor;
characterised in that
the device (<NUM>) further comprising:
a third comparator (<NUM>) configured to compare a current through the first transistor and a third transistor coupled to the first transistor, wherein
the controller is further configured to receive an output of the third comparator to detect if the amount of current from the power supply to the inductor is equal to or greater than the current threshold.