Patent Description:
Dielectric bonding is often used for bonding a carrier wafer with a device or bonding a device with another device. The devices for bonding may include through-silicon vias. In dielectric bonding, a dielectric surface is bonded with another dielectric surface. Hybrid bonding often includes bonding of a hybrid surface that includes a dielectric portion and a metal portion, between devices. For bonding metal surfaces, thermal compression is often used to form metal-metal bonding.

As two semiconductor structures are bonded together for <NUM>-dimensional integration, more complications are introduced. Factors such as heat or an electromagnetic radiation generated by one semiconductor structure may affect operations of one or more semiconductor structures in the bonded structures. For example, heat generated by one semiconductor structure may not only affect its own operations, but also affect operations of the other semiconductor structure.

The disclosed methods and systems are directed to solve one or more problems set forth above and other problems.

<CIT> discloses a method for preparing 3D integrated semiconductor devices and the resulting devices are disclosed. Embodiments include forming a first and a second bond pad on a first and a second semiconductor device, respectively, the first and the second bond pads each having plural metal segments, the metal segments of the first bond pad having a configuration different from a configuration of the metal segments of the second bond pad or having the same configuration as a configuration of the metal segments of the second bond pad but rotated with respect to the second bond pad; and bonding the first and second semiconductor devices together through the first and second bond pads.

<CIT> discloses a process of assembly by direct bonding of a first and second element, each having a surface including copper portions separated by a dielectric material, the process includes: polishing the surfaces such that the surfaces to be assembled allow assembly by bonding; forming a diffusion barrier selectively in copper portions of the first and second elements, wherein the surface of the diffusion barrier of the first and second elements is level with the surface, to within less than <NUM> nanometers; and bringing the two surfaces into contact, such that the copper portions of one surface cover at least partly the copper portions of the other surface, and such that direct bonding is obtained between the surfaces.

<CIT> discloses a method for bonding of two semiconductor structures, the bonding surfaces of both semiconductor structures comprising dielectric and metal surfaces. The document discloses that metal to dielectric bonding occurs in regions of the bonding interface.

One aspect of the present disclosure includes a metal-dielectric bonding method. The metal-dielectric bonding method includes providing a first semiconductor structure including a first semiconductor layer, a first dielectric layer on the first semiconductor layer, and a first metal layer on the first dielectric layer, where the first metal layer has a metal bonding surface facing away from the first semiconductor layer; planarizing the metal bonding surface such that the metal bonding surface (<NUM>) is flat after the metal bonding surface (<NUM>) is planarized; applying a plasma treatment on the metal bonding surface; providing a second semiconductor structure including a second semiconductor layer, and a second dielectric layer on the second semiconductor layer, where the second dielectric layer has a dielectric bonding surface facing away from the second semiconductor layer; planarizing the dielectric bonding surface; applying a plasma treatment on the dielectric bonding surface; and bonding the first semiconductor structure with the second semiconductor structure by bonding the metal bonding surface with the dielectric bonding surface, wherein a bonding interface is formed between the first semiconductor structure and the second semiconductor structure, wherein the dielectric bonding surface (<NUM>) and the metal bonding surface (<NUM>) face each other and are bonded together, wherein the bonding interface is at a plane at which the metal bonding surface is in contact with the dielectric bonding surface, wherein the first semiconductor layer (<NUM>) includes a power device that generates heat, wherein the first metal layer (<NUM>) is formed to dissipate the heat generated by the power device, and wherein the first metal layer (<NUM>) is configured to dissipate heat by further connecting to a heat dissipating apparatus.

The following describes the technical solutions in the embodiments of the present invention with reference to the accompanying drawings.

In the specification, claims, and accompanying drawings of the present disclosure, the terms "first," "second," "third," "fourth," and the like (if exist) are intended to distinguish between similar objects but do not necessarily indicate an order or sequence. It should be understood that the embodiments of the present disclosure described herein can be implemented, for example, in orders other than the order illustrated or described herein.

Some or all of the processes may be chosen according to actual needs to achieve purposes of the present disclosure. Some or all of the components may be chosen according to actual needs to achieve purposes of the present disclosure.

The present disclosure provides a metal-dielectric bonding method. <FIG> illustrates a flowchart of an exemplary metal-dielectric bonding method consistent with various disclosed embodiments of the present disclosure. <FIG> and <FIG> illustrate schematic views of structures at certain stages of the metal-dielectric bonding process.

Referring to <FIG>, a first semiconductor structure including a first semiconductor layer, a first dielectric layer, and a first metal layer having a metal bonding surface is provided (S610). <FIG> show structures at certain stages of the process for providing the first semiconductor structure that includes a first semiconductor layer, a first dielectric layer, and a first metal layer.

<FIG> illustrates a schematic view of an exemplary first semiconductor layer consistent with various disclosed embodiments of the present disclosure. Referring to <FIG>, a first semiconductor layer <NUM> is provided. In some embodiments, the first semiconductor layer <NUM> may be a silicon substrate.

<FIG> illustrates another schematic view of an exemplary first semiconductor layer consistent with various disclosed embodiments of the present disclosure. Referring to <FIG>, the first semiconductor layer <NUM> may include a first semiconductor device <NUM> formed therein.

The first semiconductor device <NUM> includes a power device. The power device generates heat.

In other embodiments, the first semiconductor device <NUM> may include, for example, a complementary metal-oxide-semiconductor (CMOS) device. The CMOS device may be used in various applications such as a CMOS image sensor (CIS), a data convertor, etc..

In some embodiments, the first semiconductor device <NUM> may include, for example, a device that generates an electromagnetic radiation. The electromagnetic radiation may be, for example, visible light, infrared light, radio wave, ultraviolet, or any combination thereof.

In some embodiments, the first semiconductor device <NUM> may include, for example, a device that is exposed to an electromagnetic radiation. The electromagnetic radiation may be, for example, visible light, infrared light, radio wave, ultraviolet, or any combination thereof.

<FIG> illustrates a schematic view of an exemplary first dielectric layer on an exemplary first semiconductor layer consistent with various disclosed embodiments of the present disclosure. Referring to <FIG>, a first dielectric layer <NUM> is formed on a first semiconductor layer <NUM>.

In some embodiments, a material of the first dielectric layer <NUM> may include, for example, silicon oxide, silicon oxycarbide, silicon nitride, silicon carbon nitride, or any combination thereof.

In some embodiments, the first dielectric layer <NUM> may be formed on the first semiconductor layer <NUM> by deposition, such as chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), or any other suitable deposition process.

<FIG> illustrates a schematic view of an exemplary first semiconductor structure consistent with various disclosed embodiments of the present disclosure. Referring to <FIG>, the first semiconductor structure <NUM> includes the first semiconductor layer <NUM>, the first dielectric layer <NUM>, and a first metal layer <NUM>. The first metal layer <NUM> is formed on the first dielectric layer <NUM>. The first metal layer <NUM> includes a metal bonding surface <NUM>, and the metal bonding surface <NUM> faces away from the first semiconductor layer <NUM>. The metal bonding surface <NUM> may be a surface that is to be bonded with a bonding surface of another semiconductor structure.

In some embodiments, a material of the first metal layer <NUM> may be tantalum, titanium, copper, or any combination thereof. In some embodiments, the first metal layer <NUM> may be formed on the first dielectric layer <NUM> by deposition, such as chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), or any other suitable deposition. For example, as a physical vapor deposition, magnetron sputtering deposition may be used to deposit the first metal layer <NUM>, where one or more sputtering targets may be bombarded to eject materials, and the ejected materials may be deposited on the first dielectric layer <NUM>.

Referring to <FIG>, the metal bonding surface is planarized (S620). Correspondingly, <FIG> illustrates another schematic view of an exemplary first semiconductor structure after planarization consistent with various disclosed embodiments of the present disclosure.

Referring to <FIG>, and according to the application, the metal bonding surface <NUM> is flat after the metal bonding surface <NUM> is planarized, as the planarization process removes materials causing rough topography. In some embodiments, the metal bonding surface <NUM> may be planarized by chemical mechanical planarization or any other suitable planarization. In some embodiments, the metal bonding surface <NUM> may be planarized, such that a surface roughness of the metal bonding surface <NUM> may be, for example, approximately <NUM> or less.

Referring to <FIG>, surface treatments are applied on the metal bonding surface (S630). Correspondingly, <FIG> illustrates another schematic view of an exemplary first semiconductor structure under surface treatments consistent with various disclosed embodiments of the present disclosure.

Referring to <FIG>, closed sharp arrows indicate that surface treatments are applied on the metal bonding surface <NUM> of the first metal layer <NUM> in the first semiconductor structure <NUM>. The surface treatments may include a plasma treatment and a cleaning treatment.

In some embodiments, the plasma treatment may include applying on the metal bonding surface <NUM> nitrogen plasma, oxygen plasma, argon plasma, argon-hydrogen plasma, or any other suitable plasma. Nitrogen plasma may be generated by introducing nitrogen gas to a plasma system; oxygen plasma may be generated by introducing oxygen gas to a plasma system; and argon plasma may be generated by introducing argon gas into a plasma system. Argon-hydrogen plasma may be generated by introducing argon and hydrogen gases into a plasma system. Argon-hydrogen plasma may include mixture of argon plasma and hydrogen plasma.

In some embodiments, the cleaning treatment may include using deionized water to clean the metal bonding surface <NUM>.

In some embodiments, the cleaning treatment may include using a hydrophilic chemical substance to clean the metal bonding surface <NUM>. The hydrophilic chemical substance may be, for example, ammonia solution, weak acid, or any other suitable chemical substance. The weak acid may be, for example, hydrofluoric acid, benzoic acid, acetic acid, propanoic acid, acrylic acid, or any other suitable weak acid.

Referring to <FIG>, a second semiconductor structure including a second semiconductor layer and a second dielectric layer having a dielectric bonding surface is provided (S640). <FIG> show structures at certain stages of the process for providing the second semiconductor structure that includes a second semiconductor layer and a second dielectric layer.

<FIG> illustrates a schematic view of an exemplary second semiconductor layer consistent with various disclosed embodiments of the present disclosure. Referring to <FIG>, a second semiconductor layer <NUM> is provided. In some embodiments, the second semiconductor layer <NUM> may be a silicon substrate.

<FIG> illustrates another schematic view of an exemplary second semiconductor layer consistent with various disclosed embodiments of the present disclosure. Referring to <FIG>, the second semiconductor layer <NUM> may include a second semiconductor device <NUM>.

In some embodiments, the second semiconductor device <NUM> may be, for example, a power device. The power device may generate heat.

In some embodiments, the second semiconductor device <NUM> may be, for example, a complementary metal-oxide-semiconductor (CMOS) device. The CMOS device may be used in various applications such as a CMOS image sensor, a data convertor, etc..

In some embodiments, the second semiconductor device <NUM> may be, for example, a device that generates an electromagnetic radiation. The electromagnetic radiation may be, for example, visible light, infrared light, radio wave, ultraviolet, or any combination thereof.

In some embodiments, the second semiconductor device <NUM> may be, for example, a device that is exposed to an electromagnetic radiation. The electromagnetic radiation may be, for example, visible light, infrared light, radio wave, ultraviolet, or any combination thereof.

<FIG> illustrates a schematic view of an exemplary second semiconductor structure consistent with various disclosed embodiments of the present disclosure. Referring to <FIG>, the second semiconductor structure <NUM> includes a second semiconductor layer <NUM> and a second dielectric layer <NUM>, and the second dielectric layer <NUM> is formed on the second semiconductor layer <NUM>.

The second dielectric layer <NUM> includes a dielectric bonding surface <NUM>, and the dielectric bonding surface <NUM> faces away from the second semiconductor layer <NUM>. The dielectric bonding surface <NUM> is a surface that is to be bonded with a bonding surface of the first semiconductor structure.

In some embodiments, a material of the second dielectric layer <NUM> may include, for example, silicon oxide, silicon oxycarbide, silicon nitride, silicon carbon nitride, or any combination thereof.

In some embodiments, the second dielectric layer <NUM> may be formed on the second semiconductor layer <NUM> by deposition, such as chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), or any other suitable deposition.

Referring to <FIG>, the dielectric bonding surface is planarized (S650). Correspondingly, <FIG> illustrates a schematic view of an exemplary second semiconductor structure after planarization consistent with various disclosed embodiments of the present disclosure.

Referring to <FIG>, and according to the application, the dielectric bonding surface <NUM> is flat after the dielectric bonding surface <NUM> is planarized, as the planarization process removes materials causing rough topography. In some embodiments, the dielectric bonding surface <NUM> may be planarized by chemical mechanical planarization or any other suitable planarization. In some embodiments, the dielectric bonding surface <NUM> may be planarized, such that a surface roughness of the dielectric bonding surface <NUM> may be, for example, approximately <NUM> or less.

Referring to <FIG>, surface treatments are applied on the dielectric bonding surface (S660). Correspondingly, <FIG> illustrates a schematic view of an exemplary second semiconductor structure under surface treatments consistent with various disclosed embodiments of the present disclosure.

Referring to <FIG>, closed sharp arrows indicate that surface treatments are applied on the dielectric bonding surface <NUM> of the second dielectric layer <NUM> of the second semiconductor structure <NUM>. The surface treatments may include a plasma treatment and a cleaning treatment.

In some embodiments, the plasma treatment may include applying on the dielectric bonding surface <NUM> nitrogen plasma, oxygen plasma, argon plasma, argon-hydrogen plasma, or any other suitable plasma. Nitrogen plasma may be generated by introducing nitrogen gas to a plasma system; oxygen plasma may be generated by introducing oxygen gas to a plasma system; and argon plasma may be generated by introducing argon gas into a plasma system. Argon-hydrogen plasma may be generated by introducing argon and hydrogen gases into a plasma system. Argon-hydrogen plasma may include mixture of argon plasma and hydrogen plasma.

In some embodiments, the cleaning treatment may include using deionized water to clean the dielectric bonding surface <NUM>.

In some embodiments, the cleaning treatment may include using a hydrophilic chemical substance to clean the dielectric bonding surface <NUM>. The hydrophilic chemical substance may be, for example, ammonia solution, weak acid, or any other suitable chemical substance. The weak acid may be, for example, hydrofluoric acid, benzoic acid, acetic acid, propanoic acid, acrylic acid, or any other suitable weak acid.

Referring to <FIG>, the first semiconductor structure is bonded with the second semiconductor structure (S670). Correspondingly, <FIG> and <FIG> illustrate schematic views of structures of metal-dielectric bonding.

<FIG> illustrates a schematic view of an exemplary structure of metal-dielectric bonding consistent with various disclosed embodiments of the present disclosure. Referring to <FIG>, the first semiconductor structure is bonded with the second semiconductor structure by bonding the metal bonding surface with the dielectric bonding surface. In some embodiments, referring to <FIG>, the second semiconductor structure may be oriented upside down, such that the dielectric bonding surface is oriented downward. Further, the metal bonding surface is oriented upward. Accordingly, the dielectric bonding surface and the metal bonding surface face toward each other and bonded together, according to the application.

A bonding interface <NUM> is formed between the first semiconductor structure <NUM> and the second semiconductor structure <NUM>, according to the application. The bonding interface <NUM> is at a plane at which the metal bonding surface is in contact with the dielectric bonding surface, according to the application.

In some embodiments, the first semiconductor structure may be bonded with the second semiconductor structure by bonding the metal bonding surface with the dielectric bonding surface at room temperature. Room temperature may be, for example, in a range from approximately <NUM> to approximately <NUM>.

In some embodiments, the first semiconductor structure may be bonded with the second semiconductor structure by bonding the metal bonding surface with the dielectric bonding surface at a temperature lower than room temperature, e.g., a temperature above <NUM> and below approximately <NUM>.

In some embodiments, the first semiconductor structure may be bonded with the second semiconductor structure by bonding the metal bonding surface with the dielectric bonding surface at a temperature higher than room temperature, e.g., a temperature in an range from approximately <NUM> to approximately <NUM>.

<FIG> illustrates another schematic view of an exemplary structure of metal-dielectric bonding consistent with various disclosed embodiments of the present disclosure. Referring to <FIG>, the first semiconductor structure is bonded with the second semiconductor structure by bonding the metal bonding surface with the dielectric bonding surface. In some embodiments, referring to <FIG>, the first semiconductor structure may be oriented upside down, such that the metal bonding surface is oriented downward. Further, the dielectric bonding surface is oriented upward. Accordingly, the dielectric bonding surface and the metal bonding surface face toward each other and bonded together, according to the application.

A bonding interface <NUM> is formed between the first semiconductor structure and the second semiconductor structure, according to the application. The bonding interface <NUM> is at a plane at which the metal bonding surface is in contact with the dielectric bonding surface, according to the application.

In some embodiments, the first semiconductor structure may be oriented such that the metal bonding surface faces toward left, and the second semiconductor structure may be oriented such that the dielectric bonding surface faces toward right. Accordingly, the metal bonding surface and the dielectric bonding surface face toward each other and are bonded with each other, according to the application.

In some embodiments, the first semiconductor structure may be oriented such that the metal bonding surface faces toward right, and the second semiconductor structure may be oriented such that the dielectric bonding surface face toward left. Accordingly, the metal bonding surface and the dielectric bonding surface face toward each other and are bonded with each other, according to the application.

The first semiconductor structure may be bonded with the second semiconductor structure having the metal bonding surface and the dielectric bonding surface facing various direction, as long as the metal bonding surface and the dielectric bonding surface face toward each other and are bonded with each other.

In some embodiments, referring to <FIG>, a heat treatment is applied on the first semiconductor structure and the second semiconductor structure (S680). During the heat treatment, the first semiconductor structure and the second semiconductor structure may be annealed at an annealing temperature. The annealing temperature may be, for example, in a range from approximately <NUM> to approximately <NUM>. For example, temperatures of the first semiconductor structure and the second semiconductor structure may be increased from an original temperature to the annealing temperature, kept at the annealing temperature for a preset time period, and further reduced to the original temperature. The original temperature may be, for example, room temperature. The preset time period may be, for example, <NUM> hour, <NUM> hours, <NUM> hours, <NUM> hours, etc. The preset time period may be any suitable time period chosen according to various application scenarios.

<FIG> illustrates a transmission electron microscopy image of an exemplary structure of metal-dielectric bonding consistent with various disclosed embodiments of the present disclosure.

In transmission electron microscopy (TEM), an electron beam is directed toward a sample for imaging. The electron beam passes through the sample, during which electrons interact with the sample. The interactions depend on properties of local areas of the sample. Different local areas having different properties lead to different interactions with electrons, and thus lead to differences in different areas of a corresponding TEM image.

Referring to <FIG>, the structure of metal-dielectric bonding includes a first semiconductor structure 100a, a second semiconductor structure 200a, and a bonding interface 31a formed between a first semiconductor structure 100a and a second semiconductor structure 200a. The first semiconductor structure 100a includes a first semiconductor layer 11a, a first dielectric layer 12a on the first semiconductor layer 11a, and a first metal layer 13a on the first dielectric layer 12a. The first metal layer 13a includes a metal bonding surface, and the metal bonding surface faces away from the first semiconductor layer 11a. The second semiconductor structure 200a includes a second semiconductor layer 21a and a second dielectric layer 22a on the second semiconductor layer 21a. The second dielectric layer 22a includes a dielectric bonding surface, and the dielectric bonding surface faces away from the second semiconductor layer 21a.

Referring to <FIG>, the second semiconductor structure 200a is oriented such that the dielectric bonding surface faces downward, and the first semiconductor structure 100a is oriented such that the metal bonding surface faces upward, and the dielectric bonding surface and the metal bonding surface face toward each other, and are bonded with each other. The bonding interface 31a is at a plane at which the metal bonding surface and the dielectric bonding surface are in contact with each other, according to the application.

The present disclosure provides a structure of metal-dielectric bonding, e.g., a metal-dielectric bonding structure corresponding to any metal-dielectric bonding method according to various embodiments of the present disclosure.

<FIG> illustrates a schematic view of an exemplary structure of metal-dielectric bonding consistent with various disclosed embodiments of the present disclosure. Referring to <FIG>, the exemplary structure of metal-dielectric bonding includes a first semiconductor structure <NUM>, a second semiconductor structure <NUM>, and a bonding interface <NUM>. The second semiconductor structure <NUM> is on the first semiconductor structure <NUM>, and is bonded with the first semiconductor structure <NUM>.

The first semiconductor structure <NUM> includes a first semiconductor layer <NUM>, a first dielectric layer <NUM> on the first semiconductor layer <NUM>, and a first metal layer <NUM> on the first dielectric layer <NUM>. The first metal layer <NUM> includes a metal bonding surface, and the metal bonding surface faces away from the first semiconductor layer <NUM>.

In some embodiments, the first semiconductor layer <NUM> may be, for example, a silicon substrate.

In some embodiment, a material of the first dielectric layer <NUM> may include, for example, silicon oxide, silicon oxycarbide, silicon nitride, silicon carbon nitride, or any combination thereof.

In some embodiments, a material of the first metal layer <NUM> may be, for example, tantalum, titanium, copper, or any combination thereof.

The second semiconductor structure <NUM> includes a second semiconductor layer <NUM> and a second dielectric layer <NUM> on the second semiconductor layer <NUM>. The second dielectric layer <NUM> includes a dielectric bonding surface, and the dielectric bonding surface faces away from the second semiconductor layer <NUM>.

In some embodiments, the second semiconductor layer <NUM> may be, for example, a silicon substrate.

Referring to <FIG>, the second semiconductor structure <NUM> may be oriented such that the dielectric bonding surface is oriented downward. That is, the direction from the second semiconductor layer <NUM> to the second dielectric layer <NUM> points downward. The metal bonding surface is oriented upward. That is, the direction from the first semiconductor layer <NUM> to the first metal layer <NUM> points upward. Accordingly, the dielectric bonding surface and the metal bonding surface face toward each other and bonded together, according to the application.

<FIG> illustrates another schematic view of an exemplary structure of metal-dielectric bonding consistent with various disclosed embodiments of the present disclosure. Referring to <FIG>, the exemplary structure of metal-dielectric bonding includes a first semiconductor structure <NUM>, a second semiconductor structure <NUM>, and a bonding interface <NUM>. The second semiconductor structure <NUM> is bonded with the first semiconductor structure <NUM>.

Referring to <FIG>, the second semiconductor structure <NUM> may be oriented such that the dielectric bonding surface is oriented upward. That is, the direction from the second semiconductor layer <NUM> to the second dielectric layer <NUM> points upward. The metal bonding surface is oriented downward. That is, the direction from the first semiconductor layer <NUM> to the first metal layer <NUM> points downward. Accordingly, the dielectric bonding surface and the metal bonding surface face toward each other and bonded together, according to the application.

A bonding interface <NUM> is form between the first semiconductor structure and the second semiconductor structure, according to the application. The bonding interface <NUM> is at a plane at which the metal bonding surface is in contact with the dielectric bonding surface, according to the application.

The above described orientations of the first semiconductor structure and the second semiconductor structure are merely for illustrative purposes and are not intended to limit the scope of the present disclosure. The first semiconductor structure and the second semiconductor structure in the structure of metal-dielectric bonding may have various suitable orientations. For example, in the structure of metal-dielectric bonding, the first semiconductor structure may be oriented such that the metal bonding surface faces toward left, and the second semiconductor structure may be oriented such that the dielectric bonding surface face toward right. Accordingly, the metal bonding surface and the dielectric bonding surface face toward each other and are bonded with each other, according to the application. As another example, the first semiconductor structure may be oriented such that the metal bonding surface faces toward right, and the second semiconductor structure may be oriented such that the dielectric bonding surface face toward left. Accordingly, the metal bonding surface and the dielectric bonding surface face toward each other and are bonded with each other, according to the application. The first semiconductor structure and the second semiconductor structure in the structure of metal-dielectric bonding may have any suitable orientations, as long as the metal bonding surface and the dielectric bonding surface face toward each other and are bonded with each other.

<FIG> illustrates another schematic view of an exemplary structure of metal-dielectric bonding consistent with various disclosed embodiments of the present disclosure. Referring to <FIG>, the structure of metal-dielectric bonding includes a first semiconductor structure <NUM>, a second semiconductor structure <NUM>, and a bonding interface <NUM>. The second semiconductor structure <NUM> is on the first semiconductor structure <NUM>, and is bonded with the first semiconductor structure <NUM>.

The first semiconductor structure <NUM> includes a first semiconductor layer <NUM>, a first dielectric layer <NUM> on the first semiconductor layer <NUM>, and a first metal layer <NUM> on the first dielectric layer <NUM>. The first metal layer <NUM> includes a metal bonding surface, and the metal bonding surface faces away from the first semiconductor layer <NUM>. In some embodiments, a material of the first metal layer <NUM> may be, for example, tantalum, titanium, copper, or any combination thereof.

The second semiconductor structure <NUM> includes a second semiconductor layer <NUM> and a second dielectric layer <NUM> on the second semiconductor layer <NUM>. The second dielectric layer <NUM> includes a dielectric bonding surface, and the dielectric bonding surface faces away from the second semiconductor layer <NUM>. In some embodiments, a material of the second dielectric layer <NUM> may include, for example, silicon oxide, silicon oxycarbide, silicon nitride, silicon carbon nitride, or any combination thereof.

The first semiconductor layer <NUM> includes a first semiconductor device <NUM>. The first semiconductor device <NUM> is a power device. The power device generates heat. Such heat may transfer toward the second semiconductor structure <NUM>. The first metal layer <NUM> may dissipate or redistribute heat generated by the power device, improving operation stability of the power device and/or the second semiconductor structure <NUM>. Referring to <FIG>, straight arrows indicate heat generated by the power device, and heat is dissipated or redistributed by the first metal layer <NUM>. The first metal layer <NUM> may dissipate heat to the air by itself and is configured to dissipate heat by further connecting to a heat dissipating apparatus (not shown). Accordingly, operation stability of the power device and/or the second semiconductor structure <NUM> can be improved.

In some embodiments, the power device may include, for example, a diode, a power metal-oxide semiconductor field effect transistor (MOSFET), an insulated gate bipolar transistor, a bipolar junction transistor, or any combination thereof.

In some embodiments, the first semiconductor device <NUM> may include, for example, a device that generates an electromagnetic radiation. The electromagnetic radiation may be, for example, visible light, infrared light, radio wave, ultraviolet, or any combination thereof. The first metal layer <NUM> may block the electromagnetic radiation from reaching the second semiconductor structure <NUM>, so as to not affect the second semiconductor structure <NUM> and to facilitate stable operations of the second semiconductor structure <NUM>. For example, the first semiconductor device <NUM> may be a light-emitting device that generates light, and the first metal layer <NUM> may block the light from reaching the second semiconductor structure <NUM>.

In some embodiments, the first semiconductor device <NUM> may include, for example, a device that is exposed to an electromagnetic radiation. The electromagnetic radiation may be, for example, visible light, infrared light, radio wave, ultraviolet, or any combination thereof. The first metal layer <NUM> may block electromagnetic radiation from reaching the second semiconductor structure <NUM>, so as to not affect the second semiconductor structure <NUM> and to facilitate stable operations of the second semiconductor structure <NUM>. For example, the first semiconductor device <NUM> may be a pixel wafer that contains photosensitive pixels and is exposed to light. The first metal layer <NUM> may block the light from reaching the second semiconductor structure <NUM>. For various features of the structure of metal-dielectric bonding, references can be made to above method embodiments and device embodiments.

<FIG> illustrates another schematic view of an exemplary structure of metal-dielectric bonding consistent with various disclosed embodiments of the present disclosure. Referring to <FIG>, the structure of metal-dielectric bonding includes a first semiconductor structure <NUM>, a second semiconductor structure <NUM>, and a bonding interface <NUM>. The second semiconductor structure <NUM> is on the first semiconductor structure <NUM>, and is bonded with the first semiconductor structure <NUM>.

The second semiconductor structure <NUM> includes a second semiconductor layer <NUM> and a second dielectric layer <NUM> on the second semiconductor layer <NUM>. The second dielectric layer <NUM> includes a dielectric bonding surface, and the dielectric bonding surface faces away from the second semiconductor layer <NUM>. The dielectric bonding surface is bonded with the metal bonding surface.

The first semiconductor layer <NUM> includes a first semiconductor device <NUM>, and the second semiconductor layer <NUM> may include, for example, a second semiconductor device <NUM>.

Referring to <FIG>, the first semiconductor device <NUM> includes a power device that generates heat, where the heat is indicated by straight filled arrows; and the second semiconductor device <NUM> may be another device that generates or is exposed to an electromagnetic radiation, where the electromagnetic radiation is indicated by curved arrows. The electromagnetic radiation may be, for example, visible light, infrared light, radio wave, ultraviolet, or any combination thereof. The first metal layer <NUM> is formed to dissipate the heat generated by the power device; and the first metal layer <NUM> may block the electromagnetic radiation from reaching the first semiconductor device <NUM>, so as to facilitate stable operations of the second semiconductor structure <NUM> and/or the first semiconductor layer <NUM> of the first semiconductor structure <NUM>.

For example, the first semiconductor device <NUM> may be a CMOS device that generates heat, and the second semiconductor device <NUM> may be a pixel wafer that contains photosensitive pixels and is exposed to visible light or infrared light. The first metal layer <NUM> may dissipate or redistribute heat generated by the CMOS device, and may block the light from reaching the first semiconductor layer <NUM>.

A metal-dielectric bonding method and a corresponding metal-dielectric bonding structure consistent with present disclosure can have applications for a CMOS image sensor (CIS) and/or a memory device.

In some embodiments, the first semiconductor device <NUM> may be, for example, a COMS device of a COMS image sensor (CIS), and the second semiconductor device <NUM> may be, for example, a pixel wafer of the CIS. The pixel wafer of the CIS may include a plurality of pixels. The metal-dielectric bonding structure may further include other components to perform operations of a CIS sensor. For example, the metal-dielectric structure may further include a color filter array to filter light for the pixel wafer, and connections between the COMS device and the pixel wafer.

In other embodiments, the first semiconductor device <NUM> may include, for example, a CIS sensor. The first semiconductor structure <NUM> that includes the CIS sensor may be bonded to the second semiconductor structure <NUM>. The second semiconductor device <NUM> may include, for example, a memory for storing data collected by the CIS sensor or data used by the CIS image sensor. The memory may be, for example, a DRAM, a NAND flash memory, a NOR flash memory, any combination thereof, or any other suitable memory.

Claim 1:
A metal-dielectric bonding method, comprising:
providing a first semiconductor structure (<NUM>) including:
a first semiconductor layer (<NUM>),
a first dielectric layer (<NUM>) on the first semiconductor layer (<NUM>), and
a first metal layer (<NUM>) on the first dielectric layer (<NUM>), the first metal layer (<NUM>) having a metal bonding surface (<NUM>) facing away from the first semiconductor layer (<NUM>);
planarizing the metal bonding surface (<NUM>) such that the metal bonding surface (<NUM>) is flat after the metal bonding surface (<NUM>) is planarized;
applying a plasma treatment on the metal bonding surface (<NUM>);
providing a second semiconductor structure (<NUM>) including:
a second semiconductor layer (<NUM>), and
a second dielectric layer (<NUM>) on the second semiconductor layer (<NUM>), the second dielectric layer (<NUM>) having a dielectric bonding surface (<NUM>) facing away from the second semiconductor layer (<NUM>);
planarizing the dielectric bonding surface (<NUM>);
applying a plasma treatment on the dielectric bonding surface (<NUM>); and
bonding the first semiconductor structure (<NUM>) with the second semiconductor structure (<NUM>) by bonding the metal bonding surface (<NUM>) of the first semiconductor structure (<NUM>) with the dielectric bonding surface (<NUM>) of the second semiconductor layer (<NUM>),
wherein a bonding interface (<NUM>) is formed between the first semiconductor structure (<NUM>) and the second semiconductor structure (<NUM>),
wherein the dielectric bonding surface (<NUM>) and the metal bonding surface (<NUM>) face each other and are bonded together,
wherein the bonding interface (<NUM>) is at a plane at which the metal bonding surface (<NUM>) is in contact with the dielectric bonding surface (<NUM>),
wherein the first semiconductor layer (<NUM>) includes a power device that generates heat,
characterised in that
the first metal layer (<NUM>) is formed to dissipate the heat generated by the power device, and wherein the first metal layer (<NUM>) is configured to dissipate heat by further connecting to a heat dissipating apparatus.