Patent Description:
Flat panel display (FPD) devices are widely used as a display device of an electronic device because the FPD device is lightweight and thin compared to a cathode-ray tube (CRT) display device. Typical examples of the FPD devices are a liquid crystal display (LCD) device and an organic light emitting display (OLED) device.

Recently, a flexible OLED device has been developed that is capable of bending or folding a portion of a display device by including lower and upper substrates which have flexible materials. For example, the lower substrate included in the display panel may be formed of a flexible substrate, and the upper substrate included in the display panel may have a thin film encapsulation structure. In addition, the flexible display device may further include an upper structure that is located on an upper surface of the display panel and a lower protection film that is located on a lower surface of the display panel. Here, the lower protection film may include an adhesive layer and a protection film that protects the adhesive layer.

<CIT> discloses an organic light emitting diode display including a flexible organic light emitting display panel displaying an image, and a lower passivation film attached to a bottom of the organic light emitting panel and including a polymer resin and an antistatic agent.

<CIT> discloses an encapsulation barrier stack for flexible displays, the encapsulation barrier stack having anti-static properties.

The above information disclosed in this Background section is only for enhancement of understanding of the background of the inventive concepts, and, therefore, it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.

Applicants have discovered that when the lower protection film of a flexible OLED adheres to the lower surface of the display panel, it may adhere after the protection film has become detached from the adhesive layer. In this case, static electricity may be generated as the protective film is detached from the adhesive layer, and the flexible display device may be damaged by the static electricity. Additionally, the presence of non-uniform static electric may cause a displayed image to be non-uniform.

One or more exemplary embodiments of the invention provide an organic light emitting display device having an adhesive layer that includes an antistatic material having a surface resistance that enables static electric charges to achieve a uniform distribution in the adhesive layer and/or migrate to a grounded process device. Accordingly, the performance of the device may be improved by reducing or eliminating some or all of the problems caused by static electricity. Further, a weight ratio of the antistatic material with respect to the total weight of the adhesive layer may be in a range that enables some or all of problems caused by the static electricity to be overcome without adding much weight to the device.

Additional aspects or benefits will be set forth in the detailed description which follows, and, in part, will be apparent from the disclosure, or may be learned by practice of the inventive concepts.

According to an aspect of the invention, there is provided an organic light emitting display (OLED) device as set out in claim <NUM>. Preferred features are set out in claims <NUM> to <NUM>.

The foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the claimed subject matter.

The accompanying drawings, which are included to provide a further understanding of the inventive concepts, and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the inventive concepts, and, together with the description, serve to explain principles of the inventive concepts.

In the following description, for the purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of various exemplary embodiments.

In the accompanying figures, the size and relative sizes of layers, films, panels, regions, etc., may be exaggerated for clarity and descriptive purposes.

When an element or layer is referred to as being "on," "connected to," or "coupled to" another element or layer, it may be directly on, connected to, or coupled to the other element or layer or intervening elements or layers may be present.

Although the terms first, second, etc. may be used herein to describe various elements, components, regions, layers, and/or sections, these elements, components, regions, layers, and/or sections should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, and/or section from another element, component, region, layer, and/or section. Thus, a first element, component, region, layer, and/or section discussed below could be termed a second element, component, region, layer, and/or section without departing from the teachings of the disclosure.

Spatially relative terms, such as "beneath," "below," "lower," "above," "upper," and the like, may be used herein for descriptive purposes, and, thereby, to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the drawings.

Various exemplary embodiments are described herein with reference to sectional illustrations that are schematic illustrations of idealized exemplary embodiments and/or intermediate structures. Thus, exemplary embodiments disclosed herein should not be construed as limited to the particular illustrated shapes of regions, but are to include deviations in shapes that result from, for instance, manufacturing. For example, an implanted region illustrated as a rectangle will, typically, have rounded or curved features and/or a gradient of implant concentration at its edges rather than a binary change from implanted to non-implanted region. Likewise, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation takes place. Thus, the regions illustrated in the drawings are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to be limiting.

Terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense, unless expressly so defined herein.

Hereinafter, embodiments constructed according to the principles of the invention will be explained in detail with reference to the accompanying drawings.

Referring to <FIG>, <FIG>, and <FIG>, an OLED device <NUM> may include a display panel, an upper structure, a lower protection film, etc., as will be described in greater detail below.

The display panel may have a display region <NUM> and a pad region <NUM>. A plurality of pixels P may be disposed in the display region <NUM>, and the pad region <NUM> may be located in a first side of the display region <NUM>. A width of the pad region <NUM> may be less than a width of the display region <NUM>, and pad electrodes <NUM> that are electrically connected to an external device <NUM> may be disposed in the pad region <NUM>. The display region <NUM> may have a first width W1 extending in a first direction D1 that is parallel to an upper surface of the OLED device <NUM> when viewed in a plan view of the OLED device <NUM>. In addition, the pad region <NUM> may have a second width W2 extending in the first direction D1 when viewed in a plan view of the OLED device <NUM>, and the second width W2 may be less than the first width W1.

The display region <NUM> may include a light emitting region <NUM> where a light is emitted and a peripheral region <NUM> that surrounds the light emitting region <NUM>. The pixels P emitting a light may be disposed in the light emitting region <NUM>, and a plurality of wirings may be disposed in the peripheral region <NUM>. The wirings may be electrically connected to the pad electrodes <NUM> and the pixels P. For example, the wirings may include data signal wirings, scan signal wirings, light emission signal wirings, power supply voltage wirings, and so on. In addition, a scan driver, a data driver, and other components may be disposed in the peripheral region <NUM>.

The width of the peripheral region <NUM> surrounding the light emitting region <NUM> of <FIG> may be the same on each side of the light emitting region <NUM>; or, the width of the peripheral region <NUM> may be different on different sides of the light emitting region. For example, the peripheral region <NUM> may include a first region extending in the first direction D1 and a second region extending in a second direction D2 that is perpendicular to the first direction D1. In other words, the first region of the peripheral region <NUM> may be located adjacent to the top of the display panel <NUM> and a bending region <NUM>, and the second region of the peripheral region <NUM> may be located in both lateral portions of the display panel <NUM>. Here, a width extending in the first direction D1 of the second region may be relatively less than a width extending in the second direction D2 of the first region.

The pad region <NUM> may include a bending region <NUM> located in a portion of the pad region <NUM> that is adjacent to the display region <NUM> and a pad electrode region <NUM> located in a remaining portion of the pad region <NUM>. For example, the bending region <NUM> may be interposed between the display region <NUM> and the pad electrode region <NUM>, and the pad electrodes <NUM> may be disposed in the pad electrode region <NUM>. As the bending region <NUM> is bent, the pad electrode region <NUM> may be located on a lower surface of the OLED device <NUM>. As described in further detail below, the OLED device <NUM> may further include a bending protection layer and connection electrodes. The bending protection layer may be disposed in a portion of the display region <NUM>, the bending region <NUM>, and a portion of the pad electrode region <NUM> on the display panel as will be described in greater detail below. The connection electrodes may be disposed between the bending protection layer and the display panel, and may be electrically connected to the wirings and the pad electrodes <NUM>. As illustrated in <FIG>, the pixels P disposed in the light emitting region <NUM> and an external device <NUM> that is electrically connected to the pad electrodes <NUM> may be electrically connected through the connection electrodes disposed in the bending region <NUM> and the wirings disposed in the peripheral region <NUM>. For example, the external device <NUM> and the OLED device <NUM> may be electrically connected through a flexible printed circuit board (FPCB). The external device <NUM> may provide a data signal, a scan signal, a light emission signal, a power supply voltage, and so on, to the OLED device <NUM>. In addition, a driving integrated circuit may be mounted (e.g., installed) in the FPCB. In some example embodiments, the driving integrated circuit may be mounted in the display panel <NUM> that is located adjacent to the pad electrodes <NUM>.

The upper structure may be disposed in the display region <NUM> on the display panel. As will be described in greater detail below, the upper structure may include a touch screen electrode layer, a polarizing layer, and so on. In example embodiments, the touch screen electrode layer may be disposed on the display panel, and the polarizing layer may be disposed on the touch screen electrode layer.

As described below, the lower protection film may be disposed on a lower surface of the display panel, and may include an adhesive layer and a protection layer. The adhesive layer may be in direct contact with a lower surface of the display panel, and may include an antistatic material. In addition, the protection layer may be disposed under the adhesive layer.

Because the OLED device <NUM> includes an adhesive layer having antistatic material, the OLED device <NUM> may protect the display panel from a static electricity.

Referring to <FIG>, <FIG>, and <FIG>, an upper structure <NUM> may be disposed in a display region <NUM> on a display panel <NUM> included in an OLED device <NUM>, and a first lower protection film pattern <NUM> included in a lower protection film may be disposed on a lower surface of the display panel <NUM>. The upper structure <NUM> may include a touch screen electrode layer <NUM> and a polarizing layer <NUM>. In addition, the first lower protection film pattern <NUM> may include a first protection layer <NUM> and a first adhesive layer <NUM>. The touch screen electrode layer <NUM> may be disposed on the display panel <NUM>, and the polarizing layer <NUM> may be disposed on the touch screen electrode layer <NUM>. In addition, the first adhesive layer <NUM> may be disposed on a lower surface of the display panel <NUM>, and the first protection layer <NUM> may be disposed under the first adhesive layer <NUM>. <FIG> shows an arrangement not falling under the scope of the claims.

As illustrated in <FIG>, the display panel <NUM> may have the display region <NUM>, and the display region <NUM> may include a light emitting region <NUM> and a peripheral region <NUM>. The display region <NUM> may include a first sub-display region <NUM>, a second sub-display region <NUM>, a third sub-display region <NUM>, a fourth sub-display region <NUM>, and a fifth sub-display region <NUM>. For example, the first sub-display region <NUM>, the second sub-display region <NUM>, and the third sub-display region <NUM> may be included in the light emitting region <NUM>, and the fourth sub-display region <NUM> and the fifth sub-display region <NUM> may be included in the peripheral region <NUM>. The first sub-display region <NUM> may be located in the center of the display region <NUM>, and the second sub-display region <NUM> and the third sub-display region <NUM> may be located in lateral portions of the first sub-display region <NUM>. Each of the second sub-display region <NUM> and the third sub-display region <NUM> may have a shape that is bent on an axis with respect to a second direction D2 which may be perpendicular to a first direction D1. The fourth sub-display region <NUM> may be located adjacent to the second sub-display region <NUM>, and may extend in a third direction D3 that may be vertical to the first and second directions D1 and D2. The fifth sub-display region <NUM> may be located adjacent to the third sub-display region <NUM>, and may extend in the third direction D3. In example embodiments, the second and fourth sub-display regions <NUM> and <NUM> and the third and fifth sub-display regions <NUM> and <NUM> may be symmetrical to each other with respect to the first sub-display region <NUM>. The first lower protection film pattern <NUM> may be partially or entirely disposed on a lower surface of the display panel <NUM> that may be located in the first, second, third, fourth, and fifth sub-display regions <NUM>, <NUM>, <NUM>, <NUM>, and <NUM>.

Referring to <FIG>, <FIG>, variously shaped patterns may be formed by removing at least a portion of a lower protection film <NUM> in a portion where the display region <NUM> is bent. These patterns may be formed by alternating convex projections separated by concave spaces between the convex projections, but other shape projections may also be employed. In other words, the lower protection film <NUM> may have the variously shaped patterns defined therein. For example, as illustrated in <FIG> and <FIG>, the patterns may be formed by removing a portion of the first protection layer <NUM>. Alternatively, as illustrated in <FIG> and <FIG>, the patterns may be formed by partially or completely removing the first protection layer <NUM> and the first adhesive layer <NUM> such that the display panel <NUM> is exposed in a particular location where the display region <NUM> is bent. Examples of the shape of the patterns as depicted in <FIG>, and <FIG> include a trapezoidal shape and a tetragonal shape. It should be apparent that the shapes formed by the removal of the portion of the lower protection film <NUM> may be different in other embodiments. Thus, in other embodiments, the shape of the patterns may vary from the shapes depicted in <FIG>, <FIG>.

Referring to <FIG>, <FIG>, and <FIG>, the OLED device <NUM> includes a display panel <NUM>, a lower protection film <NUM>, an upper structure <NUM>, a bending protection layer <NUM>, a pad electrode <NUM>, and so on. Here, the lower protection film <NUM> includes a first lower protection film pattern <NUM> and a second lower protection film pattern <NUM>. In addition, the first lower protection film pattern <NUM> includes a first protection layer <NUM> and a first adhesive layer <NUM>; and, the second lower protection film pattern <NUM> includes a second protection layer <NUM> and a second adhesive layer <NUM>. Further, the upper structure <NUM> may include a polarizing layer <NUM> and a touch screen electrode layer <NUM>.

As described above, the display panel <NUM> has a display region <NUM> and a pad region <NUM>. The display region <NUM> includes a light emitting region <NUM> and a peripheral region <NUM>; and, the pad region <NUM> includes a bending region <NUM> and a pad electrode region <NUM>.

Pixels P where a light is emitted are disposed in the light emitting region <NUM>; and, a plurality of wirings may be disposed in the peripheral region <NUM>. The wirings may be electrically connected to the pad electrode <NUM> and the pixels P.

The bending region <NUM> of the pad region <NUM> is interposed between the pad electrode region <NUM> and the peripheral region <NUM> of the display region <NUM>, and the pad electrode <NUM> may be disposed in the pad electrode region <NUM>.

Referring to <FIG>, as the bending region <NUM> is bent, the pad electrode region <NUM> may be located on a lower portion of the OLED device <NUM>. For example, the bending region <NUM> may be bent on an axis with respect to a first direction D1; and, the second lower protection film pattern <NUM> may be disposed on a lower surface of the first lower protection film pattern <NUM>. In addition, a bending radius of the bending region <NUM> may be less than a bending radius of a portion having a shape where the display region <NUM> is bent. That is, the portion where the display region <NUM> is bent has a gradual slope whereas the bending region <NUM> may have a relatively steep slope. Alternatively, after the bending region <NUM> is bent, an adhesive tape may be interposed between the second lower protection film pattern <NUM> and the first lower protection film pattern <NUM>. In this case, the second lower protection film pattern <NUM> and the first lower protection film pattern <NUM> may be fixed by the adhesive tape. A thickness of the adhesive tape may be identical to or greater than a thickness of the lower protection film <NUM>. In addition, the adhesive tape may absorb shock. For example, the adhesive tape may include urethane, rubber, and/or the like.

Referring again to <FIG> and <FIG>, the upper structure <NUM> may be disposed in the display region <NUM> on the display panel <NUM>. The touch screen electrode layer <NUM> may be disposed on the display panel <NUM>; and, the polarizing layer <NUM> may be disposed on the touch screen electrode layer <NUM>.

The lower protection film <NUM> is disposed on a lower surface of the display panel <NUM>. The lower protection film <NUM> includes the first lower protection film pattern <NUM> that is disposed in the display region <NUM> and the second lower protection film pattern <NUM> that is disposed in the pad electrode region <NUM> such that a lower surface of the display panel <NUM> located in the bending region <NUM> is exposed. In other words, the lower protection film <NUM> has an opening exposing a lower surface of the display panel <NUM> in the bending region <NUM>. In addition, the first adhesive layer <NUM> and the second adhesive layer <NUM> are in direct contact with a lower surface of the display panel <NUM>, and may include antistatic materials. Further, each of the first protection layer <NUM> and the second protection layer <NUM> is disposed under the first adhesive layer <NUM> and the second adhesive layer <NUM>, respectively.

The bending protection layer <NUM> may be disposed in a portion of the display region <NUM>, the bending region <NUM>, and a portion of the pad electrode region <NUM> on the display panel <NUM>. Connection electrodes may be disposed between the bending protection layer <NUM> and the display panel <NUM>. The connection electrodes may be electrically connected to the wirings disposed in the peripheral region <NUM> and the pad electrode <NUM>. Pixels P disposed in the light emitting region <NUM> and an external device <NUM> that is electrically connected to the pad electrode <NUM> may be electrically connected through the connection electrodes disposed in the bending region <NUM> and through the wirings disposed in the peripheral region <NUM>. A thickness of the bending protection layer <NUM> may be determined such that a neutral plane in the bending region <NUM> is located within a portion where the connection electrodes are disposed. For example, when the bending region <NUM> is bent, the connection electrodes might not be broken (or, cut) because the neutral plane of the bending region <NUM> may be located within the portion where the connection electrodes are disposed.

The pad electrode <NUM> may be disposed in the pad electrode region <NUM> on the display panel <NUM>. The pad electrode <NUM> may be electrically connected to the external device <NUM>, and may provide a data signal, a scan signal, a light emission signal, a power supply voltage, and so on, which may be applied from the external device <NUM>, to the pixels P.

The upper structure <NUM> may include the touch screen electrode layer <NUM> and the polarizing layer <NUM>; and, in some embodiments, the upper structure <NUM> may further include a plurality of layers.

Referring to <FIG> and <FIG>, an OLED device <NUM> may include a display panel <NUM>, a lower protection film <NUM>, an upper structure <NUM>, a bending protection layer <NUM>, and so on. The display panel <NUM> may include a substrate <NUM>, a semiconductor element <NUM>, a planarization layer <NUM>, a pixel defining layer <NUM>, a lower electrode <NUM>, a light emitting layer <NUM>, an upper electrode <NUM>, and a thin film encapsulation (TFE) structure <NUM>. In addition, the upper structure <NUM> may include a touch screen electrode layer <NUM> and a polarizing layer <NUM>. Further, the semiconductor element <NUM> may include an active layer <NUM>, a gate insulation layer <NUM>, a gate electrode <NUM>, an insulating interlayer <NUM>, a source electrode <NUM>, and a drain electrode <NUM>; and, the TFE structure <NUM> may include first TFE layer <NUM>, a second TFE layer <NUM>, and a third TFE layer <NUM>.

When the OLED device <NUM> includes the flexible substrate <NUM> and the TFE structure <NUM>, the OLED device <NUM> may serve as a flexible display device.

The substrate <NUM> may be provided. The substrate <NUM> may include transparent materials or opaque materials. The substrate <NUM> may be formed of a flexible transparent material such as a flexible transparent resin substrate (e.g., a polyimide substrate). For example, the polyimide substrate may include a first polyimide layer, a first barrier film layer, a second polyimide layer, a second barrier film layer, and so on. Because the polyimide substrate is relatively thin and flexible, the polyimide substrate may be disposed on a rigid glass substrate to help support the formation of the semiconductor element <NUM> and the light emitting structure (e.g., the lower electrode <NUM>, the light emitting layer <NUM>, the upper electrode <NUM>, and so on). That is, the substrate <NUM> may have a structure in which the first polyimide layer, the first barrier film layer, the second polyimide layer, and the second barrier film layer are stacked on the rigid glass substrate. In manufacturing the OLED device <NUM>, after an insulating layer (e.g., a buffer layer) is provided on the second barrier layer of the polyimide substrate, the semiconductor element <NUM> and the light emitting structure may be disposed on the insulating layer. After the semiconductor element <NUM> and the light emitting structure are formed on the insulating layer, the rigid glass substrate on which the polyimide substrate is disposed may be removed. It may be difficult to directly form the semiconductor element <NUM> and the light emitting structure on the polyimide substrate when the polyimide substrate is relatively thin and flexible. Accordingly, the semiconductor element <NUM> and the light emitting structure may be formed on the polyimide substrate and the rigid glass substrate, and then the polyimide substrate may serve as the substrate <NUM> of the OLED device <NUM> after the removal of the rigid glass substrate. Alternatively, the substrate <NUM> may include a quartz substrate, a synthetic quartz substrate, a calcium fluoride substrate, a fluoride-doped quartz substrate, a sodalime glass substrate, a non-alkali glass substrate and so on.

A buffer layer may be disposed on the substrate <NUM>. The buffer layer may be disposed on a part of or the entire substrate <NUM>. The buffer layer may prevent the diffusion of metal atoms and/or impurities from the substrate <NUM> into the semiconductor element <NUM>. Additionally, the buffer layer may control a rate of heat transfer in a crystallization process for forming the active layer <NUM>, thereby obtaining a substantially uniform active layer <NUM>. Furthermore, the buffer layer may improve a surface flatness of the substrate <NUM> when a surface of the substrate <NUM> is relatively irregular. Depending on the form of the substrate <NUM>, at least two buffer layers may be provided on the substrate <NUM>, or, alternatively, the buffer layer might be omitted. The buffer layer may include silicon compound, metal oxide, and so on.

The semiconductor element <NUM> may be disposed on the substrate <NUM>. The active layer <NUM> may be disposed on the substrate <NUM>. The active layer <NUM> may include an oxide semiconductor, an inorganic semiconductor (e.g., amorphous silicon, polysilicon, and/or the like), an organic semiconductor, and so on.

The gate insulation layer <NUM> may be disposed on the active layer <NUM>. The gate insulation layer <NUM> may cover the active layer <NUM>, and may be disposed on the substrate <NUM>. For example, the gate insulation layer <NUM> may sufficiently cover the active layer <NUM> on the substrate110, and may have a substantially level surface without a step around the active layer <NUM>. Alternatively, the gate insulation layer <NUM> may cover the active layer <NUM>, and may be disposed as a substantially uniform thickness along a profile of the active layer <NUM>. The gate insulation layer <NUM> may include an opening that exposes an upper surface of the substrate110. The upper surface of the substrate <NUM> may be located in a portion of the peripheral region <NUM>, the bending region <NUM>, and a portion of the pad electrode region <NUM>. The gate insulation layer <NUM> may include silicon compound, metal oxide, and so on. For example, the gate insulation layer <NUM> may include silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy), silicon oxycarbide (SiOxCy), silicon carbon nitride (SiCxNy), aluminum oxide (AlOx), aluminum nitride (AlNx), tantalum oxide (TaOx), hafnium oxide (HfOx), zirconium oxide (ZrOx), titanium oxide (TiOx), and/or the like.

The gate electrode <NUM> may be disposed on a portion of the gate insulation layer <NUM> under which the active layer <NUM> may be located. The gate electrode <NUM> may include a metal, a metal alloy, metal nitride, conductive metal oxide, transparent conductive materials, and so on. For example, the gate electrode <NUM> may include gold (Au), an alloy of gold, silver (Ag), an alloy of silver, aluminum (Al), an alloy of aluminum, aluminum nitride (AlNx), tungsten (W), tungsten nitride (WNx), copper (Cu), an alloy of copper, nickel (Ni), chrome (Cr), chrome nitride (CrNx), molybdenum (Mo), an alloy of molybdenum, titanium (Ti), titanium nitride (TiNx), platinum (Pt), tantalum (Ta), tantalum nitride (TaNx), neodymium (Nd), scandium (Sc), strontium ruthenium oxide (SRO), zinc oxide (ZnOx), stannum oxide (SnOx), indium oxide (InOx), gallium oxide (GaOx), indium tin oxide (ITO), indium zinc oxide (IZO), and/or the like. These may be used alone or in a suitable combination thereof. The gate electrode <NUM> may have a multi-layered or single layered structure.

The insulating interlayer <NUM> may be disposed on the gate electrode <NUM>. The insulating interlayer <NUM> may cover the gate electrode <NUM>, and may be disposed on the gate insulation layer <NUM>. For example, the insulating interlayer <NUM> may sufficiently cover the gate electrode <NUM> on the gate insulation layer <NUM>, and may have a substantially level surface without a step around the gate electrode <NUM>. Alternatively, the insulating interlayer <NUM> may cover the gate electrode <NUM> on the gate insulation layer <NUM>, and may be disposed as a substantially uniform thickness along a profile of the gate electrode <NUM>. The insulating interlayer <NUM> may expose an upper surface of the substrate110; and, the upper surface of the substrate <NUM> may be located in a portion of the peripheral region <NUM>, the bending region <NUM>, and a portion of the pad electrode region <NUM>. In addition, a width, extending in the second direction D2, of an opening defined by the gate insulation layer <NUM> and the insulating interlayer <NUM> that expose an upper surface of the display panel <NUM> may be greater than a with extending the second direction D2 of an opening defined by the lower protection film <NUM> that exposes a lower surface of the display panel <NUM>. The insulating interlayer <NUM> may include a silicon compound, a metal oxide, and so on.

The source electrode <NUM> and the drain electrode <NUM> may be disposed on the insulating interlayer <NUM>. The source electrode <NUM> may be in direct contact with a first side of the active layer <NUM> via a contact hole formed by removing a portion of the gate insulation layer <NUM> and the insulating interlayer <NUM>. The drain electrode <NUM> may be in direct contact with a second side of the active layer <NUM> via a contact hole formed by removing another portion of the gate insulation layer <NUM> and the insulating interlayer <NUM>. The source electrode <NUM> and the drain electrode <NUM> may include a metal, an alloy, metal nitride, conductive metal oxide, transparent conductive materials, and/or the like. These may be used alone or in a suitable combination thereof. Each of the source and drain electrodes <NUM> and <NUM> may have a multi-layered structure. Accordingly, the semiconductor element <NUM> including the active layer <NUM>, the gate insulation layer <NUM>, the gate electrode <NUM>, the insulating interlayer <NUM>, the source electrode <NUM>, and the drain electrode <NUM> may be disposed.

The semiconductor element <NUM> may or might not have a top gate structure. Likewise, the semiconductor element <NUM> may or might not have a bottom gate structure.

As illustrated in <FIG>, a first conductive pattern <NUM> may be disposed in the peripheral region <NUM> on the gate insulation layer <NUM>. As described above, the first conductive pattern <NUM> may be one among a plurality of the wirings. For example, the first conductive pattern <NUM> may include a data signal wiring, a scan signal wiring, a light emission signal wiring, a power supply wiring, and so on.

A second conductive pattern <NUM> may be disposed in the pad electrode region <NUM> on the gate insulation layer <NUM>. The second conductive pattern <NUM> may be electrically connected to the pad electrode <NUM>.

A connection electrode <NUM> may be disposed in a portion of the peripheral region <NUM>, the bending region <NUM>, and the a portion of the pad electrode region <NUM> on the insulating interlayer <NUM> to overlap the first conductive pattern <NUM> and the second conductive pattern <NUM>. The connection electrode <NUM> may be in contact with the first conductive pattern <NUM> via a contact hole formed by removing a portion of the insulating interlayer <NUM> located in the peripheral region <NUM>, and may be in contact with the second conductive pattern <NUM> via a contact hole formed by removing a portion of the insulating interlayer <NUM> located in the pad electrode region <NUM>. The first conductive pattern <NUM>, the second conductive pattern <NUM>, and the gate electrode <NUM> may be simultaneously (i.e., concurrently) formed using the same material. In addition, the connection electrode <NUM>, the source electrode <NUM>, and the drain electrode <NUM> may be simultaneously formed using the same material.

Accordingly, an external device <NUM> and the OLED device <NUM> may be electrically connected through the pad electrode <NUM> and a FPCB, and the external device <NUM> may provide a data signal, a scan signal, a light emission signal, a power supply voltage, and so on, to the pixels through the second conductive pattern <NUM>, the connection electrode <NUM>, and the first conductive pattern <NUM>.

Referring again to <FIG> and <FIG>, the planarization layer <NUM> may be disposed on the connection electrode <NUM>, the source electrode <NUM>, and the drain electrode <NUM>. The planarization layer <NUM> may cover the connection electrode <NUM>, the source electrode <NUM>, and the drain electrode <NUM>, and may be disposed on a part of or the entire insulating interlayer <NUM>. The planarization layer <NUM> may be formed with a thickness sufficient to cover at least a portion of the connection electrode <NUM> and the source and drain electrodes <NUM> and <NUM>. The planarization layer <NUM> may have a substantially flat upper surface; and, a planarization process may be further performed on the planarization layer <NUM> to obtain the flat upper surface of the planarization layer <NUM>. Alternatively, the planarization layer <NUM> may cover the connection electrode <NUM> and the source and drain electrodes <NUM> and <NUM>, and may be disposed as a substantially uniform thickness along a profile of the connection electrode <NUM> and the source and drain electrodes <NUM> and <NUM>. The planarization layer <NUM> may include organic materials and/or inorganic materials. Thus, in some embodiments the planarization layer <NUM> may include only organic materials.

The lower electrode <NUM> may be disposed on the planarization layer <NUM>. The lower electrode <NUM> may be in contact with the drain electrode <NUM> via a contact hole formed by removing a portion of the planarization layer <NUM>. In addition, the lower electrode <NUM> may be electrically connected to the semiconductor element <NUM>. The lower electrode <NUM> may include a metal, a metal alloy, metal nitride, conductive metal oxide, transparent conductive materials, and so on. These may be used alone or in a suitable combination thereof. The lower electrode <NUM> may or might not have a multi-layered structure.

The pixel defining layer <NUM> may be disposed on the planarization layer <NUM> and may expose a portion of the lower electrode <NUM>. The light emitting layer <NUM> may be disposed on the portion of the lower electrode <NUM> exposed by the pixel defining layer <NUM>. The pixel defining layer <NUM> may expose the bending region <NUM> and the pad electrode region <NUM>. The pixel defining layer <NUM> may include organic materials and/or inorganic materials. Thus, in some embodiments, the pixel defining layer <NUM> may include only organic materials.

The light emitting layer <NUM> may be disposed in a portion where the portion of the lower electrode <NUM> is exposed. The light emitting layer <NUM> may be formed using at least one of certain light emitting materials capable of generating different colors of light (e.g., a red color of light, a blue color of light, a green color of light, and so on) according to subpixels. Alternatively, the light emitting layer <NUM> may generate a generally white color of light by stacking a plurality of light emitting materials capable of generating different colors of light such as a red color of light, a green color of light, a blue color of light, and so on. A color filter may be disposed on the light emitting layer <NUM>. The color filter may be selected from a red color filter, a green color filter, and a blue color filter. Alternatively, the color filter may include a yellow color filter, a cyan color filter, and a magenta color filter. The color filter may include a photosensitive resin (or color photoresist), and so on.

The upper electrode <NUM> may be disposed on the pixel defining layer <NUM> and the light emitting layer <NUM>. The upper electrode <NUM> may include a metal, a metal alloy, metal nitride, conductive metal oxide, transparent conductive materials, and so on.

The TFE structure <NUM> may be disposed on the upper electrode <NUM>. The TFE structure <NUM> may include the first TFE layer <NUM>, the second TFE layer <NUM>, and the third TFE layer <NUM>. The second TFE layer <NUM> may be disposed on the first TFE layer <NUM>; and, the third TFE layer <NUM> may be disposed on the second TFE layer <NUM>. The first TFE layer <NUM> may be disposed on the upper electrode <NUM>. The first TFE layer <NUM> may cover the upper electrode <NUM>, and may be disposed as a substantially uniform thickness along a profile of the upper electrode <NUM>. The first TFE layer <NUM> may prevent the light emitting structure from being deteriorated by the permeation thereto of moisture, water, oxygen, and so on. In addition, the first TFE layer <NUM> may protect the light emitting structure from damage caused by an external impact. The first TFE layer <NUM> may or might not include inorganic materials.

The second TFE layer <NUM> may be disposed on the first TFE layer <NUM>. The second TFE layer <NUM> may improve the flatness of the OLED device <NUM> and may protect the light emitting structure. The second TFE layer <NUM> may or might not include organic materials.

The third TFE layer <NUM> may be disposed on the second TFE layer <NUM>. The third TFE layer <NUM> may cover the second TFE layer <NUM> and may be disposed as a substantially uniform thickness along a profile of the second TFE layer <NUM>. The third TFE layer <NUM> together with the first TFE layer <NUM> and the second TFE layer <NUM> may prevent the light emitting structure from being deteriorated by the permeation thereto of moisture, water, oxygen, and so on. In addition, the third TFE layer <NUM> together with the first TFE layer <NUM> and the second TFE layer <NUM> may protect the light emitting structure from damage caused by an external impact. The third TFE layer <NUM> may or might not include inorganic materials. Accordingly, the TFE structure <NUM> including the first TFE layer <NUM>, the second TFE layer <NUM>, and the third TFE layer <NUM> may be disposed. In addition, the display panel <NUM> including the substrate110, the semiconductor element <NUM>, the planarization layer <NUM>, the lower electrode <NUM>, the pixel defining layer <NUM>, the light emitting layer <NUM>, the upper electrode <NUM>, and the TFE structure <NUM> may be disposed.

Alternatively, the TFE structure <NUM> may have a five layer structure where the first to fifth TFE layers may be stacked, or a seven layer structure where the first to seventh TFE layers may be stacked.

The touch screen electrode layer <NUM> may be disposed on the TFE structure <NUM> (or the display panel <NUM>). The touch screen electrode layer <NUM> may include a bottom polyethylene terephthalate (PET) film, touch screen electrodes, and a top PET film, and so on. The bottom PET film and/or the top PET film may protect the touch screen electrodes. For example, the top PET film and the bottom PET film may include polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polypropylene (PP), polycarbonate (PC), polystyrene (PS), polysulfone (PSul), polyethyene (PE), polyphthalamide (PPA), polyethersulfone (PES), polyarylate (PAR), polycarbonate oxide (PCO), modified polyphenylene oxide (MPPO), and so on. The touch screen electrodes may have a substantially metal mesh structure. For example, the touch screen electrodes may include carbon nanotube (CNT), transparent conductive oxide (TCO), indium tin oxide (ITO), indium gallium zinc oxide (IGZO), zinc oxide (ZnO), graphene, silver nanowire (AgNW), copper (Cu), chrome (Cr), and so on. Alternatively, the touch screen electrodes may be disposed directly on the TFE structure <NUM>. The bottom PET film may or might not be disposed on the TFE structure <NUM>.

The polarizing layer <NUM> may be disposed on the touch screen electrode layer <NUM>. The polarizing layer <NUM> may include a linearly polarized film and a λ/<NUM> phase retardation film. Here, the λ/<NUM> phase retardation film may be disposed on the touch screen electrode layer <NUM>. The λ/<NUM> phase retardation film may convert a phase of the light. For example, the λ/<NUM> phase retardation film may convert the light vibrating up and down or the light vibrating left and right into right-circularly polarized light or left-circularly polarized light, respectively. In addition, the λ/<NUM> phase retardation film may convert the right-circularly polarized light or the left-circularly polarized light into the light vibrating up and down or the light vibrating left and right, respectively. The λ/<NUM> phase retardation film may include a birefringent film containing polymer, an orientation film of a liquid crystal polymer, an alignment layer of a liquid crystal polymer, and so on.

The linearly polarized film may be disposed on the λ/<NUM> phase retardation film. The linearly polarized film may selectively transmit the incident light. For example, the linearly polarized film may transmit the light vibrating up and down or vibrating left and right. The linearly polarized film may include a pattern of horizontal stripes or vertical stripes. When the linearly polarized film includes a pattern of horizontal stripes, the linearly polarized film may block the light vibrating up and down, and may transmit the light vibrating left and right. When the linearly polarized film includes a pattern of vertical stripes, the linearly polarized film may block the light vibrating left and right, and may transmit the light vibrating up and down.

The light transmitted from the linearly polarized film may also be transmitted from the λ/<NUM> phase retardation film. As described above, the λ/<NUM> phase retardation film may convert a phase of the light. For example, when the incident light vibrating up, down, left, and right passes through the linearly polarized film, the linearly polarized film including a pattern of the horizontal stripes may transmit the light vibrating left and right. When the incident light vibrating left and right passes through the λ/<NUM> phase retardation film, the incident light vibrating left and right may be converted into the left-circularly polarized light. The incident light including the left-circularly polarized light may be reflected at the cathode electrode (e.g., the upper electrode <NUM>) of the display panel <NUM>, and then the incident light may be converted into the right-circularly polarized light. When the incident light including the right-circularly polarized light passes through the λ/<NUM> phase retardation film, the incident light may be converted into the light vibrating up and down. Here, the light vibrating up and down may be blocked by the linearly polarized film including the pattern of horizontal stripes. Accordingly, the incident light may or might not be entirely removed by the linearly polarized film and the λ/<NUM> phase retardation film (i.e., the polarizing layer <NUM>). The linearly polarized film may include iodine-based materials, materials containing dye, polyene-based materials, and so on. Accordingly, the upper structure <NUM> including the touch screen electrode layer <NUM> and the polarizing layer <NUM> may be disposed.

As illustrated in <FIG>, the bending protection layer <NUM> may be disposed in the peripheral region <NUM>, the bending region <NUM>, and a portion of the pad electrode region <NUM> on the planarization layer <NUM>. The bending protection layer <NUM> may protect the connection electrode <NUM>, and may raise a neutral plane of the bending region <NUM> in a direction which may be opposite to the third direction D3. For example, when the bending region <NUM> is bent, the connection electrodes might not be broken because the neutral plane of the bending region <NUM> may be located within a portion where the connection electrodes are disposed. The bending protection layer <NUM> may or might not include organic materials.

Referring again to <FIG> and <FIG>, the lower protection film <NUM> may be disposed in a lower surface of the substrate <NUM>. The lower protection film <NUM> may protect the display panel <NUM> from damage caused by an external impact.

The lower protection film <NUM> may include the first lower protection film pattern <NUM> and the second lower protection film pattern <NUM>. The first lower protection film pattern <NUM> may be partially or entirely disposed in the display region <NUM>, and the second lower protection film pattern <NUM> may be disposed only in the pad electrode region <NUM> such that a lower surface of the display panel <NUM> located in the bending region <NUM> may be exposed. In other words, the lower protection film <NUM> may expose a lower surface of the display panel <NUM> in the bending region <NUM>, and the first lower protection film pattern <NUM> may be spaced apart from the second lower protection film pattern <NUM>. The spaced apart portion may be an opening defined by the lower protection film <NUM>, and a width extending in the second direction D2 of the opening defined by the lower protection film <NUM> may be less than a width extending in the second direction D2 of an opening defined by the gate insulation layer <NUM> and the insulating interlayer <NUM> that expose an upper surface of the display panel <NUM>. The first adhesive layer <NUM> and the second adhesive layer <NUM> may be in direct contact with a lower surface of the display panel <NUM>. For example, the first and second adhesive layers <NUM> and <NUM> may include optical clear adhesives (OCA), pressure sensitive adhesives (PSA), and so on, including acryl-based adhesives, silicon-based adhesives, urethane-based adhesives, rubber-based adhesives, vinyl ether-based adhesives, and the like. In addition, an antistatic material may be added in the OCA or the PSA. Further, each of the first protection layer <NUM> and the first adhesive layer <NUM> may be disposed under the first adhesive layer <NUM> and the second adhesive layer <NUM>, respectively. For example, each of the first protection layer <NUM> and the second protection layer <NUM> may include PET, PEN, PP, PC, PS, PSul, PE, PPA, PES, PAR, PCO, MPPO, and so on.

In a process where the lower protection film <NUM> is attached to a lower surface of the display panel <NUM>, a release film may be disposed on the lower protection film <NUM> to protect the first adhesive layer <NUM> and the second adhesive layer <NUM>. Static electricity may be non-uniformly distributed in the first adhesive layer <NUM> and the second adhesive layer <NUM> by a process where the release film is detached from the lower protection film <NUM>. In other words, electric charges located in the release film may migrate to the first adhesive layer <NUM> and the second adhesive layer <NUM> when the release film is detached from the lower protection film <NUM>; and, a relatively large amount of electric charges may be distributed at a portion (e.g., a distal end portion of the lower protection film <NUM>) where the release film is finally (or lastly) detached from the lower protection film <NUM>. An image displayed by the OLED device <NUM> may be degraded by the non-uniform distribution of the electric charges. In particular, a luminance of light emitted from the display panel <NUM> may be undesirably high in a portion having the non-uniform distribution of the electric charges.

When the first adhesive layer <NUM> and the second adhesive layer <NUM> include the antistatic material, a surface resistance of the first and second adhesive layers <NUM> and <NUM> may be decreased. For example, when the first and second adhesive layers <NUM> and <NUM> do not include the antistatic material, the surface resistance of the first and second adhesive layers <NUM> and <NUM> may be greater than about <NUM>×<NUM><NUM> ohm/sq. In contrast, when the first and second adhesive layers <NUM> and <NUM> include the antistatic material, a surface resistance of the first and second adhesive layers <NUM> and <NUM> may be less than about <NUM>×<NUM><NUM> ohm/sq. A weight ratio of the antistatic material based on a total weight of the first and second adhesive layers <NUM> and <NUM> may be in a range between about 1wt% and about 3wt% (of the total weight). Thus, the electric charges may achieve a uniform distribution in the first and second adhesive layers <NUM> and <NUM> having a low surface resistance and/or may migrate to a grounded process device. Accordingly, the performance of the OLED device <NUM> may be improved by reducing or eliminating the problems associated with the presence of static electricity as described in greater detail elsewhere herein.

The thickness of the lower protection film <NUM> may be in a range between about <NUM> and about <NUM> micrometers. The thickness of each of the first and second protection layers <NUM> and <NUM> may be in a range between about <NUM> and about <NUM> micrometers; and, the thickness of the first and second adhesive layers <NUM> and <NUM> may be in a range between about <NUM> and about <NUM> micrometers. As illustrated in <FIG> and <FIG>, the display region <NUM> may include the second sub-display region <NUM> and the third sub-display region <NUM> that have a shape which is bent on an axis with respect to the second direction D2. A neutral plane of the lower protection film <NUM>, the display panel <NUM>, and the upper structure <NUM> in the second and third sub-display regions <NUM> and <NUM> may be located within the display panel <NUM>. That is, the thickness of the lower protection film <NUM> may be determined such that the neutral plane in the second and third sub-display regions <NUM> and <NUM> is located within the display panel <NUM>. For example, when the second and third sub-display regions <NUM> and <NUM> are bent, the display panel <NUM> might not be damaged because the neutral plane of the second and third sub-display regions <NUM> and <NUM> is located within the display panel <NUM>.

The antistatic material included in the first and second adhesive layers <NUM> and <NUM> may include carbon nanotube, graphene, metal oxide, conductive polymer, and similar materials. The metal oxide may include zinc oxide (ZnO), antimony tin oxide (ATO), indium tin oxide (ITO), and the like. In addition, the conductive polymer may include polyfluorene, polyphenylene, polypyrene, polyazulene, polynaphthalene, polyacetylene (PAC), poly-p-phenylene vinyl (PPV), polypyrrole (PPY), polycarbazole, polyindole, polyzepine, poly (thienylene vinylene), polythiophene, Polyaniline (PANI), poly (thiophene), poly (p-phenylene sulfide), poly (<NUM>,<NUM>-ethylenedioxythiophene) (<NUM>,<NUM>-ethylenedioxythiophene) (PEDOT), poly (<NUM>,<NUM>-ethylenedioxythiophene) (PEDOT: PSS) doped with poly (styrenesulfonate) - tetramethacrylate (PEDOT-TMA), polyfuran, and similar materials. These materials may be used alone or in a suitable combination thereof.

As will be described in greater detail below, the OLED device <NUM> includes the first and second adhesive layers <NUM> and <NUM>, including an antistatic material; and, the OLED device <NUM> may be protected from static electricity generated due to a detachment of a release film from the lower protection film <NUM>. In addition, as the thickness of the lower protection film <NUM> is known, the neutral plane of the display panel <NUM> and the upper structure <NUM> in the second and third sub-display regions <NUM> and <NUM> of the display panel <NUM> having a bent shape may be located within the display panel <NUM>. Accordingly, although a portion of the display region <NUM> may be bent, the display panel <NUM> might not be damaged due to the inclusion of the neutral plane within the display panel <NUM>.

Referring to exemplary method stages shown in <FIG>, <FIG>, and <FIG>, a display panel <NUM>, a lower film <NUM> disposed on a lower surface of the display panel <NUM>, a touch screen electrode layer <NUM> disposed in a light emitting region <NUM> on the display panel <NUM>, and an upper film <NUM> disposed on the display panel <NUM> may be provided. For example, when a mother substrate including a plurality of display panels is cut by a cell cutting process, the upper film <NUM> may be disposed to protect an upper surface of the display panels and the lower film <NUM> may be disposed to protect a lower surface of the mother substrate. <FIG> illustrates a preliminary OLED device <NUM> after the cell cutting and pad cutting.

As illustrated in <FIG> and <FIG>, a substrate <NUM> including transparent materials may be located on the lower film <NUM>. The substrate <NUM> may be formed using a flexible transparent material such as a flexible transparent resin substrate (e.g., a polyimide substrate).

A buffer layer may be formed on the substrate <NUM>. The buffer layer may be formed on a part of or the entire substrate <NUM>. The buffer layer may prevent the diffusion of metal atoms and/or impurities from the substrate <NUM> into the semiconductor element <NUM>. Additionally, the buffer layer may control a rate of a heat transfer in a crystallization process for forming the active layer <NUM>, thereby obtaining a substantially uniform active layer <NUM>. Furthermore, the buffer layer may improve a surface flatness of the substrate <NUM> when a surface of the substrate <NUM> is relatively irregular. The buffer layer may be formed using a silicon compound, a metal oxide, and similar materials.

An active layer <NUM> may be formed on the substrateno, and the active layer <NUM> may be formed using an oxide semiconductor, an inorganic semiconductor, an organic semiconductor, and similar materials.

A gate insulation layer <NUM> may be formed on the active layer <NUM>. The gate insulation layer <NUM> may cover the active layer <NUM>, and may be formed on the substrate <NUM>. In addition, the gate insulation layer <NUM> may include an opening that exposes an upper surface of the substrate110 in a bending region <NUM>. The gate insulation layer <NUM> may be formed using silicon compound, metal oxide, and similar materials.

A gate electrode <NUM> may be formed on a portion of the gate insulation layer <NUM> under which the active layer <NUM> may be located. The gate electrode <NUM> may be formed using a metal, a metal alloy, metal nitride, a conductive metal oxide, transparent conductive materials, and similar materials.

A first conductive pattern <NUM> may be formed in a peripheral region <NUM> on the gate insulation layer <NUM>. The first conductive pattern <NUM> may include a data signal wiring, a scan signal wiring, a light emission signal wiring, a power supply wiring, and other components. A second conductive pattern <NUM> may be formed in the pad electrode region <NUM> on the gate insulation layer <NUM>. The second conductive pattern <NUM> may be electrically connected to a pad electrode <NUM>. The first conductive pattern <NUM>, the second conductive pattern <NUM>, and the gate electrode <NUM> may be simultaneously formed using the same material.

An insulating interlayer <NUM> may be formed on the gate electrode <NUM>, the first conductive pattern <NUM> and the second conductive pattern <NUM>. The insulating interlayer <NUM> may cover the gate electrode <NUM>, the first conductive pattern <NUM> and the second conductive pattern <NUM>, and may be formed on the gate insulation layer <NUM>. In addition, the insulating interlayer <NUM> may include an opening that exposes an upper surface of the substrate110 in the bending region <NUM>. The insulating interlayer <NUM> may be formed using a silicon compound, a metal oxide, and similar materials.

A source electrode <NUM> and a drain electrode <NUM> may be formed on the insulating interlayer <NUM>. The source electrode <NUM> may be in direct contact with a first side of the active layer <NUM> via a contact hole formed by removing a portion of the gate insulation layer <NUM> and the insulating interlayer <NUM>. The drain electrode <NUM> may be in direct contact with a second side of the active layer <NUM> via a contact hole formed by removing another portion of the gate insulation layer <NUM> and the insulating interlayer <NUM>. The source electrode <NUM> and the drain electrode <NUM> may be formed using a metal, an alloy, a metal nitride, a conductive metal oxide, transparent conductive materials, and similar materials. These may be used alone or in a suitable combination thereof. Each of the source and drain electrodes <NUM> and <NUM> may or might not have a multi-layered structure. Accordingly, a semiconductor element <NUM> including the active layer <NUM>, the gate insulation layer <NUM>, the gate electrode <NUM>, the insulating interlayer <NUM>, the source electrode <NUM>, and the drain electrode <NUM> may be formed.

A connection electrode <NUM> may be formed in a portion of the peripheral region <NUM>, the bending region <NUM>, and the a portion of the pad electrode region <NUM> on the insulating interlayer <NUM> to overlap the first conductive pattern <NUM> and the second conductive pattern <NUM>. The connection electrode <NUM> may be in contact with the first conductive pattern <NUM> via a contact hole formed by removing a portion of the insulating interlayer <NUM> located in the peripheral region <NUM>, and may be in contact with the second conductive pattern <NUM> via a contact hole formed by removing a portion of the insulating interlayer <NUM> located in the pad electrode region <NUM>. The connection electrode <NUM>, the source electrode <NUM>, and the drain electrode <NUM> may be simultaneously formed using the same material.

A planarization layer <NUM> may be formed on the connection electrode <NUM>, the source electrode <NUM>, and the drain electrode <NUM>. The planarization layer <NUM> may cover the connection electrode <NUM>, the source electrode <NUM>, and the drain electrode <NUM>, and may be formed on a part of or the entire insulating interlayer <NUM>. The planarization layer <NUM> may be formed with a thickness sufficient to cover the connection electrode <NUM> and the source and drain electrodes <NUM> and <NUM>. The planarization layer <NUM> may have a substantially flat upper surface; and, a planarization process may be further performed on the planarization layer <NUM> to obtain a flat upper surface of the planarization layer <NUM>. The planarization layer <NUM> may or might not be formed using organic materials.

A lower electrode <NUM> may be formed on the planarization layer <NUM>. The lower electrode <NUM> may be in contact with the drain electrode <NUM> via a contact hole formed by removing a portion of the planarization layer <NUM>. The lower electrode <NUM> may be formed using a metal, a metal alloy, a metal nitride, a conductive metal oxide, transparent conductive materials, and similar materials. These may be used alone or in a suitable combination thereof. The lower electrode <NUM> may or might not have a multi-layered structure.

A pixel defining layer <NUM> may be formed on the planarization layer <NUM>, and may expose a portion of the lower electrode <NUM>. The pixel defining layer <NUM> may expose the bending region <NUM> and the pad electrode region <NUM>. The pixel defining layer <NUM> may or might not be formed using organic materials.

A light emitting layer <NUM> may be formed in an area corresponding to where the portion of the lower electrode <NUM> may be exposed. The light emitting layer <NUM> may be formed using at least one of light emitting materials capable of generating different colors of light (e.g., a red color, a blue color, and a green color, and so on) according to subpixels. Alternatively, the light emitting layer <NUM> may generate a generally white color of light by stacking a plurality of light emitting materials capable of generating different colors of light such as a red color, a green color, a blue color, and so on. A color filter may be disposed on the light emitting layer <NUM>. The color filter may include at least one selected from a red color filter, a green color filter, and a blue color filter. Alternatively, the color filter may include a yellow color filter, a cyan color filter, and a magenta color filter. The color filter may be formed using a photosensitive resin (or color photoresist), etc..

An upper electrode <NUM> may be formed on the pixel defining layer <NUM> and the light emitting layer <NUM>. The upper electrode <NUM> may be formed using a metal, a metal alloy, a metal nitride, a conductive metal oxide, transparent conductive materials, and similar materials.

A first TFE layer <NUM> may be formed on the upper electrode <NUM>. The first TFE layer <NUM> may cover the upper electrode <NUM>, and may be formed with a substantially uniform thickness along a profile of the upper electrode <NUM>. The first TFE layer <NUM> may prevent a light emitting structure (e.g., the semiconductor element <NUM>, the lower electrode <NUM>, the light emitting layer <NUM>, the upper electrode <NUM>, and so on) from being deteriorated by the permeation of moisture, water, oxygen, and so forth. In addition, the first TFE layer <NUM> may protect the light emitting structure from damage caused by an external impact. The first TFE layer <NUM> may or might not be formed using one or more inorganic materials.

A second TFE layer <NUM> may be formed on the first TFE layer <NUM>. The second TFE layer <NUM> may improve the flatness of an OLED device <NUM>, and may protect the light emitting structure. The second TFE layer <NUM> may be formed using organic materials.

A third TFE layer <NUM> may be formed on the second TFE layer <NUM>. The third TFE layer <NUM> may cover the second TFE layer <NUM>, and may be formed with a substantially uniform thickness along a profile of the second TFE layer <NUM>. The third TFE layer <NUM> together with the first TFE layer <NUM> and the second TFE layer <NUM> may prevent the light emitting structure from being deteriorated by the permeation thereto of moisture, water, oxygen, and similar materials. In addition, the third TFE layer <NUM> together with the first TFE layer <NUM> and the second TFE layer <NUM> may protect the light emitting structure from damage caused by an external impact. The third TFE layer <NUM> may or might not be formed using inorganic materials. Accordingly, a TFE structure <NUM> including the first TFE layer <NUM>, the second TFE layer <NUM>, and the third TFE layer <NUM> may be formed. In addition, a display panel <NUM> including the substrateno, the semiconductor element <NUM>, the planarization layer <NUM>, the lower electrode <NUM>, the pixel defining layer <NUM>, the light emitting layer <NUM>, the upper electrode <NUM>, and the TFE structure <NUM> may be formed.

A touch screen electrode layer <NUM> may be formed on the TFE structure <NUM> (or the display panel <NUM>). The touch screen electrode layer <NUM> may include a bottom PET film, touch screen electrodes, a top PET film, and similar materials. The bottom PET film and/or the top PET film may protect the touch screen electrodes. The touch screen electrodes may have a substantially metal mesh structure. Alternatively, the touch screen electrodes may be formed directly on the TFE structure <NUM>. Thus, the bottom PET film might not be formed on the TFE structure <NUM>.

Referring to <FIG>, a lower protection film <NUM>, a release film <NUM> disposed on the lower protection film <NUM>, and a carrier film <NUM> disposed a lower surface of the lower protection film <NUM> may be provided. The lower protection film <NUM> may protect a lower surface of the display panel <NUM>; and, the release film <NUM> may protect an adhesive layer (e.g., first and second adhesive layers <NUM> and <NUM>) of the lower protection film <NUM>. In addition, the carrier film <NUM> may support the lower protection film <NUM>.

The lower protection film <NUM> may include a first lower protection film pattern <NUM> and a second lower protection film pattern <NUM>. The first lower protection film pattern <NUM> may include a first protection layer <NUM> and a first adhesive layer <NUM>; and, the second lower protection film pattern <NUM> may include a second protection layer <NUM> and a second adhesive layer <NUM>. The release film <NUM> may include a PET film where silicon is laminated in a surface of the PET film; and, the carrier film <NUM> may include an adhesive layer <NUM> including an antistatic material and a PET film <NUM>. An adhesive force of the adhesive layer <NUM> may be less than that of the first and second adhesive layers <NUM> and <NUM>.

Referring to <FIG>, after the lower film <NUM> located on a lower surface of the display panel <NUM> is removed from the display panel <NUM>, the lower protection film <NUM> and the carrier film <NUM> may be formed on a lower surface of the display panel <NUM> by removing the release film <NUM> on the lower protection film <NUM>.

The first lower protection film pattern <NUM> of the lower protection film <NUM> is formed in the display region <NUM>; and, the second lower protection film pattern <NUM> is formed in the pad electrode region <NUM> such that a lower surface of the display panel <NUM> located in the bending region <NUM> is exposed. In other words, the lower protection film <NUM> exposes a lower surface of the display panel <NUM> in the bending region <NUM>; and, the first lower protection film pattern <NUM> is spaced apart from the second lower protection film pattern <NUM>. In addition, the first adhesive layer <NUM> and the second adhesive layer <NUM> are in direct contact with a lower surface of the display panel <NUM>, and include an antistatic material. Further, each of the first protection layer <NUM> and the first adhesive layer <NUM> are located under the first adhesive layer <NUM> and the second adhesive layer <NUM>, respectively. For example, the first and second adhesive layers <NUM> and <NUM> may be formed using the OCA, the PSA, and similar materials, including acryl-based adhesives, silicon-based adhesives, urethane-based adhesives, rubber-based adhesives, vinyl ether-based adhesives, and the like. In addition, an antistatic material may be added in the OCA or the PSA. Further, each of the first protection layer <NUM> and the second protection layer <NUM> may be formed using PET, PEN, PP, PC, PS, PSul, PE, PPA, PES, PAR, PCO, MPPO, etc..

When the lower protection film <NUM> is attached to a lower surface of the display panel <NUM>, static electricity may be non-uniformly distributed in the first adhesive layer <NUM> and the second adhesive layer <NUM> when the release film <NUM> is detached from the lower protection film <NUM>. In other words, electric charges located in the release film <NUM> may migrate to the first adhesive layer <NUM> and the second adhesive layer <NUM> when the release film <NUM> is detached from the lower protection film <NUM>; and, a relatively large amount of electric charges may be distributed at a portion (e.g., a distal end portion of the lower protection film <NUM>) where the release film is detached from the lower protection film <NUM>. An image displayed by the OLED device <NUM> may be degraded by the non-uniform distribution of the electric charges. In particular, a luminance of a light emitted from the display panel <NUM> may be undesirably high in a portion having the non-uniform distribution of the electric charges.

When the first adhesive layer <NUM> and the second adhesive layer <NUM> include the antistatic material, a surface resistance of the first and second adhesive layers <NUM> and <NUM> may be decreased. For example, when the first and second adhesive layers <NUM> and <NUM> do not include the antistatic material, a surface resistance of the first and second adhesive layers <NUM> and <NUM> may be greater than about <NUM>×<NUM><NUM> ohm/sq. In contrast, when the first and second adhesive layers <NUM> and <NUM> include the antistatic material, a surface resistance of the first and second adhesive layers <NUM> and <NUM> may be less than about <NUM>×<NUM><NUM> ohm/sq. The weight ratio of the antistatic material based on a total weight of the first and second adhesive layers <NUM> and <NUM> may be in a range between about 1wt% and about 3wt% (of the total weight). Thus, the electric charges may achieve a uniform distribution in the first and second adhesive layers <NUM> and <NUM> having a low surface resistance and/or may migrate to a grounded process device. Accordingly, the performance of the OLED device <NUM> may be improved as described herein.

The thickness of the lower protection film <NUM> may be in a range between about <NUM> and about <NUM> micrometers. The thickness of each of the first and second protection layers <NUM> and <NUM> may be in a range between about <NUM> and about <NUM> micrometers; and, the thickness of the first and second adhesive layers <NUM> and <NUM> may be in a range between about <NUM> and about <NUM> micrometers. As illustrated in <FIG> and <FIG>, the display region <NUM> may include the second sub-display region <NUM> and the third sub-display region <NUM> that have a shape which is bent on an axis with respect to the second direction D2. The neutral plane of the lower protection film <NUM>, the display panel <NUM>, and the upper structure <NUM> in the second and third sub-display regions <NUM> and <NUM> may be located within the display panel <NUM>. That is, a thickness of the lower protection film <NUM> may be determined such that the neutral plane in the second and third sub-display regions <NUM> and <NUM> is located within the display panel <NUM>. For example, when the second and third sub-display regions <NUM> and <NUM> are bent, the display panel <NUM> might not be damaged because a neutral plane of the second and third sub-display regions <NUM> and <NUM> is located within the display panel <NUM>.

The antistatic material included in the first and second adhesive layers <NUM> and <NUM> may include a carbon nanotube, a graphene, a metal oxide, a conductive polymer, and similar materials. The metal oxide may include ZnO, ATO, ITO, etc. In addition, the conductive polymer may include polyfluorene, polyphenylene, polypyrene, polyazulene, polynaphthalene, PAC, PPV, PPY, polycarbazole, polyindole, polyzepine, poly (thienylene vinylene), polythiophene, PANI, poly (thiophene), poly (p-phenylene sulfide), PEDOT, PEDOT:PSS doped with PEDOT-TMA, polyfuran, or the like. These may be used alone or in a suitable combination thereof.

Referring <FIG>, the upper film <NUM> may be removed on the display panel <NUM>, and a polarizing layer <NUM> may be formed on the touch screen electrode layer <NUM>. Accordingly, an upper structure <NUM> including the touch screen electrode layer <NUM> and the polarizing layer <NUM> may be formed. In addition, the carrier film <NUM> may be removed on a lower surface of the lower protection film <NUM>. Accordingly, the OLED device <NUM> of <FIG> may be manufactured.

An OLED device <NUM> illustrated in <FIG> may have a configuration substantially the same as, or similar to, that of the OLED device <NUM> described with reference to <FIG>. In <FIG>, detailed descriptions for elements that are substantially the same as, or similar to, elements described above with reference to <FIG> may not be repeated.

Referring to <FIG>, an OLED device <NUM> may include a display panel <NUM>, a lower protection film <NUM>, an upper structure <NUM>, a bending protection layer <NUM>, a pad electrode <NUM>, and other components. The lower protection film <NUM> includes a first lower protection film pattern <NUM> and a second lower protection film pattern <NUM>. In addition, the first lower protection film pattern <NUM> includes a first protection layer <NUM> and a first adhesive layer <NUM>; and, the second lower protection film pattern <NUM> includes a second protection layer <NUM> and a second adhesive layer <NUM>. Further, the upper structure <NUM> may include a polarizing layer <NUM> and a touch screen electrode layer <NUM>.

As described above, the display panel <NUM> has a display region <NUM> and a pad region <NUM>. The display region <NUM> may include a light emitting region <NUM> and a peripheral region <NUM>, and the pad region <NUM> may include a bending region <NUM> and a pad electrode region <NUM>.

The upper structure <NUM> may be disposed in the display region <NUM> on the display panel <NUM>. The polarizing layer <NUM> may be disposed on the display panel <NUM>; and, the touch screen electrode layer <NUM> may be disposed on the polarizing layer <NUM>.

The lower protection film <NUM> is disposed on a lower surface of the display panel <NUM>. The lower protection film <NUM> includes the first lower protection film pattern <NUM> that is disposed in the display region <NUM> and the second lower protection film pattern <NUM> that is disposed in the pad electrode region <NUM> such that a lower surface of the display panel <NUM> located in the bending region <NUM> is exposed. In other words, the lower protection film <NUM> includes an opening that exposes a lower surface of the display panel <NUM> in the bending region <NUM>. In addition, the first adhesive layer <NUM> and the second adhesive layer <NUM> are in direct contact with a lower surface of the display panel <NUM>, and include antistatic materials. Further, each of the first protection layer <NUM> and the second protection layer <NUM> are disposed under the first adhesive layer <NUM> and the second adhesive layer <NUM>, respectively.

The first lower protection film pattern <NUM> may further include a light blocking material. The light blocking material may be added to the first protection layer <NUM> and/or the first adhesive layer <NUM> of the first lower protection film pattern <NUM>. For example, the light blocking material may include at least one of carbon black, titanium nitride oxide, titanium black, phenylene black, aniline black, cyanine black, and nigrosine acid black.

After the OLED device <NUM> is manufactured, a black film may be additionally disposed on a lower surface of the OLED device <NUM> (e.g., a lower surface of the lower protection film <NUM>). The black film may prevent pixels P disposed in the inside of the display panel <NUM> from being visible to a user of the OLED device <NUM>. When the first lower protection film pattern <NUM> includes the light blocking material, the first lower protection film pattern <NUM> may serve as the black film. Accordingly, a manufacturing cost of the OLED device <NUM> may be reduced because the black film might not need to be disposed on a lower surface of the OLED device <NUM>.

An OLED device <NUM> illustrated in <FIG> may have a configuration substantially the same as, or similar to, that of an OLED device <NUM> described with reference to <FIG> except for the inclusion a second adhesive layer <NUM>. In <FIG>, detailed descriptions for elements that are substantially the same as, or similar to, elements described above with reference to <FIG> may not be repeated.

Referring to <FIG> (not forming part of the invention), an OLED device <NUM> may include a display panel <NUM>, a lower protection film <NUM>, an upper structure <NUM>, a bending protection layer <NUM>, a pad electrode <NUM>, and other components. The lower protection film <NUM> may include a first lower protection film pattern <NUM> and a second lower protection film pattern <NUM>. In addition, the first lower protection film pattern <NUM> may include a first protection layer <NUM> and a first adhesive layer <NUM>; and, the second lower protection film pattern <NUM> may include a second protection layer <NUM> and a second adhesive layer <NUM>. Further, the upper structure <NUM> may include a polarizing layer <NUM> and a touch screen electrode layer <NUM>.

The lower protection film <NUM> may be disposed on a lower surface of the display panel <NUM>. The lower protection film <NUM> may include the first lower protection film pattern <NUM> disposed in the display region <NUM> and the second lower protection film pattern <NUM> disposed in the pad electrode region <NUM> such that a lower surface of the display panel <NUM> located in the bending region <NUM> is exposed. In other words, the lower protection film <NUM> may include an opening that exposes a lower surface of the display panel <NUM> in the bending region <NUM>. In addition, the first adhesive layer <NUM> and the second adhesive layer <NUM> may be in direct contact with a lower surface of the display panel <NUM>, and the first adhesive layer <NUM> includes antistatic materials. That is, in arrangements not falling under the scope of the claims, the second adhesive layer <NUM> might not include the antistatic material. Further, each of the first protection layer <NUM> and the second protection layer <NUM> may be disposed under the first adhesive layer <NUM> and the second adhesive layer <NUM>, respectively.

When the lower protection film <NUM> is attached to a lower surface of the display panel <NUM>, a release film may be disposed on the lower protection film <NUM> to protect the first adhesive layer <NUM> and the second adhesive layer <NUM>. Static electricity may be non-uniformly distributed in the first adhesive layer <NUM> and the second adhesive layer <NUM> as the release film is detached from the lower protection film <NUM>. In other words, electric charges located in the release film may migrate to the first adhesive layer <NUM> and the second adhesive layer <NUM> as the release film is detached from the lower protection film <NUM>; and, a relatively large amount of electric charges may be distributed at a location where the release film is finally completely detached from the lower protection film <NUM>. A displayed image of the OLED device <NUM> may be degraded by the non-uniform distribution of the electric charges. In particular, a luminance of light emitted from the display panel <NUM> may be undesirably high in a portion of the display having the non-uniform distribution of the electric charges. Accordingly, in arrangements not falling under the scope of the claims, because a defect in the performance of the OLED device <NUM> caused by the non-uniform distribution of the electric charges does not occur in the pad electrode region 6o where the second adhesive layer <NUM> is disposed, the antistatic material may be omitted in the second adhesive layer <NUM>. As a result, a process for adding the antistatic material in the second adhesive layer <NUM> may also be omitted in arrangements not falling under the scope of the claims. Accordingly, the cost of the lower protection film <NUM> may be reduced because the antistatic material may be included in a portion of the lower protection film <NUM> rather than in the second adhesive layer <NUM>, and the manufacturing cost of the OLED device <NUM> having the antistatic material may also be decreased.

An OLED device <NUM> illustrated in <FIG> may have a configuration substantially the same as or similar to that of an OLED device too described with reference to <FIG> except for the inclusion of an adhesive layer <NUM>. In <FIG>, detailed descriptions for elements that are substantially the same as, or similar to, elements described with reference to <FIG> may not be repeated.

Referring to <FIG>, an OLED device <NUM> may include a display panel <NUM>, a lower protection film <NUM>, an upper structure <NUM>, a bending protection layer <NUM>, a pad electrode <NUM>, and other components. The lower protection film <NUM> includes a first protection layer <NUM>, a second protection layer <NUM>, and an adhesive layer <NUM>. Further, the upper structure <NUM> may include a polarizing layer <NUM> and a touch screen electrode layer <NUM>.

The lower protection film <NUM> is disposed on a lower surface of the display panel <NUM>. The lower protection film <NUM> may define a groove in the bending region <NUM>.

The adhesive layer <NUM> is entirely disposed on a lower surface of the display panel <NUM>. The first protection layer <NUM> is disposed in the display region <NUM>, and the second protection layer <NUM> is disposed in the pad electrode region <NUM> defining the groove there between such that a lower surface of the adhesive layer <NUM> located in the bending region <NUM> is exposed in the groove. The first protection layer <NUM> and the second protection layer <NUM> may be spaced apart from each other on the adhesive layer <NUM> to define the groove there between.

When the lower protection film <NUM> is attached to a lower surface of the display panel <NUM>, the lower protection film <NUM> is entirely disposed on a lower surface of the display panel <NUM>; and, a protection layer removal pattern located in the bending region <NUM> may be removed from the adhesive layer <NUM> before the bending region <NUM> is bent. To prevent impurities from penetrating an empty space defined between the first protection layer <NUM> and the second protection layer <NUM> in a manufacturing process, the protection layer removal pattern may be disposed on the adhesive layer <NUM>, and the protection layer removal pattern may be removed before the bending region <NUM> is bent. Alternatively, in a process for removing the protection layer removal pattern, a portion of the adhesive layer <NUM> may be simultaneously removed. That is, at least a portion of the adhesive layer <NUM> may be disposed on a lower surface of the display panel <NUM> that is located in the bending region <NUM>.

An OLED device <NUM> illustrated in <FIG> may have a configuration substantially the same as, or similar to, that of the OLED device <NUM> described with reference to <FIG>, except for the inclusion of an antistatic layer <NUM>. In <FIG>, detailed descriptions for elements that are substantially the same as, or similar to, elements described with reference to <FIG> may not be repeated.

Referring to <FIG>, an OLED device <NUM> may include a display panel <NUM>, a lower protection film <NUM>, an upper structure <NUM>, a bending protection layer <NUM>, a pad electrode <NUM>, and similar components. The lower protection film <NUM> includes a first lower protection film pattern <NUM>, a second lower protection film pattern <NUM>, and the antistatic layer <NUM>. In addition, the first lower protection film pattern <NUM> includes a first protection layer <NUM> and a first adhesive layer <NUM>; and, the second lower protection film pattern <NUM> includes a second protection layer <NUM> and a second adhesive layer <NUM>. Further, the upper structure <NUM> may include a polarizing layer <NUM> and a touch screen electrode layer <NUM>.

The lower protection film <NUM> is disposed on a lower surface of the display panel <NUM>. The lower protection film <NUM> includes the first lower protection film pattern <NUM> that is disposed in the display region <NUM>, the second lower protection film pattern <NUM> that is disposed in the pad electrode region <NUM> such that a lower surface of the display panel <NUM> located in the bending region <NUM> is exposed there between, and the antistatic layer <NUM> that is disposed under the first lower protection film pattern <NUM> and the second lower protection film pattern <NUM>. In other words, an opening in the lower protection film <NUM> exposes a lower surface of the display panel <NUM> in the bending region <NUM>. In addition, the first adhesive layer <NUM> and the second adhesive layer <NUM> are in direct contact with a lower surface of the display panel <NUM>, and include antistatic materials. Further, each of the first protection layer <NUM> and the second protection layer <NUM> are disposed under the first adhesive layer <NUM> and the second adhesive layer <NUM>, respectively. The antistatic layer <NUM> including an antistatic material may be disposed under the first protection layer <NUM> and under the second protection layer <NUM>.

When a carrier film <NUM> is removed from the lower protection film <NUM>, electric charges located in the carrier film <NUM> may migrate to the antistatic layer <NUM>. These electric charges achieve a uniform distribution in the antistatic layer <NUM> having a reduced surface resistance or may migrate to a grounded process device.

The inventive concepts described herein may be applied to various display devices including an organic light emitting display device. For example, the inventive concepts described herein may be applied to a vehicle-display device, a ship-display device, an aircraft-display device, portable communication devices, display devices for information transfer, a medical-display device, and similar devices.

Claim 1:
An organic light emitting display (OLED) device (<NUM>), comprising:
a flexible display panel (<NUM>) having:
a display region (<NUM>) where a plurality of pixels (P) are disposed; and
a pad region (<NUM>) located at a side of the display region (<NUM>), wherein the pad region (<NUM>) includes a bending region (<NUM>) located adjacent to the display region, and a pad electrode region (<NUM>) where pad electrodes (<NUM>) for electrical connecting to an external device (<NUM>) are disposed,
wherein the display panel (<NUM>) is configurable to have curved shape where a flexible portion of the display region (<NUM>) is bent;
an upper structure (<NUM>) in the display region (<NUM>) of the display panel (<NUM>); and
a lower protection film (<NUM>) on a lower surface of the display panel (<NUM>), the lower protection film (<NUM>) comprising:
an adhesive layer (<NUM>, <NUM>, <NUM>) in direct contact with the lower surface of the display panel (<NUM>), the adhesive layer (<NUM>, <NUM>, <NUM>) including an antistatic material; and
a protection layer (<NUM>, <NUM>) disposed under the adhesive layer (<NUM>, <NUM>, <NUM>), wherein the adhesive layer attaches the protection layer to the lower surface of the display panel (<NUM>),
wherein the lower protection film (<NUM>) includes a first lower protection film pattern (<NUM>), disposed in the display region (<NUM>) and a second lower protection film pattern (<NUM>) disposed in the pad electrode region (<NUM>), such that the portion of the lower surface of the display panel (<NUM>) that is located in the bending region (<NUM>) is exposed, wherein the adhesive layer (<NUM>, <NUM>) includes a first adhesive layer (<NUM>) and a second adhesive layer (<NUM>), and wherein the first lower protection film pattern (<NUM>) includes a first protection layer (<NUM>) and the first adhesive layer (<NUM>) and the second lower protection film pattern (<NUM>) includes a second protection layer (<NUM>) and the second adhesive layer (<NUM>); or
wherein the adhesive layer (<NUM>) is entirely disposed on the lower surface of the display panel (<NUM>), and wherein the protection layer includes first protection layer (<NUM>), disposed in the display region (<NUM>), and a second protection layer (<NUM>), disposed in the pad electrode region (<NUM>), such that the first protection layer (<NUM>) and the second protection layer (<NUM>) define an opening exposing a lower surface of the adhesive layer (<NUM>) located in the bending region (<NUM>).