Patent Description:
In many applications it is necessary to convert current signals into voltage signals. A way to do this is with a trans-impedance amplifier.

Within the technical field of optical sensing it a trans-impedance amplifier can convert an output current from an optical photodiode to a voltage signal ready to be converted by an analog-to-digital converter (ADC). For some applications the output voltage range from a trans-impedance amplifier is further conditioned to make it suitable for being converted by an ADC. For example, by making the dynamic range of the signal match the dynamic range of the ADC.

Optical photodiodes are often biased with a voltage reference and the output current signal of the optical photodiode will be dependent on the voltage reference used. Therefore, it is possible to directly adjust the voltage reference in order to bias the output current signal. However, this can result in excess components and can often impact upon the accuracy of the representation of the original optical signal if the voltage reference is not accounted for.

<CIT> discloses a light receiving circuit includes a light receiving element, an amplifier, and a first compensator. The light receiving element is configured to output an optical current by receiving an optical signal. The amplifier is configured to convert the optical current into a voltage and amplify the voltage. The first compensator is connected to the amplifier and configured to suppress a variation in an opposite direction from a voltage variation of the amplifier when the optical current increases.

<CIT> discloses a photoreceptor provided with an erroneous operation detection circuit for monitoring an output signal supplied from a slew rate variable output stage. The erroneous operation detection circuit performs such controls that a slew rate of output is decreased within a range in which a transmission speed of the slew rate variable output stage is not decreased.

<CIT> discloses that in an infrared data-receiving circuit wherein an output electric current of a photodiode is current-to-voltage converted by a preamplifier and, after having been amplified by an amplification circuit, is subjected to a waveform-shaping operation in a comparator by using a predetermined threshold value, the threshold voltage, upon receipt of a low signal voltage, is set at the average value Vav that has been formed by two LPFs and, upon receipt of a high signal voltage, is also set at a shift value that has been obtained by allowing the voltage, which has been generated by shifting of a level shift circuit, to be sampled by a peak-hold circuit constituted of a differential amplifier.

<CIT> discloses that a transimpedance amplifier (TIA) can include an operational amplifier with a programmable compensation capacitor, such as can be used for compensating first transconductance stage of an operational amplifier circuit that can be used in a TIA configuration. This technique is particularly suitable, for example, for an Optical Time Domain Reflectometer (OTDR) application, which can use variable pulsewidth launch pulses. <CIT> discloses an apparatus for scanning optical recording media which includes a detection unit having a photodetector and which output is coupled to an input of an evaluation unit which provides a voltage output.

The present disclosure provides a current-to-voltage signal converter which may operate at a reduced voltage. The current-to-voltage converter includes a trans-impedance amplifier which converts a current input into a voltage output. The voltage output may operate above a first predetermined voltage or below a second predetermined voltage (where the first predetermined voltage is greater than the second predetermined voltage), and must therefore be adjusted in order to make it suitable for any downstream signal processing circuitry, such as an ADC. As such, a subtractor circuit is coupled to the output of the trans-impedance amplifier. At the input of the subtractor circuit, a voltage adjustment circuit is employed, to adjust the voltage input to the subtractor circuit. As such, the input to the subtractor is adjusted between a first predetermined voltage threshold and a second predetermined voltage threshold, and the subtractor circuit may therefore be a low-voltage component.

Aspects of the invention are described in accordance with the appended independent claims. Preferred features are described in the appended depdendent claims.

The voltage adjustment arrangement can allow for an improvement is system cost (reduced component size, power) and an improved system performance. This can allow the amplifier to be a low voltage amplifier and/or a unipolar amplifier which can lead to further advantages.

A low voltage amplifier operates with a lower supply voltage than an amplifier. This is a relative concept which, for an integrated circuit (IC), depends on the foundry process. In a foundry process, it is possible to select different voltage ranges and some are lower, some are higher. An IC can comprise many different discrete voltage levels e.g. 20V, 10V, 5V, <NUM>. 3V, etc. To differentiate the two types of amplifiers, an amplifier in an IC can operate with a supply voltage which can be the highest voltage level supported by that IC. A low voltage amplifier in an IC can operate with a supply voltage lower than the highest voltage level supported by that IC. For example, on one IC the highest voltage level supported may be 10V, therefore a low voltage amplifier may operate with a supply voltage of 5V. In another example, on one IC the highest voltage level supported may be 5V, therefore a low voltage amplifier may operate with a supply voltage of <NUM>.

This can lead to accuracy and power advantages for the low voltage amplifier. Thus, a low voltage amplifier can operate at (or have a supply voltage) an IC supported voltage level less than the maximum voltage level supported.

Alternatively, a low voltage amplifier can operate at (or have a supply voltage) the lowest voltage level supported by an IC.

Similarly, an amplifier may operate with an asymmetrical supply voltage, such that the positive supply voltage can be the highest voltage level supported by that IC and a negative supply voltage which can be 0V. The reduced dynamic range of this amplifier supplied by an asymmetrical supply voltage may also lead to accuracy and power advantages.

It is also possible to arrange the voltage adjustment arrangement to bias the voltage level so that the inputs to the amplifier is a positive voltage value. This allows the amplifier to be supplied by a unipolar supply voltage i.e. the negative voltage rail is set to electrical ground. This enables the system to operate with greater power efficiency.

Thus the amplifier may be a low voltage amplifier and/or supplied by a unipolar supply voltage. This can improve system performance (accuracy, power efficiency) and reduce cost of the system (reduced surface area and size).

The present disclosure will now be described, by way of example only, in conjunction with the attached drawings, in which:.

Certain circuit components produce an output in which the signal is a varying current, as opposed to a varying voltage. For example, photodiodes produce a current-based output signal. Signal processing circuits, which are used to condition analog signals, for example by converting them to digital signals, typically require voltage-based signals, within a particular voltage range. As such, it is necessary to convert current-based signals to voltage-based signals, such that they can be processed. This is typically done by a transimpedance amplifier, as noted above. However, the output of a transimpedance amplifier is normally outside of the range of suitable inputs for downstream signal processing components, such as an analog-to-digital converter. As such, a subtractor circuit is used, to adjust the voltage of the output signal. Owing to the voltages typical involved, absent any further conditioning, the subtractor circuit would need to be a high-voltage component.

The present disclosure introduces a voltage adjustment mechanism, at the input to the amplifier of the subtractor circuit. For example, a common mode voltage may be coupled to both the inverting and non-inverting inputs of the amplifier, via a pair of resistors. In accordance with the invention, the voltage at the input to the subtractor amplifier may be adjusted between a first predetermined voltage threshold and a second predetermined voltage threshold, and the subtractor may then be made from low voltage components. This may reduce the area required by the subtractor, and the cost of the circuit.

<FIG> illustrates a current-to-voltage signal converter <NUM>. The input to the current-to-voltage signal converter <NUM> is an input current signal (Ipd). Ipd can be the output of a photodiode which is biased by a first reference voltage (Vref). Vref may be any voltage from a high positive voltage to a high negative voltage depending on the characteristics of the photodiode. The output (Vout2) of the current-to-voltage signal converter <NUM> is intended to be suitable for receipt by an analog-to-digital converter (ADC), such that the optical signal incident onto the photodiode can be accurately interpreted by a digital processing device.

The current-to-voltage signal converter <NUM> is comprised of two stages: a trans-impedance amplifier <NUM>; and, an analog subtractor circuit <NUM>. The current-to-voltage signal converter <NUM> is a trans-impedance amplifier itself since it performs the overall function of receiving an input current signal and outputting an output voltage signal which can be suitable for receipt by an ADC.

The trans-impedance amplifier <NUM> comprises a first operational amplifier (op-amp) <NUM> with a trans-impedance feedback resistor (Rtia) <NUM> coupled between the output and the inverting input of the first op-amp <NUM>. The input current signal (Ipd) is coupled to the inverting input of the first op-amp <NUM>. The first reference voltage (Vref) is coupled to the non-inverting input of the first op-amp <NUM>. The output of the trans-impedance amplifier <NUM> is a first voltage signal (Vout1): <MAT>.

The analog subractor circuit <NUM> is electrically coupled to the trans-impedance amplifier <NUM> to convert the first voltage signal (Vout1) into a second voltage signal (Vout2). The analog subtractor circuit <NUM> comprises a second op-amp <NUM> and four resistors 12a, 12b, 14a, 14b. The first resistor 12a is electrically coupled in series between the inverting input of the second op-amp <NUM> and the first voltage signal (Vout1). The second resistor 14a is electrically coupled to the output and the inverting input of the second op-amp <NUM> to form a negative feedback loop based on the output of the second op-amp <NUM>. The third resistor 12b and the fourth resistor 14b form a potential divider circuit. The third resistor 12b is electrically coupled in series between the non-inverting input of the second op-amp <NUM> and the first reference voltage (Vref), and the fourth resistor 14b is electrically coupled to the non-inverting input of the second op-amp <NUM> and electrical ground <NUM>. The first resistor 12a and third resistor 12b are selected to have substantially the same value resistance (R1). The second resistor 14a and fourth resistor 14b are selected to have substantially the same value resistance (R2). The resistance values of the four resistors 12a, 12b, 14a, 14b are selected so that the second voltage signal (Vout2) is independent of the first reference voltage (Vref). However, selecting resistance values R1 and R2 simplifies the overall circuit design and may lead to reduced circuit cost (manufacturing time, materials, etc.).

The second voltage signal (Vout2) is the output of the analog subtractor circuit <NUM>: <MAT>.

The analog subtractor circuit <NUM> can be seen as acting as an analog voltage shifter. Generally, the first output signal (Vout1) has a voltage range from Vref to Vref-Vin, and the second output signal (Vout2) has a voltage range from <NUM> to Vin. Where Vin represents the signal of interest (Ipd) from the input (e.g. from the photodiode) and is Ipd*Rtia. This is a voltage shift of -Vref. However, if Vref is a high voltage signal, then the second op-amp <NUM> must be rated as a high voltage amplifier because the input of the second op-amp <NUM> 'sees' a high voltage signal, i.e. there is a high voltage signal incident upon the inputs of the second op-amp <NUM>. The voltage signal received by the second op-amp <NUM> may also be a negative voltage depending on the values of Vref and Vin. The analog subtractor circuit <NUM> can also be used to amplify Vin, if necessary.

In Integrated circuit (IC) design, high voltage devices generally have a large physical footprint (e.g. <NUM>-<NUM> times larger than a low voltage amplifier). They are comparatively very large devices, and have poor performance in comparison to other lower voltage IC components. This leads to a high overall system cost with performance limitations.

Since Vref and Vin can vary in time (i.e. time variant signals), they can both have associated analog voltage ranges. A circuit which can accept a large analog voltage range and can reduce the analog voltage range to a suitable range for low voltage devices, can allow downstream components to be low voltage devices. Such a circuit can reduce the material and performance cost of downstream components and also reduce associated design efforts.

<FIG> illustrates a current-to-voltage signal converter <NUM> which has the same structure as the current-to-voltage signal converter <NUM> illustrated in <FIG> (i.e. a trans-impedance amplifier <NUM> and an analog subtractor circuit <NUM>) with the addition of a voltage adjustment arrangement <NUM>.

The voltage adjustment arrangement <NUM> comprises a common mode voltage source <NUM>, coupled to the inverting and non-inverting inputs of the second op-amp <NUM> via a first common mode resistor 26a and a second common mode resistor 26b. By using a common mode voltage source, the voltage is applied equally to the inverting and non-inverting inputs of the second op-amp <NUM>. The common mode voltage source <NUM> is a fixed voltage source (Vcm).

As shown in <FIG>, the common mode voltage source <NUM> (Vcm) is electrically coupled to a first terminal of the first common mode resistor 26a and a first terminal of a second common mode resistor 26b. The second terminals of the first common mode resistor 26a and second common mode resistors 26b are electrically coupled to the inverting and non-inverting inputs of the second op-amp <NUM> respectively. The first and second common mode resistors 26a, 26b have substantially the same resistance value Rcm. This is because resistors 12a and 12b have substantially the same resistance value R1 and resistors 14a and 14b have substantially the same resistance value R2. That is to say that the resistor values are chosen so to eliminate Vref from the output signal i.e. any resistor values could be chosen for the resistors 12a, 12b, 14a, 14b, 26a, and 26b, as long as the second voltage signal (Vout2) is independent of the first reference voltage (Vref).

Example values are as follows: the input current signal may range from around <NUM> to SmA; the first reference voltage (Vref) may range from around -<NUM>. 5V to <NUM>. 5V; the trans-impedance feedback resistor <NUM> (Rtia) depends on Ipd, however, it may be around <NUM>. 75V divided-by the maximum Ipd value (in amperes); the resistors 12a, 12b may be around <NUM> ohm; the resistors 14a, 14b may be around <NUM> ohm; the resistors 26a, 26b may be around <NUM> ohm; the voltage at the non-inverting and inverting input of the second op-amp <NUM> may range from around <NUM>. 5V to <NUM>. 5V; and, the common mode voltage source <NUM> may be around 4V. These values may be changed depending on the application and/or designer choice. Moreover, it will be apparent that it is the ratio of the values of R1:R2:Rcm which may result in the voltage range of the desired output (Vout2).

The voltage adjustment arrangement <NUM> is arranged to bias the voltage level at the inverting and non-inverting inputs into the second op-amp <NUM> so that the analog voltage range that is 'seen' by the inputs to the second op-amp <NUM> is between a first predetermined voltage threshold and a second predetermined voltage threshold. By adjusting the inputs to the second op-amp <NUM> to between a first predetermined voltage threshold and a second predetermined voltage threshold, the same overall system performance can be maintained and even improved if the second op-amp <NUM> is a low voltage op-amp.

As explained above, by using a low voltage op-amp, an improvement in system cost (i.e. reduced size, power) can be achieved with an improvement in system performance. If the second op-amp <NUM> is a low voltage op-amp then for correct operation of the analog subtractor circuit <NUM>, the second op-amp will be operating in its linear region. Therefore, voltage adjustment arrangement <NUM> may be set so that the second op-amp <NUM> does not to amplify the input signal voltage to beyond its supply voltage, thus causing the input signal to saturate (i.e. the op-amp operating in its saturation region). Even with the addition of extra circuit component such as the voltage adjustment arrangement <NUM>, by using a low voltage op-amp, then power, size, cost can all be reduced in comparison of the circuit illustrated in <FIG>.

It is possible for Vout1 to be negative as described previously based the value of Vref and Vin (Ipd*Rtia). It is also possible to arrange the voltage adjustment arrangement <NUM> to bias the voltage level so that the inputs to the second op-amp <NUM> is a positive voltage value. This allows the second op-amp <NUM> to be supplied by a unipolar supply voltage i.e. the negative voltage rail is set to electrical ground. This enables the system to operate with greater power efficiency. In practice, if the second op-amp <NUM> is supplied by a unipolar supply then the negative supply voltage will be 0V and the positive supply voltage can be the same as the positive supply voltage for the first op-amp <NUM>. Therefore, the second op-amp <NUM> will have half of the supply voltage range as the first op-amp <NUM> if the first op-amp <NUM> has a negative supply voltage of the same magnitude as the positive supply voltage. Thus, the second op-amp <NUM> can be a low voltage amp.

Thus the second op-amp <NUM> may be a low voltage op-amp and/or supplied by a unipolar supply voltage. This can improve system performance (accuracy, power efficiency) and reduce cost of the system (reduced surface area and size).

The voltage value of the common mode voltage source <NUM> (Vcm) is a fixed voltage source having a predetermined voltage. This is determined based on a predetermined value of the first reference voltage (Vref). The first reference voltage (Vref) may not be a stable voltage source and therefore may fluctuate during operation. However, if the fluctuations of the first reference voltage (Vref) are relatively small (i.e. a small Vref voltage range), then the pair of common mode resistors 26a, 26b coupled to Vcm can be used. This can reduce the design complicity but cannot handle a very large voltage range of Vref. Thus, the second op-amp <NUM> has a predetermined input voltage range which if exceeded may begin to saturate the first voltage signal (Vout1). The predetermined voltage threshold is therefore less than or equal to the upper end of the predetermined input voltage range.

The first op-amp <NUM> can be a high voltage op-amp and the second op-amp <NUM> can be a low voltage op-amp. The first stage (i.e. the trans-impedance amplifier <NUM>) can be configured to operate within a first supply voltage range. The second op-amp <NUM> can be configured to operate within a second supply voltage range. The first supply voltage range can be greater than the second supply voltage range. Generally op-amps such as the first op-amp <NUM> and the second op-amp <NUM> have two supply voltage contacts: a positive supply voltage contact and a negative supply voltage contact. The negative supply voltage contact may be 0V, or any voltage less than the positive supply voltage. Similarly, the positive supply voltage contact may be 0V, or any voltage greater than the negative supply voltage.

The current-to-voltage signal converter <NUM> performs the method of converting a current signal to a voltage signal, as shown in the flow diagram of <FIG>. The method can comprise at least the following three steps:.

In absence of the voltage adjustment arrangement, the first voltage signal (Vout1) may have a DC offset (Vref) which can cause the first voltage signal to vary over a large voltage range. This necessitates that the amplifier <NUM> be a high voltage device in order to accurately subtract the DC offset (Vref) from the desired signal (i.e. Ipd*Rtia).

The voltage adjustment arrangement <NUM> can eliminate the requirement that the amplifier <NUM> be a high voltage device by applying an adjusting voltage to the at least one input to the amplifier <NUM>. This can shift and/or scale the DC offset (Vref), therefore the input range to the amplifier <NUM> is adjusted. Therefore, the amplifier <NUM> can be a low voltage amplifier and/or a unipolar amplifier. This can improve performance and cost (materials) of the overall current-to-voltage signal converter <NUM>.

The method can comprise the additional step of predetermining the DC offset voltage (Vref) of the first voltage signal (Vout1) and predetermining a voltage (or current value) of the DC source <NUM> based on the predetermined DC offset voltage (Vref). Depending on the tolerances of the amplifier <NUM> (e.g. low voltage amplifier or otherwise) and the voltage range of the desired voltage signal (i.e. Ipd*Rtia), it can be possible to fix the value of the DC source <NUM> to a fixed voltage. This can reduce circuit complexity.

However, the predetermination of the value of the DC source <NUM> can be further based on the expected variation in the DC offset (Vref) so that during operation the input to the amplifier <NUM> does not exceed the first predetermined voltage threshold or fall below the second predetermined voltage threshold. These predetermined voltage thresholds may be the limit at which the amplifier <NUM> no longer operates in its linear region and begins to operate in its saturation region. Similarly, this is not a strict limit and it may be acceptable depending on the application to exceed this limit a percentage of the time, such that for the majority of time the second voltage signal (Vout2) is representative/linearly proportional to the input current signal (Ipd).

<FIG> illustrates a current-to-voltage signal converter <NUM> comprising the structure of the current-to-voltage signal converter <NUM> (i.e. a trans-impedance amplifier <NUM> and an analog subtractor circuit <NUM>) as illustrated in <FIG> with the addition of a voltage adjustment arrangement <NUM>.

The current-to-voltage signal converter <NUM> operates in much the same way as the current-to-voltage converter <NUM> of <FIG> with all of the same advantages. However, the current-to-voltage converter <NUM> of <FIG> can further operate even when the first reference voltage (Vref) has a large and unknown voltage range/voltage fluctuations, by virtue of a feedback loop of the voltage adjustment arrangement <NUM>. The voltage adjustment arrangement <NUM> comprises a feedback amplifier <NUM> arranged to actively control the adjustment in voltage based on the positive voltage output.

The voltage adjustment arrangement <NUM> reacts to variations in the first reference voltage (Vref) and can further voltage shift the first reference voltage (Vref) to ensure that the voltage at the non-inverting terminal of the second op-amp <NUM> remains substantially consistent. In addition, any fluctuations in the first reference voltage (Vref) can be reproduced at the inverting input of the second op-amp <NUM> (similar to the non-inverting input of the second op-amp <NUM>) so that the second op-amp <NUM> can effectively subtract the first reference voltage (Vref) from the first voltage signal (i.e. Vout1).

The voltage adjustment arrangement <NUM> comprises a first reference source which is a common mode current source <NUM>. The common mode current source <NUM> is electrically coupled to the first terminal of the first common mode resistor 26a and to the first terminal of the second common mode resistor 26b. The second terminals of first and second common mode resistors 26a, 26b are electrically coupled to the inverting and non-inverting inputs of the second op-amp <NUM> respectively. Similarly to the common mode resistors of <FIG>, the first and second common mode resistors 26a, 26b may have substantially the same value resistance for the same reasons.

The feedback amplifier can be an NMOS transistor <NUM>, as shown in <FIG>. The gate of the NMOS transistor <NUM> is electrically coupled to the non-inverting input of the second op-amp <NUM>. The source of the NMOS transistor <NUM> is electrically coupled to the ground plane (or electrical ground). The drain of the NMOS transistor <NUM> is electrically coupled to the common mode current source <NUM>, the first terminal of the first common mode resistor 26a, and to the first terminal of the second common mode resistor 26b.

The transistor <NUM> in this arrangement can be arranged to adjust its channel until the gate-to-ground voltage is near its threshold voltage (Vth), which can be in the low voltage range. Put another way, the NMOS transistor <NUM> can ensure that the voltage of both the non-inverting input and the inverting input into the second op-amp <NUM> of the analog subtractor circuit <NUM> corresponds to at least the threshold voltage (Vth) of the NMOS transistor <NUM>. The threshold voltage (Vth) can typically be around <NUM>. This results in the common mode of the signal of interest (i.e. Ipd*Rtia) varying around the biased DC voltage signal (i.e. Vth). The selection of Rtia can be predetermined such that the range of the signal can remain in the low voltage range, such that the second op-amp <NUM> can be a low voltage device. Moreover, the selection of Rcm can be predetermined such that the signal remains above 0V (i.e. electrical ground), such that the second op-amp <NUM> can further be a unipolar supplied device and possibly a low voltage device.

The current-to-voltage signal converter <NUM> performs the method of converting a current signal to a voltage signal. The method can comprise at least the three steps described above in reference to the current-to-voltage converter <NUM>.

The current-to-voltage signal converter <NUM> can further adjust the voltage or current value at both inputs to the amplifier <NUM> based on the DC offset voltage (Vref) of the first voltage signal (Vout1). The adjustment can be a shifting, scaling, and/or stabilisation of the DC offset voltage (Vref). The value of the voltage or current value at both inputs to the amplifier is based on the actual variation in the DC offset (Vref), via a feedback loop. The feedback loop is configured so that during operation the input to the amplifier <NUM> does not exceed the first predetermined voltage threshold or fall below the second predetermined voltage threshold. These predetermined voltage thresholds may be the limit at which the amplifier <NUM> no longer operates in its linear region, and begins to operate in its saturation region. This is not a strict limit and it may be acceptable depending on the application to exceed this limit a percentage of the time, such that for the majority of time the second voltage signal (Vout2) is representative/linearly proportional to the input current signal (Ipd).

<FIG> illustrates a block diagram of a current-to-voltage signal converter <NUM> comprising a first stage <NUM>, an analog subtractor circuit <NUM>, and a voltage adjustment arrangement <NUM>.

The first stage <NUM> is configured to convert an input current signal (Ipd) to a first voltage signal (Vout1). This can be accomplished in many ways as known in the art, however, a specific example is a trans-impedance amplifier circuit <NUM> shown in <FIG>.

The second stage of the current-to-voltage signal converter <NUM> is the analog subtractor circuit <NUM>. The analog subtractor circuit <NUM> comprises an amplifier <NUM>. The analog subtractor circuit <NUM> is electrically coupled to the first stage <NUM> to convert the first voltage signal (Vout1) into a second voltage signal (Vout2) i.e. it performs at least a voltage shift operation.

The voltage adjustment circuit <NUM> is electrically coupled to at least one input of the amplifier <NUM>, and configured such that the voltage at the at least one input of the amplifier <NUM> is between a first predetermined voltage threshold and a second predetermined voltage threshold. The voltage adjustment circuit <NUM> can be an open loop system, a feedforward system, or a feedback system.

The analog subtractor circuit <NUM> can further comprise an input for a first reference voltage (Vref). The first voltage signal (Vout1) can comprise a component of the first reference voltage (Vref). For example, the first reference voltage (Vref) may be a (time) varying DC offset. Therefore, the voltage adjustment arrangement <NUM> can introduce a first reference source to the input of the amplifier <NUM>. This can (partially or fully) scale/offset the first reference voltage (Vref) component of the first voltage signal (Vout1). The voltage adjustment circuit <NUM> can be designed with predefined knowledge of the first reference voltage (Vref) in order to scale/offset it (i.e. an open loop system e.g. <FIG>), or it can be designed to be reactive to the current/future/past first reference voltage (Vref) in operation (i.e. a closed loop system [feedback or feedforward] e.g. <FIG>). The voltage adjustment circuit <NUM> allows for an improvement in system cost (reduced component size, power) and an improved system performance. This can allow the amplifier <NUM> to be a low voltage amplifier and/or a unipolar amplifier which can lead to further advantages.

In operation, the current-to-voltage signal converter <NUM>, performs the method of converting a current signal to a voltage signal. The method can comprise at least the three steps described above in reference to the current-to-voltage converter <NUM> and the current-to-voltage converter <NUM>. The method has the same advantages and benefits as stated previously with regards to the current-to-voltage converter <NUM> and the current-to-voltage converter <NUM>.

The current-to-voltage signal converter <NUM> operates in much the same way as the current-to-voltage converter <NUM> of <FIG> with at least all of the same advantages. The difference to <FIG> is that the NMOS transistor <NUM> has been replaced with a third op-amp <NUM> with a bias voltage (Vb).

The inverting input of the third op-amp <NUM> is electrically connected to non-inverting input of the second op-amp <NUM>. The non-inverting input of the third op-amp <NUM> is electrically connected to the bias voltage (Vb) which performs the same purpose as the threshold voltage (Vth) of the NMOS transistor <NUM>. That is, it results in the signal of interest (i.e. Ipd*Rtia) varying around the biased DC voltage signal (i.e. Vb). This can result in an effective shifting or scaling, or at least stabilisation, of the varying DC offset voltage (i.e. Vref) of the first voltage signal (Vout1). It is worth noting that the output of the third op-amp <NUM> can act as the first reference source, hence a common mode voltage/current source (similar to the common mode current source <NUM> of <FIG>) can be absent. The third op-amp <NUM> can be electrically coupled to the first terminal of the first common mode resistor 26a and a first terminal of a second common mode resistor 26b.

The current-to-voltage signal converter <NUM> operates in much the same way as the current-to-voltage converter <NUM> of <FIG> with at least all of the same advantages. The difference to the current-to-voltage converter <NUM> of <FIG> is that the first and second common mode resistors 26a, 26b have been replaced with a current mirror arrangement <NUM>. The current mirror arrangement comprises a control (PMOS) transistor <NUM> and two mirrored (PMOS) transistors 68a, 68b. The drain of each mirrored transistor 68a, 68b are electrically coupled to the inverting and non-inverting inputs of the second op-amp <NUM> respectively. The source of each mirrored transistor 68a, 68b and control transistor <NUM>, are connected together and to a power source <NUM>. The gate of each mirrored transistor 68a, 68b, gate of the control transistor <NUM>, drain of the second NMOS transistor <NUM>, and the drain of the control transistor <NUM>, are connected together. The source of the second NMOS transistor <NUM> is electrically coupled to electrical ground.

The drain of the feedback NMOS transistor <NUM> is electrically coupled to the common mode current source <NUM>, and to the gate of a second NMOS transistor <NUM>. The feedback NMOS transistor <NUM> can therefore, control the current flow through the second NMOS transistor <NUM>. The second NMOS transistor <NUM> can therefore control the current in the current mirror arrangement <NUM>. The mirrored current drawn by the two mirrored transistors 68a, 68b controls the voltage at the inverting and non-inverting inputs of the second op-amp <NUM> similarly to the pair of resistors 26a, 26b of <FIG>,<FIG>, and <FIG>. Put another way, the two mirrored (PMOS) transistors 68a, 68b can aid in an effective shifting, scaling, and/or at least stabilisation of the varying DC offset voltage (i.e. Vref) of the first voltage signal (Vout1). This can enable the second op-amp <NUM> to be a low voltage op-amp and/or supplied by a unipolar supply voltage. This can improve system performance (accuracy, power efficiency) and reduce cost of the system (reduced surface area and size).

In a current-to-voltage signal converter <NUM>, <NUM>, <NUM> which can comprise a voltage adjustment arrangement <NUM>, <NUM>, <NUM> with a closed loop system and an NMOS transistor <NUM>, the NMOS transistor <NUM> can be changed to a resistor arrangement or other simple amplifier. It is only useful to have amplifier functionality. Moreover, in the current-to-voltage signal converters <NUM>, <NUM>, <NUM>, <NUM> any mosfet type transistors may be changed for BJT type transistors or any other transistor type without deviating from the concept described within this description.

For all of the above designs and circuits, it is possible to add an extra diode from the non-inverting input of the second op-amp <NUM> to electrical ground (i.e. anode is connected to ground). This diode can protect at least one input of the second op-amp <NUM> such that the second op-amp <NUM> always operates within a safe range when the current-to-voltage signal converter <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM> is initially powered up or if the voltage adjustment arrangement <NUM>, <NUM>, <NUM>, <NUM>, <NUM> cannot change the input voltage to the second op-amp <NUM> immediately.

An analog subtractor circuit can be modified with a feedback circuit so that the second op-amp does not 'see' a high voltage signal. The feedback circuit can have many different implementations and it can also be replaced with a feedforward circuit. To protect the low voltage amplifier from this circuit suddenly failing, a passive protection circuit can be used.

Unless the context clearly requires otherwise, throughout the description and the claims, the words "comprise," "comprising," "include," "including," and the like are to be construed in an inclusive sense, as opposed to an exclusive or exhaustive sense; that is to say, in the sense of "including, but not limited to.

The words "coupled" or "connected", as generally used herein, refer to two or more elements that may be either directly connected, or connected by way of one or more intermediate elements. Additionally, the words "herein," "above," "below," and words of similar import, when used in this application, shall refer to this application as a whole and not to any particular portions of this application. Where the context permits, words in the Detailed Description using the singular or plural number may also include the plural or singular number, respectively. The words "or" in reference to a list of two or more items, is intended to cover all of the following interpretations of the word: any of the items in the list, all of the items in the list, and any combination of the items in the list.

Claim 1:
A current-to-voltage signal converter (<NUM>), comprising:
a first stage (<NUM>), configured to convert an input current signal to a first voltage signal;
an analog subtractor circuit (<NUM>) comprising an amplifier (<NUM>), wherein the analog subtractor circuit (<NUM>) is electrically coupled to the first stage (<NUM>) to convert the first voltage signal into a second voltage signal; and
a voltage adjustment arrangement (<NUM>), coupled to a first input of the amplifier, and configured such that the voltage at the first input of the amplifier (<NUM>) is between a first predetermined voltage threshold and a second predetermined voltage threshold, wherein the voltage adjustment arrangement comprises a first reference source (<NUM>), coupled to the first input of the amplifier (<NUM>), wherein the amplifier (<NUM>) comprises the first input and a second input, wherein the first reference source (<NUM>) is coupled to both the first input and the second input, and is a common mode reference (<NUM>), wherein the first stage (<NUM>) is electrically coupled to the first input wherein the input current signal is generated by a photodiode biased by a first reference voltage (Vref);
wherein the first stage (<NUM>) is a trans-impedance amplifier (<NUM>) comprising a voltage input and a current input, wherein the first reference voltage (Vref) is electrically coupled to the voltage input and the input current signal is electrically coupled to the current input, wherein the analog subtractor circuit (<NUM>) further comprises an input electronically coupled to the first reference voltage (Vref).