Patent Description:
One or more embodiments can be applied advantageously to power semiconductor devices.

Various types of semiconductor devices with a plastic package comprise:.

In a power semiconductor device, the current transferred from the high-power section to the output pads of the device can be significant and ribbons or clips are used for that purpose in the place of wires. Wires can still be used to provide electrical coupling to a low-power section (e.g., a controller) in the device.

Ribbons are placed using essentially a wire bonding process.

Clips are placed with a clip attach equipment, and a solder paste is used to connect the clip to pad and die. Solder curing in an oven is applied to provide a solid connection of clips to pad and die.

Conventional clip attachment equipment facilitates achieving an adequate accuracy in chip placement as the clip is applied on die and pad, after which the assembly is transferred to an oven for solder curing.

During this handling and curing process, clips may become displaced from a desired correct position. This may result in a defective final product. Solder thickness and the tendency of the clip to "float" on solder in a fluid state may also lie at the basis of undesired excessive clip tilt.

<CIT> discloses a clip bonded between a lead frame and a component, wherein the clip and the lead frame have engaging sets of cavities and protrusions in order to prevent positional shift during bonding. <CIT> discloses a method of aligning a clip with a lead frame by engaging female/male portions. <CIT> discloses a clip bonded between two electrodes , wherein the clip has a cavity to accommodate a stud bump formed on the bonding surface of one of the electrodes in order to prevent bonding to an oxide layer that is present on the electrode.

An object of one or more embodiments is to contribute in adequately addressing the issues discussed in the foregoing.

According to one or more embodiments, such an object can be achieved via a method having the features set forth in independent method claim <NUM> and corresponding independent device claim <NUM>.

One or more embodiments relate to a corresponding semiconductor device.

The claims are an integral part of the technical teaching on the embodiments as provided herein.

One or more embodiments may provide one or more of the following advantages:.

The edges of features drawn in the figures do not necessarily indicate the termination of the extent of the feature.

In the ensuing description one or more specific details are illustrated, aimed at providing an in-depth understanding of examples of embodiments of this description.

For simplicity and ease of explanation, throughout this description, like parts or elements are indicated in the various figures with like reference signs, and a corresponding description will not be repeated for each and every figure.

In current manufacturing processes of semiconductor devices, plural devices are manufactured concurrently to be separated into single individual device in a final singulation. For simplicity and ease of explanation, the following description will refer to manufacturing a single device.

<FIG> is exemplary of a power semiconductor device <NUM> with a plastic package.

As conventional in the art, the device <NUM> comprises a substrate (leadframe) <NUM> having arranged thereon one or more semiconductor chips or dice. As used herein, the terms chip/s and die/dice are regarded as synonymous.

The figures illustrate by way of example a semiconductor power device <NUM> comprising a low-power section (e.g., a controller die <NUM>) attached on a first die pad 121A in the leadframe <NUM> and a high-power section (e.g., one or more power dice <NUM>) attached on one or more die pads 122A in the lead frame <NUM>, with an array of leads 12B around the die pads 121A, 122A having the dice <NUM> and <NUM> mounted thereon.

The designation "leadframe" (or "lead frame") is currently used (see, for instance the USPC Consolidated Glossary of the United States Patent and Trademark Office) to indicate a metal frame that provides support for an integrated circuit chip or die as well as electrical leads to interconnect the integrated circuit in the die or chip to other electrical components or contacts.

Essentially, a leadframe comprises an array of electrically-conductive formations (or leads, e.g., 12B) that from an outline location extend inwardly in the direction of a semiconductor chip or die (e.g., <NUM>, <NUM>) thus forming an array of electrically-conductive formations from a die pad (e.g., 121A, 122A) configured to have at least one semiconductor chip or die attached thereon. This may be via conventional means such as a die attach adhesive <NUM> (a die attach film or DAF, for instance).

A device as illustrated in <FIG> is intended to be mounted on a substrate such as a printed circuit board (PCB - not visible in the figures), using solder material, for instance.

Electrically conductive formations are provided to electrically couple the semiconductor chip(s) <NUM>, <NUM> to selected ones of the leads (outer pads) 12B in the leadframe <NUM>.

As illustrated, these electrically conductive formations comprise wire bonding patterns <NUM> coupling the low-power section (chip <NUM>) to selected ones of the leads 12B and to the high-power section (chip or chips <NUM>. These wire bonding patterns <NUM> are coupled to die pads <NUM> provided at the front or top surfaces of the chips <NUM> and <NUM>.

Conversely, so-called clips <NUM> are used to couple the high-power section (chip or chips <NUM>) to selected ones of the leads 12B acting as (power) output pads of the device <NUM>.

Using clips <NUM> in the place of wires as included in the wire bonding patterns <NUM> (used to provide electrical coupling to a low-power section e.g., a controller <NUM>) takes into account the fact that the current transferred from the high-power section <NUM> to the output pads in a power semiconductor device may be significant. As noted, wires such as the wires <NUM> are still used to provide electrical coupling to a low-power section (e.g., a controller) in the device.

An insulating encapsulation <NUM> (e.g., an epoxy resin) is molded on the assembly thus formed to complete the plastic body of the device <NUM>.

While the device <NUM> as shown comprises two clips <NUM>, certain devices may comprise just one clip or more than two clips.

A device structure as discussed so far is conventional in the art, which makes it unnecessary to provide a more detailed description herein.

To summarize, for the purposes herein, producing the device <NUM> as discussed herein involves:.

In such a bridge-like position, the electrically conductive clip <NUM> has coupling surfaces facing towards the semiconductor chip <NUM> and the electrically conductive pad 12B.

The electrically conductive clip <NUM> positioned in said bridge-like position is soldered to the semiconductor chip <NUM> and to the electrically conductive pad 12B to provide electrical coupling therebetween.

As illustrated soldering is via soldering material <NUM> dispensed (in a manner known per se to those of skill in the art) at said coupling surfaces. The soldering material <NUM> is consolidated (in a manner likewise known per se to those of skill in the art), e.g., via heat treatment in an oven.

As discussed, clips such as the clip <NUM> are placed using a clip attach equipment and a solder paste <NUM> is used to connect the clip to pad and die. Solder curing in an oven is applied to provide a solid connection of the clips <NUM> to pad (e.g., 12B) and die (e.g., <NUM>).

Conventional clip attachment equipment facilitates achieving an adequate accuracy in chip placement as a clip <NUM> is applied bridge-like between a die such as the die <NUM> and a respective pad/lead such as the pad/lead 12A: this case is considered for simplicity; in certain devices an individual clip <NUM> may be coupled, e.g., to plural pads/leads.

After clip placement the assembly is transferred to an oven for solder curing. During this handling and curing process clips may become displaced from a desired correct position, which may result in a defective final product.

The thickness of the solder <NUM> and the tendency of the clip to "float" on the solder <NUM> in a fluid state may also lie at the basis of undesired excessive clip tilt.

Undesired clip movement (displacement) can be attempted to be countered by adding fixing features in the clip and leadframe design.

Smooth handling may also help along with very accurate clip centering in clip placement.

Selecting solder paste materials countering undesired clip floating properties can also be considered.

None of these solutions appears fully satisfactory, for various reasons.

For instance, certain features added to the clip/leadframe design can be space-consuming, which may suggest reducing pad dimensions and/or using larger package dimensions to gain space, neither of which is attractive/desirable.

Handling of the parts involved is already fairly gentle and further improvements in that directions are hardly conceivable.

Selecting solder paste materials different from those conventionally used may have negative effects in terms of thermal and electrical performance.

Examples as considered herein take advantage from the current availability of equipment (e.g., wire bonding equipment) configured for forming so-called stud bumps in semiconductor device manufacturing processes.

In conventional wire bonding (as used to provide the wire bonding patterns <NUM> discussed previously, for instance) a ball is formed at an end of a wire metal material such as, e.g., aluminum (Al), copper (Cu), and gold (Au), which is bonded to a die pad. The wire is then extended towards a lead where a second wire bond is formed.

If the wire is terminated after the first bond, only a "bump" is formed on the die pad. Such a bump can be used to interconnect to a die that is flip-chipped onto a substrate using a thermo sonic or thermo compression process, for instance.

In examples as considered herein one or more stud bumps <NUM> are formed on a pad/lead 12B to which a clip <NUM> is desired to be coupled. One or more corresponding recesses or cavities <NUM> are formed, e.g., as cylindrical (blind) holes in the clip <NUM> at the surface of the clip <NUM> facing the pad/lead 12B so that the bump or bumps <NUM> can penetrate into these recesses or cavities <NUM>.

The or each bump <NUM>/cavity <NUM> pair can thus provide a centering feature that counters undesired mutual displacement of the clip <NUM> with respect to the pad 12B (and with respect to the substrate <NUM> and the chip or chips <NUM>).

A method as illustrated herein thus comprises, prior to soldering, providing at least one pair of complementary positioning formations such as a cavity <NUM> in the electrically conductive clip <NUM> and a protrusion <NUM> in the electrically conductive pad 12B.

The complementary positioning formations <NUM>, <NUM> become mutually engaged in response to the electrically conductive clip <NUM> being positioned in the desired bridge-like position.

The complementary positioning formations <NUM>, <NUM> thus maintain the clip <NUM> in such a bridge-like position during the soldering process (solder paste delivered and consolidated, e.g., via heat curing in an oven) countering undesired displacement and "floating" onto the solder paste in molten state.

Providing at least two bump <NUM>/cavity <NUM> pairs in the or each clip (see <FIG>, for instance) advantageously counters mutual rotation of the clip <NUM> with respect to the pad 12B, the substrate <NUM> and the chip(s) <NUM>.

Stud bumps such as the stud bump <NUM> can be created and bonded on the pad 12B using otherwise conventional wire bonding technology using, e.g., gold or (less expensive) copper material.

Recesses or cavities <NUM> on a clip <NUM> can be created while producing the clips, e.g., during clip stamping (of metal material such, e.g., copper) to bestow thereon a desired shape.

As visible in <FIG>, a plurality of piled/stacked stud bumps <NUM> can be created to provide anchoring "pillars" configured to penetrate some length into respective recesses <NUM> (e.g., up to the end surface of the recess <NUM>).

As illustrated in <FIG>, one or more "spacer" stud bumps <NUM>' can be formed having no recess counterpart in the clip <NUM> to keep the clip <NUM> (slightly) distanced from the pad 12B to provide a gap of controlled width between the clip <NUM> and the pad 12A.

Such a gap can be penetrated by solder material <NUM>. This arrangement was found to be beneficial in controlling (minimum) solder thickness and countering undesired clip tilt.

Examples as presented herein facilitate maintaining a precise clip "centering" during assembly processes, thus countering undesired displacement (translation, rotation, tilting). Solder thickness can be adequately controlled.

In examples as presented herein, positioning formations <NUM> such as stud bumps are formed protruding from a pad/lead 12B in a leadframe <NUM> and engaging a respective cavity <NUM> (e.g., a blind hole) in the clip <NUM>.

At least in principle, such positioning formations <NUM> could be formed also or only at die pads such as the die pads <NUM> provided (as otherwise conventional in the art) at the front or top surface of a chip or die such as the chip or die <NUM>.

Also, spacer stud bumps such as the stud bump <NUM>' illustrated in the figures could be provided also (or only) on the surface of the clip <NUM>.

It is noted that the presence of the anchoring formation(s) <NUM> protruding from a pad/lead and engaging a respective cavity <NUM> (e.g., a blind hole) in the clip <NUM> will be noticeable also in the final device, that is even after solder material <NUM> is provided between the clip <NUM> and the pad 12B to which the clip is soldered.

Claim 1:
A method, comprising:
arranging at least one semiconductor chip (<NUM>) on a die pad (12A) in a substrate (<NUM>), the substrate (<NUM>) comprising at least one electrically conductive pad (12B) adjacent to the die pad (12A),
positioning at least one electrically conductive clip (<NUM>) in a bridge-like position between the at least one semiconductor chip (<NUM>) and the at least one electrically conductive pad (12B), wherein, in said bridge-like position, the at least one electrically conductive clip (<NUM>) has coupling surfaces facing towards the at least one semiconductor chip (<NUM>) and the at least one electrically conductive pad (12B), and
soldering (<NUM>) the at least one electrically conductive clip (<NUM>) in said bridge-like position to the at least one semiconductor chip (<NUM>) and to the at least one electrically conductive pad (12B) to provide electrical coupling therebetween, wherein soldering is via soldering material (<NUM>) at said coupling surfaces,
wherein the method comprises, prior to positioning the at least one electrically conductive clip (<NUM>) in a bridge-like position between the at least one semiconductor chip (<NUM>) and the at least one electrically conductive pad (12B), providing at least one pair of complementary positioning formations (<NUM>, <NUM>) including a cavity (<NUM>) in the at least one electrically conductive clip (<NUM>) and a protrusion (<NUM>) in at least one of the at least one semiconductor chip (<NUM>) and the at least one electrically conductive pad (12B), wherein, with the at the least one electrically conductive clip (<NUM>) in said bridge-like position, the complementary positioning formations (<NUM>, <NUM>) are mutually engaged and maintain the at least one electrically conductive clip (<NUM>) in said bridge-like position during said soldering,
characterised in that
the protrusion (<NUM>) in the at least one pair of complementary positioning formations (<NUM>, <NUM>) includes a plurality of stacked stud bumps (<NUM>).