Patent Description:
In the related art, in the research and discussion of the 5th Generation mobile communication technologies (<NUM>) project, a synchronization configuration scheme is introduced for realizing symbol synchronization and frame synchronization of a user equipment (UE) based on a synchronization block and a synchronization block set of beam scanning is introduced. In the synchronization configuration scheme, all synchronization blocks in a synchronization block set period of <NUM> at the longest need to be sent out within <NUM>, each synchronization block carries a physical broadcast channel (PBCH) message, and a transmission time interval (TTI) of the PBCH message is agreed well.

In the related art, after receiving one synchronization block, the user equipment can implement a symbol-level timing based on a primary synchronization signal and a secondary synchronization signal in the synchronization block, but the user equipment cannot obtain from the synchronization signal, time index information about in which radio frame in a sending period of <NUM>, which specific time slot in a period of <NUM> of the radio frame or which sub-frame the synchronization block set transmits the synchronization block, or a timing index (TI) information of the synchronization block sent by the sub-frame. In the research and discussion of the <NUM> project, the user equipment is designed to obtain the synchronization information mainly through the PBCH message, but the PBCH resource is very limited, a technical solution for realizing the TI information and the system frame number indicating the synchronization block based on the PBCH message needs to be provided in the <NUM> system on the premise of not wasting the PBCH resource and not increasing the decoding complexity of the user equipment. Related technologies are known from a patent publication document <CIT>, which discloses that a Master Information Block (MIB) carries fundamental system information such as downlink system bandwidth and the system frame number (SFN); and a <NPL>, which discusses NR-PBCH combining for nonadjacent beams and NR-PBCH combining for adjacent beams.

The invention is defined by a method according to claim <NUM>, a user equipment according to claim <NUM> and a non-transitory computer-readable storage medium according to claim <NUM>, so as to effectively indicate a TI and a system frame number of the synchronization block. Further embodiments are included in the dependent claims.

The accompanying drawings, which are incorporated in the specification and constitute a part of the specification, show exemplary embodiments of the present invention. The drawings along with the specification explain the principles of the present disclosure.

Exemplary embodiments will be described in detail herein, examples of which are illustrated in the accompanying drawings. The following description refers to the same or similar elements in the different figures unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. Instead, they are merely examples of devices and methods consistent with aspects of the invention as detailed in the appended claims.

<FIG> is a flowchart illustrating a method for determining a sending time of a synchronization block according to an exemplary embodiment, and <FIG> is a scene diagram illustrating a method for determining a sending time of a synchronization block according to an exemplary embodiment.

<FIG> is a first diagram illustrating a method for determining a sending time of a synchronization block according to an exemplary embodiment, <FIG> is a second diagram illustrating a method for determining a sending time of a synchronization block according to an exemplary embodiment, <FIG> is a schematic structural diagram illustrating a method for determining a sending time of a synchronization block according to an exemplary embodiment. The method for determining the sending time of the synchronization block can be applied to the user equipment. As shown in <FIG>, the method for determining a sending time of a synchronization block includes the following steps <NUM>-<NUM>:.

In step <NUM>, descrambling and decoding processing is performed on a PBCH message carried in a synchronization block, and PBCH symbol data of the PBCH message is buffered.

In one embodiment, a structure of the synchronization block can be seen in <FIG>, which includes a primary synchronization signal, a secondary synchronization signal, the PBCH message, and a demodulation reference signal (DMRS for short) interleaved in a frequency domain.

In one embodiment, after descrambling the PBCH message, the obtained PBCH symbol data may be buffered before demodulation, wherein the PBCH symbol data includes high N bits and a first low data bit of a system frame number and high P bits of the timing index bits of the synchronization block, where N is <NUM> or <NUM>.

In one embodiment, the sending time interval of the PBCH message carried in the synchronization block is <NUM>, and the PBCH message includes the high N bits and the first low data bit of the system frame number and the high P bits of the TI of the synchronization block. In addition to the high P bits of the TI of the synchronization block and the high N bits and the first low data bit of the system frame number explicitly displayed, other TI data bits and system frame number bits are implicit bits for scrambling the PBCH symbol data.

In one embodiment, P may take a natural number not greater than <NUM>, and generally, in order to reduce the descrambling complexity for the UE, the higher the number of explicitly displayed TI bits is, the better, for example, when P takes a value of <NUM>, the number of implicitly displayed TI bits is the first low data bit. In the present application, an alternative embodiment will be described below with P being <NUM>, but the value of P is not limited to <NUM>.

In one embodiment, when N is <NUM>, the implicit bits may include <NUM> bits, which are the second and the third low data bits of the system frame number and the first low data bit of the time indication bit of the synchronization block. There are <NUM> possibilities for the implicit 3bits, and the scrambling codes may be <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, and <NUM>, respectively, the PBCH merge period is <NUM>, which means there are four <NUM>, that is, <NUM> PBCH messages are the same in the <NUM> period. After the UE receives the synchronization block, the occurrence location of the synchronization block in the PBCH merge period may be determined based on the scrambling code that can successfully decode the PBCH message. Referring to <FIG>, which illustrates that the implicit bits are the second and the third low data bits of the system frame number and the first low data bit of the time indication bit of the synchronization block, the PBCH symbol data carried in the synchronous block marked by <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, and <NUM> in the figure is PBCH symbol data that can be used for merging.

In one embodiment, when N is <NUM>, the implicit bits may include <NUM> bits, which are the second low data bit of the system frame number and the first low data bit of the time indication bit of the synchronization block. There are <NUM> possibilities for the implicit 2bits, and the scrambling codes may be <NUM>, <NUM>, <NUM> and <NUM>, respectively, the PBCH merge period is <NUM>, which means there are two <NUM>, that is, <NUM> PBCH messages are the same in the <NUM> period. After the UE receives the synchronization block, the occurrence location of the synchronization block in the PBCH merge period may be determined based on the scrambling code that can successfully decode the PBCH message. Referring to <FIG>, which illustrates that the implicit bits are the second low data bit of the system frame number and the first low data bit of the time indication bit of the synchronization block, the PBCH symbol data carried in the synchronous block marked by <NUM>, <NUM>, <NUM> and <NUM> in the figure is PBCH symbol data that can be used for merging.

In step <NUM>, after the descrambling succeeds and the decoding fails, PBCH symbol data to be merged which is the same as buffered PBCH symbol data is acquired.

In one embodiment, the PBCH symbol data to be merged includes PBCH symbol data of a beam which is the same as the beam where the synchronous block is located and PBCH symbol data of an adjacent beam in a PBCH merge period. The system frame number of the PBCH symbol data to be merged and the TI of the corresponding synchronization block is the same as the buffered PBCH symbol data. For example, if the scrambling code of the buffered PBCH symbol data in <FIG> is <NUM>, then the PBCH symbol data carried in the synchronization blocks with reference numbers <NUM>-<NUM> is the PBCH symbol data to be merged.

In step <NUM>, the buffered PBCH symbol data and the PBCH symbol data to be merged are merged until the PBCH symbol data can be decoded correctly.

The buffered PBCH symbol data is first merged with the PBCH symbol data of the adjacent beam in the same synchronization block set. The PBCH symbol data labeled <NUM> and <NUM> in <FIG> is merged and then decoded, and if the decoding is still unsuccessful, then the PBCH symbol data is merged with the PBCH symbol data in the next <NUM>, such as PBCH symbol data labeled <NUM> and <NUM>.

In one embodiment, as will be understood by those skilled in the art, the user equipment may not be able to monitor the synchronization blocks of the adjacent beams, and when the synchronization blocks of the adjacent beams cannot be monitored, only the PBCH symbol data carried by the synchronization blocks monitored under the same beam in the PBCH merge period may be merged.

In one embodiment, when the PBCH merge period is <NUM>, the base station may puncture the SSB transmission based on the requirement of power saving, that is, send the synchronization block once every transmission period in a certain direction, referring to <FIG>, in a certain direction, only the synchronization blocks labeled <NUM>, <NUM>, <NUM>, and <NUM> may be sent, and on this premise, in the <NUM> PBCH period, the user equipment may still perform the combining operation of the PBCH symbol data.

In an exemplary scenario, as shown in <FIG>, in the scenario shown in <FIG>, the base station <NUM> and the user equipment (e.g. a smart phone, a tablet computer, etc.) <NUM> are included, wherein the base station <NUM> may carry the high N bits and a first low data bit of the system frame number and the high P bits of the timing index bits of the synchronization block in PBCH symbol data of a synchronization block, where N is <NUM> or <NUM>, so that the user equipment <NUM> may obtain PBCH symbol data to be merged based on the scrambling code when decoding the PBCH fails after receiving the synchronization block. Since the number of the scrambling code bits can be at least two or three bits, it is achieved that the TI and the system frame number of the synchronization block are effectively indicated by the PBCH symbol data, and the descrambling complexity for the user equipment is not increased greatly on the basis of achieving the decoding the merged PBCH symbol data.

Through the above steps <NUM>-<NUM>, the present embodiment can achieve that the TI and the system frame number of the synchronization block are effectively indicated by the PBCH symbol data, and the descrambling complexity for the user equipment is not increased greatly on the basis of achieving the decoding the merged PBCH symbol data.

In one embodiment, the acquiring PBCH symbol data to be merged which is the same as buffered PBCH symbol data includes:.

In one embodiment, the merging the buffered PBCH symbol data and the PBCH symbol data to be merged includes:.

In one embodiment, when the scrambling code bits are 2bits system frame number bits and a <NUM>-bit timing index bit of the synchronization block, the PBCH merge period is <NUM>.

In one embodiment, when the scrambling code bits are <NUM>-bit system frame number bits and <NUM>-bit timing index bit of the synchronization blocks, the PBCH merge period is <NUM>.

In one embodiment, before the performing descrambling and decoding processing on PBCH message carried in the synchronous block, the method for determining the sending time of the synchronization block may further include:.

In one embodiment, the PBCH symbol data includes high N bits and a first low data bit of a system frame number and high P bits of the timing index bits of the synchronization block, where N is <NUM> or <NUM>, and P is a natural number not greater than <NUM>.

Specifically, how to determine the sending time of the synchronization block, please refer to the subsequent embodiments.

The technical solution provided by the embodiment of the present disclosure is described in the following specific embodiment.

<FIG> is a flowchart illustrating another method for determining a sending time of a synchronization block according to an exemplary embodiment, <FIG> is a flowchart of a method for acquiring PBCH symbol data to be merged which is the same as buffered PBCH symbol data in the embodiment shown in <FIG>, and <FIG> is a flowchart of a method for merging the buffered PBCH symbol data and the PBCH symbol data to be merged in the embodiment shown in <FIG>. The present embodiment uses the above method provided by the embodiment of the present disclosure to illustrate how the UE determines the sending time of the synchronization block. As shown in <FIG>, the following steps are included:.

In step <NUM>, the synchronous block is monitored.

In step <NUM>, after monitoring the synchronization block, symbol synchronization is completed based on the primary synchronization signal and the secondary synchronization signal.

In one embodiment, after the synchronization block is received, the primary synchronization signal is first demodulated and decoded, and then the secondary synchronization signal is demodulated and decoded, and symbol synchronization is completed based on the demodulated and decoded primary and secondary synchronization signals.

In step <NUM>, descrambling and decoding processing are performed on the PBCH message carried in the synchronization block, and the PBCH symbol data of the PBCH message is buffered.

In one embodiment, the description of the step <NUM> may refer to the description of the step <NUM> of the embodiment shown in <FIG>, which is not described in detail herein.

In one embodiment, the method for acquiring PBCH symbol data to be merged which is the same as buffered PBCH symbol data can be seen in the embodiment shown in <FIG>. As shown in <FIG>, the following steps are included:
in step <NUM>, an occurrence position of the synchronous block signal in the PBCH merge period is determined based on a scrambling code of the PBCH message.

In one embodiment, based on the number of bits of the scrambling code, it may be determined the number of the PBCH messages in the PBCH merge period that are the same, so that the user equipment may determine the occurrence position of the PBCH symbol data in the merge period based on the scrambling code of the received synchronization block. For example, referring to <FIG>, the number of bits of the scrambling code is <NUM> bits, and when the user equipment receives the PBCH symbol data with the scrambling code of <NUM>, it may determine that the exact position of the PBCH symbol data in the <NUM> merge period is carried in the synchronization block labeled <NUM> in the figure.

In step <NUM>, the PBCH symbol data to be merged which is the same as the buffered PBCH symbol data in the PBCH merge period is determined, based on the occurrence position.

In one embodiment, the PBCH symbol data to be merged includes PBCH symbol data of a beam which is the same as the beam where the synchronous block is located and PBCH symbol data of an adjacent beam in a PBCH merge period.

In step <NUM>, the PBCH symbol data to be merged is monitored in a sending window of the PBCH symbol data to be merged.

In one embodiment, the system may generally make an agreement that the half-frame position sending by the synchronization block of the same cell is kept unchanged, so that after the PBCH symbol data to be merged is determined, a sending window for transmitting the PBCH symbol data to be merged in the next transmission period may be determined, and further, the synchronization block may be monitored within <NUM> of the sending window, and the PBCH symbol data to be merged may be acquired by descrambling.

In step <NUM>, the buffered PBCH symbol data is merged with the PBCH symbol data to be merged until the PBCH symbol data can be correctly decoded.

In one embodiment, the description of step <NUM> may refer to the embodiment shown in <FIG>. As shown in <FIG>, the following steps are included:
in step <NUM>, PBCH symbol data of an adjacent beam located in the same synchronous block set as the synchronous block is acquired, and when the PBCH symbol data of an adjacent beam located in the same synchronous block set as the synchronous block is acquired, step <NUM> is executed, and when PBCH symbol data of an adjacent beam located in the same synchronous block set as the synchronous block is not acquired, step <NUM> is executed.

For example, referring to <FIG>, if the currently buffered PBCH symbol data is PBCH symbol data in a synchronization block with scrambling code being <NUM> and PBCH symbol data in a synchronization block with scrambling code being <NUM> of an adjacent beam is monitored, two PBCH symbol data may be merged first.

In step <NUM>, the buffered PBCH symbol data and the PBCH symbol data to be merged in the next synchronization block set in the PBCH merge period are merged and performed decoding processing, until the decoding is successful or there is no PBCH symbol data capable of being merged in the PBCH merge period.

In step <NUM>, the buffered PBCH symbol data and the PBCH symbol data of the adjacent beam located in the same synchronous block set as the synchronous block are merged.

In step <NUM>, the merged PBCH symbol data is performed decoding processing.

In step <NUM>, if the decoding fails, the merged PBCH symbol data and the PBCH symbol data to be merged in the next synchronization block set in the PBCH merge period are merged and decoded until the decoding succeeds or there is no PBCH symbol data capable of being merged in the PBCH merge period.

In the embodiment, through the above steps <NUM> to <NUM>, it is achieved that the occurrence position of the PBCH symbol data in the merge period can be determined based on the scrambling code of the PBCH message, so as to determine the sending window of the PBCH symbol data to be merged, and obtain the PBCH symbol data to be merged. It is achieved that the TI and the system frame number of the synchronization block are effectively indicated by the PBCH symbol data, and the descrambling complexity for the user equipment is not increased greatly on the basis of achieving the decoding the merged PBCH symbol data.

<FIG> is a flowchart illustrating a method for determining a sending time of a synchronization block according to an exemplary embodiment; the method for determining the sending time of the synchronization block can be applied to a base station. As shown in <FIG>, the method for determining the sending time of the synchronization block includes the following steps <NUM>-<NUM>:
in step <NUM>, coded PBCH symbol data is scrambled and modulated based on an agreed scrambling code to obtain a PBCH message.

In one embodiment, the PBCH symbol data includes high N bits and a first low data bit of a system frame number and high P bits of timing index bits of the synchronization block, where P is a natural number not greater than <NUM>.

In one embodiment, in addition to the high N bits and the first low data bit of the system frame number, other bits are used as scrambling codes, and the first low data bit of the timing index bits of the synchronization block is used as scrambling codes, which are used for scrambling PBCH symbol data.

In step <NUM>, the synchronization block is sent based on a preset sending mode, wherein the synchronous block carries the PBCH message.

In one embodiment, the preset sending mode may be a first agreed mode, wherein the first agreed mode is used for indicating that the synchronization blocks in each direction is sent based on a punching mode, and the first agreed mode is beneficial to saving the resources of the base station; In one embodiment, the preset sending mode may be a second agreed mode, wherein the second agreed mode is used for indicating that the synchronization block is sent in each direction in each synchronization block sending period.

In one embodiment, the sending the synchronous block based on a preset sending mode includes:.

<FIG> is a flowchart illustrating another method for determining a sending time of a synchronization block according to an exemplary embodiment; the present embodiment uses the above method provided by the embodiment of the present disclosure to exemplify how to send a synchronization block as an example. As shown in <FIG>, and the following steps are included:
in step <NUM>, the coded PBCH symbol data is scrambled and modulated based on the agreed scrambling code to obtain a PBCH message, and step <NUM> or step <NUM> is executed.

In step <NUM>, the synchronization blocks are sent based on a first agreed manner, wherein the first agreed mode is used for indicating that the synchronization blocks in each direction is sent based on a punching mode.

In one embodiment, when N is <NUM>, the PDCH merge period length is <NUM>, and there are <NUM> PBCH symbol data capable of being merged, and generally, the PBCH can be successfully decoded without being merged with so much PBCH symbol data, so a puncturing manner can be used to transmit the synchronization block in each direction. Referring to <FIG>, in the period of <NUM>, only the synchronization blocks labeled <NUM>, <NUM>, <NUM>, and <NUM> can be transmitted in a certain direction, while the synchronization blocks labeled <NUM>, <NUM>, <NUM>, and <NUM> are not transmitted, thereby saving the resources of the base station.

In one embodiment, when N is <NUM>, the synchronization block is not usually sent in the first agreed manner in order to ensure effective merging of the PBCH symbol data.

In step <NUM>, the synchronization block is sent based on a second agreed manner, wherein the second agreed mode is used for indicating that the synchronization block is sent in each direction in each synchronization block sending period.

In one embodiment, the synchronization block may be sent in the second agreed manner when N is <NUM> or N is <NUM>.

In the embodiment, through the above steps <NUM>-<NUM>, the base station may puncture the transmission of the synchronization block according to the energy saving requirement, that is, the synchronization block is sent in the first agreed manner. On the basis of achieving the decoding the merged PBCH symbol data, the resources of the base station may be saved.

<FIG> is a block diagram illustrating a device for determining a sending time of a synchronization block, which is applied to a user equipment. As shown in <FIG>, the device for determining a sending time of a synchronization block includes:.

<FIG> is a block diagram illustrating another device for determining a sending time of a synchronization block. As shown in <FIG>, on the basis of the embodiment shown in <FIG>, the data acquisition module <NUM> includes:.

In one embodiment, the merge module <NUM> includes:.

In one embodiment, the device further includes:.

<FIG> is a block diagram illustrating a device for determining a sending time of a synchronization block according to an exemplary embodiment, which is applied to a base station. As shown in <FIG>, the device for determining a sending time of a synchronization block includes:.

<FIG> is a block diagram illustrating another device for determining a sending time of a synchronization block according to an exemplary embodiment. As shown in <FIG>, on the basis of the embodiment shown in <FIG>. In one embodiment, the sending module <NUM> includes:.

The specific manner in which the various modules perform the operations with respect to the device in the above embodiments has been described in detail with respect to embodiments of the method and will not be explained in detail herein.

<FIG> is a block diagram illustrating a device adapted to determine a sending time of a synchronization block according to an exemplary embodiment. The device <NUM> may be provided as a base station. Referring to <FIG>, the device 900includes a processing component <NUM>, a wireless transmitting/receiving component <NUM>, an antenna component <NUM>, and a signal processing portions specific to the wireless interface. The processing component <NUM> may further include one or more processors.

One of the processors in the processing component <NUM> may be configured to perform the above method for determining a sending time of a synchronization block.

In an exemplary embodiment, a non-transitory computer readable storage medium comprising instructions is provided, wherein the instructions can be executed by the processing component <NUM> of the device <NUM> to perform the method described in the second aspect above. For example, the non-transitory computer-readable storage medium may be a ROM, a random-access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, and the like.

<FIG> is a block diagram illustrating a device adapted to determine a sending time of a synchronization block according to an exemplary embodiment. For example, the device <NUM> may be a mobile device, such as a smartphone.

The processing component <NUM> typically controls the overall operations of the device <NUM>, such as the operations associated with display, telephone calls, data communications, camera operations, and recording operations. The processing component <NUM> can include one or more processors <NUM> to execute instructions to perform all or part of the steps in the above described methods. Moreover, the processing component <NUM> can include one or more modules to facilitate the interaction between the processing component <NUM> and other components. For example, the processing component <NUM> can include a multimedia module to facilitate the interaction between the multimedia component <NUM> and the processing component <NUM>.

Examples of such data include instructions for any application or method operated on device <NUM>, such as the contact data, the phone book data, messages, pictures, videos, and the like. The memory <NUM> can be implemented by any type of volatile or non-volatile storage device, or a combination thereof, such as a static random access memory (SRAM), an electrically erasable programmable read-only memory (EEPROM), an erasable programmable read-only memory (EPROM), a programmable read-only memory (PROM), a read-only memory (ROM), a magnetic memory, a flash memory, a magnetic or optical disk.

The power component <NUM> can include a power management system, one or more power sources, and other components associated with the generation, management, and distribution of power in the device <NUM>.

The multimedia component <NUM> includes a screen providing an output interface between the device <NUM> and the user t. In some embodiments, the screen can include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes the touch panel, the screen can be implemented as a touch screen to receive input signals from the user. When the device <NUM> is in an operation mode, such as a photographing mode or a video mode, the front camera and/or the rear camera can receive external multimedia datum.

The audio component <NUM> is configured to output and/or input an audio signal. For example, the audio component <NUM> includes a microphone (MIC) configured to receive an external audio signal when the device <NUM> is in an operation mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signal may be further stored in the memory <NUM> or sent via the communication component <NUM>. In some embodiments, the audio component <NUM> also includes a speaker for outputting the audio signal.

These buttons may include, but are not limited to, a home button, a volume button, a starting button, and a locking button.

The sensor component <NUM> includes one or more sensors for providing status assessments of various aspects of the device <NUM>. For example, the sensor component <NUM> can detect an open/closed status of the device <NUM>, relative positioning of components, such as the display and the keypad of the device <NUM>. The sensor component <NUM> can also detect a change in position of one component of the device <NUM> or the device <NUM>, the presence or absence of user contact with the device <NUM>, an orientation, or an acceleration/deceleration of the device <NUM>, and a change in temperature of the device <NUM>. The sensor component <NUM> can include a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor component <NUM> can also include a light sensor, such as a CMOS or CCD image sensor, configured to use in imaging applications. In some embodiments, the sensor component <NUM> can also include an accelerometer sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

The communication component <NUM> is configured to facilitate wired or wireless communication between the device <NUM> and other devices. The device <NUM> can access a wireless network based on a communication standard, such as WiFi, <NUM> or <NUM>, or a combination thereof. In an exemplary embodiment, the communication component <NUM> receives broadcast signals or broadcast associated information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component <NUM> also includes a near field communication (NFC) module to facilitate short-range communications. For example, the NFC module can be implemented based on a radio frequency identification (RFID) technology, an infrared data association (IrDA) technology, an ultra-wideband (UWB) technology, a Bluetooth (BT) technology, and other technologies.

In an exemplary embodiment, the device <NUM> may be implemented with one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable Gate array (FPGA), controller, microcontroller, microprocessor or other electronic components, for performing the method for determining a sending time of a synchronization block described above.

In an exemplary embodiment, there is also provided a non-transitory computer- readable storage medium including instructions, such as a memory <NUM> including instructions executable by the processor <NUM> of the device <NUM> to perform the above described method. For example, the non-transitory computer readable storage medium may be a ROM, a random-access memory (RAM), a CD-ROM, a magnetic tape, a floppy disc, and an optical data storage device.

Claim 1:
A method for determining a sending time of a synchronization block, said method being performed by a user equipment (<NUM>) and comprising:
performing (<NUM>) descrambling and decoding processing on a PBCH message carried in the synchronization block, and buffering PBCH symbol data of the PBCH message before demodulation;
when the descrambling succeeds and the decoding fails, acquiring (<NUM>) PBCH symbol data to be merged, which are same as buffered PBCH symbol data, wherein the PBCH symbol data to be merged comprise PBCH symbol data of a beam, which is same as a beam where the synchronization block is located, and PBCH symbol data of an adjacent beam, during a PBCH merge period; and
merging (<NUM>) the buffered PBCH symbol data and at least the PBCH symbol data to be merged until the PBCH symbol data can be correctly decoded,
wherein the merging the buffered PBCH symbol data and at least the PBCH symbol data to be merged comprises:
acquiring (<NUM>) the PBCH symbol data of the adjacent beam located in the same synchronization block set as the synchronization block;
merging (<NUM>) the buffered PBCH symbol data and the PBCH symbol data of the adjacent beam located in the same synchronization block set as the synchronization block to obtain merged PBCH symbol data, after acquiring the PBCH symbol data of the adjacent beam in the same synchronization block set;
performing (<NUM>) decoding processing on the merged PBCH symbol data; and
if the decoding of the merged PBCH symbol data fails, merging and decoding the merged PBCH symbol data and at least PBCH symbol data to be merged in a next synchronization block set in the PBCH merge period until the decoding succeeds or there is no PBCH symbol data capable of being merged in the PBCH merge period in a case where the decoding fails,
wherein the PBCH symbol data comprises high N bits and a first low data bit of a system frame number and high P bits of timing index bits of the synchronization block, where N is <NUM> or <NUM>, and P is a natural number not greater than <NUM>.