Patent Description:
Sensors are widely used in electronic devices to measure attributes of the environment and report a measured sensor value. In particular, magnetic sensors are used to measure magnetic fields, for example in transportation systems such as automobiles. Magnetic sensors can incorporate Hall-effect sensors that generate an output voltage proportional to an applied magnetic field or can incorporate magneto-resistive materials whose electrical resistance changes in response to an external magnetic field. In many applications, it is desirable that magnetic sensors are small and sensitive and are integrated with electronic processing circuitry so as to reduce the overall magnetic sensor size and provide improved measurements and integration into external electronic systems.

<CIT> describes a Hall-effect magnetic sensor for measuring magnetic fields incorporating an integrated circuit formed in a semiconductor material on a substrate, together with insulation and adhesion layers. An adhesion layer and an insulation layer are formed on the integrated circuit substrate and the Hall-effect sensing element is located on the adhesion layer. A passivation layer is formed over the Hall-effect sensing element. <CIT> teaches a magnetic flux converging plate on an adhesive layer coated over a semiconductor substrate with a magnetic sensor on an opposite side of the semiconductor substrate. <CIT> discloses a magnetic sensor with a substrate with Hall sensor elements, a protective layer disposed on the substrate, a base layer on the protective layer and an integrated magnetic concentrator on the base layer.

<CIT> describes a sensor for the detection of the direction of a magnetic field having magnetic flux concentrators and Hall elements. Magnetic flux concentrators are metal structures with soft magnetic characteristics that can amplify a magnetic field, such as a planar magnetic field, and can be used to convert the field into a differential vertical field. The Hall elements are arranged in an area near the edge of the magnetic field concentrator. The magnetic flux concentrator is disposed on a semiconductor chip, for example a CMOS integrated circuit, in which the Hall-effect sensors are formed in either a vertical or horizontal configuration. The magnetic flux concentrator is positioned over the semiconductor chip.

<CIT> describes a substrate having a depression into which a magnetic material is disposed. The magnetic material forms a magnetic flux concentrator and a magnetic field sensing element can be disposed proximate to the depression. <CIT> proposes an integrated magnetic sensor, which is formed by a body of semiconductor material having a surface, an insulating layer covering said body, a magnetically sensitive region (e.g. a Hall cell), extending inside the body and a concentrator of ferromagnetic material, extending on the Hall cell and having a planar portion extending parallel to the surface of the Substrate on the insulating layer. The concentrator terminates with a tip protruding peripherally from, and transversely to, the planar portion toward the Hall cell.

Integrated circuits can have very small components or structures, for example having sizes in the tens of microns, or even less. It is therefore desirable to reduce the size of integrated magnetic sensors as well, but it can be difficult to combine magnetic sensing structures with a magnetic flux concentrator to provide adequate sensitivity.

Magnetic flux concentrators (MFCs) are also known as integrated magnetic concentrators (IMCs).

There is a need therefore, for space-efficient and small structures and effective methods for providing magnetic flux concentrators for a variety of purposes, including magnetic-field sensing.

It is an object of embodiments of the present invention to provide for a structure and method to embed magnetic-flux-concentrator in an integrated circuit in a space-efficient way.

The above objective is accomplished by the solution according to the present invention.

According to some embodiments of the present invention, a magnetic-flux-concentrator structure comprises: a substrate; a first metal layer comprising (i) a first wire layer disposed on or over the substrate, said first wire layer comprising first wires conducting electrical signals, and (ii) a first dielectric layer disposed on the first wire layer; a second metal layer comprising (i) a second wire layer disposed on or over the first metal layer, said second wire layer comprising second wires conducting electrical signals, and (ii) a second dielectric layer disposed on the second wire layer; and a magnetic flux concentrator (MFC) disposed in or on the first metal layer, or in or on the second metal layer, or in both the first and the second metal layers. The MFC can be disposed on or comprise a first wire or a second wire.

According to some embodiments of the present invention, the magnetic flux concentrator has (i) a lateral dimension of <NUM> microns or less, <NUM> microns or less, or <NUM> microns or less, (ii) the magnetic flux concentrator has a thickness of <NUM> microns or less, <NUM> microns or less, or <NUM> microns or less, or (iii) both (i) and (ii).

According to some embodiments of the present invention, the second dielectric layer comprises an MFC via and the magnetic flux concentrator is disposed at least partially in the MFC via.

According to some embodiments of the present invention, a magnetic-flux-concentrator structure comprises: a substrate; a first metal layer comprising (i) a first wire layer disposed on or over the substrate, said first wire layer comprising first wires conducting electrical signals, and (ii) a first dielectric layer disposed on the first wire layer; a second metal layer comprising (i) a second wire layer disposed on or over the first metal layer, said second wire layer comprising second wires conducting electrical signals, and (ii) a second dielectric layer disposed on the second wire layer; and a magnetic flux concentrator (MFC) disposed at least partially in the first metal layer, in the second metal layer, or in both the first and the second metal layers. The MFC can be disposed on or comprise a first wire or a second wire.

According to some embodiments of the present invention, one or more wires are disposed in or on the substrate, the wires forming one or more coils around the magnetic flux concentrator. The one or more coils around the magnetic flux concentrator can form a transformer or an electromagnet.

According to some embodiments of the present invention, the substrate is a semiconductor substrate comprising an electronic circuit disposed in or on the semiconductor substrate and wherein the electronic circuit has a feature size less than or equal to <NUM>, less than or equal to <NUM>, or less than or equal to <NUM>. According to some embodiments of the present invention, (i) the first wires are electrically connected to the electronic circuit, (ii) the second wires are electrically connected to the electronic circuit, or (iii) both (i) and (ii).

According to some embodiments of the present invention, the magnetic-flux-concentrator structure comprises a magnetic sensor disposed at least partially in the first metal layer, between the substrate and the first metal layer, in the substrate or on a side of the substrate opposite the magnetic flux concentrator. According to some embodiments of the present invention, (i) the first wires are electrically connected to the magnetic sensor, (ii) the second wires are electrically connected to the magnetic sensor, or (iii) both (i) and (ii). According to some embodiments of the present invention, at least a portion of the magnetic sensor is within <NUM> microns, <NUM> microns, <NUM> microns, <NUM> microns, <NUM> microns or <NUM> micron of the magnetic flux concentrator. According to some embodiments of the present invention, the magnetic sensor is a Hall-effect sensor comprising a sensing plate. The sensing plate can be disposed in a doped semiconductor region of the substrate, for example under the first metal layer as an n-doped diffusion portion of the substrate in a CMOS circuit or a magnetic-sensor circuit. Such a portion of the substrate can comprise further dielectric and conductive layers.

According to some embodiments of the present invention, the magnetic flux concentrator comprises a core disposed at least partially in the second dielectric layer and a stress-reduction layer disposed in the second wire layer. According to some embodiments of the present invention, the stress-reduction layer has a ductility greater than a ductility of the magnetic flux concentrator, the stress-reduction layer is electrically conductive, or the stress-reduction layer is or comprises a ductile metal found in CMOS or magnetic-sensor circuits, for example aluminium, or any combination of these. According to some embodiments, the stress-reduction layer is a multi-layer comprising a first layer that is electrically conductive and ductile and a second layer that is a seed layer, the second layer disposed on the first layer. The seed layer can provide a compatible surface for electro-plating the core and can be electrically connected to the substrate for providing electro-plating current.

According to some embodiments of the present invention, the magnetic flux concentrator is electrically connected to an electrical connection in the first metal layer or to the substrate, for example the stress-reduction layer is in electrical contact with the core and to the substrate or to a first wire in the first metal layer for electroplating the core.

According to some embodiments of the present invention, the magnetic flux concentrator is mechanically isolated from the dielectric layer(s) in which it is formed.

According to some methods of the present invention, a magnetic-flux-concentrator structure is constructed by providing a substrate, forming one or more metal layers on or over the substrate, each metal layer comprising a wire layer and a dielectric layer disposed over the wire layer, forming an MFC via in one or more of the dielectric layers, and disposing a magnetic flux concentrator in the MFC via. According to embodiments of the present invention, the magnetic flux concentrator comprises a stress-reduction layer and a core and is disposed in the MFC via by etching one or more dielectric layers to expose a wire having a two-dimensional area (e.g., a contact area or contact pad) in a wire layer. The exposed wire is electrically connected to a current source and the core is electroplated on the two-dimensional area of the exposed wire. The area of the exposed wire can form a stress-reduction layer between the core and the substrate.

According to some embodiments of the present disclosure, the electrical connection between the current source and the exposed wire can be electrically connected to a seal ring of a CMOS circuit for controlling the MFC. Thus, the exposed area is electrically contacted to the wafer substrate and the seal ring provides a substrate contact for all metal layers through which a plating current can be provided to all exposed areas by simply connecting the wafer edge to a current source. The substrate distributes the electro-plating current to all seal rings and from the seal rings to all exposed areas. As the seal rings have a high conductivity and have a relatively large contact area, the seal rings lower the resistance of the substrate. Thus, according to some embodiments, the magnetic-flux-concentrator structure comprises an electronic circuit and a seal ring disposed around the electronic circuit, and the seed layer is electrically connected to the substrate through the seal ring.

According to some embodiments of the present disclosure, a method of making a magnetic-flux-concentrator structure comprises providing a substrate, disposing a first metal layer on or over the substrate, the first metal layer comprising (i) a first wire layer disposed on or over the substrate, the first wire layer comprising first wires conducting electrical signals, and (ii) a first dielectric layer disposed on the first wire layer, disposing a second metal layer on or over the first metal layer, the second metal layer comprising (i) a second wire layer disposed on or over the first metal layer, the second wire layer comprising second wires conducting electrical signals, and (ii) a second dielectric layer disposed on the second wire layer, and disposing a magnetic flux concentrator in or on the first metal layer, or in or on the second metal layer, or in both the first and the second metal layers. Some embodiments comprise disposing an electroplating seed layer on the second wire layer before disposing the second dielectric layer.

Embodiments of the present invention provide space-efficient and small magnetic sensors with integrated magnetic flux concentrators that provide improved sensitivity in a semiconductor device.

The foregoing and other objects, aspects, features, and advantages of the present disclosure will become more apparent and better understood by referring to the following description taken in conjunction with the accompanying drawings.

Embodiments of the present invention provide structures and methods for integrating magnetic flux concentrators (MFCs) or integrated magnetic concentrators (IMCs) within the metal layers provided in an integrated circuit structure. Integrated circuits can comprise a semiconductor substrate in which active electronic components are formed and patterned metal layers interconnecting the electronic components on or above the semiconductor substrate. The MFCs in the metal layers can be used for a variety of purposes, including, for example, magnetic-field sensing, alternating current voltage transformation (a transformer), voltage conversion and active magnetic-field generation. Circuits and wires can be provided with the MFCs to control the integrated circuit structure, for example to sense magnetic fields or to otherwise employ magnetic fields in electronic or magnetic systems. Some embodiments of the present disclosure can use Hall-effect magnetic sensors.

By integrating MFCs in an integrated circuit structure within a conventional integrated circuit work flow, smaller and more sensitive devices can be provided with reduced manufacturing costs. Embodiments of the present invention provide a structure and a method to embed a magnetic concentrator inside the metal layer stack of an integrated circuit and therefore decreases the distance between a magnetic flux concentrator and magnetic sensor under or in the metal stack, reducing device size, increasing device sensitivity, and reducing manufacturing steps. Embodiments of the present invention also enable inductors or wire coils formed in integrated circuit metal layers.

Integrated circuits are widely used in electronic systems to control or operate a system or to sense, respond to or affect environmental attributes. Such integrated circuits are generally formed in a semiconductor substrate. With appropriate processing, the semiconductor substrate can provide sensing and operational electronic circuits (e.g., control circuits and Hall-effect magnetic sensors). In a typical integrated circuit manufacturing process, transistors are first formed directly in a semiconductor substrate, for example a silicon substrate, using front-end-of-line processes that, for example, form doped transistor sources and drains and form dielectric gate structures on a process side of the semiconductor substrate. Hall-effect plates are typically also formed on the process side of the semiconductor substrate. Once the various semiconductor devices have been constructed, they are electrically connected through wires formed in one or more patterned metal layers disposed in a stack on the semiconductor process side to form electrically connected circuits. The metal layers are typically constructed using back-end-of-line processes by blanket depositing a metal layer and then using photoresists patterned with light through masks that can be etched to form patterned wires. Multiple metal layers of patterned wires are often needed. For complex circuits, four or more layers can be used. Wires in each metal layer can be isolated from wires in layers above or below with a dielectric layer. Electrical interconnections between the layers are formed through vias etched in the intervening dielectric layer and filled or coated with an electrically conductive metal. The various layers are usually planarized to provide a flat surface on which the optical photolithography equipment can maintain an exact focus over the large areas of current semiconductor wafers. The wires in the metal layers can electrically conduct power and ground signals as well as analog or digital information signals, such as control or data signals. The wires in the metal layers can be information signal conductors or form ground or power planes or can have an effective two-dimensional area as a contact pad or contact area.

Referring to <FIG>, conventional magnetic flux concentrators (MFC) <NUM> comprise a core <NUM> provided on a polyimide layer <NUM> disposed on a semiconductor substrate <NUM>. Magnetic sensors <NUM> can comprise Hall-effect plates through which a current is conducted in a magnetic field concentrated by MFC <NUM> and across which the voltage is measured to determine the magnetic field magnitude. The Hall-effect plates are typically disposed at the edges of core <NUM>. Circuits, for example analog or digital circuits, CMOS circuits, bipolar circuits, or mixed signal circuits, can be provided to control, sense or otherwise employ electrical signals or currents in conjunction with MFC <NUM> and an ambient external or a generated magnetic field. Such circuits can also comprise dielectric and wire layers.

Because cores <NUM> typically comprise a magnetic metal, such as iron or cobalt, or comprise iron alloys, such as nickel-iron, and have a coefficient of thermal expansion (CTE) quite different from the coefficient of thermal expansion of substrate <NUM> on which MFC <NUM> is disposed, for example a semiconductor substrate, when the device is operated and heats up, the mechanical stress produced by the differences in CTE of MFC <NUM> and substrate <NUM> can cause the device to fail. To help mitigate such mechanical stress, a stress-reduction layer can be provided between MFC <NUM> and substrate <NUM>, for example a layer <NUM> of organic material such as polyimide. Typical integrated circuits of the prior art employ one or more protective passivation layers and a stress buffer, such as polyimide layer <NUM>, placed between magnetic-flux-concentrator core <NUM> and the passivation assures that the thermal expansion of magnetic-flux-concentrator core <NUM> with respect to substrate <NUM> does not damage the passivation of the circuit.

The magnetic gain of a magnetic flux concentrator is proportional to the ratio of its diameter and thickness and the distance from the edge of the magnetic flux concentrator to the magnetic sensor. As a consequence, in a conventional structure the distance between the surface of substrate <NUM> with the Hall-effect plates and the edge of magnetic-flux-concentrator <NUM> is determined by the thickness of the metal layer stack <NUM> of the integrated circuit and the stress buffering layer (e.g., polyimide layer <NUM>), for example <NUM> microns or more in a CMOS integrated circuit with more than four metal layers and a polyimide stress reduction layer.

Hence, the conventional structure illustrated in <FIG> (and referenced, for example in <CIT>) has limitations, particular in the context of small integrated circuits. Integrated circuits typically employ passivation and dielectric layers between interconnection layers (e.g., wire layers with patterned wires) and active element (e.g., transistor) layers. The passivation and dielectric layers do not shrink as the interconnection and active elements are reduced in size due to improvements in photolithography and the number of metal layers <NUM> in the integrated circuit tends to increase due to the increased number of transistors in the integrated circuit. Thus, the distance between Hall-effect plates and magnetic flux concentrators <NUM> increases and consequently relatively larger Hall-effect plates are required. Therefore, the Hall-effect plates cannot grow smaller as the circuits and wires improve in resolution and eventually the Hall-effect plates become too large to be cost effective in the integrated circuit and too far away from magnetic flux concentrator <NUM> to provide adequate sensitivity. This problem becomes increasingly serious as the resolution (feature size) of the integrated circuit reaches <NUM> or less, for example <NUM> or less or <NUM> or less, particularly for digital CMOS integrated circuits.

To overcome this problem and according to embodiments of the present disclosure illustrated in <FIG>, a magnetic flux concentrator (MFC) structure <NUM> comprises magnetic flux concentrators <NUM> provided within metal layers <NUM> disposed on or over an integrated-circuit substrate <NUM>. Substrate <NUM> can be a semiconductor substrate and can comprise an integrated electronic circuit <NUM> comprising active electronic transistors and diodes, as well as other electronic components, such as Hall-effect plates. Metal layers <NUM> comprise at least a first metal layer <NUM> disposed on or over substrate <NUM> and a second metal layer <NUM> disposed on or over first metal layer <NUM>. First metal layer <NUM> comprises (i) a first wire layer <NUM> disposed on or over substrate <NUM> comprising patterned first wires <NUM> conducting electrical signals, and (ii) a first dielectric layer <NUM> disposed on first wire layer <NUM> on a side of first wire layer <NUM> opposite substrate <NUM>. First wire layer <NUM> can be disposed directly on substrate <NUM> or on a layer disposed on substrate <NUM>. For example, substrate <NUM> can be coated with or comprise a planarizing dielectric layer <NUM> as the surface of substrate <NUM>. Dielectric layer <NUM> can also comprise additional wires or wire connections. First wires <NUM> conduct electrical signals, for example power, ground or information signals. A second metal layer <NUM> is disposed on first metal layer <NUM> and comprises (i) a second wire layer <NUM> comprising second wires <NUM> conducting electrical signals, and (ii) a second dielectric layer <NUM> disposed on second wire layer <NUM> on a side of second wire layer <NUM> opposite substrate <NUM>, first wire layer <NUM>, and first dielectric layer <NUM>. As with first wire layer <NUM>, second wire layer <NUM> conducts electrical signals, for example power, ground or information signals, can be patterned, and can comprise individual wires <NUM> or electrical buses. In general, wires <NUM> as shown in the Figures can be individual wires <NUM> conducting a single signal or multiple wires (for example a bus comprising parallel multiple wires) conducting multiple signals. A magnetic flux concentrator <NUM> is disposed in first metal layer <NUM>, or in second metal layer <NUM>. In some embodiments additional metal layers <NUM> (each comprising a dielectric layer <NUM> over a wire layer <NUM>) are disposed in layers over second metal layer <NUM> so that magnetic flux concentrator <NUM> extends through the additional metal layers <NUM>. In some embodiments magnetic flux concentrator <NUM> is present in only some metal layers <NUM>, for example first metal layer <NUM> or, as shown in <FIG>, second and third metal layers <NUM>, <NUM>. Magnetic flux concentrator <NUM> can be disposed on or comprise a wire <NUM> in any of wire layers <NUM> of metal layers <NUM>.

As described herein, wire layer(s) <NUM> refer generically to any wire layers in magnetic-flux-concentrator structure <NUM> (for example first and second wire layers <NUM>, <NUM>). Metal layer(s) <NUM> refer generically to any metal layers in magnetic-flux-concentrator structure <NUM> (for example first and second metal layers <NUM>, <NUM>). Dielectric layer(s) <NUM> refer generically to any dielectric layers in magnetic-flux-concentrator structure <NUM> (for example planarizing dielectric layer <NUM>, first dielectric layer <NUM> and second dielectric layer <NUM>). Wire(s) <NUM> refer generically to any wires or combination of wires such as electrical buses, formed by patterning any wire layer <NUM> (for example first wire <NUM> or second wire <NUM>). Wires <NUM> in different wire layers <NUM> can be electrically connected through electrical vias <NUM>. Electrical vias <NUM> are electrically conductive connections through any dielectric layers <NUM> between wires <NUM> in different wire layers <NUM> and can be formed by photolithographic etching a hole in the dielectric layer(s) <NUM> and coating or filling the hole with an electrically conductive metal, for example tungsten, titanium, copper or aluminium.

Conventionally, a metal layer can refer only to patterned wire layers <NUM>, but as used herein, a metal layer <NUM> refers to both a wire layer <NUM> and a dielectric layer <NUM> coated over wire layer <NUM> (for example first wire layer <NUM> and first dielectric layer <NUM> form first metal layer <NUM> and second wire layer <NUM> and second dielectric layer <NUM> form second metal layer <NUM>, and so on) so that, as shown in <FIG>, magnetic flux concentrator <NUM> is disposed in at least one of second wire layer <NUM>, second dielectric layer <NUM>, or both second wire layer <NUM> and second dielectric layer <NUM>, so that magnetic flux concentrator <NUM> is at least partially in second metal layer <NUM>. According to some embodiments of the present disclosure, magnetic flux concentrator <NUM> is also in first metal layer <NUM> (as shown in <FIG>). In some embodiments a top dielectric layer <NUM> or encapsulation layer <NUM> forms a surface of substrate <NUM>.

Magnetic flux concentrators <NUM> serve to concentrate magnetic fields and make the concentrated magnetic fields more readily detected and measured. In some embodiments magnetic flux concentrators <NUM> can comprise a core <NUM>, for example comprising a magnetic metal such as iron or cobalt, or a metal alloy comprising a magnetic metal such as nickel-iron, disposed at least partially in first or second metal layer <NUM>, <NUM>, or both. Second dielectric layer <NUM> can comprise an MFC via <NUM> (a hole in second dielectric layer <NUM>) in which magnetic flux concentrator <NUM> can be at least partially disposed. For example, core <NUM> can be disposed in MFC via <NUM>. Magnetic flux concentrators <NUM> can also comprise a stress-reduction layer <NUM>, for example provided in contact with core <NUM>. Stress-reduction layer <NUM> can be disposed in second metal layer <NUM> and specifically in second wire layer <NUM> (as shown in <FIG>) or in first wire layer <NUM> (as shown in <FIG>, discussed below) and can also be provided in MFC via <NUM>, for example at the bottom of MFC via <NUM> (the bottom of MFC via <NUM> is the portion of MFC via <NUM> closest to substrate <NUM>). Thus, in some embodiments of the present disclosure, magnetic flux concentrators <NUM> are at least partially present in second metal layer <NUM> (and therefore in both second wire layer <NUM> and second dielectric layer <NUM> comprising second metal layer <NUM>). In some embodiments of the present disclosure, magnetic flux concentrators <NUM> are at least partially present in first metal layer <NUM> and second metal layer <NUM> (and therefore in first wire layer <NUM> and first dielectric layer <NUM> comprising first metal layer <NUM> and in second wire layer <NUM> and second dielectric layer <NUM> comprising second metal layer <NUM>). Since, in some embodiments, additional metal layers <NUM> are disposed over second metal layer <NUM>, MFC via <NUM> can extend through the additional metal layers <NUM>. Additional metal layers <NUM> can also be disposed under first metal layer <NUM>.

Stress-reduction layer <NUM> reduces stress created by any different coefficients of thermal expansion of core <NUM> and substrate <NUM>. To this end, stress-reduction layer <NUM> can have a ductility greater than a ductility of core <NUM>. In some embodiments, stress-reduction layer <NUM> is electrically conductive, can be in electrical and physical contact with core <NUM>, and can comprise or be aluminium. By providing an electrically conductive stress-reduction layer <NUM> of a metal more ductile than core <NUM> in electrical and physical contact with core <NUM>, core <NUM> can be made using electroplating techniques without the use of sputtered and patterned seed layers formed on top of substrate <NUM>, as discussed further below.

Therefore, according to some embodiments of the present disclosure, magnetic-flux-concentrator structure <NUM> can be constructed by providing a substrate <NUM>, forming one or more metal layers <NUM> on or over substrate <NUM>, each metal layer <NUM> comprising a wire layer <NUM> and a dielectric layer <NUM> disposed over wire layer <NUM>, forming an MFC via <NUM> in one or more dielectric layers <NUM>, and disposing a magnetic flux concentrator <NUM> in MFC via <NUM>. According to embodiments of the present invention, magnetic flux concentrator <NUM> comprises a stress-reduction layer <NUM> and a core <NUM> and is disposed in MFC via <NUM> by etching one or more dielectric layers <NUM> to expose a wire <NUM> having an effective two-dimensional area (e.g., a contact area or contact pad) in a wire layer <NUM>. The effective two-dimensional area of stress-reduction layer <NUM> can extend across the entire bottom of MFC via <NUM>, or vice versa. In some embodiments stress-reduction layer <NUM> extends beyond MFC via <NUM> and beyond core <NUM> in order to reduce stress gradients present at the edge of core <NUM> and reduce cracking in substrate <NUM> layers, for example dielectric or semiconductor layers, adjacent to or below core <NUM>, as shown in <FIG> and <FIG>. Exposed wire <NUM> is electrically connected to an external current source and core <NUM> is electroplated on the area of exposed wire <NUM>. According to some embodiments of the present invention, exposed wire <NUM> can serve as an etch stop for etching MFC via <NUM>, can provide a conductive area that provides electrical current for plating core <NUM> in MFC via <NUM>, can provide a sublayer for seed layer <NUM> deposition enabling electro-plating, and can serve as a stress-reduction layer <NUM>.

According to some embodiments of the present disclosure, substrate <NUM> of magnetic-flux-concentrator structure <NUM> is a semiconductor substrate comprising an electronic circuit <NUM>, for example an integrated circuit constructed using photolithographic methods and materials, disposed in or on the semiconductor substrate. Electronic circuit <NUM> can comprise doped or implanted semiconductor structures that have a feature size less than or equal to <NUM>, less than or equal to <NUM>, or less than or equal to <NUM>. Electronic circuit <NUM> can be a digital, analog or mixed-signal circuit and can be constructed as a CMOS circuit in a silicon substrate <NUM>. As noted above, when the resolution (feature size) of an integrated circuit reaches these sizes, conventional methods and devices for measuring magnetic fields are less effective or more expensive, providing advantages to the present invention.

Wires <NUM> can be patterned metal wires deposited by evaporation and patterned using photolithographic methods and materials, for example comprising silver, aluminium, titanium, tungsten, copper or other metals. Dielectric layers <NUM> can comprise dielectric material <NUM>, for example inorganic materials such as oxides such as silicon dioxide and nitrides such as silicon nitrides, or organic polymers, resins and epoxies. Dielectric layers <NUM> can be coated by Plasma Enhanced Chemical Vapour Deposition (PECVD), spray, slot, or spin coating, or other methods known in the photolithographic arts.

According to some embodiments of the present disclosure, first wires <NUM> are electrically connected to electronic circuit <NUM>, second wires <NUM> are electrically connected to electronic circuit <NUM>, or both. Electrically connecting first and second wires <NUM>, <NUM> to electronic circuit <NUM> provides a system that operates, controls or responds to electrical or magnetic signals or fields and can be responsive to an external controller or other external system.

Embodiments of the present disclosure provides advantages in small devices and systems and enables core <NUM> structure with reduced size that are not otherwise readily achieved with similar performance by conventional means. According to some embodiments, (i) magnetic flux concentrator <NUM> has a lateral dimension of <NUM> microns or less, <NUM> microns or less, or <NUM> microns or less, (ii) magnetic flux concentrator <NUM> has a thickness of <NUM> microns or less, <NUM> microns or less, or <NUM> microns or less, or (iii) both (i) and (ii). Such a small magnetic flux concentrator <NUM> can tolerate mechanical stress with respect to substrate <NUM> from heat when provided on a thin stress-reduction layer <NUM> such as a ductile metal like aluminium. In contrast, devices of the prior art are larger and require thicker stress-reduction layers (such as polyimide layer <NUM> in <FIG>), increasing the prior-art device size and distance between an MFC and Hall-effect plate.

According to some embodiments of the present disclosure, magnetic-flux-concentrator structure <NUM> comprises a magnetic sensor <NUM> disposed at least partially in first metal layer <NUM>, for example in first wire layer <NUM>, first dielectric layer <NUM>, or both. Magnetic sensor <NUM> can comprise a magnetic-sensor circuit <NUM> electrically connected to one or more sensing plates <NUM>, such as a Hall-effect plate. Magnetic-sensor circuit <NUM> can comprise doped or implanted semiconductor structures that have feature sizes less than or equal to <NUM>, less than or equal to <NUM>, or less than or equal to <NUM> made with photolithographic method and materials and can be a mixed-signal or analog circuit. Magnetic sensor <NUM> can be a Hall-effect sensor comprising one or more Hall-effect sensing plates <NUM>. In some embodiments a magnetic sensor can be a magneto-resistor or other material with electronic properties modulated by a magnetic field. Sensing plates <NUM> can be a distance removed from magnetic-sensor circuit <NUM>. In some embodiments magnetic sensor <NUM> is disposed between substrate <NUM> and first metal layer <NUM>, in substrate <NUM> or on a side of substrate <NUM> opposite magnetic flux concentrator <NUM>. First wires <NUM> can be electrically connected to magnetic-sensor circuit <NUM> or electronic circuit <NUM>, second wires <NUM> can be electrically connected to magnetic-sensor circuit <NUM> or electronic circuit <NUM>, or both, for example electrically connected to magnetic-sensor circuit <NUM> and electronic circuit <NUM>. Sensing plates <NUM> can be electrically connected to magnetic-sensor circuit <NUM> with four electrical connections, for example providing a current through sensing plates <NUM> and sensing a corresponding voltage differential across sensing plates <NUM> when in the presence of a magnetic field. Therefore, in the embodiments of <FIG> and <FIG>, wire <NUM> electrically connecting each sensing plate <NUM> to a circuit (e.g., magnetic-sensor circuit <NUM>) can be a bus comprising at least four individual wires. In some embodiments at least a portion of magnetic sensor <NUM> or sensing plate <NUM> is within <NUM> microns, <NUM> microns, <NUM> microns, <NUM> microns, <NUM> microns or <NUM> micron of magnetic flux concentrator <NUM>. Sensing plates <NUM> can be disposed in doped semiconductor regions of substrate <NUM>, for example in the same layers as a CMOS circuit or the same layers as magnetic-sensor circuit <NUM>. Although magnetic-sensor circuit <NUM> is shown in <FIG> as a separate circuit from electronic circuit <NUM>, it can be incorporated into electronic circuit <NUM>, or electronic circuit <NUM> and magnetic-sensor circuit <NUM> can be a common circuit. Magnetic flux concentrator <NUM> can be disposed at least partially above sensing plate <NUM> in a direction orthogonal to a surface of substrate <NUM>, for example sensing plate <NUM> can be disposed directly beneath an edge of core <NUM>.

By electrically connecting first or second wires <NUM>, <NUM> to magnetic sensor <NUM> (or electronic circuit <NUM>, or both) and disposing Hall-effect sensing plates <NUM> in a doped semiconductor region of substrate <NUM>, a highly integrated and sensitive magnetic sensor <NUM> is provided. In integrated circuit manufacturing, individual wires <NUM> in metal layers <NUM> can be separated by only a few microns or less, so that disposing sensing plates <NUM> in a doped semiconductor region of substrate <NUM> adjacent to magnetic flux concentrator <NUM> in second metal layer <NUM> provides a highly integrated and sensitive magnetic sensor <NUM>.

Referring to <FIG>, according to some embodiments, magnetic-flux-concentrator structure <NUM> comprises more than two metal layers <NUM> (e.g., first and second metal layers <NUM><NUM>). For example, magnetic-flux-concentrator structure <NUM> can comprise third and fourth metal layers <NUM>, <NUM> comprising third and fourth wire layers <NUM>, <NUM> comprising third and fourth wires <NUM>, <NUM>. In some embodiments magnetic-flux-concentrator structure <NUM> can comprise fifth and sixth metal layers <NUM>, <NUM> comprising fifth and sixth wire layers <NUM>, <NUM> comprising fifth and sixth wires <NUM>, <NUM> (as shown in <FIG>).

As shown in <FIG>, magnetic-flux-concentrator structure <NUM> can comprise one or more wires <NUM> disposed in or on substrate <NUM> in a coil <NUM> around magnetic flux concentrator <NUM>, for example around core <NUM>. Wires <NUM> in coil <NUM> can be first, second, third, or fourth wires <NUM>, <NUM>, <NUM>, <NUM> disposed in first, second, third or fourth wire layers <NUM>, <NUM>, <NUM>, <NUM> of first, second, third or fourth metal layers <NUM>, <NUM>, <NUM>, or <NUM> (and, in some embodiments can include additional wires <NUM> in additional wire layers <NUM> of additional metal layers <NUM>, as shown in <FIG>). Wires <NUM> in different wire layers <NUM> of coil <NUM> can be electrically connected through electrical vias <NUM> and disposed in a circle or arc, as shown in <FIG>. Wires <NUM> in coils <NUM> can form one or more windings around core <NUM> to provide an electromagnet or transformer and can be controlled by or responsive to a transformer/electromagnet circuit <NUM>. For example, wires <NUM> in coils <NUM> can form a single winding or primary and secondary windings around core <NUM>. Transformer/electromagnet circuit <NUM> can comprise doped or implanted semiconductor structures that have a feature size less than or equal to <NUM>, less than or equal to <NUM>, or less than or equal to <NUM> made with photolithographic method and materials and can be a digital circuit, such as a CMOS circuit, a mixed-signal circuit or an analog circuit. In some such embodiments the magnetic field in the MFC via <NUM> is perpendicular to substrate <NUM> so that there is no need for wires <NUM> disposed beneath MFC via <NUM> to affect or control the performance of magnetic-flux-concentrator structure <NUM>.

As shown in <FIG>, magnetic-flux-concentrator structure <NUM> can comprise a wire redistribution layer comprising coil wires <NUM> or a wire redistribution layer provided in a top wire layer <NUM>, for example provided on the top dielectric layer of the stack of dielectric layers <NUM>. In some embodiments, and for this application, the magnetic field is desirably parallel to substrate <NUM>. Thus, for every coil wire <NUM> above core <NUM>, at least one coil wire <NUM> can be provided in wire layers <NUM> under the core <NUM>, preferably in first metal layer <NUM> (or in metal layers <NUM> below first metal layer <NUM>, if present) where stress-reduction layer <NUM> is disposed in second metal layer <NUM>.

Such coil wires <NUM> can be a portion of coils <NUM> or can form a redistribution layer that provides electrical contacts to external devices or electrical connections at a lower resolution than magnetic-flux-concentrator structure <NUM> itself. Because magnetic flux concentrator <NUM> is relatively small and can have a low profile over substrate <NUM>, wire redistribution layers can be disposed over magnetic flux concentrator <NUM>. This enables cost effective fabrication of coils <NUM> with a magnetic core <NUM> allowing on-chip realisation of transformers, voltage converters, and active magnetic field generation in magnetic flux concentrator <NUM> for electromagnets and magnetic feedback control.

As also shown in <FIG>, wires <NUM> (e.g., first through fourth wires <NUM>-<NUM>) in wire layers <NUM> (e.g., first through fourth wire layers <NUM>-<NUM>) separated by dielectric layers <NUM> (e.g., first, second, third and fourth dielectric layers <NUM>, <NUM>, <NUM>, <NUM>) forming metal layers <NUM> (e.g., first, second, third and fourth metal layers <NUM>, <NUM>, <NUM>, <NUM>) on planarizing dielectric layer <NUM> can electrically connect electronic circuit <NUM> and transformer/electromagnetic circuit <NUM> in substrate <NUM> through electrical vias <NUM> or form portions of coils <NUM>.

Referring to <FIG>, core <NUM> can extend beyond MFC via <NUM> and into and over or above the top dielectric layer of the stack of dielectric layers <NUM> or over a substrate <NUM> passivation layer, for example forming a mushroom shape. If present, an encapsulation layer <NUM> can protect core <NUM> from environmental stresses and contaminants and, if present, coil wires <NUM> or a wire redistribution layer can be disposed on encapsulation layer <NUM>, either directly over core <NUM> (as shown in <FIG>), or over other portions of substrate <NUM>, or directly on the top dielectric layer of the stack of dielectric layers <NUM>.

<FIG> illustrates some embodiments of the present disclosure in which core <NUM> extends into encapsulation layer <NUM> but does not extend over portions of substrate <NUM> beyond MFC via <NUM>, forming a cylindrical shape with a rounded top. As shown in <FIG>, wires <NUM> (e.g., first through sixth wires <NUM>-<NUM>) in wire layers <NUM> (e.g., first through sixth wire layers <NUM>-<NUM>) separated by dielectric layers <NUM> (e.g., first through sixth dielectric layers <NUM>-<NUM>) forming metal layers <NUM> (e.g., first through sixth metal layers <NUM>-<NUM>) can electrically connect electronic circuit <NUM> and transformer/ electromagnetic circuit <NUM> through electrical vias <NUM> or form portions of coils <NUM>.

<FIG> provides a plan view of magnetic-flux-concentrator structure <NUM> with a modified layout comprising a coil <NUM> disposed around core <NUM> and stress-reduction layer <NUM> in MFC via <NUM> (not shown in <FIG>), corresponding to <FIG> and <FIG> and optionally formed partly in a wire redistribution layer with coil wire <NUM>, transformer/electromagnet circuit <NUM>, and electronic circuit <NUM>. Core <NUM> can be continuous or can have one or more gaps, as shown on the right of the ring in <FIG>.

Referring to <FIG>, some embodiments of the present disclosure can comprise multiple magnetic flux concentrators <NUM> comprising cores <NUM> in physical contact with stress-reduction layers <NUM> in substrate <NUM> with first through fifth wires <NUM>-<NUM>, respectively, in first through fifth wire layers <NUM>-<NUM> forming coils <NUM> in an active electromagnetic field generating device and magnetic sensor <NUM> with sensing plates <NUM> and magnetic-sensor circuit <NUM>. An encapsulation layer <NUM> and coil wire, wire redistribution layer or top wire layer <NUM> (not shown in <FIG>) is optionally included. In some embodiments, cores <NUM> can comprise shapes such as a torus or ring (for example, the two cores <NUM> illustrated in the <FIG> cross section can be physically connected, for example in a torus) to form a single core <NUM>.

Referring to the <FIG> flow diagram, methods of constructing a magnetic-flux-concentrator structure <NUM> according to some embodiments of the present disclosure can comprise providing substrate <NUM> in step <NUM> and forming circuits (e.g., any combination of electronic circuit <NUM>, magnetic-sensor circuit <NUM>, and transformer/electromagnet circuit <NUM>) in or on substrate <NUM> in step <NUM>. In step <NUM> an optional planarizing dielectric layer <NUM> is disposed on substrate <NUM> and any circuits formed thereon, together with any electrical vias <NUM>. In some embodiments a substrate <NUM> is provided with circuits and an optional planarizing dielectric layer <NUM> formed in or on substrate <NUM> so that steps <NUM> and <NUM> are incorporated into step <NUM>. Metal layers <NUM> are formed in steps <NUM> and <NUM> by coating and patterning a wire layer <NUM> in step <NUM> to form wires <NUM> and then disposing dielectric layer <NUM> on wire layer <NUM> in step <NUM>. The successive steps <NUM> and <NUM> of forming wires <NUM> in a patterned wire layer <NUM> and dielectric layer <NUM> can be iteratively repeated to form as many metal layers <NUM> as desired, for example first and second metal layers <NUM>, <NUM> (as shown in <FIG>), first through fourth metal layers <NUM>-<NUM> (as shown in <FIG>), or first through sixth metal layers <NUM>-<NUM> (as shown in <FIG>). In some embodiments the electroplating current passes through substrate <NUM>, for example through a silicon wafer comprising substrate <NUM>. Optionally, an externally electrically accessible first wire <NUM>, second wire <NUM>, or first wire <NUM> electrically connected through an electrical via <NUM> to a second wire <NUM> that can serve as an electroplating electrode is formed in first or second wire layers <NUM>, <NUM>. In some embodiments of the present disclosure, a seal ring <NUM> around electronic circuit <NUM> or magnetic-flux-concentrator structure <NUM> (shown in <FIG>) can serve as an electrical contact between substrate <NUM> and second metal layer <NUM>. According to some embodiments, a seal ring <NUM> consists of all metal layers <NUM> (for example forming a metal wall around magnetic flux concentrator structure <NUM>) and is provided to stop ions and moisture entering from the side of the structure <NUM>. A seal ring <NUM> can be formed around electronic circuit <NUM> and substrate <NUM>, can be highly conductive, has a large contact area, and therefore offers a very low contact resistance and can provide large currents for electroplating core <NUM>. Magnetic-flux-concentrator structure <NUM> can be provided on a wafer having many such structures. The seal rings <NUM> can then also distribute a plating current from the wafer edge to all the individual magnetic-flux-concentrator structures <NUM> and, in particular, to seed layers <NUM>.

Once the final dielectric layer <NUM> is disposed over substrate <NUM>, an MFC via <NUM> can be formed in one or more of dielectric layers <NUM>, for example by pattern-wise etching down to second wire layer <NUM> or to first wire layer <NUM>, in step <NUM>, as shown in <FIG>, <FIG>, <FIG>. In some embodiments, MFC via <NUM> extends to a first wire <NUM> in first wire layer <NUM>, as shown in <FIG>. For clarity, <FIG> does not show any other wire layers <NUM> or metal layers <NUM>. Metal forming first or second wire layers <NUM>, <NUM> or stress-reduction layer <NUM>, for example aluminium, can serve as an etch stop when etching MFC via <NUM>.

In some embodiments of the present invention, and as illustrated in <FIG>, <FIG>, <FIG>, stress-reduction layer <NUM> is disposed at least partially at the bottom of MFC via <NUM>, and is an electrically conductive wire <NUM>, for example a first wire <NUM> in first wire layer <NUM> or second wire <NUM> in second wire layer <NUM>, having an area that is as large as, or larger than, the area of the bottom of MFC via <NUM>. Referring to the detailed flow diagram of <FIG> and detailed structures of <FIG>, after planarizing dielectric layer <NUM> is formed in step <NUM>, first wires <NUM> in wire layer <NUM> are formed in step <NUM>, first dielectric layer <NUM> is formed in step <NUM>, second wires <NUM> are formed in step <NUM>, and a seed layer <NUM> is deposited on second wires <NUM> in step <NUM> so that stress-reduction layer <NUM> (second wire <NUM>) is coated with an additional seed layer <NUM> comprising, for example metals disposed by sputtering or evaporating and then patterning a relatively thin layer (for example <NUM> to <NUM>) of a material useful for electrodeposition, for example copper, nickel, TiW, TiN, gold or platinum, or a combination of these, to facilitate electroplating on the portion of stress-reduction layer <NUM> exposed in MFC via <NUM>. The additional seed-layer materials can be present on all of first or second wires <NUM>, <NUM>, or not. Seed layer <NUM> and the last wire layer <NUM> (e.g., (second wire <NUM> in second wire layer <NUM>) can be patterned in a common step. Thus, according to some embodiments, stress-reduction layer <NUM> is a multi-layer comprising a first layer (e.g., second wire <NUM>) that is electrically conductive and ductile and a second layer that is a seed layer <NUM>. The second layer (seed layer <NUM>) is disposed on the first layer (second wire <NUM>). Seed layer <NUM> can be electrically connected to substrate <NUM> to provide current for electro-plating core <NUM> on seed layer <NUM>.

Once the last planarizing dielectric layer is formed in step <NUM> (e.g., second dielectric layer <NUM> formed in step <NUM>), the MFC via <NUM> is formed over stress-reduction layer <NUM> in step <NUM> so that only the bottom of MFC via has an exposed seed layer <NUM>, forming an electroplating electrode at the bottom of MFC via <NUM>. Stress-reduction layer <NUM> can be electrically connected to an external electrical source that provides a current for electroplating stress-reduction layer <NUM> in step <NUM> to form core <NUM> by electrolytic deposition of a metal or metal alloy from a solution in which substrate <NUM> is immersed. In some embodiments an electroplating current is provided through a semiconductor substrate <NUM> material itself and the plating current is provided at the wafer edges only. Because only the bottom of MFC via <NUM> has an exposed seed layer <NUM> (forming an electroplating electrode) and the walls of MFC via <NUM> comprise only dielectric material etched to form MFC via <NUM>, no metal or metal alloy is electro-deposited directly on the walls of MFC via <NUM> and any mechanical connection between core <NUM> and a dielectric layer (e.g., second dielectric layer <NUM>) is reduced or eliminated.

In order to electrodeposit a relatively large or thick core as seen in the prior art, a seed layer is disposed on the side of MFC via <NUM> and a mold (typically a resin material) is disposed over the dielectric layer. In contrast, because embodiments of the present invention comprise small, relatively thin cores <NUM>, such electrodeposition is practical instead of such prior-art seed-layer deposition, thus reducing the number of steps required to form core <NUM>. For example, no additional deposition or patterning step is required for a seed layer after MFC via <NUM> is formed since wire layer <NUM> patterning can also pattern stress-reduction layer <NUM> and seed layer <NUM>. Furthermore, electroplating in MFC via <NUM> from a stress-reduction layer <NUM> at the bottom of MFC via <NUM> rather than forming a core <NUM> using a deposited and patterned seed layer present on the sides of MFC via <NUM> reduces the adhesion between core <NUM> and structures in substrate <NUM>, for example passivation or dielectric layers <NUM>. The reduced side adhesion in turn reduces passivation cracks in substrate <NUM> due to thermal stress; core <NUM> can expand and shrink somewhat independently from substrate <NUM>, particularly in a vertical direction. Electroplating core <NUM> also improves core <NUM> uniformity. Moreover, since no seed layer or mold materials are present over the dielectric layer, there is no need to remove such materials after electrodeposition. Since removing seed and mold layer materials can cause processing problems, avoiding such a removal step provides another advantage for embodiments of the present disclosure.

Optionally, in step <NUM> an encapsulation layer <NUM> is disposed over core <NUM> and any top wire layer <NUM> or wire redistribution layer is formed in step <NUM>.

Stress-reduction layer <NUM> can be a metal pad with an effective area and a variety of shapes and, when used as an electroplating electrode can form a variety of core <NUM> shapes, for example a cylinder (using a disc-shaped stress-reduction layer <NUM>), a cube (using a square stress-reduction layer <NUM>) or a torus (using a ring-shaped stress-reduction layer <NUM>).

Embodiments of the present invention can be operated by providing power, ground and control signals to electronic circuit <NUM> and any magnetic-sensor circuit <NUM> or transformer/ electromagnet circuits <NUM> to conduct or respond to signals in wires <NUM>. In some embodiments magnetic sensor <NUM> can detect and measure ambient magnetic fields or transformer/electromagnet circuits <NUM> can form magnetic fields or transform the voltage of alternating current signals under the control of electronic circuit <NUM> and in communication with external systems.

It will be evident to those knowledgeable in the electronic and magnetic arts that the labelling of the various metal layers <NUM>, dielectric layers <NUM>, wire layers <NUM>, and wires <NUM> is arbitrary and can be provided in any order, for example the topmost metal layer <NUM> furthest from substrate <NUM> could be first metal layer <NUM> rather than the metal layer <NUM> closest to substrate <NUM> as illustrated in the Figures.

Claim 1:
A magnetic flux concentrator, MFC, structure (<NUM>), comprising :
a substrate (<NUM>),
a first metal layer (<NUM>) comprising (i) a first wire layer (<NUM>) disposed on or over the substrate, the first wire layer comprising first wires (<NUM>) conducting electrical signals, and (ii) a first dielectric layer (<NUM>) disposed on the first wire layer,
a second metal layer (<NUM>) comprising (i) a second wire layer (<NUM>) disposed on or over the first metal layer, the second wire layer comprising second wires (<NUM>) conducting electrical signals, and (ii) a second dielectric layer (<NUM>) disposed on the second wire layer, and
a magnetic flux concentrator (<NUM>) disposed either in or on said first metal layer (<NUM>) or in or on said second metal layer (<NUM>).