Patent Description:
<NPL> describes wavelength modulation over <NUM> by a micromechanically tunable vertical-cavity surface-emitting laser (VCSEL) consisting of an InP-based half-VCSEL chip and micromachined silicon-on-insulator chip with a concave movable mirror.

The present invention concerns a design and method for introducing asymmetric crystal strain to control polarization in a tunable VCSEL, either optically or electrically pumped. The scope of protection is determined from the claims.

The invention is especially relevant to wafer- or die- bonded tunable VCSELs. Examples of such devices are disclosed in <CIT>, "OCT System with Bonded MEMS Tunable Mirror VCSEL Swept Source".

In general, according to one aspect, the invention features a vertical cavity surface emitting lasers (VCSEL), comprising a membrane device and a half VCSEL device. Then, mechanical stress is applied to the half VCSEL device.

This mechanical stress controls a polarization of light generated by the VCSEL. In the present design, the mechanical stress is applied by the membrane device to the half VCSEL device.

Preferably, the mechanical stress is generated by bonding the membrane device to the half VCSEL device under elevated temperature. At the same time, the VCSEL device and the membrane device have different coefficients of thermal expansion. Preferably, the membrane device is thermocompression bonded to the half VCSEL device.

In general, according to another aspect, the invention features a VCSEL, comprising a membrane device, a half VCSEL device, and bond pads attaching the membrane device to the half VCSEL device. A distance between the bond pads is different between two axes of a plane of the membrane device and the half VCSEL device. This asymmetric is used to create mechanical stress in the half VCSEL device.

In general, according to another aspect, the invention features a method for fabricating a VCSEL, the method comprising: fabricating a membrane device, fabricating a half VCSEL device, and bonding the membrane device to the half VCSEL device to induce mechanical stress in the half VCSEL device.

The above and other features of the invention including various novel details of construction and combinations of parts, and other advantages, will now be more particularly described with reference to the accompanying drawings and pointed out in the claims. It will be understood that the particular method and device embodying the invention are shown by way of illustration and not as a limitation of the invention. The principles and features of this invention may be employed in various and numerous embodiments without departing from the scope of the invention as defined by the appended claims.

<FIG> shows a MEMS tunable VCSEL <NUM> comprising a MEMS membrane (mirror) device <NUM> that is bonded to what is termed a half VCSEL chip or device <NUM>.

In more detail, the optical membrane device <NUM> comprises handle wafer material <NUM> that functions as a support. Currently, the handle is made from doped silicon, with a resistivity <<NUM> ohm-cm, carrier concentration ><NUM>×<NUM><NUM> cm-<NUM>, to facilitate electrical contact.

An optical membrane or device layer <NUM> is added to the handle wafer material <NUM>. Typically silicon on isolator (SOI) wafers are used. An optical membrane structure <NUM> is formed in this optical membrane layer <NUM>. In the current implementation, the membrane layer <NUM> is silicon that is low doped with resistivity ><NUM> ohm-cm, carrier concentration <<NUM> × <NUM><NUM> cm-<NUM>, to minimize free carrier absorption of the transmitted light. For electrical contact, the membrane layer surface is usually additionally doped by ion implantation to create a highly doped surface layer (doped usually to > <NUM> × <NUM><NUM> cm-<NUM>, but at least <NUM> × <NUM><NUM> cm-<NUM> and at least <NUM> Angstroms (A) thick, usually <NUM>-<NUM> A thick). This method minimizes optical absorption in the membrane layer itself that would occur if the entire layer were highly doped. An insulating (buried silicon dioxide) layer <NUM> separates the optical membrane layer <NUM> from the handle wafer material <NUM>.

During manufacture of the membrane device in the SOIwafer material, the insulating layer <NUM> functions as a sacrificial/release layer, which is partially removed to release the membrane structure <NUM> from the handle wafer material <NUM>. Then during operation, the remaining portions of the insulating layer <NUM> provide electrical isolation between the patterned device layer <NUM> and the handle material <NUM>.

In the current embodiment, the membrane structure <NUM> comprises a body portion <NUM>. The optical axis of the device <NUM> passes concentrically through this body portion <NUM> and orthogonal to a plane defined by the membrane layer <NUM>. A diameter of this body portion <NUM> is preferably <NUM> to <NUM> micrometers; currently it is about <NUM> micrometers.

Tethers <NUM> (four tethers in the illustrated example) defined and delineated by arcuate slots <NUM> fabricated into the device layer <NUM>. The tethers <NUM> extend radially from the body portion <NUM> to an outer portion <NUM>, which comprises the ring where the tethers <NUM> terminate. In the current embodiment, a spiral tether pattern is used.

A membrane mirror dot <NUM> is disposed on body portion <NUM> of the membrane structure <NUM>. In some embodiments, the membrane mirror <NUM> is an optically curved to form an optically concave optical element to thereby form a curved mirror laser cavity. In other cases, the membrane mirror <NUM> is a flat mirror, or even possibly convex.

When a curved membrane mirror <NUM> is desired, this curvature can be created by forming a depression in the body portion <NUM> and then depositing the material layer or layers that form mirror <NUM> over that depression. In other examples, the membrane mirror <NUM> can be deposited with a high amount of compressive material stress that will result in its curvature.

The membrane mirror dot <NUM> is preferably a reflecting dielectric mirror stack. In some examples, it is a dichroic mirror-filter that provides a defined reflectivity, such as between <NUM> and <NUM>%, to the wavelengths of laser light generated in the laser <NUM>, whereas the optical dot <NUM> is transmissive to wavelengths of light that are used to optically pump the active region in the VCSEL device <NUM>. In still other examples, the optical dot is a reflective metal layer such as aluminum or gold.

In the illustrated embodiment, four metal pads MP1, MP2, MP3, and MP4 are deposited on the proximal side of the membrane device <NUM>. These are used to solder or thermocompression bond, for example, the half VCSEL device <NUM> onto the proximal face of the membrane device <NUM>.

Also provided are two wire bondpads 334A, 334B. Membrane wire bond pad 334A is used to provide an electrical connection to the membrane layer <NUM> and thus the membrane structure <NUM>. The handle wire bond pad 334B is used to provide an electrical connection to the handle wafer material <NUM>.

The half VCSEL device <NUM> generally comprises an antireflective coating <NUM>, which is optional, and an active region <NUM>, which preferably has a single or multiple quantum well structure. The cap layer can be used between the antireflective coating <NUM>, if present, and the active region <NUM>. The cap layer protects the active region from the surface/interface effects at the interface to the AR coating and/or air. The back mirror <NUM> of the laser cavity is defined by a distributed Bragg reflector (DBR) mirror. Finally, a half VCSEL spacer <NUM>, such as GaAS, functions as a substrate and mechanical support. The DBR can be grown into the semiconductor, or be a deposited dielectric DBR, or hybrid metal/dielectric mirror deposited near the active layer after etching a hole or "port" in the semiconductor substrate.

The material system of the active region <NUM> of the VCSEL device <NUM> is selected based on the desired spectral operating range. Common material systems are based on III-V semiconductor materials, including binary materials, such as GaN, GaAs, InP, GaSb, InAs, as well as ternary, quaternary, and pentenary alloys, such as InGaN, InAlGaN, InGaP, AlGaAs, InGaAs, GaInNAs, GaInNAsSb, AlInGaAs, InGaAsP, AlGaAsSb, AlGaInAsSb, AlAsSb, InGaSb, InAsSb, and InGaAsSb. Collectively, these material systems support operating wavelengths from about <NUM> nanometers (nm) to <NUM>, including longer wavelength ranges extending into multiple micrometer wavelengths. Semiconductor quantum well and quantum dot gain regions are typically used to obtain especially wide gain and spectral emission bandwidths. Quantum well layers may be purposely strained or unstrained depending the exact materials and the desired wavelength coverage.

In still other examples, the rear VCSEL distributed Bragg reflector (DBR) mirror <NUM> is a dichroic mirror-filter that provides a defined reflectivity, such as greater than <NUM>% to the wavelengths of laser light generated in the laser <NUM>, whereas the rear mirror <NUM> is transmissive to wavelengths of light that are used to optically pump the active region in the VCSEL device <NUM>, thus allowing the half VCSEL device <NUM> to function as an input port of pump light.

In the example of a VCSEL operating with a center wavelength around <NUM>, the mirror reflectivities tend toward higher numbers for light around <NUM> in wavelength. For example, the reflectivity of the back mirror <NUM> is about <NUM>%. On the other hand, the front mirror dot <NUM> is usually <NUM>% or greater. In current embodiments, the mirror dot <NUM> has a reflectivity of about <NUM>% or higher.

In operation, the VCSEL device is electrically or optically pumped. The generated light resonates between the rear mirror <NUM> and membrane mirror <NUM>. The wavelength of the generated light is tuned within the scan band of the device by the out of plane electrostatic deflection of the body portion <NUM> and thus the membrane mirror <NUM> by controlling the electrostatic field between the body portion <NUM> and the handle wafer material <NUM> and/or the half VCSEL device <NUM>.

According to the invention, asymmetric mechanical stress is applied to the half VCSEL device <NUM> in order to obtain polarization control.

<FIG> is schematic view showing the hidden bond pads VP1-VP4 on the half VCSEL device <NUM>.

The asymmetric strain is created in the ½ VCSEL device <NUM> by the die bonding process. In one embodiment using thermocompression bonding, thin gold pads VP1-VP4 on the ½ VCSEL device <NUM> are bonded to corresponding membrane pads MP1, MP2, MP3, and MP4 of the MEMS membrane (mirror) device <NUM> by placing them in contact at high pressure and temperature to form the bond. Typically, this is done at <NUM> - <NUM> and <NUM> - 10N force. Other elevated temperature bonding methods, such as gold-tin and/or eutectic soldering, can be used to produce a similar effect, however.

The two substrates (½ VCSEL device <NUM>/MEMS membrane (mirror) device <NUM>) are made of different materials. The MEMS membrane (mirror) device <NUM> is made on a silicon substrate. The gain medium of the half VCSEL device <NUM> is typically grown on a direct bandgap semiconductor substrate such as GaAs or InP.

The bond is made between unstrained materials at high temperature. When the bonded structure cools, however, strain is introduced because of the different coefficients of thermal expansion (CTE) between the silicon MEMS membrane device <NUM> and the substrate material used for the optical gain medium of the half VCSEL device <NUM>. Although this procedure can be performed for many different materials systems, here we will use an example of InGaAs quantum well active or gain medium <NUM> on a GaAs substrate VCSEL spacer <NUM> that lases near <NUM>. Generally, this material system is used to generate light in the <NUM>-<NUM> range. The VCSEL is tunable to sweep its output through a band, which is typically greater than <NUM> wide and often more than <NUM> wide, centered on <NUM>.

An asymmetric bond pad arrangement is used to produce asymmetric stress. Specifically, the bond pad arrangement is asymmetric in that the x-axis distance (X1) between the pads is greater than the z-axis distance (Z1) between the pads. Said another way, a distance between the bond pads is different between two axes of a plane of the membrane device and the half VCSEL device. The bond pad asymmetry is designed so that the added stress asymmetry to the ½ VCSEL from bonding to the membrane device <NUM> is between <NUM> and <NUM> MPa.

<FIG> are grayscale coded finite element analysis of the stress in a GaAs ½ VCSEL <NUM> after thermocompression bonding. The gold pads GP1-GP4 are under heavy stress.

<FIG> shows the x-component of the stress is along the GaAs <NUM> crystal direction. In general, the x-component stress in high in region XS surrounding the device's optical axis OA.

On the other hand, <FIG> shows the y-component of the stress is elevated only in regions away YS, which are from the optical axis.

Two effects in the strained crystal control the polarization. The crystal is made birefringent, so it maintains polarization the same way a polarization-maintaining fiber does. Also, an optical gain asymmetry develops for polarizations aligned along the <NUM> and <NUM><NUM> crystal directions. (These crystal orientations are chosen for illustration purposes; other orientations could be chosen, however.

The following comments apply to many different quantum well material systems at many different wavelength ranges, both strained and unstrained as grown, but here the InGaAs/GaAs material system for the <NUM> range is used as an example. With compressively strained InGaAs quantum wells, tunable lasers generated tunable swept wavelength optical signal in the range <NUM>-<NUM> or more can be constructed. The compressive strain shifts the emission to longer wavelengths and increases the optical gain for TE (transverse electric field) polarization, polarized in the plane of the quantum well layers. The compressive stress fields before and after wafer bonding are shown in <FIG>, respectively. These figures show how the wafer bonding transforms the symmetrically compressed quantum wells (<FIG>) to the asymmetrically compressed wells (<FIG>) because of the subtraction of the stress due to the wafer bonding process. The highest stress is along the <NUM><NUM>-crystal orientation (z direction) so the optical gain is highest in the z direction as well.

The gain is higher for the z-polarization, so the VCSEL lases with that polarization as shown in <FIG>. This figure shows experimental results. It illustrates linear polarization for a <NUM> tunable VCSEL. The polarization is aligned along the highest stress axis of the bonded die crystal.

Claim 1:
A VCSEL, comprising:
a membrane device (<NUM>) including a support (<NUM>), an optical membrane structure (<NUM>) on the support, and a membrane mirror dot (<NUM>) on the membrane structure (<NUM>); and
a half VCSEL device (<NUM>) including an active region (<NUM>) and a back mirror (<NUM>) which is bonded to the membrane device (<NUM>), wherein light resonates between the back mirror (<NUM>) and the membrane mirror dot (<NUM>) and a wavelength of generated light is tuned by electrostatic deflection of the optical membrane structure (<NUM>);
bond pads (VP1-VP4) attaching the membrane device (<NUM>) to the half VCSEL device (<NUM>);
wherein an asymmetrical mechanical stress is applied to the half VCSEL device (<NUM>) by the membrane device (<NUM>), the asymmetrical mechanical stress is configured to control a polarization of light generated by the VCSEL,
wherein the VCSEL device and the membrane device have different coefficients of thermal expansion, and an asymmetric arrangement of the bond pads (VP1-VP4) is configured to produce the asymmetrical mechanical stress.