Patent Description:
State of the art radio-frequency identification (RFID) tags need to deal with a huge input power range. Under high power conditions, when the tag is close to the reader, the integrated circuit (IC) of the RFID tag needs to be protected from physical damage. This is typically achieved by including limiter circuitry to limit the input amplitude to a certain maximum level, defined by the physical limitation of the IC process technology.

European patent application, publication number <CIT> discloses such an RFID transponder with rectified voltage limiter. The limiter is a shunt limiter connected to an nth stage of the rectifier which is a multistage rectifier.

Aspects of the disclosure are set out in the accompanying claims. Combinations of features from the dependent claims may be combined with features of the independent claims as appropriate and not merely as explicitly set out in the claims.

According to an aspect of the disclosure, there is provided a voltage limiter for a radio-frequency identification (RFID) integrated circuit (IC) for an RFID tag, the RFID IC including a radio-frequency (RF) rectifier, the voltage limiter comprising:.

By including feedback circuitry arranged to provide a feedback current to the reference generator to vary the reference voltage, the feedback current being dependent on the current through the current sink device, the voltage limiter of the present disclosure can more strongly limit the power to the RFID IC under close-coupled conditions to the reader. This addresses a problem in known limiter circuitry of high-power dissipation through the limiter circuitry under near field (high power) conditions which still impacts the performance and lifetime of the RFID tag IC. By strongly limiting the power under close-coupled conditions to the reader, the voltage limiter of the present disclosure may thereby reduce physical damage to the tag IC. Furthermore, the voltage limiter of the present disclosure enables an anti-spy feature, to prevent intentional reading of the tag in the near field of the reader, thereby increasing privacy in these conditions. This feature guarantees that a tag must be a certain distance from a reader for the tag to be read by that reader, thereby restricting the operating range to a minimum distance.

In some embodiments, the reference voltage is dependent on the output voltage of the RF rectifier. In other embodiments the reference voltage has a predefined value.

The feedback current may be proportional to the current through the current sink device, for example a multiple or a submultiple of the current through the current sink device.

The feedback circuitry may comprise a current replica device coupled between the output of the RF rectifier and ground, in parallel with the current sink device.

The current replica device may be configured such that a current through the current replica device is dependent on the current through the current sink device. For example, the current through the current replica device may increase with increasing current through the current sink device. In some embodiments, the current through the current replica device is substantially proportional to the current through the current sink device, for example a multiple or submultiple. Providing a current replica branch in addition to the current sink branch, avoids the need to have a diode to mirror the current in the current sink branch, which would limit the sinking capability of the current sink device. For example, if a current mirror were present in the current sink branch, the voltage Vds between the current terminals of the current sink device would be reduced by the voltage Vds between the current terminals of the current mirror. Also, the current replica device provides an additional multiplication (division) ratio between the feedback current and the current in the current sink device, ultimately reducing the area of the voltage limiter.

A control terminal of the current replica device may be coupled to the control terminal of the current sink device.

The current replica device may be configured to replicate a multiple or submultiple of the current in the current sink device.

The feedback circuitry may further comprise at least one current mirror for copying the current in the current replica device.

By copying or mirroring a current in the current replica branch, the current mirror device does not limit the sinking capability of the current sink device.

At least one current mirror may comprise a current mirror device coupled in series with the current replica device.

That is, a current terminal of the current mirror device may be coupled to a current terminal of the current replica device, the other current terminal of the current mirror device being coupled to one of ground or the output of the RF rectifier.

At least one current mirror may comprise a current mirror device and a current copy device, the current copy device having a control terminal coupled to a control terminal of the current mirror device, a first current terminal coupled to a current terminal of the current mirror device, and a second current terminal coupled to the control terminal of the current sink device.

A current in said current copy device may be proportional to a current in said current replica device.

Said at least one current mirror may be configured to mirror a multiple or submultiple of the current in the current replica device.

Said at least one current mirror may comprise a first current mirror for copying the current in the current replica device, and a further current mirror for copying the current in the first current mirror.

The inclusion of multiple current mirrors in the feedback circuitry may facilitate different ratios between the feedback current and the current in the current sink device, and/or may facilitate providing the feedback current to different circuitry points of the voltage limiter.

The feedback circuitry may be configured to provide the feedback current to a control terminal of the current sink device.

The feedback circuitry may be configured to provide the feedback current to a feedback node of the reference generator, wherein a voltage offset is generated between the feedback node and the control terminal of the current sink device.

This feature may be used to cause the supply voltage to be reduced to a particular voltage level when the rf power is high. For example, the voltage may be reduced to a level at which read and write to the tag is not possible. As another example, the voltage may be reduced to a level which allows read operations only, but no write operations (as a typical example, read functionality requires a minimum of around <NUM>. 5V, while write functionality requires a minimum of around. This feature may also allow the current sink device to be smaller, by causing it to sink less current at high rf powers.

The feedback circuitry may comprise an element coupled between the feedback node and the control terminal of the current sink device for generating the voltage offset, the element being a resistor, a diode, a bipolar transistor, or a MOS transistor.

In some embodiments, the current sink device is a main current sink device, the voltage limiter further comprising:.

By turning on the additional current sink device when current flows in the main current sink device, the supply voltage is reduced to a fixed voltage level when the rf power is high. This prevents the reduced supply voltage from gradually rising as proximity to an RF reader increases further, since higher RF field amplitudes might otherwise raise the supply voltage sufficiently to actuate the RFID IC. The value of the fixed voltage level may be selected through the choice of device type for the sense device and additional current sink.

The main sink device and the additional sink device may be transistors having opposite polarity.

The sensing device may comprise at least one of an inverter, a Schmitt trigger, a latch, and/or an amplifier which may feature a hysteresis.

The voltage limiter may further comprise:.

By turning on the current pull device when current flows in the main current sink device, the supply voltage is reduced more rapidly as a function of increasing current, due to clamping the control terminal of the current sink device. Another advantage is that this arrangement allows the sensing device and current pull device to be very small.

The sensing device may comprise at least one of an inverter, a Schmitt trigger, a latch, and/or an amplifier. The sensing device may feature a hysteresis.

The current sink device may be a transistor having a first polarity, the transistor comprising a control terminal coupled to the output of the reference generator.

The current replica device may be a transistor having said first polarity.

The at least one current mirror may comprise a current mirror having a second polarity opposite to said first polarity.

According to another aspect of the disclosure, there is provided a radio-frequency identification (RFID) integrated circuit (IC) for an RFID tag, the RFID IC comprising:.

Example embodiments of the present disclosure will be described, by way of example only, with reference to the accompanying drawings in which like reference signs relate to like elements and in which:.

<FIG> represents a typical voltage limiter <NUM>, not according the claimed invention, but useful for understanding the present invention, the voltage limiter <NUM> for a radio-frequency identification (RFID) IC of an RFID tag. The RFID IC includes a radio-frequency (RF) rectifier (not shown) configured to convert an AC signal received from an antenna (not shown) incorporated in the RFID tag to a DC signal. The voltage limiter <NUM> includes a current sink device <NUM> coupled between the output (Vrec) <NUM> of the RF rectifier and a reference or ground potential (gnd) <NUM>, and a reference generator <NUM> for generating a reference voltage (Vlim) <NUM> for controlling a current through the current sink device <NUM> to limit the output voltage of the RF rectifier to a predefined level.

<FIG> conceptually illustrates a voltage limiter <NUM> according to a first example embodiment of the present disclosure. The voltage limiter <NUM> may be incorporated in an RFID IC of an RFID tag. The RFID tag typically includes electronic components to allow the RFID tag to communicate with an external RFID reader, including an RF rectifier (not shown) for generating a DC voltage (Vrec) <NUM> from an AC signal received from a reader (not shown) through an RFID tag antenna (not shown). The voltage limiter <NUM> includes a current sink device <NUM> coupled between the output (Vrec) <NUM> of the RF rectifier and a reference or ground potential (gnd) <NUM>. The voltage limiter <NUM> also includes a reference generator <NUM> having an output <NUM> for providing a reference voltage Vlim to the control terminal of the current sink device <NUM>, for controlling a current through the current sink device <NUM> to limit the output voltage of the RF rectifier Vrec <NUM> to a predefined voltage level. The reference voltage Vlim <NUM> may be derived by the reference generator <NUM> from the voltage Vrec <NUM> output by the RF rectifier. The current sink device <NUM> begins to conduct when the output voltage <NUM> of the RF rectifier exceeds a predetermined value. The reference generator <NUM> may have a limited driving capability. In contrast to the voltage limiter <NUM> of <FIG>, the voltage limiter <NUM> of this example embodiment also includes feedback circuitry <NUM>, <NUM> arranged to provide a feedback current to the reference generator <NUM> to vary the reference voltage Vlim <NUM> output by the reference generator <NUM>, the feedback current being dependent on the current through the current sink device <NUM>. The feedback circuitry <NUM>, <NUM> includes a current replica device <NUM>, coupled between the output (Vrec) <NUM> of the RF rectifier and the ground potential <NUM>, in parallel with the current sink device <NUM>. The control terminals of the current sink device <NUM> and the current replica device <NUM> are connected to each other. A current through the replica current device <NUM> is proportional to the current through the current sink device <NUM>, for example a multiple or a sub-multiple of it. The feedback circuitry <NUM>, <NUM> further comprises elements (represented by path <NUM>) for mirroring and copying the current in the replica current device <NUM>, for example as a multiple or a sub-multiple of it. The copied current is connected (sinking or sourcing) to the reference generator <NUM> to pull current from the reference voltage Vlim in order to influence the voltage Vlim at the output <NUM> of the reference generator. The feedback circuitry <NUM>, <NUM> thereby provides positive feedback to the reference voltage Vlim <NUM>, the feedback current increasing as the current through the current sink device <NUM> increases.

<FIG> shows a graph illustrating the behaviour of the voltage limiter <NUM> of the present disclosure and a typical voltage limiter <NUM>. The dashed line (b) of <FIG> shows the voltage Vrec <NUM> output by the RF rectifier of the RFID tag as a function of the current through the current sink device <NUM>, for the voltage limiter <NUM> of the first example embodiment described above with reference to <FIG>. For comparison, the solid line (a) of <FIG> illustrates the corresponding voltage-current characteristics for a typical voltage limiter without the feedback circuitry described in the present disclosure, such as the voltage limiter <NUM> shown in <FIG>.

In <FIG>, increasing current corresponds to increasing RF field strength due to increasing proximity to an RF reader. In general, known voltage limiters act to limit the voltage to a pre-determined level as the current increases. Accordingly, the solid line (a) shown in <FIG> is relatively flat. In contrast, the voltage limiter <NUM> of the present disclosure acts to strongly limit the voltage above a specified RF field strength, corresponding to a specified distance to the reader. As can be seen in <FIG>, the voltage is at a relatively constant level of around <NUM> volts for currents below about 1E-<NUM> amps. As the current increases, corresponding to decreasing distance of the RFID tag from the RF reader, the voltage is sharply pulled down and thereafter remains at a significantly reduced level. In the specific example illustrated in <FIG>, this sharp decrease occurs between about 4E-<NUM> and 5E-06A, and the voltage is reduced from about <NUM> V to about <NUM> volts. This reduced voltage may gradually increase with further increases to the current, but remains substantially reduced, for example remaining significantly below <NUM> V.

The effect of the feedback current in the voltage limiter <NUM> is thus to automatically reduce the DC voltage supply for the RF tag IC below a predetermined voltage level, for RF field strengths above a predetermined value. The level to which the voltage is reduced is dependent on the size of the devices, in particular the current sink device. As a result, certain functionality of the RFID tag is disabled and can therefore only be used at greater distances from the reader. For example, the supply voltage may be reduced below the level at which the memory cannot be written, or even below the level at which the IC cannot be operated. For example, by limiting the supply voltage to below about <NUM> volt, both read and write functionality are typically disabled. Some or all operations of the tag may therefore be restricted to be performed only above a minimum distance to the reader. Since this feature is not controlled by a digital signal, but by limiting power to the RFID IC, security may be improved.

Reducing the voltage to the RFID tag IC at high RF powers may also prevent physical damage to the RFID tag IC. This includes reduced self-heating (thermal protection), which in turn reduces the required voltage limiter device size (area improvement) and reduces the parasitic input cap due to the reduced device size (performance improvement). Temperature sensitive applications/products are not disturbed. Power is not burned in the voltage limiter and therefore can be used by other labels in a population (power sharing).

<FIG> schematically illustrate circuits for a voltage limiter <NUM> according to second and third respective example embodiments. For comparison, <FIG> illustrates a circuit for a voltage limiter <NUM>, without the feedback circuitry of the present disclosure, useful for understanding the present disclosure.

Accordingly, <FIG> shows a voltage limiter <NUM> including a current sink device <NUM> in the form of an NMOS transistor coupled between the output Vrec <NUM> of the rectifier of the RFID tag, and a ground reference <NUM>. A reference generator <NUM> comprises a voltage reference <NUM> for outputting a voltage Vref <NUM> dependent upon the rectifier output voltage Vrec, and further comprises a transistor <NUM> and a resistor <NUM> coupled in series between the output Vrec <NUM> of the rectifier and ground <NUM>. The control terminal of the transistor <NUM> is controlled by the voltage Vref <NUM>. A reference voltage Vlim <NUM> for controlling the current sink device <NUM> is generated at the connection point between the transistor <NUM> and resistor <NUM>, which is coupled to the control terminal of current sink device <NUM>.

<FIG> illustrates a voltage limiter <NUM> according to a second example embodiment of the present invention. The voltage limiter <NUM> includes a current sink device <NUM>, in the form of an NMOS transistor, coupled between the output (Vrec) <NUM> of the RF rectifier and a reference or ground potential (gnd) <NUM>. A reference generator <NUM> has an output <NUM> providing a reference voltage Vlim <NUM> which is input to the control terminal (in this embodiment, the gate terminal) of the current sink device <NUM> for controlling a current through the current sink device <NUM> to limit the output voltage of the RF rectifier to a predefined voltage level. The reference generator <NUM> comprises a voltage reference <NUM> for outputting a voltage Vref <NUM> dependent upon the rectifier output voltage Vrec, and further comprises a transistor m, <NUM>, in the form of a PMOS transistor, and a resistor R, <NUM> coupled in series between the output Vrec <NUM> of the rectifier and ground <NUM>. The control terminal (in this embodiment, the gate terminal) of the transistor <NUM> is controlled by the voltage Vref <NUM> output by the voltage reference. The reference voltage Vlim <NUM> for controlling the current sink device <NUM> is generated at the connection between the transistor <NUM> and resistor <NUM>, this connection point being coupled to the control terminal of current sink device <NUM>. In this embodiment, the reference voltage Vlim increases with the output voltage <NUM> of the RF rectifier. The current sink device <NUM> sinks current when the reference voltage Vlim <NUM> exceeds a predetermined value, in this case the threshold voltage of the current sink device <NUM>.

The voltage limiter <NUM> of <FIG> embodiment also includes feedback circuitry <NUM>, <NUM>, <NUM> arranged to provide a feedback current to the reference generator <NUM> to vary the reference voltage Vlim <NUM> output by the reference generator <NUM> for controlling the current through the current sink device <NUM>, the feedback current being dependent on the current through the current sink device <NUM>.

The feedback circuitry <NUM>, <NUM>, <NUM> includes a current replica device <NUM>, a current mirror device <NUM> and a current copy device <NUM>. The current replica device <NUM>, in the form of a NMOS transistor, is coupled in parallel with the current sink device <NUM>, between the output (Vrec) <NUM> of the RF rectifier and the reference or ground potential <NUM>. The control terminal of the current replica device <NUM> is connected to the control terminal of the current sink device <NUM>. A current through the current replica device <NUM> may be proportional to the current through the current sink device <NUM>, for example a multiple or a sub-multiple of it. The current mirror device <NUM> and a current copy device <NUM> together form a current mirror for copying the current in the current replica device <NUM> (for example a multiple or submultiple of it). The current mirror device <NUM>, in the form of a PMOS transistor, is coupled in series with the current replica device <NUM>, between the output Vrec <NUM> of the RF rectifier and the current replica device <NUM>. The source terminal of the current mirror device <NUM> is coupled to Vrec <NUM>, while the gate and drain terminals of the current mirror device <NUM> are connected to each other and are coupled to the drain terminal of the current replica device <NUM>. The copy current device <NUM>, in the form of a PMOS transistor, is coupled between the output Vrec <NUM> of the RF rectifier and the control terminal of the current sink device <NUM>. That is, the source terminal of the current copy device <NUM> is coupled to the Vrec <NUM>, the drain terminal of the current copy device <NUM> is coupled to control terminal of the current sink device <NUM>. The control terminal of the copy current device <NUM> is connected to the control terminal of the current mirror device <NUM>. The current through the current copy device <NUM> is therefore a copy (e.g. a multiple or submultiple) of the current in the current replica device <NUM>, which is itself a copy (e.g. a multiple or submultiple) of the current in the current sink device <NUM>. The copied current, i.e. the current through the current copy device <NUM>, is fed back to the reference generator <NUM> at a feedback node <NUM>. In this example embodiment, the feedback node <NUM> is connected to the control terminal of the current sink device <NUM>. However, the feedback current may be provided at other circuitry points, as will be illustrated in other example embodiments. The unfilled arrows in <FIG> indicate the function of the feedback circuitry <NUM>, <NUM>, <NUM> in successively copying the current in the current sink device <NUM> to the current replica device <NUM>, the current mirror device <NUM>, and the current copy device <NUM> in order to provide, at feedback node <NUM>, a feedback current which increases with increasing current in the current sink device <NUM>. In this embodiment, the additional feedback current supplied at the feedback node <NUM> increases Vlim, causing the current sink device <NUM> to conduct more strongly, reducing the voltage Vrec.

<FIG> illustrates a voltage limiter <NUM> according to a third example embodiment of the present invention. The voltage limiter <NUM> differs from the voltage limiter <NUM> of <FIG> in that the feedback circuitry <NUM>, <NUM>, <NUM>, <NUM>, <NUM> comprises a further current mirror <NUM>, <NUM>, for copying the current in the first current mirror <NUM>, <NUM>, and the feedback current is fed back to a feedback node <NUM> corresponding to a different circuitry point. The feedback node <NUM> is connected to the output Vref of the voltage reference <NUM> and the control terminal of the transistor <NUM>. The further current mirror <NUM>, <NUM> comprises a further current mirror device <NUM> and a further current copy device <NUM>, in the form of NMOS based transistors. The first current copy device <NUM> and the further current mirror device <NUM> are coupled in series between the rectifier output Vrec <NUM> and ground <NUM>, the drain of the first current copy device <NUM> being coupled to the drain of the further current mirror device <NUM>, and the source of the further current mirror device <NUM> being coupled to ground <NUM>. The further current copy device <NUM> is coupled between the feedback node <NUM> and ground <NUM>. The control terminals (gate terminals) of the further current mirror device and the further current copy device are connected to each other and to the drain of the further current mirror device <NUM>. Including multiple current mirrors may facilitate different ratios between the feedback current and the current in the current sink device. The feedback current at feedback node <NUM> influences the current through transistor <NUM>, thereby influencing the voltage Vlim <NUM> at the control terminal of the current sink device <NUM>. Compared with the example embodiment of <FIG>, the location of feedback node <NUM> in the example embodiment of <FIG> enables the sizes of the devices to be reduced, resulting in an area benefit, and to have a faster response.

<FIG> illustrates a voltage limiter <NUM> according to a fourth example embodiment. Voltage limiters according to the present disclosure may be based on voltage generation architecture comprising a current sink or current source into or from a diode (or multiple diodes). In <FIG>, a PMOS transistor m1 is coupled in series with a current sink I between Vrec <NUM> and ground <NUM>. The current through the transistor m1 is mirrored in a second PMOS transistor m2, the source terminal of which is coupled to Vrec <NUM>, the drain terminal of which is coupled via multiple series-connected diodes md1, md2, mdN to ground <NUM>. A reference voltage Vlim <NUM> is generated at the connection point between the transistor m2 and the closest diode md1. The current sink device <NUM> of this embodiment is provided by a PMOS transistor coupled between Vrec <NUM> and ground <NUM>. The reference voltage Vlim <NUM> is coupled to the control terminal of current sink device <NUM>. The current sink device <NUM> sinks current when the difference between the output voltage <NUM> of the RF rectifier and the reference voltage Vlim exceeds a predetermined value, in this case the threshold voltage of the current sink device <NUM>. The voltage limiter <NUM> of <FIG> also includes feedback circuitry comprising a current replica device <NUM>, a current mirror device <NUM> and a current copy device <NUM>, arranged to provide a feedback current to feedback node <NUM> to vary the reference voltage Vlim <NUM> output by the reference generator for controlling the current through the current sink device <NUM>. Each of the current sink device <NUM>, the current replica device <NUM>, the current mirror device <NUM> and the current copy device <NUM> has opposite polarity compared to the corresponding elements of the voltage limiter <NUM> of <FIG>. The current sink device <NUM> and the current replica device <NUM> are PMOS transistors, while the current mirror device <NUM> and the current copy device <NUM> forming the current mirror are NMOS transistors.

The maximum current at which the output voltage <NUM> of the RF rectifier is modified is determined, at least in part, by the driving capability of the reference generator, the current replica ratio and current copy ratio. For example: Iref · nsink · ncopy @vdda ~ vth_sink (vgs ~ vds), where Iref is the driving capability of the reference generator, nsink is the ratio between the current through the current replica device and the current through the current sink device, ncopy is the ratio between the copied current and the current through the current replica device, vth_sink is the threshold voltage of the current sink device. Referring to <FIG>, that is, once the current in the current copy device <NUM> is more than can be sourced from the transistor m2, vlim drops, resulting in an increased current though the current sink device <NUM> and a drop in the voltage vrec output by the RF rectifier.

<FIG> illustrates a voltage limiter <NUM> according to a fifth example embodiment. The voltage limiter <NUM> differs from the voltage limiter <NUM> of <FIG> in that the reference voltage is based on voltage generation architecture which uses a charge pump with limited driving capability. In <FIG>, the reference voltage Vlim <NUM> is generated by a charge pump device <NUM> coupled to a clock generator <NUM> and referenced to the ground potential <NUM>. The charge pump device <NUM> generates the reference voltage Vlim <NUM> based on a regulated voltage Vreg <NUM>.

<FIG> illustrate a voltage limiter <NUM>, <NUM> according to sixth and seventh example embodiments respectively. The voltage limiters <NUM>, <NUM> differ from the voltage limiter <NUM> of <FIG> in that the feedback circuitry further comprises an additional or complementary current sink device <NUM>, in the form of an NMOS transistor, coupled between Vrec <NUM> and ground <NUM>, in parallel with the main current sink device <NUM>, and a sensing device or sensing gate <NUM> for sensing current through the main current sink device <NUM> controlling the additional current sink device <NUM> and for turning on the additional current sink device <NUM> when current flows in the main current sink device <NUM>. The polarity of the complementary current sink device <NUM> is opposite to that of the current sink device <NUM>. The current through the current sink device <NUM> depends on the voltage Vlim <NUM> at the control terminal of the current sink device <NUM>. Accordingly, the input of the sensing gate <NUM> is connected to the control terminal (gate) of the current sink device <NUM>. The output of the sensing gate <NUM> is connected to the control terminal of the complementary current sink device <NUM>. The sensing gate may be an inverter, a Schmitt trigger, a latch, an amplifier, and/or any other simple, complex or compound gate, sequential or combinational. In the voltage limiter <NUM> of <FIG>, the sensing gate <NUM> is an inverting Schmitt trigger. In <FIG>, the sensing gate <NUM> is a MOS inverter comprising a PMOS transistor <NUM> and an NMOS transistor <NUM>, their control terminals being coupled to the control terminal of the current sink device <NUM>, their sources being coupled to Vrec <NUM> and ground <NUM> respectively, their drains both being coupled to the control terminal of the complementary current sink device <NUM>.

<FIG> shows a graph illustrating the behaviour of the voltage limiters <NUM> and <NUM> of <FIG>, compared with that of the voltage limiter <NUM> of <FIG> and a typical voltage limiter <NUM>. The upper solid line (a) shows the voltage-current characteristics for a typical voltage limiter <NUM> without the feedback circuitry of the present disclosure. The dashed line (b) shows the voltage Vrec <NUM> output by the RF rectifier of the RFID tag as a function of the current through the current sink device <NUM>, for the voltage limiter <NUM> of the fourth example embodiment described above with reference to <FIG>. The behaviour of the voltage limiter <NUM> is the same as that described with respect to curve (b) of <FIG>. The lower solid line (c) shows the voltage Vrec <NUM> as a function of the current through the current sink device <NUM>, for the voltage limiters <NUM> and <NUM> of the sixth and seventh example embodiments described above with reference to <FIG>. The effect of the complementary current sink device <NUM> in the voltage limiters <NUM> and <NUM> of <FIG> is to further flatten the I/V behaviour, causing the reduced voltage (i.e. for currents above around 10E-<NUM> A in <FIG>) to remain constant, at a value determined at least in part by the parameters of the complementary current sink device <NUM>, rather than gradually increasing as for the voltage limiter <NUM> without the complementary sink device <NUM>. The complementary current sink device <NUM> effectively prevents any rise in voltage with increasing current (i.e. increasing proximity to the reader) which could power on the RFID tag.

<FIG> illustrates a voltage limiter <NUM> according to an eighth example embodiment. The voltage limiter <NUM> differs from the voltage limiter <NUM> of <FIG> in that the feedback circuitry further comprises a current pull device <NUM>, in the form of an NMOS transistor, coupled between the control terminal of the current sink device <NUM> and ground <NUM>. The polarity of the current pull device <NUM> is opposite to that of the current sink device <NUM>. The voltage limiter <NUM> also includes a sensing device <NUM> for sensing the current through the current sink device <NUM>, and for turning on the current pull device <NUM> when current flows in the main current sink device <NUM>. Accordingly, the input of the sensing gate <NUM> is connected to the control terminal (gate) of the current sink device <NUM>. The output of the sensing gate <NUM> is connected to the control terminal of the current pull device <NUM>. The sensing gate may be an inverter, a Schmitt trigger, a latch, an amplifier, and/or any other simple, complex or compound gate, sequential or combinational. In the voltage limiter <NUM> of <FIG>, the sensing gate <NUM> is a MOS inverter comprising a PMOS transistor <NUM> and an NMOS transistor <NUM>, their control terminals being coupled to the control terminal of the current sink device <NUM>, their sources being coupled to Vrec <NUM> and ground <NUM> respectively, their drains both being coupled to the control terminal of the current pull device <NUM>.

<FIG> illustrates a voltage limiter <NUM> according to a ninth example embodiment. The voltage limiter <NUM> differs from the voltage limiter <NUM> of <FIG> in that the feedback circuitry further comprises a complementary current sink device <NUM> as disclosed above in connection with <FIG>, and a current pull device <NUM> as disclosed above in connection with <FIG>. The voltage limiter <NUM> includes a sensing gate <NUM> for sensing the current through the current sink device <NUM>, the input of the sensing gate <NUM> being connected to the control terminal (gate) of the current sink device <NUM>. The output of the sensing gate <NUM> is connected to the control terminals of both the complementary current sink device <NUM> and the current pull device <NUM>.

<FIG> shows a graph illustrating the behaviour of the voltage limiter <NUM> of <FIG>, compared with that of the voltage limiters <NUM>, <NUM> of <FIG>, the voltage limiter <NUM> of <FIG> and a typical voltage limiter <NUM>. The upper solid line (a), dashed line (b), and lower solid line (c) are the same as those discussed above with reference to <FIG>. The lowermost solid line (d) shows the voltage Vrec <NUM> as a function of the current through the current sink device <NUM>, for the voltage limiter <NUM> of the eighth example embodiment described above with reference to <FIG>. The effect of the current pull device <NUM> in the voltage limiter <NUM> of <FIG> is to clamp the control terminal of the current sink device <NUM> so that the current sink device <NUM> is fully turned on, causing the voltage to reduce even more sharply (i.e. at a current of around 4E-<NUM> A). Thus the I/V curve (d) in <FIG> has a sharper edge than curve (b). An advantage of this arrangement is that the current pull device <NUM> may be smaller than the complementary current sink device <NUM> of <FIG>.

<FIG> illustrates a voltage limiter <NUM> according to a tenth example embodiment. The voltage limiter <NUM> differs from the voltage limiter <NUM> of <FIG> in that the feedback circuitry applies the feedback current to a feedback node <NUM> at a different circuitry point. In the voltage limiter <NUM>, a resistor is coupled between the feedback node <NUM> and the control terminal of the current sink device <NUM>, thereby generating a voltage offset between the feedback node <NUM> and the control terminal of the current sink device <NUM>. The resistor <NUM> is coupled in series between the transistor m2 and the first diode md1 of the reference generator. In other embodiments, a similar voltage drop may be achieved using a different passive or active element, for example a diode, bipolar transistor, or MOS transistor, or using a combination of elements.

<FIG> shows a graph illustrating the behaviour of the voltage limiter <NUM> of the present disclosure, compared with that of the voltage limiter <NUM> of <FIG> and a typical voltage limiter <NUM>. The upper solid line (a) and dashed line (b) are the same as discussed above with reference to <FIG>. The lower solid line (e) shows the voltage Vrec <NUM> as a function of the current through the current sink device <NUM>, for the voltage limiter <NUM> of the tenth example embodiment described above with reference to <FIG>. The effect of the feedback current passing through a resistor is an upward shift in the value of the reduced voltage level at high currents. Changing the location of the feedback node can therefore be used to adjust the level of the reduced voltage at high currents. For example, some applications may require all read and write operations to be disabled at high RF powers, for which the voltage must be reduced below the read threshold, while other applications may require only write operations to be disabled, for which the voltage must be reduced below the write threshold, which is generally higher (e.g. 1V) than the read threshold (e.g. <NUM>.

In the example embodiments described above, the current sink device, current replica device, current mirrors, additional current sink device and current pull device are all based on MOS transistors. The current sink device and current replica device have a first polarity. The (first) current mirror is based on transistors having a second polarity opposite to the first polarity. However, the skilled person will appreciate that other devices, in particular other types of transistor, could be used.

It will also be appreciated that all the example embodiments disclosed above may be built in their complementary form, that is be replacing NMOS devices by PMOS devices and replacing PMOS devices by NMOS devices.

Claim 1:
A voltage limiter (<NUM>) for a radio-frequency identification, RFID, integrated circuit, IC, for an RFID tag, the RFID IC including a radio-frequency, RF, rectifier, the voltage limiter comprising:
a current sink device (<NUM>) coupled between the output (<NUM>) of the RF rectifier and ground (<NUM>);
a reference generator (<NUM>) having an output (<NUM>) for providing a reference voltage (Vlim) for controlling a current through the current sink device to limit a voltage at the output of the RF rectifier to values below a predefined voltage level; and
feedback circuitry (<NUM>, <NUM>) arranged to provide a feedback current to the reference generator to vary the reference voltage, the feedback current being dependent on the current through the current sink device.