Patent Description:
<CIT> describes III-N devices having a stepped cap layer over the channel of the device, for which the III-N material is orientated in an N-polar orientation.

<CIT> describes a diamond-based nitrogen polar surface gallium nitride high-electron-mobility transistor and a manufacturing method thereof.

<CIT> describes a semiconductor device comprising: a lower barrier layer composed of a layer of AlxGa1-xN (<NUM>≦x≦<NUM>) in a state of strain relaxation; and a channel layer composed of a layer of InyGa1-yN (<NUM>≦y≦<NUM>) disposed on said lower barrier layer, said channel layer having band gap that is smaller than band gap of said lower barrier layer and exhibiting compressive strain, wherein a gate electrode is formed over said channel layer via an insulating film and a source electrode and a drain electrode are formed over said channel layer, and wherein said insulating film is polycrystalline or amorphous.

<CIT> describes an N-polar III-nitride heterojunction JFET which includes a P-type III-nitride body under the gate electrode thereof.

<CIT> describes a GaN semiconductor device with improved heat resistance of the Schottky junction electrode and excellent power performance and reliability.

A wide bandgap semiconductor gallium nitride (GaN) material has advantages of a large bandgap, high breakdown field strength, a high polarization coefficient, a high electron mobility, and a high electron saturation drift velocity, and is gradually used in the field of power electronics and radio frequency.

Currently, a structure of a high electron mobility transistor based on gallium nitride has defects and needs to be improved.

This application provides a high electron mobility transistor having a low ohmic contact resistance, a power amplifier, and a preparation method for a high electron mobility transistor according to the independent claims.

According to one aspect of the invention, this application provides a high electron mobility transistor, including at least a channel layer, a barrier layer, and a substrate layer that are sequentially disposed, where a two-dimensional electron gas layer is formed in the channel layer, and the two-dimensional electron gas layer is in contact with the barrier layer; and the high electron mobility transistor further includes a source and a drain, where the source and the drain are located on the channel layer, and the source and the drain are in ohmic contact with the channel layer. The two-dimensional electron gas layer is generated through a polarization effect at a junction interface between the channel layer and the barrier layer. The two-dimensional electron gas layer is located in the channel layer, and the two-dimensional electron gas layer is in contact with the barrier layer. Therefore, a lower ohmic contact resistance may be obtained in a surface that is of the channel layer and that faces away from the barrier layer, or it may be understood that there is a lower ohmic contact resistance between the source and the channel layer and between the drain and the channel layer, so that the high electron mobility transistor can be better used in a high frequency and power scenario. Further, the barrier layer comprises a silicon-doped aluminum gallium nitride layer and an aluminum gallium nitride layer whose aluminum component is greater than <NUM>% that are sequentially disposed in a direction away from the channel layer; and a thickness of the aluminum gallium nitride layer whose aluminum component is greater than <NUM>% is between <NUM> and <NUM>.

The two-dimensional electron gas layer is a virtual layer of two-dimensional electron gas generated through a polarization effect at a heterojunction interface of the channel layer and the barrier layer. The two-dimensional electron gas layer is located in the channel layer, and the two-dimensional electron gas layer is in contact with the barrier layer.

In an implementation, not falling under the scope of the present invention a material of the channel layer may be gallium nitride (GaN), and a material of the barrier layer may be aluminum gallium nitride (AlGaN). The high electron mobility transistor may implement a high electron mobility by using the two-dimensional electron gas generated through a polarization effect at a heterojunction interface of aluminum gallium nitride and gallium nitride.

In addition, in this embodiment provided in this application, the surface that is of the channel layer and that faces away from the barrier layer is a nitrogen (N) surface. Alternatively, it may be understood that a surface (namely, a surface that faces away from the substrate layer) of the high electron mobility transistor is a nitrogen surface. The channel layer, the barrier layer, and the substrate layer are sequentially grown and formed. Therefore, during preparation of the high electron mobility transistor provided in this embodiment of this application, a high electron mobility transistor with a nitrogen surface can be more easily obtained, and crystal quality of the nitrogen surface can be effectively ensured. In addition, compared with a high electron mobility transistor with a gallium (Ga) surface, the high electron mobility transistor with the nitrogen surface can implement a lower ohmic contact resistance. Therefore, the high electron mobility transistor with the nitrogen surface can be better used in a high frequency and power scenario.

In specific application, a material of the substrate layer may be silicon (Si), silicon carbide (SiC), diamond, or the like. In an implementation provided in this application, the substrate layer may be made of a diamond material. Because the diamond material has higher thermal conductivity, heat dissipation performance of the component can be effectively improved. In addition, in an implementation provided in this application, the channel layer, the barrier layer, and the substrate layer are sequentially grown and formed. Therefore, the diamond substrate layer may be directly grown on the barrier layer by using a process, for example, microwave plasma chemical vapor deposition (Microwave Plasma Chemical Vapor Deposition, MPCVD), so that preparation efficiency and quality of the substrate layer can be effectively improved.

For a gate, in an implementation, the gate may be disposed on the channel layer and in Schottky contact with the channel layer.

In addition, according to different structures of the high electron mobility transistor, the gate may alternatively be disposed on another structure.

For example, in an implementation provided in this application, the high electron mobility transistor may further include a nucleation layer. The nucleation layer is located on a side that is of the channel layer and that faces away from the barrier layer. The gate is located on the nucleation layer, and the gate is in Schottky contact with the nucleation layer. A material of the nucleation layer may be aluminum nitride (AlN), or may be another material that facilitates forming of the channel layer. This is not limited in this application.

In an implementation, not falling under the scope of the present invention the barrier layer may include gallium nitride aluminum. According to the present invention, the barrier layer includes a silicon-doped aluminum gallium nitride layer and an aluminum gallium nitride layer whose aluminum component is greater than <NUM>% that are sequentially disposed in a direction away from the channel layer. The silicon-doped aluminum gallium nitride layer can adjust an energy band, to prevent a hole from being bound. The aluminum gallium nitride layer with a larger aluminum component can effectively improve an electron gas concentration. In summary, performance of the high electron mobility transistor can be effectively improved by using the silicon-doped aluminum gallium nitride layer and the aluminum gallium nitride layer whose aluminum component is greater than <NUM>%.

In an implementation, the high electron mobility transistor may further include a high resistance layer. Specifically, the high resistance layer is located between the barrier layer and the substrate layer. The nucleation layer, the channel layer, the barrier layer, the high resistance layer, and the substrate layer may be sequentially disposed. A material of the high resistance layer may be iron (Fe)-doped or carbon (C)-doped gallium nitride. A main function of the high resistance layer is to increase a resistance value of the high electron mobility transistor, so that the high electron mobility transistor can be used in an application scenario in which a high resistance value is required.

In addition, in an implementation, the high electron mobility transistor may also be a P-type (or normally closed) transistor. For example, the high electron mobility transistor includes the channel layer, the barrier layer, and the substrate layer that are sequentially disposed. In addition, there is a P-type doped (or hole-doped) gallium nitride layer on a side that is of the channel layer and that faces away from the barrier layer. In addition, the gate is in Schottky contact with the P-type doped gallium nitride layer. The source and the drain are in ohmic contact with the channel layer. In a final component structure, the high resistance layer, the nucleation layer, and the like mentioned in the foregoing embodiments may alternatively exist.

According to another aspect, this application further provides a radio frequency transistor and a power amplifier, including any one of the foregoing high electron mobility transistors. Alternatively, it may be understood that the high electron mobility transistor provided in this application may be widely used in devices such as a base station, a radar, a mobile phone, and a notebook computer. A specific application scenario of the high electron mobility transistor is not limited in this application.

According to another aspect of the present invention, this application further provides a preparation method for a high electron mobility transistor, and the method includes: sequentially growing at least a channel layer, a barrier layer, and a substrate layer on a base material in a specific direction; removing the base material; and preparing a source and a drain on the channel layer, where the source and the drain are in ohmic contact with the channel layer. The base material may be a material like silicon (Si) or silicon carbide (SiC). It may be understood that a main function of the base material is to be used as a substrate used to grow an epitaxial structure like the channel layer and the barrier layer, to prepare the epitaxial structure. A material of the channel layer may be gallium nitride. In addition, the channel layer, the barrier layer, and the substrate layer are sequentially grown and formed. Therefore, during preparation of the high electron mobility transistor, a high electron mobility transistor with a nitrogen surface can be more easily obtained, and crystal quality of the nitrogen surface can be effectively ensured. According to the invention, the growing a barrier
layer comprises: sequentially growing, in the specific direction, a silicon-doped aluminum gallium nitride layer and an aluminum gallium nitride layer whose aluminum component is greater than <NUM>%; and a thickness of the aluminum gallium nitride layer whose aluminum component is greater than <NUM>% is between <NUM> and <NUM>.

In an implementation, the preparation method may further include preparing a gate. The gate may be located on the channel layer, and the gate may be in Schottky contact with the channel layer.

Alternatively, in some preparation methods, before the growing a channel layer on a base material, the method may further include: growing a nucleation layer on the base material in the specific direction, where the channel layer is located on the nucleation layer.

In addition, during preparation of the gate, the gate may be located on the nucleation layer and in Schottky contact with the nucleation layer.

Alternatively, in some preparation methods, the nucleation layer may be removed after the base material is removed.

Alternatively, in some preparation methods, after the growing a nucleation layer on the base material in the specific direction, the method may further include: growing a buffer layer on the nucleation layer in the specific direction.

After the base material is removed, the nucleation layer and the buffer layer may be removed. The buffer layer is disposed to facilitate effective removal of the nucleation layer and the buffer layer itself, and quality of the channel layer is not affected.

According to the invention, the growing the barrier layer specifically includes: sequentially growing, in the specific direction, a silicon-doped aluminum gallium nitride layer and an aluminum gallium nitride layer whose aluminum composition is greater than <NUM>%.

Alternatively, in some implementations, before the growing the substrate layer, the method may further include: growing a high resistance layer on a surface of the barrier layer in the specific direction. A main function of the high resistance layer is to increase a resistance value of the high electron mobility transistor, so that the high electron mobility transistor can be used in an application scenario in which a high resistance value is required.

In addition, based on the preparation method provided in this application, a P-type (or normally closed) high electron mobility transistor may be further prepared. For example, when the P-type high electron mobility transistor is prepared, a P-type doped (or hole-doped) gallium nitride layer may be added on the channel layer, and the gate is in Schottky contact with the P-type doped gallium nitride layer.

It may be understood that, in a specific application, a sequence of different processes may be adaptively adjusted based on an actual requirement in the preparation method in this application. This is not limited in this application.

To facilitate understanding of a high electron mobility transistor provided in embodiments of this application, the following first describes an operating principle of the high electron mobility transistor.

The high electron mobility transistor (HEMT) achieves high electron mobility by using two-dimensional electron gas (2DEG) generated through a polarization effect at a heterojunction interface of aluminum gallium nitride (AlGaN)/gallium nitride (GaN). The two-dimensional electron gas means that motion of electrons in a direction perpendicular to a junction interface is bound by a potential well, and therefore the electrons are quantized, while motion of the electrons in a direction parallel to the junction interface is still free. Such an electron thin layer is called the two-dimensional electron gas.

A high electron mobility transistor can be used in microelectronics such as microwave radio frequency or power electronics. For example, in the field of microwave radio frequency, the high electron mobility transistor may be used as a power amplifier, and a main function of the high electron mobility transistor is to amplify a radio frequency signal inside an active antenna unit (AAU), and then transmit the radio frequency signal in a form of an electromagnetic wave through an antenna. In the field of power electronics, the high electron mobility transistor can be used as a power switch and drive. For example, in a terminal device like a mobile phone, a notebook computer, or a tablet computer, the high electron mobility transistor may be used as a switch in a charging circuit. In a device like a lidar, the high electron mobility transistor can be used as a main component of a drive.

As shown in <FIG>, in some high electron mobility transistors, silicon (Si) or silicon carbide (SiC) is usually used as a substrate, and then materials such as aluminum nitride (AlN), gallium nitride (GaN), and aluminum gallium nitride (AlGaN) are sequentially grown on the substrate for preparation. Then, a source <NUM>, a drain <NUM>, and a gate <NUM> are prepared on an upper surface of the AlGaN layer. A two-dimensional electron gas layer <NUM> is formed in the GaN layer, and the two-dimensional electron gas layer <NUM> is in contact with the AlGaN layer. When AlGaN is prepared, nitrogen (N) atoms in a compound are first formed, and then aluminum (Al) atoms and gallium (Ga) atoms are formed on the basis of the N atoms in a specific direction. Alternatively, it may be understood that, from a micro perspective, the N atoms, the Al atoms, and the Ga atoms in the AlGaN layer are sequentially arranged, so that a surface (for example, an upper surface in the figure) of a current high electron mobility transistor is a Ga surface. However, compared with the high electron mobility transistor with the Ga surface, a high electron mobility transistor with an N surface can implement a lower ohmic contact resistance. Therefore, the high electron mobility transistor with the N surface can be better used in a high frequency and power scenario. The high electron mobility transistor shown in <FIG> is not an embodiment of the present invention but helpful for understanding certain aspects thereof.

Therefore, an embodiment of this application provides a high electron mobility transistor according to claim <NUM> that can implement a lower ohmic contact resistance.

To make the objectives, technical solutions, and advantages of this application clearer, the following further describes this application in detail with reference to the accompanying drawings and specific embodiments.

Terms used in the following embodiments are merely intended to describe specific embodiments, but are not intended to limit this application. Terms "one", "a", and "this" of singular forms used in this specification and the appended claims of this application are also intended to include a form like "one or more", unless otherwise specified in the context clearly. It may be further understood that, in the following embodiments of this application, "at least one" means one, two, or more.

Reference to "an embodiment" or the like described in this specification means that one or more embodiments of this application include a particular feature, structure, or characteristic described in combination with the embodiment. Therefore, in this specification, statements, such as "in an embodiment", "in some implementations", and "in another implementation ", that appear at different places do not necessarily mean referring to a same embodiment, instead, the statements mean referring to "one or more but not all of embodiments", unless otherwise specifically emphasized in other ways. Terms "include", "have", and variants of the terms all mean "include but are not limited to", unless otherwise specifically emphasized in other ways.

As shown in <FIG>, an embodiment of this application provides a high electron mobility transistor. The high electron mobility transistor includes a channel layer <NUM>, a barrier layer <NUM>, and a substrate layer <NUM>. The channel layer <NUM>, the barrier layer <NUM>, and the substrate layer <NUM> are sequentially disposed in a specific direction. A two-dimensional electron gas layer <NUM> (represented by a dashed line in the figure) is formed in the channel layer <NUM>, and the two-dimensional electron gas layer <NUM> is in contact with the barrier layer <NUM>. A source <NUM>, a gate <NUM>, and a drain <NUM> are located on the channel layer <NUM>, the source <NUM> and the drain <NUM> are in ohmic contact with the channel layer <NUM>, and the gate <NUM> is in Schottky contact with the channel layer <NUM>.

In the high electron mobility transistor provided in this application, the two-dimensional electron gas layer is located in the channel layer, and is in contact with the barrier layer. Therefore, a surface that is of the channel layer and that faces away from the barrier layer can implement a lower ohmic contact resistance, so that the high electron mobility transistor can be better used in a high frequency and power scenario.

The two-dimensional electron gas layer <NUM> is a virtual layer of two-dimensional electron gas generated through a polarization effect at a heterojunction interface of the channel layer <NUM> and the barrier layer <NUM>. The two-dimensional electron gas layer <NUM> is located in the channel layer <NUM>, and is in contact with the barrier layer <NUM>.

Ohmic contact means that when a semiconductor is in contact with a metal, a barrier is usually formed. However, when doping density of the semiconductor is high, electrons may pass through the barrier through a tunnel effect, to form low-resistance ohmic contact. Good ohmic contact facilitates current input and output. Schottky contact means that when the gate <NUM> (for example, a metal material) and the channel layer <NUM> (for example, a semiconductor material) are in contact, an energy band of the semiconductor is bent at a boundary surface, to form a Schottky barrier.

In specific implementation, a material of the channel layer <NUM> may be GaN.

In this embodiment provided in this application, a surface (namely, a surface that faces away from the substrate layer <NUM>) of the high electron mobility transistor is a nitrogen (N) surface. Therefore, the high electron mobility transistor can implement a lower ohmic contact resistance, or it may be understood that there is a lower ohmic contact resistance between the source <NUM> and the channel layer <NUM> and between the drain <NUM> and the channel layer <NUM>, so that the high electron mobility transistor can be better used in a high frequency and power scenario. In addition, in this embodiment provided in this application, the channel layer <NUM>, the barrier layer <NUM>, and the substrate layer <NUM> are sequentially grown and formed. Therefore, during preparation of the high electron mobility transistor provided in this embodiment of this application, a high electron mobility transistor with an N surface can be more easily obtained, and crystal quality of the N surface can be effectively ensured. In addition, compared with a high electron mobility transistor with a gallium (Ga) surface, the high electron mobility transistor with the N surface can implement a lower ohmic contact resistance. Therefore, the high electron mobility transistor with the N surface can be better used in a high frequency and power scenario.

A thickness of the channel layer <NUM> may be any value between <NUM> and <NUM>, and a thickness of the barrier layer <NUM> may be any value between <NUM> and <NUM>. In specific application, the thicknesses of the channel layer <NUM> and the barrier layer <NUM> may be appropriately set based on an actual requirement. This is not specifically limited in this application. In addition, in another implementation, not falling under the scope of the present invention the material of the channel layer <NUM> may alternatively be gallium arsenide (GaAs) or the like, and the material of the barrier layer <NUM> may be gallium arsenide (AlGaAs) or the like. In specific applications not falling under the scope of the present invention the materials of the channel layer <NUM> and the barrier layer <NUM> may be appropriately selected and adjusted based on an actual requirement.

In specific application, a material of the substrate layer <NUM> may be silicon (Si), silicon carbide (SiC), diamond, or the like.

At room temperature (for example, <NUM>), thermal conductivity of Si is about <NUM> W/mK, thermal conductivity of SiC is about <NUM> W/mK, and thermal conductivity of diamond is usually greater than <NUM> W/mK.

Because the thermal conductivity of Si or SiC is relatively poor, a large thermal resistance is formed, and the thermal conductivity decreases with temperature rise, a problem of insufficient heat dissipation capability is faced in some high-power application scenarios. As a result, a high electron mobility transistor can run only at low power density, to ensure long-term reliability of the transistor. For example, theoretical output power density of a GaN HMET component may be more than <NUM> W/mm. However, when a substrate material is Si or SiC, to ensure long-term reliability of a high electron mobility transistor, the high electron mobility transistor needs to run at low power density (for example, less than <NUM> W/mm). This is not conducive to working performance of the high electron mobility transistor.

Therefore, the high electron mobility transistor with a diamond substrate can implement better heat dissipation. In addition, this further helps improve power density of the high electron mobility transistor.

When the substrate is made of a diamond material, in a preparation process, the GaN layer is usually bonded to the diamond substrate. However, a bonding process is complex and costly, which is not conducive to large-scale production. The bonding process requires a diamond surface to be very flat (for example, surface roughness is less than <NUM>) through processing. However, hardness of the diamond is high, and it is very difficult to process the surface to be very flat. In addition, a bonding process is also a monolithic process, and piece-by-piece processing and production may cause a problem of low production efficiency. In addition, during bonding, a bonding layer material, for example, silicon nitride (SiN), needs to be added between the GaN layer and the diamond substrate. Because the bonding layer material has a high thermal resistance, heat dissipation performance of the component is reduced.

In addition, because the diamond material has good thermal conductivity, heat dissipation performance of the component can be significantly improved.

In this embodiment provided in this application, the diamond material may be used as the substrate layer <NUM>, to improve heat dissipation performance of the component.

In addition, in this embodiment provided in this application, the channel layer <NUM>, the barrier layer <NUM>, and the substrate layer <NUM> are sequentially grown and formed. Therefore, the diamond substrate layer <NUM> may be directly grown on the barrier layer <NUM> by using a process, for example, microwave plasma chemical vapor deposition (MPCVD), so that preparation efficiency and quality of the substrate layer <NUM> can be effectively improved.

Alternatively, it may be understood that, in the high electron mobility transistor provided in this application, when the substrate layer <NUM> is prepared, bonding between the substrate layer <NUM> and the barrier layer <NUM> by using a bonding process can be avoided, thereby reducing a manufacturing difficulty and manufacturing costs. In addition, because the bonding process is avoided, adding a bonding material (for example, SiN) with a large thermal resistance between the substrate layer <NUM> and the barrier layer <NUM> is avoided. Therefore, heat dissipation performance of the component can be ensured.

In specific implementation, the HMET component may have various structures.

For example, as shown in <FIG>, in another embodiment provided in this application, the high electron mobility transistor further includes a nucleation layer <NUM>, and the nucleation layer <NUM> is located on a side that is of the channel layer <NUM> and that faces away from the barrier layer <NUM>. A material of the nucleation layer <NUM> may be AlN. In addition, a thickness of the nucleation layer <NUM> may be any value between <NUM> and <NUM>. In specific application, the thickness of the nucleation layer <NUM> may be appropriately set based on an actual requirement. This is not specifically limited in this application.

Specifically, during preparation, to facilitate growth of the channel layer <NUM>, the nucleation layer <NUM> may be first grown, and then the channel layer <NUM> is grown on the basis of the nucleation layer <NUM>.

As shown in <FIG>, it may be understood that, during preparation of the high electron mobility transistor, a base material <NUM> used to grow the channel layer <NUM> or the nucleation layer <NUM> is usually provided. The base material <NUM> is usually made of a Si or SiC material.

In a current preparation process, it is difficult to directly grow the channel layer <NUM> on the base material <NUM>. Therefore, the nucleation layer <NUM> may be first grown on the base material <NUM>, so that the channel layer <NUM> may be grown on the nucleation layer <NUM>.

Alternatively, it may be understood that because the GaN channel layer <NUM> and the Si or SiC base material <NUM> are made of different materials, the channel layer <NUM> and the base material <NUM> usually have different lattice constants and different thermal expansion coefficients. If the GaN channel layer <NUM> is directly grown on the Si or SiC base material <NUM>, a large quantity of hexagonal defects may occur between the channel layer <NUM> and the base material <NUM> due to problems such as lattice mismatch and thermal adaptation. Such defects are macro defects, and a crystal surface fluctuates greatly, which destroys continuity of a crystal film, and results in extremely difficult preparation of the component and low quality. In addition, when the GaN channel layer <NUM> is directly grown on the Si or SiC base material <NUM>, oxygen impurity ionization causes the channel layer <NUM> to have a high background carrier concentration. Therefore, mobility of electrons is significantly reduced, and working performance of the component is affected.

Therefore, to grow a high-quality channel layer <NUM> with an N surface, the nucleation layer <NUM> may be first grown on the base material <NUM>, and then the channel layer <NUM> is grown on the nucleation layer <NUM>.

As shown in <FIG>, in this embodiment provided in this application, the nucleation layer <NUM> generated due to a preparation process procedure may not be removed, to reduce preparation costs and simplify the preparation process. Therefore, a final product structure of the high electron mobility transistor may include the nucleation layer <NUM>.

In addition, during preparation of the electrodes, the source <NUM> and the drain <NUM> may pass through the nucleation layer <NUM> and be in ohmic contact with the channel layer <NUM>, and the gate <NUM> may be located on the nucleation layer <NUM> and be in Schottky contact with the nucleation layer <NUM>.

It may be understood that, in another implementation, the gate <NUM> may also pass through the nucleation layer <NUM> and be in Schottky contact with the channel layer <NUM>. This is not limited in this application.

In specific implementation, not falling under the scope of the present invention the barrier layer <NUM> may be an AlGaN material, or may be a doped AlGaN material.

According to the present invention, the barrier layer <NUM> includes a Si-doped AlGaN layer and an AlGaN layer whose Al component is greater than <NUM>% that are sequentially disposed in a direction away from the channel layer <NUM>. The Si-doped AlGaN layer can adjust an energy band to prevent a hole from being bound. The AlGaN layer with a larger Al component can effectively improve an electron gas concentration. In summary, performance of the high electron mobility transistor can be effectively improved by using the Si-doped AlGaN layer and the AlGaN layer whose Al component is greater than <NUM>%.

It may be understood that in specific application, an overall thickness of the barrier layer <NUM> may be between <NUM> and <NUM>. A thickness of the Si-doped AlGaN layer may be between <NUM> and <NUM>. A thickness of the AlGaN layer whose Al component is greater than <NUM>% is between <NUM> and <NUM>. In addition, in the AlGaN layer whose Al component is greater than <NUM>%, the Al component may be <NUM>%, <NUM>%, <NUM>%, or the like. A specific proportion of the Al component is not limited in this application. In addition, the overall thickness of the barrier layer <NUM>, and the thickness of the Si-doped AlGaN layer may be adaptively adjusted based on an actual situation. This is not limited in this application.

In addition, as shown in <FIG>, in another implementation, the high electron mobility transistor may further include a high resistance layer <NUM>.

Specifically, the high resistance layer <NUM> is located between the barrier layer <NUM> and the substrate layer <NUM>. The nucleation layer <NUM>, the channel layer <NUM>, the barrier layer <NUM>, the high resistance layer <NUM>, and the substrate layer <NUM> may be formed by sequentially growing in a specific direction.

The high resistance layer <NUM> may be iron (Fe)-doped or carbon (C)-doped GaN. A main function of the high resistance layer <NUM> is to increase a resistance value of the high electron mobility transistor, so that the high electron mobility transistor can be used in an application scenario in which a high resistance value is required.

In a specific application, a thickness of the high resistance layer <NUM> may be any value between <NUM> and <NUM>. In addition, in the high resistance layer <NUM>, a specific concentration of doped Fe or C may be appropriately set based on an actual requirement. This is not limited in this application.

For ease of clearly understanding the technical solutions of this application, the following describes in detail a forming process of a high electron mobility transistor.

As shown in <FIG>, a nucleation layer <NUM>, a channel layer <NUM>, a barrier layer <NUM>, and a high resistance layer <NUM> may be sequentially grown on a base material <NUM> in a specific direction.

As shown in <FIG>, the substrate layer <NUM> is grown on the high resistance layer <NUM>.

As shown in <FIG>, the component is flipped.

As shown in <FIG>, the base material <NUM> is removed.

As shown in <FIG>, a gate <NUM>, a drain <NUM>, and a source <NUM> are prepared on a surface of the nucleation layer <NUM>. The gate <NUM> is in Schottky contact with the nucleation layer <NUM>, and the source <NUM> and the drain <NUM> are in ohmic contact with the channel layer <NUM>.

It may be understood that high electron mobility transistors are mainly classified into two types: an N-type (or normally open) transistor and a P-type (or normally closed) transistor. N-type high electron mobility transistors can be widely used in the field of microwave radio frequency. For example, the N-type high electron mobility transistor may be used in a device like a base station or a radar, and is configured to perform a function like amplifying a radio frequency signal. P-type high electron mobility transistors can be widely used in the field of power electronics. For example, in a terminal device like a mobile phone or a notebook computer, the P-type high electron mobility transistor may be used as a drive, a switch, or the like.

In the foregoing embodiment, an N-type (or normally open) high electron mobility transistor is used as an example for specific description.

Certainly, in another implementation, a P-type (or normally closed) high electron mobility transistor is adaptively designed based on the foregoing structure. Alternatively, it may be understood that, in the P-type high electron mobility transistor, a P-type doped (or hole-doped) GaN layer may be added based on the HMET component in any one of the foregoing embodiments.

For example, as shown in <FIG>, in an embodiment provided in this application, a high electron mobility transistor includes a channel layer <NUM>, a barrier layer <NUM>, and a substrate layer <NUM> that are formed by sequentially growing in a specific direction. In addition, there is a P-type doped GaN layer <NUM> on a side that is of the channel layer <NUM> and that faces away from the specific direction. In addition, a gate <NUM> is in Schottky contact with the P-type doped GaN layer <NUM>. A source <NUM> and a drain <NUM> are in ohmic contact with the channel layer <NUM>.

It may be understood that, in a final component structure, the high resistance layer <NUM>, the nucleation layer <NUM>, and the like mentioned in the foregoing embodiments may alternatively exist.

Refer to <FIG>. An embodiment of this application further provides a preparation method for a high electron mobility transistor, and the method includes the following steps.

S100: Sequentially grow at least a channel layer, a barrier layer, and a substrate layer on a base material in a specific direction.

S300: Prepare a source and a drain on the channel layer. The source and the drain are in ohmic contact with the channel layer.

In specific preparation, the specific direction refers to any direction in space. For example, in a conventional preparation manner, to facilitate obtaining of good forming quality, the layers of materials are usually formed by sequentially growing from bottom to top. Therefore, the specific direction may be a direction from bottom to top. It may be understood that in another implementation, the specific direction may be a direction from top to bottom, or may be a direction from left to right. This is not specifically limited in this application.

Refer to <FIG>. In specific implementation, the base material <NUM> may be a material like silicon (Si) or silicon carbide (SiC). It may be understood that, in this embodiment of this application, a main function of the base material <NUM> is to be used as a substrate used to grow an epitaxial structure like the channel layer <NUM> and the barrier layer <NUM>, to prepare the epitaxial structure.

In actual application, a material of the channel layer <NUM> may be GaN. In addition, according to the invention, the channel layer <NUM>, the barrier layer <NUM>, and the substrate layer <NUM> are sequentially grown and formed. Therefore, during preparation of the high electron mobility transistor in the preparation method provided in this embodiment of this application, a high electron mobility transistor with an N surface can be more easily obtained, and crystal quality of the N surface can be effectively ensured.

When the channel layer <NUM> and the barrier layer <NUM> are grown, the channel layer <NUM> and the barrier layer <NUM> may be prepared by using a process, for example, metal-organic chemical vapor deposition (MOCVD). Certainly, a preparation process of the channel layer <NUM> and the barrier layer <NUM> is not limited in this application.

The substrate layer <NUM> may be prepared by using a material such as Si, SiC, or diamond. For example, when a diamond material is used for the substrate layer <NUM>, the diamond material may be directly grown on the barrier layer <NUM> by using a process, for example, microwave plasma chemical vapor deposition (MPCVD), to implement preparation of the substrate layer <NUM>.

Alternatively, it may be understood that, as shown in <FIG>, in a conventional preparation method, an AlN material, an AlGaN material, and a GaN material are usually grown sequentially on the substrate layer <NUM> of the Si or SiC material. Finally, the source <NUM>, the drain <NUM>, and the gate <NUM> are prepared on a surface of GaN (that is, a surface that faces away from the substrate layer <NUM>).

Refer to <FIG>. In the preparation method provided in this application, a base material (not shown in the figure) of a Si or SiC material may be used, and then the channel layer <NUM> (for example, GaN), the barrier layer <NUM> (for example, AlGaN), and the substrate layer <NUM> (for example, Si, SiC, or diamond) are grown on the base material. Then, the base material is removed, and the source <NUM>, the drain <NUM>, and the gate <NUM> are prepared on the channel layer <NUM>.

According to the preparation method provided in this embodiment of this application, a high-quality high electron mobility transistor with an N surface can be obtained. In addition, diamond may be directly grown and formed, to facilitate preparation of the substrate layer <NUM>.

Refer to <FIG> and <FIG> together. When the base material <NUM> is removed, an etching process, a mechanical grinding process, or a combination thereof may be used.

For example, the mechanical grinding process may be first used to perform thinning processing on the base material <NUM>, and then the etching process is used to remove the residual base material <NUM>. In this way, removal efficiency and quality of the base material <NUM> can be improved.

It may be understood that, in specific implementation, a process of removing the base material <NUM> is not limited in this application.

In addition, during specific preparation, to ensure forming quality of the channel layer <NUM>, before the channel layer <NUM> is prepared on the base material <NUM>, the method may further include: growing the nucleation layer <NUM> on the base material <NUM> in the specific direction, and then growing the channel layer <NUM> on the nucleation layer <NUM>. A material of the nucleation layer <NUM> may be AlN, or C-doped or Fe-doped AlN. A specific material composition of the nucleation layer <NUM> is not limited in this application.

During specific implementation, after the base material <NUM> is removed, the nucleation layer <NUM> may not be removed, so that a preparation process procedure can be simplified, and preparation efficiency can be improved.

In addition, refer to <FIG>. During preparation of the electrodes, the source <NUM> and the drain <NUM> need to keep in ohmic contact with the channel layer <NUM>. Therefore, before the source <NUM> and the drain <NUM> are prepared, a via that penetrates to a surface of the channel layer <NUM> may be further prepared on the nucleation layer <NUM> in a mechanical drilling or etching manner. Finally, the source <NUM> and the drain <NUM> may be prepared in different vias, so that the source <NUM> and the drain <NUM> keep in ohmic contact with the channel layer <NUM>.

The gate <NUM> may be directly prepared on a surface of the nucleation layer <NUM>, and is in Schottky contact with the nucleation layer <NUM>. Alternatively, a via that penetrates to the surface of the channel layer <NUM> may be prepared on the nucleation layer <NUM>, and the gate <NUM> keeps in Schottky contact with the channel layer <NUM>.

In addition, after the base material <NUM> is removed, the nucleation layer <NUM> may be further removed. For example, the nucleation layer <NUM> may be removed by using an etching process. Certainly, when the nucleation layer <NUM> is removed, another process like mechanical grinding may alternatively be used. This is not limited in this application.

Based on a current removal process, when the nucleation layer <NUM> is separately removed, quality of the surface of the channel layer <NUM> may be affected.

Therefore, as shown in <FIG>, during specific preparation, the method may further include: after the nucleation layer <NUM> is grown, growing a buffer layer <NUM> on the surface of the nucleation layer <NUM> in the specific direction, and then growing the channel layer <NUM> on a surface of the buffer layer <NUM>. A material of the buffer layer <NUM> may be AlGaN, and may be prepared by using a process like a metal-organic chemical vapor deposition process.

When the buffer layer <NUM> and the nucleation layer <NUM> are removed, a process combining thermal oxidation and wet etching may be used. Temperature required by a thermal oxidation process is generally between <NUM> and <NUM>, and a time is about <NUM> to <NUM> minutes. A main solution in a wet etching process is potassium hydroxide (KOH). In the thermal oxidation process, sufficient oxygen is first injected to fully oxidize AlN and AlGaN. AlN, AlGaN, and oxygen react to generate aluminum trioxide (Al<NUM>O<NUM>), gallium oxide (Ga<NUM>O<NUM>), and nitrogen (N<NUM>), where the oxide Al<NUM>O<NUM> and Ga<NUM>O<NUM> may be etched off by a KOH solution of <NUM>, and this method has little impact on the GaN channel layer <NUM>. Alternatively, it may be understood that, in a high-temperature oxidation temperature condition, AlGaN is more likely to be oxidized than GaN. A main reason why AlGaN is more easily oxidized than GaN is that Gibbs free energy (Gibbs free energy) of Al<NUM>O<NUM> obtained through reaction is greater than Gibbs free energy of Ga<NUM>O<NUM> obtained through reaction. In this way, impact on the GaN channel layer <NUM> can be reduced as much as possible.

In addition, during preparation of the barrier layer <NUM>, AlGaN may be directly grown on the surface of the channel layer <NUM> by using a metal-organic chemical vapor deposition method.

According to the present invention a Si-doped AlGaN layer and an AlGaN layer whose Al component is greater than <NUM>% are sequentially grown on the surface of the channel layer <NUM> in the specific direction. The Si-doped AlGaN layer can adjust an energy band to prevent a hole from being bound. The AlGaN layer with a larger Al component can effectively improve an electron gas concentration. In summary, performance of the high electron mobility transistor can be effectively improved by using the Si-doped AlGaN layer and the AlGaN layer whose Al component is greater than <NUM>%.

In addition, in some preparation methods, before the substrate layer <NUM> is grown, the method may further include: growing a high resistance layer <NUM> on the surface of the barrier layer <NUM> in the specific direction. The high resistance layer <NUM> may be iron (Fe)-doped or carbon (C)-doped GaN. The high resistance layer <NUM> can be prepared by using a process, for example, metal-organic chemical vapor deposition. A main function of the high resistance layer <NUM> is to increase a resistance value of the high electron mobility transistor, so that the high electron mobility transistor can be used in an application scenario in which a high resistance value is required.

Certainly, in specific implementation, a specific method for preparing the high resistance layer <NUM> is not limited in this application.

For ease of clearly understanding the technical solutions of this application, the following describes in detail another forming process of a high electron mobility transistor.

As shown in <FIG>, a nucleation layer <NUM>, a buffer layer <NUM>, a channel layer <NUM>, a barrier layer <NUM>, and a high resistance layer <NUM> may be sequentially grown on a base material <NUM> in a specific direction.

As shown in <FIG>, the nucleation layer <NUM> and the buffer layer <NUM> are removed.

As shown in <FIG>, a gate <NUM>, a drain <NUM>, and a source <NUM> are prepared on a surface of the channel layer <NUM>. The gate <NUM> is in Schottky contact with the channel layer <NUM>, and the source <NUM> and the drain <NUM> are in ohmic contact with the channel layer <NUM>.

In the foregoing preparation method, a preparation method for an N-type (or normally open) high electron mobility transistor is used as an example for specific description.

Certainly, in another implementation, the foregoing preparation method may alternatively be applied to preparation of a P-type (or normally closed) high electron mobility transistor.

For example, as shown in <FIG>, when the P-type high electron mobility transistor is prepared, a P-type doped GaN layer <NUM> may be added on the channel layer <NUM>, and the gate <NUM> is in Schottky contact with the P-type doped GaN layer <NUM>.

Claim 1:
A high electron mobility transistor, comprising at least a channel layer (<NUM>), a barrier layer (<NUM>), and a substrate layer (<NUM>) that are sequentially disposed, wherein
a two-dimensional electron gas layer (<NUM>) is formed in the channel layer (<NUM>), and the two-dimensional electron gas layer (<NUM>) is in contact with the barrier layer (<NUM>); and
the high electron mobility transistor further comprises a source (<NUM>) and a drain (<NUM>), wherein the source (<NUM>) and the drain (<NUM>) are located on the channel layer (<NUM>), and the source (<NUM>) and the drain (<NUM>) are in ohmic contact with the channel layer (<NUM>);
wherein the barrier layer (<NUM>) comprises a silicon-doped aluminum gallium nitride layer and characterized in that it further comprises an aluminum gallium nitride layer whose aluminum component is greater than <NUM>% and in that the silicon-doped aluminum gallium nitride layer and the aluminium gallium nitride layer whose aluminium component is greater than <NUM>% are sequentially disposed in a direction away from the channel layer; and in that a thickness of the aluminum gallium nitride layer whose aluminum component is greater than <NUM>% is between <NUM> and <NUM>.