Patent Description:
There has been a solid state imaging device combining a photodiode and a lock-in amplifier, where if a circuit added for each pixel is increased or enlarged, an aperture rate drops and a performance as an imaging device is limited, see for example <CIT>.

In <CIT> there is described a focal plane architecture which includes direct reading of an array of infrared detectors, each coupled to its own threshold circuit, the output of which is coupled to one input of a NAND gate, with the other input to the NAND gate being provided with a delayed threshold circuit output, thus to permit discrimination against ground clutter. This architecture results in an ultra-fast frame read out, inherent discrimination of compact targets, photon counting at infrared wavelengths, and programmable range gating by exterior selection of array events within an expected return time for a transmitted pulse.

Further, in <CIT> there is a stacked semi-conductor device with integrated sensor mounted thereon. Two or more pixels arranged in matrix form are connected in parallel every n pieces at a common node to form two or more pixels blocks. Each pixel block includes n pieces of transfer gates TG<NUM>-TGn for opening and closing each path jointing n pieces of photoelectric transfer elements PD<NUM>-PDn connected in parallel at the common node, each photoelectric transfer element PD<NUM>-PDn and the common node. As for each pixel block, a common reset transistor for resetting the whole pixel and a common amplifying transistor for amplifying signal read out from n pieces of pixels are provided at external portion of the pixel block.

Further, <CIT> describes an optical sensor for detecting a light signal in a disturbed environment. The senor has a number of image point units respectively comprising an optoelectronic converter for converting the input light into a photocurrent and a measurement value detection unit for detection and storage of a measurement value corresponding to the detected photocurrent. A output control unit serves to output the stored measurement values so as to set up a total image from the single image point related measurement values.

Further, <CIT> describes a fabrication method which forms vertical capacitors in a substrate. The method is preferably an all-dry process, comprising forming a through-substrate via hole in the substrate, depositing a first conductive material layer into the via hole using atomic layer deposition (ALD) such that it is electrically continuous across the length of the via hole, depositing an electrically insulating, continuous and substantially conformal isolation material layer over the first conductive layer using ALD, and depositing a second conductive material layer over the isolation material layer using ALD such that it is electrically continuous across the length of the via hole. The layers are arranged such that they form a vertical capacitor. The present method may be successfully practiced at temperatures of less than <NUM>° C. , thereby avoiding damage to circuitry residing on the substrate that might otherwise occur.

Hereinafter, the present invention will be described through embodiments of the invention. The embodiments do not limit the invention according to the claims, and all the combinations of the features described in the embodiments are not necessarily essential to means provided by aspects of the invention.

<FIG> is a schematic view describing an operation of a detection device <NUM>. The detection device <NUM> receives a reflection light <NUM> of a detection object <NUM> illuminated by a modulated illumination light <NUM> generated by a illumination light source <NUM> and amplifies by a lock-in amplifier that is synchronous with the modulated illumination light <NUM>. Accordingly, the reflection light derived from the modulated illumination light <NUM> generated by the illumination light source <NUM> is detected, a signal reflecting a phase and an amplitude of the reflection light <NUM> is detected, and information about a distance to the detection object <NUM> and the like are calculated. The illumination light source <NUM> is, for example, a LED or a laser, and a frequency of the modulated illumination light <NUM> is, for example, about <NUM> to <NUM>.

However, in a case where the detection object <NUM> is illuminated by a natural light <NUM> generated by a natural light source <NUM> such as the sun, a background light is included in the reflection light <NUM>, which includes lights ranged from a stationary light derived from the natural light <NUM> to a light having a frequency of about several KHz. Therefore, in order to improve detection accuracy according to the detection device <NUM>, it is preferable to remove such a background light component from the reflection light <NUM> of the detection object <NUM>.

<FIG> is a block diagram of the detection device <NUM>. The detection device <NUM> includes a photoelectric converter <NUM>, a direct current removing section <NUM>, a multiplier <NUM>, and a low pass filter <NUM>.

The photoelectric converter <NUM> receives the reflection light <NUM> from the detection object <NUM> and converts the light into an electrical signal corresponding to the light intensity. The direct current removing section <NUM> removes, from the electrical signal output by the photoelectric converter <NUM>, a background light component including a direct current component derived from the background light. The multiplier <NUM> multiplies, by a reference signal <NUM> synchronous with the illumination light source <NUM>, the electrical signal from which the background light component is removed, and then the detection device <NUM> outputs, according to an integration processing performed by the low pass filter <NUM>, a signal <NUM> reflecting a phase and an amplitude of the reflection light generated by the modulated illumination light <NUM> being reflected by the detection object <NUM>.

Furthermore, the photoelectric converter <NUM> includes many light-receiving sections as pixels, and a process of converting the reflection light <NUM> into the electrical signal is performed for each pixel. Therefore, the detection device <NUM> can be used as an image sensor by which distance information for each pixel is obtained, and in addition, also can be used as a sensor for a monitor camera, an automatic operation device and the like. For this reason, it is preferable that a plurality of the direct current removing sections <NUM>, a plurality of the multipliers <NUM>, a plurality of the low pass filters <NUM> and the like are also provided, as a whole detection device <NUM>, for each pixel or for each group including at least a constant number of pixels.

<FIG> is a drawing showing a basic configuration of the direct current removing section <NUM> receiving an output from the photoelectric converter <NUM>. The direct current removing section <NUM> includes a filtering section <NUM> that is a filter circuit and an output section <NUM>.

The filtering section <NUM> includes a high pass filter, which is formed by a resistor <NUM> and a capacitor <NUM>. Accordingly, a bandwidth lower than a cutoff frequency is blocked from an output signal of the photoelectric converter <NUM>. Accordingly, the background light component is attenuated from the output signal of the photoelectric converter <NUM>.

The output section includes an operational amplifier <NUM> coupling an output and an inverted input via a resistor <NUM>. A non-inverted input of the operational amplifier <NUM> is coupled to a reference voltage. Accordingly, an output impedance of the direct current removing section <NUM> can be substantially set to zero.

<FIG> is a graph showing characteristics of the direct current removing section <NUM>. In the direct current removing section <NUM>, no significant output signal is obtained if no signal of a bandwidth lower than an upper limit of a frequency bandwidth is input in the operational amplifier <NUM>. It is preferable that the cutoff frequency is a frequency with which the background light component can be attenuated from the output signal and a sufficient light amount for the detection of the distance information and the like can be obtained, and it is preferable that the cutoff frequency is equal to or greater than <NUM> and is equal to or less than <NUM>. Therefore, for a resistance value of the resistor <NUM> and a capacity of the capacitor <NUM>, which form the filtering section <NUM>, a value is selected, with which the cutoff frequency corresponding to the frequency characteristics of the operational amplifier <NUM> is obtained.

However, as the resistance value of the resistor <NUM> and the capacity of the capacitor <NUM> become large, the sizes of these elements also become large. For this reason, if the direct current removing section <NUM> is implemented for each pixel of the photoelectric converter <NUM>, each pixel size becomes large and an effective aperture rate of the detection device <NUM> drops.

<FIG> is a schematic cross-sectional view showing a structure of the direct current removing section <NUM> in the detection device <NUM> formed as an integrated circuit. In the present embodiment, the direct current removing section <NUM> is formed laminating a first substrate <NUM>, a second substrate <NUM>, and a third substrate <NUM>.

The first substrate <NUM> includes a substrate <NUM> and a laminated circuit section <NUM>. The substrate <NUM> is formed of a semiconductor substrate such as silicon monocrystal and includes a light-receiving section <NUM> and a wiring section <NUM>, which are formed by a photolithography technique.

The light-receiving section <NUM> has a photodiode formed by injecting P type impurities in an N type well, for example. The light-receiving section <NUM> outputs the electrical signal in response to the light intensity of the incident light that is incident from the upper side of the drawing through the substrate <NUM>. In this manner, the first substrate <NUM> forms a light-receiving substrate of back surface irradiation type.

The laminated circuit section <NUM> includes the wiring section <NUM> and a connection section <NUM>, which are formed by the photolithography technique. The wiring section <NUM> is coupled to circuits and elements which are formed in other regions of the substrate <NUM>, and is also coupled to a voltage source and the like. The connection section <NUM> is exposed on a front surface of the first substrate <NUM>, and is electrically coupled relative to a connection section <NUM> of the second substrate <NUM> laminated on the first substrate <NUM>.

The second substrate <NUM> has a substrate <NUM> and a laminated circuit section <NUM> that is a wiring layer. The substrate <NUM> is formed of a semiconductor substrate such as silicon monocrystal, and has a conductive via <NUM>, a resistance via <NUM>, and a transistor section <NUM>, which are formed by the photolithography technique.

The conductive via <NUM> has a conductive material of a low electrical resistance such as the metal filling a through hole formed penetrating the substrate <NUM> in a thickness direction. Accordingly, for example, in a case where copper is used as the conductive material, the conductive via <NUM> having a resistivity ρ of about <NUM>×<NUM>-<NUM> (Ω·m) electrically couples the front and rear sides of the substrate <NUM>.

The resistance via <NUM> has a material of high electrical resistance such as polysilicon that has a resistivity ρ of about <NUM> (Ω·m), the material filling the through hole formed penetrating the substrate <NUM> in the thickness direction. Accordingly, the resistance via <NUM> can be used as the resistors <NUM>, <NUM> between the front and rear sides of the substrate <NUM>. The transistor section <NUM> forms the P type field effect transistor formed by injecting the p type impurities in the N type well, for example.

The laminated circuit section <NUM> of the second substrate <NUM> includes a wiring section <NUM> and the connection section <NUM>, which are formed by the photolithography technique. The wiring section <NUM> is formed in two layers at intervals in the thickness direction of the laminated circuit section <NUM>. The connection section <NUM> is provided penetrating the laminated circuit section <NUM>, and is coupled to the connection section <NUM> of the first substrate laminated on the second substrate <NUM> on the upper side of the drawing. Accordingly, the resistance via <NUM> of the second substrate is electrically coupled to the first substrate <NUM>. The resistors <NUM>, <NUM> have electric resistance values higher than that of the connection section <NUM> that is a wiring receiving the electrical signal from the photoelectric converter <NUM>. Also, the resistors <NUM>, <NUM> have diameters larger than a diameter of the connection section <NUM> that is a wiring receiving the electrical signal from the photoelectric converter <NUM>.

The third substrate <NUM> has a substrate <NUM> and a laminated circuit section <NUM>. The substrate <NUM> is formed of a semiconductor substrate such as silicon monocrystal, and has a plurality of transistor sections <NUM> formed by the photolithography technique. In the third substrate <NUM>, the transistor section <NUM> forms an N type field effect transistor formed by injecting the N type impurities in a P type well, for example.

The laminated circuit section <NUM> includes a wiring section <NUM> and a connection section <NUM> formed by the photolithography technique. The wiring section <NUM> is coupled to circuits and elements which are formed in other regions of the substrate <NUM>, and is also coupled to a reference voltage outside and the like at the same time. The connection section <NUM> is exposed on a front surface of the third substrate <NUM>, and is electrically coupled to the conductive via <NUM>, the resistance via <NUM> and the like of the second substrate <NUM>. In other words, the third substrate <NUM> is electrically coupled to the first substrate <NUM> via the second substrate <NUM> as a substrate.

In such a direct current removing section <NUM> described above, the filtering section <NUM> can be formed by combining the capacitor <NUM> formed by the wiring section <NUM> of the second substrate and the resistance via <NUM> formed in the second substrate <NUM>. Also, the operational amplifier <NUM> of the output section <NUM> can be formed by combining the transistor section <NUM> formed in the second substrate and the transistor section <NUM> formed in the third substrate <NUM>.

<FIG> is a detailed circuit diagram of the direct current removing section <NUM>. In the drawing, in addition to the resistor <NUM> and the capacitor <NUM> which form the filtering section <NUM>, the transistor section <NUM> and the resistor <NUM> are shown, which form the operational amplifier <NUM> of the output section <NUM>.

In the direct current removing section <NUM>, the electrical signal generated by the photoelectric converter <NUM> of the first substrate <NUM> is transmitted to the output section <NUM> via the filtering section <NUM> formed by the resistor <NUM> and the capacitor <NUM> in the second substrate <NUM>. In the laminated circuit section <NUM> of the second substrate <NUM>, the wiring section <NUM> occupies many portions. In other words, since there are few other elements in the laminated circuit section <NUM>, the wiring section <NUM> can form the capacitor <NUM> of a large capacity by using a large area.

In such a direct current removing section <NUM> described above, the filtering section <NUM> is formed by combining the capacitor <NUM> formed by the wiring section <NUM> of the second substrate and the resistance via <NUM> formed in the second substrate <NUM>. Since the capacitor <NUM> and the resistance via <NUM> can be formed without being restricted by the presences of the light-receiving section <NUM> arranged in the first substrate <NUM> and the circuit formed in the first substrate, the cutoff frequency determined in response to the frequency characteristics of the operational amplifier <NUM> can be set.

Also, in the direct current removing section <NUM>, the operational amplifier <NUM> of the output section <NUM> can be formed by combining the transistor section <NUM> of P type formed in the second substrate <NUM> and the transistor section <NUM> of N type formed in the third substrate <NUM>. In this manner, by using semiconductor substrates of different polarities as the second substrate <NUM> and the third substrate <NUM>, the implementation density can be improved, compared with a case where the P type transistor and the N type transistor are provided in one substrate.

<FIG> is a schematic view showing a structure of the resistance via <NUM> in the second substrate <NUM>. The drawing shows a shape of the second substrate <NUM> in a cross section parallel to a surface direction of the second substrate <NUM>.

In the illustrated cross section, the resistance via <NUM> has an annular shape. In the center of the resistance via <NUM>, a post <NUM> penetrating the resistance via <NUM> is arranged. The post <NUM> is, for example, formed of the same dielectric material as the material of the substrate <NUM>. Accordingly, the electrical resistance value can be set further higher by decreasing an effective cross-sectional area of the resistance via <NUM> formed of polysilicon and the like and effectively thinning the resistance via <NUM>. Therefore, the setting range of the cutoff frequency of the direct current removing section <NUM> can be expanded. Also, it is preferable to set a small diameter of the resistance via <NUM> also from the viewpoint of restraining the parasitic capacity in the resistance via <NUM>.

<FIG> is a schematic view showing a structure of the resistance via <NUM> in the second substrate <NUM>. The drawing shows the shape of the second substrate <NUM> in the cross section parallel to the surface direction of the second substrate <NUM>.

In the illustrated cross section, the resistance via <NUM> has a plurality of posts <NUM> penetrating the substrate <NUM>. The posts <NUM> are, for example, formed of the same dielectric material as the material of the substrate <NUM>. Accordingly, since the cross-sectional area of the resistance via <NUM> formed of polysilicon and the like is further decreased and the resistance via <NUM> is effectively thinner, the electrical resistance value becomes further higher. Therefore, the setting range of the cutoff frequency in the filtering section <NUM> of the direct current removing section <NUM> can be further expanded.

The illustrated resistance via <NUM> is formed of a material of high resistance such as polysilicon filling a further inner side of an oxide film <NUM> formed in an inner surface of a through via formed in the substrate <NUM>. Accordingly, by decreasing the effective cross-sectional area of the resistance via <NUM> formed of polysilicon and the like, the electrical resistance value can be further higher, and the setting range of the cutoff frequency in the filtering section <NUM> of the direct current removing section <NUM> can be further expanded.

<FIG> is a schematic cross-sectional view showing a structure of the direct current removing section <NUM> in the detection device <NUM> formed as an integrated circuit. The direct current removing section <NUM> shown in the drawing has the same structure as that of the direct current removing section <NUM> shown in <FIG>, except a structure of the resistance via <NUM> which will be described next. Therefore, the same reference numerals are given to the common elements and the repeated descriptions are omitted.

The illustrated direct current removing section <NUM> has three resistance vias <NUM> which respectively penetrate the substrate <NUM>. The three resistance vias are connected to each other in series according to the wiring section <NUM> formed in a lower surface of the laminated circuit section <NUM> and the wiring section <NUM> formed in the laminated circuit section <NUM> of the third substrate <NUM>.

Accordingly, the length of the resistance vias <NUM> coupling the connection section <NUM> of the second substrate <NUM> and the connection section <NUM> of the third substrate <NUM> becomes three times, and the resistance value as the resistor <NUM> also becomes three times. Therefore, the setting range of the cutoff frequency in the filtering section <NUM> of the direct current removing section <NUM> can be further expanded.

It should be noted that the number of the resistance vias <NUM> to couple is not limited to three, which goes without saying. More resistance vias <NUM> may be coupled to each other, and the thickness of the resistance vias <NUM> to couple may be changed so as to be able to finely change the setting value.

<FIG> is a schematic cross-sectional view showing a structure of the direct current removing section <NUM> in the detection device <NUM> formed as an integrated circuit. The direct current removing section <NUM> shown in the drawing has the same structure as that of the direct current removing section <NUM> shown in <FIG>, except a structure of the capacitor <NUM> which will be described next. Therefore, the same reference numerals are given to the common elements and the repeated descriptions are omitted.

In the illustrated direct current removing section <NUM>, the capacitor <NUM> is formed by the wiring section <NUM> extending from the connection section <NUM> of the second substrate <NUM> to the left side of the drawing and a pair of the wiring sections <NUM>, <NUM> sandwiching the wiring section <NUM> on the upper and lower sides of the drawing. Among the pair of the wiring sections <NUM>, <NUM>, the wiring section <NUM> on the lower side of the drawing is formed in the laminated circuit section <NUM> of the second substrate <NUM>, similar to the wiring section <NUM> in the other direct current removing section <NUM>.

The other wiring section <NUM> positioned on the upper side of the drawing is formed in the laminated circuit section <NUM> of the first substrate <NUM> in the lower surface of the drawing. The pair of these wiring sections <NUM>, <NUM> are mutually coupled by the connection section <NUM> of the second substrate. According to such a structure, the capacity of the capacitor <NUM> can be increased, and the setting range of the cutoff frequency in the filtering section <NUM> of the direct current removing section <NUM> can be further expanded.

It should be noted that the number of the wiring sections <NUM> to form the capacitor <NUM> is not limited to the above, which goes without saying. Also, for a purpose of avoiding the interference with other elements, the size of a part of the wiring sections <NUM>, <NUM> may be made different from the other parts of the wiring sections <NUM>, <NUM>.

<FIG> is a schematic cross-sectional view showing a structure of the direct current removing section <NUM> in the detection device <NUM> formed as an integrated circuit. The direct current removing section <NUM> shown in the drawing has the same structure as that of the other direct current removing sections <NUM> shown in <FIG> and the like, except a structure of the capacity via <NUM> which will be described next. Therefore, the same reference numerals are given to the common elements and the repeated descriptions are omitted.

In the illustrated direct current removing section <NUM>, the capacitor <NUM> is formed by the capacity via <NUM>. The capacity via <NUM> is located in the through hole formed penetrating the substrate <NUM> and has the conductive via <NUM>, the dielectric film <NUM>, and the dispersion layer <NUM>, which are formed coaxially around the central axis of the thickness direction of the substrate <NUM>.

The conductive via <NUM> positioned in the center of the capacity via <NUM> is formed of a conductive material of low electrical resistance such as the metal, similar to the conductive via <NUM> in the other direct current removing section <NUM>. The dielectric film <NUM> is formed of the oxide film and the like covering a circumferential surface of the conductive via <NUM>. The dispersion layer <NUM> is formed such that the conduction is obtained by diffusing the P type impurities in a case where the N type well is formed in the substrate <NUM>.

Also, the conductive via <NUM> of the capacity via <NUM> is coupled to the first substrate <NUM> from the connection section <NUM> via the wiring section <NUM> formed in the laminated circuit section <NUM> of the second substrate <NUM>. On the other hand, the dispersion layer <NUM> of the capacity via <NUM> is coupled to the connection section <NUM> of the third substrate <NUM>. Accordingly, the capacity via <NUM> is alternating-current-coupled to the first substrate <NUM> and to the third substrate <NUM>.

The capacity via <NUM> is provided in the second substrate <NUM>. Therefore, the capacity can be set, with which the cutoff frequency determined relative to the filtering section <NUM> is obtained, without considering the interference with the light-receiving section <NUM> formed in the first substrate <NUM>.

It should be noted that in the above-described embodiment, the resistance via and the capacity via have been described by using some examples. However, the functions of the functional via are not limited to the resistance and the capacity. By selecting the materials, the shapes, and the like of the functional via, the functional via can be formed as a passive element that operates as an inductor, a vibrator, an antenna, a delay line, a resonator, a terminator, and the like, for example.

<FIG> is a schematic cross-sectional view showing the first substrate <NUM> alone prepared for a case of manufacturing the detection device <NUM> including the direct current removing section <NUM> shown in <FIG>. The same reference numerals are given to the elements common with those in <FIG>. It should be noted that in the illustrated first substrate <NUM>, opposite to the notation in <FIG>, the substrate <NUM> is shown on the lower side of the drawing and the laminated circuit section <NUM> is shown on the upper side of the drawing.

In the first substrate <NUM>, the light-receiving section <NUM> is formed in the substrate <NUM>. Also, in the laminated circuit section <NUM>, the wiring section <NUM> and the connection section <NUM> are formed. The first substrate <NUM> has not been thinned at the beginning. Therefore, compared with the first substrate <NUM> shown in <FIG>, the substrate <NUM> is thicker.

<FIG> is a schematic cross-sectional view showing the third substrate <NUM> alone prepared for a case of manufacturing the detection device <NUM> including the direct current removing section <NUM> shown in <FIG>. The same reference numerals are given to the elements common with those in <FIG>.

In the third substrate <NUM>, a plurality of transistor sections <NUM> are formed in the substrate <NUM>. Also, in the laminated circuit section <NUM>, the wiring section <NUM> and the connection section <NUM> are formed.

<FIG> is a drawing showing a manufacturing process of the second substrate <NUM> prepared for a case of manufacturing the detection device <NUM> including the direct current removing section <NUM> shown in <FIG>. The same reference numerals are given to the elements common with those in <FIG>.

As illustrated, first, a viahole <NUM> is formed by etching the substrate <NUM> formed of silicon monocrystal and the like. At this step, since the substrate <NUM> is not thinned yet, the viahole <NUM> is not penetrating the substrate <NUM>.

<FIG> is a drawing showing a next manufacturing process of the second substrate <NUM>. A material of high electrical resistance such as polysilicon filling the viahole <NUM> formed in the substrate <NUM>. Accordingly, the resistance via <NUM> is formed.

<FIG> is a drawing showing the next manufacturing process of the second substrate <NUM>. Next, by diffusing the P type impurities in the substrate <NUM> having the N type well, a plurality of transistor sections <NUM> that are P type field effect transistors are formed. It should be noted that in the present embodiment, the N type field effect transistor which is the different polarity is not formed in the second substrate <NUM>. Accordingly, the number of steps of manufacturing the second substrate <NUM> can be reduced, and at the same time, the utilization efficiency of the second substrate <NUM> can be improved.

<FIG> is a drawing showing the next manufacturing process of the second substrate <NUM>. Next, in the front surface of the substrate <NUM>, the laminated circuit section <NUM> is formed by alternately laminating the conductor material and the insulated material which are patterned. Accordingly, the capacitor <NUM> is formed in the laminated circuit section <NUM>. By using the second substrate <NUM> prepared in this way as a substrate, the detection device <NUM> including the direct current removing section <NUM> can be manufactured by laminating the first substrate <NUM> shown in <FIG> and the third substrate <NUM> shown in <FIG>.

It should be noted that in the present embodiment, the conductive via <NUM> is not formed in the second substrate <NUM> before laminated. Accordingly, the conductive via <NUM> can be formed of copper and the like which easily contaminate the substrate. Also, by using the metal as the conductor material forming the capacitor <NUM>, the capacitor <NUM> having a MIM (metal-insulator-metal) structure can be formed. Accordingly, the resistance of the capacitor can be set low and the capacity density of the laminated circuit section <NUM> can be improved.

<FIG> is the drawing showing a manufacturing process of the direct current removing section <NUM>. The same reference numerals are given to the elements common with those in <FIG>, <FIG>, <FIG> and <FIG>.

First, the laminated circuit section <NUM> of the first substrate <NUM> and the laminated circuit section <NUM> of the second substrate <NUM> are set to be opposite to each other, and the first substrate <NUM> and the second substrate <NUM> are laminated and joined. Accordingly, the connection sections <NUM>, <NUM> are electrically coupled, and the light-receiving section <NUM> of the first substrate <NUM> is coupled to the resistor <NUM> formed by the resistance via <NUM> and to the capacitor <NUM> formed by the wiring section <NUM> of the second substrate <NUM>.

Next, as shown in <FIG>, in the first substrate <NUM> and the second substrate <NUM> which are joined to each other, the substrate <NUM> of the second substrate <NUM> is thinned by chemical mechanical polishing. Accordingly, one end of the resistance via <NUM> in the second substrate <NUM> is exposed to the front surface of the substrate <NUM>.

Next, as shown in <FIG>, and the conductive via <NUM> is formed in the second substrate <NUM> by forming the viahole that penetrates the substrate <NUM> of the second substrate <NUM> and then filling the viahole with the conductor material. In this way, in the second substrate <NUM>, the conductive via <NUM> and the resistance via <NUM> are complete.

Next, as shown in <FIG>, the laminated body of the first substrate <NUM> and the second substrate <NUM> is laminated on the third substrate <NUM> and is joined thereto. Here, the conductive via <NUM> and the resistance via <NUM>, which are exposed on the front surface of the substrate <NUM> of the second substrate <NUM>, are opposite to the connection section <NUM> of the third substrate <NUM>. Accordingly, the third substrate is coupled to the first substrate <NUM> via the second substrate <NUM>. It should be noted that in <FIG>, the laminated body of the first substrate <NUM> and the second substrate <NUM> is inverted from the state shown in <FIG>.

Next, as shown in <FIG>, the substrate <NUM> of the first substrate is thinned by chemical mechanical polishing. Accordingly, the light-receiving section <NUM> is close to the front surface of the substrate <NUM>. In this manner, the first substrate <NUM> that is a light-receiving substrate becomes a back surface irradiation type to which the light is incident from the substrate <NUM> side. In this way, the direct current removing section <NUM> shown in <FIG> is complete. It should be noted that the illustrated light-receiving section <NUM> corresponds to one pixel, and in the detection device <NUM>, a plurality of the illustrated structures are repeatedly formed in a matric shape.

It should be noted that in the above-described example, the conductive via <NUM> is formed after joining the second substrate <NUM> to the first substrate <NUM>. However, in a case where a material that is of high heat resistance and hardly contaminates the substrate, such as tungsten and Sn-Bi based material, is used as the material of the conductive via <NUM>, a procedure of forming the conductive via <NUM> and the resistance via <NUM> at the same time prior to the step of joining may be used.

Also, the first substrate <NUM>, the second substrate <NUM> and the third substrate <NUM> may be laminated and joined by wafer-to-wafer of dicing after collectively laminating and joining the wafers in which a plurality of dies are formed. Also, relative to the plurality of dies on the wafers, the first substrate <NUM>, the second substrate <NUM>, and the third substrate <NUM> may be laminated and joined to each other by chip-to-wafer of individually laminating and joining dies which are separately prepared. Furthermore, the first substrate <NUM>, the second substrate <NUM>, and th third substrate <NUM> may be joined to each other by chip-to-chip of laminating a pair of dies.

<FIG> is a plan view describing a layout relating to the light-receiving section <NUM> of the first substrate <NUM>. In the examples shown from the drawings to <FIG>, the wiring section <NUM> is coupled to the vicinity of the edge part of the light-receiving section <NUM>. However, as shown in <FIG>, the wiring section <NUM>, the connection section <NUM>, and the like may be connected in the center in the surface direction of the light-receiving section <NUM>. Accordingly, charges generated in the photoelectric converter <NUM> isotropically balance and are transmitted, and the intensity of the output signal is stable.

<FIG> is a circuit diagram of the other direct current removing section <NUM>. It should be noted that in the direct current removing section <NUM>, each structure of the filtering section <NUM> and the output section <NUM> are the same as that of the direct current removing section <NUM>, except portions which will be described next. Therefore, the same reference numerals are given to the common elements and the repeated descriptions are omitted.

The direct current removing section <NUM> has a structure different from that of the direct current removing section <NUM> in that a single direct current removing section <NUM> is coupled relative to a plurality of photoelectric converters <NUM> formed in the first substrate <NUM>. Each of the photoelectric converters <NUM> is coupled to the resistor <NUM> and the capacitor <NUM> via the switch element <NUM>.

The switch elements <NUM> couple any of the plurality of photoelectric converters <NUM> to the direct current removing section <NUM> by exclusively conducting each other. Accordingly, since many photoelectric converters <NUM> can be located for the direct current removing section <NUM>, the multiplier <NUM>, and the low pass filter <NUM>, which have a large circuit scale, the aperture rate of the detection device <NUM> can be improved.

<FIG> is a schematic cross-sectional view showing the other first substrate <NUM> alone that may form the detection device <NUM> including the direct current removing section <NUM>. The first substrate <NUM> has the substrate <NUM> and the laminated circuit section <NUM>.

In the first substrate <NUM>, the substrate <NUM> has the light-receiving section <NUM> formed by diffusing the impurities. Also, the laminated circuit section <NUM> has the wiring section <NUM>. The light-receiving section <NUM> forms the photoelectric converter <NUM> of front surface irradiation type that receives the incident light via the laminated circuit section <NUM> between the wiring sections <NUM>. It should be noted that in the illustrated steps, the first substrate <NUM> does not have the connection section <NUM>.

<FIG> is a drawing showing a manufacturing process of the direct current removing section <NUM>. In a case of manufacturing the detection device <NUM> including the direct current removing section <NUM> by using the first substrate <NUM>, first, a wafer support <NUM> is attached to the laminated circuit section <NUM> side of the first substrate <NUM>, that is, to the upper side of the drawing in <FIG> and to the lower side of the drawing in <FIG>.

Next, as shown in <FIG>, the first substrate <NUM> is thinned by chemical mechanical polishing the substrate <NUM> of the first substrate <NUM> in a state where the wafer support <NUM> side is fixed. Since the first substrate <NUM> is supported by the wafer support <NUM>, the first substrate <NUM> can be safely handled even if thinned.

Next, as shown in <FIG>, the connection section <NUM> is formed by punching to make a viahole from the substrate <NUM> side of the first substrate <NUM> and filling the viahole with the conductive material. Reaching this step, the connection section <NUM> is complete in the first substrate <NUM>.

Next, as shown in <FIG>, the second substrate <NUM> is laminated and joined relative to the first substrate <NUM>. The second substrate <NUM> laminated here is shown alone in <FIG>, and has the same structure as that laminated on the first substrate <NUM> in the step shown in <FIG>.

In a case where the second substrate <NUM> is laminated on the first substrate <NUM>, the lamination is performed in a direction where the connection section <NUM> of the first substrate <NUM> and the connection section <NUM> of the second substrate are opposite to each other. Accordingly, the wiring section <NUM> of the first substrate <NUM> is electrically coupled to the resistance via <NUM> of the second substrate via the connection sections <NUM>, <NUM>.

Next, as shown in <FIG>, the wafer support <NUM> attached to the first substrate <NUM> is fixed and the substrate <NUM> of the second substrate <NUM> is thinned by chemical mechanical polishing. Accordingly, one end of the resistance via <NUM> in the second substrate <NUM> is exposed on the front surface of the substrate <NUM>.

Next, as shown in <FIG>, a viahole penetrating the substrate <NUM> of the second substrate <NUM> is made by punching and is filled with the conductor material. Accordingly, the conductive via <NUM> is formed in the second substrate <NUM>. In this way, the conductive via <NUM> and the resistance via <NUM> are complete in the second substrate <NUM>.

Next, as shown in <FIG>, the laminated body of the first substrate <NUM> and the second substrate <NUM> are laminated and joined on the third substrate <NUM>. The third substrate <NUM> laminated here is shown alone in <FIG>, and has the same structure as that laminated on the second substrate <NUM> in the step shown in <FIG>.

In a case of laminating the third substrate <NUM>, the conductive via <NUM> and resistance via <NUM>, which are exposed on the front surface of the substrate <NUM> of the second substrate <NUM>, are made to be opposite to the connection section <NUM> of the third substrate <NUM>. Accordingly, the third substrate is coupled to the first substrate <NUM> via the second substrate <NUM>. It should be noted that in <FIG>, the laminated body of the first substrate <NUM> and the second substrate <NUM> are inverted from the state shown in <FIG>.

Next, as shown in <FIG>, the wafer support <NUM> is peeled from the first substrate <NUM>. In this way, the laminated circuit section <NUM> of the first substrate <NUM> is exposed toward outside, and the detection device <NUM> having the light-receiving section <NUM> of front surface irradiation type is complete. It should be noted that the illustrated light-receiving section <NUM> corresponds to one pixel, and in the detection device <NUM>, a plurality of the illustrated structures are repeatedly formed in a matric shape.

In the above-described embodiment, that forming of the lock-in detection device has been described by using examples by means of the functional via. However, the structure using the substrate having the functional via can be used in any laminated semiconductor device. Also, the substrate including the functional via may be supplied alone, for example, as an interposer, for a purpose of laminating in other semiconductor devices.

<FIG> is a circuit diagram of the other direct current removing section <NUM>. The direct current removing section <NUM> is formed in a second substrate <NUM> that is laminated on the first substrate <NUM> having the photoelectric converter <NUM>. The second substrate <NUM> has the filtering section <NUM> and the output section <NUM>. Here, the structure of the output section <NUM> has the same structure as that of the output section <NUM> of the direct current removing section <NUM> shown in <FIG>. Therefore, the same reference numerals are given to the common elements and the repeated descriptions are omitted.

In the direct current removing section <NUM>, the filtering section <NUM> has the transistor section <NUM> and the capacitor <NUM>. In other words, the direct current removing section <NUM> has a structure in which the resistor <NUM> is replaced by the transistor section <NUM> in the direct current removing section <NUM> of <FIG>.

<FIG> is a graph showing characteristics of the transistor section <NUM> formed by the field effect transistor such as MOS-FET. In the transistor section <NUM>, in a case where a voltage Vgs between a gate and a source is low, a drain current Ids is increased depending on the gate-source voltage Vgs.

On the other hand, in the transistor section <NUM>, a region in which a voltage Vds between a source and a drain is larger than a difference (Vgs-VT) between the voltage Vgs which is between the gate and the source and a threshold voltage VT becomes a saturated region in which the drain current Ids saturates. In the saturated region, it is as if there is an operation performing between the source and the drain as a constant current element. Referring to <FIG> again, in the direct current removing section <NUM>, a high pass filter can be formed cooperating with the capacitor <NUM> by causing the transistor section <NUM> to operate in the saturated region.

The direct current removing section <NUM> can form the filtering section <NUM> having a low cutoff frequency by using the transistor section <NUM>, without depending on the size of the elements. Accordingly, from the output signal of the photoelectric converter <NUM>, the bandwidth lower than the cutoff frequency can be blocked and the background light component can be attenuated, and the operational amplifier <NUM> of the output section <NUM> can operate in a bandwidth having effective gains at the same time.

<FIG> is a schematic cross-sectional view showing a manufacturing process of the second substrate <NUM> prepared for a case of manufacturing the detection device <NUM> including the direct current removing section <NUM> shown in <FIG>.

First, a trench <NUM> that is a recess is formed by etching in a P type well region <NUM> in a ground substrate <NUM> formed of silicon monocrystal. The trench <NUM> has a bottom surface closed within the P type well region <NUM> in a thickness direction of the ground substrate <NUM>. Therefore, the trench <NUM> does not penetrate the ground substrate <NUM>.

<FIG> is a drawing showing the next manufacturing process of the second substrate <NUM>. Next, a recess is formed in the P type well region <NUM> of the ground substrate <NUM>, and a plurality of dispersion layers <NUM> are formed by diffusing the N type impurities within the recess. Here, the dispersion layers <NUM> formed in the front surface of the ground substrate <NUM> on the upper side of the drawing form a drain or a source such as the transistor section <NUM>. Also, a dispersion layer formed in the inner surface of the trench <NUM> forms one end of the capacitor <NUM>.

<FIG> is a drawing showing a still next manufacturing process of the second substrate <NUM>. Next, in the inner surface of the trench <NUM> of the ground substrate <NUM>, the dielectric film <NUM> such as the oxide film is deposited. Furthermore, in a state where the front surface of the dispersion layer <NUM> is covered by the dielectric film <NUM>, the inner part of the trench <NUM> is filled with the conductive via <NUM> formed by the conductor. In this way, the capacitor <NUM> buried in the ground substrate <NUM> is formed in the second substrate <NUM>.

<FIG> is a drawing showing a still next manufacturing process of the second substrate <NUM>. Next, the laminated circuit section <NUM> is formed by alternately depositing the conductor layer and the insulated body layer in the front surface, on the upper side of the drawing, of the ground substrate <NUM> in which the capacitor <NUM> and the dispersion layer <NUM> are formed. In the laminated circuit section <NUM>, a gate electrode <NUM> is also included, the gate electrode <NUM> and a pair of dispersion layers <NUM> forming the transistor section <NUM> together. Also, in the most front surface of the laminated circuit section <NUM>, the connection section <NUM> is also included, which is in charge of electrical connection in a case of joining to the first substrate <NUM>. In this way, the second substrate <NUM> is formed.

<FIG> is a schematic cross section of the direct current removing section <NUM> formed by using the above-described second substrate <NUM> and the first substrate <NUM> shown in <FIG>. It should be noted that in <FIG>, the reference numerals used for showing the elements of layer structures in <FIG> are shown along with the reference numerals used for showing the elements in <FIG>.

As illustrated, in a case where the first substrate <NUM> and the second substrate <NUM> are laminated, one end of the photoelectric converter <NUM> is connected to the connection section <NUM> of the second substrate <NUM> via the wiring section <NUM> and the connection section <NUM>. The connection section <NUM> of the second substrate <NUM> are respectively connected to one end of the transistor section <NUM> and to one end of the capacitor <NUM> via the wiring of the laminated circuit section <NUM>. Accordingly, the filtering section <NUM> is formed in the second substrate <NUM>.

Also, in the second substrate <NUM>, the output section <NUM> and the like are formed by the wiring and the elements of other regions of the laminated circuit section <NUM>. In this way, the detection device <NUM> can be formed by laminating two substrates, that is, the first substrate <NUM> and the second substrate <NUM>. Here, since only the photoelectric converter <NUM> is formed in the first substrate <NUM>, the light-receiving sections are formed in high density in the detection device <NUM>. Also, in the second substrate <NUM>, since the filtering section <NUM> is formed by using the transistor section <NUM> that operates in the saturated region as the resistor and the capacitor <NUM> that is buried in the ground substrate <NUM>, the utilization efficiency of the ground substrate <NUM> in the filtering section <NUM> is high.

It should be noted that the capacitor <NUM> formed by using the trench <NUM> can be used in a case of forming the direct current removing section <NUM> shown in <FIG>. Therefore, the detection device <NUM> including the direct current removing section <NUM> also can be formed by two substrates, that is, the first substrate <NUM> in which the photoelectric converter <NUM> is formed and the second substrate <NUM> in which the capacitor <NUM> is formed by the trench.

<FIG> is a circuit diagram of the direct current removing section <NUM> having another structure. The direct current removing section <NUM> has the same structure as that of the direct current removing section <NUM> shown in <FIG>, except portions which will be described next. Therefore, the same reference numerals are given to the common elements and the repeated descriptions are omitted.

The direct current removing section <NUM> is different from the direct current removing section <NUM> in that the capacitor <NUM> and the switch element <NUM> are included which are arranged in the filtering section <NUM>. The capacitor <NUM> is connected to a control terminal of the transistor section <NUM> that operates as an active resistor in the saturated region. The switch element <NUM> is connected to or blocks the bias power source relative to the capacitor <NUM>.

In a case where the switch element <NUM> connects the bias power source to the capacitor <NUM>, the capacitor <NUM> is charged and a voltage applied to the control terminal of the transistor section <NUM> is generated. Even if the switch element <NUM> blocks the bias power source from the capacitor <NUM>, the capacitor <NUM> maintains the voltage applied to the control terminal of the transistor section <NUM>. Also, since the bias power source stops to charge the capacitor <NUM>, the power consumption in the direct current removing section <NUM> can be suppressed.

<FIG> is a timing chart showing operations of the direct current removing section <NUM>. At the beginning of starting operations of the detection device <NUM> including the direct current removing section <NUM>, the switch element <NUM> connected to the photoelectric converter <NUM> is opened, and the switch element <NUM> connected to the transistor section <NUM> and the capacitor <NUM> is closed. Accordingly, the capacitor <NUM> is charged by the power supplied from the bias power source. Therefore, a potential difference between both ends of the capacitor <NUM> is generated.

In the illustrated timing P, first, the switch element <NUM> is opened. Accordingly, the current from the bias power source to the capacitor <NUM> is blocked; however, the potential difference between the both ends of the capacitor <NUM> is maintained. Therefore, the voltage generated by the charged capacitor <NUM> is applied to the control terminal of the transistor section <NUM>. This state is maintained until the charge amount of the capacitor <NUM> drops due to an unavoidable leakage current. In this manner, the direct current removing section <NUM> can maintain the operations of the transistor section <NUM> in the saturated region without causing a bias current to flow.

Next, in the illustrated timing Q, the switch element <NUM> is closed, and the photoelectric converter <NUM> is connected to the transistor section <NUM>. Accordingly, a signal filtered by the high pass filter that is formed by the transistor section <NUM> and the capacitor <NUM> is output in the output section <NUM>. It should be noted that for the switch elements <NUM>, <NUM> in the direct current removing section <NUM>, the transistor and the like which can be repeatedly opened and closed by an electrical control can be used.

<FIG> is a circuit diagram of the direct current removing section <NUM> having still another structure. The direct current removing section <NUM> has the same structure as that of the direct current removing section <NUM> shown in <FIG>, except the portions which will be described next. Therefore, the same reference numerals are given to the common elements and the repeated descriptions are omitted.

The direct current removing section <NUM> has a plurality of switch elements <NUM> and a plurality of transistor sections <NUM>. One end of each of the plurality of transistor sections <NUM> is individually connected to the capacitor <NUM> via the switch element <NUM>. The plurality of switch elements <NUM> are individually opened and closed, and if closed, connect the corresponding transistor section <NUM> to the capacitor <NUM>.

Therefore, the direct current removing section <NUM> can change the characteristics of the filtering section <NUM> by selecting the switch element <NUM> to connect. Accordingly, variations in the characteristics of the filtering section <NUM> due to the manufacture tolerance can be electrically adjusted according to the settings of the switch element <NUM>. Also, according to application of the detection device <NUM>, the bandwidth which should be filtered in the filtering section <NUM> can be changed.

For the switch element <NUM> in the filtering section <NUM>, a controller such as the transistor can be used for a case where the opening and the closing are electrically controlled from outside. Also, if used for just one-time adjustment such as an adjustment for manufacture error, a single-use element such as a fusing fuse may be used.

It should be noted that although the illustrated filtering section <NUM> includes four sets of the switch elements <NUM> and the transistor sections <NUM>, the number of selectable transistor sections <NUM> is not limited to four, which goes without saying. Also, the characteristics of the plurality of transistor sections <NUM> may be the same as each other or may be mutually different. For example, the characteristics of the transistor sections <NUM> may be combined so as to make preferred number series defined according to JIS Z <NUM>, C <NUM> and the like of JIS. Accordingly, the characteristics of the filtering section <NUM> can be changed in a large range. Furthermore, in addition to the transistor section <NUM>, the characteristics of the filtering section <NUM> may be finely adjusted by adding small fixed resistors.

Also, in the illustrated example, although the resistance value that determines the cutoff frequency in the filtering section <NUM> is changed by changing the connecting transistor section <NUM>, other characteristics, for example, at least one of the Gm value and the capacity value may be set as variable. Furthermore, some characteristics values to which the resistance value is added may be set as adjustable.

Furthermore, in the above-described example, the case of forming the passive element that penetrates the substrate and the case of forming the passive element that does not penetrate the substrate have been described respectively. However, of course, the passive element that penetrates and the passive element that does not penetrate may be mixed, and furthermore, the passive element formed in the front surface of the substrate may be further mixed, which goes without saying.

Also, in the above-described example, the example has been shown where the photoelectric converter <NUM> and the direct current removing section <NUM> are formed in the different substrates from each other; however, instead of this, the photoelectric converter <NUM> and the direct current removing section <NUM> may be formed in the same substrate. In this case, as described before, the direct current removing section <NUM> is provided for each pixel or for each group including at least a constant number of pixels.

Also, the example has been shown where the resistor <NUM> and the capacitor <NUM> of the filtering section <NUM> are formed in the same substrate as each other; however, instead of this, the resistor <NUM> and the capacitor <NUM> may be individually formed in two different substrates alternately laminated.

While the embodiments of the present invention have been described, the technical scope of the invention is not limited to the above described embodiments. It is apparent to persons skilled in the art that various alterations and improvements can be added to the above-described embodiments. It is also apparent from the scope of the claims that the embodiments added with such alterations or improvements can be included in the technical scope of the invention.

The operations, procedures, steps, and steps of each process performed by an apparatus, system, program, and method shown in the claims, embodiments, or diagrams can be performed in any order as long as the order is not indicated by "prior to," "before," or the like and as long as the output from a previous process is not used in a later process. Even if the process flow is described using phrases such as "first" or "next" in the claims, embodiments, or diagrams, it does not necessarily mean that the process must be performed in this order.

Claim 1:
A detection device (<NUM>) comprising a plurality of photoelectric converters (<NUM>) to output an electrical signal corresponding to an incident light; and
a plurality of high pass filter circuits (<NUM>) provided corresponding to each of the plurality of photoelectric converters (<NUM>) or to each of a plurality of element groups respectively including a predetermined number of the photoelectric converters of the plurality of photoelectric converters (<NUM>), the plurality of high pass filter circuits (<NUM>) to attenuate a signal having a predetermined frequency from the electrical signal that is output from the plurality of photoelectric converters (<NUM>); wherein
the plurality of photoelectric converters (<NUM>) are provided in a first substrate (<NUM>) and the plurality of high pass filter circuits (<NUM>) are provided in a second substrate (<NUM>) laminated on the first substrate (<NUM>); and
each of the plurality of high pass filter circuits (<NUM>) has (i) a resistance component (<NUM>) having a field effect transistor (<NUM>) that is adapted to operate in a saturated region and (ii) a capacitor (<NUM>, <NUM>).