Patent Description:
A BMS measures and reports important information for the operation of a battery pack, and may protect the battery pack from damage across a range of operating conditions. Such a BMS can balance multiple batteries in the battery pack and can eliminate mismatches of cells in a series or parallel combinations to substantially improve battery efficiency and increase overall capacity of a battery having an arrangement of stacked cells. For increasing the number of stacked cells and related load currents in a battery, the potential for mismatch increases for two types of mismatch - state of charge mismatch and the less-common capacity/energy mismatch. Both types of mismatch limit the battery stack capacity (mAh) to the capacity of the weakest cell.

A BMS may use measurement channels and may use cell balancing pins to perform such measurements. An integrated circuit (IC) chip for a BMS may allow two main functions.

One function may be to perform accurate measurements of the battery cells (or battery/cell elements). Another function may be to allow the discharge of the cells so that their respective levels may be accurately controlled. This action is called cell balancing. The duration of battery functionality for multiple cells may be extended through cell balancing.

Cell balancing is sometimes referred to as a state in which the stacked cells of a battery are balanced, such that all of the cells in the battery stack are in compliance with the following two conditions. First, if all cells have the same capacity, the cells are balanced when all of them have the same state of charge. Open circuit voltage is an accurate indication of the state of charge. Second, cells with different capacities can be considered to be balanced when the state of charge is the same for all of the cells.

Cell balancing consists of drawing from the cells, a large current through a resistor (cell balancing resistor). For power dissipation reasons, the resistor may be external to the IC, and a control switch for its enabled use may be internal.

As a common requirement, BMS IC chips may be able to diagnose whether connections to external applications are properly in place. An open load detection (OLD) scheme is one exemplary approach which may be used to check that cell balancing pins are properly connected to the battery cells.

<CIT> discloses a system and method for measuring a voltage of electrochemical cells of a pack including circuit elements individually associated with respective electrochemical cells of the pack and having electrical characteristics that are different such that individual electrochemical cells can be distinguished from one another. Various self-diagnostic techniques are described, as well as techniques for measuring sense resistance, reducing sense resistance, and measuring changes in voltage of a cell over time. <CIT> discloses a battery cell monitoring circuit configured to detect an abnormity in the cell balancing and terminals of each battery cell. <CIT> discloses an apparatus for determining the occurrence of a leakage current between a series connected electrochemical battery cells. <CIT> discloses a system and method for measuring parameters of the battery system using a battery sensing circuit. In certain embodiments, the systems and methods allow a vehicle battery sensing circuit and/or other associated system to measure a compensation parameter. The compensation parameter may be utilized by the battery sensing circuit and/or other associated system in measuring other parameters relating to the battery system including cell voltages. <CIT> discloses a battery device including electric cells connected in series, resistors connected to respective electrodes of the electric cells, discharge switches for discharging voltages between the respective electrodes of each of the battery cells via the resistors, and a voltage detection and control circuit. <CIT> discloses an apparatus and method for diagnosing an abnormality in a cell balancing circuit in a battery pack including a plurality of cells corresponding to each cell balancing circuit. NXP datasheet "customer information notification: <CIT>, battery cell controller" discloses a cell balancing arrangement for leakage detection.

Various examples are directed to issues such as those addressed above and/or others which may become apparent from the following disclosure concerning performance of open load detection of cell balancing in a BMS.

In certain examples, aspects of the present disclosure involve an OLD scheme that allows diagnosis regarding whether connections in a system to external applications are properly in place and whether cell balancing pins in a system are properly connected to battery cells.

In a more specific examples, a multi-cell battery apparatus may include a plurality of voltage-stacked battery cell circuits, and a control circuit. The plurality of voltage-stacked battery cell circuits may include: a battery cell having an upper voltage terminal and a lower voltage terminal, and a switchable resistive-divider circuit having an input node disposed between the upper voltage terminal and the lower voltage terminal, for providing an output corresponding to a controlled-load voltage drop relative to the charge of each of the cell circuits. The control circuit may selectively activate the switchable resistive-divider circuits and, in response to the respective switchable resistive-divider circuits being selectively activated, measure the controlled-load voltage drops.

In one or more examples, each of the plurality of voltage-stacked battery cell circuits may further include a selectively activatable battery cell bias circuit to bias a cell output voltage across the upper voltage and lower voltage terminals and to equalize one of the plurality of voltage-stacked battery cell circuits relative to other of the plurality of voltage-stacked battery cell circuits.

In one or more example embodiments, the control circuit may be configured to periodically activate each of the switchable resistive-divider circuits and, in response, to measure and report voltage deviations beyond a certain threshold.

In one or more example embodiments, each of the switchable resistive-divider circuits may include two pairs of interconnected resistive-dividers cooperatively arranged to provide the controlled-load voltage drop.

In one or more example embodiments, each of the switchable resistive-divider circuits may include two pairs of interconnected resistive-dividers to provide, via respective high-impedance paths, the controlled-load voltage drop, and each of the respective high-impedance paths may include an upper-voltage resistive circuit to provide a first amount of resistance and a lower-voltage resistive circuit to provide another amount of resistance which differs from the first amount by at least an order of magnitude.

In one or more example embodiments, each of the switchable resistive-divider circuits may include a field-effect transistor and may include two pairs of interconnected resistive-dividers to provide the controlled-load voltage drop, wherein the control circuit may be configured to selectively activate the field-effect transistor and in response, enable each of the switchable resistive-divider circuits to permit for measurement of the controlled-load voltage drop.

In one or more example embodiments, the plurality of voltage-stacked battery cell circuits collectively may be configured to provide a large cell balancing current path for circulating current between one of a multiple primary load terminals to another of the multiple primary load terminals, and the control circuit may be configured to periodically activate each of the switchable resistive-divider circuits without causing non-negligible resistance to be added to the large cell balancing current path.

In one or more example embodiments, the control circuit may be configured to periodically activate each of the switchable resistive-divider circuits and, in response, to measure and report voltage deviations beyond a certain threshold, and in response to the control circuit periodically activating one of the switchable resistive-divider circuits, current drawn from an associated battery cell circuit may be sufficiently small to avoid introducing error in the measured voltage deviations.

In one or more example embodiments, the control circuit may be configured to periodically activate each of the switchable resistive-divider circuits and, in response, to measure and report voltage deviations beyond a certain threshold, and for each pair of consecutive battery cells of the voltage-stacked battery cell circuits, there is no shared common cell battery pin. In one or more example embodiments, the control circuit may be configured to periodically activate each of the switchable resistive-divider circuits and, in response, to measure and report voltage deviations beyond a certain threshold, and in response to each of the switchable resistive-divider circuits not being activated, the upper voltage terminal and the lower voltage terminal may be configured to indicate an open load detection mode through which the control circuit may be configured to confirm, in absence of the control circuit detecting voltage deviations beyond a certain threshold, integrity of the respective voltage-stacked battery cell circuit.

In one or more example embodiments, each of the voltage-stacked battery cell circuits may further include a pair of primary cell terminals coupled to the upper voltage and the lower voltage terminals through respective high-impedance paths, and may further include a pair of secondary cell terminals coupled to the upper voltage and the lower voltage terminals through respective high-impedance paths and further coupled to an associated switchable resistive-divider circuit, respectively, wherein in response to an associated one of the switchable resistive-divider circuits not being activated, the pair of secondary cell terminals may be configured to provide a voltage level which is lower than a voltage level of the pair of primary cell terminals to indicate a normal operation mode.

In one or more example embodiments, the multi-cell battery apparatus may further include cell terminal pins, and the plurality of voltage-stacked battery cell circuits and the control circuit may be configured to provide open load detection at the cell terminal pins, wherein the apparatus may further include a common cell battery pin shared by each two consecutive battery cells of the voltage-stacked battery cell circuits, and wherein the plurality of voltage-stacked battery cell circuits and the control circuit may be configured to provide an indication in response to an automatic self-diagnosis of open load detection status at cell terminal pins. In another specific example embodiment, for use with a multi-cell battery apparatus in which each of a plurality of voltage-stacked battery cell circuits includes a battery cell and a switchable resistive-divider circuit to output a controlled-load voltage drop, a method may be performed. The method may comprise: selectively activating the switchable resistive-divider circuits; and measuring the controlled-load voltage drop in response to the respective switchable resistive-divider circuits being selectively activated.

In one or more example embodiments, the method may further include biasing a cell output voltage across the upper voltage and lower voltage terminals and equalizing the voltage-stacked battery cell circuit relative to other of the plurality of voltage-stacked battery cell circuits.

In one or more example embodiments, the method may further include periodically activating each of the switchable resistive-divider circuits and, in response, generating outputs indicative of measured voltage deviations being beyond a certain threshold.

In one or more example embodiments, the switchable resistive-divider circuit may include two pairs of interconnected resistive-dividers cooperatively arranged to provide the controlled-load voltage drop, and the method may further include:.

In one or more example embodiments, for each pair of consecutive battery cells of the voltage-stacked battery cell circuits, there may be no shared common cell battery pin.

Aspects of the present disclosure are believed to be applicable to a variety of different types of apparatuses, systems and methods involving performance of open-load detection (OLD) of charge at each cell of a battery for cell balancing in a BMS. In certain specific implementations, aspects of the present disclosure have been shown to be beneficial when used in such an example context of a car battery system, for example, employing an OLD scheme. While not necessarily so limited, various aspects may be appreciated through the following discussion of non-limiting examples which use exemplary contexts.

Accordingly, in the following description various specific details are set forth to describe specific examples presented herein. It should be apparent to one skilled in the art, however, that one or more other examples and/or variations of these examples may be practiced without all the specific details given below. In other instances, well known features have not been described in detail so as not to obscure the description of the examples herein. For ease of illustration, the same reference numerals may be used in different diagrams to refer to the same elements or additional instances of the same element. Also, although aspects and features may in some cases be described in individual figures, it will be appreciated that features from one figure or embodiment can be combined with features of another figure or embodiment even though the combination is not explicitly shown or explicitly described as a combination. Embodiments as characterized herein may be implemented in accordance with a variety of different illustrative types of systems and methods in battery management applications, for example in battery operated equipment, automotive high voltage battery management systems, electric vehicle battery systems, high voltage battery management systems (HVBMS), battery operated industrial equipment, handheld battery operated equipment, electric power commercial battery backup systems, lithium ion cell balancing circuits, and the like. For instance, one or more of the aspects of the disclosure may be implemented in the context of a car battery system having an automotive safety integrity level (ASIL) of D grade, for example, which includes the highest degree of automotive hazard.

One or more of the above example applications, in accordance with the present disclosure, may be facilitated by employing open-load detection for cell balancing in connection with a BMS, optionally with redundant measurement capability for the associated cells. The system may, for example, include, a multi-cell battery apparatus that may include a plurality of voltage-stacked battery cell circuits, and a control circuit. The plurality of voltage-stacked battery cell circuits may include a battery cell having an upper voltage terminal and a lower voltage terminal, and a switchable resistive-divider circuit having an input node disposed between the upper voltage terminal and the lower voltage terminal, for providing a controlled-load voltage drop relative to the charge of each cell circuit. The control circuit may selectively activate the switchable resistive-divider circuits and, in response to the respective switchable resistive-divider circuits being selectively activated, to measure the controlled-load voltage drops.

Other embodiments are directed to methods for use with a multi-cell battery apparatus in which each of a plurality of voltage-stacked battery cell circuits includes a battery cell having an upper voltage terminal and a lower voltage terminal and includes a switchable resistive-divider circuit to output a controlled-load voltage drop. The method further includes: selectively activating the switchable resistive-divider circuits; and, measuring the controlled-load voltage drop in response to the respective switchable resistive-divider circuits being selectively activated.

Turning now to the figures, <FIG> is a schematic-like circuit diagram depicting an embodiment of an electronic circuit <NUM> for managing a battery <NUM>, having stacked (e.g. voltage-stacked) cell circuits or "cells" 102a, 102b, etc., in a manner that enables and/or diagnoses cell balancing. The illustrative electronic circuit <NUM> comprises a battery management system (BMS) IC <NUM> having a control circuit (e.g., logic or microcomputer circuitry) <NUM> configured for monitoring and/or managing the stacked cell through a voltage reduction circuit <NUM>. The voltage reduction circuit <NUM> is coupled to the battery <NUM> for selectively monitoring each of the cells 102a, 102b, etc. The selectivity is realized by using the control circuit <NUM> to selectively activate circuitry within the voltage reduction circuit <NUM> for passing energy and measuring controlled-load voltage drops associated with each of the cells 102a, 102b, etc. through switchable resistive-divider circuits within the voltage divider circuit <NUM>. <FIG> is shown to include some other optional aspects/features which would be recognized as facilitating different ways for implementing. For example, for processing energy associated with the cells 102a, 102b, etc., the BMS IC <NUM> has both the control circuit <NUM> and the voltage reduction circuit <NUM> depicted cell-specific circuit sections shown in dotted lines. In the control circuit <NUM>, these sections are shown as 104a, 104b, etc. In the voltage reduction circuit <NUM>, these sections are shown as 105a, 105b, etc. Each of the cell-specific circuit sections may be associated with a respective one of the cells 102a, 102b, etc., as indicated by the letter ("a" or "b") appended to each reference numeral. Accordingly, the control circuit <NUM> may selectively activate the sections 105a, 105b, etc. of the voltage reduction circuit <NUM>, via output nodes respectively associated therewith, to measure the controlled-load voltage drops. Also, as there are a variety of different ways to implement the voltage reduction circuit <NUM>, for illustrative purposes, the voltage reduction circuit <NUM> is shown to include example (non-limiting) circuits in the form of impedance components (e.g., resistors) and switches (e.g., transistors), the latter of which may have control-signal (e.g., gate) inputs coupled to output nodes of the control circuit <NUM>. Further, it would be appreciated that one or more parts of the BMS IC <NUM> may be included and implemented as part an integrated circuit chip (or chip set) and, in one such example context which depends on the implementation, the control circuit <NUM> and the voltage reduction circuit <NUM> may (or may not) be included and implemented as part the same integrated circuit chip (or chip set).

Accordingly, example circuits consistent with the present disclosure may be used to allow for performance of open-load detection (OLD) via selective control (via input/output signals) provided by a control circuit which is coupled to such a voltage reduction circuit. In this regard, the control circuit (and optionally the voltage reduction circuit) may feature cell balancing pins as part of a battery management system (BMS) without causing interference with accuracy of measurements made via other aspects of the BMS. For example, as is common with previous BMS features, primary measurements of the charge at each cell may be obtained independently of and without adverse effect due to the above-characterized voltage reduction circuit even though such a voltage reduction circuit is coupled directly to the cell circuitry. By the control circuit's selective activation, such primary measurements may be performed without degrading diagnosis. Moreover, such primary measurements and the selective operations/activations of the control circuit and the voltage reduction circuit may run in parallel so as to provide redundant measurements.

Various other important advantages of the instant disclosure may be recognized by highlighting certain attributes of the above-described circuit-based building blocks of the type of system disclosed herein. One such advantage and feature of the instant disclosure is that the system may permit for self-diagnosis, to ensure proper operation even when no open load may be detected. Another such advantage is that no resistor may be required in a path of a large cell balancing current. Such a resistor could limit maximum balancing current and could cause additional thermal dissipation in a BMS integrated chip (IC) or chip set. Another advantage is that while OLD detection is active in a case in which there is no open load, a switch in the switchable resistive-divider circuit may be activated/enabled, and there is no adverse current draw pulled from the associated cell of the battery. Such drawn current is sufficiently low that voltage drop caused though a battery connector (or battery-terminal connector) does not create a significant error on a primary measurement. A further advantage in this regard is that additional circuitry for open load diagnosis may be readily implemented so as not to degrade redundant (secondary) measurement accuracy. When an open load condition is present, measurements taken on the cell balancing pins (redundant or second measurement) may be 0V, or at least a low value. When no open load is present (such as in a normal operation case), the secondary measurement as discerned through the cell/channel leading to the analog-to-digital converter (ADC) in the control circuit (e.g., ADC <NUM> of <NUM> in <FIG>) may indicate a lower voltage versus the primary measurement. Accordingly, verification that the OLD mechanism is properly working may be facilitated.

<FIG> schematically shows another example circuit diagram relating to the above-discussed aspects of <FIG>. Consistent with the example embodiment of <FIG>, the more-specific example embodiment of <FIG> shows a battery <NUM> characterized in this example by a two voltage-stacked battery cells 202a, 202b (noting that more cells may be used in this regard), and showing cell charge provided by the battery <NUM> with a switchable resistive-divider circuit <NUM> arranged for facilitation of monitoring via a control circuit (not shown in <FIG> but such as shown in <FIG> as <NUM>). In this diagram of <FIG>, there is a common cell battery (CB) pin <NUM> shared by the two consecutive cells (or each two consecutive cells in the case of a battery having more than two stacked cells), and due to the common cell battery (CB) pin <NUM>, the balancing current is always equal to Vcell/Rcb regardless of which cells are selected (where Vcell equals voltage provided at each respective cell and Rcb equals resistance <NUM> connecting to the upper terminal of the respective cell in each of the external and internal paths). As with the circuitry depicted in <FIG>, the switchable resistive-divider circuit <NUM> of <FIG> is arranged to output a controlled-load voltage drop relative to the upper voltage terminal and the lower voltage terminal, and is arranged to selectively activate switches 216a, 217a (for cell 202a) and 218b, 219b (for cell 202b) and, in response, measure the controlled-load voltage drops via open-load detection selectively for each respective cell 202a and 202b. As ideal cell balancing ensures a constant balancing current regardless of the combination of cells that are selected, in connection with the implementation of <FIG> which is yet another cell balancing architecture. In a specific type of example corresponding to the system and circuitry of <FIG>, the CB pin <NUM> is present for every pair of consecutively-arranged cells as may be used in the cell-stacked battery. The CB <NUM>, for each such cell, is used as a current return path common to two consecutive cells, which may be advantageous for applications which require assurance of a balancing current regardless of which cells may be selected for OLD measurement in such battery systems.

In the example embodiment of <FIG> it may be appreciated in the contexts of three different cases of operation relative to open-load detection involving the switchable resistive-divider circuit <NUM> as may be controlled by a control circuit (not shown in <FIG>). A first case includes measurement accuracy when the circuit <NUM> is not enabled by the control circuit (not illustrated in <FIG>). For instances in which the circuit <NUM> may be enabled by the control circuit for possible open-load detection, a second case includes an open-load detection diagnosis result when there is no open load condition, and a third case includes open-load detection diagnosis when there is an open load condition.

Applicable to each of these cases: <FIG> shows a battery connector connecting to each such cell is denoted as Rcon; each of various current-providing switches/sources in the circuit <NUM> (for gate control over the switches 216a, 217a, 218b and 219b) depicted as a circle with a horizontal line in the circle. Also, as nonlimiting examples of impedance component values: the resistor <NUM> and those vertically aligned therewith may be <NUM> Ohms; the capacitor <NUM> and those capacitors vertically aligned therewith may be <NUM> nFarads; the resistors relating to elements <NUM> and <NUM> (and those vertically aligned therewith) may be <NUM> Ohms; and the resistors vertically aligned with the switches 217a and 219b may be <NUM> kOhms.

With regards to the first case of measurement accuracy in which OLD is disabled, this may occur when the control circuit has its outputs set to cause switches 216a and 218b to be in an off state (nonconductive between source and drain terminals). In this state, the values of resistors <NUM> and <NUM> are set to be sufficiently small so that they do not cause any error in secondary measurement results. This follows since the value of resistor <NUM> << Zin where Zin is the high input impedance of the measurement circuit that is connected to resistor <NUM> and resistor <NUM>.

In the second case, when OLD may be enabled (e.g., with switch 216a "on") and connections are in place for no open load condition, the measured value on the secondary channel (connecting to resistor <NUM> for the first cell) may be calculated via Equation <NUM> as follows using the depicted circuitry relevant to measuring the charge of the first cell: <MAT>.

In Equation <NUM>, R1_1, R1_2, R22_1 and R22_2 respectively correspond to the resistors shown to be vertically aligned with the switches 217a and 219a. For example, if each of the resistor values R<NUM> and R<NUM> equals <NUM> kOhms, then Vsec_meas = Vcell × <NUM>, which represents a <NUM>% reduction in value of the secondary measurement versus a corresponding primary measurement. Such reduction may be within the resolution of an ADC used in the control circuit for the analog-to-digital conversion of this particular measurement along the (first cell) channel, in the absence of open load. Therefore, this approach is advantageous in that it may inform a user/technician that the OLD mechanism is properly working and that there is no open load condition detected.

The OLD mechanism may also impact the primary measurement. The OLD current may be equal to: <MAT>.

In the case of the example embodiment of <FIG>, <MAT>.

Such a current may develop a drop across the battery connectors (1Ohm each) equal to: <MAT>.

Such a voltage is small enough that it may provide integrity of the primary measurement results even if OLD was enabled during accurate primary measurement acquisition. It may be appreciated that this description holds for measurements for both cells of <FIG> (in connection with use of both switches 216a and 216b.

In the third case involving an open-load detection diagnosis when there is an open load condition, the CB pins are no longer connected to their corresponding battery element, and consequently the secondary measurement value is 0V. This description also holds for each of the depicted secondary measurements in <FIG>.

<FIG> is a schematic circuit diagram depicting an example embodiment including cell balancing architecture when a common pin (shared by immediately-adjacent stacked cells as in <FIG>) is not available. Such an approach does not ensure a constant cell balancing current when several consecutive cells are selected. Nevertheless, the circuit <NUM> may detect open load conditions, diagnose the OLD system itself, and not interfere with the redundant or secondary measurement accuracy.

Accordingly, the primary difference between the example embodiments depicted in <FIG> and <FIG> is that in <FIG>, there is no additional common pin and, therefore, no current return path that is common to two consecutive cells. In other regards, the same types of circuits, elements and values may be used as in <FIG>. Further, the same description is applicable for each of the three different cases as described in connection with <FIG>.

Also, in each of the above-described embodiments, a similar method may be used for measuring cell charge, e.g., in connection with cell balancing. In such a method, a controller (e.g., as part of a BMS) may use such a switchable resistive-divider circuit to output a signal reflecting a controlled-load voltage drop at each cell. The method may include selectively activating each of the switchable resistive-divider circuits in series and in each instance, measuring the controlled-load voltage drop in response to the respective switchable resistive-divider circuits being selectively activated.

In another approach, one or more of the above embodiments may offer additional cell-measurement redundancy by using a BMS IC connected to battery cell elements or terminals through measurement pins normally provided in connection with the battery.

In one or more embodiments, a multi-cell battery apparatus is provided, according to certain aspects, including a battery with a plurality of voltage-stacked battery cell circuits (102a, 102b), a switchable resistive-divider circuit (<NUM>) and a control circuit (<NUM>). The control circuit selectively activates the switchable resistive-divider circuits and, in response to the respective switchable resistive-divider circuits (<NUM>) being selectively activated, the control circuit measures the controlled-load voltage drops. These aspects are used to allow open load detection without interfering with the cell balancing mechanism and the accuracy of the redundant measurements performed on these pins in a battery management system.

Claim 1:
A multi-cell battery apparatus (<NUM>) comprising:
- a plurality of voltage-stacked battery cell circuits (<NUM>), each including
- a battery cell (102a or 102b, 202a, 202b) having an upper voltage terminal and a lower voltage terminal, and
- a switchable resistive-divider circuit (<NUM>), having
an input node disposed between the upper voltage terminal and the lower voltage terminal, configured to output a controlled-load voltage drop relative to the upper voltage terminal and the lower voltage terminal; and
- a control circuit (<NUM>) configured to selectively activate the switchable resistive-divider circuit (<NUM>) and, in response to the respective switchable resistive-divider circuit being selectively activated, configured to measure the controlled-load voltage drop,
characterized in that the switchable resistive-divider circuit (<NUM>) includes a pair of resistive-dividers interconnected via a selectively activated switch and are cooperatively arranged to provide the controlled-load voltage drop relative to the upper voltage terminal and the lower voltage terminal upon activation of the switchable resistive-divider circuit (<NUM>).