Patent Description:
Display devices have been used for various purposes. Also, since the thickness and weight of the display devices have been reduced, the utilization range of the display devices has increased.

In a display device, various functions added to or linked to a display device are being added while increasing a display area. As a method of adding various functions while increasing an area, research into a display device having an area for providing other various functions than an image display in a display area has been continuously conducted.

<CIT> discloses a display panel that includes a base substrate including a front surface and a rear surface and having first and second holes, and a pixel layer on the base substrate.

According to an aspect of one or more embodiments, a display device includes a transmission area, in which components are located, inside a display area. One or more embodiments include a structure of improving the performance of preventing moisture permeation in a display device having a transmission area. However, the above aspects are provided as examples, and the scope of the present disclosure is not limited thereto.

Additional aspects will be set forth, in part, in the description which follows and, in part, will be apparent from the description, or may be learned by practice of the presented embodiments of the disclosure.

According to one or more embodiments, a display device includes: a substrate; a display layer on the substrate, the display layer including a plurality of pixels; a thin film encapsulation layer on the display layer, the thin film encapsulation layer including at least one inorganic encapsulation layer and at least one organic encapsulation layer; a first through hole between two neighboring pixels from among the plurality of pixels, the first through hole penetrating through the substrate, the display layer, and the thin film encapsulation layer; and a first groove around the first through hole, the first groove being defined in a first layer and a second layer on the first layer, wherein the first groove includes a first hole or a recess in the first layer and a second hole in the second layer, the second layer includes a tip extending towards a center of the second hole further than an internal surface of the first layer, the internal surface defining the first hole or the recess, and at least one organic material layer in the display layer is disconnected at the first groove, wherein the display device further comprises a second groove around the first through hole, and a barrier wall between the first groove and the second groove.

Each of the plurality of pixels may include a light-emitting diode including a pixel electrode, an opposite electrode, and an emission layer between the pixel electrode and the opposite electrode, and the at least one organic material layer may be between the pixel electrode and the opposite electrode.

The at least one organic material layer may include one or more selected from a hole transport layer, a hole injection layer, an electron injection layer, and an electron transport layer.

The display layer may include at least one inorganic insulating layer between the substrate and the pixel electrode, and the first layer may be on the at least one inorganic insulating layer.

The first layer may include an organic insulating material.

The second layer may be in direct contact with an upper surface of the at least one inorganic insulating layer beyond the first layer.

The second layer may include a metal or an inorganic insulating material.

The display device may further include an inorganic passivation layer on the second layer.

The inorganic passivation layer may continuously cover a side surface and a bottom surface of the second layer and an internal surface of the first layer.

A portion of the substrate may be bent about a bending axis extending along a bending area, and the at least one inorganic insulating layer may include an opening in the bending area.

The display device may further include an organic insulating layer in the opening of the at least one inorganic insulating layer, and the first layer may include a same material as a material included in the organic insulating layer.

The barrier wall may include a plurality of barrier wall layers that are stacked, and a gap layer may be between two neighboring barrier wall layers among the plurality of barrier wall layers, the gap layer including a metal.

The gap layer may include a first layer and a second layer under the first layer, the first layer having an edge protruding outward more than an edge of the second layer, and the at least one organic material layer may be disconnected at an eave structure formed by the edge of the first layer and the edge of the second layer.

Other aspects, features, and advantages of the present disclosure will become better understood through the accompanying drawings, the claims, and the detailed description.

Reference will now be made in further detail to embodiments, some examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to like elements throughout. Accordingly, some example embodiments are merely described below, by referring to the figures, to explain aspects of the present description. Throughout the disclosure, the expression "at least one of a, b, or c" indicates only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.

Some example embodiments will be described below in further detail with reference to the accompanying drawings. Those components that are the same or are in correspondence are provided the same reference numeral regardless of the figure, and redundant explanations may be omitted.

While such terms as "first," "second," etc., may be used to describe various components, such components are not to be limited by the above terms. The above terms are used to distinguish one component from another.

In the present specification, it is to be understood that the terms "including," "having," and "comprising" are intended to indicate the existence of the features, numbers, steps, actions, components, parts, or combinations thereof disclosed in the specification, but are not intended to preclude the possibility that one or more other features, numbers, steps, actions, components, parts, or combinations thereof may exist or may be added.

It is to be understood that when a layer, region, or component is referred to as being "formed on" another layer, region, or component, it may be directly or indirectly formed on the other layer, region, or component. That is, for example, one or more intervening layers, regions, or components may be present.

Sizes of components in the drawings may be exaggerated for convenience of explanation. In other words, since sizes and thicknesses of components in the drawings may be arbitrarily illustrated for convenience of explanation, the embodiments are not limited thereto.

In the embodiments below, when layers, areas, elements, or the like are referred to as being "connected," it is to be understood that they may be directly connected or one or more intervening portions may be present between layers, areas, elements, or the like. For example, when layers, areas, elements, or the like are referred to as being "electrically connected," they may be directly electrically connected, or layers, areas, elements, or the like may be indirectly electrically connected and one or more intervening portions may be present.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which example embodiments of the inventive concept belong. It is to be further understood that terms, such as those defined in commonly-used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

<FIG> is a perspective view of a display device <NUM> according to an embodiment.

Referring to <FIG>, the display device <NUM> may include a display area DA and a peripheral area PA around (e.g., surrounding) the display area DA. A transmission area TA and a middle area MA around (e.g., surrounding) the transmission area TA may be inside the display area DA.

A plurality of pixels, e.g., an array of pixels, may be in the display area DA. The display area DA may display an image via the array of pixels. The display area DA corresponds to an active area displaying images. In an embodiment, the display area DA may entirely surround the transmission area TA.

A component that may provide any of various functions to the display device <NUM> may be in the transmission area TA. For example, when the component includes a sensor, a camera, etc. that uses light, the light emitted from or proceeding to the sensor or the light proceeding towards the camera may pass through the transmission area TA.

The middle area MA is between the transmission area TA and the display area DA and may be around (e.g., surround) the transmission area TA. The middle area MA may be a kind of non-display area in which pixels are not located. Lines configured to provide a signal or a voltage (e.g., a predetermined signal or a voltage) to pixels adjacent to the transmission area TA may be in the middle area MA. A groove that will be described later may be in the middle area MA.

The peripheral area PA may be a kind of non-display area in which pixels are not located, like the middle area MA. Various kinds of lines, circuits, etc. may be in the peripheral area PA.

In an embodiment, each of the pixels in the display device <NUM> may include a light-emitting diode as a display element emitting light of a certain color (e.g., a predetermined color). In an embodiment, the light-emitting diode may include an organic light-emitting diode including an organic material as an emission layer. In another embodiment, the light-emitting diode may include an inorganic light-emitting diode. In another embodiment, the light-emitting diode may include quantum dots as an emission layer. Herein, a case in which the light-emitting diode includes an organic light-emitting diode will be described for convenience of description.

<FIG> shows that the transmission area TA is at a center of the display area DA in a width direction (e.g., a ±x direction) of the display device <NUM>, but embodiments are not limited thereto. In another embodiment, the transmission area TA may be biased to the left or right side in the width direction of the display device <NUM>. In another embodiment, the transmission area TA may be at any of various locations, e.g., an upper side, an intermediate side, or a lower side in a lengthwise direction (e.g., a ±y direction) of the display device <NUM>.

<FIG> shows that the display device <NUM> may include one transmission area TA, but, in another embodiment, the display device <NUM> may include a plurality of transmission areas TA.

<FIG> is a cross-sectional view of the display device <NUM>, taken along the line II-II' of <FIG>; and <FIG> is a cross-sectional view of an electronic device <NUM> including the display device <NUM> according to an embodiment.

Referring to <FIG>, in an embodiment, the display device <NUM> may include a display panel <NUM>, and an input sensing section <NUM> and an optical functional section <NUM> that are on an upper surface of the display panel <NUM>. In an embodiment, a window <NUM> may be bonded to an element thereunder, e.g., the optical functional section <NUM>, via an optical clear adhesive OCA, for example.

The display panel <NUM> may include a plurality of light-emitting diodes in the display area DA. The display panel <NUM> may include lines for providing a signal or a voltage to each of the plurality of light-emitting diodes (e.g., a data line, a scan line, a driving voltage line, a common voltage line, etc.) and transistors electrically connected respectively to the plurality of light-emitting diodes.

The input sensing section <NUM> may obtain coordinate information according to an external input, e.g., a touch event. The input sensing section <NUM> may include touch electrodes and trace lines connected to the touch electrodes. The input sensing section <NUM> may be on the display panel <NUM>. The input sensing section <NUM> may sense an external input by a mutual capacitance method or a self-capacitance method.

In an embodiment, the input sensing section <NUM> may be directly on the display panel <NUM>. In another embodiment, the input sensing section <NUM> may be separately manufactured and coupled to the display panel <NUM> via an adhesive layer, such as an OCA. In an embodiment, as shown in <FIG>, the input sensing section <NUM> may be directly on the display panel <NUM>, and, in this case, the adhesive layer may not be between the input sensing section <NUM> and the display panel <NUM>.

In an embodiment, the optical functional section <NUM> may include an anti-reflection layer. The anti-reflection layer may reduce a reflectivity of light incident to the display panel <NUM> from outside (external light) via the window <NUM>. In an embodiment, the anti-reflection layer may include a retarder and a polarizer. The retarder may be of a film type or a liquid crystal coating type and may include a λ/<NUM> retarder and/or a λ/<NUM> retarder. The polarizer may be of a film type or a liquid crystal coating type. The film-type polarizer may include a stretched synthetic resin film, and the liquid crystal coating-type polarizer may include liquid crystals arranged in a certain orientation. The retarder and the polarizer may further include a protective film.

In another embodiment, the anti-reflection layer may include a structure including a black matrix and color filters. The color filters may be arranged taking into account a color of light emitted from each of the pixels in the display panel <NUM>. In another embodiment, the anti-reflection layer may include a destructive interference structure. The destructive interference structure may include a first reflective layer and a second reflective layer arranged on different layers. First reflected light and second reflected light that are respectively reflected by the first reflective layer and the second reflective layer may destructively interfere with each other, and, accordingly, a reflectivity of external light may be reduced.

In an embodiment, the optical functional section <NUM> may include a lens layer. The lens layer may improve the light-emitting efficiency of light emitted from the display panel <NUM> or may reduce a color difference. The lens layer may include a layer having a concave or a convex lens shape and/or may include a plurality of layers having different refractive indices. The optical functional section <NUM> may include both the anti-reflection layer and the lens layer or may include either the anti-reflection layer or the lens layer.

Referring to <FIG>, the display device <NUM> may be included in an electronic device <NUM> of various types, e.g., a mobile phone, a tablet PC, a laptop computer, a smart watch, etc. The electronic device <NUM> includes a housing HS having an internal space, and the display panel <NUM> may be in the housing HS. The window <NUM> may be coupled to the housing HS. The input sensing section <NUM> and the optical functional section <NUM> are on the upper surface of the display panel <NUM> as described above.

A component CP is in the housing HS and may be located between the display panel <NUM> and an internal bottom surface of the housing HS. The component CP may be in the transmission area TA. The transmission area TA may be referred to as a component area in which the component CP is located.

The component CP may include an electronic element. For example, the component CP may be an electronic element using light. For example, the electronic element may include a light-receiving sensor, such as an infrared-ray sensor, a camera capturing an image by receiving light, a sensor for outputting and sensing light to measure a distance or recognize a fingerprint, a small-sized lamp illuminating light, etc..

The electronic element using light may use light of various wavelength bands, such as visible light, infrared rays, ultraviolet rays, etc. In an embodiment, when the component CP includes a camera, a transmittance of the display device <NUM> in the transmission area TA may be about <NUM>% or greater. In another embodiment, when the component CP includes a sensor, the transmittance of the display device <NUM> in the transmission area TA may be less than <NUM>%, e.g., about <NUM>% or greater, or <NUM>% or greater.

In an embodiment, to prevent or substantially prevent the transmittance from degrading due to the elements on a proceeding path of light emitted from the component CP or proceeding towards the component CP, the display device <NUM> may include an opening OP (see <FIG>). The opening OP may be manufactured by partially removing at least one of the elements included in the display device <NUM>, e.g., the display panel <NUM>, the input sensing section <NUM>, the optical functional section <NUM>, and the window <NUM>. In an embodiment, <FIG> shows that the display panel <NUM>, the input sensing section <NUM>, and the optical functional section <NUM> respectively include first to third through holes <NUM>, <NUM>, and <NUM> that define the opening OP.

Referring to <FIG>, the display panel <NUM> includes the first through hole <NUM> passing from an upper surface to a bottom surface of the display panel <NUM>, the input sensing section <NUM> includes the second through hole <NUM> passing from an upper surface to a bottom surface of the input sensing section <NUM>, and the optical functional section <NUM> includes the third through hole <NUM> passing from an upper surface to a bottom surface of the optical functional section <NUM>. The first to third through holes <NUM>, <NUM>, and <NUM> are in the transmission area TA and may overlap one another.

<FIG> is a plan view of the display panel <NUM> according to an embodiment; and <FIG> is a perspective view of a substrate <NUM> in the display panel <NUM> according to an embodiment.

Referring to <FIG>, the display panel <NUM> includes pixels P on the substrate <NUM>. The pixels P are in the display area DA to provide images. Each of the pixels P may include a display element, e.g., a light-emitting diode that may emit light of a certain color.

The first through hole <NUM> may be in the display area DA. Since the first through hole <NUM> is in the display area DA, the pixels P may be at opposite sides of the first through hole <NUM>. The first through hole <NUM> is between two neighboring pixels P.

The middle area MA may have a certain area around (e.g., surrounding) the first through hole <NUM>. Lines (e.g., a data line, a scan line, a driving voltage line, etc.) configured to apply signals or voltages to the pixels P around the first through hole <NUM> may be partially in the middle area MA. The middle area MA may include a groove that is a structure for preventing or substantially preventing moisture infiltration, as described later.

The peripheral area PA may be around (e.g., surround) the display area DA. A scan driver, a data driver, etc. may be in the peripheral area PA. A pad PAD may be in the peripheral area PA. The pad PAD may be adjacent to an edge of the substrate <NUM>. In an embodiment, the pad PAD is not covered by an insulating layer, but is exposed and electrically connected to a flexible printed circuit board FPCB. The flexible printed circuit board FPCB electrically connects a controller to the pad PAD and may supply to the pad PAD a signal or electric power transferred from the controller. In some embodiments, a data driver may be in the flexible printed circuit board FPCB. In order to transfer a signal or a voltage in the flexible printed circuit board FPCB to the pixels P, the pad PAD may be connected to a plurality of lines <NUM>.

In an embodiment, the peripheral area PA may include a bending area BA. The bending area BA may be between the pad PAD and the display area DA. The bending area BA may extend in a direction intersecting with a direction in which the lines <NUM> extend. The bending area BA may extend in a direction in parallel with an edge of the substrate <NUM>. The substrate <NUM> may include or be partitioned into a first area 1A including the display area DA and a second area 2A opposite to the first area 1A, based on the bending area BA. The bending area BA is between the first area 1A and the second area 2A. The first area 1A includes some portions of the display area DA and the peripheral area PA, and the second area 2A may only include a portion of the peripheral area PA.

The display panel <NUM> may be bent about the bending area BA. In this regard, <FIG> shows that the substrate <NUM> of the display panel <NUM> is bent. The substrate <NUM> is bent about a bending axis BAX that extends in a y-direction, and, thus, the display panel <NUM> may also be bent like the substrate <NUM>. The substrate <NUM> may include any of various materials (e.g., a polymer resin) that are flexible or bendable. <FIG> illustrates that the substrate <NUM> is bent, but layers on the substrate <NUM> included in the display panel <NUM> may also be bent with the substrate <NUM>.

As shown in <FIG>, each of the lines <NUM> may include a first portion <NUM> and a second portion <NUM> at opposite sides of the bending area BA, and a third portion <NUM> connecting the first portion <NUM> and the second portion <NUM>. The first portion <NUM> is between the display area DA and the bending area BA, the second portion <NUM> may be between the bending area BA and the pad PAD, and the third portion <NUM> may be in the bending area BA.

When the substrate <NUM> is bent about the bending axis BAX, the lines <NUM> may be disconnected or layers on and/or under the lines <NUM> may be exfoliated. To prevent or substantially prevent this, as described above, the line <NUM> includes the first portion <NUM> and the second portion <NUM> that are apart from each other with the bending area BA therebetween, and the first portion <NUM> and the second portion <NUM> may be connected to each other via the third portion <NUM> including a material having relatively high flexibility.

<FIG> is an equivalent circuit diagram of a pixel P in a display panel according to an embodiment.

Referring to <FIG>, the light-emitting diode, e.g., an organic light-emitting diode OLED, may be connected to a pixel circuit PC. The pixel circuit PC may include a first thin film transistor T1, a second thin film transistor T2, and a storage capacitor Cst. Each of the pixels P may emit light, e.g., red light, green light, blue light, or white light, from the organic light-emitting diode OLED.

The second thin film transistor T2 is a switching thin film transistor and is connected to a scan line SL and a data line DL, and may be configured to transfer a data voltage input from the data line DL to the first thin film transistor T1 based on a switching voltage input from the scan line SL. The storage capacitor Cst is connected to the second thin film transistor T2 and a driving voltage line PL and may store a voltage corresponding to a difference between a voltage transferred from the second thin film transistor T2 and a first power voltage ELVDD supplied to the driving voltage line PL.

The first thin film transistor T1 is a driving thin film transistor connected to the driving voltage line PL and the storage capacitor Cst and may control a driving current flowing in the organic light-emitting diode OLED from the driving voltage line PL, corresponding to the voltage value stored in the storage capacitor Cst. The organic light-emitting diode OLED may emit light having a certain luminance according to the driving current. An opposite electrode (e.g., a cathode) of the organic light-emitting diode OLED may receive supply of a second power voltage ELVSS.

<FIG> illustrates that the pixel circuit PC includes two thin film transistors and one storage capacitor, but embodiments are not limited thereto. The number of thin film transistors and the number of storage capacitors may vary depending on a design of the pixel circuit PC. For example, the pixel circuit PC may include four or more thin film transistors, in addition to the two thin film transistors described above.

<FIG> is a plan view partially showing the display panel <NUM> according to an embodiment.

Referring to <FIG>, the pixels P are in the display area DA, and the first through hole <NUM> is defined between adjacent pixels P. For example, in a plan view, the pixels P are above and under the first through hole <NUM> and at left and right sides of the first through hole <NUM>.

Grooves G may be in the middle area MA to prevent or substantially prevent infiltration of moisture through the first through hole <NUM> and damage to the light-emitting diode in the pixel P. In an embodiment, a plurality of grooves G may be provided as concentric circles. The plurality of grooves G may be apart from one another. <FIG> shows two grooves G, but three or more grooves G may be provided.

<FIG> is a cross-sectional view of a display device according to an embodiment; and <FIG> and <FIG> are cross-sectional views each showing a groove structure according to an embodiment. In <FIG>, the display panel <NUM> and an input sensing section <NUM> in the display device are shown, and the optical functional section is omitted for convenience of description.

Referring to <FIG>, the display panel <NUM> including the substrate <NUM>, a display layer <NUM> including arrays of a plurality of pixels, and a thin film encapsulation layer <NUM> includes the first through hole <NUM> corresponding to the transmission area TA, and the input sensing section <NUM> on the display panel <NUM> includes the second through hole <NUM> corresponding to the transmission area TA. The first through hole <NUM> penetrates through the substrate <NUM>, the display layer <NUM>, and the thin film encapsulation layer <NUM>. The first through hole <NUM> and the second through hole <NUM> overlap each other and configure the opening OP described above with reference to <FIG>.

Referring to the display area DA in <FIG>, the substrate <NUM> may include a polymer resin. In an embodiment, the substrate <NUM> may include a base layer including a polymer resin and an inorganic insulating layer on the base layer. For example, the substrate <NUM> may include two base layers and the inorganic insulating layer on each base layer. The polymer resin may include any of polyethersulfone, polyarylate, polyether imide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyimide, polycarbonate, cellulose tri-acetate, and/or cellulose acetate propionate, etc..

A buffer layer <NUM> may be on the substrate <NUM> to prevent or substantially prevent impurities from infiltrating into a semiconductor layer Act of a thin film transistor TFT. The buffer layer <NUM> may include an inorganic insulating material, such as silicon nitride, silicon oxynitride, and/or silicon oxide. The buffer layer <NUM> may have a single-layered or multi-layered structure including the inorganic insulating material described above.

The pixel circuit PC may be on the buffer layer <NUM>. The pixel circuit PC includes the thin film transistor TFT and the storage capacitor Cst. The thin film transistor TFT may include the semiconductor layer Act, a gate electrode GE, a source electrode SE, and a drain electrode DE.

The data line DL of the pixel circuit PC is electrically connected to a switching thin film transistor in the pixel circuit PC, although not shown in <FIG>. In an embodiment, a top gate-type transistor in which the gate electrode GE is over the semiconductor layer Act with a gate insulating layer <NUM> therebetween is shown, but, in another embodiment, the thin film transistor TFT may be a bottom gate-type transistor.

In an embodiment, the semiconductor layer Act may include polysilicon. In another embodiment, the semiconductor layer Act may include any of amorphous silicon, an oxide semiconductor, and/or an organic semiconductor, etc. The gate electrode GE may include a low-resistive metal material. The gate electrode GE may include a conductive material including any of molybdenum (Mo), aluminium (Al), copper (Cu), and/or titanium (Ti), etc., and may have a single-layered or multi-layered structure including the material described above.

The gate insulating layer <NUM> between the semiconductor layer Act and the gate electrode GE may include an inorganic insulating material, such as silicon oxide, silicon nitride, silicon oxynitride, aluminium oxide, titanium oxide, tantalum oxide, hafnium oxide, etc. The gate insulating layer <NUM> may have a single-layered or multi-layered structure including the materials described above.

In an embodiment, the source electrode SE and the drain electrode DE may be at/on a same layer as the data line DL and may include a same material as that of the data line DL. The source electrode SE, the drain electrode DE, and the data line DL may include a highly conductive material. The source electrode SE and the drain electrode DE may include a conductive material including molybdenum (Mo), aluminium (Al), copper (Cu), and/or titanium (Ti), etc., and may have a single-layered or multi-layered structure including the above materials. In an embodiment, the source electrode SE, the drain electrode DE, and the data line DL may have a multi-layered structure including a titanium layer, an aluminium layer, and a titanium layer (Ti/Al/Ti).

The storage capacitor Cst may include a lower electrode CE1 and an upper electrode CE2 overlapping each other with a first interlayer insulating layer <NUM> therebetween. The storage capacitor Cst may overlap the thin film transistor TFT. Regarding this, <FIG> shows a structure in which the gate electrode GE of the thin film transistor TFT is the lower electrode CE1 of the storage capacitor Cst. In another embodiment, the storage capacitor Cst may not overlap the thin film transistor TFT. The storage capacitor Cst may be covered by a second interlayer insulating layer <NUM>. The upper electrode CE2 of the storage capacitor Cst may include a conductive material, such as molybdenum (Mo), aluminium (Al), copper (Cu), titanium (Ti), etc., and may have a single-layered or multi-layered structure including the materials described above.

The first interlayer insulating layer <NUM> and/or the second interlayer insulating layer <NUM> may each include an inorganic insulating material, such as silicon oxide, silicon nitride, silicon oxynitride, aluminium oxide, titanium oxide, tantalum oxide, hafnium oxide, etc. The first interlayer insulating layer <NUM> and the second interlayer insulating layer <NUM> may each have a single-layered structure or a multi-layered structure including the above-mentioned materials.

The pixel circuit PC including the thin film transistor TFT and the storage capacitor Cst may be covered by a first organic insulating layer <NUM>. The first organic insulating layer <NUM> may have a flat upper surface.

The pixel circuit PC may be electrically connected to a pixel electrode <NUM>. For example, as shown in <FIG>, a contact metal layer CM may be arranged between the thin film transistor TFT and the pixel electrode <NUM>. The contact metal layer CM may be connected to the thin film transistor TFT via a contact hole in the first organic insulating layer <NUM>, and the pixel electrode <NUM> may be connected to the contact metal layer CM via a contact hole in a second organic insulating layer <NUM> that is on the contact metal layer CM. The contact metal layer CM may include a conductive material including any of molybdenum (Mo), aluminium (Al), copper (Cu), titanium (Ti), etc., and may have a single-layered or multi-layered structure. In an embodiment, the contact metal layer CM may have a multi-layered structure including Ti/Al/Ti.

The first organic insulating layer <NUM> and/or the second organic insulating layer <NUM> may include an organic insulating material, such as any of a general polymer (e.g., polymethylmethacrylate (PMMA) or polystyrene (PS)), polymer derivatives having phenol groups, acryl-based polymer, imide-based polymer, aryl ether-based polymer, amide-based polymer, fluoride-based polymer, p-xylene-based polymer, vinyl alcohol-based polymer, and blends thereof. In an embodiment, the first organic insulating layer <NUM> and/or the second organic insulating layer <NUM> may include polyimide.

The pixel electrode <NUM> may be on the second organic insulating layer <NUM>. The pixel electrode <NUM> may include a conductive oxide, such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In<NUM>O<NUM>), indium gallium oxide (IGO), or aluminium zinc oxide (AZO). In another embodiment, the pixel electrode <NUM> may include a reflective layer including silver (Ag), magnesium (Mg), aluminium (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or a compound thereof. In another embodiment, the pixel electrode <NUM> may further include a transparent conductive oxide material layer including ITO, IZO, ZnO, or In<NUM>O<NUM> on and/or under the reflective layer.

A pixel defining layer <NUM> may be on the pixel electrode <NUM>. In an embodiment, the pixel defining layer <NUM> includes an opening exposing an upper surface of the pixel electrode <NUM> but covers edges of the pixel electrode <NUM>. In an embodiment, the pixel defining layer <NUM> may include an organic insulating material. In another embodiment, the pixel defining layer <NUM> may include an inorganic insulating material, such as silicon nitride, silicon oxynitride, or silicon oxide. In another embodiment, the pixel defining layer <NUM> may include an organic insulating material and an inorganic insulating material.

An intermediate layer <NUM> includes an emission layer 222b. The intermediate layer <NUM> may include a first functional layer 222a under the emission layer 222b and/or a second functional layer 222c on the emission layer 222b. The emission layer 222b may include a polymer or low-molecular weight organic material emitting light of a certain color (e.g., a predetermined color).

The first functional layer 222a may have a single-layered or multi-layered structure. For example, when the first functional layer 222a includes a polymer organic material, the first functional layer 222a may include a hole transport layer (HTL) having a single-layered structure and may include poly-(<NUM>,<NUM>)-ethylene-dioxy thiophene (PEDOT) or polyaniline (PANI). When the first functional layer 222a includes a low-molecular weight organic material, the first functional layer 222a may include a hole injection layer (HIL) and an HTL.

The second functional layer 222c is optional. In an embodiment, for example, when the first functional layer 222a and the emission layer 222b include a polymer organic material, the second functional layer 222c may be formed. The second functional layer 222c may have a single-layered or multi-layered structure. In an embodiment, the second functional layer 222c may include an electron transport layer (ETL) and/or an electron injection layer (EIL).

The emission layer 222b of the intermediate layer <NUM> may be in every pixel of the display area DA. The emission layer 222b may be patterned to correspond to the pixel electrode <NUM>. In an embodiment, unlike the emission layer 222b, the first functional layer 222a and/or the second functional layer 222c in the intermediate layer <NUM> may be integrally provided on the substrate <NUM> to be in the middle area MA as well as the display area DA.

The opposite electrode <NUM> may include a conductive material having a low work function. In an embodiment, for example, the opposite electrode <NUM> may include a (semi-transparent layer including silver (Ag), magnesium (Mg), aluminium (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or an alloy thereof. In another embodiment, the opposite electrode <NUM> may further include a layer including ITO, IZO, ZnO, or In<NUM>O<NUM> on the (semi-transparent layer including the above material. In an embodiment, the opposite electrode <NUM> may be integrally provided in the middle area MA, as well as the display area DA. In an embodiment, the first functional layer 222a, the second functional layer 222c, and the opposite electrode <NUM> may be manufactured by a thermal evaporation method.

In an embodiment, a capping layer <NUM> may be located on the opposite electrode <NUM>. For example, the capping layer <NUM> may include a LiF layer and may be formed by a thermal evaporation method. In some embodiments, the capping layer <NUM> may be omitted.

In an embodiment, a spacer <NUM> may be formed on the pixel defining layer <NUM> and may include an organic insulating material, such as polyimide. In another embodiment, the spacer <NUM> may include an inorganic insulating material, or an organic insulating material and an inorganic insulating material.

The spacer <NUM> may include a material that is different from or the same as that of the pixel defining layer <NUM>. In an embodiment, the pixel defining layer <NUM> and the spacer <NUM> may include polyimide. In an embodiment, the pixel defining layer <NUM> and the spacer <NUM> may be manufactured together through a mask process using a half-tone mask.

The organic light-emitting diode OLED may be covered by a thin film encapsulation layer <NUM>. The thin film encapsulation layer <NUM> includes at least one organic encapsulation layer and at least one inorganic encapsulation layer, and <FIG> shows that the thin film encapsulation layer <NUM> includes first and second inorganic encapsulation layers <NUM> and <NUM> and an organic encapsulation layer <NUM> between the first and second inorganic encapsulation layers <NUM> and <NUM>. In another embodiment, a stacking order and the number of organic and inorganic encapsulation layers may vary.

In an embodiment, the first and second inorganic encapsulation layers <NUM> and <NUM> may include one or more inorganic materials from aluminium oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and silicon oxynitride. The first inorganic encapsulation layer <NUM> and the second inorganic encapsulation layer <NUM> may each have a single-layered structure or a multi-layered structure including the above-mentioned materials. In an embodiment, the organic encapsulation layer <NUM> may include a polymer-based material and may include an acryl-based resin, such as polymethacrylate and polyacrylic acid, an epoxy-based resin, polyimide, polyethylene, etc. In an embodiment, the organic encapsulation layer <NUM> may include an acrylate polymer.

Materials included in the first inorganic encapsulation layer <NUM> and the second inorganic encapsulation layer <NUM> may be different from each other. For example, the first inorganic encapsulation layer <NUM> may include silicon oxynitride and the second inorganic encapsulation layer <NUM> may include silicon nitride. The first inorganic encapsulation layer <NUM> and the second inorganic encapsulation layer <NUM> may have different thicknesses. In an embodiment, the thickness of the first inorganic encapsulation layer <NUM> may be greater than that of the second inorganic encapsulation layer <NUM>. In another embodiment, the thickness of the second inorganic encapsulation layer <NUM> may be greater than that of the first inorganic encapsulation layer <NUM>, or the first inorganic encapsulation layer <NUM> and the second inorganic encapsulation layer <NUM> may have a same thickness.

Referring to the middle area MA of <FIG>, grooves G may be in the middle area MA. The organic material layer included in the intermediate layer <NUM>, e.g., the first functional layer 222a and/or the second functional layer 222c, is disconnected (or isolated) by the groove G.

In an embodiment, the groove G is defined in a first layer <NUM> and a second layer <NUM> that may include different materials from each other. In an embodiment, the first layer <NUM> may include an organic insulating material, and the second layer <NUM> may include an inorganic insulating material or a metal. In an embodiment, the second layer <NUM> may include a metal.

Referring to <FIG> and <FIG>, the first layer <NUM> may be on the second interlayer insulating layer <NUM> that is an inorganic insulating layer, and the second layer <NUM> may be on an upper surface of the first layer <NUM>. A thickness T of the first layer <NUM> may be greater than a thickness t of the second layer <NUM>.

The first layer <NUM> may include an organic insulating material, such as any of a general polymer, polymer derivatives having phenol groups, acryl-based polymer, imide-based polymer, aryl ether-based polymer, amide-based polymer, fluoride-based polymer, p-xylene-based polymer, vinyl alcohol-based polymer, and blends thereof. In some embodiments, the first layer <NUM> may be formed before forming the first organic insulating layer <NUM>, for example, in a process of forming an organic material layer that will be described later with reference to <FIG>.

The second layer <NUM> may be in direct contact with the upper surface of the first layer <NUM> and may include a metal. In an embodiment, the second layer <NUM> may include molybdenum (Mo), aluminium (Al), copper (Cu), titanium (Ti), etc., and may have a single-layered or multi-layered structure including the materials described above. In some embodiments, the second layer <NUM> may include a material that is the same as that included in the data line DL, or the source electrode SE or the drain electrode DE of the thin film transistor TFT.

The groove G may have an undercut structure or an eave structure. The groove G includes a second hole <NUM> in the second layer <NUM> and may include a first hole <NUM> in the first layer <NUM>. In an embodiment, the groove G may be manufactured through an etching (e.g., an isotropic etching) process. According to an etched degree, the groove G including the second hole <NUM> in the second layer <NUM> and the first hole <NUM> in the first layer <NUM> is formed as shown in <FIG>, or the groove G including the second hole <NUM> in the second layer <NUM> and a recess 240r in the first layer <NUM> may be formed as shown in <FIG>. When the first layer <NUM> includes the recess 240r, a depth d of the recess 240r may be less than the thickness T of the first layer <NUM>. In some embodiments, the depth d of the recess 240r may be about <NUM> or greater.

In an embodiment, a bottom surface of the groove G may be flush with a bottom surface of the first layer <NUM> or an upper surface of the second interlayer insulating layer <NUM>, as shown in <FIG>. In another embodiment, the bottom surface of the groove G may be between the upper surface and the bottom surface of the first layer <NUM>, as shown in <FIG>, or between the upper surface of the first layer <NUM> and the upper surface of the second interlayer insulating layer <NUM>.

An end portion of the second layer <NUM>, which defines the second hole <NUM>, further extends towards the center of the second hole <NUM> as compared with an internal surface of the first layer <NUM>, which defines the first hole <NUM> or the recess 240r. The second layer <NUM> includes a tip <NUM>, or may include a pair of tips <NUM> when viewed in a cross-section, that defines the second hole <NUM> and extend towards the center of the second hole <NUM> further than the internal surface of the first layer <NUM>.

Each of the tips <NUM> may have a first width W1, and, in an embodiment, the first width W1 may be about <NUM> or greater. The first width W1 of the tip <NUM> may correspond to a distance from an edge of the upper surface of the first layer <NUM> that is right under the tip <NUM> to an edge of the tip <NUM> in a horizontal direction.

The groove G having the above structure may be manufactured before forming the intermediate layer <NUM>. From among layers on the substrate <NUM>, a layer including an organic material may be a path through which moisture proceeds. For example, as shown in <FIG>, when the display panel <NUM> includes the first through hole <NUM>, the moisture may proceed in a direction in parallel with the upper surface of the substrate <NUM> (herein, referred to as a lateral direction), but according to an embodiment, the organic material layer, e.g., the first functional layer 222a and/or the second functional layer 222c, is disconnected or isolated due to the eave or undercut structure of the groove G. In an embodiment, the first functional layer 222a and/or the second functional layer 222c may be manufactured by a thermal evaporation method, and the first functional layer 222a and/or the second functional layer 222c may be discontinuously formed due to the structure of the tips <NUM> when depositing the first functional layer 222a and/or the second functional layer 222c.

Similarly, the opposite electrode <NUM> and/or the capping layer <NUM> may be formed by a thermal evaporation method and may have a discontinuous structure due to the structure of the tips <NUM>. In an embodiment, <FIG>, <FIG>, and <FIG> show a structure in which the first functional layer 222a, the second functional layer 222c, the opposite electrode <NUM>, and the capping layer <NUM> are disconnected at the tips <NUM>. In an embodiment, some parts of the first functional layer 222a, the second functional layer 222c, the opposite electrode <NUM>, and the capping layer <NUM> may be on the bottom surface of the groove G.

A barrier wall PW is between the grooves G. In an embodiment, the barrier wall PW may include a plurality of barrier wall layers that are sequentially stacked. In an embodiment, the barrier wall PW may include a first barrier wall layer PW1, a second barrier wall layer PW2, and a third barrier wall layer PW3, as shown in <FIG>. The first barrier wall layer PW1 may include a same material as that of the first organic insulating layer <NUM>, the second barrier wall layer PW2 may include a same material as that of the second organic insulating layer <NUM>, and the third barrier wall layer PW3 may include a same material as that of the pixel defining layer <NUM> and/or the spacer <NUM>.

The barrier wall PW may be apart from the first layer <NUM>. For example, the first barrier wall layer PW1, the second barrier wall layer PW2, and the third barrier wall layer PW3 may be apart from the first layer <NUM>. Between the barrier wall PW and the first layer <NUM>, the second layer <NUM> may be in direct contact with the inorganic insulating layer under the first layer <NUM>, e.g., the second interlayer insulating layer <NUM>, beyond the first layer <NUM>. The second layer <NUM> may be in direct contact with the upper surface of the second interlayer insulating layer <NUM> beyond an outer side surface of the first layer <NUM>.

In a comparative example, when a layer included in the barrier wall PW is in contact with the first layer <NUM>, an organic material path through which the moisture proceeds may be formed. However, according to embodiments, the layers included in the barrier wall PW and the first layer <NUM> are apart from each other, and/or the second interlayer insulating layer <NUM>, that is, the inorganic insulating layer, and the second layer <NUM> including a metal are in direct contact with each other, and, thus, a proceeding path of moisture may be blocked.

Like the groove G described above with reference to <FIG> having a loop shape surrounding the first through hole <NUM>, a stack structure including the first layer <NUM> and the second layer <NUM>, in which the groove G is defined, may have a loop shape surrounding the first through hole <NUM> in a plan view. Similarly, the barrier wall PW may also have a loop shape surrounding the first through hole <NUM> in a plan view. The first layer <NUM> defining one groove G, the barrier wall PW, and the first layer <NUM> defining the other groove G may have loop shapes that surround the first through hole <NUM> while being spaced apart or separated from each other.

The thin film encapsulation layer <NUM> may also be in the middle area MA. The first inorganic encapsulation layer <NUM> may have a relatively excellent step coverage, as compared with the first functional layer 222a, the second functional layer 222c, the opposite electrode <NUM>, and/or the capping layer <NUM>. The first inorganic encapsulation layer <NUM> may be continuous as shown in <FIG>. For example, the first inorganic encapsulation layer <NUM> may continuously and entirely cover an inner surface of the groove G. In an embodiment, the first inorganic encapsulation layer <NUM> may be formed by a chemical vapor deposition method.

In an embodiment, the organic encapsulation layer <NUM> may overlap the groove G that is closest to the display area DA among the grooves G. The groove G closest to the display area DA may be at least partially filled with a material included in the organic encapsulation layer <NUM>.

Since the second inorganic encapsulation layer <NUM> has a relatively excellent step coverage similarly to the first inorganic encapsulation layer <NUM>, the second inorganic encapsulation layer <NUM> may continuously cover a part of the grooves G, for example, an internal surface of the groove G between the barrier wall PW and the first through hole <NUM>.

The input sensing section <NUM> may be on the display panel <NUM> that includes the substrate <NUM>, the display layer <NUM> including the pixel circuit PC and the organic light-emitting diode OLED on the substrate <NUM>, and the thin film encapsulation layer <NUM>. In an embodiment, the input sensing section <NUM> may be directly on the display panel <NUM>.

In an embodiment, the input sensing section <NUM> may include a first insulating layer <NUM>, a second insulating layer <NUM>, a third insulating layer <NUM>, and a fourth insulating layer <NUM> that are sequentially stacked. The input sensing section <NUM> may include a first conductive layer <NUM> between the second insulating layer <NUM> and the third insulating layer <NUM>, and a second conductive layer <NUM> between the third insulating layer <NUM> and the fourth insulating layer <NUM>. The first conductive layer <NUM> and/or the second conductive layer <NUM> may include touch electrodes for sensing a touch input, and trace lines connected to the touch electrodes.

In an embodiment, the first insulating layer <NUM>, the second insulating layer <NUM>, or the third insulating layer <NUM> may include an inorganic insulating material, such as silicon oxide, silicon nitride, or silicon oxynitride, and the fourth insulating layer <NUM> may include an organic insulating material. For example, the organic insulating material in the fourth insulating layer <NUM> may include photoresist (negative or positive) or a polymer-based organic material. The first conductive layer <NUM> and/or the second conductive layer <NUM> may include a metal or a transparent conductive oxide (TCO). In some embodiments, the first conductive layer <NUM> and/or the second conductive layer <NUM> may include a conductive material including any of molybdenum (Mo), aluminium (Al), copper (Cu), and/or titanium (Ti), etc..

In an embodiment, the first insulating layer <NUM>, the second insulating layer <NUM>, the third insulating layer <NUM>, and the fourth insulating layer <NUM> may be integrally provided in the display area DA and the middle area MA. Unlike the above layers, a planarization layer <NUM> may be in the middle area MA. In a plan view, the planarization layer <NUM> may have a loop shape around (e.g., surrounding) the first through hole <NUM>.

The planarization layer <NUM> may include an organic insulating layer. In an embodiment, the planarization layer <NUM> may include a polymer-based material. For example, the planarization layer <NUM> may include a silicon-based resin, an acryl-based resin, an epoxy-based resin, polyimide, polyethylene, etc. The planarization layer <NUM> may include a material different from that included in the organic encapsulation layer <NUM>.

A part of the planarization layer <NUM>, which is neighboring with the display area DA, may overlap the organic encapsulation layer <NUM>. The second inorganic encapsulation layer <NUM> and the first insulating layer <NUM> may be between the organic encapsulation layer <NUM> and the planarization layer <NUM> overlapping each other.

The organic encapsulation layer <NUM> is at a side of the barrier wall PW, and in the middle area MA, a region that is not covered by the organic encapsulation layer <NUM> may be covered by the planarization layer <NUM>. Since the planarization layer <NUM> is in the region of the middle area MA, which is not covered by the organic encapsulation layer <NUM>, the flatness of the display panel <NUM> around the first through hole <NUM> may be increased. Therefore, exfoliation of the input sensing section <NUM> and/or the optical functional section <NUM> (see <FIG>) on the display panel <NUM> may be prevented or substantially prevented.

<FIG> is a cross-sectional view of the display panel <NUM> according to an embodiment.

The display area DA of <FIG> may have a same stack structure as that of the display area DA described above with reference to <FIG>, and further descriptions thereof may be omitted. The display panel <NUM> may include the bending area BA in an outer region thereof, as described above with reference to <FIG> and <FIG>.

Referring to the peripheral area PA including the bending area BA shown in <FIG>, an inorganic insulating structure IL on the substrate <NUM> may include an opening IL-OP. The inorganic insulating structure IL may include at least one inorganic insulating layer. In some embodiments, the inorganic insulating structure IL may include a buffer layer <NUM>, a gate insulating layer <NUM>, a first interlayer insulating layer <NUM>, and/or a second interlayer insulating layer <NUM>. An opening 201a of the buffer layer <NUM>, an opening 203a of the gate insulating layer <NUM>, an opening 205a of the first interlayer insulating layer <NUM>, and/or an opening 207a of the second interlayer insulating layer <NUM> overlap one another and form the opening IL-OP of the inorganic insulating structure IL. In an embodiment, a width OW of the opening IL-OP may be greater than that of the bending area BA. In some embodiments, when the substrate <NUM> includes two base layers and an inorganic insulating layer on each base layer, an inorganic insulating layer at the uppermost layer of the substrate <NUM> may also include an opening corresponding to the opening IL-OP. In this case, the base layer of the substrate <NUM> may be exposed through the opening IL-OP, and the exposed portion of the base layer may be in direct contact with an organic insulating layer <NUM> that will be described later.

The organic insulating layer <NUM> may be in the bending area BA. The organic insulating layer <NUM> may at least partially fill an opening of at least one inorganic insulating layer. For example, the organic insulating layer <NUM> may at least partially fill the opening IL-OP of the inorganic insulating structure IL. In an embodiment, the organic insulating layer <NUM> may be only in the bending area BA. The organic insulating layer <NUM> may include an organic insulating material, such as acryl, benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HMDSO), etc. In an embodiment, the organic insulating layer <NUM> may be manufactured in a same process as that of the first layer <NUM> (see <FIG>) described above with reference to <FIG>, and may include a same material as that of the first layer <NUM>.

The inorganic insulating structure IL includes the opening IL-OP in the bending area BA, and generation of cracks in at least one inorganic insulating layer due to bending stress may be prevented or reduced. In addition, since the organic insulating layer <NUM> may absorb the stress generated in bending, the issue of crack generation may be prevented or reduced.

The first portion <NUM> of the line in the first area 1A and the second portion <NUM> of the line in the second area 2A may be apart from each other about the bending area BA. In an embodiment, the first portion <NUM> and the second portion <NUM> may be on, for example, the gate insulating layer <NUM>. In another embodiment, the first portion <NUM> and/or the second portion <NUM> may be, for example, on the first interlayer insulating layer <NUM>.

The first portion <NUM> and the second portion <NUM> may be electrically connected to each other via the third portion <NUM> on the organic insulating layer <NUM>. The third portion <NUM> may extend across the bending area BA. An end portion of the third portion <NUM> may be connected to the first portion <NUM> via a contact hole that penetrates through the first and second interlayer insulating layers <NUM> and <NUM> while overlapping the first portion <NUM>. The other end portion of the third portion <NUM> may be connected to the second portion <NUM> via a contact hole that penetrates through the first and second interlayer insulating layers <NUM> and <NUM> while overlapping the second portion <NUM>.

The third portion <NUM> may include a material having relatively higher flexibility than that of the first portion <NUM> and/or the second portion <NUM>, e.g., aluminium. In an embodiment, the third portion <NUM> may be formed through a same process as that of the second layer <NUM> (see <FIG>) described above with reference to <FIG>, and may include a same material as that of the second layer <NUM>.

In an embodiment, one or more protective layers may be in the peripheral area PA. In an embodiment, <FIG> shows a first protective layer <NUM> and a second protective layer <NUM>. In an embodiment, the first protective layer <NUM> and the second protective layer <NUM> may include an organic insulating material. The first protective layer <NUM> and/or the second protective layer <NUM> protect the third portion <NUM> of the line, and may adjust a neutral plane of the display panel <NUM> or disperse bending stress during bending.

<FIG> is a cross-sectional view partially showing a display device according to an embodiment; <FIG> are cross-sectional views of groove structures according to some embodiments; and <FIG> is an enlarged cross-sectional view of a region XVI of <FIG> showing a barrier wall PW. <FIG> shows the display panel <NUM> and the input sensing section <NUM> with the optical functional section omitted in the display device, for convenience of description.

Referring to the display area DA of <FIG>, the display area DA of <FIG> may have a same stack structure as that of the display area DA described above with reference to <FIG>, and further descriptions thereof may be omitted.

Referring to the middle area MA of <FIG>, the groove G is defined in a first layer <NUM>' and a second layer <NUM>'. Referring to <FIG> and <FIG>, the first layer <NUM>' may be on the second interlayer insulating layer <NUM> that is an inorganic insulating layer, and the second layer <NUM>' may be on an upper surface of the first layer <NUM>'.

In an embodiment, the first layer <NUM>' may include an organic insulating material. In some embodiments, the first layer <NUM>' may be manufactured through a same process as that of the first organic insulating layer <NUM> shown in <FIG>, and may include a same material as that of the first organic insulating layer <NUM>.

In an embodiment, the second layer <NUM>' may be in direct contact with the upper surface of the first layer <NUM>' and may include a metal. In an embodiment, the second layer <NUM>' may be formed in a same process as that of the contact metal layer CM shown in <FIG>, and may include a same material as that of the contact metal layer CM.

In an embodiment, the groove G may have an undercut structure or an eave structure. The groove G includes a second hole <NUM>' in the second layer <NUM>' and may include a first hole <NUM>' in the first layer <NUM>'. The groove G may be formed by an etching (e.g., an isotropic etching) process, and <FIG> and <FIG> show that the second hole <NUM>' in the second layer <NUM>' and the first hole <NUM>' in the first layer <NUM>' define the groove G. In another embodiment, as described above with reference to <FIG>, a recess, instead of the first hole <NUM>', may be in the first layer <NUM>'.

An end portion of the second layer <NUM>', which defines the second hole <NUM>', further extends towards the center of the second hole <NUM>' as compared with an internal surface of the first layer <NUM>', which defines the first hole <NUM>' or the recess, to form a tip <NUM>', or a pair of tips <NUM>' in a cross-sectional view. As described above, the organic material layer in the intermediate layer <NUM>, e.g., the first functional layer 222a and/or the second functional layer 222c, is isolated or disconnected due to the tips <NUM>'. Similarly, the opposite electrode <NUM> and/or the capping layer <NUM> may be isolated or disconnected due to the undercut or eave structure.

The thin film encapsulation layer <NUM> may include the first inorganic encapsulation layer <NUM>, the organic encapsulation layer <NUM>, and the second inorganic encapsulation layer <NUM>. Since the first inorganic encapsulation layer <NUM> has a relatively excellent step coverage, as shown in <FIG> and <FIG>, the first inorganic encapsulation layer <NUM> may continuously cover an internal surface of the groove G. A structure of the thin film encapsulation layer <NUM> and a structure of the input sensing section <NUM> on the thin film encapsulation layer <NUM> may be the same as those described above with reference to <FIG>.

<FIG> and <FIG> show that the internal surface of the groove G, for example, side surfaces and bottom surfaces of the tips <NUM>' and the internal side surface of the first layer <NUM>' are in direct contact with the first inorganic encapsulation layer <NUM>. In some embodiments, an inorganic passivation layer PVX may be between the internal surface of the groove G and the first inorganic encapsulation layer <NUM>.

Referring to <FIG>, the inorganic passivation layer PVX may be on the second layer <NUM>'. For example, the inorganic passivation layer PVX may be formed after forming the second layer <NUM>' and before forming the intermediate layer <NUM> (see <FIG>). Although not shown in the drawings, the inorganic passivation layer PVX may extend to the display area DA (see <FIG>), and, in this case, the inorganic passivation layer PVX may be between the contact metal layer CM (see <FIG>) and the second organic insulating layer <NUM> in the display area DA.

The inorganic passivation layer PVX may include an inorganic insulating material, such as silicon oxide, silicon nitride, and silicon oxynitride. The inorganic passivation layer PVX may be obtained by a chemical vapor deposition method, etc..

In an embodiment, the inorganic passivation layer PVX may continuously and entirely cover the internal surface of the groove G. For example, the inorganic passivation layer PVX may cover an upper surface, a side surface, and a bottom surface of the second layer <NUM>' and may continuously cover the internal surface of the first layer <NUM>' and an upper surface of the second interlayer insulating layer <NUM> under the first layer <NUM>'.

After forming the inorganic passivation layer PVX, the first functional layer 222a, the second functional layer 222c, the opposite electrode <NUM>, and/or the capping layer <NUM> may be formed. The first functional layer 222a, the second functional layer 222c, the opposite electrode <NUM>, and/or the capping layer <NUM> may be disconnected or isolated at the pair of tips <NUM>'.

In an embodiment, the first inorganic encapsulation layer <NUM> formed after the capping layer <NUM> continuously covers the internal surface of the groove G, and may be in direct contact with the inorganic passivation layer PVX at some regions.

<FIG> shows that the first layer <NUM>' has a single-layered structure, but, in some embodiments, the first layer <NUM>' may include a plurality of layers.

Referring to <FIG>, in an embodiment, a first layer <NUM>" may include a first sub-layer <NUM> and a second sub-layer <NUM>. In an embodiment, the first sub-layer <NUM> may include a same material as that of the first organic insulating layer <NUM> described above with reference to <FIG>, and the second sub-layer <NUM> may include a same material as that of the second organic insulating layer <NUM>. In another embodiment, the first sub-layer <NUM> may include a same material as that of the organic insulating layer <NUM> described above with reference to <FIG>, and the second sub-layer <NUM> may include a same material as that of the first organic insulating layer <NUM>.

The second layer <NUM>" may include a metal or an inorganic insulating material. A second hole <NUM>" of the second layer <NUM>" and a first hole or a recess 240r" of the first layer <NUM>" defines the groove G. The second layer <NUM>" includes a tip <NUM>", or may include a pair of tips <NUM>" in a cross-sectional view, protruding towards a center of the second hole <NUM>". The pair of tips <NUM>" may further protrude towards the center of the second hole <NUM>" as compared with the internal surface of the first layer <NUM>", to form an undercut structure or an eave structure.

As described above with reference to <FIG>, the inorganic passivation layer PVX may be on the second layer <NUM>", and the first functional layer 222a, the second functional layer 222c, the opposite electrode <NUM>, and/or the capping layer <NUM> may be disconnected or isolated at the pair of tips <NUM>".

In an embodiment, the inorganic passivation layer PVX may continuously cover the internal surface of the groove G, and the first inorganic encapsulation layer <NUM> may be partially in direct contact with the inorganic passivation layer PVX, as described above. In another embodiment, the inorganic passivation layer PVX may be omitted.

Referring back to <FIG>, the barrier wall PW is among a plurality of grooves G. The barrier wall PW may include a plurality of barrier wall layers, for example, a first barrier wall layer PW1, a second barrier wall layer PW2, and a third barrier wall layer PW3. In an embodiment, the first barrier wall layer PW1 may include a same material as that of the first organic insulating layer <NUM>, the second barrier wall layer PW2 may include a same material as that of the second organic insulating layer <NUM>, and the third barrier wall layer PW3 may include a same material as that of the pixel defining layer <NUM> and/or the spacer <NUM>.

A gap layer <NUM> including a metal may be between neighboring barrier wall layers from among the barrier wall layers, for example, between the second barrier wall layer PW2 and the third barrier wall layer PW3. The gap layer <NUM> may have a fine undercut structure, and, in some embodiments, the first functional layer 222a and/or the second functional layer 222c may be disconnected or isolated. Similarly, the opposite electrode <NUM> and/or the capping layer <NUM> may be disconnected or isolated.

Referring to <FIG> and <FIG>, the gap layer <NUM> may include a metal. In an embodiment, the gap layer <NUM> may include at least two layers having different etch selectivity ratios from each other. In an embodiment, the gap layer <NUM> may include a first layer <NUM>, a second layer <NUM>, and a third layer <NUM>. In an embodiment, the first layer <NUM> and the third layer <NUM> may have a same material as each other, and the second layer <NUM> may have a different material from that of the first and third layers <NUM> and <NUM>. In an embodiment, the first layer <NUM> and the third layer <NUM> may include a transparent conductive oxide material, such as ITO, and the second layer <NUM> may include a metal including silver (Ag), magnesium (Mg), aluminium (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or a compound thereof. In an embodiment, the second layer <NUM> may have a thickness that is greater than that of the first layer <NUM> and that of the third layer <NUM>.

In an embodiment, during a process of manufacturing the display panel <NUM> (see <FIG>), an edge of the gap layer <NUM> may be etched, and the second layer <NUM> may be further etched than the first and third layers <NUM> and <NUM>. In this case, the edge of the first layer <NUM> may protrude more than the edge of the second layer <NUM> in a lateral direction, and the edge of the first layer <NUM> may perform substantially a same function as that of the tips in the groove G described above. That is, the edge of the first layer <NUM> protrudes more than the edge of the second layer <NUM>, and then the gap layer <NUM> may have an undercut structure or an eave structure.

When the sum of thicknesses of the first functional layer 222a, the second functional layer 222c, and the opposite electrode <NUM>, or the sum of thicknesses of the first functional layer 222a, the second functional layer 222c, the opposite electrode <NUM>, and the capping layer <NUM> is less than a thickness of the gap layer <NUM>, the first functional layer 222a, the second functional layer 222c, the opposite electrode <NUM>, and/or the capping layer <NUM> may be disconnected or isolated. In this regard, <FIG> shows that the first functional layer 222a, the second functional layer 222c, the opposite electrode <NUM>, and the capping layer <NUM> are disconnected at the edge of the gap layer <NUM>.

The display device according to one or more embodiments may prevent or substantially prevent damage to the light-emitting diode due to moisture introduced through the through hole or the opening, and may simplify processes or reduce costs by using layers included in the display layer.

Claim 1:
A display device (<NUM>) comprising:
a substrate (<NUM>);
a display layer (<NUM>) on the substrate (<NUM>), the display layer (<NUM>) comprising a plurality of pixels (P);
a thin film encapsulation layer (<NUM>) on the display layer (<NUM>), the thin film encapsulation layer (<NUM>) comprising at least one inorganic encapsulation layer (<NUM>, <NUM>) and at least one organic encapsulation layer (<NUM>);
a first through hole (<NUM>) between two neighboring pixels (P) from among the plurality of pixels (P), the first through hole (<NUM>) penetrating through the substrate (<NUM>), the display layer (<NUM>), and the thin film encapsulation layer (<NUM>); and
a first groove (G) around the first through hole (<NUM>), the first groove (G) being defined in a first layer (<NUM>) and a second layer (<NUM>) on the first layer (<NUM>),
wherein the first groove (G) comprises a first hole (<NUM>) or a recess (240r) in the first layer (<NUM>) and a second hole (<NUM>) in the second layer (<NUM>),
the second layer (<NUM>) comprises a tip (<NUM>) extending towards a center of the second hole (<NUM>) further than an internal surface of the first layer (<NUM>), the internal surface defining the first hole (<NUM>) or the recess (240r), and
at least one organic material layer in the display layer (<NUM>) is disconnected at the first groove (G),
wherein the display device further comprises:
a second groove (G) around the first through hole (<NUM>); and
a barrier wall (PW) between the first groove (G) and the second groove (G).