Patent Description:
The present disclosure relates to an electronic device and the manufacturing process thereof, and in particular it relates to an electronic device and the manufacturing process of an active matrix light-emitting diode.

Active matrix drivers on the existing commercial market have a corresponding thin film transistor (TFT) on each pixel to drive the light-emitting elements of each pixel. This is how they can produce high-brightness images, high-definition images, or images with a wide viewing angle. However, in the existing manufacturing process for active matrix light-emitting diodes, there is currently no way to test whether the function of the corresponding thin film transistor in each pixel is normal or not before the surface mount technology (SMT) process of the LED is performed. Rather, it is necessary to perform a light-on inspection of each pixel after the SMT process is performed on the LED. Therefore, if the thin film transistor corresponding to the pixel is found to be defective in the light-on process after the LED is mounted, the LED is wasted. This increases the cost and time required for processing. <CIT> discloses a method and a system for testing a plurality of driver circuits of an AMOLED before OLEDs are formed are provided. Each driver circuit includes a terminal, which is connected to an OLED after the OLED is formed, and is connected to a test element to form an electrical loop during the test. The system selects one specific driver circuit to test. The method and the system measure the value of a current signal flowing through the test element, and then analyze it to determine the status of the driver circuit. The said steps executed repeatedly, all driver circuits of the AMOLED are tested efficiently and precisely. The scan transistor is not specifically tested. <CIT> discloses an OLED pixel circuit with a sensing of the anode of the OLED in order to determine a short-circuit state of the scanning transistor.

The problems mentioned above are solved by the electronic device and the manufacturing process defined by the appended claims.

The disclosure can be understood by referring to the following detailed description and the accompanying drawings. It is noticed that in order to let readers easy to understand and for the simplicity of drawings, the multiple drawings in the disclosure only depict a part of an electronic device, and the specific components in the drawings is not drawn in scale. In addition, the number and size of various components in the figures are for illustrative purposes only, and are not intended to limit the scope of the disclosure.

The whole specification and the appended claims may use certain terms to refer to particular elements. Persons skilled in the art will understand that electronic device manufacturers may refer to the same element under different names. The disclosure is not intended to distinguish between elements that have the same function but have different names. In the following description and claims, the words "having" and "comprising" are interpreted as "comprising but not limited to".

The terms "about", "equal to", "same" or "identical" generally mean within <NUM>% of a given value or range, or mean within <NUM>%, <NUM>%, <NUM>%, <NUM>%, <NUM>% or <NUM>% of the given value or range.

In the disclosure, the same or similar elements are designated by the same or similar numerals, and the description thereof is omitted. In addition, the terms "first", "second" and the like mentioned in the specification or the claims are used to identify discrete elements or to distinguish different embodiments or ranges, and are not intended to limit the upper or lower limits of the number of elements, and are not intended to limit the manufacturing order or the disposing order of the elements.

An electronic device of the present disclosure may include, a display device, an antenna device, a sensing device, a light-emitting device, or a splicing device, but it is not limited thereto.

<FIG> is a schematic diagram of an electronic device <NUM> in accordance with some embodiments of the disclosure. The content of the disclosure will be described below with the electronic device <NUM>, but the disclosure is not limited thereto.

A display area of the electronic device <NUM> includes a plurality of pixels (e.g. a pixel <NUM>), wherein one pixel (e.g. the pixel <NUM>) at least includes a sub-pixel (e.g. a sub-pixel <NUM>). In some embodiments (as shown in <FIG>), the electronic device <NUM> is an active matrix driving LED display device. The sub-pixel <NUM> is formed by two adjacent scan lines SN and two adjacent data lines DA (not shown) interlacing each other, but they are not limited thereto. In some embodiments, the electronic device <NUM> may be, for example, a bendable or flexible electronic device, but it is not limited thereto.

In some embodiments (as shown in <FIG>), the sub-pixel <NUM> includes, for example, a transistor <NUM> (e.g. a driving transistor), a transistor <NUM> (e.g. a switching transistor), an electronic unit <NUM>, and/or a capacitor Cst. In some embodiments, the capacitor Cst, for example, is connected between a gate and a source of the transistor <NUM> to maintain a voltage (Vgs) across the gate and the source of the transistor <NUM>, but it is not limited thereto. It is noticed that the sub-pixel <NUM> may increase other transistors (e.g. reset transistors, but it is not limited thereto), other capacitors, or other suitable elements according to requirements. In addition, the number or the (electrical) connection relationship of the above-mentioned transistors, the capacitor, and the electronic unit is not limited to the illustration of the present disclosure, and may be appropriately adjusted according to requirements.

The material of the above-mentioned transistor may include amorphous silicon, polysilicon (such as low-temp polysilicon, LTPS), oxide semiconductor (such as indium gallium zinc oxide, IGZO), other suitable materials or combinations thereof, but the disclosure is not limited thereto. In some embodiments, the electronic device <NUM> may include transistors of different materials as described above. For example, some of the transistors may include low temperature polysilicon materials, and some of the transistors may include indium gallium oxide, but they are not limited thereto.

The transistor in embodiments of the present disclosure may select a top-gate thin film transistor, a bottom-gate thin film transistor, dual-gate thin film transistor or a dual-gate thin film transistor according to requirements, but it is not limited thereto.

In some embodiments, the electronic unit <NUM> includes an inorganic light-emitting diode (LED), such as a micro LED, mini LED, Quantum Dot LED (QD-LED or QLED), or other suitable LED, but it is not limited thereto. In some embodiments, a light conversion material (not shown) may be disposed on the electronic unit <NUM>, and the light conversion material includes, for example, a quantum dot (QD) material, a fluorescence material, a color filter (CF) material, a phosphor material, other suitable light converting material, or the combination thereof, but it is not limited thereto.

In some embodiments (as shown in <FIG>), the electronic device <NUM> includes at least one test element <NUM> electrically connected to a transistor <NUM> (e.g. a driving transistor). In some embodiments (as shown in <FIG>), the test element <NUM> is disposed, for example, adjacent to the transistor <NUM>. In some embodiments (as shown in <FIG>), the test element <NUM>, for example, at least partially overlaps the sub-pixel <NUM> in a top view of the electronic device <NUM>. In some embodiments, the test element <NUM> spans, for example, between two adjacent sub-pixels <NUM>, or the test element <NUM> at least partially overlaps, for example, two adjacent sub-pixels <NUM> in a top view of the electronic device <NUM>. In some embodiments, one end of the test element <NUM>, for example, is electrically connected to the transistor to be tested, and the other end of the test element <NUM> is electrically connected to a voltage, for example, a negative voltage (e.g. Vss in <FIG>), a ground voltage (GND), or a positive voltage (not shown, the positive voltage is, for example, less than a positive voltage Vdd of <FIG>). In some embodiments (as shown in <FIG>), the electronic unit <NUM>, for example, is connected in parallel to the test element <NUM>, but it is not limited thereto.

According to the invention, an impedance of the test element <NUM> is greater than an impedance of the electronic unit <NUM>.

In some embodiments, before the electronic unit <NUM> is disposed on a substrate (no shown) of the electronic device <NUM>, the test element <NUM> can be used, for example, to test and determine whether the circuit is defective or not. For example, the test element <NUM> can be used to test whether the transistor (e.g. the transistor <NUM> and/or the transistor <NUM>) is defective. For example, before the electronic unit <NUM> is disposed on the substrate (not shown) of the electronic device <NUM>, the path connecting the electronic unit <NUM> as shown in <FIG> is, for example, open. At this time, the transistor <NUM> is operated to be turned off and a determination step is performed on the transistor <NUM>. The determination step is determined, for example, by a temperature detector <NUM>. The method of the detailed determination step will be described in detail later. When the transistor <NUM> is defective, during the test or the determination process, the transistor <NUM> may not be able to be normally turned off (that is, there is a short circuit in the transistor <NUM>) according to the above-described execution requirements. In detail, the defective transistor <NUM> as described above can be regarded as, for example, a resistor. When a voltage difference (the voltage difference = a positive voltage Vdd - a negative voltage Vss (or a ground voltage)) is provided between the defective transistor <NUM> and the test element <NUM>, a leakage current I may be generated because the transistor <NUM> cannot be normally turned off. The leakage current I may flow through the test element <NUM> to generate thermal energy.

In some embodiments, the impedance of the test element <NUM> may be increased as needed, or the voltage difference between the positive voltage Vdd and the negative voltage Vss (or the ground voltage or a positive voltage less than the positive voltage Vdd) may be increased. When the transistor <NUM> is defective, the thermal energy generated by the test element <NUM> may be increased, and it is easier to determine whether the transistor (e.g. the transistor <NUM>) is defective or not. The defects of the transistor may be, for example, a short circuit of the transistor caused by a metal material or a conductive material which is not properly left in the lamination of the transistor, or other possible causes for the transistor fail to turn off normally, resulting in a defect, but it is not limited thereto. In addition, if the transistor <NUM> has no defects, the transistor <NUM> is turned off normally, so that no leakage current I flows through the transistor <NUM> to the test element <NUM>, at which time the test element <NUM> does not generate abnormal thermal energy. Regarding the definition of the abnormal thermal energy, for example, assuming that the temperature T of the test element <NUM> before the test is <NUM> degrees Celsius, according to the test experience in the past. As long as the temperature of the test element <NUM> exceeds T+ΔT during the test, for example, ΔT is <NUM> degrees Celsius, that is, when the temperature of the test element <NUM> exceeds <NUM> degrees Celsius, it is determined that the test element <NUM> may generate abnormal thermal energy, so that the transistor <NUM> is presumed to be defective, for example. If the temperature of the test element <NUM> is lower than T+ΔT during the test, it is determined that the test element <NUM> does not generate abnormal thermal energy, so that the transistor <NUM> is presumed to be free from defects, but it is not limited thereto. It should be noted that the aboveΔT value is only an example, and theΔT value may be different due to different materials, thickness, laminated structures of accessories (such as a heat sink, an outer frame member, and a substrate, and is not limited thereto) included in different electronic devices. The size (or resolution) of the electronic device, process variation etc. may also affect the ΔT value, so the evaluation criteria of theΔT value, for example, need to consider the above possible causes.

In some embodiments of the present disclosure, when the test transistor <NUM> has no defects, the electronic unit <NUM> can be subsequently disposed on the substrate (an array substrate or a circuit board) and be electrically connected to the transistor <NUM>. In some embodiments (as shown in <FIG>), since the test element <NUM> is connected in parallel to the electronic unit <NUM>, in order to reduce the influence of the test element <NUM> on the operation of the electronic unit <NUM>, the impedance of the test element <NUM> can be designed to be greater than the impedance of the electronic unit <NUM>. The ratio between the impedance of the test element <NUM> and the impedance of the electronic unit <NUM> can be between <NUM> and <NUM><NUM> (<NUM>≦ ratio≦ <NUM><NUM>), but it is not limited thereto. For example, in the case where the electronic unit <NUM> (e.g. a light-emitting diode) is turned on during operation (such as the light-emitting diode emits light), the design of the impedance ratio can reduce the on current of the electronic unit <NUM> to be shunted into the test element <NUM> for reducing the influence on the operation of the electronic unit <NUM>. In some embodiments, the impedance of the electronic unit <NUM> when turned on is <NUM> kohms (kΩ), and the impedance of the test element <NUM> may be between <NUM> kohms (kΩ) and <NUM> Gohms(GΩ) (<NUM> kΩ≦ impedance≦ <NUM> GΩ), but it is not limited thereto. The above impedance is measured, for example, by a multimeter or other suitable instruments. In some embodiments, when the electronic unit <NUM> is not disposed, the impedance of the test element <NUM> can be measured by a impedance measuring instrument (for example, the multimeter), and the probes of the impedance measuring instrument, for example, can be electrically connected to two ends of the test element <NUM>, but they are not limited thereto. Alternatively, the traces electrically connected to the two ends of the test element <NUM> are respectively soldered with two different conductive wires, and the probes of the impedance measuring instrument, for example, can be electrically connected to the two different conductive wires, but it is not limited thereto.

In addition, according to the relationship T ∝ P = I<NUM>R, the temperature T can correspond to the temperature of the test element <NUM>, the power P can correspond to the power consumed by the test element <NUM>, and the leakage current I can correspond to the leakage current flowing to the test element <NUM>. The impedance R can correspond to the impedance of the test element <NUM>. In other words, when the leakage current I flowing to the test element <NUM> increased, the power P increases, or the temperature T increases (that is, the thermal energy generated by the test element <NUM> increased. In addition, the present disclosure can utilize a temperature detector <NUM> in <FIG> to detect the temperature generated by the test component <NUM> to determine whether a circuit (e.g. a transistor) of the sub-pixel <NUM> is defective or not. In addition, according to a position where the heat source detected by the temperature detector <NUM> is located, the tester can more easily screen out the transistor <NUM> corresponding to the position, or may analyze the transistor <NUM> according to requirements.

In addition, when the transistor <NUM> is defective, the voltage difference between the positive voltage Vdd and the negative voltage Vss can be increased to increase the leakage current I flowing to the test element <NUM>, and the thermal energy generated by the test element <NUM> is increased (that is, the temperature of the test element <NUM> is increased),the temperature detector <NUM> is more likely to detect the location of the heat source, but it is not limited thereto. It should be noted that during the process of increasing the voltage difference between the positive voltage Vdd and the negative voltage Vss (or the ground voltage), for example, the transistor <NUM> is still controlled to be turned off. In addition, during the process of increasing the voltage difference between the positive voltage Vdd and the negative voltage Vss (or the ground voltage), for example, the value of the positive voltage Vdd is controlled to be lower than the value of the rated voltage of the transistor <NUM> to reduce damage to the transistor <NUM> (e.g. burn the transistor <NUM>).

<FIG> is a schematic diagram of a test element <NUM> in accordance with some embodiments of the disclosure. <FIG> includes <FIG>. In some embodiments, as shown in <FIG>, the test element <NUM> may include a resistor, and the test element <NUM> can be disposed on a substrate, for example, by surface mount technology (SMT), but it is not limited thereto. In some embodiments, as shown in <FIG>, the test element <NUM> may include a pseudo thin film transistor (TFT), and the test element <NUM> can be disposed on a substrate (not shown), for example, or the test element <NUM> can be formed in the same process as the transistor <NUM> and/or the transistor <NUM>, but it is not limited thereto. The number of pseudo TFT (for example, three) in <FIG> is merely an example, but it is not limited thereto, and the number of pseudo TFT can be adjusted as needed. In some embodiments, as shown in <FIG>, the test element <NUM> may include a high-impedance trace line, and the test element <NUM> can be disposed, for example, on a substrate (not shown). In some embodiments, the high-impedance trace line can be selected, for example, by using high-impedance semiconductor materials such as different dopants of Si, GaAs, IGZO, transparent conductive materials with high oxygen content conditions (for example, ITO), poly-Si, or other suitable materials or combinations thereof, but they are not limited thereto. In some embodiments, according to a formula impedance R = [length (L)/ cross-sectional area (A)]*resistivity (ρ), the high-impedance trace line can be formed, for example, by adjusting the length (L) of the trace line, the cross-sectional area (A) of the trace line, or the resistivity (ρ) by the above formula, but it is not limited thereto.

<FIG> is a schematic diagram of the electronic device <NUM> in accordance with an embodiment of the invention. A control switch <NUM> is further disposed between the test element <NUM> and the transistor <NUM> in <FIG> for controlling the electrical connection between the test element <NUM> and the transistor <NUM>. In some embodiments, the control switch <NUM> can include a transistor or other suitable switch elements. In addition, the electronic device <NUM> in <FIG> further includes a test element <NUM> and a control switch <NUM>, and the control switch <NUM> is disposed between the test element <NUM> and a transistor <NUM> for controlling the electrical connection between the test element <NUM> and the transistor <NUM>. The other end of the test element <NUM> is electrically connected, for example, to the negative voltage Vss (or the ground voltage or a positive voltage lower than the positive voltage Vdd), but it is not limited thereto.

In some embodiments (as shown in <FIG>), when the transistor <NUM> is to be tested for defects, the control switch <NUM> can be turned on to electrically connect the transistor <NUM> to the test element <NUM>. Similarly, in the process of testing whether the transistor <NUM> is defective, for example, the transistor <NUM> is operated as turned off, and if the transistor <NUM> is defective, the transistor <NUM> may be short-circuited due to failure of turning off properly, the defective transistor <NUM> can be regarded as a resistor. Therefore, the leakage current I1 flows to the test element <NUM> to generate thermal energy. Similarly, after the test is completed to confirm that the transistor <NUM> has no defects, the transistor <NUM> can be further tested for defects. At this time, for example, the control switch <NUM> is first turned off to electrically insulate the transistor <NUM> from the test element <NUM>, and then the control switch <NUM> is turned on, so that the transistor <NUM> is electrically connected to the test element <NUM>, and the test method for testing whether the transistor <NUM> is defective is similar to the aforementioned test method, and will not be described here.

It should be noted that the test order of the transistor <NUM> and the transistor <NUM> is not limited to the aforementioned test method, and adjustment may be performed as needed.

In some embodiments, the test element <NUM> and the test element <NUM> can be the same element or different elements. In some embodiments, the impedance of test element <NUM> and the impedance of test element <NUM> can be the same or different.

<FIG> is a schematic diagram of the electronic device in accordance with some embodiments of the disclosure. As shown in <FIG>, the display area of the electronic device <NUM> includes a plurality of pixels, wherein one pixel <NUM> may include a sub-pixel <NUM>, a sub-pixel <NUM>, and a sub-pixel <NUM>. In some embodiments, the number of sub-pixels in a pixel can be adjusted as needed. The sub-pixel <NUM> may include a transistor <NUM>, an electronic unit <NUM>, a transistor <NUM>, and a capacitor C1. The sub-pixel <NUM> may include a transistor <NUM>, an electronic unit <NUM>, a transistor <NUM>, and a capacitor C2. The sub-pixel <NUM> may include a transistor <NUM>, an electronic unit <NUM>, a transistor <NUM>, and a capacitor C3. In addition, the electronic device <NUM> (in <FIG>) may include a plurality of data lines (DA, DA1, and DA2) and a plurality of scan lines (SN, SN1, and SN2) that may be respectively electrically coupled to the transistor <NUM> of the sub-pixel <NUM>, the transistor <NUM> of the sub-pixel <NUM>, and the transistor <NUM> of the sub-pixel <NUM>. The manner of connecting the elements in sub-pixel <NUM>, sub-pixel <NUM>, and sub-pixel <NUM> is similar to that in <FIG>, and thus will not be described again.

It should be noted that the transistor <NUM> in the sub-pixel <NUM>, the transistor <NUM> in the sub-pixel <NUM>, and the transistor <NUM> in the sub-pixel <NUM> shown in <FIG> can be tested, for example, by sharing one test element <NUM>. For example, in some embodiments (as shown in <FIG>), a control switch <NUM> can be electrically connected, for example, between the test element <NUM> and the transistor <NUM>. The connection relationship (e.g. electrical connection or electrical insulation) between the test element <NUM> and the transistor <NUM> can be controlled by the control switch <NUM>. Similarly, a control switch <NUM> can be electrically connected, for example, between the test element <NUM> and the transistor <NUM>. The connection relationship (e.g. electrical connection or electrical insulation) between the test element <NUM> and the transistor <NUM> can be controlled by the control switch <NUM>. Similarly, a control switch <NUM> can be electrically connected, for example, between the test element <NUM> and the transistor <NUM>. The connection relationship (e.g. electrical connection or electrical insulation) between the test element <NUM> and the transistor <NUM> can be controlled by the control switch <NUM>. In some embodiments (as shown in <FIG>), the other end of the test element <NUM> can be electrically connected to a ground voltage <NUM> (or the negative voltage Vss or a positive voltage lower than the positive voltage Vdd).

In addition, as shown in <FIG>, when the transistor <NUM> in the sub-pixel <NUM> is to be tested for defects, the test element <NUM> can be electrically connected to the transistor <NUM> by turning on the control switch <NUM>, but the control switch <NUM> and the control switch <NUM> are turned off to electrically insulate the test element <NUM> from the transistor <NUM> and the transistor <NUM>. Similarly, after the transistor <NUM> to be tested is electrically connected to the test element <NUM>, the test method for testing whether the transistor is defective may refer to the test method described above, and therefore will not be described again.

As described above, when the transistor <NUM> is defective, the leakage current I2 may flow to the test element <NUM> during the test to cause the test element <NUM> to generate thermal energy. Similarly, if the transistors (e.g. the transistor <NUM> or the transistor <NUM>) in the other sub-pixels (e.g. the sub-pixel <NUM> or the sub-pixel <NUM>) are to be tested for defects, the test element <NUM> is electrically connected to the transistor to be tested by turning on the corresponding control switch (for example, the control switch <NUM> or the control switch <NUM>), and the other control switches connected to the test element <NUM> are turned off, so that the test element <NUM> is electrically insulated from the transistor that is not to be tested. The method for testing defects is described above, so it will not be described again.

In some embodiments (not shown), the other transistors (the transistors <NUM>, <NUM>, and <NUM>) of the sub-pixel <NUM>, the sub-pixel <NUM>, and the sub-pixel <NUM> may also be tested, for example, by sharing a test element. That is, a control switch for controlling can be separately disposed between the transistors <NUM>, <NUM> and <NUM> and the test element.

<FIG> is a schematic diagram of the electronic device in accordance with some embodiments of the disclosure. The display area of an electronic device <NUM> includes a plurality of pixels, wherein one pixel <NUM> may include a sub-pixel <NUM>, a sub-pixel <NUM>, and a sub-pixel <NUM>. The sub-pixel <NUM> may include a transistor <NUM>, an electronic unit <NUM>, a transistor <NUM>, and a capacitor C4. The sub-pixel <NUM> may include a transistor <NUM>, an electronic unit <NUM>, a transistor <NUM>, and a capacitor C5. The sub-pixel <NUM> may include a transistor <NUM>, an electronic unit <NUM>, a transistor <NUM>, and a capacitor C6. The manner of connecting the elements in sub-pixel <NUM>, sub-pixel <NUM>, and sub-pixel <NUM> of <FIG> is similar to that for sub-pixel <NUM>, sub-pixel <NUM>, and sub-pixel <NUM> of <FIG>, and thus will not be described again. Compared with <FIG>, the main difference of <FIG> is that the transistors (<NUM>, <NUM>, and <NUM>) in sub-pixel <NUM>, sub-pixel <NUM>, and sub-pixel <NUM> are electrically connected to different test elements (<NUM>, <NUM> and <NUM>), which may be connected to a ground voltage <NUM>, for example, but they are not limited thereto.

As shown in <FIG>, when the transistor <NUM> in the sub-pixel <NUM> is to be tested for defects, the transistor <NUM> may be turned off. If the transistor <NUM> is defective, the transistor <NUM> cannot be normally turned off (e.g. short-circuited), so that the leakage current I3 flows to the test element <NUM> to generate thermal energy. Similarly, the test manner to test the transistor <NUM> of the sub-pixel <NUM>, or the transistor <NUM> of the sub-pixel <NUM> is similar to that to test the transistor <NUM>, and thus will not be described again.

In some embodiments, the impedance ratio of the test element <NUM> to the electronic unit <NUM>, the impedance ratio of the test element <NUM> to the electronic unit <NUM>, and/or the impedance ratio of the test element <NUM> to the electronic unit <NUM> may be between <NUM> and <NUM><NUM> (<NUM>≦ impedance ratio≦ <NUM><NUM>), but it is not limited thereto. If it is confirmed in the above manner that the element (for example, a transistor) in the sub-pixel has no defects, the electronic unit of the corresponding sub-pixel, for example, may be subsequently disposed in the sub-pixel. In addition, when the electronic unit is turned on, through the design of the impedance ratio between the test element and the electronic unit described above, most of the current may flow to the electronic unit, and only a small current may flow to the corresponding test element in accordance with a voltage divider rule, thereby reducing the influence of the test element on operation of the electronic unit. In addition, if a control switch is electrically connected to both the transistor (such as a driving transistor) and the test element, when the electronic unit needs to be turned on, the control switch can be turned off to reduce possibility of current flowing to the test element.

<FIG> is a schematic diagram of a manufacturing process of the electronic device in accordance with some embodiments of the disclosure. As shown in <FIG>, in step S600, a first transistor (for example, the transistor <NUM> in <FIG> or the transistor <NUM> in <FIG>) and a test element (for example, the test element <NUM> in <FIG> or the test element <NUM> in <FIG>) are deposited on a substrate (e.g. an array substrate), and the first transistor is electrically connected to the test element. In some embodiments, a control switch (for example, the control switch <NUM> in <FIG>) is further disposed on the substrate, and the control switch (e.g. the control switch <NUM>) is electrically connected to both the first transistor (e.g. the transistor <NUM> in <FIG>) and the test element (e.g. the test element <NUM> in <FIG>). The control switch is turned on, so that the first transistor is electrically connected to the test element. The process involves, in step S602, turning off the first transistor (e.g. the transistor <NUM>). In some embodiments (as shown in <FIG>), step S604 may be performed after step S602. In step S604, for example, voltage is applied (e.g. the voltage = the positive voltage Vdd - the negative voltage Vss) between the first transistor and the test element, but it is not limited thereto. In some embodiments (as shown in <FIG>), voltage is applied (the voltage = the positive voltage Vdd - the ground voltage) between the first transistor and the test element.

Then, the process involves, in step S606, performing a determination step through the test element and obtaining a determination result. The determination step is used, for example, to determine whether the first transistor is defective or not. In some embodiments, the determination step may include, for example, using a temperature detector (for example, the temperature detector <NUM> in <FIG>) to measure whether the test element has an abnormal temperature rise. The abnormal temperature can be referred to the above description. In step S608, the process involves determining whether to set a first electronic unit (for example, the electronic unit <NUM> in <FIG> or in <FIG>) on the substrate according to the determination result. For example, when the test element has an abnormal temperature rise, the determination result is, for example, that the first transistor is defective. In addition, when the first transistor is defective, it may be selected to be ignored or repaired according to the condition of the defect of the first transistor. When the test element does not have an abnormal temperature rise, it is determined that the first transistor has no defects, and then a first electronic unit can be disposed, and the first electronic unit is electrically connected to the first transistor (for example, the transistor <NUM> in <FIG> or <FIG>).

<FIG> is a schematic diagram of the manufacturing process of the electronic device in accordance with some embodiments (as shown in <FIG>) of the disclosure. As shown in <FIG>, in step S700, a first transistor (e.g. the transistor <NUM>), a second transistor (e.g. the transistor <NUM>), a first control switch (e.g. the control switch <NUM>), a second control switch (e.g. the control switch <NUM>), and a test element (e.g. the test element <NUM>) are deposited on a substrate. The first control switch (e.g. the control switch <NUM>) is electrically connected to both the first transistor (e.g. the transistor <NUM>) and the test element (e.g. the test element <NUM>), and the second control switch (e.g. the control switch <NUM>) is electrically connected to both the second transistor (e.g. the transistor <NUM>) and the test element (e.g. the test element <NUM>). After the step S700, step S702 and/or step S710 may be selectively performed, but it should be noted that step S702 and step S710 need to be performed separately. After the step S700, for example, the step S702 could be performed. The process involves, in step S702, turning on the first control switch (e.g. the control switch <NUM>), but turning off the second control switch (e.g. the control switch <NUM>), so that the first transistor (e.g. the transistor <NUM>) is electrically connected to the test element (e.g. the test element <NUM>). In step S704, a voltage is applied (for example, the voltage = the positive voltage Vdd - the negative voltage Vss, or the voltage = the positive voltage Vdd - the ground voltage) between the first transistor and the test element, but it is not limited thereto. Subsequently, in step S706, a determination step is performed to obtain a determination result. The determination step is used, for example, to determine whether the first transistor is defective or not. As mentioned above, the determination step may include, for example, using a temperature detector to measure whether the test element has an abnormal temperature rise. Then, in step S708, the process involves determining whether to set a first electronic unit (e.g. the electronic unit <NUM> in <FIG>) on the substrate according to the determination result. In some embodiments, when the test element has an abnormal temperature rise, it is determined that the first transistor is defective, and it may be selected to be ignored or repaired according to the condition of the defect of the first transistor. When the test element does not have an abnormal temperature rise, it is determined that the first transistor has no defects, and then the first electronic unit can be disposed, and the first electronic unit is electrically connected to the first transistor (e.g. the transistor <NUM>).

Similarly, step S710 may also be performed, for example, after step S700. In step S710, the process involves turning off the first control switch (e.g. the control switch <NUM>), but turning on the second control switch (e.g. the control switch <NUM>), so that the second transistor (e.g. the transistor <NUM>) is electrically connected to the test element (e.g. the test element <NUM>). In step S712, voltage is applied (for example, the voltage = the positive voltage Vdd - the negative voltage Vss, or the voltage = the positive voltage Vdd - the ground voltage) between the second transistor and the test element, but it is not limited thereto. Subsequently, in step S714, a determination step is performed to obtain a determination result. The determination step is described above. Then, in step S716, the process involves determining whether to set a second electronic unit (e.g. the electronic unit <NUM> in <FIG>) on the substrate according to the determination result. In some embodiments, when the test element has an abnormal temperature rise, it is determined that the second transistor is defective, and it may be selected to be ignored or repaired according to the condition of the defect of the second transistor. When the test element does not have an abnormal temperature rise, it is determined that the second transistor has no defects, and then the second electronic unit can be disposed, and the second electronic unit is electrically connected to the second transistor (e.g. the transistor <NUM>).

The test method of the present disclosure can be applied to a circuit test in a panel or a test of a circuit board of a backlight module.

The circuit architecture and the manner of connection between the elements in the disclosure are merely examples, and the disclosure is not limited thereto. The features of the various embodiments can be arbitrarily mixed and used as long as they do not contradict the definition of the invention provided by the appended claims. The architectural design or material selection of the test element is merely an example, and the disclosure is not limited thereto.

Claim 1:
An electronic device (<NUM>), comprising:
a first sub-pixel (<NUM>), comprising:
a first transistor (<NUM>);
a second transistor (<NUM>) having a first terminal electrically connected to a gate of the first transistor;
a first electronic unit (<NUM>), electrically connected to a source of the first transistor, said first electronic unit being an inorganic light-emitting diode;
a first test element (<NUM>) having one end electrically connected to the source of the first transistor;
wherein the first test element has a first impedance, the first electronic unit has a second impedance, and the first impedance is greater than the second impedance;
the electronic device being characterized in that the first sub-pixel further comprises:
a second test element; and
a control switch having a first end connected to the first terminal of the second transistor and a second end connected to the second test element,
wherein each of the first test element and the second test element is a resistor.