Patent Description:
Priority is claimed on <CIT>, and <CIT>,.

Each of a power module, LED module, and thermoelectric module has a structure in which a power semiconductor element, an LED element, and a thermoelectric element are bonded to an insulating circuit board in which a circuit layer made of a conductive material is formed on one surface of an insulating layer. As the insulating layer, an insulating layer made of ceramics or an insulating resin has been proposed.

Here, as an insulating circuit board provided with an insulating resin layer, for example, a metal-based circuit board is proposed in Patent Document <NUM>. In addition, a multilayer wiring board is proposed in Patent Document <NUM>. Furthermore, an insulated circuit board comprising an insulating resin member is proposed in Patent Document <NUM>.

In the metal-based circuit board described in Patent Document <NUM>, an insulating resin layer is formed on a metal substrate, and a circuit layer having a circuit pattern is formed on this insulating resin layer. Here, the insulating resin layer is made of an epoxy resin that is a thermosetting resin, and the circuit layer is made of a copper foil.

This metal-based circuit board has a structure in which a semiconductor element is bonded onto the circuit layer, a heat sink is arranged on a surface of the metal substrate opposite to the insulating resin layer, and heat generated by the semiconductor element is transferred to the heat sink side to dissipate heat.

In addition, the multilayer wiring board described in Patent Document <NUM> is manufactured in such a manner that a surface roughness (Ra) of a metal foil is set to <NUM> or more, etching treatment is carried out on the metal foil adhered to a resin film, the etching treatment is further carried out on the metal foil to have a circuit pattern shape, thereby forming a wiring circuit layer, the wiring circuit layer formed on the surface of the resin film is embedded while applying pressure to a surface of a soft insulating sheet, an insulating circuit layer is transferred to the surface of the insulating sheet to obtain a plurality of insulating sheets, and the plurality of insulating sheets thus obtained are laminated and heat-cured all at one. Furthermore, Patent Document <NUM> discloses a bonded body, as well as an insulating circuit board, having a structure in which an insulating resin member made of an insulating resin and a metal part made of a metal are bonded, wherein a bonded interface between the insulating resin member and the metal part has an uneven shape including a protrusion in which the metal part protrudes toward an insulating resin member side and a recess in which the metal part retracts from the insulating resin member side, and at least one of a kurtosis Rku of contour curve at the bonded interface of the metal part and a kurtosis Sku of contour surface at the bonded interface of the metal part is in a range of <NUM> or more and <NUM> or less.

International Patent Application No. <CIT>.

In an insulating circuit board having a structure in which a metal plate or the like is bonded to an insulating resin layer to form a circuit layer, it is important to ensure the adhesion between the insulating resin layer and the circuit layer (metal plate) so that peeling of the circuit layer (metal plate) from the insulating resin layer does not occur during use.

Here, in the metal-based circuit board described in Patent Document <NUM>, it was not considered to improve the adhesion between the insulating resin layer and the circuit layer, so that a risk for the occurrence of peeling of the circuit layer (metal plate) from the insulating resin layer during use has existed.

On the other hand, in the multilayer wiring board described in Patent Document <NUM>, the object was to improve the adhesion between the insulating sheet and the wiring circuit layer by embedding the wiring circuit layer in the insulating sheet with the surface roughness (Ra) set to <NUM> or more.

However, in a case where the surface roughness (Ra) of the metal plate (wiring circuit layer) is too large, electric charges are concentrated on a portion into which the metal plate surface intrudes, resulting in reduction in insulation properties (insulating withstand voltage) of the insulating resin layer. Therefore, there was a risk that the multilayer wiring board could not be used as an insulating circuit board.

The present invention has been made in view of the above-mentioned circumstances, and an objective of the present invention is to provide a bonded body that has excellent adhesion between an insulating resin member and a metal part, has excellent insulation properties in the insulating resin member and can be stably used, and an insulating circuit board.

In order to solve the above-mentioned problems, a bonded body of the present invention has a structure in which an insulating resin member made of an insulating resin and a metal part made of a metal are bonded, and in the bonded body, a bonded interface between the insulating resin member and the metal part has an uneven shape including a protrusion in which the metal part protrudes toward an insulating resin member side and a recess in which the metal part retracts from the insulating resin member side, at least one of a kurtosis Rku of contour curve at the bonded interface of the metal part and a kurtosis Sku of contour surface at the bonded interface of the metal part is in a range of <NUM> or more and <NUM> or less, and an overhang rate that indicates a length ratio of regions overlapping in a lamination direction in a direction along the bonded interface is <NUM>% or more.

According to the bonded body having this configuration, since the bonded interface between the insulating resin member and the metal part has an uneven shape including a protrusion in which the metal part protrudes toward an insulating resin member side and a recess in which the metal part retracts from the insulating resin member side, and at least one of a kurtosis Rku of contour curve at the bonded interface of the metal part and a kurtosis Sku of contour surface at the bonded interface of the metal part is in a range of <NUM> or more and <NUM> or less, a tip of the protrusion is not sharpened more than necessary, and the insulation properties (insulating withstand voltage) of the insulating resin member can be sufficiently ensured.

Furthermore, since the overhang rate indicating the length ratio of regions overlapping in a lamination direction in a direction along the bonded interface is <NUM>% or more, the metal part and the insulating resin member are sufficiently engaged, and the adhesion between the insulating resin member and the metal part can be improved.

Here, in the bonded body of the present invention, at least one of the root mean square deviation Rq of contour curve at the bonded interface of the metal part and the root mean square deviation Sq of contour surface at the bonded interface of the metal part is preferably in a range of <NUM> or more and <NUM> or less.

In this case, since at least one of the root mean square deviation Rq of contour curve at the bonded interface of the metal part and the root mean square deviation Sq of contour surface at the bonded interface of the metal part is in a range of <NUM> or more and <NUM> or less, it is possible to suppress the generation of electric field concentration at the tip of the protrusion, surely ensure the insulation properties, and improve the adhesion between the insulating resin member and the metal part.

An insulating circuit board of the present invention includes an insulating resin layer, and a circuit layer in which a metal plate is bonded to one surface of the insulating resin layer, and in the insulating circuit board, a bonded interface between the insulating resin layer and the circuit layer has an uneven shape including a protrusion in which the circuit layer protrudes toward an insulating resin layer side and a recess in which the circuit layer retracts from the insulating resin layer side, at least one of a kurtosis Rku of contour curve at the bonded interface of the circuit layer and a kurtosis Sku of contour surface at the bonded interface of the circuit layer is in a range of <NUM> or more and <NUM> or less, and an overhang rate that indicates a length ratio of regions overlapping in a lamination direction in a direction along the bonded interface is <NUM>% or more.

According to the insulating circuit board having this configuration, since the bonded interface between the insulating resin layer and the circuit layer has an uneven shape including a protrusion in which the circuit layer protrudes toward an insulating resin layer side and a recess in which the circuit layer retracts from the insulating resin layer side, and at least one of a kurtosis Rku of contour curve at the bonded interface of the circuit layer and a kurtosis Sku of contour surface at the bonded interface of the circuit layer is in a range of <NUM> or more and <NUM> or less, the tip of the protrusion is not sharpened more than necessary, and the insulation properties (insulating withstand voltage) of the insulating resin portion layer can be sufficiently ensured.

Furthermore, since the overhang rate indicating the length ratio of regions overlapping in a lamination direction in a direction along the bonded interface is <NUM>% or more, the circuit layer and the insulating resin layer are sufficiently engaged, and the adhesion between the circuit layer and the insulating resin layer can be improved.

Here, in the insulating circuit board of the present invention, at least one of the root mean square deviation Rq of contour curve at the bonded interface of the circuit layer and the root mean square deviation Sq of contour surface at the bonded interface of the circuit layer is preferably in a range of <NUM> or more and <NUM> or less.

In this case, since at least one of the root mean square deviation Rq of contour curve at the bonded interface of the circuit layer and the root mean square deviation Sq of contour surface at the bonded interface of the circuit layer is in a range of <NUM> or more and <NUM> or less, it is possible to suppress the generation of electric field concentration at the tip of the protrusion, surely ensure the insulation properties, and surely improve the adhesion between the insulating resin layer and the circuit layer.

According to the present invention, it is possible to provide the bonded body that has exceptional adhesion between the insulating resin member and the metal part, has exceptional insulation properties in the insulating resin member, and can be stably used, and the insulating circuit board.

The bonded body according to the present embodiment includes an insulating circuit board <NUM> configured by bonding an insulating resin layer <NUM> that is an insulating resin member to a metal plate <NUM> (circuit layer <NUM>) that is a metal part and a metal substrate <NUM>.

<FIG> shows the insulating circuit board <NUM> according to the embodiment of the present invention and a power module <NUM> using the insulating circuit board <NUM>.

The power module <NUM> shown in <FIG> is provided with the insulating circuit board <NUM>, a semiconductor element <NUM> that is bonded, through a first solder layer <NUM>, to one surface (upper surface shown in <FIG>) of the insulating circuit board <NUM>, and a heat sink <NUM> that is bonded, through a solder layer <NUM>, to the other side (lower side shown in <FIG>) of the insulating circuit board <NUM>.

The semiconductor element <NUM> is made of a semiconductor material such as Si. The first solder layer <NUM> for bonding the insulating circuit board <NUM> and the semiconductor element <NUM> is made of, for example, a Sn-Ag-based solder material, a Sn-Cu-based solder material, a Sn-In-based solder material, or a Sn-Ag-Cu-based solder material (so-called lead-free solder material).

The heat sink <NUM> dissipates heat on the insulating circuit board <NUM> side. The heat sink <NUM> is made of copper or a copper alloy, aluminum or an aluminum alloy, or the like, which have good thermal conductivity. In the present embodiment, the heat sink is a heat radiation plate made of oxygen-free copper. A thickness of the heat sink <NUM> is set in a range of <NUM> or more and <NUM> or less.

Here, the insulating circuit board <NUM> and the heat sink <NUM> are bonded through the solder layer <NUM>. This solder layer <NUM> can have the same configuration as the above-mentioned solder layer <NUM>.

As shown in <FIG>, the insulating circuit board <NUM> of the present embodiment includes the metal substrate <NUM>, the insulating resin layer <NUM> formed on one surface (upper surface shown in <FIG>) of the metal substrate <NUM>, and the circuit layer <NUM> formed on one surface (upper surface shown in <FIG>) of the insulating resin layer <NUM>.

The metal substrate <NUM> has an action of improving a heat dissipating feature by spreading heat generated in the semiconductor element <NUM> mounted on the insulating circuit board <NUM> in a plane direction. Therefore, the metal substrate <NUM> is made of a metal having excellent thermal conductivity, for example, copper or a copper alloy, or aluminum or an aluminum alloy. In the present embodiment, the metal substrate <NUM> is made of a rolled plate composed of oxygen-free copper. A thickness of the metal substrate <NUM> is set in a range of <NUM> or more and <NUM> or less and is set to <NUM> in the present embodiment.

The insulating resin layer <NUM> prevents electrical connection between the circuit layer <NUM> and the metal substrate <NUM> and is made of a thermosetting resin with insulation properties.

In the present embodiment, a thermosetting resin containing a filler is used to ensure the strength of the insulating resin layer <NUM> and to ensure the thermal conductivity. Here, as the filler, for example, alumina, boron nitride, aluminum nitride, or the like can be used. In addition, as the thermosetting resin, an epoxy resin, a polyimide resin, or the like can be used. In the present embodiment, the insulating resin layer <NUM> is made of an epoxy resin containing alumina as a filler. A thickness of the insulating resin layer <NUM> is in a range of <NUM> or more and <NUM> or less and is <NUM> in the present embodiment.

As shown in <FIG>, the circuit layer <NUM> is formed such that the metal plate <NUM> made of a metal having excellent conductivity is bonded to one surface (upper surface shown in <FIG>) of the insulating resin layer <NUM>. As the metal plate <NUM>, a rolled plate made of a material such as copper or a copper alloy, aluminum or an aluminum alloy can be used. In the present embodiment, a rolled plate made of oxygen-free copper is used as the metal plate <NUM> constituting the circuit layer <NUM>.

In the circuit layer <NUM>, a circuit pattern is formed, and one surface (upper surface shown in <FIG>) thereof is a mounting surface on which the semiconductor element <NUM> is mounted. Here, a thickness of the circuit layer <NUM> (metal plate <NUM>) is set in a range of <NUM> or more and <NUM> or less and is set to <NUM> in the present embodiment.

In the insulating circuit board <NUM> of the present embodiment, a bonded interface between the insulating resin layer <NUM> and the circuit layer <NUM> (metal substrate <NUM>) has an uneven shape including a protrusion <NUM> in which the circuit layer <NUM> (metal substrate <NUM>) protrudes toward the insulating resin layer <NUM> side and a recess <NUM> in which the circuit layer <NUM> (metal substrate <NUM>) retracts from the insulating resin layer <NUM> side.

That is, in the present embodiment, the circuit layer <NUM> (metal substrate <NUM>) intrudes into the insulating resin layer <NUM>.

Here, in the present embodiment, at least one of a kurtosis Rku of contour curve at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) and a kurtosis Sku of contour surface at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) is in a range of <NUM> or more and <NUM> or less.

In addition, an overhang rate that indicates a length ratio of regions overlapping in a lamination direction in a direction along the bonded interface is <NUM>% or more.

In the present embodiment, at least one of the root mean square deviation Rq of contour curve at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) and the root mean square deviation Sq of contour surface at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) is preferably in a range of <NUM> or more and <NUM> or less.

Hereinafter, regarding the insulating circuit board <NUM> of the present embodiment, the reason why the kurtosis of assessed profile Rku at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>), the kurtosis of scale-limited surface Sku at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>), the overhang rate that indicates a length ratio of regions overlapping in the lamination direction in the direction along the bonded interface, the root mean square deviation of assessed profile Rq at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>), and the root mean square deviation of scale-limited surface Sq at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) are defined as mentioned above will be described.

The kurtosis of assessed profile Rku is a parameter defined in JIS B <NUM>:<NUM>, the kurtosis of scale-limited surface Sku is a parameter defined in JIS B <NUM>-<NUM>:<NUM>, and each of the parameters is obtained by evaluating kurtosis that is a measure of surface sharpness.

The kurtosis of assessed profile Rku is Rku = <NUM> in the shape of the normal distribution, Rku > <NUM> in a case where the height distribution is sharper than the normal distribution, and Rku < <NUM> in a case where the height distribution is crushed as compared with the normal distribution.

In addition, the Kurtosis of scale-limited surface Sku is a parameter in which the kurtosis of assessed profile Rku extends to three dimensions.

Here, in a case where both the kurtosis of assessed profile Rku and the kurtosis of scale-limited surface Sku at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) are less than <NUM>, the surface of the circuit layer <NUM> (the tip of the protrusion <NUM>) is shaped in a crushed state, so that the circuit layer <NUM> (metal substrate <NUM>) may not sufficiently intrude into the insulating resin layer <NUM> side, and the adhesion between the insulating resin layer <NUM> and the circuit layer <NUM> (metal substrate <NUM>) may not be improved. On the other hand, in a case where both the kurtosis of assessed profile Rku and the kurtosis of scale-limited surface Sku at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) are more than <NUM>, the surface of the circuit layer <NUM> (the tip of the protrusion <NUM>) is sharper than necessary, so that electric field concentration is generated at the tip of the protrusion <NUM>, and insulation properties (insulating withstand voltage) of the insulating resin layer <NUM> may not be ensured.

Therefore, in the present embodiment, at least one of the kurtosis Rku of contour curve at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) and a kurtosis Sku of contour surface at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) is set to be in the range of <NUM> or more and <NUM> or less.

At least one of the kurtosis Rku of contour curve at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) and the kurtosis Sku of contour surface at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) is preferably <NUM> or more, and still more preferably <NUM> or more. On the other hand, at least one of the kurtosis Rku of contour curve at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) and the kurtosis Sku of contour surface at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) is preferably <NUM> or less, and still more preferably <NUM> or less.

The overhang rate in the present embodiment is obtained in such a manner that the cross-sectional shape of the bonded interface is image-analyzed with image processing software, regions overlapping in a lamination direction (height direction: Y direction) in a direction along the bonded interface (horizontal direction: X direction) with respect to the obtained cross-sectional curve are defined as overhang portions, which is defined as a ratio of lengths of the overhang portions in the X direction to all of the length of the obtained cross-sectional curve in the X direction.

In a case of counting the lengths of the overhang portions in the X direction, for example, it is counted as <NUM> in a case where there is no overhang portion in the Y direction, it is counted as <NUM> in a case where there is one overhang portion in the Y direction, and it is counted as <NUM> in a case where there are two overhang portions in the Y direction, and it is counted as the plural number in a case where there are a plurality of the overhang portions. Therefore, the overhang rate may be <NUM>% or more.

Here, in a case where the overhang rate that indicates the length ratio of regions overlapping in the lamination direction in the direction along the bonded interface is less than <NUM>%, the circuit layer <NUM> (metal substrate <NUM>) and the insulating resin layer <NUM> are not sufficiently engaged, and the adhesion between the insulating resin layer <NUM> and the circuit layer <NUM> (metal substrate <NUM>) may not be improved.

Therefore, in the present embodiment, the overhang rate that indicates the length ratio of regions overlapping in the lamination direction in the direction along the bonded interface is defined as <NUM>% or more.

The above-mentioned overhang rate is preferably <NUM>% or more, and still more preferably <NUM>% or more. On the other hand, the overhang rate is not particularly limited, but is preferably <NUM>% or less.

The root mean square deviation of assessed profile Rq is a parameter specified in JIS B <NUM>: <NUM>, and the root mean square deviation of scale-limited surface Sq is a parameter specified in JIS B <NUM>-<NUM>:<NUM>, each of which means the standard deviation of the surface roughness.

In the insulating circuit board <NUM> of the present embodiment, the circuit layer <NUM> (metal substrate <NUM>) sufficiently intrudes into the insulating resin layer <NUM> side by setting at least one of the root mean square deviation Rq of contour curve at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) and the root mean square deviation Sq of contour surface at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) to <NUM> or more, so that the adhesion between the insulating resin layer <NUM> and the circuit layer <NUM> (metal substrate <NUM>) can be surely improved. On the other hand, the generation of electric field concentration at the tip of the protrusion <NUM>, which is formed by the circuit layer <NUM> (metal substrate <NUM>) intruding inside the insulating resin layer <NUM>, can be suppressed by setting at least one of the root mean square deviation Rq of contour curve at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) and the root mean square deviation Sq of contour surface at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) to <NUM> or less, so that the insulation properties of the insulating resin layer <NUM> can be surely ensured.

Therefore, in the insulating circuit board <NUM> of the present embodiment, at least one of the root mean square deviation Rq of contour curve at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) and the root mean square deviation Sq of contour surface at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) is preferably in the range of <NUM> or more and <NUM> or less.

At least one of the root mean square deviation Rq of contour curve at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) and the root mean square deviation Sq of contour surface at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) is preferably <NUM> or more, and still more preferably <NUM> or more. By contrast, at least one of the root mean square deviation Rq of contour curve at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) and the root mean square deviation Sq of contour surface at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) is preferably <NUM> or less, and still more preferably <NUM> or less.

Next, a method for manufacturing the insulating circuit board <NUM> according to the present embodiment will be described with reference to <FIG>.

First, a roughened plating layer 23a is formed on a bonding surface between the metal plate <NUM> serving as the circuit layer <NUM> and the insulating resin layer <NUM>, and a roughened plating layer 11a is formed on a bonding surface between the metal substrate <NUM> and the insulating resin layer <NUM>. As a result, uneven portions are formed on the bonding surface between the metal plate <NUM> serving as the circuit layer <NUM> and the insulating resin layer <NUM> and the bonding surface between the metal substrate <NUM> and the insulating resin layer <NUM>. The roughened plating layers 23a and 11a are formed as follows.

Electrolytic plating treatment is carried out on the bonding surfaces between the metal plate <NUM> and the metal substrate <NUM>. In the present embodiment, it is preferable to use an electrolytic solution consisting of an aqueous solution that is obtained by adding <NUM>,<NUM>'-dithiobis(<NUM>-propane sulfonic acid)<NUM> sodium into a copper sulfate bath containing copper sulfate (CuSO<NUM>) and sulfuric acid (H<NUM>SO<NUM>) as main components, as an electrolytic plating solution. A temperature of the plating bath is preferably in a range of, for example, <NUM> or higher and <NUM> or lower.

As the electrolytic plating treatment, a periodic reverse (PR) pulse plating treatment is used. This PR pulse plating treatment is a method of performing electrolytic plating by energization while periodically reversing a direction of electric current. For example, positive electrolysis (anodic electrolysis in which the metal plate <NUM> and the metal substrate <NUM> serve as an anode) of <NUM> A/dm<NUM> or more and <NUM> A/dm<NUM> or less is set to <NUM> or more and <NUM> or less, and negative electrolysis (cathode electrolysis in which the metal plate <NUM> and the metal substrate <NUM> serve as a cathode) of <NUM> A/dm<NUM> or more and <NUM> A/dm<NUM> or less is set to <NUM> or more and <NUM> or less, which is repeated. As a result, the melting of the surfaces of the metal plate <NUM> and the metal substrate <NUM> and the precipitation of copper are repeatedly carried out, thereby forming the roughened plating layers 23a and 11a.

Here, it is possible to adjust the kurtosis of assessed profile Rku, the kurtosis of scale-limited surface Sku, the overhang rate, the root mean square deviation of assessed profile Rq, and the root mean square deviation of scale-limited surface Sq at the bonding surface between the metal plate <NUM> and the metal substrate <NUM> based on surface properties of the metal plate <NUM> and the metal substrate <NUM> before forming the roughened plating layers 23a and 11a, and various plating conditions (pulse application time, pulse waveform (ratio of precipitation amount/melting amount), and pulse frequency).

For example, in a case where the pulse application time is lengthened, the kurtosis of assessed profile Rku and the kurtosis of scale-limited surface Sku each are close to <NUM>, the overhang rate increases, and the root mean square deviation of assessed profile Rq and the root mean square deviation of scale-limited surface Sq increase.

In addition, in a case where, as a pulse waveform, the ratio of precipitation amount/melting amount is increased, the kurtosis of assessed profile Rku and the kurtosis of scale-limited surface Sku each increase, the overhang rate decreases, and the root mean square deviation of assessed profile Rq and the root mean square deviation of scale-limited surface Sq decrease.

Furthermore, in a case where the pulse frequency is increased, the kurtosis of assessed profile Rku and the kurtosis of scale-limited surface Sku each are close to <NUM>, the overhang rate decreases, and the root mean square deviation of assessed profile Rq and the root mean square deviation of scale-limited surface Sq decrease.

Here, <FIG> shows a cross-sectional photograph of the metal plate <NUM> (metal substrate <NUM>) before the surface roughening step S01 is carried out, and <FIG> shows a cross-sectional photograph of the metal plate <NUM> (metal substrate <NUM>) after the surface roughening step S01 is carried out.

It is confirmed that the uneven portion is formed on the bonding surface of the metal plate <NUM> (metal substrate <NUM>) by carrying out the surface roughening step S01 of the present embodiment, and the overhang portion is formed.

Next, a resin composition <NUM> containing alumina as a filler, an epoxy resin as a thermosetting resin, and a curing agent is arranged on one surface (upper surface shown in <FIG>) of the metal substrate <NUM>. In the present embodiment, the resin composition <NUM> is formed in a sheet shape.

The metal plate <NUM> serving as the circuit layer <NUM> is arranged on one surface (upper surface shown in <FIG>) of the resin composition <NUM>.

Next, the metal substrate <NUM>, the resin composition <NUM>, and the metal plate <NUM>, which have been laminated, are pressurized and heated in a lamination direction, the resin composition <NUM> is cured to form the insulating resin layer <NUM>, thereby bonding the metal substrate <NUM> and the insulating resin layer <NUM> to each other and bonding the insulating resin layer <NUM> and the metal plate <NUM> to each other.

In this thermocompression bonding step S03, conditions in which a heating temperature is wthin a range of <NUM> or higher and <NUM> or lower, a holding time at the heating temperature is wthin a range of <NUM> minutes or longer and <NUM> minutes or shorter, and a pressurizing pressure in the lamination direction is in a range of <NUM> MPa or more and <NUM> MPa or less are preferably employed.

Next, the metal plate <NUM> bonded to the insulating resin layer <NUM> is subjected to etching treatment to form a circuit pattern, thereby forming the circuit layer <NUM>.

As described above, the insulating circuit board <NUM> according to the present embodiment is manufactured.

Next, the heat sink <NUM> is bonded to the other surface of the metal substrate <NUM> of the insulating circuit board <NUM>. In the present embodiment, the metal substrate <NUM> and the heat sink <NUM> are bonded through a solder material.

The semiconductor element <NUM> is bonded to the circuit layer <NUM> of the insulating circuit board <NUM>. In the present embodiment, the circuit layer <NUM> and the semiconductor element <NUM> are bonded through a solder material.

The power module <NUM> shown in <FIG> is manufactured by the above-mentioned steps.

According to the insulating circuit board <NUM> (bonded body) of the present embodiment, since the bonded interface between the insulating resin layer <NUM> and the circuit layer <NUM> (metal substrate <NUM>) has an uneven shape including the protrusion <NUM> in which the circuit layer <NUM> (metal substrate <NUM>) protrudes toward the insulating resin layer <NUM> side and the recess <NUM> in which the circuit layer <NUM> (metal substrate <NUM>) retracts from the insulating resin layer <NUM> side, and at least one of the kurtosis Rku of contour curve at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) and the kurtosis Sku of contour surface at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) is set to <NUM> or more, the circuit layer <NUM> (metal substrate <NUM>) sufficiently intrudes into the insulating resin layer <NUM> side, so that the adhesion between the insulating resin layer <NUM> and the circuit layer <NUM> (metal substrate <NUM>) can be improved. In addition, since at least one of the kurtosis Rku of contour curve at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) and the kurtosis Sku of contour surface at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) is set to <NUM> or less, the tip of the protrusion <NUM> is not sharpened more than necessary, and the insulation properties (insulating withstand voltage) of the insulating resin portion layer can be sufficiently ensured.

Furthermore, since the overhang rate indicating the length ratio of regions overlapping in the lamination direction in the direction along the bonded interface is <NUM>% or more, the circuit layer <NUM> (metal substrate <NUM>) and the insulating resin layer <NUM> are sufficiently engaged, and the adhesion between the circuit layer <NUM> (metal substrate <NUM>) and the insulating resin layer <NUM> can be improved.

Here, in the insulating circuit board <NUM> (bonded body) of the present embodiment, in a case where at least one of the root mean square deviation Rq of contour curve at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) and the root mean square deviation Sq of contour surface at the bonded interface of the circuit layer <NUM> (metal substrate <NUM>) is in the range of <NUM> or more and <NUM> or less, it is possible to suppress the generation of electric field concentration at the tip of the protrusion <NUM>, surely ensure the insulation properties in the insulating resin layer <NUM>, and surely improve the adhesion between the circuit layer <NUM> (metal substrate <NUM>) and the insulating resin layer <NUM>.

In the present embodiment, the insulating circuit board is manufactured by the method for manufacturing the insulating circuit board shown in <FIG>, but the present invention is not limited thereto.

In the present embodiment, the metal plate for forming the metal substrate and the circuit layer is described as being composed of oxygen-free copper, but the metal plate is not limited thereto, and may be made of another metal composed of copper or a copper alloy or may be made of another metal such as aluminum or an aluminum alloy. Furthermore, a structure in which a plurality of metals are laminated may be adopted.

Furthermore, in the present embodiment, the configuration of the power module in which the semiconductor element is mounted on the insulating circuit board is described, but the present invention is not limited thereto. For example, a configuration of an LED module in which a LED element is mounted on the circuit layer of the insulating circuit board may be adopted, or a configuration of a thermoelectric module in which a thermoelectric element is mounted on the circuit layer of the insulating circuit board may be adopted.

The results of a confirmation experiment conducted to confirm the effect of the present invention will be described below.

A metal substrate (<NUM> × <NUM> × thickness of <NUM>) formed of a rolled plate made of oxygen-free copper and a metal plate serving as the circuit layer (<NUM> × <NUM> × thickness of <NUM>) were prepared, and a roughened plating layer was formed on a bonding surface between these metal substrate and insulating resin layer of the metal plate by the PR pulse electrolysis method described in the above-mentioned embodiment.

Then, a sheet material (<NUM> × <NUM> × thickness of <NUM>) composed of a resin composition containing an epoxy resin containing Al<NUM>O<NUM> as a filler was disposed on a surface on which the roughened plating layer of the metal substrate was formed.

In addition, the metal plate serving as the circuit layer was laminated on one surface of the sheet material composed of this resin composition so that the surface on which the roughened plating layer was formed faced the sheet material side of the resin composition.

The metal substrate laminated as described above, the sheet material composed of the resin composition, and the metal plate were heated while being pressurized in the lamination direction, the resin composition was cured to form an insulating resin layer, and the metal substrate and the insulating resin layer were bonded to each other, and the insulating resin layer and the metal plate were bonded to each other, thereby obtaining an insulating circuit board. A pressurizing pressure in the lamination direction was <NUM> MPa, a heating temperature was <NUM>, and a holding time at the heating temperature was <NUM> minutes.

The following items were evaluated for the obtained insulating circuit board as described above.

The bonded interface between the circuit layer and the insulating resin layer was observed by using a laser microscope OLS5000 with an objective lens with a magnification of <NUM> times in a measurement range of <NUM> × <NUM>, the sample tilt and noise were removed, and a kurtosis of scale-limited surface Sku at the bonded interface and a root mean square deviation of scale-limited surface Sq at the bonded interface were calculated.

Next, a kurtosis of assessed profile Rku at the bonded interface and a root mean square deviation of scale-limited surface Rq at the bonded interface were calculated in the direction in which the roughness was considered to be the coarsest. At least three or more points were measured in the measurement range, and an average value thereof was described in Table.

The insulating circuit board was cut along the diagonal direction and along the lamination direction, and the cross-section of the bonded interface between the circuit layer and the insulating resin layer was observed to obtain a SIM image (<NUM> pixels = <NUM>) at a magnification of <NUM>,<NUM> times. This SIM image was binarized by using image analysis software ImageJ, noise was manually removed, and an outline was then extracted.

The outline-extracted cross-sectional curvilinear coordinates were output in csv, and the number of overlapping metal regions in the Y direction was counted for a length of <NUM> pixels in the X direction. In addition, pixels extending in the Y direction(pixels adjacent to the Y direction) were excluded so that the vertical lines would not be counted in duplicate. Then, the number of overlapping regions on each position of an X-axis was divided by the total X-coordinate length to obtain an overhang rate.

A measurement example is shown in <FIG>. In the cross-sectional curve shown in <FIG>, the number of overlapping regions in the Y direction for each position of the X-axis is <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, in order from the left, the total of these is <NUM>, and the number of pixels in the X direction is <NUM>. As a result, the overhang rate is <NUM>/<NUM> × <NUM>, which is <NUM>%.

The above-mentioned insulating circuit board was placed in a constant temperature and humidity chamber (temperature of <NUM>, humidity of <NUM>%) and held for <NUM> days. Thereafter, the insulating circuit board was charged into a heating furnace and reflowed at <NUM> for <NUM> minutes.

In the insulating circuit board after carrying out the reflow treatment, a bonding rate between the circuit layer and the insulating resin layer and a dielectric breakdown voltage were evaluated as follows.

The bonding rate between the circuit layer and the insulating resin layer was evaluated by using an ultrasonic flaw detector (FineSAT200 manufactured by Hitachi Power Solutions Co. ) and calculated from the following Equation. Here, an initial bonding area is an area to be bonded before bonding. Since the peeling is shown by the white part in the bonding part in the image obtained by binarizing ultrasonic-detected image, the area of this white part is defined as an exfoliation area.

As shown in <FIG>, the metal substrate <NUM> was placed on a base plate <NUM>, a probe <NUM> was brought into contact with the circuit layer <NUM>, and the partial discharge was evaluated. A partial discharge tester manufactured by MITSUBISHI CABLE INDUSTRIES, LTD. was used as a measuring device. A test atmosphere was Fluorinert (tm) FC-<NUM> manufactured by <NUM>.

Then, a voltage was boosted by a step profile (holding time for <NUM> seconds) every <NUM> kV, and a voltage at which the dielectric breakdown occurred (the voltage at which the leakage current was <NUM> mA or higher) was defined as the dielectric breakdown voltage.

In Comparative Example <NUM> in which the kurtosis of assessed profile Rku at the bonded interface of the circuit layer was <NUM> and the kurtosis of scale-limited surface Sku at the bonded interface of the circuit layer was <NUM>, the bonding rate after the moisture absorption reflow was as low as <NUM>%, and the adhesion between the circuit layer and the insulating resin layer was insufficient.

In Comparative Example <NUM> in which the kurtosis of assessed profile Rku at the bonded interface of the circuit layer was <NUM> and the kurtosis of scale-limited surface Sku at the bonded interface of the circuit layer was <NUM>, the dielectric breakdown voltage after the moisture absorption reflow was as low as <NUM> V, and the insulation properties was insufficient.

In Comparative Example <NUM> in which the overhang rate was <NUM>%, the bonding rate after the moisture absorption reflow was as low as <NUM>%, and the adhesion between the circuit layer and the insulating resin layer was insufficient.

On the other hand, in Examples <NUM> to <NUM> of the present invention, in which at least one of the kurtosis Rku of contour curve at the bonded interface of the circuit layer and the kurtosis Sku of contour surface at the bonded interface of the circuit layer was in the range of <NUM> or more and <NUM> or less, and the overhang rate is <NUM>% or more, the bonding rate after the moisture absorption reflow was <NUM>% or more, and the adhesion between the circuit layer and the insulating resin layer was excellent. In addition, the dielectric breakdown voltage after the moisture absorption reflow was <NUM> V or more, and the insulating resin layer was excellent in insulation properties. In each of Examples <NUM> to <NUM> of the present invention, at least one of the root mean square deviation Rq of contour curve at the bonded interface of the circuit layer and the root mean square deviation Sq of contour surface at the bonded interface of the circuit layer was in the range of <NUM> or more and <NUM> or less. In addition, in each of Examples <NUM> to <NUM> of the present invention, since both the kurtosis of assessed profile Rku at the bonded interface of the circuit layer and the kurtosis of scale-limited surface Sku at the bonded interface of the circuit layer werewthin the range of <NUM> or more and <NUM> or less, the adhesion between the circuit layer and the insulating resin layer was particularly excellent.

Furthermore, in each of Examples <NUM> to <NUM>, and <NUM> of the present invention, in which both the root mean square deviation of assessed profile Rq at the bonded interface of the circuit layer and the root mean square deviation of scale-limited surface Sq at the bonded interface of the circuit layer were in the range of <NUM> or more and <NUM> or less, the bonding rate after the moisture absorption reflow was <NUM>% or more, and the adhesion between the circuit layer and the insulating resin layer was particularly excellent.

Claim 1:
A bonded body having a structure in which an insulating resin member <NUM> made of
an insulating resin and a metal <NUM> part made of a metal are bonded, wherein a bonded interface between the insulating resin member <NUM> and the metal part <NUM> has an uneven shape including a protrusion <NUM> in which the metal part <NUM> protrudes toward
an insulating resin member side and a recess <NUM> in which the metal part <NUM> retracts from the insulating resin member side,
at least one of a kurtosis Rku of contour curve at the bonded interface of the metal part <NUM> and a kurtosis Sku of contour surface at the bonded interface of the metal part <NUM> is in a range of <NUM> or more and <NUM> or less, and
an overhang rate that indicates a length ratio of regions overlapping in a lamination direction in a direction along the bonded interface is <NUM>% or more.