Patent Description:
A display device may include a display area displaying an image. The display device may have a wide viewing angle, and accordingly, the image displayed on the display area may be viewable from various angles.

When the display device having the wide viewing angle is used in a public place, privacy of an image being displayed may also be viewable from the various angles.

<CIT> discloses a method of manufacturing a display device with low power consumption.

<CIT> discloses a display device configured to be transparent and thin.

<CIT> disclose a transparent display device configured to improve a bright room contrast ratio.

<CIT> discloses a display device comprising an encapsulation layer than encapsulates a light emitting element.

<CIT> discloses a thin display device having a plurality of display units.

<CIT> discloses a display device configured to be switchable between public and private viewing modes via an external input.

<CIT> discloses a light beam direction control device and a driving method for a light beam direction control element.

When a display device having the wide viewing angle is used in a public place, privacy of an image being displayed may be exposed, owing to the image being viewable from various angles. Accordingly, to protect privacy of an image displayed by a display device, an improved display device is desired in which a wide viewing angle mode in which the image is displayed in a wide viewing angle, and a narrow viewing angle mode in which the image is displayed in a narrow viewing angle, are variously selectable.

Embodiments provide a display device which is selectively drivable in a wide viewing angle mode or a narrow viewing angle mode.

According to an aspect of the invention there is provided a display device according to claim <NUM> and claim <NUM>.

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention together with the description.

The invention now will be described more fully hereinafter with reference to the accompanying drawings, in which various embodiments are shown. This invention may, however, be embodied in many different forms, and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

As used herein, a reference number may indicate a singular element or a plurality of the element. For example, a reference number labeling a singular form of an element within the drawing figures may be used to reference a plurality of the singular element within the text of specification.

It will be understood that when an element is referred to as being related to another element such as being "on" another element, it can be directly on the other element or intervening elements may be present therebetween. In contrast, when an element is referred to as being related to an element such as being "directly on" another element, there are no intervening elements present.

Illustrative, non-limiting embodiments will be more clearly understood from the following detailed description in conjunction with the accompanying drawings.

<FIG> and <FIG> are plan views illustrating a display area DA of a display device according to an embodiment. The display area DA may extend along a plane defined by a first direction D1 and a second direction D2 crossing each other. A thickness direction of components or layers of the display device may be extended along a third direction crossing the first direction D1 and the second direction D2.

Referring to <FIG>, a plurality of pixels may be disposed in a display area DA. The plurality of pixels may include a first pixel PXR, a second pixel PRG, and a third pixel PXB. The first pixel PXR may be a pixel emitting red light, the second pixel PXG may be a pixel emitting green light, and the third pixel PXB may be a pixel emitting blue light. The plurality of pixels may be arranged in a first direction D1 and a second direction D2 crossing the first direction D1. A plurality of pixels may be disposed within a pixel area PXA.

Each of the plurality of pixels may include a first emitting area (e.g., first light emitting area) and a second emitting area (e.g., a second light emitting area). For example, the first pixel PXR may include first and second emitting areas R1 and R2, the second pixel PXG may include first and second emitting areas G1 and G2, and the third pixel PXB may include first and second emitting areas B1 and B2.

The first emitting area is an area emitting light having a relatively narrow viewing angle, that is, a planar area at which light having the relatively narrow viewing angle is emitted. In an embodiment, a first barrier pattern <NUM> having a plurality of patterns arranged in (or along) the first direction D1, and extending in the second direction D2, may be disposed in the first emitting area. The first barrier pattern <NUM> may limit a viewing angle of light emitted from the first emitting area in the first direction D1. That is, respective patterns of the first barrier pattern <NUM> may limit a viewing angle of light emitted in a same direction in which the patterns are arranged. The second emitting area is an area emitting light having a relatively wide viewing angle.

In an embodiment, when a display device is driven in a narrow viewing angle mode, light may be emitted from the first emitting area having the narrow viewing angle, and light may not be emitted from the second emitting area having the wide viewing angle which is wider than the narrow viewing angle along a same direction.

In an embodiment, when the display device is driven in a wide viewing angle mode, light may not be emitted from the first emitting area having the narrow viewing angle, and light may be emitted from the second emitting area having the wide viewing angle which is wider than the narrow viewing angle. In an embodiment, when the display device is driven in the wide viewing angle mode having the wide viewing angle which is wider than the narrow viewing angle, light may be emitted from each of the first emitting area and the second emitting area having the narrow viewing angle.

Referring to <FIG>, components disposed in a display area DA shown in <FIG> may be substantially same as the components disposed in the display area DA shown in <FIG>, except for shape of the first barrier pattern <NUM> disposed in the first emitting area.

For example, as shown in <FIG>, the first barrier pattern <NUM> may include a plurality of patterns arranged and extended in directions different from each other. The first barrier pattern <NUM> may include a vertical barrier pattern provided in plural arranged in the first direction D1 and extending in the second direction D2, and a horizontal barrier pattern provided in plural arranged in the second direction D2 and extending in the first direction D1. Accordingly, the first barrier pattern <NUM> may limit a viewing angle of light emitted from the first emitting area in both the first direction D1 and the second direction D2.

Planar shape of the first barrier pattern <NUM> in embodiments is not limited to the planar shapes of the first barrier pattern <NUM> illustrated in <FIG> and <FIG>. The first barrier pattern <NUM> may have any planar shape capable of limiting a viewing angle of light emitted from the first emitting area. For example, the first barrier pattern <NUM> may have circular or polygonal planar shape.

<FIG> is a cross-sectional view of a structure of a pixel included in the display device according to an embodiment. <FIG> is a cross-sectional view of a display device along line I-I' of <FIG>.

Referring to <FIG>, the first pixel PXR may include a backlight unit BLU, a first base substrate BS1, a first polarization layer POL1, a first insulation layer IL1, a second insulation layer IL2, a liquid crystal layer LC, a first buffer layer BUF, a second polarization layer POL2, a second buffer layer BUF2, a second base substrate BS2, a third insulation layer IL3, a fourth insulation layer IL4, a fifth insulation layer IL5, a pixel defining layer PDL, a light emitting layer EL, an encapsulation layer EN, a color filter layer CF, a first active layer ATV1, a first gate electrode GE1, a first source-drain electrode SDE1, a first electrode E1, a second electrode E2, a second active layer ATV2, a second gate electrode GE2, a second source-drain electrode SDE2, a third electrode E3, a fourth electrode E4, and a first barrier pattern layer <NUM>.

The backlight unit BLU may include a material which emits light. For example, the backlight unit BLU may include a light emitting diode (LED). The backlight unit BLU may emit light in a direction toward the liquid crystal layer LC, e.g., a light emitting direction. The backlight unit BLU may emit light and provide the light to the liquid crystal layer LC.

The first base substrate BS1 may be disposed on the backlight unit BLU. The first base substrate BS1 may include a transparent material through which light emitting from the backlight unit BLU passes in the light emitting direction. For example, the first base substrate BS1 may include glass, plastic, etc..

The first polarization layer POL1 may be disposed on the first base substrate BS1. The first polarization layer POL1 may polarize light emitted from the backlight unit BLU.

The first gate electrode GE1 may be disposed on the first polarization layer POL1. The first gate electrode GE1 may include a conductive material.

The first insulation layer IL1 may be disposed on the first polarization layer POL1. The first insulation layer IL1 may cover the first gate electrode GE1.

The first active layer ATV1 may be disposed on the first insulation layer IL1. The first active layer ATV1 may include semiconductor material.

The first source-drain electrode SDE1 may be disposed on the first active layer ATV1. The first source-drain electrode SDE1 may electrically contact at least a portion of the first active layer ATV1. The first gate electrode GE1, the first active layer ATV1, and the first source-drain electrode SDE1 may define a first driving transistor.

The second insulation layer IL2 may be disposed on the first insulation layer IL1. The second insulation layer IL2 may cover the first active layer ATV1 and the first source-drain electrode SDE1.

The first electrode E1 may be disposed on the second insulation layer IL2. The first electrode E1 may electrically contact the first source-drain electrode SDE1, that is, may be electrically connected to the first driving transistor at the first source-drain electrode SDE1. At least a portion of the first electrode E1 may overlap (or correspond to) the first emitting area R1, along the thickness direction of the display device. In an embodiment, the first electrode E1 may not overlap the second emitting area R2. As not overlapping, elements may be adjacent to each other or spaced apart from each other along a planar direction (e.g., along the plane defined by the first direction D1 and the second direction D2 crossing each other, along an underlying layer such as a substrate or insulating layer like the first base substrate BS1, the first insulation layer IL1, etc..

The liquid crystal layer LC may be disposed on the first electrode E1. The liquid crystal layer LC may change a phase of light passing through the layer, according to electrical signals of the first electrode E1 and the second electrode E2 facing each other with the liquid crystal layer LC therebetween.

The second electrode E2 may be disposed on the liquid crystal layer LC. At least a portion of the second electrode E2 may overlap the first emitting area R1. In an embodiment, the second electrode E2 may not overlap the second emitting area R2. A collection of layers including the first electrode E1, the second electrode E2 facing the first electrode E1 and the liquid crystal layer LC between the first electrode E1 and the second electrode E2 which face each other, may define a first light emitting element. Alternatively, the backlight unit BLU with or without the collection of layers of the first electrode E1, the second electrode E2 and the liquid crystal layer LC, may define the first light emitting element.

The first buffer layer BUF may be disposed on the liquid crystal layer LC. The first buffer layer BUF may cover the second electrode E2. The first buffer layer BUF may include an inorganic insulation material.

The second polarization layer POL2 may be disposed on the first buffer layer BUF. The second polarization layer POL2 may selectively transmit light having a specific phase among light passing through the liquid crystal layer LC.

The second buffer layer BUF2 may be disposed on the second polarization layer POL2. The second buffer layer BUF2 may include an inorganic insulation material.

The second base substrate BS2 may be disposed on the second buffer layer BUF2. The second base substrate BS2 may include a transparent material. For example, the second base substrate BS2 may include glass, plastic, etc..

The second active layer ATV2 may be disposed on the second base substrate BS2. The second active layer ATV2 may include semiconductor material.

The third insulation layer IL3 may be disposed on the second base substrate BS2. The third insulation layer IL3 may cover the second active layer ATV2.

The second gate electrode GE2 may be disposed on the third insulation layer IL3. The second gate electrode GE2 may include a conductive material.

The fourth insulation layer IL4 may be disposed on the third insulation layer IL3. The fourth insulation layer IL4 may cover the second gate electrode GE2.

The second source-drain electrode SDE2 may be disposed on the fourth insulation layer IL4. The second source-drain electrode SDE2 may electrically contact at least a portion of the second active layer ATV2. The second active layer ATV2, the second gate electrode GE2, and the second source-drain electrode SDE2 may define a second driving transistor.

The fifth insulation layer IL5 may be disposed on the fourth insulation layer IL4. The fifth insulation layer IL5 may cover the second source-drain electrode SDE2.

The third electrode E3 may be disposed on the fifth insulation layer IL5. The third electrode E3 may electrically contact the second source-drain electrode SDE2.

The pixel defining layer PDL may be disposed on the fifth insulation layer IL5. The pixel defining layer PDL may define a first opening exposing at least a portion of the third electrode E3 to outside the pixel defining layer PDL. The first opening may overlap the second emitting area R2.

The light emitting layer EL may be disposed on the third electrode E3 in the first opening. The light emitting layer EL may also extend from inside the first opening to be disposed extended along a sidewall of the pixel defining layer PD and along an upper surface of the pixel defining layer PDL. The light emitting layer EL may be disposed to overlap the first emitting area R1 and the second emitting area R2. In an embodiment, the light emitting layer EL may include an organic light emitting material. In this case, the light emitting layer EL may further include at least one of electron injection layer, electron transport layer, hole injection layer, and a hole transport layer.

The fourth electrode E4 may be disposed on the light emitting layer EL. The fourth electrode E4 may define a second opening overlapping the first emitting area R1. A collection of layers including the third electrode E3, the fourth electrode E4 facing the third electrode E3, and the emitting layer EL between the third electrode E3, the fourth electrode E4 which face each other, may define a second light emitting element.

The encapsulation layer EN may be disposed on the fourth electrode E4. In an embodiment, the encapsulation layer EN may include a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer sequentially stacked.

The color filter layer CF may be disposed on the encapsulation layer EN. The color filter layer CF may selectively transmit light of a specific wavelength.

The first barrier pattern layer <NUM> may be disposed to overlap the first emitting area R1. The first barrier pattern layer <NUM> may be disposed between the second base substrate BS2 and the pixel defining layer PDL. For example, as shown in <FIG>, the first barrier pattern layer <NUM> may be disposed on the fourth insulation layer IL4 to penetrate the fifth insulation layer IL5. The first barrier pattern layer <NUM> together with a solid portion of the fifth insulation layer IL5 may together define a barrier pattern layer.

The first barrier pattern layer <NUM> may include the first barrier pattern <NUM>. Light emitted from the backlight unit BLU and passing through the liquid crystal layer LC may pass through the first barrier pattern <NUM> to have a relatively narrow viewing angle. Accordingly, an image having a narrow viewing angle may be displayed in (or at) the first emitting area R1.

<FIG> illustrates an embodiment which the first barrier pattern layer <NUM> penetrates the fifth insulation layer IL5 and is formed on the fourth insulation layer IL4, but embodiments the invention are not limited thereto. The first barrier pattern layer <NUM> may be disposed at various positions disposed between the pixel defining layer PDL and the second base substrate BS2 and overlapping the first emitting area R1. For example, the first barrier pattern layer <NUM> may penetrate the fourth insulation layer IL4 and/or the third insulation layer IL3 and may be disposed on the second base substrate BS2.

<FIG> is a cross-sectional view of enlarged area A of <FIG>.

Referring to <FIG>, the first barrier pattern layer <NUM> may include the first barrier pattern <NUM> and an organic layer OL.

The first barrier pattern <NUM> may be disposed substantially perpendicular to an upper surface of the fourth insulation layer IL4. The first barrier pattern <NUM> may include a light blocking material. For example, the first barrier pattern <NUM> may include an inorganic insulation material having a relatively large light absorption.

The organic layer OL may be disposed adjacent to patterns of the first barrier pattern <NUM>. The organic layer OL may include an organic material having a relatively large light transmittance.

Referring to <FIG> and <FIG>, the first barrier pattern <NUM> may include a plurality of barrier walls, to define a barrier wall pattern. Each of the barrier walls may be protruded from the upper surface of the fourth insulation layer IL4, such as being perpendicular thereto. Referring to <FIG> and <FIG>, taken with <FIG> (or <FIG>), each of the plurality of barrier walls within the barrier wall pattern may have a bar shape in a plan view (e.g., a planar shape). The bar shape may extend along the plane defined by the first and second directions D1 and D2 crossing each other, where a length of the bar shape extends along the first direction D1 and a width of the bar shape extends along the second direction D2.

In an embodiment, each of the barrier patterns (or barrier walls)j of the first barrier pattern <NUM> may include a lower barrier pattern <NUM> and an upper barrier pattern <NUM>, and the organic layer OL may include a first organic layer OL1, a second organic layer OL2, and a third organic layer OL3. The lower barrier pattern <NUM> and the upper barrier pattern <NUM> may each be provided in plural including a plurality of lower barrier patterns <NUM> corresponding to a plurality of upper barrier patterns <NUM>. A lower barrier pattern <NUM> and an upper barrier pattern <NUM> may together form a barrier wall. In an embodiment, a single one of the lower barrier pattern <NUM> or a single one of the upper barrier pattern <NUM> may form a barrier wall.

The first barrier pattern <NUM> may contact a side surface of the first organic layer OL1. As being in contact, elements may form an interface therebetween, without embodiments being limited thereto. In an embodiment, forming (or providing) the lower barrier pattern <NUM> may include forming the first organic layer OL1 on the fourth insulation layer IL4, forming a inorganic insulation material covering the fourth insulation layer IL4 and the first organic layer OL1, and etching the inorganic insulation material to provide a plurality of lower barrier patterns <NUM> spaced apart from each other along the fourth insulation layer IL4. In this case, in the etching the inorganic insulation material, a portion of the inorganic insulation material may be removed by anisotropic dry etching, and accordingly, a residue of the inorganic insulation material may form the lower barrier pattern <NUM>.

A portion of the upper barrier pattern <NUM> may be disposed on the lower barrier pattern <NUM>, and the upper barrier pattern <NUM> may contact a side surface of the second organic layer OL2. In an embodiment, after forming the lower barrier pattern <NUM>, forming the upper barrier pattern <NUM> may include forming the second organic layer OL2 on the fourth insulation layer IL4, forming an inorganic insulation material covering the fourth insulation layer IL4 and the second organic layer OL2, and etching the inorganic insulation material to provide a plurality of upper barrier patterns <NUM> spaced apart from each other along the fourth insulation layer IL4. In this case, in the etching the inorganic insulation material, a portion of the inorganic insulation material may be removed by anisotropic dry etching, and accordingly, a residue of the inorganic insulation material may form the upper barrier pattern <NUM>.

The third organic layer OL3 may be disposed on the first organic layer OL1. The third organic layer OL3 together with the first organic layer OL1 may together form an organic layer pattern between the plurality of barrier walls within the first barrier pattern <NUM>. In an embodiment, after forming the upper barrier pattern <NUM>, the third organic layer OL3 may be formed on the first organic layer OL1.

<FIG> shows an embodiment in which a barrier wall of the first barrier pattern <NUM> includes the lower barrier pattern <NUM> and the upper barrier pattern <NUM>, but embodiments of the invention are not limited thereto. For example, a barrier wall of the first barrier pattern <NUM> may include three barrier patterns sequentially stacked to be substantially perpendicular to the upper surface of the fourth insulation layer IL4.

<FIG> is a cross-sectional view illustrating an embodiment of a structure of a pixel included in the display device according to an embodiment. Description substantially same or similar to the description with reference to <FIG> may be omitted.

Referring to <FIG>, in the first emitting area R1, the light emitting layer EL may be omitted. Accordingly, light emitted from the backlight unit BLU and sequentially passing through the liquid crystal layer LC and the first barrier pattern layer <NUM> may not pass through the light emitting layer EL. That is, the pixel defining layer PDL may include a plurality of first openings. A first opening may expose the first barrier pattern layer <NUM> to outside the pixel defining layer PDL.

Referring to <FIG>, the pixel defining layer PDL may define a third opening overlapping the first emitting area R1. In this case, a second barrier pattern layer <NUM> may be disposed in the third opening. The second barrier layer <NUM> may include a second barrier pattern <NUM>. The second barrier pattern layer <NUM> and the second barrier pattern <NUM> may be substantially same as the first barrier pattern layer <NUM> and the first barrier pattern <NUM> described with reference to <FIG> and <FIG>. Accordingly, a viewing angle of light emitted from the backlight unit BLU and passing through the liquid crystal layer LC may be adjusted by the second barrier pattern <NUM>, and an image having a narrow viewing angle may be displayed in the first emitting area R1.

Referring to <FIG>, a third barrier pattern layer <NUM> may be disposed between the backlight unit BLU and the first base substrate BS1. The third barrier pattern layer <NUM> may include a third barrier pattern <NUM>. The third barrier pattern layer <NUM> may overlap the first emitting area R1. The third barrier pattern layer <NUM> and the third barrier pattern <NUM> may be substantially same as the first barrier pattern layer <NUM> and the first barrier pattern <NUM> described with reference to <FIG> and <FIG>. Accordingly, a viewing angle of light emitted from the backlight unit BLU and passing through the liquid crystal layer LC may be adjusted by the third barrier pattern <NUM>, and an image having a narrow viewing angle may be displayed in the first emitting area R1.

<FIG> is a plan view illustrating a display area DA' of a display device according to an embodiment.

Referring to <FIG>, a plurality of pixels may be disposed in a display area DA'. The plurality of pixels may include a first pixel PXR', a second pixel PXG', and a third pixel PXB'. The first pixel PXR' may be a pixel emitting red light, the second pixel PXG' may be a pixel emitting green light, and the third pixel PXB' may be a pixel emitting blue light. The plurality of pixels may be arranged in a first direction D1 and a second direction D2 crossing the first direction D1.

Each of the plurality of pixels may include a first emitting area and a second emitting area. For example, the first pixel PXR' may include first and second emitting areas R1' and R2', the second pixel PXG' may include first and second emitting areas G1 and G2', and the third pixel PXB' may include first and second emitting areas B1' and B2'.

The first emitting area is an area emitting light having a relatively narrow viewing angle. The second emitting area is an area emitting light having a relatively wide viewing angle.

In an embodiment, when a display device is driven in a narrow viewing angle mode, light may be emitted from the first emitting area, and light may not be emitted from the second emitting area.

In an embodiment, when the display device is driven in a wide viewing angle mode, light may not be emitted from the first emitting area, and light may be emitted from the second emitting area. In an embodiment, when the display device is driven in the wide viewing angle mode, light may be emitted from each of the first emitting area and the second emitting area.

<FIG> is a cross-sectional view illustrating an embodiment of a structure of a pixel included in the display device according to an embodiment. Description substantially same or similar to the description with reference to <FIG> may be omitted. <FIG> is a cross-sectional view of a display device along line II-II' of <FIG>.

Referring to <FIG>, the first pixel PXR' may include a backlight unit BLU', a first substrate BS1', a first polarization layer POL1', a first insulation layer IL1', a second insulation layer IL2', a liquid crystal layer LC', a first buffer layer BUF', a second polarization layer POL2', a second buffer layer BUF2', a second base substrate BS2', a third insulation layer IL3', a fourth insulation layer IL4', a fifth insulation layer IL5', a pixel defining layer PDL', a light emitting layer EL', an encapsulation layer EN', a color filter layer CF', a first active layer ATV1', a first gate electrode GE1', a first source-drain electrode SDE1', a first electrode E1', a second electrode E2', a second active layer ATV2', a second gate electrode GE2', a second source-drain electrode SDE2', a third electrode E3', and a fourth electrode E4'.

Light emitted from the backlight unit BLU' may have a light emitting direction of a straight light. The straight light may be light traveling in a direction substantially perpendicular to the first direction D1 (in <FIG> and <FIG>) and the second direction D2 (in <FIG> and <FIG>).

In this case, a middle substrate defined by the second buffer layer BUF2', the second base substrate BS2', the third insulation layer IL3', the fourth insulation layer IL4', and the fifth insulation layer IL5' together with each other, may define a groove GR overlapping the first emitting area R1'. Respective openings in the above layers may be aligned with each other to form the groove GR. In an embodiment, when the pixel defining layer PDL' defines a third opening overlapping the first emitting area R1', the third opening may overlap the groove GR. That is, the respective openings in the middle substrate and the pixel defining layer PDL may together define the groove GV.

The straight light emitted from the backlight unit BLU' may sequentially pass through the liquid crystal layer LC' and the middle substrate at the groove GR, to remain straight and be emitted as straight light at the first emitting area R1'. Accordingly, an image having a narrow viewing angle may be displayed in the first emitting area R1'. Since a portion of layers following the second polarization layer POL2', and between the encapsulation layer EN' and the second polarization layer POL2' is omitted to form the groove GV, light transmission is not inhibited at the groove GV, and the straight light may continue from the second polarization layer POL2' and through the encapsulation layer EN' to provide the narrow viewing angle at the first emitting area R1'.

<FIG> is a plan view illustrating a display area DA" of a display device according to an embodiment.

Referring to <FIG>, a plurality of pixels may be disposed in a display area DA". The plurality of pixels may include a first pixel PXR", a second pixel PRG", and a third pixel PXB''. The first pixel PXR", the second pixel PXG'', and a third pixel PXB'' may be substantially same as the first pixel PXR, the second pixel PXG, and a third pixel PXB described with reference to <FIG> and <FIG>.

Each of the plurality of pixels may include a first emitting area and a second emitting area. For example, the first pixel PXR'' may include first and second emitting areas R1" and R2", the second pixel PXG" may include first and second emitting areas G1" and G2", and the third pixel PXB" may include first and second emitting areas B1" and B2". A plurality of pixels may be disposed within a pixel area PXA".

The first emitting area is an area emitting light having a relatively narrow viewing angle. In an embodiment, a first barrier pattern <NUM>" may be disposed in the first emitting area. The first barrier pattern <NUM>" may be substantially same as the first barrier pattern <NUM> described with reference to <FIG>.

Planar shape of the first barrier pattern <NUM>" of embodiments is not limited to the planar shape of the first barrier pattern <NUM>" illustrated in <FIG>. The first barrier pattern <NUM>" may have any planar shape capable of limiting a viewing angle of light emitted from the first emitting area. For example, the first barrier pattern <NUM>" may have circular or polygonal planar shape.

<FIG> is a cross-sectional view illustrating an embodiment of a structure of a pixel included in the display device according to an embodiment. <FIG> is a cross-sectional view of a display device along line III-III' of <FIG>.

Referring to <FIG>, the first pixel PXR" may include a first base substrate BS1", a first insulation layer IL1", a second insulation layer IL2", a third insulation layer IL3", a first pixel defining layer PDL1", a first light emitting layer EL1", a first encapsulation layer EN1", a first buffer layer BUF", a light blocking layer LBL", a second base substrate BS2", a fourth insulation layer IL4", a fifth insulation layer IL5", a sixth insulation layer IL6", a second pixel defining layer PDL2", a second light emitting layer EL2", a second encapsulation layer EN2", a color filter layer CF", a first active layer ATV1", a first gate electrode GE1", a first source-drain electrode SDE1", a first electrode E1", a second electrode E2", a second active layer ATV2", a second gate electrode GE2", a second source-drain electrode SDE2", a third electrode E3", and a fourth electrode E4".

The first base substrate BS1" may include a transparent material. For example, the first base substrate BS1" may include glass, plastic, etc..

The first active layer ATV1" may be disposed on the first base substrate BS1". The first active layer ATV1" may include a semiconductor material.

The first insulation layer IL1" may be disposed on the first base substrate BS1". The first insulation layer IL1" may cover the first active layer ATV1".

The first gate electrode GE1" may be disposed on the first insulation layer IL1". The first gate electrode GE1" may include a conductive material.

The second insulation layer IL2" may be disposed on the first insulation layer IL1". The second insulation layer IL2" may cover the first gate electrode GE1".

The first source-drain electrode SDE1" may be disposed on the second insulation layer IL2". The first source-drain electrode SDE1" may electrically contact the first active layer ATV1". The first active layer ATV1", the first gate electrode GE1", and the first source-drain electrode SDE1" may define a first driving transistor.

The third insulation layer IL3" may be disposed on the second insulation layer IL2". The third insulation layer IL3" may cover the first source-drain electrode SDE1".

The first electrode E1" may be disposed on the third insulation layer I13". The first electrode E1" may electrically contact the first source-drain electrode SDE1". At least a portion of the first electrode E1" may overlap the first emitting area R1".

The pixel defining layer PDL1" may be disposed on the first electrode E1". The first pixel defining layer PDL1" may define a first opening exposing a portion of the first electrode E1". The first opening may overlap the first emitting area R1".

The first emitting layer EL1" may be disposed in the first opening. In an embodiment, the first emitting layer EL1" may include an organic light emitting material.

The second electrode E2" may be disposed on the first emitting layer EL1". A collection of layers including the first electrode E1", the second electrode E2" facing the first electrode E1", and the first emitting layer EL1" between the first electrode E1" and the second electrode E2" which face each other, may define a first light emitting element.

The first encapsulation layer EN1" may be disposed on the second electrode E2". In an embodiment, the first encapsulation layer EN1" may include a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer sequentially stacked.

The first buffer layer BUF" may be disposed on the first encapsulation layer EN1". The first buffer layer BUF" may include an insulating material.

The second base substrate BS2" may be disposed on the first buffer layer BUF". The second base substrate BS2'' may include a transparent material. For example, the second base substrate BS2" may include glass, plastic, etc..

The light blocking layer LBL" may be disposed on the first buffer layer BUF". The light blocking layer LBL" may define an opening overlap the first emitting area R1". The light blocking layer LBL" may block a portion of light emitted from the first light emitting layer EL1" so that the light emitted from the first light emitting layer EL1" does not proceed to the second emitting area R2". In an embodiment, the light blocking layer LBL" may be omitted.

The second active layer ATV2" may be disposed on the second base substrate BS2". The second active layer ATV2" may include a semiconductor material.

The fourth insulation layer IL4" may be disposed on the second base substrate BS2". The fourth insulation layer IL4" may cover the second active layer ATV2".

The second gate electrode GE2" may be disposed on the fourth insulation layer IL4". The second gate electrode GE2" may include a conductive material.

The fifth insulation layer IL5" may be disposed on the fourth insulation layer IL4". The fifth insulation layer IL5" may cover the second gate electrode GE2".

The second source-drain electrode SDE2" may be disposed on the fifth insulation layer IL5". The second source-drain electrode SDE2" may electrically contact the second active layer ATV2". The second active layer ATV2'', the second gate electrode GE2". and the second source-drain electrode SDE2" may define a second driving transistor.

The sixth insulation layer IL6" may be disposed on the fifth insulation layer IL5". The sixth insulation layer IL6" may cover the second source-drain electrode SDE2".

The third electrode E3" may be disposed on the sixth insulation layer IL6". At least a portion of the third electrode E3" may overlap the second emitting area R2".

The second pixel defining layer PDL2" may be disposed on the third electrode E3". The second pixel defining layer PDL2" may define a second opening exposing a portion of the third electrode E3". The second opening may overlap the second emitting area R2".

The second light emitting layer EL2" may be disposed in the second opening. In an embodiment, in the first emitting area R1", the second light emitting layer EL2 may be removed.

The fourth electrode E4" may be disposed on the second light emitting layer EL2". The fourth electrode E4" may define a third opening overlapping the first emitting area R1".

The second encapsulation layer EN2" may be disposed on the fourth electrode E4". In an embodiment, the second encapsulation layer EN2" may include a first inorganic encapsulation layer, an organic encapsulation layer, and a second encapsulation layer sequentially stacked.

The color filter layer CF" may be disposed on the second encapsulation layer EN2". The color filter layer CF" may selectively transmit light of a specific wavelength.

The first barrier pattern layer <NUM>" may be disposed to overlap the first emitting area R1". Specifically, the first barrier pattern layer <NUM>" may be disposed between the second base substrate BS2" and the second pixel defining layer PDL2". The first barrier pattern layer <NUM>" may include the first barrier pattern <NUM>". The first barrier pattern layer <NUM>" and the first barrier pattern <NUM>" may be substantially same as the first barrier pattern layer <NUM> and the first barrier pattern <NUM> described with reference to <FIG> and <FIG>. The first barrier pattern layer <NUM>" together with a solid portion of the sixth insulation layer IL6 may together define a barrier pattern layer.

Light emitted from the first light emitting layer EL1" may pass through the first barrier pattern <NUM>" and may have a relatively narrow viewing angle. Accordingly, an image having a narrow viewing angle may be displayed in the first emitting area R1".

<FIG> illustrates an embodiment in which the first barrier pattern layer <NUM>" penetrates the sixth insulation layer IL6" and is formed on the fifth insulation layer IL5", but embodiments of the invention are not limited thereto. For example, the first barrier pattern layer <NUM>" may penetrate the fifth insulation layer IL5" and the fourth insulation layer IL4" and may be formed on the second base substrate BS2".

In an embodiment, in the first emitting area R1", the second light emitting layer EL2" may be removed (refer to <FIG>). Accordingly, light emitted from the first light emitting layer EL1" may not pass through the second light emitting layer EL2".

Referring to <FIG>, the second pixel defining layer PDL2" may define an opening overlapping the first emitting area R1". A second barrier pattern layer <NUM>" may be disposed in the opening. The second barrier pattern layer <NUM>" may include a second barrier pattern <NUM>". The second barrier pattern layer <NUM>" and the second barrier pattern <NUM>" may be substantially same as the first barrier pattern layer <NUM> and the first barrier pattern <NUM> described with reference to <FIG> and <FIG>. Accordingly, a viewing angle of light emitted from the first light emitting layer EL1" may be adjusted by the second barrier pattern <NUM>", and an image having a narrow viewing angle may be displayed in the first emitting area R1".

As discussed, embodiments can provide a display device comprising: a first emitting area and a second emitting area which is spaced apart from the first emitting area; a first electrode facing a second electrode with a liquid crystal layer therebetween, each of the first electrode, the second electrode and the liquid crystal layer corresponding to the first emitting area; a third electrode facing a fourth electrode with a light emitting layer therebetween, each of the third electrode, the fourth electrode and the light emitting layer corresponding to the second emitting area; and the fourth electrode defining an opening in the fourth electrode which corresponds to the first emitting area.

The second emitting area may be spaced apart from the first emitting area in a plan view.

The third electrode and fourth electrode may be spaced apart from the first electrode and second electrode in the thickness direction.

A substrate may be provided, and the first electrode may be over the substrate with the second electrode over the first electrode. The third electrode may be over the second electrode, and the fourth electrode may be over the third electrode.

The first electrode may be a pixel electrode connected to a TFT for the liquid crystal layer corresponding to the first emitting area. The second electrode may overlap the first electrode.

The third electrode may be a pixel electrode connected to a TFT for the light emitting layer corresponding to the second emitting area. The fourth electrode may overlap the third electrode, and the opening of the fourth electrode may overlap the first emitting area.

The first emitting area may have a first viewing angle and the second emitting area may have a second viewing angle different from the first viewing angle. In the claimed invention, the first viewing angle is narrower than the second viewing angle.

A plurality of first emitting areas and second emitting areas may be provided. The fourth electrode may be provided as a common layer for the second emitting areas, with openings for each first emitting area. In some embodiments, the second electrode may also not overlap the second light emitting layers.

A color filter layer corresponding to the first emitting area and the second emitting area may be provided. Light may be emitted from the liquid crystal layer and the light emitting layer, in a light emitting direction, and the color filter layer may be arranged away from the liquid crystal layer and the light emitting layer, in the light emitting direction.

As discussed, embodiments can provide a display device comprising: a first emitting area and a second emitting area which is spaced apart from the first emitting area; a first electrode facing a second electrode with a first light emitting layer therebetween, each of the first electrode, the second electrode and the first light emitting layer corresponding to the first emitting area; a third electrode facing a fourth electrode with a second light emitting layer therebetween, each of the third electrode, the fourth electrode and the second light emitting layer corresponding to the second emitting area; and the fourth electrode defining an opening in the fourth electrode which corresponds to the first emitting area.

The third electrode and fourth electrode is spaced apart from the first electrode and second electrode in the thickness direction.

The first electrode may be a pixel electrode connected to a TFT for the first light emitting layer corresponding to the first emitting area. The second electrode may overlap the first electrode.

The third electrode may be a pixel electrode connected to a TFT for the second light emitting layer corresponding to the second emitting area. The fourth electrode may overlap the third electrode, and the opening of the fourth electrode may overlap the first emitting area.

A plurality of first emitting areas and second emitting areas may be provided. The fourth electrode may be provided as a common layer for the second light emitting layers, with openings for each first light emitting layer. The second electrode may be provided as a common layer for the first light emitting layers. The second electrode may also overlap the second light emitting layers.

A color filter layer corresponding to the first emitting area and the second emitting area may be provided. Light may be emitted from the first light emitting layer and the second light emitting layer, in a light emitting direction, and the color filter layer may be arranged away from the first light emitting layer and the second light emitting layer, in the light emitting direction.

Claim 1:
A display device comprising:
a first emitting area (R1, B1, G1, R1', G1', B1') and a second emitting area (R2, B2, G2, R2', B2', G2') which is spaced apart from the first emitting area;
a first electrode (E1, E1') facing a second electrode (E2, E2') with a liquid crystal layer (LC, LC') therebetween, each of the first electrode, the second electrode and the liquid crystal layer corresponding to the first emitting area;
a third electrode (E3, E3') facing a fourth electrode (E4, E4') with a light emitting layer (EL, EL') therebetween, each of the third electrode, the fourth electrode and the light emitting layer corresponding to the second emitting area and
the fourth electrode defining an opening in the fourth electrode which corresponds to the first emitting area; and
a backlight unit (BLU, BLU') under the liquid crystal layer (LC, LC') and arranged to emit light towards the liquid crystal layer;
wherein the first emitting area is configured to emit light having a relatively narrow viewing angle and the second emitting area is configured to emit light having a relatively wide viewing angle.