Patent Description:
<CIT> describes an organic light emitting display device comprising a first substrate and a second substrate and a display unit formed on the first substrate.

<CIT> describes an organic electroluminescent display device with a low cost and a high productivity as well as a sufficient sealing effect, and a method of manufacturing the same.

<CIT> describes a display panel including a first substrate, light-emitting elements on a region of the first substrate, and a second substrate facing the first substrate with the light-emitting elements therebetween.

<CIT> describes a display panel including a first substrate on which an electrode line and a switching element are disposed.

<CIT> describes a sealing structure for a substrate, a composite type (hybrid type) display device combining a reflection type liquid crystal display element and an organic EL display element, and a manufacturing method thereof.

<CIT> describes a display panel including a first substrate having a top surface and a side surface extending in a direction intersecting the top surface and a second substrate.

<CIT> describes a display panel including a first display substrate, and a second display substrate facing and spaced apart from the first display substrate.

<CIT> describes concerns an electro-optical cell, in particular a liquid crystal display cell, including a first transparent front substrate and a second back substrate, said substrates being joined by a sealing frame that defines a volume, said substrates including on their faces opposite each other at least one electrode, these electrodes being intended to be connected to an electrical power or control circuit.

A display device includes a display panel and a driver providing driving signals to the display panel. The driver may be included in a driving chip. The driving chip may be combined directly with a substrate of the display panel, or may be connected to a pad through a flexible printed circuit board or the like.

According to a conventional method, the driving chip or the flexible printed circuit board, on which the driving chip is mounted, is bonded to an upper surface of a substrate of the display panel. The area for bonding the driver to the display panel may increase the size of the bezel area.

The present invention is defined by the subject matter of independent claim <NUM>. Preferred embodiments are defined in the sub claims.

<FIG> is a plan view illustrating an exemplary embodiment of a display device constructed according to principles of the invention. <FIG> is a perspective view illustrating an exemplary embodiment of the display device of <FIG>.

Referring to <FIG> and <FIG>, the display device <NUM> according to an exemplary embodiment includes the display area DA and the peripheral area PA surrounding or adjacent to the display area DA. The display area DA may generate a light or may adjust transmittance of a light provided by an external light source to display an image. The peripheral area PA may be defined as an area not displaying an image.

In an exemplary embodiment, the display device <NUM> may be an organic light-emitting display device. For example, an array of pixels PX including a light-emitting element may be disposed in the display area DA to generate a light in response to a driving signal. A signal wiring and a power wiring may be disposed in the display area DA to transfer a driving signal and a power to the pixels PX. For example, a gate line GL, a data line DL and a power line PL may be disposed in the display area DA. The gate line GL may extend along a first direction D1 and may provide a gate signal to the pixels PX. The data line DL may extend along a second direction D2 crossing the first direction D1 and may provide a data signal to the pixels PX. The power line PL may extend along the second direction D2 and may provide a power to the pixels PX.

A transfer wiring, a circuit part or the like may be disposed in the peripheral area PA. The transfer wiring, discussed hereinafter, may transfer a driving signal or a power to the display area DA. The circuit part may generate a driving signal. For example, a driver DR generating a gate signal, a control signal wiring DSL transferring a control signal to the driver DR, a fan-out wiring FL, which may be a type of transfer wiring, transferring a data signal to the data line DL, a power bus wiring PBL transferring a power to the power line PL or the like may be disposed in the peripheral area PA.

In an exemplary embodiment, the peripheral area PA includes a sealing area SA in which a seal, such as sealing member SM, is disposed. The sealing area SA may have a shape surrounding the display area DA.

The transfer wiring may extend to the side end of the peripheral area PA. An end of the transfer wiring is electrically connected to the side terminal. The side terminal is electrically connected to an external driving device EDD. Thus, the transfer wiring may be electrically connected to the external driving device EDD to receive a driving signal, a control signal, a power or the like.

The bonding area BA may be defined by an area in which side terminals are disposed. For example, the side terminals may be arranged along the first direction D1 in the bonding area BA. A filling member FM covering the side terminals may be disposed in the bonding area BA, as shown <FIG>. In an exemplary embodiment, the external driving device EDD is bonded to the side surface of a display panel, discussed in further detail hereinafter.

For example, as illustrated in <FIG>, the display device <NUM> may include an array substrate <NUM>, a cover substrate <NUM> connected with the array substrate <NUM>, a sealing member SM disposed between the array substrate <NUM> and the cover substrate <NUM> and a filling member FM disposed between the array substrate <NUM> and the cover substrate <NUM>. The filling member FM may extend along the first direction D1.

As discussed in further detail hereinafter, the side surface of the side terminal or a conductive connection pad connected to the side terminal is exposed through the side surface of the display panel. Thus, the external driving device EDD may be bonded to the side surface of the display panel to be electrically connected to the transfer wiring. An upper surface of the side terminal may be covered by the filling member FM. Thus, the contact area of the side terminal and the conductive connection pad may be substantially defined by the exposed side surface of the side terminal.

For example, the external driving device EDD may include a flexible printed circuit board <NUM>, on which a driving chip <NUM> is mounted, and a printed circuit board <NUM> electrically connected to the flexible printed circuit board <NUM>. The driving chip <NUM> may transfer a data signal to the transfer wiring through the flexible printed circuit board <NUM>. The printed circuit board <NUM> may transfer a control signal, a power or the like to the transfer wiring through flexible printed circuit board <NUM>.

<FIG> is a cross-sectional view illustrating the display area of the display device of <FIG>. Referring to <FIG>, a pixel unit disposed in the display area DA may include a driving element disposed on a base substrate <NUM> and a light-emitting element electrically connected to the driving element. In an exemplary embodiment, the light-emitting element may be an organic light-emitting diode. The driving element may include at least one thin film transistor.

An active pattern AP may be disposed on the buffer layer <NUM>. A buffer layer <NUM> may be disposed on the base substrate <NUM>. For example, the base substrate <NUM> may include glass, quartz, sapphire, a polymeric material or the like. In an exemplary embodiment, the base substrate <NUM> may include a transparent rigid material such as glass. The buffer layer <NUM> may prevent or reduce permeation of impurities, humidity or external gas from underneath of the base substrate <NUM>, and may planarize an upper surface of the base substrate <NUM>. For example, the buffer layer <NUM> may include an inorganic material such as oxide, nitride or the like.

A first gate metal pattern including a gate electrode GE may be disposed on the active pattern AP. A first insulation layer <NUM> may be disposed between the active pattern AP and the gate electrode GE.

A second gate metal pattern including a gate wiring pattern GP may be disposed on the gate electrode GE. The gate wiring pattern GP may include a capacitor electrode for forming a capacitor, a wiring for transferring various signals or the like.

A second insulation layer <NUM> may be disposed between the gate electrode GE and the gate wiring pattern GP. A third insulation layer <NUM> may be disposed on the gate wiring pattern GP.

For example, the active pattern AP may include at least one of a silicon or a metal oxide semiconductor. In an exemplary embodiment, the active pattern AP may include polycrystalline silicon (polysilicon), which may be doped with at least one of n-type impurities or p-type impurities.

In another exemplary embodiment of another transistor, an active pattern may include a metal oxide semiconductor. For example, the active pattern may include at least one of a two-component compound (ABx), a ternary compound (ABxCy) or a four-component compound (ABxCyDz), which may include at least one of indium (In), zinc (Zn), gallium (Ga), tin (Sn), titanium (Ti), aluminum (Al), hafnium (Hf), zirconium (Zr), and magnesium (Mg). For example, the active pattern may include at least one of a zinc oxide (ZnOx), gallium oxide (GaOx), titanium oxide (TiOx), tin oxide (SnOx), indium oxide (InOx), indium-gallium oxide (IGO), indium-zinc oxide (IZO), indium tin oxide (ITO), gallium zinc oxide (GZO), zinc magnesium oxide (ZMO), zinc tin oxide (ZTO), zinc zirconium oxide (ZnZrxOy), indium-gallium-zinc oxide (IGZO), indium-zinc-tin oxide (IZTO), indium-gallium-hafnium oxide (IGHO), tin-aluminum-zinc oxide (TAZO), indium-gallium-tin oxide (IGTO) or the like.

The first insulation layer <NUM>, the second insulation layer <NUM> and the third insulation layer <NUM> may include at least one of silicon oxide, silicon nitride, silicon carbide or a combination thereof. Furthermore, the first insulation layer <NUM>, the second insulation layer <NUM> and the third insulation layer <NUM> may include an insulating metal oxide such as at least one of aluminum oxide, tantalum oxide, hafnium oxide, zirconium oxide, titanium oxide or the like. For example, the first insulation layer <NUM>, the second insulation layer <NUM> and the third insulation layer <NUM> may have a single-layered structure or a multi-layered structure including at least one of silicon nitride and/or silicon oxide, respectively, or may have different structures from each other.

The gate electrode GE and the gate wiring pattern GP may include at least one of a metal, a metal alloy, a metal nitride, a conductive metal oxide or the like. For example, the gate electrode GE and the gate wiring pattern GP may include at least one of gold (Au), silver (Ag), aluminum (Al), copper (Cu), nickel (Ni), platinum (Pt), magnesium (Mg), chromium (Cr), tungsten (W), molybdenum (Mo), titanium (Ti), tantalum (Ta) or an alloy thereof, and may have a single-layered structure or a multi-layered structure including different metal layers.

A first source metal pattern may be disposed on the third insulation layer <NUM>. The first source metal pattern may include a source electrode SE and a drain electrode DE, which electrically contact the active pattern AP. The source electrode SE and the drain electrode DE may pass through the insulation layers disposed thereunder to contact the active pattern AP, respectively.

A fourth insulation layer <NUM> may be disposed on the first source metal pattern. A second source metal pattern may be disposed on the fourth insulation layer <NUM>. The second source metal pattern may include a connection electrode CE to electrically connect the drain electrode DE to an organic light-emitting diode <NUM> disposed thereon. In an exemplary embodiment, the second source metal pattern may further include a mesh power line to prevent voltage drop of a power applied to the organic light-emitting diode <NUM>. A fifth insulation layer <NUM> may be disposed on the second source metal pattern.

The first and second source metal patterns may include at least one of a metal, a metal alloy, a metal nitride, a conductive metal oxide or the like. For example, the first and second source metal patterns may include at least one of gold (Au), silver (Ag), aluminum (Al), copper (Cu), nickel (Ni), platinum (Pt), magnesium (Mg), chromium (Cr), tungsten (W), molybdenum (Mo), titanium (Ti), tantalum (Ta) or an alloy thereof, and may have a single-layered structure or a multi-layered structure including different metal layers. In an exemplary embodiment, the first and second source metal patterns may have a multi-layered structure including an aluminum layer.

The fourth insulation layer <NUM> and the fifth insulation layer <NUM> may include an organic material. For example, the fourth insulation layer <NUM> and the fifth insulation layer <NUM> may include an organic insulation material such as at least one of a phenol resin, an acryl resin, a polyimide resin, a polyamide resin, a siloxane resin, an epoxy resin or the like.

An organic light-emitting diode <NUM> may be disposed on the fifth insulation layer <NUM>. The organic light-emitting diode <NUM> may include a first electrode <NUM> contacting the connection electrode CE, a light-emitting layer <NUM> disposed on the first electrode <NUM> and a second electrode <NUM> disposed on the light-emitting layer <NUM>. The light-emitting layer <NUM> of the organic light-emitting diode <NUM> may be disposed at least in an opening of a pixel-defining layer <NUM> disposed on the fifth insulation layer <NUM>. The first electrode <NUM> may be a lower electrode of the organic light-emitting diode <NUM>, and the second electrode <NUM> may be an upper electrode of the organic light-emitting diode <NUM>.

The first electrode <NUM> may function as an anode. For example, the first electrode <NUM> may be formed as a transmitting electrode or a reflecting electrode according to an emission type of the display device. When the first electrode <NUM> is a transmitting electrode, the first electrode <NUM> may include at least one of indium tin oxide, indium zinc oxide, zinc tin oxide, indium oxide, zinc oxide, tin oxide or the like. When the first electrode <NUM> is a reflecting electrode, the first electrode <NUM> may include at least one of gold (Au), silver (Ag), aluminum (Al), copper (Cu), nickel (Ni), platinum (Pt), magnesium (Mg), chromium (Cr), tungsten (W), molybdenum (Mo), titanium (Ti) or a combination thereof, and may have a stacked structure further including the material that may be used for the transmitting electrode.

The pixel-defining layer <NUM> has an opening overlapping at least a portion of the first electrode <NUM>. For example, the pixel-defining layer <NUM> may include an organic insulating material.

The light-emitting layer <NUM> may include at least an organic light-emitting layer, and may further include at least one of a hole injection layer (HIL), a hole transporting layer (HTL), an electron transporting layer (ETL) and an electron injection layer (EIL). For example, the light-emitting layer <NUM> may include a low molecular weight organic compound or a high molecular weight organic compound.

In an exemplary embodiment, the light-emitting layer <NUM> may emit a red light, a green light or a blue light. In another exemplary embodiment, the light-emitting layer <NUM> may emit a white light. The light-emitting layer <NUM> emitting white light may have a multi-layer structure including a red-emitting layer, a green-emitting layer and a blue-emitting layer, or a single-layer structure including a mixture of a red-emitting material, a green-emitting material and a blue-emitting material.

The second electrode <NUM> may be formed as a transmitting electrode or a reflecting electrode according to an emission type of the display device. For example, the second electrode <NUM> may include at least one of a metal, a metal alloy, a metal nitride, a metal fluoride, a conductive metal oxide or a combination thereof.

For example, the second electrode <NUM> may be formed as a common layer extending continuously over a plurality of pixels in the display area DA.

A cover substrate <NUM> is disposed on the organic light-emitting diode <NUM>. For example, the cover substrate <NUM> may include at least one of glass, quartz, sapphire, a polymeric material or the like. In an exemplary embodiment, the cover substrate <NUM> may include a transparent rigid material such as glass.

For example, a spacer may be disposed under the cover substrate <NUM> to support the cover substrate <NUM>. The spacer may be disposed between the cover substrate <NUM> and the organic light-emitting diode <NUM> or between the pixel-defining layer <NUM> and the second electrode <NUM> of the organic light-emitting diode <NUM>.

The space between the cover substrate <NUM> and the organic light-emitting diode <NUM> may have a vacuum state or may be filled with a gas or a display area sealing member. The display area sealing member may include an organic layer, an inorganic layer or a combination thereof.

<FIG> is a cross-sectional view illustrating the bonding area of the display device taken along line I-I' of <FIG>. <FIG> is a side, elevational view illustrating the bonding area of the display device of <FIG>.

Referring to <FIG>, a transfer wiring TL may extend toward a side surface SS-DD of the display device <NUM> in the bonding area BA, typically at the array substrate <NUM>. In an exemplary embodiment, the transfer wiring TL may be the fan-out wiring FL illustrated in <FIG>. However, exemplary embodiments are not limited thereto. For example, the transfer wiring TL may be the power bus wiring PBL, the control signal wiring DSL or a bridge wiring connected thereto.

A buffer layer <NUM> and a first insulation layer <NUM> may be disposed between the transfer wiring TL and the base substrate <NUM> in the bonding area BA. The buffer layer <NUM> and the first insulation layer <NUM> may extend from the buffer layer <NUM> and the first insulation layer <NUM>, which are disposed in the display area DA, or may be formed from same layers as the buffer layer <NUM> and the first insulation layer <NUM>.

In an exemplary embodiment, the transfer wiring TL may be formed from and disposed in a same layer as the gate electrode GE disposed in the display area DA.

The side terminal SC electrically contacts the transfer wiring TL, and extends to the side surface SS-DD of the display device <NUM> to be exposed to the exterior. In an exemplary embodiment, the side terminal SC may have a multi-layered structure including a plurality of conductive layers SC1 and SC2. The filling member FM overlaps at least a portion <NUM> of the side terminal SC.

For example, the side terminal SC may include a first conductive layer SC1 extending from the transfer wiring TL and a second conductive layer SC2 disposed on the first conductive layer SC1. However, exemplary embodiments are not limited thereto, and the side terminal SC may have various structures depending on the structure of a pixel array disposed in the display area DA. For example, the side terminal SC may include at least one conductive layer. Preferably, the side terminal SC may include at least two conductive layers to increase the contact area.

In an exemplary embodiment, the transfer wiring TL and the first conductive layer SC1 extending from the transfer wiring TL may be formed from and disposed in a same layer as the gate electrode GE disposed in the display area DA. The second conductive layer SC2 may be formed from and disposed in a same layer as the gate wiring pattern GP disposed in the display area DA.

For example, a second insulation layer <NUM> may be disposed between the first conductive layer SC1 and the second conductive layer SC2, and a third insulation layer <NUM> may be disposed on the second conductive layer SC2.

For example, the second conductive layer SC2 may pass through the second insulation layer <NUM> to electrically contact the first conductive layer SC1.

The second insulation layer <NUM> and the third insulation layer <NUM> may extend from the second insulation layer <NUM> and the third insulation layer <NUM>, which are disposed in the display area DA, or may be formed from same layers as the second insulation layer <NUM> and the third insulation layer <NUM>.

In an exemplary embodiment, a filling member FM is disposed between the array substrate <NUM> and the cover substrate <NUM>. The filling member FM may fill part of a space <NUM> between the side terminal SC and the cover substrate <NUM> in the bonding area BA to prevent impurities from entering the display device <NUM> or to prevent undercutting of the side terminal SC in the process of grinding the side surface SS-DD of the display device <NUM>.

In the claimed invention, the filling member FM is formed of an inorganic material and includes glass. For example, the filling member FM may be formed from at least one of glass frit, ceramic frit or the like. In view of process efficiency, the filling member FM and the sealing member SM may be preferably formed from the same material, for example, glass frit. In an exemplary embodiment, a frit paste may be coated on the bonding area BA, and then sintered by UV ray, laser or the like to form the filling member FM.

In an exemplary embodiment, insulation layers including an organic material may be removed in the area overlapping the sealing member SM and the filling member FM. When the insulation layers including an organic material are disposed in the area overlapping the sealing member SM and the filling member FM, outgas may be caused by heat in the process of curing or sintering the sealing member SM and the filling member FM.

In the claimed invention, the filling member FM is spaced apart from the sealing member SM. A conductive connection pad CP is disposed on a side surface SS-DD of the display device <NUM>. The conductive connection pad CP contacts the side terminal SC. The conductive connection pad CP may extend along a vertical direction. For example, the conductive connection pad CP may extend along a vertical direction to cover at least a portion of the side surface of the base substrate <NUM> or the cover substrate <NUM>.

The conductive connection pad CP may include a metal. For example, a metal layer may be formed by depositing a metal such as at least one of gold (Au), silver (Ag), aluminum (Al), copper (Cu), nickel (Ni), platinum (Pt), magnesium (Mg), chromium (Cr), tungsten (W), molybdenum (Mo), titanium (Ti), tantalum (Ta) or the like. The metal layer may be patterned, for example, by laser to form the conductive connection pad CP. However, exemplary embodiments are not limited thereto. For example, a metal pattern may be directly formed by using a mask having an opening. The conductive connection pad CP may be bonded to a flexible printed circuit board <NUM> by a conductive connection member CM.

The conductive connection member CM may be formed by various methods. For example, the conductive connection member CM may be an anisotropic conductive film ACF having conductive particles dispersed therein. In another exemplary embodiment, the conductive connection member CM may be a conductive bump bonded to the conductive connection pad CP, for example, by supersonic welding or the like. However, exemplary embodiments are not limited thereto, and various conventional boding methods may be used for bonding the conductive connection pad CP to the flexible printed circuit board <NUM> and for forming the conductive connection member CM.

According to exemplary embodiments, the side surface SS-DD of a display device <NUM> is bonded to an external driving device EDD thereby reducing the size of the peripheral area PA (bezel) of the display device <NUM>. Furthermore, in the claimed invention, a filling member FM is formed of an inorganic material for protecting the side terminal SC. Thus, outgas from the filling member may be prevented in the process of forming a conductive connection pad.

<FIG> are cross-sectional views illustrating exemplary methods of manufacturing the display device according to principles of the invention. Referring to <FIG>, a buffer layer <NUM> is formed on a base substrate <NUM>. A first insulation layer <NUM> is formed on the buffer layer <NUM>. A transfer wiring TL is formed on the first insulation layer <NUM>. A second insulation layer <NUM> is formed on the transfer wiring TL. An end of the transfer wiring TL may define a first conductive pattern CL1. A second conductive pattern CL2 is formed on the second insulation layer <NUM>. The second conductive pattern CL2 contacts the first conductive pattern CL1. A third insulation layer <NUM> is formed on the second conductive pattern CL2. The above insulation layers and conductive patterns may be formed in the process of forming a thin film transistor disposed in the display area DA. The base substrate <NUM>, a pixel array formed on the base substrate and a structure in the bonding area BA may be integrally referred as an array substrate <NUM>.

Referring to <FIG>, a sealing frit SF and a filing frit FF are formed on the array substrate <NUM>. In an exemplary embodiment, a screen printing method or a dispensing method may be used for disposing the sealing frit SF and the filing frit FF on the array substrate <NUM>. For example, a screen SR is disposed on the array substrate <NUM>. The screen SR may have an opening corresponding to the shape and dimension of a sealing member and a filling member. A frit paste is provided on the area corresponding to the sealing member and the filling member through the opening thereby forming the sealing frit SF and the filing frit FF.

The sealing frit SF and the filing frit FF may be formed from the same material. For example, the sealing frit SF and the filing frit FF may include a glass. For example, the glass frit may include at least one of an oxide powder, a binder and a solvent. For example, the oxide powder may include at least one of lead oxide (PbO), silicon oxide (SiO<NUM>), zinc oxide (ZnO), bismuth oxide (Bi<NUM>O<NUM>), boron oxide (B<NUM>O<NUM>, B<NUM>O<NUM>), iron oxide (Fe<NUM>O<NUM>), aluminum oxide (Al<NUM>O<NUM>) or a combination thereof.

Referring to <FIG>, a cover substrate <NUM> is disposed on the sealing frit SF and the filing frit FF. The sealing frit SF and the filing frit FF are heated by at least one of heat, UV, laser or the like. As a result, the array substrate <NUM> and the cover substrate <NUM> are connected with each other, and the sealing frit SF and the filing frit FF are sintered to form the sealing member SM and the filling member FM.

The binder and the solvent in the sealing frit SF and the filing frit FF may be removed in the process of drying or sintering. Thus, the sealing member SM and the filling member FM may substantially consist of an inorganic material.

In another exemplary embodiment, the sealing member SM and the filling member FM may include different materials from each other. For example, the sealing member SM may include a polymeric material formed from a curable resin, and the filling member FM may include a glass formed from glass frit. For example, the curable resin may include at least one of an epoxy resin, a silicone resin, an acrylic resin, an urethane resin, a phenol resin or the like.

Thereafter, the formed display panel of the display device <NUM> is scribed. For example, the display panel may be scribed by a scribing member <NUM> such as a scribing wheel or the like. In an exemplary embodiment, the scribing member <NUM> may scribe the display panel along a direction vertical to an upper surface or a lower surface of the display panel.

In an exemplary embodiment, the cover substrate <NUM>, the filling member FM, the first conductive pattern CL1, the second conductive pattern CL2 and the base substrate <NUM> of the array substrate may be scribed and partially removed.

Referring to <FIG>, remaining conductive layers SC1 and SC2 after scribing the first conductive pattern CL1 and the second conductive pattern CL2 may form the side terminal SC. The side surface of the side terminal SC may be exposed through the side surface SS-DD of the display panel.

In an exemplary embodiment, the side surface SS-DD of the display panel may be grinded or polished after scribing. A grinder <NUM> or a polishing machine may be used for grinding or polishing the side surface SS-DD of the display panel. A roughness of the side surface SS-DD of the display panel may be reduced through the grinding or polishing process.

Referring to <FIG>, a conductive connection pad CP is formed on the side surface SS-DD of the display panel, through which the side terminal SC is exposed.

For example, a metal layer is formed on the side surface SS-DD of the display panel through a deposition process such as sputtering or the like, and then patterned by laser or the like to form the conductive connection pad CP.

Thereafter, as illustrated in <FIG>, the conductive connection pad CP is connected with an external driving device EDD by an anisotropic conductive film, supersonic welding or the like. As a result, the external driving device EDD may be electrically connected to the transfer wiring TL through the side terminal SC and the conductive connection pad CP.

According to exemplary embodiment, a filling member and a sealing member are formed in a same process. Thus, manufacturing efficiency may be improved. Furthermore, since the filling member is formed of an inorganic material, outgas from the filling member may be prevented or reduced. In another exemplary embodiment, a sealing frit SF and a filling frit FF may be formed on a cover substrate <NUM>.

For example, as illustrated in <FIG>, a sealing frit SF and a filling frit FF may be formed on a cover substrate <NUM>. After the cover substrate <NUM> connected with the sealing frit SF and the filling frit FF is disposed to contact the array substrate <NUM>, the sealing frit SF and the filling frit FF are sintered to form a sealing member SM and a filling member FM.

<FIG> are cross-sectional views illustrating other exemplary embodiments of the bonding area of the display device taken along line I-I' of <FIG>.

Referring to <FIG> and <FIG>, the display device <NUM> includes an array substrate <NUM>, a cover substrate <NUM>, a sealing member SM, a filling member FM and a conductive connection pad CP.

The array substrate <NUM> includes a pixel array PXA, a transfer wiring TL electrically connected to the pixel array PXA and the side terminal SC electrically connected to the transfer wiring TL. The cover substrate <NUM> is connected with the array substrate <NUM>. The conductive connection pad CP contacts the side surface of the side terminal SC. An external driving device EDD such as a flexible printed circuit board <NUM> is bonded to the conductive connection pad CP.

The sealing member SM is disposed between the array substrate <NUM> and the cover substrate <NUM>, and surrounds the pixel array PXA of the array substrate <NUM>. The filling member FM is disposed between the side terminal SC and the cover substrate <NUM>, and includes an inorganic material.

In an exemplary embodiment, the transfer wiring TL may not extend to the side surface SS-DD of the display device <NUM>. Thus, the transfer wiring TL may be spaced apart from the conductive connection pad CP. The side terminal SC may include a conductive layer SC2 disposed on and electrically connected to the transfer wiring TL.

In an exemplary embodiment, the transfer wiring TL may not be exposed through the side surface SS-DD of the display panel. Thus, damage to the transfer wiring TL, which may be caused when the side surface SS-DD of the display panel is processed, may be prevented.

Referring to <FIG> and <FIG>, the side terminal SC includes a first conductive layer SC1 extending from a transfer wiring TL, a second conductive layer SC2 disposed on the first conductive layer SC1 and a third conductive layer SC3 disposed on the second conductive layer SC2. For example, the third conductive layer SC3 may be formed from a same layer as a first source metal pattern disposed in the display area DA.

A fourth insulation layer <NUM> may be disposed on the third conductive layer SC3. In an exemplary embodiment, the fourth insulation layer <NUM> may include an inorganic material.

Referring to <FIG>, the width W1 of a filling member FM may be less than the width W2 of a sealing member SM. For example, the width W1 of the filling member FM may be about <NUM> µm to about <NUM> µm, and the width of the sealing member SM may be about <NUM> µm to about <NUM>,<NUM> µm. When the width of the filling member FM is excessively small, the filling member FM may be damaged in the process of grinding the display panel so that the sealing member SM may be exposed.

Referring to <FIG>, the display device <NUM> includes a first filling member FM1 and a second filling member FM2. The second filling member FM2 may be disposed between the first filling member FM1 and a sealing member SM. The second filling member FM2 may be spaced apart from the first filling member FM1 and the sealing member SM.

In an exemplary embodiment, the display device <NUM> includes a plurality of the filling members. Thus, even if the first filling member is damaged, the second filling member may prevent infiltration of impurities and damage to the sealing member.

The above exemplary embodiments provide an organic-light emitting display device. However, exemplary embodiments are not limited thereto. For example, exemplary embodiments may be applied for a bonding structure of display devices such as a liquid crystal display device, an electroluminescent display device, a micro LED display device or the like.

Claim 1:
A display device (<NUM>) comprising:
a display panel including:
an array substrate (<NUM>) including a pixel array (PXA) disposed on a base substrate (<NUM>),
a side terminal (SC) disposed on the base substrate (<NUM>),
a transfer wiring (TL) electrically connected to the side terminal (SC) and the pixel array (PXA);
a cover substrate (<NUM>) coupled with the array substrate (<NUM>);
an inorganic layer (<NUM>) covering the side terminal (SC);
a seal disposed between the array substrate (<NUM>) and the cover substrate (<NUM>) and surrounding the pixel array (PXA);
a filler, spaced apart from the seal, overlapping at least a portion of the side terminal (SC) and filling a space between the array substrate (<NUM>) and the cover substrate (<NUM>); and
a conductive connection pad (CP) disposed on a side surface of the array substrate (<NUM>) and contacting the side terminal (SC),
wherein a driver (DR) is bonded to a side surface of the display panel, and
wherein the filler is configured for protecting the side terminal (SC) and is formed of an inorganic material and includes glass
wherein
the conductive connection pad (CP) is also contacting the filler.