Patent Description:
High-speed power amplifiers formed from semiconductor materials have a variety of useful applications, such as radio-frequency (RF) communications, radar, RF energy, power conversion, and microwave applications. Gallium nitride semiconductor material has received appreciable attention in recent years because of its desirable electronic and electro-optical properties. Because of its wide bandgap, GaN is more resistant to avalanche breakdown and can maintain electrical performance at higher temperatures than other semiconductors, such as silicon. GaN also has a higher carrier saturation velocity and can sustain higher power densities compared to silicon. Additionally, GaN has a Wurtzite crystal structure, is a very stable and hard material, has a high thermal conductivity, and has a much higher melting point than other conventional semiconductors such as silicon, germanium, and gallium arsenide. Accordingly, GaN is useful for high-speed, high-voltage, and high-power applications.

Applications supporting mobile communications and wireless internet access under current and proposed communication standards, such as WiMax, <NUM>, and <NUM>, can place austere performance demands on high-speed amplifiers constructed from semiconductor transistors. The amplifiers may need to meet performance specifications related to output power, signal linearity, signal gain, bandwidth, and efficiency.

Document <CIT> discloses a multi-path Doherty amplifier comprising a main amplifier and a plurality of peaking amplifiers.

The invention is defined by the appended independent claim <NUM> and preferred embodiments are defined by the appended dependent claims.

The skilled artisan will understand that the figures, described herein, are for illustration purposes only. It is to be understood that in some instances various aspects of the embodiments may be shown exaggerated or enlarged to facilitate an understanding of the embodiments. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the teachings. In the drawings, like reference characters generally refer to like features, functionally similar and/or structurally similar elements throughout the various figures. Where the drawings relate to microfabricated circuits, only one device and/or circuit may be shown to simplify the drawings. In practice, a large number of devices or circuits may be fabricated in parallel across a large area of a substrate or entire substrate. Additionally, a depicted device or circuit may be integrated within a larger circuit.

When referring to the drawings in the following detailed description, spatial references "top," "bottom," "upper," "lower," "vertical," "horizontal," and the like may be used. Such references are used for teaching purposes, and are not intended as absolute references for embodied devices. An embodied device can be oriented spatially in any suitable manner that may be different from the orientations shown in the drawings.

Features and advantages of the illustrated embodiments will become more apparent from the detailed description set forth below when taken in conjunction with the drawings.

One approach to amplifying signals to high power levels for communications is to use a Doherty amplifier, which is depicted schematically in <FIG>. To aid in understanding the present technology, a brief summary of Doherty amplification is provided.

A Doherty amplifier <NUM> may comprise a main power amplifier <NUM> and a peaking power amplifier <NUM> that operate in parallel on a signal divided into parallel circuit branches. The peaking amplifier <NUM> is typically idle (not amplifying) at low signal levels, and turns on when the main amplifier <NUM> begins to saturate. Outputs from the two amplifiers are subsequently combined into a single RF output.

In further detail, a <NUM>-degree power coupler <NUM> divides a received RF signal into two outputs that connect to the main amplifier <NUM> and the peaking amplifier <NUM>. The power coupler <NUM> also delays (by approximately <NUM> degrees) the phase of the signal provided to the peaking amplifier with respect to the phase of the signal provided to the main amplifier. Impedance-matching components <NUM>, <NUM> may be placed before the main amplifier <NUM> and peaking amplifier <NUM>. These impedance-matching components can transform impedance so as to match the input impedances of the two amplifiers <NUM>, <NUM> to the impedances of the transmission lines connected to the amplifier inputs or to output impedances from the <NUM>-degree coupler <NUM>. Such impedance matching can reduce undesirable effects of signal reflections from the amplifiers.

Additional impedance-matching components <NUM>, <NUM> may be located at the outputs of the main amplifier <NUM> and peaking amplifier <NUM> to match impedances between the output of the main amplifier <NUM> to the input of an impedance inverter <NUM> (which may be <NUM> ohms by design) and between the output of the peaking amplifier <NUM> and an impedance at the combining node <NUM> (which may also be <NUM> ohms). The impedance inverter <NUM> rotates the phase of the signal received from the main amplifier <NUM> by approximately <NUM> degrees, so that the signals from the main amplifier and peaking amplifier will be essentially in phase at the combining node <NUM>. An output impedance-matching element <NUM> may be used between the combining node <NUM> and the Doherty amplifier's RF output to match the output impedance of the Doherty amplifier <NUM> to an impedance of a load (not shown).

In a symmetric Doherty amplifier, the main amplifier <NUM> and peaking amplifier <NUM> may be closely similar or identical semiconductor devices. For example, they may be configured to handle a same amount of signal power and amplify a signal to a same power level when both amplifiers are fully on and amplifying at their upper limit. Because the input signal is split equally to the two amplifiers, the signals to the main amplifier <NUM> and peaking amplifier are typically attenuated by <NUM> dB at each output port of the coupler <NUM> compared to the input RF signal. Signal values expressed in "dB" refer to relative power levels.

Operational aspects of a Doherty amplifier are illustrated in further detail in <FIG>. <FIG> is a simplified circuit model for a Doherty amplifier when both the main amplifier <NUM> and peaking amplifier <NUM> are fully active (amplifying their respective signals at full-power values). The main amplifier <NUM> operating in class AB mode and its output impedance-matching component <NUM> can be modeled as a current source CSm having an internal impedance R and providing no phase delay to the amplified signal. The peaking amplifier <NUM> operating in class C mode, its output impedance-matching component <NUM>, and the phase delay of the coupler <NUM> can be modeled as a second current source CSp having an internal impedance R, but providing a <NUM>-degree phase delay to amplified signals. The impedance inverter <NUM> can be modeled as a transmission line having a characteristic impedance of R and providing a phase delay of <NUM> degrees. According to some embodiments, a load driven by the Doherty amplifier may have an impedance of R/<NUM>.

The phase delays described herein are delays for a carrier wave of a radio-frequency signal that is modulated to encode information onto the carrier wave. For example, a carrier wave may oscillate at a frequency having a value in a range between <NUM> gigahertz (GHz) and <NUM>, depending on what communication protocol is being used (e.g., <NUM>, <NUM>, <NUM>, etc.). The main amplifier <NUM> and peaking amplifier <NUM> may be designed for a particular carrier frequency and communication protocol. As one nonlimiting example, an amplifier configured to handle signals for <NUM> communications may be designed for a carrier frequency of <NUM> according to one protocol, and the specified phase delays of amplifier components are relative to <NUM>. As another nonlimiting example, an amplifier configured to handle signals for <NUM> communications may be designed for a carrier frequency of <NUM> according to another protocol, and the specified phase delays of amplifier components are relative to <NUM>.

When both the main amplifier <NUM> and peaking amplifier <NUM> are active and driving a load of R/<NUM> with approximately equal amounts of current I, as depicted in <FIG>, straightforward calculations show that the main amplifier <NUM> sees an impedance R at its output, as indicated by the chevron symbol in <FIG>. This is referred to as a "<NUM>:<NUM> load" condition for the Doherty amplifier. This impedance value can be calculated in a two-step process. First, the impedance seen looking into the combining node <NUM> from the impedance inverter <NUM> is calculated. Second, the impedance looking into the combining node is transformed according to the property of the quarter-wave impedance inverter <NUM> to find an impedance (in this case R) looking into the impedance inverter <NUM>.

<FIG> depicts a circuit model for an operating condition of the Doherty amplifier when the peaking amplifier <NUM> is idle (non-amplifying). When an input RF signal to be amplified by the Doherty amplifier falls below a threshold value, the peaking amplifier <NUM> becomes idle (non-amplifying) and is modeled as essentially as an open circuit. For this model, the impedance of the peaking amplifier changes from R to an infinite value in an idle state. Recalculating impedances looking into the combining node <NUM> and looking into the impedance inverter <NUM> from the main amplifier shows that the impedance value seen looking into the impedance inverter <NUM> rises to 2R. This operating condition is referred to as the "<NUM>:<NUM> load" condition of the Doherty amplifier. In this case, the main amplifier's impedance R is no longer well matched to the impedance it is trying to drive. Such a mismatch can lead to signal reflections and inefficient operation of the Doherty amplifier.

The variation in impedance seen by the main amplifier <NUM> that depends on the state of the peaking amplifier <NUM> (which is determined by the input RF signal level) is referred to as "load modulation. " Load modulation necessarily adversely affects power-handling capability of the amplifier and the amplifier's RF fractional bandwidth. For example, mismatches in impedance cause power reflections, and such reflections to the main amplifier may constrain the safe operating limit of the main amplifier appreciably below a power level that it could otherwise handle if there were no power reflections. The amount of reflected power may further depend on frequency, and changes in reflected power with frequency can take an amplifier out of compliance with a specification more quickly (resulting in a narrower bandwidth) than if there were no reflected power.

Additional details of a Doherty amplifier's gain and efficiency dynamics are illustrated in <FIG> and <FIG>. In <FIG>, a first gain curve <NUM> (dotted line) depicts gain of a main amplifier <NUM> as a function of output power Pout when the peaking amplifier <NUM> is idle (non-amplifying). The curve <NUM> corresponds to the so-called <NUM>:<NUM> load condition. The peaking amplifier is typically idle at low input signal power levels, e.g., input signal levels that will not begin saturating the main amplifier <NUM>. These low input signal levels correspond to output power levels that are up to about <NUM> dB below a peak output power level of the Doherty amplifier. These low level signals can be handled by the main amplifier <NUM> only. At higher signal levels, the gain of the main amplifier <NUM> will begin to saturate and go into "compression," which begins at a power compression point Pc and is indicated by the fall-off region <NUM> in <FIG>. At this point, the main amplifier <NUM> begins to amplify non-linearly, and would otherwise distort the input RF signal. The power compression point for a main amplifier <NUM> will depend upon its design (e.g., the size of active areas in the amplifier's transistors), and could be any value from <NUM> Watt (<NUM> dBm) to <NUM> Watts (<NUM> dBm) for an amplifier used in a communication system. Smaller or larger values of the power compression point may occur in some embodiments.

For a Doherty amplifier, the peaking amplifier <NUM> begins to amplify the input RF signal and contribute to the Doherty amplifier's output at the power compression point Pc. An example gain curve <NUM> for the peaking amplifier <NUM> is also depicted in <FIG>. The peaking amplifier <NUM> makes up for saturation of the main amplifier <NUM> at high powers until the peaking amplifier begins to saturate, go into compression, and fall off, as indicated in the drawing. Action of the peaking amplifier <NUM> can extend linear amplification by the Doherty amplifier over a range of high powers beyond the capability of the main amplifier <NUM> alone, until the peaking amplifier starts saturating.

<FIG> includes a second gain curve <NUM> for the main amplifier <NUM> when the peaking amplifier <NUM> is active (amplifying). The curve <NUM> corresponds to the <NUM>:<NUM> load condition. When the peaking amplifier <NUM> is active, it effectively adds load impedance to the main amplifier <NUM> (effectively reducing the gain of the main amplifier by about <NUM> dB) but also assists in amplifying high power levels (extending the Doherty's compression to higher powers). <FIG> also depicts a gain curve <NUM> (solid dark curve) as a function of output power for the Doherty amplifier. The Doherty gain curve <NUM> is a result of the combined actions of the main amplifier <NUM> and peaking amplifier <NUM> as described above.

An efficiency curve <NUM> for a Doherty amplifier is illustrated in <FIG>. The efficiency of the Doherty rises to a peak efficiency Ep that occurs approximately when the gain of the peaking amplifier <NUM> has reached its highest value. Ideally in a Doherty amplifier, the peak efficiency Ep would occur at about <NUM> dB below the maximum output power Pmax, in a region referred to as "output power back-off" (OBO, though sometimes denoted OPO). The efficiency falls below the peak value Ep for output power levels below the <NUM> dB OBO point in a region where the peaking amplifier is transitioning from low gain levels (where the peaking amplifier primarily loads the main amplifier) to its maximum gain (refer to <FIG>).

In reality, the peak efficiency for a Doherty does not occur at <NUM> dB OBO, because of several effects present in conventional Doherty amplifiers. A first effect relates to isolation of the peaking amplifier <NUM> in power back-off. Although the peaking amplifier is modeled above as having infinite impedance (open circuit) in back-off, in practical applications the impedance is finite at <NUM> dB OBO. Further, the impedance inverter <NUM> and/or output matching elements <NUM>, <NUM> can exhibit losses which may not be insignificant. Additionally, the main amplifier <NUM> and peaking amplifier <NUM> typically have non-ideal I-V curves and/or knee voltages. All these effects can cause the peak efficiency to occur at a value that is less than <NUM> dB OBO (e.g., about <NUM> dB OBO or less), which in turn causes the Doherty amplifier's efficiency to be reduced further than shown in <FIG> in a region of about <NUM> dB OBO to about <NUM> dB OBO.

The inventors have recognized and appreciated that load modulation in a Doherty amplifier can adversely affect power handling and bandwidth capability of a Doherty amplifier. The inventors have also recognized and appreciated that conventional Doherty amplifiers exhibit a peak efficiency in a region between about <NUM> dB OBO and about <NUM> dB OBO. The inventors have further recognized and appreciated that currently-developed signal protocols can increase the peak-to-average power ratio (PAPR) in communication signals to <NUM> dB or more to handle large data rates with high spectral efficiency. As a result, to preserve amplifier linearity a Doherty amplifier may be operated in a corresponding region ( <NUM> dB OBO or more) for a large portion of its operating time, which is a region where the conventional Doherty amplifier's efficiency is reducing.

The inventors have conceived of a no-load-modulation, improved-efficiency, broadband, multiclass power amplifier that can exhibit a peak efficiency at back-off power margins of <NUM> dB or more. The main amplifier is essentially free of load modulation effects caused by transitions from "on" to "idle" states of the peaking amplifiers. An example of a no-load-modulation power amplifier <NUM> is depicted in <FIG>.

A no-load-modulation power amplifier <NUM> can comprise a plurality of amplifiers M, P1, P2, P3 operating on portions of a received signal, e.g., a received RF signal that is divided into parallel circuit branches. The received signal at an input port to the amplifier can be divided into the parallel circuit branches by signal dividing circuitry <NUM> and provided to the plurality of amplifiers M, P1, P2, P3. A first circuit branch can include a main amplifier M and a first peaking amplifier P1 connected in parallel. A second circuit branch can include a second peaking amplifier P2 and a third peaking amplifier P3 connected in parallel. Outputs from the amplifiers in the first and second circuit branches can be combined at a combining node <NUM> and subsequently provided to an output port or terminal <NUM> of the no-load-modulation power amplifier. The output port can be connected to a load (having an impedance value of R in the illustrated example).

The parallel circuit branches can include a first quarter-wave impedance inverter <NUM> and a second quarter-wave impedance inverter <NUM> connected as shown. The characteristic impedance of the first and second impedance inverters <NUM>, <NUM> may be the same (R in the example implementation) or may be different in other embodiments. In some implementations, the characteristic impedance of the first and second impedance inverters <NUM>, <NUM> are the same value R to within <NUM> % (i.e., R ± <NUM>. In some cases, the characteristic impedance of the first and second impedance inverters <NUM>, <NUM> are the same value R to within <NUM> %. In embodiments, R can have a real value of impedance between <NUM> ohms and <NUM> ohms, and can be determined by an impedance of a load that the power amplifier is designed to drive.

A first amplifier M of the plurality of amplifiers can be configured to operate as a main amplifier in a first amplifying class. For example, the first amplifying class may be class A, class B, or class AB. The remaining amplifiers P1, P2, P3 (which may be referred to as peaking amplifiers) can be configured to operate as peaking amplifiers in a second class (e.g., class C). According to some embodiments, a first portion of the plurality of amplifiers M, P1 can operate on portions of the received signal to be amplified, wherein the portions of the received signal have a first phase. A second portion of the plurality of amplifiers P2, P3 can operate on portions of the received signal that have a second phase different from the first phase. The second phase can be delayed between <NUM>° and <NUM>° with respect to the first phase, in some embodiments. In some embodiments, the second phase may not be delayed with respect to the first phase, or may be delayed by an integer multiple of <NUM>°. When there is a phase delay (other than an integer multiple of approximately <NUM>°) between signals provided to the first portion of amplifiers M, P1 with respect to signals provided to the second portion of amplifiers P2, P3, then one or more compensating phase delays can be connected to outputs of at least some of the plurality of amplifiers so that signals combine at the combining node <NUM> in phase or approximately in phase.

A no-load-modulation power amplifier <NUM> can include signal dividing circuitry <NUM> that can comprise any suitable power splitters and/or couplers arranged in a network that divide the input signal into different signal paths. In some cases, the input signal can be divided into approximately equal power levels (a symmetric configuration) that are provided to the plurality of amplifiers. In other cases, the input signal can be divided into unequal power levels (an asymmetric configuration) that are provided to the plurality of amplifiers. In some implementations, the signal dividing circuitry <NUM> can include impedance-matching components that match input impedances of the plurality of amplifiers M, P1, P2, P3 to upstream components. To simplify the drawings, the signal dividing circuitry <NUM> may not be shown in alternative embodiments of a no-load-modulation power amplifier. In some cases, the signal dividing circuitry can introduce a phase difference between at least two of the signals that are output to the amplifiers. For example, the signal dividing circuitry can introduce a phase difference of approximately <NUM>° between a signal provided to the main amplifier and at least one of the signals provided to a peaking amplifier. In some implementations, the phase difference introduced by the signal dividing circuitry can be between <NUM>° and <NUM>°.

In some embodiments, each of the amplifiers M, P1, P2, P3 can be embodied as an integrated circuit comprising one or more transistors. In some cases, the transistors may be formed from gallium-nitride material as field-effect transistors, bipolar transistors, or high-electron-mobility transistors (HEMTs), though other types of transistors may be used in some embodiments. For example, a main amplifier M can be microfabricated on a wafer that is cut to provide at least one die that includes an array of GaN HEMT devices. The die can be attached to a circuit board or a microwave monolithic integrated circuit (MMIC) that also includes the peaking amplifiers P1, P2, P3, the signal dividing circuitry <NUM>, and the impedance inverters <NUM>, <NUM>, in some implementations. Each of the peaking amplifiers can be fabricated on a semiconductor wafer that is cut to form individual die. Additional circuit elements (e.g., impedance-matching components, phase delay elements, microstrip transmission lines, etc.) can be included on the circuit board or MMIC.

As used herein, the phrase "gallium-nitride material" refers to gallium nitride (GaN) and any of its alloys, such as aluminum gallium nitride (AlxGa (<NUM>-x)N), indium gallium nitride (InyGa(<NUM>-y)N), aluminum indium gallium nitride (AlxInyGa(<NUM>-x-y)N), gallium arsenide phosphoride nitride (GaAsxPy N(<NUM>-x-y)), aluminum indium gallium arsenide phosphoride nitride (AlxInyGa(<NUM>-x-y)AsaPb N(<NUM>-a-b)), amongst others. Typically, when present, arsenic and/or phosphorous are at low concentrations (i.e., less than <NUM> percent by weight). In certain preferred embodiments, the gallium-nitride material has a high concentration of gallium and includes little or no amounts of aluminum and/or indium. In high gallium concentration embodiments, the sum of (x+y) may be less than <NUM> in some implementations, less than <NUM> in some implementations, less than <NUM> in some implementations, or even less in other implementations. In some cases, it is preferable for at least one gallium-nitride material layer to have a composition of GaN (i.e., x=y=a=b=<NUM>). For example, an active layer in which a majority of current conduction occurs may have a composition of GaN. Gallium-nitride materials in a multi-layer stack may be doped n-type or p-type, or may be undoped. Suitable gallium-nitride materials are described in <CIT>.

Impedance values seen by the plurality of amplifiers M, P1, P2, P3 can be calculated for two cases of amplifier operation: (<NUM>) fully-on (depicted in <FIG>), and (<FIG>) fully backed-off with the peaking amplifiers idle (depicted in <FIG>). The calculations are based in part on the load impedance (R for this example) and the characteristic impedances of the impedance inverters <NUM>, <NUM> (R for this example). The calculations for this example consider the plurality of amplifiers M, P1, P2, P3 to be equal in power capability (e.g., they output a same amount of current when fully on). The calculations also assume that when the peaking amplifiers are idle and not amplifying, they present essentially an infinite impedance at their outputs.

Under the conditions of the preceding paragraph, in the fully-on state of the no-load-modulation power amplifier <NUM>, the load impedance seen by the main amplifier M is calculated to be R and is represented by right-angle arrows in the drawing. In this example, the peaking amplifiers P1, P2, P3 each see the same impedance at their respective outputs. This impedance having a real value R is the same value seen when the peaking amplifiers P1, P2, P3 are idle, which can be understood from the diagram of <FIG> (input signal dividing circuitry and peaking amplifiers are not shown). Since the peaking amplifiers P1, P2, P3 are idle and present open circuits, they do not contribute to the output and are not shown in <FIG>. Accordingly, there is no load modulation for the main amplifier M in the no-load-modulation power amplifier <NUM> between the fully-on and fully backed-off (peaking amplifiers idle) states. In practical applications, there can be a small amount of load modulation seen by the main amplifier due to non-ideal characteristics of the components in the power amplifier. In some practical applications, a load impedance value Zm seen by a main amplifier can modulate by no more than <NUM> % (in magnitude, for example) between the power amplifier's fully-on and fully backed-off states. In some practical applications, an impedance value Zm seen by a main amplifier can modulate by no more than <NUM> % between the power amplifier's fully-on and fully backed-off states. In some cases, a load impedance value Zm seen by a main amplifier can modulate by no more than <NUM> % between the power amplifier's fully-on and fully backed-off states.

Efficiency curves for embodiments of a no-load-modulation power amplifier <NUM> are illustrated in <FIG>. The plotted efficiency curve can represent the power amplifier's drain efficiency (DE) or power-added efficiency (PAE) as a function of the amplifier's output power. Drain efficiency is defined as a ratio of RF power output from a power amplifier to the DC power input to the power amplifier. Power-added efficiency is a ratio of a net RF power output from a power amplifier (RF power out minus RF power input) to the DC power input to the power amplifier.

The location of the peak back-off efficiency (Pbackoff) can depend in part upon the symmetry of the no-load-modulation power amplifier <NUM>. A symmetric no-load-modulation power amplifier is one in which each of the amplifiers M, P1, P2, P3 have a same power-handling capability. An asymmetric no-load-modulation power amplifier is one in which two or more of the amplifiers M, P1, P2, P3 have different power-handling capabilities. For example and referring to <FIG>, amounts of currents Im, Ip1, Ip2, Ip3 provided by each amplifier in a fully-on state can be different. In embodiments, an asymmetric no-load-modulation power amplifier in a fully-on state can provide a maximum amount of power or current from at least one peaking amplifier that differs by more than <NUM> % from a maximum amount of power or current from the main amplifier.

The efficiency behavior between fully-on and fully backed-off states can depend upon a turn-on configuration of the peaking amplifiers P1, P2, P3. If the peaking amplifiers are arranged to turn-on simultaneously in a same manner, then the efficiency behavior between fully-on and fully backed-off states can appear as shown by the lower black curve in <FIG> between the amplifier's Pbackoff and Pmax power levels. If the peaking amplifiers are configured to turn on at different levels of input signal power, then the efficiency behavior between fully-on and fully backed-off states can appear as shown by the upper gray curve in <FIG>. Having a sequential turn-on of the peaking amplifiers can improve the overall efficiency of a no-load-modulation power amplifier <NUM> throughout the amplifier's back-off range.

An asymmetric no-load-modulation power amplifier <NUM> can be characterized by a device ratio Rdev as follows: <MAT> where ri = Ipi/Im represent ratios of maximum currents Ipi (i = <NUM>, <NUM>, <NUM>) provided by the peaking amplifiers P1, P2, P3 to a maximum amount of current provided by the main amplifier M when the amplifiers are in a fully-on and fully-amplifying state. For an asymmetric no-load-modulation power amplifier <NUM>, a constraint equation for the relative amounts of currents can be obtained by solving for the impedance seen by the main amplifier M in the power amplifier's <NUM> fully-on state. The impedance Zm seen by the main amplifier M, for a load impedance of R and impedance inverters having characteristic impedances R as illustrated in <FIG>, can be represented by the following expression. <MAT> This equation can be rewritten as follows. <MAT> To avoid or reduce load modulation, the value of β is made equal to, or approximately equal to, unity. In some cases, β can be made equal to a value between <NUM> and <NUM>. For example, β can have a value other than <NUM> to improve performance of a power amplifier <NUM> by allowing some load modulation. For example, β may have a value in a range between <NUM> and <NUM> in some embodiments. Alternatively, β may have a value in a range between <NUM> and <NUM> in some embodiments. In some cases, β = <NUM> ± <NUM>, meaning that β can be a value in a range between <NUM> and <NUM>. In some cases, β = <NUM> ± <NUM>. In some embodiments, β = <NUM> ± <NUM>. In some cases, β = <NUM> ± <NUM>. The symbol "±" is used herein to mean within a range of values bounded by the subsequent value.

It can also be shown that the relative location of the peak back-off efficiency (Pbackoff) to the maximum power output (Pmax), referred to as OBO, is given by the following equation for an asymmetric no-load-modulation power amplifier <NUM>. <MAT> When β = <NUM>, the value of OBO is determined by the relative current values r1, r2, r3. For a symmetric no-load-modulation power amplifier <NUM>, r1 ≈ r2 ≈ r3 ≈ <NUM> and the OBO is approximately -<NUM> dB. The table below shows OBO values and impedances seen by the amplifiers M, P1, P2, P3 for other relative current values.

As may be appreciated, the relative current ratios r1, r2, r3 provide design flexibility for a no-load-modulation power amplifier. For an asymmetric implementation, one of the current ratios (e.g., r1) can be selected to primarily affect the power amplifiers OBO and the remaining current ratios can be selected to suppress or eliminate load modulation of the main amplifier M. In some cases, a maximum current delivered from one of the peaking amplifiers (e.g., the second peaking amplifier) can be between <NUM> and <NUM> times a maximum amount of current delivered from the main amplifier when the main amplifier and the second peaking amplifier are fully amplifying. By selecting relative current ratios, a power amplifier can exhibit a peak in efficiency for an output power back-off (OBO) value that is between -<NUM> dB and -<NUM> dB. In some implementations, relative current ratios can be selected to provide a peak in efficiency for an output power back-off (OBO) value that is between -<NUM> dB and -<NUM> dB.

Other configurations of a no-load-modulation power amplifier are possible. <FIG> shows an embodiment of a no-load-modulation power amplifier <NUM> in which two separate peaking amplifiers P2, P3 are replaced with a single peaking amplifier P2, and one of the impedance inverters <NUM> is replaced with an impedance inverter <NUM> having a characteristic impedance ∂R where ∂ is a value to be determined. According to some embodiments, P2 can have a power-handling capability that is about twice that of peaking amplifier P1. The no-load-modulation power amplifier <NUM> can be configured as a symmetric or asymmetric power amplifier. A symmetric configuration would be one in which the main amplifier M and the first peaking amplifier P1 have a same power-handling capability and the second peaking amplifier P2 has a power handling capability that is twice that of the first peaking amplifier P1. In an asymmetric configuration, the main amplifier M can have a different power-handling capability than one or both of the peaking amplifiers P1, P2.

A no-load condition for the power amplifier <NUM> shown in <FIG> can be obtained from an equation that is identical to EQ. <NUM> above, except that β is expressed as follows. <MAT> for which r1 is a ratio (r1 = Ip1/Im) of the maximum amount of current delivered by the first peaking amplifier P1 to a maximum amount of current delivered by the main amplifier M when both amplifiers are fully amplifying and r2 is a ratio (r2 = Ip2/Im) of the maximum amount of current delivered by the second peaking amplifier P2 to a maximum amount of current delivered by the main amplifier M when both amplifiers are fully amplifying. Selecting values of r1 and r2 such that β = <NUM> results in no load modulation or essentially no load modulation of the main amplifier. In some cases for the embodiment depicted in <FIG>, β = <NUM> ± <NUM>. In some cases, β = <NUM> ± <NUM>. In some embodiments, β = <NUM> ± <NUM>. In some cases, β = <NUM> ± <NUM>. Load modulation seen by the main amplifier M for the embodiment shown in <FIG> can be the same as and no greater than load modulation for the main amplifier in the embodiment shown in <FIG>.

For asymmetric configurations of the no-load-modulation power amplifier <NUM> shown in <FIG>, a value of ∂ can be determined by setting the impedance Zp2 seen by the second peaking amplifier to a desired value (e.g., the load impedance R or any other desired value). The impedance Zp2 can be represented by the following equation <MAT> where r1 and r2 are the relative current ratios for the first and second peaking amplifiers, respectively, as described above. Setting Zp2 = R gives the following expression for ∂. <MAT> The values of r1 and r2 can be selected by a designer to obtain a desired impedance Zp2 for the second peaking amplifier.

<FIG> plots gain performance and amplitude-modulation to phase-modulation (AM/PM) distortion for a symmetric no-load-modulation power amplifier <NUM> constructed according to the embodiment depicted in <FIG>. The gain and AM/PM values are plotted as a function of output power for three different frequencies. The amplifier shows good gain uniformity and AM/PM performance up to about <NUM> dBm of output power.

<FIG> plots comparisons of amplifier output impedance and drain efficiency between a no-load-modulation power amplifier <NUM> and a conventional Doherty amplifier designed for a same power specification. Drain efficiency (DE) values are plotted as contours (DE values listed on the contours) and indicate which impedance values yield the plotted DE. The no-load-modulation power amplifier <NUM> shows about a <NUM> % increase in drain efficiency for load impedances that are up to three times higher than load impedances that can be handled by the Doherty amplifier. Both amplifiers were configured to output a same amount of maximum power, and the plots of drain efficiency were generated for output power values of <NUM> dBm. The Doherty amplifier was operated at <NUM> and the no-load-modulation amplifier was operated at <NUM>. It should also be noted that the power-handling requirement for the main and first peaking amplifiers are each about one-half of the power-handling requirement of a Doherty's main amplifier for a same overall power amplifier specification, since there are two amplifiers (M, P1) in the no-load-modulation power amplifier that are handling the power of a single main amplifier in the Doherty in fully-on states.

<FIG> plots comparisons of input impedance values as a function of baseband frequency between a no-load-modulation power amplifier <NUM> and a conventional Doherty amplifier. The plotted curves reflect simulated resonance characteristics of the inputs at baseband frequencies. These resonances are determined primarily by a parallel LC circuit that comprises inductances L connected between the gates of the main amplifier and a biasing node, for example, and drain-to-source capacitances of the main amplifier. Typically, the resonances occur at a frequency value that is about twice a video bandwidth (also referred to as instantaneous bandwidth) of the entire power amplifier system. These results show an improvement in video bandwidth of about <NUM> % for a no-load-modulation power amplifier. The results of <FIG> suggest that a video bandwidth for a no-load-modulation power amplifier can be about <NUM>, which represents a significant improvement over the Doherty embodiment (a video bandwidth of about <NUM>).

Referring again to Table <NUM> and <FIG>, an asymmetric version of a no-load-modulation power amplifier <NUM> can be constructed in which different amplifiers handle different amounts of power. According to Table <NUM>, impedances seen by the different amplifiers P1, P2, P3 at their outputs can have different values. Variations in impedances seen by the peaking amplifiers can be undesirable since the amplifiers may be constructed to drive a typical load impedance (e.g., <NUM> ohms). In some embodiments, impedance transformers <NUM>, <NUM>, <NUM> can be connected to outputs of the peaking amplifiers, as shown in <FIG>, to transform a downstream impedance (listed in Table <NUM>) to a desired impedance (e.g., <NUM> ohms). Impedance transformers can also be connected to outputs of the peaking amplifiers for the embodiment shown in <FIG>.

<FIG> depicts an embodiment of amplifier die and an output network for a no-load-modulation power amplifier that can be implemented on a circuit board or MMIC, for example. The depicted embodiment can be applied to a four-amplifier, no-load modulation power amplifier depicted in <FIG> as well as a three-amplifier, no-load modulation power amplifier depicted in <FIG>. For example, the main amplifier M and peaking amplifiers P1, P2 and P3 can be attached to a circuit board or MMIC (not shown) and have output pads that connect to a first electrode of a capacitor C (e.g., a bar capacitor) via bond wires <NUM>. The capacitor can connect between the bond wires and a reference potential, such as ground. Additional bond wires can connect between the capacitor's first electrode and an output pad. In such an embodiment, an electrode of the capacitor C can serve as a combining node <NUM> of the power amplifier.

For the embodiment shown in <FIG>, drain-to-source capacitances (Cds) of the individual amplifiers can be used as part of a network that includes the bond wires <NUM> and capacitor C. The resulting networks can form the impedance inverters (e.g., inverters <NUM>, <NUM> referring to <FIG>) that are located between the amplifiers' outputs and the combining node. For example, the drain-to-source capacitances of the main amplifier die M and first peaking amplifier die P1, bond wires Lm and Lp1, and capacitor C can form a first impedance inverter. In this manner, the power amplifier can be assembled as a compact package.

<FIG> illustrates an embodiment of a no-load-modulation power amplifier <NUM> in which a hybrid coupler <NUM> is used to combine outputs from the amplifiers M, P1, P2, P3 rather than a conventional T junction, for example. The inventors have recognized and appreciated that a hybrid coupler can further significantly improve bandwidth characteristics of a no-load-modulation power amplifier. Examples of hybrid couplers that can be used include, but are not limited to, Lange couplers, a branch line coupler depicted in <FIG>, and a quadrature line coupler depicted in <FIG>. Either of these couplers can be discrete devices that are added to a circuit board or MMIC, or can be printed and fabricated on and as part of an integrated circuit on a circuit board or MMIC. The inventors have also recognized that hybrid couplers such as these can be used to improve bandwidth performance in other power amplifier configurations where signals from two or more amplifiers operating in parallel are combined, such as Doherty amplifiers.

A hybrid coupler can offer a smaller size compared to a T junction, particularly at lower frequencies. A hybrid coupler can also provide better isolation of the peaking amplifiers from the main amplifier when they are in idle states. Better isolation can reduce signal loss and power loss at amplifier back-off. In some implementations, a hybrid coupler can suppress the amount of intermodulation products that would otherwise bypass a T-junction type combiner.

Simulations with hybrid couplers indicate improvements in RF fractional bandwidth at the carrier frequency by <NUM>% or more depending upon the power amplifier design. Fractional bandwidth can be represented symbolically as Δω/ωo and represents a bandwidth between the -<NUM> dB return loss points for a device relative to the carrier frequency ωo applied to the device. Results from example simulations are shown in <FIG>. In this example, the carrier frequency is <NUM>. The traces compare return losses for the main amplifier for two combiners: a conventional T-junction combiner (upper dashed trace) and a quadrature line hybrid coupler (lower solid trace). The simulations were each for a four-amplifier, no-load-modulation power amplifier of the present embodiments like that depicted in <FIG>. The plot indicates a significant increase in RF fractional bandwidth for the hybrid coupler. For this simulation, the RF fractional bandwidth for the T-junction combiner is about <NUM> %. The RF fractional bandwidth for the same power amplifier is about <NUM> % when a hybrid coupler is used to combine signals from the amplifiers.

Methods of operating a no-load-modulation power amplifier are also contemplated by the inventors. A method can comprise dividing a signal into a plurality of signals, and providing the divided signal portions to multiple amplifiers connected in parallel. One of the amplifiers can be operated as a main amplifier in a first amplifier class (e.g., class AB). The remaining amplifiers can be operated as peaking amplifiers in a second amplifier class (e.g., class C). Outputs from a first portion of the amplifiers can be combined and provided to a first impedance inverter, and outputs from a second portion of the amplifiers can be combined and provided to a second impedance inverter. Outputs from the impedance inverters can be combined and provided to an output port, which can be connected to a load having an impedance R. Characteristic impedances of the impedance inverters and relative current ratios of the peaking amplifiers can be determined as described above to provide a power amplifier in which the main amplifier sees little or no load modulation between the power amplifier's fully-on state and fully backed-off state. In some embodiments, the main amplifier sees less than <NUM> % modulation of its load between the power amplifier's fully-on state and fully backed-off state. In some cases, the main amplifier sees less than <NUM> % modulation of its load between the power amplifier's fully-on state and fully backed-off state.

The terms "approximately" and "about" may be used to mean within ± <NUM>% of a target value in some embodiments, within ± <NUM>% of a target value in some embodiments, within ± <NUM>% of a target value in some embodiments, and yet within ± <NUM>% of a target value in some embodiments. The terms "approximately" and "about" may include the target value. The term "essentially" is used to mean within ± <NUM>% of and including a target value.

The technology described herein may be embodied as a method, of which at least some acts have been described. The acts performed as part of the method may be ordered in any suitable way. Accordingly, embodiments may be constructed in which acts are performed in an order different than described, which may include performing some acts simultaneously, even though described as sequential acts in illustrative embodiments. Additionally, a method may include more acts than those described, in some embodiments, and fewer acts than those described in other embodiments.

Claim 1:
A power amplifier (<NUM>) comprising:
a main amplifier (M) connected in parallel with a first peaking amplifier (P1) in a first circuit branch; and
a second peaking amplifier (P2) connected in parallel with a third peaking amplifier (P3) in a second circuit branch that is in parallel with the first circuit branch, wherein the main amplifier is configured to operate in a first amplifier class and the peaking amplifiers are configured to operate in an amplifier class that is different from the first amplifier class;
a combining node (<NUM>) at which an output of the first circuit branch connects to an output of the second circuit branch;
an output port (<NUM>) of the power amplifier (<NUM>) connected to the combining node and configured to connect to a load having an impedance value R;
a first impedance inverter (<NUM>) in the first circuit branch configured to connect outputs of the main amplifier and first peaking amplifier to the output of the first circuit branch; and;
a second impedance inverter (<NUM>) in the second circuit branch configured to connect outputs of the second peaking amplifier and third peaking amplifier to the output of the second circuit branch, wherein
current ratios for the peaking amplifiers with respect to the main amplifier set a load impedance seen by the main amplifier to approximately a same value when the peaking amplifiers are operating at maximum output currents amplifying received signals and when the peaking amplifiers are not amplifying received signals.