Patent Description:
Next-generation wireless cellular communication systems may provide support for higher bandwidths in part by supporting Non-Coherent Joint Transmission (NC- JT). <CIT> discloses methods, systems, and storage media for providing multi-cell, multi-point single user (SU) multiple input and multiple output (MIMO) operations. An apparatus may receive and process a first set of one or more independent data streams received in a downlink channel from a first transmission point. The apparatus may receive and process a second set of one or more independent data streams received in a downlink channel from a second transmission point. The apparatus may process control information received from the first transmission point or the second transmission point. The control information may include an indication of a quasi co-location assumption to be used for estimating channel characteristics for reception of the first set of one or more independent data streams or the second set of one or more independent data streams. <CIT> discloses a base station device and a terminal device determine resource element mapping in which a PDSCH is mapped and perform efficient communication. The terminal device uses a first parameter set among up to <NUM> parameter sets in order to determine resource element (RE) mapping for the PDSCH, when decoding the PDSCH based on detection of a Physical Downlink Control Channel (PDCCH) or an Enhanced Physical Downlink Control Channel (EPDCCH) with a Downlink Control Information (DCI) format 1A and transmitted on an antenna port <NUM>, and determines RE mapping for the PDSCH by using the number of antenna ports for and/or a frequency position of a Cell-specific Reference Signal (CRS) in the serving cell when decoding the PDSCH based on detection of the PDCCH or the EPDCCH with the DCI format 1A and transmitted on antenna ports <NUM> to <NUM>. R1-<NUM> discloses through online discussion some conclusions were reached: (i) Introduce new TM10 for CoMP; (ii) If any new DCI signalling is needed for CoMP, use a new DCI format based on Format 2C; otherwise use Format 2C; and, (iii) In TM10, the UE monitors the a DCI format and Format 1A. An opinion is expressed on the remaining FFS aspects of downlink control signaling for CoMP.

The embodiments of the disclosure will be understood more fully from the detailed description given below and from the accompanying drawings of various embodiments of the disclosure. However, while the drawings are to aid in explanation and understanding, they are only an aid, and should not be taken to limit the disclosure to the specific embodiments depicted therein.

Various wireless cellular communication systems have been implemented or are being proposed, including 3rd Generation Partnership Project (3GPP) Universal Mobile Telecommunications Systems (UMTS), 3GPP Long-Term Evolution (LTE) systems, 3GPP LTE-Advanced (LTE-A) systems, and 5th Generation (<NUM>) wireless systems / <NUM> mobile networks systems / <NUM> New Radio (NR) systems. With respect to various embodiments, a <NUM> system and/or an NR system may support Further Enhanced Coordinated Multi-Point (FeCoMP) functionality.

With respect to a variety of embodiments, <FIG> illustrates a scenario of Non-Coherent Joint Transmission (NC-JT) from a plurality of Transmission Points (TPs) to a User Equipment (UE), in accordance with some embodiments of the disclosure. A UE <NUM> may be in wireless communication both with a first TP <NUM> and a second TP <NUM>. First TP <NUM> may be a serving TP, and second TP <NUM> may be a booster TP.

In NC-JT, different Multiple Input Multiple Output (MIMO) layers and corresponding Demodulation Reference Signal (DM-RS) Antenna Ports (APs) may be transmitted from different TPs. For example, a transmission from first TP <NUM> may correspond with two MIMO layers and DM-RS APs <NUM> and <NUM>, while a transmission from second TP <NUM> may correspond with one MIMO layer and DM-RS AP <NUM>.

Various parameters corresponding to Physical Downlink Shared Channel (PDSCH) transmission from each TP may be configured in parameter sets (e.g., PDSCH-RE-MappingQCL sets). For actual PDSCH transmission, a UE may be provided with two or more actual parameter sets relevant to a scheduled PDSCH. Due to transmission from different TPs, some transmission parameters (such as a PDSCH starting position) may not be aligned. Accordingly, various embodiments may pertain to rules to resolve possible ambiguities in parameter settings.

In addition, to support frequency selective Dynamic Point Selection (DPS) using an NC-JT framework, a Resource Allocation (RA) for one set of MIMO layers corresponding with a first TP and an RA for another set of MIMO layers corresponding to a second TP may be different. Accordingly, in various embodiments, to support such transmission schemes, RA information may also be provided per MIMO layer set or per DM-RS AP group (or both). There may therefore be additional overhead in a Downlink Control Information (DCI) indication.

Disclosed herein are mechanisms and methods for PDSCH starting symbol determination. In some embodiments, for a given subframe that is a Multimedia Broadcast Single Frequency Network (MBSFN) subframe (for at least one of the TPs), a PDSCH starting symbol is determined according to an MBSFN subframe rule; otherwise and for illustration purposes only, the PDSCH starting symbol may be determined according to a non-MBSFN subframe rule. For some embodiments, MBSFN subframe configurations may be disposed to being the same across TPs.

Also disclosed herein are mechanisms and methods for RA indication. Some embodiments may pertain to an indication of two or more RAs with Resource Block Group (RBG) size scaled in such way as to fit a payload size of a DCI (e.g., with a conventional DCI Format) within a single RA field.

With respect to a variety of embodiments, due to dependencies between Channel State Information (CSI) components in legacy ETE systems, coding of CSI Reference Signal Resource Index (CRI) / Rank Indication (RI) and Precoding Matrix Indication (PMI) / Channel Quality Indicator (CQI) may be carried out independently from each other. The bandwidth of CRI/RI may be typically known by a base station based on a higher layer configuration, or may be derived from a CSI Reference Signal (CSI-RS) AP configuration and/or a reported UE capability. Based on a decoded CRI/RI, a UE may determine a payload size of a PMI/CQI report. For example, for ETE, if a reported RI is "<NUM>," Uplink Control Information (UCI) may be disposed to carrying a single CQI report; otherwise, UCI may be disposed to carrying two CQI reports. In addition, a bit width of a PMI report may also depend on a reported RI.

From a coding perspective, it may be desirable to use a common coding for all CSI components. However, due to variable sizes of UCI, the conventional approach may assume a maximum possible payload size for UCI reporting.

Disclosed herein are mechanisms and methods for a common coding for CSI. In some embodiments, a minimum portion of PMI, a minimum portion of CQI, an RI, and a CRI may be placed on a first group of bit indices in a polar code, and a remaining portion of PMI and a remaining portion of CQI may be placed on a second group of bit indices in the polar code. A common coding for all CSI components may advantageously have better coding efficiency.

In the following description, numerous details are discussed to provide a more thorough explanation of embodiments of the present disclosure. It will be apparent to one skilled in the art, however, that embodiments of the present disclosure may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form, rather than in detail, in order to avoid obscuring embodiments of the present disclosure.

Throughout the specification, and in the claims, the term "connected" means a direct electrical, mechanical, or magnetic connection between the things that are connected, without any intermediary devices. The term "coupled" means either a direct electrical, mechanical, or magnetic connection between the things that are connected or an indirect connection through one or more passive or active intermediary devices. The term "circuit" or "module" may refer to one or more passive and/or active components that are arranged to cooperate with one another to provide a desired function. The term "signal" may refer to at least one current signal, voltage signal, magnetic signal, or data/clock signal. The meaning of "a," "an," and "the" include plural references. The meaning of "in" includes "in" and "on.

The terms "substantially," "close," "approximately," "near," and "about" generally refer to being within +/- <NUM>% of a target value. Unless otherwise specified the use of the ordinal adjectives "first," "second," and "third," etc., to describe a common object, merely indicate that different instances of like objects are being referred to, and are not intended to imply that the objects so described must be in a given sequence, either temporally, spatially, in ranking, or in any other manner.

It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein are, for example, capable of operation in other orientations than those illustrated or otherwise described herein.

For purposes of the embodiments, the transistors in various circuits, modules, and logic blocks are Tunneling FETs (TFETs). Some transistors of various embodiments may comprise metal oxide semiconductor (MOS) transistors, which include drain, source, gate, and bulk terminals. The transistors may also include Tri-Gate and FinFET transistors, Gate All Around Cylindrical Transistors, Square Wire, or Rectangular Ribbon Transistors or other devices implementing transistor functionality like carbon nanotubes or spintronic devices. MOSFET symmetrical source and drain terminals i.e., are identical terminals and are interchangeably used here. A TFET device, on the other hand, has asymmetric Source and Drain terminals. Those skilled in the art will appreciate that other transistors, for example, Bi-polar junction transistors-BJT PNP/NPN, BiCMOS, CMOS, etc., may be used for some transistors without departing from the scope of the disclosure.

For the purposes of the present disclosure, the phrases "A and/or B" and "A or B" mean (A), (B), or (A and B).

In addition, for purposes of the present disclosure, the term "eNB" may refer to a legacy LTE capable Evolved Node-B (eNB), a next-generation or <NUM> capable eNB, an Access Point (AP), a Transmission Point (TP), and/or another base station for a wireless communication system. The term "gNB" may refer to a <NUM>-capable or NR-capable eNB. For purposes of the present disclosure, the term "UE" may refer to a legacy LTE capable User Equipment (UE), a Station (STA), and/or another mobile equipment for a wireless communication system. The term "UE" may also refer to a next-generation or <NUM> capable UE.

Various embodiments of eNBs and/or UEs discussed below may process one or more transmissions of various types. Some processing of a transmission may comprise demodulating, decoding, detecting, parsing, and/or otherwise handling a transmission that has been received. In some embodiments, an eNB or UE processing a transmission may determine or recognize the transmission's type and/or a condition associated with the transmission. For some embodiments, an eNB or UE processing a transmission may act in accordance with the transmission's type, and/or may act conditionally based upon the transmission's type. An eNB or UE processing a transmission may also recognize one or more values or fields of data carried by the transmission. Processing a transmission may comprise moving the transmission through one or more layers of a protocol stack (which may be implemented in, e.g., hardware and/or software-configured elements), such as by moving a transmission that has been received by an eNB or a UE through one or more layers of a protocol stack.

Various embodiments of eNBs and/or UEs discussed below may also generate one or more transmissions of various types. Some generating of a transmission may comprise modulating, encoding, formatting, assembling, and/or otherwise handling a transmission that is to be transmitted. In some embodiments, an eNB or UE generating a transmission may establish the transmission's type and/or a condition associated with the transmission. For some embodiments, an eNB or UE generating a transmission may act in accordance with the transmission's type, and/or may act conditionally based upon the transmission's type. An eNB or UE generating a transmission may also determine one or more values or fields of data carried by the transmission. Generating a transmission may comprise moving the transmission through one or more layers of a protocol stack (which may be implemented in, e.g., hardware and/or software-configured elements), such as by moving a transmission to be sent by an eNB or a UE through one or more layers of a protocol stack.

In various embodiments, resources may span various Resource Blocks (RBs), Physical Resource Blocks (PRBs), and/or time periods (e.g., frames, subframes, and/or slots) of a wireless communication system. In some contexts, allocated resources (e.g., channels, Orthogonal Frequency-Division Multiplexing (OFDM) symbols, subcarrier frequencies, resource elements (REs), and/or portions thereof) may be formatted for (and prior to) transmission over a wireless communication link. In other contexts, allocated resources (e.g., channels, OFDM symbols, subcarrier frequencies, REs, and/or portions thereof) may be detected from (and subsequent to) reception over a wireless communication link.

With respect to a variety of embodiments, in legacy LTE, a PDSCH starting position may depend upon whether a current subframe is an MBSFN subframe or a non- MBSFN subframe. If the PDSCH is assigned by, or is semi-persistently scheduled by, a Physical Downlink Control Channel (PDCCH) and/or Enhanced PDCCH (EPDCCH) with DCI format 2D, then a starting data symbol parameter (e.g., LDATASTART) may be established.

In establishing LDATASTART, if the subframe on which the PDSCH is received is indicated by a higher-layer parameter determined from DCI for the serving cell on which PDSCH is received (e.g., mbsfh-SubframeConfigList-rl <NUM>), or if the PDSCH is received on subframe <NUM> or <NUM> for frame structure type <NUM>, then LDATASTART may be set to the minimum of either two or the value of LDATASTART provided by DCI (e.g., a DCI Format 2D). Otherwise, LDATASTART may be set to the value of LDATASTART provided by DCI (e.g., a DCI Format 2D).

In some embodiments, in cases in which the current subframe is a non- MBSFN subframe the PDSCH starting symbol may be directly obtained from the value LDATASTART provided by DCI Format 2D. For an MBSFN subframe, the LDATASTART indicated by DCI Format 2D may be converted to the actual PDSCH starting symbol by evaluating which is the minimum: two, or the provided LDATASTART.

For some embodiments, for NC-JT operation, different TPs may have different MBSFN configurations (with each TP being associated with one parameter set), so a given DL subframe could be an MBSFN subframe and a non MBSFN subframe for two parameter sets. To achieve the same PDSCH starting symbol for both parameter sets, a special rule for PDSCH starting symbol determination may be defined. If a current subframe corresponds to an MBSFN subframe in at least one of parameter sets (e.g., at one TP), a PDSCH starting symbol determination is disposed to following an MBSFN subframe rule; otherwise and for illustration purposes only, the PDSCH starting symbol may be determined according to a non-MBSFN subframe rule.

In some embodiments, MBSFN subframe configurations may be disposed to being the same for both TPs (e.g., the same for both parameter sets).

For some embodiments, to support frequency selective DPS using an NC-JT framework, an RA for one set of MIMO layers corresponding to a first TP and an RA for another set of MIMO layers corresponding to a second TP may be different. To support such transmission schemes, the RA information may be disposed to being provided per MIMO layer set.

Since an RA indication may consume a large amount of DCI bits, an RBG size may be reduced to advantageously reduce the amount of bits required to indicate an RA. The RBG size may be disposed to being selected in such a way that a total overhead from two RAs may correspond to a maximum number of bits below a number of bits supported by an RA indication in an existing DCI Format.

<FIG> illustrates a scenario of a transmission of different CSI components and parts thereof using polar codes, in accordance with some embodiments of the disclosure. A scenario <NUM> may have a first CSI component and a second CSI component. The first CSI component may comprise a first set of zero-padding bits <NUM> (e.g., frozen bits), a minimum set of PMI bits and/or CQI bits <NUM>, a set of RI bits <NUM>, and a set of CRI bits <NUM>. The second CSI component may comprise a second set of zero-padding bits <NUM> (e.g., frozen bits) and a remaining payload of PMI bits and/or CQI bits <NUM>.

Accordingly, in various embodiments, for CSI encoding, a UE may first determine CSI to be transmitted. The CSI may comprise (and/or consist of) CRI, RI, PMI, CQI and a required number of bits. Note that some of the components for CSI (e.g., CRI) might not be present based on the network configuration.

For the first CSI component, based on a maximum CSI payload size MMAX, the UE may determine a number of bits in a first set of zero-padding bits (e.g., frozen bits) as N - MMAX, where N may be a polar code length (e.g., <NUM>). Using fixed payload sizes of CRI and RI, and minimum payload sizes for PMI and CQI (which may be denoted as PMIMIN and CQIMIN respectively), the UE may determine a minimum possible payload size X for the first part of CSI for encoding.

For the second CSI component, a number of bits in a second set of zero-padding bits (e.g., frozen bits) may be determined from an actual CSI payload size (which may be denoted as KCSI) and the number of bits in the first set of zero-padding bits and polar code block length as N - (N - MMAX) - KCSI = MMAX - KCSI. For example, if an actual CSI payload size is at a maximum, the number of bits in the second set of zero-padding bits may be <NUM>.

In some embodiments, either the first CSI component or the second CSI component may comprise Layer Indicator (LI) bits.

For a given polar code interleaving sequence of size N, the UE may first use X entries sorted based on bit quality to transmit some bits of PMI and CQI report (according to the minimum payload size of the CSI component) and all bits of RI and CRI report. The remaining N - X entries of the polar interleaving sequence may be used to transmit the remaining part of CSI (e.g., the remaining bits of PMI and CQI). For example, the minimum payload size for CQI may correspond to CQI corresponding to a first codeword (CW). If CSI reported by the UE corresponds to up to four MIMO layers (e.g., single CW), the remaining part of CQI might not be present and might not be transmitted, due to single codeword support. If CSI corresponds to more than four MIMO layers (e.g., two CW), the remaining part of CQI may correspond to the second CQI of the second codeword.

At a receiver end, a gNB may first decode X bits to determine CRI, RI, and a first part of a CQI / PMI payload, taking into account bits in the first set of zero-padding bits, and assuming part of bits in the second set of zero-padding bits, assuming maximum payload size for CSI. Based on the estimated CRI and RI values, the gNB may determine an actual payload size for CSI, and may derive a remaining payload size for CQI and PMI (which may be a variable number) and the actual number of bits in the second set of zero-padding bits, and may continue decoding of the remaining part of CSI taking this information into account.

<FIG> illustrates an eNB and a UE, in accordance with some embodiments of the disclosure. <FIG> includes block diagrams of an eNB <NUM> and a UE <NUM> which are operable to co-exist with each other and other elements of an LTE network. High-level, simplified architectures of eNB <NUM> and UE <NUM> are described so as not to obscure the embodiments. It should be noted that in some embodiments, eNB <NUM> may be a stationary non-mobile device.

eNB <NUM> is coupled to one or more antennas <NUM>, and UE <NUM> is similarly coupled to one or more antennas <NUM>. However, in some embodiments, eNB <NUM> may incorporate or comprise antennas <NUM>, and UE <NUM> in various embodiments may incorporate or comprise antennas <NUM>.

In some embodiments, antennas <NUM> and/or antennas <NUM> may comprise one or more directional or omni-directional antennas, including monopole antennas, dipole antennas, loop antennas, patch antennas, microstrip antennas, coplanar wave antennas, or other types of antennas suitable for transmission of RF signals. In some MIMO (multiple-input and multiple output) embodiments, antennas <NUM> are separated to take advantage of spatial diversity.

eNB <NUM> and UE <NUM> are operable to communicate with each other on a network, such as a wireless network. eNB <NUM> and UE <NUM> may be in communication with each other over a wireless communication channel <NUM>, which has both a Downlink (DL) path from eNB <NUM> to UE <NUM> and an Uplink (UL) path from UE <NUM> to eNB <NUM>.

As illustrated in <FIG>, in some embodiments, eNB <NUM> may include a physical layer circuitry <NUM>, a MAC (media access control) circuitry <NUM>, a processor <NUM>, a memory <NUM>, and a hardware processing circuitry <NUM>. A person skilled in the art will appreciate that other components not shown may be used in addition to the components shown to form a complete eNB.

In some embodiments, physical layer circuitry <NUM> includes a transceiver <NUM> for providing signals to and from UE <NUM>. Transceiver <NUM> provides signals to and from UEs or other devices using one or more antennas <NUM>. In some embodiments, MAC circuitry <NUM> controls access to the wireless medium. Memory <NUM> may be, or may include, a storage media/medium such as a magnetic storage media (e.g., magnetic tapes or magnetic disks), an optical storage media (e.g., optical discs), an electronic storage media (e.g., conventional hard disk drives, solid-state disk drives, or flash-memory-based storage media), or any tangible storage media or non-transitory storage media. Hardware processing circuitry <NUM> may comprise logic devices or circuitry to perform various operations. In some embodiments, processor <NUM> and memory <NUM> are arranged to perform the operations of hardware processing circuitry <NUM>, such as operations described herein with reference to logic devices and circuitry within eNB <NUM> and/or hardware processing circuitry <NUM>.

Accordingly, in some embodiments, eNB <NUM> may be a device comprising an application processor, a memory, one or more antenna ports, and an interface for allowing the application processor to communicate with another device.

As is also illustrated in <FIG>, in some embodiments, UE <NUM> may include a physical layer circuitry <NUM>, a MAC circuitry <NUM>, a processor <NUM>, a memory <NUM>, a hardware processing circuitry <NUM>, a wireless interface <NUM>, and a display <NUM>. A person skilled in the art would appreciate that other components not shown may be used in addition to the components shown to form a complete UE.

In some embodiments, physical layer circuitry <NUM> includes a transceiver <NUM> for providing signals to and from eNB <NUM> (as well as other eNBs). Transceiver <NUM> provides signals to and from eNBs or other devices using one or more antennas <NUM>. In some embodiments, MAC circuitry <NUM> controls access to the wireless medium. Memory <NUM> may be, or may include, a storage media/medium such as a magnetic storage media (e.g., magnetic tapes or magnetic disks), an optical storage media (e.g., optical discs), an electronic storage media (e.g., conventional hard disk drives, solid-state disk drives, or flash-memory-based storage media), or any tangible storage media or non-transitory storage media. Wireless interface <NUM> may be arranged to allow the processor to communicate with another device. Display <NUM> may provide a visual and/or tactile display for a user to interact with UE <NUM>, such as a touch-screen display. Hardware processing circuitry <NUM> may comprise logic devices or circuitry to perform various operations. In some embodiments, processor <NUM> and memory <NUM> may be arranged to perform the operations of hardware processing circuitry <NUM>, such as operations described herein with reference to logic devices and circuitry within UE <NUM> and/or hardware processing circuitry <NUM>.

Accordingly, in some embodiments, UE <NUM> may be a device comprising an application processor, a memory, one or more antennas, a wireless interface for allowing the application processor to communicate with another device, and a touch-screen display.

Elements of <FIG>, and elements of other figures having the same names or reference numbers, can operate or function in the manner described herein with respect to any such figures (although the operation and function of such elements is not limited to such descriptions). For example, <FIG> and <FIG> also depict embodiments of eNBs, hardware processing circuitry of eNBs, UEs, and/or hardware processing circuitry of UEs, and the embodiments described with respect to <FIG> and <FIG>-<NUM> and <NUM>-<NUM> can operate or function in the manner described herein with respect to any of the figures.

In addition, although eNB <NUM> and UE <NUM> are each described as having several separate functional elements, one or more of the functional elements may be combined and may be implemented by combinations of software-configured elements and/or other hardware elements. In some embodiments of this disclosure, the functional elements can refer to one or more processes operating on one or more processing elements. Examples of software and/or hardware configured elements include Digital Signal Processors (DSPs), one or more microprocessors, DSPs, Field-Programmable Gate Arrays (FPGAs), Application Specific Integrated Circuits (ASICs), Radio-Frequency Integrated Circuits (RFICs), and so on.

<FIG> illustrates hardware processing circuitries for a UE for PDSCH starting symbol determination, in accordance with some embodiments of the disclosure. <FIG> illustrates hardware processing circuitries for a UE for common coding for CSI, in accordance with some embodiments of the disclosure. With reference to <FIG>, a UE may include various hardware processing circuitries discussed herein (such as hardware processing circuitry <NUM> of <FIG> and hardware processing circuitry <NUM> of <FIG>), which may in turn comprise logic devices and/or circuitry operable to perform various operations. For example, in <FIG>, UE <NUM> (or various elements or components therein, such as hardware processing circuitry <NUM>, or combinations of elements or components therein) may include part of, or all of, these hardware processing circuitries.

In some embodiments, one or more devices or circuitries within these hardware processing circuitries may be implemented by combinations of software-configured elements and/or other hardware elements. For example, processor <NUM> (and/or one or more other processors which UE <NUM> may comprise), memory <NUM>, and/or other elements or components of UE <NUM> (which may include hardware processing circuitry <NUM>) may be arranged to perform the operations of these hardware processing circuitries, such as operations described herein with reference to devices and circuitry within these hardware processing circuitries. In some embodiments, processor <NUM> (and/or one or more other processors which UE <NUM> may comprise) may be a baseband processor.

Returning to <FIG>, an apparatus of UE <NUM> (or another UE or mobile handset), which may be operable to communicate with one or more eNBs on a wireless network, may comprise hardware processing circuitry <NUM>. In some embodiments, hardware processing circuitry <NUM> may comprise one or more antenna ports <NUM> operable to provide various transmissions over a wireless communication channel (such as wireless communication channel <NUM>). Antenna ports <NUM> may be coupled to one or more antennas <NUM> (which may be antennas <NUM>). In some embodiments, hardware processing circuitry <NUM> may incorporate antennas <NUM>, while in other embodiments, hardware processing circuitry <NUM> may merely be coupled to antennas <NUM>.

Antenna ports <NUM> and antennas <NUM> may be operable to provide signals from a UE to a wireless communications channel and/or an eNB, and may be operable to provide signals from an eNB and/or a wireless communications channel to a UE. For example, antenna ports <NUM> and antennas <NUM> may be operable to provide transmissions from UE <NUM> to wireless communication channel <NUM> (and from there to eNB <NUM>, or to another eNB). Similarly, antennas <NUM> and antenna ports <NUM> may be operable to provide transmissions from a wireless communication channel <NUM> (and beyond that, from eNB <NUM>, or another eNB) to UE <NUM>.

Hardware processing circuitry <NUM> may comprise various circuitries operable in accordance with the various embodiments discussed herein. With reference to <FIG>, hardware processing circuitry <NUM> may comprise a first circuitry <NUM> and/or a second circuitry <NUM>.

First circuitry <NUM> may be operable to determine a first parameter set and a second parameter set for establishing PDSCH resources. Second circuitry <NUM> may be operable to process a first part of a PDSCH transmission from a first set of MIMO layers corresponding with a first MBSFN configuration based on the first parameter set. Second circuitry <NUM> may also be operable to process a second part of the PDSCH transmission from a second set of MIMO layers corresponding with a second MBSFN configuration based on the second parameter set. First circuitry <NUM> may be operable to provide information regarding the first parameter set and/or the second parameter set to second circuitry <NUM> via an interface <NUM>. Hardware processing circuitry <NUM> may comprise an interface for receiving the PDSCH transmission from a receiving circuitry.

In some embodiments, second circuitry <NUM> may be operable to process a configuration transmission carrying at least one of the first parameter set and the second parameter set.

For some embodiments, a scheduled DL subframe may be an MBSFN subframe for the first parameter set and a non-MBSFN subframe for the second parameter set. In some embodiments, a starting PDSCH OFDM symbol index of the PDSCH transmission may be the minimum of: two; or a starting PDSCH symbol index of the first parameter set. For some embodiments, a starting PDSCH OFDM symbol index of the PDSCH transmission, a starting PDSCH symbol index of the first parameter set, and a starting PDSCH symbol index of the second parameter set may be the same value.

In some embodiments, first circuitry <NUM> and/or second circuitry <NUM> may be implemented as separate circuitries. In other embodiments, first circuitry <NUM> and/or second circuitry <NUM> may be combined and implemented together in a circuitry without altering the essence of the embodiments.

First circuitry <NUM> may be operable to establish a first CSI component of a CSI transmission payload, the first CSI component having a predetermined number of bits, and the first CSI component corresponding to a first number of zero-padding bits. First circuitry <NUM> may also be operable to establish a second CSI component of the CSI transmission payload, the second CSI component having a number of bits based upon a total size in bits of the CSI transmission payload, and the second CSI component corresponding to a second number of zero-padding bits. Second circuitry <NUM> may be operable to encode a polar-coded CSI transmission carrying the first number of zero-padding bits, the first CSI component, the second number of zero-padding bits, and the second CSI component. First circuitry <NUM> may be operable to provide information regarding the first CSI component of the CSI transmission payload, the first number of zero-padding bits, the second CSI component of the CSI transmission payload, and/or the second number of zero-padding bits to second circuitry <NUM> via an interface <NUM>. Hardware processing circuitry <NUM> may comprise an interface for sending the polar-coded CSI transmission to a transmission circuitry.

In some embodiments, first circuitry <NUM> may also be operable to calculate the size in bits of the CSI transmission payload.

For some embodiments, the first number of zero-padding bits may be set at the difference between a mother code length of a corresponding polar code in bits and a maximum CSI payload size in bits. In some embodiments, the encoding of the polar-coded CSI transmission may be performed by mapping the first CSI component to a set of most reliable entries of a polar encoder among a subset of entries corresponding with the first CSI component, and the encoding of the polar-coded CSI transmission may also be performed by mapping the second CSI component to a set of most reliable entries of a polar encoder among a subset of entries corresponding with the second CSI component.

For some embodiments, the subset of entries corresponding with the first CSI component may comprise a number N1 of polar encoder entries corresponding with first-decoded bits, with N1 being a sum of a number of bits of the first CSI component and the first number of zero-padding bits, and the subset of entries corresponding with the second CSI component may comprise a number N2 of polar encoder entries, with N2 being a sum of a number of bits of the second CSI component and the second number of zero-padding bits.

In some embodiments, an actual CSI payload size in bits may be a sum of a number of bits of the first CSI component and a number of bits of the second CSI component, and the second number of zero-padding bits may be set at the difference between the maximum CSI payload size in bits and the actual CSI payload size in bits. For some embodiments, the first CSI component may include one or more of: a minimum number of PMI bits; a minimum number of CQI bits; a number of RI bits; a minimum number of LI bits; or a number of CRI bits. In some embodiments, the second CSI component may include one or more of: a remaining number of PMI bits; a remaining number of CQI bits; or a remaining number of LI bits.

<FIG> illustrates methods for a UE for PDSCH starting symbol determination, in accordance with some embodiments of the disclosure. <FIG> illustrates methods for a UE for common coding for CSI, in accordance with some embodiments of the disclosure. With reference to <FIG>, methods that may relate to UE <NUM> and hardware processing circuitry <NUM> are discussed herein. Although the actions in method <NUM> of <FIG> and method <NUM> of <FIG> are shown in a particular order, the order of the actions can be modified. Thus, the illustrated embodiments can be performed in a different order, and some actions may be performed in parallel. Some of the actions and/or operations listed in <FIG> and <FIG> are optional in accordance with certain embodiments. The numbering of the actions presented is for the sake of clarity and is not intended to prescribe an order of operations in which the various actions must occur. Additionally, operations from the various flows may be utilized in a variety of combinations.

Moreover, in some embodiments, machine readable storage media may have executable instructions that, when executed, cause UE <NUM> and/or hardware processing circuitry <NUM> to perform an operation comprising the methods of <FIG> and <FIG>. Such machine readable storage media may include any of a variety of storage media, like magnetic storage media (e.g., magnetic tapes or magnetic disks), optical storage media (e.g., optical discs), electronic storage media (e.g., conventional hard disk drives, solid-state disk drives, or flash-memory-based storage media), or any other tangible storage media or non-transitory storage media.

In some embodiments, an apparatus may comprise means for performing various actions and/or operations of the methods of <FIG> and <FIG>.

Returning to <FIG>, various methods may be in accordance with the various embodiments discussed herein. A method <NUM> may comprise a determining <NUM>, a processing <NUM>, and a processing <NUM>. Method <NUM> may also comprise a processing <NUM>.

In determining <NUM>, a first parameter set and a second parameter set for establishing PDSCH resources may be determined. In processing <NUM>, a first part of a PDSCH transmission from a first set of MIMO layers corresponding with a first MBSFN configuration based on the first parameter set may be processed. In processing <NUM>, a second part of the PDSCH transmission from a second set of MIMO layers corresponding with a second MBSFN configuration based on the second parameter set may be processed.

In some embodiments, in processing <NUM>, a configuration transmission carrying at least one of the first parameter set and the second parameter set may be processed.

Returning to <FIG>, various methods may be in accordance with the various embodiments discussed herein. A method <NUM> may comprise an establishing <NUM>, an establishing <NUM>, and an encoding <NUM>. Method <NUM> may also comprise a calculating <NUM>.

In establishing <NUM>, a first CSI component of a CSI transmission payload may be established, the first CSI component having a predetermined number of bits, and the first CSI component corresponding to a first number of zero-padding bits. In establishing <NUM>, a second CSI component of the CSI transmission payload may be established, the second CSI component having a number of bits based upon a total size in bits of the CSI transmission payload, and the second CSI component corresponding to a second number of zero-padding bits. In encoding <NUM>, a polar-coded CSI transmission carrying the first number of zero-padding bits, the first CSI component, the second number of zero-padding bits, and the second CSI component may be encoded.

In some embodiments, in calculating <NUM>, the size in bits of the CSI transmission payload may be calculated.

<FIG> illustrates example components of a device, in accordance with some embodiments of the disclosure. In some embodiments, the device <NUM> may include application circuitry <NUM>, baseband circuitry <NUM>, Radio Frequency (RF) circuitry <NUM>, front-end module (FEM) circuitry <NUM>, one or more antennas <NUM>, and power management circuitry (PMC) <NUM> coupled together at least as shown. The components of the illustrated device <NUM> may be included in a UE or a RAN node. In some embodiments, the device <NUM> may include less elements (e.g., a RAN node may not utilize application circuitry <NUM>, and instead include a processor/controller to process IP data received from an EPC). In some embodiments, the device <NUM> may include additional elements such as, for example, memory/storage, display, camera, sensor, or input/output (I/O) interface. In other embodiments, the components described below may be included in more than one device (e.g., said circuitries may be separately included in more than one device for Cloud-RAN (C-RAN) implementations).

The processor(s) may include any combination of general-purpose processors and dedicated processors (e.g., graphics processors, application processors, and so on).

The baseband circuitry <NUM> may include one or more baseband processors or control logic to process baseband signals received from a receive signal path of the RF circuitry <NUM> and to generate baseband signals for a transmit signal path of the RF circuitry <NUM>. Baseband processing circuity <NUM> may interface with the application circuitry <NUM> for generation and processing of the baseband signals and for controlling operations of the RF circuitry <NUM>. For example, in some embodiments, the baseband circuitry <NUM> may include a third generation (<NUM>) baseband processor 804A, a fourth generation (<NUM>) baseband processor 804B, a fifth generation (<NUM>) baseband processor 804C, or other baseband processor(s) 804D for other existing generations, generations in development or to be developed in the future (e.g., second generation (<NUM>), sixth generation (<NUM>), and so on). The baseband circuitry <NUM> (e.g., one or more of baseband processors 804A-D) may handle various radio control functions that enable communication with one or more radio networks via the RF circuitry <NUM>. In other embodiments, some or all of the functionality of baseband processors 804A-D may be included in modules stored in the memory <NUM> and executed via a Central Processing Unit (CPU) 804E. The radio control functions may include, but are not limited to, signal modulation/demodulation, encoding/decoding, radio frequency shifting, and so on. In some embodiments, modulation/demodulation circuitry of the baseband circuitry <NUM> may include Fast-Fourier Transform (FFT), precoding, or constellation mapping/demapping functionality. In some embodiments, encoding/decoding circuitry of the baseband circuitry <NUM> may include convolution, tail-biting convolution, turbo, Viterbi, or Low Density Parity Check (LDPC) encoder/decoder functionality. Embodiments of modulation/demodulation and encoder/decoder functionality are not limited to these examples and may include other suitable functionality in other embodiments.

In some embodiments, the baseband circuitry <NUM> may include one or more audio digital signal processor(s) (DSP) 804F. The audio DSP(s) 804F may include elements for compression/decompression and echo cancellation and may include other suitable processing elements in other embodiments. Components of the baseband circuitry may be suitably combined in a single chip, a single chipset, or disposed on a same circuit board in some embodiments. In some embodiments, some or all of the constituent components of the baseband circuitry <NUM> and the application circuitry <NUM> may be implemented together such as, for example, on a system on a chip (SOC).

In various embodiments, the RF circuitry <NUM> may include switches, filters, amplifiers, and so on to facilitate the communication with the wireless network.

In some embodiments, the receive signal path of the RF circuitry <NUM> may include mixer circuitry 806A, amplifier circuitry 806B and filter circuitry 806C. In some embodiments, the transmit signal path of the RF circuitry <NUM> may include filter circuitry 806C and mixer circuitry 806A. RF circuitry <NUM> may also include synthesizer circuitry 806D for synthesizing a frequency for use by the mixer circuitry 806A of the receive signal path and the transmit signal path. In some embodiments, the mixer circuitry 806A of the receive signal path may be configured to down-convert RF signals received from the FEM circuitry <NUM> based on the synthesized frequency provided by synthesizer circuitry 806D. The amplifier circuitry 806B may be configured to amplify the down-converted signals and the filter circuitry 806C may be a low-pass filter (LPF) or band-pass filter (BPF) configured to remove unwanted signals from the down-converted signals to generate output baseband signals. Output baseband signals may be provided to the baseband circuitry <NUM> for further processing. In some embodiments, the output baseband signals may be zero-frequency baseband signals, although this is not a requirement. In some embodiments, mixer circuitry 806A of the receive signal path may comprise passive mixers, although the scope of the embodiments is not limited in this respect.

In some embodiments, the mixer circuitry 806A of the transmit signal path may be configured to up-convert input baseband signals based on the synthesized frequency provided by the synthesizer circuitry 806D to generate RF output signals for the FEM circuitry <NUM>. The baseband signals may be provided by the baseband circuitry <NUM> and may be filtered by filter circuitry 806C.

In some embodiments, the mixer circuitry 806A of the receive signal path and the mixer circuitry 806A of the transmit signal path may include two or more mixers and may be arranged for quadrature downconversion and upconversion, respectively. In some embodiments, the mixer circuitry 806A of the receive signal path and the mixer circuitry 806A of the transmit signal path may include two or more mixers and may be arranged for image rejection (e.g., Hartley image rejection). In some embodiments, the mixer circuitry 806A of the receive signal path and the mixer circuitry 806A may be arranged for direct downconversion and direct upconversion, respectively. In some embodiments, the mixer circuitry 806A of the receive signal path and the mixer circuitry 806A of the transmit signal path may be configured for super-heterodyne operation.

In some embodiments, the synthesizer circuitry 806D may be a fractional-N synthesizer or a fractional N/N+<NUM> synthesizer, although the scope of the embodiments is not limited in this respect as other types of frequency synthesizers may be suitable. For example, synthesizer circuitry 806D may be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer comprising a phase-locked loop with a frequency divider.

The synthesizer circuitry 806D may be configured to synthesize an output frequency for use by the mixer circuitry 806A of the RF circuitry <NUM> based on a frequency input and a divider control input. In some embodiments, the synthesizer circuitry 806D may be a fractional N/N+<NUM> synthesizer.

Synthesizer circuitry 806D of the RF circuitry <NUM> may include a divider, a delay-locked loop (DLL), a multiplexer and a phase accumulator. In some embodiments, the divider may be a dual modulus divider (DMD) and the phase accumulator may be a digital phase accumulator (DPA). In some embodiments, the DMD may be configured to divide the input signal by either N or N+<NUM> (e.g., based on a carry out) to provide a fractional division ratio. In some example embodiments, the DLL may include a set of cascaded, tunable, delay elements, a phase detector, a charge pump and a D-type flip-flop. In these embodiments, the delay elements may be configured to break a VCO period up into Nd equal packets of phase, where Nd is the number of delay elements in the delay line. In this way, the DLL provides negative feedback to help ensure that the total delay through the delay line is one VCO cycle.

In some embodiments, synthesizer circuitry 806D may be configured to generate a carrier frequency as the output frequency, while in other embodiments, the output frequency may be a multiple of the carrier frequency (e.g., twice the carrier frequency, four times the carrier frequency) and used in conjunction with quadrature generator and divider circuitry to generate multiple signals at the carrier frequency with multiple different phases with respect to each other. In some embodiments, the output frequency may be a LO frequency (fLO). In some embodiments, the RF circuitry <NUM> may include an IQ/polar converter.

While <FIG> shows the PMC <NUM> coupled only with the baseband circuitry <NUM>. However, in other embodiments, the PMC <NUM> may be additionally or alternatively coupled with, and perform similar power management operations for, other components such as, but not limited to, application circuitry <NUM>, RF circuitry <NUM>, or FEM <NUM>.

If there is no data traffic activity for an extended period of time, then the device <NUM> may transition off to an RRC_Idle state, where it disconnects from the network and does not perform operations such as channel quality feedback, handover, and so on. The device <NUM> goes into a very low power state and it performs paging where again it periodically wakes up to listen to the network and then powers down again. The device <NUM> may not receive data in this state, in order to receive data, it must transition back to RRC_Connected state.

<FIG> illustrates example interfaces of baseband circuitry, in accordance with some embodiments of the disclosure. As discussed above, the baseband circuitry <NUM> of <FIG> may comprise processors 804A-804E and a memory <NUM> utilized by said processors. Each of the processors 804A-804E may include a memory interface, 904A-904E, respectively, to send/receive data to/from the memory <NUM>.

It is pointed out that elements of any of the Figures herein having reference numbers and/or names that correspond with reference numbers and/or names of any other Figure herein may, in various embodiments, operate or function in a manner similar to those corresponding elements of the other Figure (without being limited to operating or functioning in such a manner).

The various appearances of" an embodiment," "one embodiment," or "some embodiments" are not necessarily all referring to the same embodiments.

While the disclosure has been described in conjunction with specific embodiments thereof, many alternatives, modifications and variations of such embodiments will be apparent to those of ordinary skill in the art in light of the foregoing description. For example, other memory architectures e.g., Dynamic RAM (DRAM) may use the embodiments discussed. The embodiments of the disclosure are intended to embrace all such alternatives, modifications, and variations as to fall within the broad scope of the appended claims.

In addition, well known power/ground connections to integrated circuit (IC) chips and other components may or may not be shown within the presented figures, for simplicity of illustration and discussion, and so as not to obscure the disclosure. Further, arrangements may be shown in block diagram form in order to avoid obscuring the disclosure, and also in view of the fact that specifics with respect to implementation of such block diagram arrangements are highly dependent upon the platform within which the present disclosure is to be implemented (i.e., such specifics should be well within purview of one skilled in the art). Where specific details (e.g., circuits) are set forth in order to describe example embodiments of the disclosure, it should be apparent to one skilled in the art that the disclosure can be practiced without, or with variation of, these specific details. The description is thus to be regarded as illustrative instead of limiting.

Claim 1:
A User Equipment, UE (<NUM>), operable to communicate with a first and a second transmission points, TPs, on a wireless network, comprising:
one or more processors (<NUM>) to:
determine, based on reception over wireless communication links, a first parameter set and a second parameter set for establishing Physical Downlink Shared Channel, PDSCH, resources including a starting symbol of the PDSCH and one or more subframes of the PDSCH, the first parameter set associated with the first transmission point, TP, (<NUM>) and the second parameter set associated with the second TP (<NUM>);
process a first part of a PDSCH transmission from a first set of Multiple Input Multiple Output, MIMO, layers corresponding with a first Multimedia Broadcast Single Frequency Network, MBSFN, configuration based on the first parameter set, wherein a starting symbol of a MBSFN subframe of the PDSCH transmission is the starting symbol of the PDSCH and is determined based on an MBSFN subframe rule provided by Downlink Control Information; and
process a second part of the PDSCH transmission from a second set of MIMO layers corresponding with a second MBSFN configuration based on the second parameter set, wherein the first part and the second part of the PDSCH transmission are from non-coherent joint transmissions from the first and second TPs, and
an interface for receiving the PDSCH transmission including the first part of the PDSCH transmission and the second part of the PDSCH transmission from a receiving circuitry, wherein the received PDSCH transmission is processed by the one or more processors.