Patent Description:
A page is a unit of physical or virtual memory. Some combinations of hardware and operating systems support only one page size, while others support multiple page sizes, for example one or more of <NUM> kilobytes, <NUM> kilobytes, <NUM> megabytes, <NUM> megabytes, and <NUM> gigabytes. A segment is a unit of physical or virtual memory including one or more pages.

DMA allows certain hardware devices to access physical system memory directly. Typically, a processor initiates a data transfer, then performs other operations while the transfer is in progress. Mapping a device for DMA access means allocating a buffer of system memory, and associating a range of system memory addresses within the buffer with corresponding addresses in the device's memory. As a result, a read or write to addresses within the assigned system memory address range actually accesses the DMA mapped device instead.

An interrupt is often used to signal a processor that a DMA operation has completed. However, the operation may not have actually completed when the interrupt is generated, and some data may not yet have arrived at its destination. Thus, when reallocating system memory, some computer systems implement a reallocation delay, with a predetermined length before releasing a DMA mapped memory page for another use.

The illustrative embodiments recognize that, as currently implemented, computer systems that implement a predetermined reallocation delay do so as each DMA mapped memory page is reallocated. Thus, if memory being reallocated includes a number of DMA mapped pages, separate delays are performed for each DMA mapped page, resulting in a total delay that is the sum of each separate delay. When reallocating large amounts of memory, for example in a system with <NUM> terabytes of memory, the resulting total delay time degrades system performance and results in customer complaints. Thus, the illustrative embodiments recognize that there is an unmet need to shorten the total reallocation delay time, while still maintaining data integrity. <CIT> discloses that a state machine transitions to a page query state in response to a query from the operating system, which is driving a page migration, as to whether a DMA mapper has a particular page mapped for DMA operations. If there are any DMA mappers that have the specified page mapped for DMA operations, a delay of the start of migration is scheduled so that if the DMA operations are only transient, they may expire and the specified page will no longer be mapped for DMA operations. The step of delaying is repeated page by page before completing the migration of all the pages.

The illustrative embodiments provide a method, system, and computer program product. An embodiment includes a method that determines, during a memory reallocation process, that a set of memory pages being reallocated are each enabled for a DMA operation. An embodiment performs, prior to writing initial data to the set of memory pages, a pre-access delay, the pre-access delay performed concurrently for each memory page in the set of memory pages.

An embodiment includes a computer usable program product. The computer usable program product includes one or more computer-readable storage devices, and program instructions stored on at least one of the one or more storage devices.

An embodiment includes a computer system. The computer system includes one or more processors, one or more computer-readable memories, and one or more computer-readable storage devices, and program instructions stored on at least one of the one or more storage devices for execution by at least one of the one or more processors via at least one of the one or more memories.

Viewed from a first aspect, the present invention provides a computer-implemented method comprising:
determining, during a memory reallocation process, that a set of memory pages being reallocated are each enabled for a Direct Memory Access (DMA) operation; and performing, subsequent to completion of the memory reallocation process, prior to writing initial data to the set of memory pages, a pre-access delay, the pre-access delay performed concurrently for each memory page in the set of memory pages.

Preferably, the present invention provides a computer-implemented method, further comprising: setting, for a memory page enabled for a DMA operation, a DMA delay flag.

Preferably, the present invention provides a computer-implemented method, wherein the pre-access delay is performed responsive to determining that the DMA delay flag is set for a memory page in the set of memory pages.

Preferably, the present invention provides a computer-implemented method, further comprising: setting, for the set of memory pages enabled for a DMA operation, a DMA delay flag.

Preferably, the present invention provides a computer-implemented method, wherein the pre-access delay is performed responsive to determining that the DMA delay flag is set for the set of memory pages.

The present invention provides a computer-implemented, wherein the pre-access delay is performed by delaying program instruction execution for a predetermined amount of time.

Preferably, the present invention provides a computer-implemented method further comprising: determining, during a second memory reallocation process, that a second set of memory pages being reallocated are each enabled for a Direct Memory Access (DMA) operation; and performing, responsive to determining that a time period greater than a threshold time period has not yet elapsed since a reallocation of a memory page enabled for DMA operation in the set of memory pages, subsequent to completion of the memory reallocation process, prior to writing second initial data to the second set of memory pages, the pre-access delay, the pre-access delay performed concurrently for each memory page in the second set of memory pages.

Viewed from another aspect, the present invention provides a computer program product for minimizing delay while migrating DMA mapped pages, the computer program product comprising: one or more computer readable storage media, and program instructions collectively stored on the one or more computer readable storage media, the program instructions comprising: program instructions to determine, during a memory reallocation process, that a set of memory pages being reallocated are each enabled for a Direct Memory Access (DMA) operation; and program instructions to perform, subsequent to completion of the memory reallocation process, prior to writing initial data to the set of memory pages, a pre-access delay, the pre-access delay performed concurrently for each memory page in the set of memory pages.

Preferably, the present invention provides a computer program product, further comprising: program instructions to set, for a memory page enabled for a DMA operation, a DMA delay flag.

Preferably, the present invention provides a computer program product, wherein the pre-access delay is performed responsive to determining that the DMA delay flag is set for a memory page in the set of memory pages.

Preferably, the present invention provides a computer program product, further comprising: program instructions to set, for the set of memory pages enabled for a DMA operation, a DMA delay flag.

Preferably, the present invention provides a computer program product, wherein the pre-access delay is performed responsive to determining that the DMA delay flag is set for the set of memory pages.

The present invention provides a computer program product, wherein the pre-access delay is performed by delaying program instruction execution for a predetermined amount of time.

Preferably, the present invention provides a computer program product, further comprising: determining, during a second memory reallocation process, that a second set of memory pages being reallocated are each enabled for a Direct Memory Access (DMA) operation; and performing, responsive to determining that a time period greater than a threshold time period has not yet elapsed since a reallocation of a memory page enabled for DMA operation in the set of memory pages, subsequent to completion of the memory reallocation process, prior to writing second initial data to the second set of memory pages, the pre-access delay, the pre-access delay performed concurrently for each memory page in the second set of memory pages.

Preferably, the present invention provides a computer program product wherein the stored program instructions are stored in the at least one of the one or more storage media of a local data processing system, and wherein the stored program instructions are transferred over a network from a remote data processing system.

Preferably, the present invention provides a computer program product, wherein the stored program instructions are stored in the at least one of the one or more storage media of a server data processing system, and wherein the stored program instructions are downloaded over a network to a remote data processing system for use in a computer readable storage device associated with the remote data processing system.

Preferably, the present invention provides a computer program product, wherein the computer program product is provided as a service in a cloud environment.

Viewed from another aspect, the present invention provides a computer system comprising one or more processors, one or more computer-readable memories, and one or more computer-readable storage devices, and program instructions stored on at least one of the one or more storage devices for execution by at least one of the one or more processors via at least one of the one or more memories, the stored program instructions comprising: program instructions to determine, during a memory reallocation process, that a set of memory pages being reallocated are each enabled for a Direct Memory Access (DMA) operation; and program instructions to perform, subsequent to completion of the memory reallocation process, prior to writing initial data to the set of memory pages, a pre-access delay, the pre-access delay performed concurrently for each memory page in the set of memory pages.

Preferably, the present invention provides a computer, further comprising: program instructions to set, for a memory page enabled for a DMA operation, a DMA delay flag.

Preferably, the present invention provides a computer system, wherein the pre-access delay is performed responsive to determining that the DMA delay flag is set for a memory page in the set of memory pages.

Preferably, the present invention provides a computer system, further comprising: setting, for the set of memory pages enabled for a DMA operation, a DMA delay flag.

Preferably, the present invention provides a computer system, wherein the pre-access delay is performed responsive to determining that the DMA delay flag is set for the set of memory pages.

Preferably, the present invention provides a computer system, further comprising: program instructions to determine, during a second memory reallocation process, that a second set of memory pages being reallocated are each enabled for a Direct Memory Access (DMA) operation; and program instructions to perform, responsive to determining that a time period greater than a threshold time period has not yet elapsed since a reallocation of a memory page enabled for DMA operation in the set of memory pages, subsequent to completion of the memory reallocation process, prior to writing second initial data to the second set of memory pages, the pre-access delay, the pre-access delay performed concurrently for each memory page in the second set of memory pages.

Viewed from another aspect, the present invention provides a data processing environment comprising one or more processors, one or more computer-readable memories, and one or more computer-readable storage devices, and program instructions stored on at least one of the one or more storage devices for execution by at least one of the one or more processors via at least one of the one or more memories, the stored program instructions comprising: program instructions to determine, during a memory reallocation process, that a set of memory pages being reallocated are each enabled for a Direct Memory Access (DMA) operation; and program instructions to perform, subsequent to completion of the memory reallocation process, prior to writing initial data to the set of memory pages, a pre-access delay, the pre-access delay performed concurrently for each memory page in the set of memory pages.

Viewed from another aspect, the present invention provides a memory management subsystem, comprising: a memory controller; a memory manager, the memory manager configured to cause the memory controller to perform operations comprising: determining, during a memory reallocation process, that a set of memory pages being reallocated are each enabled for a Direct Memory Access (DMA) operation; and performing, subsequent to completion of the memory reallocation process, prior to writing initial data to the set of memory pages, a pre-access delay, the pre-access delay performed concurrently for each memory page in the set of memory pages.

Certain novel features believed characteristic of the invention are set forth in the appended claims. The invention itself, however, as well as a preferred mode of use, further objectives and advantages thereof, will best be understood by reference to the following detailed description of the illustrative embodiments when read in conjunction with the accompanying drawings, wherein:.

The illustrative embodiments recognize that there is an unmet need to shorten the total reallocation delay time, while maintaining data integrity. The illustrative embodiments recognize that the presently available tools or solutions do not address these needs or provide adequate solutions for these needs. The illustrative embodiments used to describe the invention generally address and solve the above-described problems and other problems related to DMA memory delay minimization.

An embodiment can be implemented as a software application. The application implementing an embodiment can be configured as a modification of an existing memory management system, as a separate application that operates in conjunction with an existing memory management, a standalone application, or some combination thereof.

Particularly, some illustrative embodiments provide a method that determines, during a memory reallocation process, that a set of memory pages being reallocated are each enabled for DMA operation. The method performs a pre-access delay concurrently for each DMA enabled memory page, then writes initial data to the set of memory pages.

An embodiment receives a memory reallocation request. A memory reallocation request is a request to move, or migrate, the contents of a portion of currently-used memory to a different location. One example reason to move the contents of a portion of memory is to assemble a contiguous area of memory including the original portion of memory. For example, to fulfill an application's request for a contiguous <NUM> megabyte portion of memory, a memory management system might identify a suitable starting location. However, portions of the proposed contiguous <NUM> megabytes might already be in use, and thus require relocation of their contents to other locations to free the desired contiguous <NUM> megabytes for use.

As part of the memory reallocation process, an embodiment determines whether or not a page of memory within the contiguous area of memory being assembled is enabled for DMA operation by being the subject of a DMA mapping. An embodiment detects the presence of a DMA mapping using any suitable technique, and saves the result of the DMA mapping determination. One embodiment uses metadata, maintained by an operating system, to detect the presence of a DMA mapping. For example, the AIX operating system maintains metadata describing the state of each memory page, including the page's size and status (e.g. free, in-use, paged-in, or paged-out), which paging device a page belongs to if a page is in the paging space, and whether a DMA mapper is enabled for the page. Other operating systems maintain similar page-related metadata.

To record a page's DMA operation status, one embodiment maintains a flag for each page or other subset of memory being reallocated. A page's flag is set if that page requires a delay due to the DMA mapping, and cleared otherwise. Another embodiment maintains one flag for the entire portion of memory being consolidated. The flag is set if any page within the entire portion requires a delay due to the DMA mapping, and cleared otherwise. Another embodiment records the necessity for a delay using another presently-known technique.

When recording a page's DMA operation status, one embodiment also records a time at which migration away from that page occurred, using any presently-known technique. Then, once the memory reallocation process is complete, the embodiment also references a time at which data migration away from a particular DMA-mapped page occurred. If sufficient time has already elapsed since the migration, the delay has, in effect, already been performed and need not be performed again. For example, consider a memory reallocation process in which an embodiment encounters DMA mapped pages early in the process. By the time the reallocation process is complete, the delay time might already have elapsed naturally, and an additional delay is not required. Thus, if the delay need not be performed, the embodiment clears any appropriate DMA flags.

Before releasing a newly-assembled contiguous region of memory for use, the region should be set to a predetermined initial value. Setting memory region to an initial value overwrites data that was previously stored in the region by a different application, preventing the previously stored data from being accessed in an unauthorized manner. The initial value is typically zero, although other initial values or patterns of values are also possible. Because the initial value is typically zero, a component that sets one or more initial values is also referred to as a zeroing engine. In addition, some applications mistakenly assume that newly-allocated memory is set to zero or another predetermined value, resulting in software errors. Setting a memory region to zero helps prevent these errors. Further, if an application is provided with memory already set to a desired value (e.g. zero), the application does not have to perform the initialization itself, resulting in increased application efficiency. Some operating systems also include a memory allocation function that sets newly-allocated memory to a particular value or pattern.

A presently-known implementation of a system that sets an area of memory to a predetermined initial value receives one or more ranges of memory addresses, optionally subdivides the ranges into smaller ranges, and uses a set of worker threads executing in parallel with each other to set each memory range to the initial value. In one presently-known implementation each range of memory addresses is a <NUM> megabyte page of memory. In another presently-known implementation each range of memory addresses is a page of memory that is smaller or larger than <NUM> megabytes. In another presently-known implementation each range of memory addresses is a segment of memory including a number of memory pages. Some presently-known implementations receive one or more starting addresses for the range of memory to be set, and the ending address or size of the range are predetermined constants.

An embodiment modifies a presently-known implementation by determining if any of the input ranges of memory addresses have been flagged as requiring a pre-access delay in a manner described herein. If one or more input ranges of memory addresses pages require a pre-access delay, an embodiment concurrently performs the delay for each memory range. One embodiment performs the delay by delaying process execution for a predetermined amount of time, for example <NUM>.

Once the delay, if performed, is complete, an embodiment uses a set of worker threads, executing in parallel with each other, to set each memory range to a desired initial value. Finally, an embodiment provides the requested contiguous memory region, now allocated and initialized, to the requestor.

The manner of minimizing delay while migrating DMA mapped pages described herein is unavailable in the presently available methods in the technological field of endeavor pertaining to memory management. A method of an embodiment described herein, when implemented to execute on a device or data processing system, comprises substantial advancement of the functionality of that device or data processing system in determining, during a memory reallocation process, that a set of memory pages being reallocated are each enabled for DMA operation. The method performs a pre-access delay concurrently for each DMA enabled memory page, then writes initial data to the set of memory pages.

The illustrative embodiments are described with respect to certain types of portions of memory, delays, initial values, operations, mappings, determinations, measurements, devices, data processing systems, environments, components, and applications only as examples. Any specific manifestations of these and other similar artifacts are not intended to be limiting to the invention. Any suitable manifestation of these and other similar artifacts can be selected within the scope of the illustrative embodiments.

Furthermore, the illustrative embodiments may be implemented with respect to any type of data, data source, or access to a data source over a data network. Any type of data storage device may provide the data to an embodiment of the invention, either locally at a data processing system or over a data network, within the scope of the invention. Where an embodiment is described using a mobile device, any type of data storage device suitable for use with the mobile device may provide the data to such embodiment, either locally at the mobile device or over a data network, within the scope of the illustrative embodiments.

The illustrative embodiments are described using specific code, designs, architectures, protocols, layouts, schematics, and tools only as examples and are not limiting to the illustrative embodiments. Furthermore, the illustrative embodiments are described in some instances using particular software, tools, and data processing environments only as an example for the clarity of the description. The illustrative embodiments may be used in conjunction with other comparable or similarly purposed structures, systems, applications, or architectures. For example, other comparable mobile devices, structures, systems, applications, or architectures therefor, may be used in conjunction with such embodiment of the invention within the scope of the invention. An illustrative embodiment may be implemented in hardware, software, or a combination thereof.

The examples in this disclosure are used only for the clarity of the description and are not limiting to the illustrative embodiments. Additional data, operations, actions, tasks, activities, and manipulations will be conceivable from this disclosure and the same are contemplated within the scope of the illustrative embodiments.

Any advantages listed herein are only examples and are not intended to be limiting to the illustrative embodiments. Additional or different advantages may be realized by specific illustrative embodiments. Furthermore, a particular illustrative embodiment may have some, all, or none of the advantages listed above.

With reference to the figures and in particular with reference to <FIG> and <FIG>, these figures are example diagrams of data processing environments in which illustrative embodiments may be implemented. <FIG> and <FIG> are only examples and are not intended to assert or imply any limitation with regard to the environments in which different embodiments may be implemented. A particular implementation may make many modifications to the depicted environments based on the following description.

<FIG> depicts a block diagram of a network of data processing systems in which illustrative embodiments may be implemented. Data processing environment <NUM> is a network of computers in which the illustrative embodiments may be implemented. Data processing environment <NUM> includes network <NUM>. Network <NUM> is the medium used to provide communications links between various devices and computers connected together within data processing environment <NUM>. Network <NUM> may include connections, such as wire, wireless communication links, or fiber optic cables.

Clients or servers are only example roles of certain data processing systems connected to network <NUM> and are not intended to exclude other configurations or roles for these data processing systems. Server <NUM> and server <NUM> couple to network <NUM> along with storage unit <NUM>. Software applications may execute on any computer in data processing environment <NUM>. Clients <NUM>, <NUM>, and <NUM> are also coupled to network <NUM>. A data processing system, such as server <NUM> or <NUM>, or client <NUM>, <NUM>, or <NUM> may contain data and may have software applications or software tools executing thereon.

Only as an example, and without implying any limitation to such architecture, <FIG> depicts certain components that are usable in an example implementation of an embodiment. For example, servers <NUM> and <NUM>, and clients <NUM>, <NUM>, <NUM>, are depicted as servers and clients only as example and not to imply a limitation to a client-server architecture. As another example, an embodiment can be distributed across several data processing systems and a data network as shown, whereas another embodiment can be implemented on a single data processing system within the scope of the illustrative embodiments. Data processing systems <NUM>, <NUM>, <NUM>, <NUM>, and <NUM> also represent example nodes in a cluster, partitions, and other configurations suitable for implementing an embodiment.

Device <NUM> is an example of a device described herein. For example, device <NUM> can take the form of a smartphone, a tablet computer, a laptop computer, client <NUM> in a stationary or a portable form, a wearable computing device, or any other suitable device. Any software application described as executing in another data processing system in <FIG> can be configured to execute in device <NUM> in a similar manner. Any data or information stored or produced in another data processing system in <FIG> can be configured to be stored or produced in device <NUM> in a similar manner.

Application <NUM> implements an embodiment described herein. Application <NUM> executes in any of servers <NUM> and <NUM>, clients <NUM>, <NUM>, and <NUM>, and device <NUM>.

Servers <NUM> and <NUM>, storage unit <NUM>, and clients <NUM>, <NUM>, and <NUM>, and device <NUM> may couple to network <NUM> using wired connections, wireless communication protocols, or other suitable data connectivity. Clients <NUM>, <NUM>, and <NUM> may be, for example, personal computers or network computers.

In the depicted example, server <NUM> may provide data, such as boot files, operating system images, and applications to clients <NUM>, <NUM>, and <NUM>. Clients <NUM>, <NUM>, and <NUM> may be clients to server <NUM> in this example. Clients <NUM>, <NUM>, <NUM>, or some combination thereof, may include their own data, boot files, operating system images, and applications. Data processing environment <NUM> may include additional servers, clients, and other devices that are not shown.

In the depicted example, data processing environment <NUM> may be the Internet. Network <NUM> may represent a collection of networks and gateways that use the Transmission Control Protocol/Internet Protocol (TCP/IP) and other protocols to communicate with one another. At the heart of the Internet is a backbone of data communication links between major nodes or host computers, including thousands of commercial, governmental, educational, and other computer systems that route data and messages. Of course, data processing environment <NUM> also may be implemented as a number of different types of networks, such as for example, an intranet, a local area network (LAN), or a wide area network (WAN). <FIG> is intended as an example, and not as an architectural limitation for the different illustrative embodiments.

Among other uses, data processing environment <NUM> may be used for implementing a client-server environment in which the illustrative embodiments may be implemented. A client-server environment enables software applications and data to be distributed across a network such that an application functions by using the interactivity between a client data processing system and a server data processing system. Data processing environment <NUM> may also employ a service oriented architecture where interoperable software components distributed across a network may be packaged together as coherent business applications. Data processing environment <NUM> may also take the form of a cloud, and employ a cloud computing model of service delivery for enabling convenient, on-demand network access to a shared pool of configurable computing resources (e.g. networks, network bandwidth, servers, processing, memory, storage, applications, virtual machines, and services) that can be rapidly provisioned and released with minimal management effort or interaction with a provider of the service.

With reference to <FIG>, this figure depicts a block diagram of a data processing system in which illustrative embodiments may be implemented. Data processing system <NUM> is an example of a computer, such as servers <NUM> and <NUM>, or clients <NUM>, <NUM>, and <NUM> in <FIG>, or another type of device in which computer usable program code or instructions implementing the processes may be located for the illustrative embodiments.

Data processing system <NUM> is also representative of a data processing system or a configuration therein, such as data processing system <NUM> in <FIG> in which computer usable program code or instructions implementing the processes of the illustrative embodiments may be located. Data processing system <NUM> is described as a computer only as an example, without being limited thereto. Implementations in the form of other devices, such as device <NUM> in <FIG>, may modify data processing system <NUM>, such as by adding a touch interface, and even eliminate certain depicted components from data processing system <NUM> without departing from the general description of the operations and functions of data processing system <NUM> described herein.

In the depicted example, data processing system <NUM> employs a hub architecture including North Bridge and memory controller hub (NB/MCH) <NUM> and South Bridge and input/output (I/O) controller hub (SB/ICH) <NUM>. Processing unit <NUM>, main memory <NUM>, and graphics processor <NUM> are coupled to North Bridge and memory controller hub (NB/MCH) <NUM>. Processing unit <NUM> may contain one or more processors and may be implemented using one or more heterogeneous processor systems. Processing unit <NUM> may be a multi-core processor. Graphics processor <NUM> may be coupled to NB/MCH <NUM> through an accelerated graphics port (AGP) in certain implementations.

In the depicted example, local area network (LAN) adapter <NUM> is coupled to South Bridge and I/O controller hub (SB/ICH) <NUM>. Audio adapter <NUM>, keyboard and mouse adapter <NUM>, modem <NUM>, read only memory (ROM) <NUM>, universal serial bus (USB) and other ports <NUM>, and PCI/PCIe devices <NUM> are coupled to South Bridge and I/O controller hub <NUM> through bus <NUM>. Hard disk drive (HDD) or solid-state drive (SSD) <NUM> and CD-ROM <NUM> are coupled to South Bridge and I/O controller hub <NUM> through bus <NUM>. PCI/PCIe devices <NUM> may include, for example, Ethernet adapters, add-in cards, and PC cards for notebook computers. PCI uses a card bus controller, while PCle does not. ROM <NUM> may be, for example, a flash binary input/output system (BIOS). Hard disk drive <NUM> and CD-ROM <NUM> may use, for example, an integrated drive electronics (IDE), serial advanced technology attachment (SATA) interface, or variants such as external-SATA (eSATA) and micro- SATA (mSATA). A super I/O (SIO) device <NUM> may be coupled to South Bridge and I/O controller hub (SB/ICH) <NUM> through bus <NUM>.

Memories, such as main memory <NUM>, ROM <NUM>, or flash memory (not shown), are some examples of computer usable storage devices. Hard disk drive or solid state drive <NUM>, CD-ROM <NUM>, and other similarly usable devices are some examples of computer usable storage devices including a computer usable storage medium.

An operating system runs on processing unit <NUM>. The operating system coordinates and provides control of various components within data processing system <NUM> in <FIG>. The operating system may be a commercially available operating system for any type of computing platform, including but not limited to server systems, personal computers, and mobile devices. An object oriented or other type of programming system may operate in conjunction with the operating system and provide calls to the operating system from programs or applications executing on data processing system <NUM>.

Instructions for the operating system, the object-oriented programming system, and applications or programs, such as application <NUM> in <FIG>, are located on storage devices, such as in the form of code 226A on hard disk drive <NUM>, and may be loaded into at least one of one or more memories, such as main memory <NUM>, for execution by processing unit <NUM>. The processes of the illustrative embodiments may be performed by processing unit <NUM> using computer implemented instructions, which may be located in a memory, such as, for example, main memory <NUM>, read only memory <NUM>, or in one or more peripheral devices.

Furthermore, in one case, code 226A may be downloaded over network 201A from remote system 201B, where similar code 201C is stored on a storage device 201D. in another case, code 226A may be downloaded over network 201A to remote system 201B, where downloaded code 201C is stored on a storage device 201D.

The hardware in <FIG> may vary depending on the implementation. Other internal hardware or peripheral devices, such as flash memory, equivalent non-volatile memory, or optical disk drives and the like, may be used in addition to or in place of the hardware depicted in <FIG>. In addition, the processes of the illustrative embodiments may be applied to a multiprocessor data processing system.

In some illustrative examples, data processing system <NUM> may be a personal digital assistant (PDA), which is generally configured with flash memory to provide non-volatile memory for storing operating system files and/or user-generated data. A bus system may comprise one or more buses, such as a system bus, an I/O bus, and a PCI bus. Of course, the bus system may be implemented using any type of communications fabric or architecture that provides for a transfer of data between different components or devices attached to the fabric or architecture.

A communications unit may include one or more devices used to transmit and receive data, such as a modem or a network adapter. A memory may be, for example, main memory <NUM> or a cache, such as the cache found in North Bridge and memory controller hub <NUM>. A processing unit may include one or more processors or CPUs.

The depicted examples in <FIG> and above-described examples are not meant to imply architectural limitations. For example, data processing system <NUM> also may be a tablet computer, laptop computer, or telephone device in addition to taking the form of a mobile or wearable device.

Where a computer or data processing system is described as a virtual machine, a virtual device, or a virtual component, the virtual machine, virtual device, or the virtual component operates in the manner of data processing system <NUM> using virtualized manifestation of some or all components depicted in data processing system <NUM>. For example, in a virtual machine, virtual device, or virtual component, processing unit <NUM> is manifested as a virtualized instance of all or some number of hardware processing units <NUM> available in a host data processing system, main memory <NUM> is manifested as a virtualized instance of all or some portion of main memory <NUM> that may be available in the host data processing system, and disk <NUM> is manifested as a virtualized instance of all or some portion of disk <NUM> that may be available in the host data processing system. The host data processing system in such cases is represented by data processing system <NUM>.

With reference to <FIG>, this figure depicts a block diagram of an example configuration for minimizing delay while migrating DMA mapped pages in accordance with an illustrative embodiment. Application <NUM> is an example of application <NUM> in <FIG> and executes in any of servers <NUM> and <NUM>, clients <NUM>, <NUM>, and <NUM>, and device <NUM> in <FIG>.

Reallocation module <NUM> receives a memory reallocation request, for example to move the contents of a portion of memory in order to assemble a contiguous area of memory that includes the original portion. As part of the memory reallocation process, module <NUM> determines whether or not a page of memory within the contiguous area of memory being assembled is enabled for DMA operation by being the subject of a DMA mapping. Module <NUM> saves the result of the DMA mapping determination. One implementation of module <NUM> maintains a flag for each page of memory being reallocated. A page's flag is set if that page requires a delay due to the DMA mapping, and cleared otherwise. Another implementation of module <NUM> maintains one flag for the entire portion of memory being consolidated. The flag is set if any page within the entire portion requires a delay due to the DMA mapping, and cleared otherwise. Another implementation of module <NUM> records the necessity for a delay using another suitable technique.

When recording a page's DMA operation status, one implementation of module <NUM> also records a time at which migration away from that page occurred. Then, once the memory reallocation process is complete, the implementation also references a time at which data migration away from a particular DMA-mapped page occurred. If sufficient time has already elapsed since the migration, the delay has, in effect, already been performed and need not be performed again. Thus, if the delay need not be performed, the implementation of module <NUM> clears any appropriate DMA flags.

Initial data write module <NUM> modifies a presently-known implementation by determining if any of the input ranges of memory addresses have been flagged as requiring a pre-access delay in a manner described herein. If one or more input ranges of memory addresses pages require a pre-access delay, module <NUM> performs the delay for each memory range concurrently. One implementation of module <NUM> performs the delay by delaying process execution for a predetermined amount of time, for example <NUM>. Once the delay has completed, module <NUM> uses a set of worker threads, executing in parallel with each other, to set each memory range to a desired initial value. Finally, module <NUM> provides the requested contiguous memory region, now allocated and initialized, to the requestor.

With reference to <FIG>, this figure depicts an example of minimizing delay while migrating DMA mapped pages in accordance with an illustrative embodiment. The example can be executed using application <NUM> in <FIG>.

As depicted, application <NUM> receives memory reallocation request <NUM>. As part of the memory reallocation process within memory <NUM>, application determines that page <NUM> is not the subject of a DMA mapping, but pages <NUM> and <NUM> are the subject of a DMA mapping. As a result, application <NUM> constructs page list <NUM>. In page list <NUM>, page <NUM>'s flag is cleared, indicating that page <NUM> does not require a delay due to the DMA mapping. Flags for pages <NUM> and <NUM> are set, indicating that pages <NUM> and <NUM> do require a delay due to the DMA mapping. In another implementation of application <NUM>, page list <NUM> is replaced by a single flag, which is set if any of pages <NUM>, <NUM>, and <NUM> are the subject of a DMA mapping, and cleared otherwise.

With reference to <FIG>, this figure depicts a continued example of minimizing delay while migrating DMA mapped pages in accordance with an illustrative embodiment. Initial data write module <NUM> is the same as initial data write module <NUM> in <FIG>. Pages <NUM>, <NUM>, and <NUM> and page list <NUM> are the same as pages <NUM>, <NUM>, and <NUM> and page list <NUM> in <FIG>.

As depicted, in page list <NUM> flags for pages <NUM> and <NUM> are set, indicating that pages <NUM> and <NUM> do require a delay due to the DMA mapping. Note that pages <NUM> and <NUM> may be subsets of a larger memory range received by initial data write module <NUM>. In addition, page list <NUM> depicts status for only a portion of one or more ranges of memory addresses received by module <NUM>. Because pages <NUM> and <NUM> require a delay, initial data write module <NUM> performs one pre-allocation delay <NUM>. Once delay <NUM> has completed, module <NUM> uses a set of worker threads, executing in parallel with each other, to conduct operations <NUM>, <NUM>, and <NUM>. Operation <NUM> zeroes page <NUM>, operation <NUM> zeroes page <NUM>, and operation <NUM> zeroes page <NUM>. Once the memory pages have been set to the desired value, application <NUM> provides memory reallocation <NUM> to the reallocation requestor.

With reference to <FIG>, this figure depicts a flowchart of an example process for minimizing delay while migrating DMA mapped pages in accordance with an illustrative embodiment. Process <NUM> can be implemented in application <NUM> in <FIG>.

In block <NUM>, the application identifies a memory page to be reallocated and migrates data in the page to another location. In block <NUM>, the application determines whether the page being reallocated is enabled for DMA operation. If yes ("YES" path of block <NUM>), in block <NUM> the application sets a DMA delay flag for this page. If not ("NO" path of block <NUM>), or after block <NUM>, in block <NUM> the application determines whether another page is being reallocated. If yes ("YES" path of block <NUM>), the application returns to block <NUM>. If not ("NO" path of block <NUM>), in block <NUM> the application determines whether the DMA flag is set for a memory page in a set of pages being reallocated. If yes ("YES" path of block <NUM>), in block <NUM> the application performs a pre-access delay. If not ("NO" path of block <NUM>), or after block <NUM>, in block <NUM> the application writes initial data to the set of pages and release the set of pages for use. Then the application ends.

It is understood that the types of computing devices 54A-N depicted are intended to be illustrative only and that computing nodes <NUM> and cloud computing environment <NUM> can communicate with any type of computerized device over any type of network and/or network addressable connection (e.g., using a web browser).

It should be understood in advance that the components, layers, and functions depicted are intended to be illustrative only and embodiments of the invention are not limited thereto.

Workloads layer <NUM> provides examples of functionality for which the cloud computing environment may be utilized. Examples of workloads and functions which may be provided from this layer include: mapping and navigation <NUM>; software development and lifecycle management <NUM>; virtual classroom education delivery <NUM>; data analytics processing <NUM>; transaction processing <NUM>; and application selection based on cumulative vulnerability risk assessment <NUM>.

Thus, a computer implemented method, system or apparatus, and computer program product are provided in the illustrative embodiments for minimizing delay while migrating DMA mapped pages and other related features, functions, or operations. Where an embodiment or a portion thereof is described with respect to a type of device, the computer implemented method, system or apparatus, the computer program product, or a portion thereof, are adapted or configured for use with a suitable and comparable manifestation of that type of device.

Where an embodiment is described as implemented in an application, the delivery of the application in a Software as a Service (SaaS) model is contemplated within the scope of the illustrative embodiments. In a SaaS model, the capability of the application implementing an embodiment is provided to a user by executing the application in a cloud infrastructure. The user can access the application using a variety of client devices through a thin client interface such as a web browser (e.g., web-based e-mail), or other light-weight client-applications. The user does not manage or control the underlying cloud infrastructure including the network, servers, operating systems, or the storage of the cloud infrastructure. In some cases, the user may not even manage or control the capabilities of the SaaS application. In some other cases, the SaaS implementation of the application may permit a possible exception of limited user-specific application configuration settings.

Claim 1:
A computer-implemented method comprising:
determining, during a memory reallocation process, that a set of memory pages being reallocated are each enabled for a Direct Memory Access, DMA, operation (<NUM>); and
performing, subsequent to completion of the memory reallocation process, prior to writing initial data to the set of memory pages, a pre-access delay (<NUM>), the pre-access delay performed concurrently for each memory page in the set of memory pages wherein the pre-access delay is performed by delaying program instruction execution for a predetermined amount of time.