Patent Description:
In the context of growing product functionalities of component carriers equipped with one or more electronic components and increasing miniaturization of such components as well as a rising number of components to be mounted on or embedded in the component carriers such as printed circuit boards, increasingly more powerful array-like components or packages having several components are being employed, which have a plurality of contacts or connections, with ever smaller spacing between these contacts. Removal of heat generated by such components and the component carrier itself during operation becomes an increasing issue. At the same time, component carriers shall be mechanically robust and electrically reliable so as to be operable even under harsh conditions.

<CIT> discloses a component carrier comprising a stack having at least one electrically conductive layer structure and at least one electrically insulating layer structure; a semiconductor component embedded in the stack; a highly conductive block embedded in the stack and being thermally and/or electrically coupled with the semiconductor component.

<CIT> discloses a semiconductor device assembly apparatus comprising a die comprising a first side and an opposite second side, the first side comprising a first type of system level contact points and the second side comprising a second type of system level contact points; and a package substrate coupled to one of the first side of the die and the second side of the die. A thermal interface material is arranged between the die and an integrated heat spreader.

<CIT> discloses a package structure including a dielectric layer, at least one semiconductor device attached to the dielectric layer, one or more dielectric sheets applied to the dielectric layer and about the semiconductor device(s) to embed the semiconductor device(s) therein, and a plurality of vias formed to the semiconductor device(s) that are formed in at least one of the dielectric layer and the one or more dielectric sheets. The semiconductor device is connected to a copper shim by a solder.

<CIT> discloses a semiconductor package including a substrate including an antenna; a heating element disposed on a first surface of the substrate and connected to the antenna; a heat radiating part coupled to the heating element; and a signal transfer part disposed on the first surface of the substrate and configured to electrically connect the substrate to a main substrate. The heat radiating part includes a heat transfer part connected to the heating element and heat radiating terminals connecting the heat transfer part and the main substrate to each other. A bonding layer is arranged between the heating element and a heat transfer part.

<CIT> discloses package structure includes two insulation layers, three conductive layers, and two electronic components. The first and second conductive layers are disposed on a top surface and a bottom surface of the first insulation layer, respectively. The second insulation layer is disposed over the first conductive layer. The third conductive layer is disposed on a top surface of the second insulation layer. The first and second electronic components are embedded within the first and second insulation layers, respectively. The first conducting terminals of the first electronic component are electrically connected with the first conductive layer and the second conductive layer through at least one first conductive via and at least one second conductive via. The second conducting terminals of the second electronic component are electrically connected with the first conductive layer and/or electrically connected with the third conductive layer through at least one third conductive via. A component is connected to a conductive layer via a solder.

<CIT> discloses a multilayer board including a base including insulating layers stacked in a stacking direction, and a mounting surface at an end of the base in a first direction along the stacking direction, an electronic component inside the base, and a first heat dissipator extending through at least one of the insulating layers from a surface of the electronic component located at an end of the electronic component in the first direction to the mounting surface. The electronic component is directly connected to a heat dissipator without any electrically conductive layer structure in between.

<CIT> discloses a semiconductor device comprising a multi-layer wiring substrate including a plurality of wiring layers; and a double-sided multi-electrode chip including a semiconductor chip having first and second sides opposite to each other, the double-sided multi-electrode chip having a plurality of electrodes on both of the first and second sides of the semiconductor chip, wherein the double-sided multi-electrode chip is embedded in the multilayer wiring substrate in such a manner that the double-sided multi-electrode chip is not exposed outside the multilayer wiring substrate, and the plurality of electrodes is connected to the plurality of wiring layers. The chip is directly connected to a heatsink without any electrically conductive layer structure in between.

<CIT> discloses a method for fabricating a microelectronic system, comprising obtaining a substrate having a tunnel therethrough: attaching a microelectronic component to a frontside of the substrate at a location enclosing the tunnel utilizing a solder material having a first thermal conductivity; and producing an embedded heat dissipation structure at least partially contained within the tunnel after attaching the microelectronic component to the substrate, producing comprising: applying a bond layer precursor material into the tunnel and onto the microelectronic component from a backside of the substrate; curing the bond layer precursor material to form a thermally-conductive component bond layer in contact with the microelectronic component; and formulating the bond layer precursor material such that, after curing, the thermally-conductive component bond layer has a second thermal conductivity substantially equivalent to or exceeding the first thermal conductivity. A heat-generating microelectronic component is directly coupled to a thermal conduit member via a bond layer.

In particular, efficiently embedding a component in a component carrier is an issue.

There may be an object of providing a component carrier, a method of manufacturing a component carrier, and a method of use the component carrier, where a component can efficiently be embedded the component carrier. This object is achieved by the component carrier having the features of claim <NUM>, to a method of manufacturing a component carrier having the features of claim <NUM>, and to a method of use the component carrier having the features of claim <NUM>.

According to an exemplary embodiment of the invention, a component carrier is provided, wherein the component carrier comprises a stack comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure, a semiconductor component (or multiple components) embedded in the stack, and a highly conductive block provided with a sinter connection structure on one main surface of the highly conductive block, wherein the highly conductive block is embedded in the stack and inserted into a cavity, a bottom of which is delimited by the electrically conductive layer structure, and the sinter connection structure of the highly conductive block is connected to the electrically conductive layer structure delimiting the bottom of the cavity so that the highly conductive block is thermally coupled with the semiconductor component via the electrically conductive layer structure in between.

According to another exemplary embodiment of the invention, a method of manufacturing a component carrier is provided, wherein the method comprises forming (in particular laminating) a stack comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure, embedding a semiconductor component in the stack, providing a highly conductive block with a sinter connection structure on one main surface of the highly conductive block, and embedding the highly conductive block in the stack by inserting the same into a cavity, a bottom of which is delimited by the electrically conductive layer structure, and connecting the sinter connection structure of the highly conductive block to the electrically conductive layer structure delimiting the bottom of the cavity so that the highly conductive block is thermally coupled with the semiconductor component via the electrically conductive layer structure in between.

According to yet another exemplary embodiment of the invention, a component carrier having the above-mentioned features is used for conducting an electric current of at least <NUM> Ampère (in particular in a range between <NUM> Ampère and <NUM> Ampère) by the block (and optionally additionally by the semiconductor component and/or at least one of the at least one electrically conductive layer structure).

In the context of the present application, the term "semiconductor component" may particularly denote a component comprising a semiconductor material, in particular as a primary or basic material. The semiconductor material may for instance be a type IV semiconductor such as silicon or germanium, or may be a type III-V semiconductor material such as gallium arsenide. In particular, the semiconductor component may be a semiconductor chip such as a naked die or a molded die.

In the context of the present application, the term "highly conductive block" may particularly denote a bulky body (such as a body shaped as a cuboid or cylinder or disc) made of a material having a high electrical conductivity and/or a high thermal conductivity. In terms of electrical conductivity, a highly electrically conductive block has a metallic conductivity, i.e. an electrical conductivity as a metal. For instance, the electrical conductivity of the electrically highly conductive body at <NUM> is at least <NUM>·<NUM><NUM> S/m, in particular at least <NUM>·<NUM><NUM> S/m. In terms of thermal conductivity, the thermal conductivity of the material of a thermally highly conductive block is at least <NUM> W/mK, in particular at least <NUM> W/mK.

According to an exemplary embodiment of the invention, a component carrier is provided which has embedded in an interior thereof, in particular completely within stack material, a semiconductor component such as a silicon chip, and a highly conductive block connected to the semiconductor component. Advantageously, the embedded semiconductor component and the embedded block are thermally coupled with one another. By taking this measure, it is efficiently possible to conduct electricity and/or heat from the semiconductor component generated during operation of the component carrier away from an interior of the component carrier (in particular up to a periphery) via the highly conductive block with low electric resistance and/or low thermal resistance and with short thermal and/or electric path(s). This improves the electric performance, the thermal performance and thus the overall reliability of the component carrier, since undesired effects such as the generation of thermal load and consequently undesired phenomena such as warpage may be strongly suppressed. In addition, when electrically coupling embedded semiconductor component and embedded block, extremely high electric current of <NUM> Ampère or more can be conducted through the bulky block without excessive heating of the component carrier. It may also be possible to use the block synergistically to remove considerable amount of heat generated by such a high current operation of the component carrier.

In the following, further exemplary embodiments of the manufacturing method, the method of use, and the component carrier will be explained.

In an embodiment, the highly conductive block and the semiconductor component are placed on opposite sides of the same electrically conductive layer structure.

In an embodiment, the electrically conductive layer structure is composed of a patterned copper foil.

In an embodiment, the semiconductor component is embedded in the stack more centrally (in particular deeper in an interior of the stack and/or closer to a vertical center of the stack) in a stacking direction of the stack than the block. Thus, the block may be embedded more peripherally in the stack than the semiconductor component. A flow of heat and/or electricity may thus be from the central semiconductor component to the more peripheral block. This enables the block to contribute to a flow of heat and/or electric current and/or signals from an interior to an exterior of the stack. In other words, the block may be arranged closer to the periphery of the stack than the more centrally located semiconductor component.

Alternatively, it is also possible that the semiconductor component is embedded in the stack less centrally than the block. It is also possible that the semiconductor component and the stack are embedded at corresponding levels in the stack. In particular, the component carrier may have a symmetrical or an asymmetrical build-up. Even with an asymmetric build up, it may be advantageous (although this is not mandatory) that the semiconductor component is located more centrally than the block, as a block located towards the outside or one outer surface of the package may conduct heat and/or current in a particular efficient way.

The block is a thermally highly conductive block and/or an electrically highly conductive block. When the block is made of a material having a high electric and thermal conductivity, the block may synergistically contribute to heat removal during operation of the component carrier as well as conductance of electric current or electric signals from the embedded semiconductor component to an electronic periphery or at least along electrically conductive traces of the component carrier.

In an embodiment, the block is made of copper and/or aluminium. Copper and aluminum both have a high conductivity in terms of electricity and heat and are also compatible with component carrier (in particular printed circuit board) manufacturing technology. However, it is also possible that the block comprises, additionally or alternatively, graphite, a graphite/aluminium compound, or a ceramic with a coating (in particular a copper coating).

In an embodiment, the block is an inlay. In this context, an inlay may be a readily manufactured body which is, only after completion of its manufacture, inserted into the stack. For example, an inlay may be a solid body being substantially free of interior voids.

In an embodiment, the block is formed as a three-dimensional sinter body. Correspondingly, the manufacturing method may comprise forming the block by carrying out a three-dimensional sinter process. For example, such a three-dimensional sinter process may be carried out by additive manufacturing, in particular by sintering highly conductive powder by a laser treatment or the like. Hence, sintering the block can be made possible for instance with a three-dimensional additive manufacturing technology such as three-dimensional printing. It is however also possible that thermal energy required for sintering is provided in another way, for instance in an oven. Thus, the block can be formed by sintering.

The connection of sinter particles by sintering to form the block may be carried out before inserting the sintered block in a cavity of the stack. It may however also be possible to manufacture the block by sintering material during manufacture of the component carrier, for instance after having placed sinter powder in a cavity in the stack, and by subsequently sintering the sinter powder in the cavity to thereby form the block by interconnecting the sinter powder particles.

Advantageously, the manufacturing method may comprise connecting the semiconductor component to the block by sintering. Correspondingly, the component carrier comprises a sinter connection structure as an interface between body and semiconductor component. Highly advantageously, the connection of the block to the stack and to the semiconductor component is accomplished by sintering. Thereby, a reliable connection can be established during manufacturing the block. Energy required for establishing this interconnection between the block on the one hand and the semiconductor component and/or the electrically conductive layer structure on the other hand may be provided by energy supplied during or for lamination of the stack, by a laser beam, etc..

In an embodiment, the block extends up to (i.e. is aligned with or in flush with) an exterior main surface of the stack or extends only partially beyond (i.e. protrudes over) an exterior main surface of the stack. By extending up to a surface or even protruding beyond an exterior surface of the stack, the block may be mounted at a periphery of the stack and therefore in a way as to be able to remove efficiently heat out of an interior of the component carrier.

In an embodiment, the block is configured for removing and/or spreading heat generated by the semiconductor component during operation of the component carrier. For instance, when the semiconductor component is a power semiconductor or another high performance semiconductor chip such as a microcontroller, significant amount of heat can be generated during operation. This heat can be removed at least partially out of an interior of the component carrier so as to reduce thermal load and undesired phenomena such as warpage or the formation of cracks. Heat spreading (preferably over an angle of at least <NUM>°) may relate to the distribution of heat from a hotspot over a larger area or volume of the component carrier so as to reduce or equilibrate temperature differences in an interior of the component carrier.

In an embodiment, the block is connected with the at least one electrically conductive layer structure and/or with the semiconductor component for conducting electric current or electric signals during operation of the component carrier. Thus, an electrically conductive connection between the block and an electrically conductive portion (in particular one or more pads) of the semiconductor component may be established. By taking this measure, the massive block may carry electric current or electric signals in a low ohmic way during operation of a component carrier.

Advantageously, the block may be configured to contribute both to heat removal and conductance of an electric current.

In an embodiment, the component carrier comprises at least one further highly conductive block, in particular having the above-mentioned features, embedded in the stack in such a way that the semiconductor component is embedded in the stack more centrally in a stacking direction of the stack compared to the at least one further block. By integrating multiple highly conductive blocks in one and the same component carrier, the electric and/or thermal performance of the component carrier may be further improved.

Also in the presence of at least one further highly conductive block, the component carrier may have a symmetrical or an asymmetrical build-up.

In an embodiment, the at least one further highly conductive block extends up to or beyond one or both opposing main surfaces of the component carrier. Thus, also the at least one further block may be arranged closer to a periphery of the stack than the semiconductor component being embedded deeper inside of the stack. Therefore, the multiple blocks may cooperate to remove heat out of an interior of the component carrier and/or to conduct an electric current with low resistance or impedance.

In an embodiment, the block and at least one of the at least one further block are arranged side-by-side rather than being vertically displaced along the stacking direction. For instance, multiple blocks can be arranged horizontally adjacent to one another, i.e. at the same vertical level inside of the stack. By taking this measure, it is for instance possible to remove heat or conduct electric current in relation to multiple semiconductor components being embedded in the stack, wherein each of such multiple semiconductor components may be assigned to a respective one of the blocks in terms of electric coupling and/or thermal coupling.

In an embodiment, the block and at least one of the at least one further block are arranged for vertically sandwiching the semiconductor component in between. In other words, the block and the at least one further block may be displaced vertically, i.e. may be separated along the stacking direction. In particular, arranging two highly conductive blocks on both opposing main surfaces of the semiconductor component may further improve the thermal and/or electrical performance of the component carrier. For instance, this may be advantageous when both opposing main surfaces of the semiconductor component have pads, i.e. are electrically connected face up and face down. It is however also possible that one block conducts electric current and is connected to pads of the semiconductor component, whereas the opposing other highly conductive block is used to remove heat out of an interior of the component carrier.

In an embodiment, the semiconductor component is a power semiconductor chip. When the semiconductor component is a power semiconductor (for instance a transistor chip), enormous amounts of heat may be generated during operation of the component carrier. Removing this heat out of an interior of the stack suppresses undesired phenomena resulting from excessive thermal load, such as warpage or cracks.

In an embodiment, the component carrier comprises a heat sink or cooling body attached to an exterior main surface of the block. Such a heat sink may for instance be a cooling body with cooling fins or may be a fluid-based cooling body cooling the component carrier by a flow of gas (for instance air) or liquid (for instance water).

In an embodiment, the component carrier comprises a dielectric and heat conductive thermal interface material (TIM) attached to an exterior main surface of the block. For instance, such a TIM may be connected to a heat sink attached to the stack. Such a thermal interface material may be a material having a dielectric behavior but a high thermal conductivity so as to ensure a reliable electric isolation and at the same time a proper removal of heat out of an interior of the component carrier.

In an embodiment, the component carrier comprises a cooling channel formed in the block and being configured for accommodating cooling fluid. The cooling channel may also extend partially through the block and partially through the stack. Such a cooling channel may be formed for instance by drilling, milling or etching an interior channel in the block and by guiding a coolant (such as air or water) to the channel. It is also possible to embed a filament (as a sacrificial structure) in a preform of the block (for instance within not yet connected sinter particles) and/or the stack (for instance between layer structures of the stack), interconnect block and stack (for example by sintering and lamination), and to subsequently pull the filament out of the interconnected block and/or stack so that the cooling channel is created where the filament has been located before.

In an embodiment, the component carrier comprises a heat pipe thermally connected to the block, in particular partially arranged inside of the block and partially outside of the block. For instance, the heat pipe may extend up to or even beyond a lateral sidewall of the stack. In the context of the present application, the term "heat pipe" may particularly denote a heat-transfer structure that combines the principles of both thermal conductivity and phase transition of a fluid in an interior of the heat pipe to efficiently manage the transfer of heat from the block to a periphery of the component carrier. At a hot interface of a shell of the heat pipe the fluid in a liquid phase in contact with the thermally conductive block turns into a gas/vapor by absorbing heat from the block. The gas/vapor then travels, guided by a guiding structure, along the heat pipe structure to a cold interface of the shell at or even outside of an exterior surface of the stack and condenses back into a liquid, thereby releasing the latent heat or phase transition heat. The liquid then returns, guided by the guiding structure, to the hot side through one or more mechanisms such as capillary action, centrifugal force, gravity, or the like, and the cycle repeats. However, heat pipes may also use another heat transporting medium than a fluid, for instance a solid such as wax. Such a heat pipe may also significantly contribute to the removal of heat out of an interior of the component carrier. For instance, one portion of the heat pipe may be embedded in the block (which can be advantageously accomplished by sintering), whereas another portion of the heat pipe extends to a periphery of the stack or even beyond the stack and thereby guides the heat out of the component carrier.

In an embodiment, the semiconductor component is an active component or a passive component. An active component may be any type of circuit component with the ability to electrically control electron flow (for instance according to the principle: "electricity controlling electricity"). Components being not capable of controlling current by another electrical signal may be denoted as passive components. Resistors, capacitors, inductors, transformers, and diodes are examples for passive components. Examples for active components are transistors, circuits composed of multiple transistors, silicon-controlled rectifiers, etc. Thus, the described concept of embedding one or more semiconductor components is very flexible in terms of implemented semiconductor components and can be used for both passive components (for instance a diode) or active components (for instance a transistor-based semiconductor component).

In an embodiment, the block is directly connected to the semiconductor component, in particular by the sinter connection structure of the block or of the semiconductor component. By directly connecting the block to the semiconductor component, a particularly appropriate electric and/or thermal coupling may be established.

In another embodiment, the block is mechanically connected to the semiconductor component via the at least one electrically conductive layer structure. By arranging at least one electrically conductive layer structure between the block and the semiconductor component, further tasks such as establishing an electric redistribution may be realized.

In an embodiment, at least part of at least one main surface and/or at least part of at least one sidewall of the block is covered or surrounded with at least one of the at least one electrically conductive layer structure. For instance, it is possible to fully surround one or both main surfaces and/or to fully surround one or more sidewalls of the block with electrically conductive material of the mentioned layer structure(s). Thus, the block may be encapsulated partially or entirely along one or more surfaces thereof by an electrically conductive material such as copper. This may further promote the thermal and/or electric coupling of the block with regard to the rest of the component carrier.

In an embodiment, the component carrier further comprises at least one further highly conductive block embedded in the stack, and in particular in such a way that the semiconductor component is embedded in the stack more centrally in a stacking direction of the stack compared to the at least one further block, and at least one further semiconductor component connected to the at least one further block so that a half-bridge configuration is formed.

In an embodiment, the semiconductor component comprises one or more electric contacts, and the semiconductor component is embedded in the stack face up so that the one or more electric contacts are oriented upwardly.

In an embodiment, the method comprises forming the cavity in the stack and subsequently inserting the block in the cavity. Formation of a cavity (i.e. a blind hole or a through-hole) in the stack (for instance in a central core thereof) or in a peripheral portion of the stack renders it possible to easily embed the block and/or the semiconductor component by simply placing it in the cavity. For instance, the cavity may be formed by mechanically drilling, laser processing, etching, etc..

In an embodiment of the method, the highly conductive block and the semiconductor component are placed on opposite sides of the same electrically conductive layer structure.

In an embodiment, the method comprises forming the cavity by integrating a non-adhesive release structure in the stack, and removing a piece of stack material above the release structure to thereby obtain the cavity. The piece may be spatially delimited by the non-adhesive release structure and by a circumferential cutting line, which may be formed for instance by mechanically cutting or laser cutting. According to such a preferred embodiment, a release layer made of a material having non-adhesive properties with regard to surrounding component carrier material is firstly embedded in the stack. Secondly, a portion of the stack above the release layer can be removed by cutting a circumferential line from an exterior of the stack extending up to the release layer. This can for instance be accomplished by mechanically drilling or by laser drilling. Due to the non-adhesive properties of the release layer, the circumferentially separated piece of the stack above the release structure or layer can be subsequently simply be taken out of the stack, and a cavity may be obtained. Semiconductor component and/or block may be subsequently simply placed inside the cavity for embedding.

In an embodiment, the component carrier comprises a stack of at least one electrically insulating layer structure and at least one electrically conductive layer structure. For example, the component carrier may be a laminate of the mentioned electrically insulating layer structure(s) and electrically conductive layer structure(s), in particular formed by applying mechanical pressure and/or thermal energy. The mentioned stack may provide a plate-shaped component carrier capable of providing a large mounting surface for further components and being nevertheless very thin and compact.

A plate-shaped component carrier also ensures short electric connection paths, and therefore suppresses signal distortion during transport.

In an embodiment, the component carrier is configured as one of the group consisting of a printed circuit board, a substrate (in particular an IC substrate), and an interposer.

In the context of the present application, the term "printed circuit board" (PCB) may particularly denote a plate-shaped component carrier which is formed by laminating several electrically conductive layer structures with several electrically insulating layer structures, for instance by applying pressure and/or by the supply of thermal energy. As preferred materials for PCB technology, the electrically conductive layer structures are made of copper, whereas the electrically insulating layer structures may comprise resin and/or glass fibers, so-called prepreg or FR4 material. The various electrically conductive layer structures may be connected to one another in a desired way by forming through-holes through the laminate, for instance by laser drilling or mechanical drilling, and by filling them with electrically conductive material (in particular copper), thereby forming vias as through-hole connections. Apart from one or more components which may be embedded in a printed circuit board, a printed circuit board is usually configured for accommodating one or more components on one or both opposing surfaces of the plate-shaped printed circuit board. They may be connected to the respective main surface by soldering. A dielectric part of a PCB may be composed of resin with reinforcing fibers (such as glass fibers).

In the context of the present application, the term "substrate" may particularly denote a small component carrier having substantially the same size as a component (in particular an electronic component) to be mounted thereon. More specifically, a substrate can be understood as a carrier for electrical connections or electrical networks as well as component carrier comparable to a printed circuit board (PCB), however with a considerably higher density of laterally and/or vertically arranged connections. Lateral connections are for example conductive paths, whereas vertical connections may be for example drill holes. These lateral and/or vertical connections are arranged within the substrate and can be used to provide electrical and/or mechanical connections of housed components or unhoused components (such as bare dies), particularly of IC chips, with a printed circuit board or intermediate printed circuit board. Thus, the term "substrate" also includes "IC substrates". A dielectric part of a substrate may be composed of resin with reinforcing particles (such as reinforcing spheres, in particular glass spheres).

The substrate or interposer may comprise or consist of at least a layer of glass, silicon (Si) or a photoimageable or dry-etchable organic material like epoxy-based build-up material (such as epoxy-based build-up film) or polymer compounds like polyimide, polybenzoxazole, or benzocyclobutene.

In an embodiment, each of the above mentioned electrically insulating layer structures comprises at least one of the group consisting of resin (such as reinforced or non-reinforced resins, for instance epoxy resin or Bismaleimide-Triazine resin), cyanate ester, polyphenylene derivate, glass (in particular glass fibers, multi-layer glass, glass-like materials), prepreg material (such as FR-<NUM> or FR-<NUM>), polyimide, polyamide, liquid crystal polymer (LCP), epoxy-based Build-Up Film, polytetrafluoroethylene (Teflon), a ceramic, and a metal oxide. Reinforcing materials such as webs, fibers or spheres, for example made of glass (multilayer glass) may be used as well. Although prepreg particularly FR4 are usually preferred for rigid PCBs, other materials in particular epoxy-based build-up film for substrates may be used as well. For high frequency applications, high-frequency materials such as polytetrafluoroethylene, liquid crystal polymer and/or cyanate ester resins, low temperature cofired ceramics (LTCC) or other low, very low or ultra-low DK-materials may be implemented in the component carrier as electrically insulating layer structure.

In an embodiment, each of the above mentioned electrically conductive layer structures comprises at least one of the group consisting of copper, aluminum, nickel, silver, gold, palladium, and tungsten. Although copper is usually preferred, other materials or coated versions thereof are possible as well, in particular coated with supra-conductive material such as graphene.

In an embodiment, the semiconductor component may be a power semiconductor chip comprising a transistor and/or a diode. However, the semiconductor component may also be a microprocessor. In yet another embodiment, the semiconductor component may be a radiofrequency semiconductor chip configured for emitting and/or receiving radiofrequency signals. Hence, the semiconductor component may be configured for executing a radio frequency application, in particular a radio frequency application involving frequencies above <NUM>.

At least one further component may be surface mounted on and/or embedded in the component carrier and can in particular be selected from a group consisting of an electrically non-conductive inlay, an electrically conductive inlay (such as a metal inlay, preferably comprising copper or aluminum), a heat transfer unit (for example a heat pipe), a light guiding element (for example an optical waveguide or a light conductor connection), an electronic component, or combinations thereof. For example, the component can be an active electronic component, a passive electronic component, an electronic chip, a storage device (for instance a DRAM or another data memory), a filter, an integrated circuit, a signal processing component, a power management component, an optoelectronic interface element, a light emitting diode, a photocoupler, a voltage converter (for example a DC/DC converter or an AC/DC converter), a cryptographic component, a transmitter and/or receiver, an electromechanical transducer, a sensor, an actuator, a microelectromechanical system (MEMS), a microprocessor, a capacitor, a resistor, an inductance, a battery, a switch, a camera, an antenna, a logic chip, and an energy harvesting unit. However, other components may be embedded in the component carrier. For example, a magnetic element can be used as a component. Such a magnetic element may be a permanent magnetic element (such as a ferromagnetic element, an antiferromagnetic element, a multiferroic element or a ferrimagnetic element, for instance a ferrite core) or may be a paramagnetic element. However, the component may also be a substrate, an interposer or a further component carrier, for example in a board-in-board configuration. The component may be surface mounted on the component carrier and/or may be embedded in an interior thereof. Moreover, also other components, in particular those which generate and emit electromagnetic radiation and/or are sensitive with regard to electromagnetic radiation propagating from an environment, may be used as component.

In an embodiment, the component carrier is a laminate-type component carrier. In such an embodiment, the component carrier is a compound of multiple layer structures which are stacked and connected together by applying a pressing force and/or heat.

According to an exemplary embodiment of the invention, a component carrier is provided in which a highly conductive block (preferably a copper block) is directly integrated with an (in particular active or passive) semiconductor component in a layer stack of a (for instance printed circuit board type, PCB) component carrier. This makes possible an improved cooling, heat conductance, heat spreading and a low ohmic current flow. The one or more (in particular copper) blocks can be integrated in direct or indirect contact after having embedded the semiconductor component in the stack. The semiconductor component may for instance be a power semiconductor chip. This allows connecting the semiconductor component chip within a component carrier stack with a very low thermal resistance.

For manufacturing such a component carrier, it is possible to insert an at least partially conductive block (for instance a copper block) as a conductive depot in a cavity. The cavity may be formed in a component carrier layer stack so as to at least partially connect the highly conductive block to the semiconductor component, for instance a MOSFET chip. This may allow obtaining an improved cooling, heat conductance, heat spreading and low ohmic current flow. For instance, it may be possible to obtain a current up to <NUM> kA, for instance when a copper block of a thickness of <NUM> is used.

When a semiconductor component such as a power semiconductor chip is to be embedded in a component carrier, the involved high currents and powers conventionally require thicker copper structures for conducting current and removing heat. This however involves an increased effort in terms of copper deposition, for instance by plating. This is in particular disturbing when copper is not desired in certain regions of a stack as part of electrically conductive layer structures of the stack.

According to an exemplary embodiment of the invention, the electrically conductive layer structures of the stack (in particular copper structures) may be maintained tiny, which is advantageous in view of the above considerations. At the same time, any issues concerning heat removal and/or low ohmic conductance of current and signals may be removed by the embedding of the one or more highly conductive blocks in the stack. In particular, heat spreading around an angle of about <NUM>° in an upward and/or downward direction may be achieved in this context. A high amount of copper in the electrically conductive traces may be advantageously prevented by exemplary embodiments of the invention.

Thus, in order to at least partially overcome the above-mentioned and/or other shortcomings, exemplary embodiments of the invention insert one or more highly conductive blocks (in particular copper blocks) as purely solid inlays or as porous sinter bodies in the stack and closely connected or coupled to the semiconductor component. This may improve heat removal and/or a low ohmic conductance of electric current or signals without the need to form electrically conductive traces or electrically conductive layer structures of the stack from thick copper material. As a result, a simple manufacturing of the component carrier may be made possible. It is particularly preferred to manufacture the one or more highly conductive blocks by three-dimensional laser sintering directly on copper material of the stack and/or of the semiconductor component. The block may be made of a highly electrically conductive and thermally conductive material such as a copper or aluminum.

According to an exemplary embodiment of the invention, a multi-layer stack is provided having a core with an embedded semiconductor component. One or more cavities may be formed in the stack, for instance using the above-described concept of buried release layers. Subsequently, one or more highly conductive blocks (such as copper blocks or three-dimensional copper sinter depots) may be inserted into the cavity and may be connected to the stack and/or to the semiconductor component preferably by sintering. Thus, a sinter structure may be formed between the block on the one hand and the electrically conductive layer structures and/or the pads of the semiconductor component on the other hand.

In an alternative embodiment, a block may firstly be connected to the semiconductor component. Subsequently, the arrangement of block and semiconductor component may be embedded in a cavity of the stack of the component carrier.

In exemplary embodiments, a short thermal and/or electric path may be established in an interior of the component carrier. A direct or indirect coupling of the block to the semiconductor component is made possible. The block may be implemented for heat removal and/or conductance of electric current.

Exemplary embodiments of the invention may have the advantage that it is possible to implement a highly conductive block which does not extend over the entire area of the component carrier. This makes a compact configuration possible. Furthermore, it is possible to properly thermally and/or electrically connect a highly conductive block in an interior of a component carrier. Furthermore, it may be possible to separate the semiconductor component at a sinter position with regard to the copper material so that the sinter layer can simultaneously function as a stress release layer.

<FIG> illustrate cross-sectional views of structures obtained during carrying out a method of manufacturing a component carrier <NUM> with an embedded semiconductor component <NUM>, shown in <FIG>, according to an exemplary embodiment of the invention.

Referring to <FIG>, constituents of a stack <NUM> are shown which are to be connected with one another, in particular by lamination. As shown, the layer stack <NUM> is composed of multiple planar layer structures <NUM>, <NUM> so that the formed component carrier <NUM> is a plate-shaped laminate type printed circuit board (PCB) component carrier. The constituents of the stack <NUM> comprise electrically conductive layer structures <NUM> and electrically insulating layer structures <NUM>. The electrically conductive layer structures <NUM> are composed of patterned metal layers such as patterned copper foils and may also comprise vertical through connections such as copper filled laser vias. The electrically insulating layer structures <NUM> may comprise sheets comprising resin (in particular epoxy resin), optionally comprising reinforcing particles (such as glass fibers or glass spheres) therein. For instance, the electrically insulating layer structures <NUM> may be made of prepreg.

Furthermore, a semiconductor component <NUM> such as a naked die is shown in <FIG> which is embedded in the stack <NUM>. As shown, the semiconductor component <NUM> has one or more electric contacts <NUM> (such as pads or pillars, preferably made of copper). In the shown embodiment, the electric contacts <NUM> are oriented upwardly, so that semiconductor component <NUM> is oriented face up. It is however alternatively also possible that the electric contacts <NUM> are oriented downwardly, so that semiconductor component <NUM> may be oriented face down. In still other embodiments, it is possible to provide electric contacts <NUM> on both opposing main surfaces of the semiconductor component <NUM>. For instance, the semiconductor component <NUM> is a power semiconductor chip like a silicon transistor chip. More generally, the semiconductor component <NUM> may be any active component or passive component. It is also possible to embed more than one semiconductor component <NUM> in the stack <NUM>, for instance one or more active components and/or one or more passive components. During operation of the readily manufactured component carrier <NUM>, the semiconductor component <NUM> may generate a considerable amount of heat.

More specifically, <FIG> shows a first core <NUM> composed of electrically conductive layer structures <NUM> and electrically insulating layer structures <NUM>.

The mentioned first core <NUM> is arranged in <FIG> adjacent to a central electrically insulating layer structure <NUM>, for instance a sheet of still uncured prepreg.

A second core <NUM> is arranged above said electrically insulating layer structure <NUM>. Said second core <NUM>, which may also be denoted as power core, already has embedded semiconductor component <NUM> such as a power semiconductor chip. An electrically conductive inlay <NUM>, for instance a copper inlay, is placed side-by-side to the semiconductor chip <NUM> within the second core <NUM>. A layer-shaped release structure <NUM> made of a non-adhesive material (such as a wax or polytetrafluoroethylene) is attached to a lower main surface of the second core <NUM>, to define a position where subsequently a cavity <NUM> is to be formed (compare <FIG>).

<FIG> also illustrates a stacking direction <NUM>, i.e. a direction along which the various layer structures <NUM>, <NUM> are stacked and will be interconnected. The stacking direction <NUM> is oriented perpendicular to the main surfaces of said layer structures <NUM>, <NUM> and the stack <NUM> formed on the basis of said layer structures <NUM>, <NUM>, as also indicated by right angles in <FIG>.

As shown in <FIG>, the cores <NUM>, <NUM> and the electrically insulating layer structure <NUM> in between are interconnected by lamination, i.e. the application of heat and/or pressure. As a result, integrally formed stack <NUM> is obtained.

Now referring to <FIG>, reference numeral <NUM> schematically illustrates a laser beam which cuts circumferentially out a disk-shaped or plate-shaped piece <NUM> of the stack <NUM> beneath the release structure <NUM>. In other words, the piece <NUM> is defined by the release structure <NUM> and by an obtained circumferential cutting line.

Referring to <FIG>, it is illustrated that cavity <NUM> is formed in the stack <NUM>. As shown and described, piece <NUM> of stack <NUM> above the release structure <NUM> may be removed after the circumferential cutting procedure shown in <FIG> to thereby obtain the cavity <NUM>. Due to the non-adhesive properties of the release structure <NUM>, the cut-out piece <NUM> (see <FIG>) can be simply taken out of the rest of the stack <NUM>.

Referring to <FIG>, a block <NUM> is shown which is shaped and dimensioned so as to be insertable in the cavity <NUM>. The block <NUM> is a thermally highly conductive and electrically highly conductive block <NUM> which is preferably made of copper. Advantageously, the block <NUM> may be formed as a three-dimensional sinter body. Thus, the method may comprise forming the block <NUM> by carrying out a three-dimensional sinter process. Alternatively, it is also possible that the block <NUM> is an inlay of solid non-porous copper. <FIG> shows the structure of <FIG> together with the highly conductive block <NUM> which is provided with a sinter connection structure <NUM> on one main surface of the block <NUM>. By the sinter connection structure <NUM>, the block <NUM> will later be connected to the stack <NUM>.

Furthermore, an additional sheet <NUM> is shown in <FIG>, which may be made of electrically insulating material. In one embodiment, the additional sheet <NUM> is made of prepreg. In another embodiment, the additional sheet <NUM> may be configured as a thermal interface material (TIM), as will be described in further detail referring to <FIG>. In the latter case, the material of the sheet <NUM> may be thermally conductive and electrically insulating.

<FIG> shows that the release structure <NUM> is removed from the bottom of the cavity <NUM> prior to subsequent processing. Due to the non-adhesive property of the material of the release structure <NUM>, it can be easily removed by a chemical and/or mechanical treatment.

Referring to <FIG>, the block <NUM> is inserted into the cavity <NUM>, and the sinter connection structure <NUM> of the block <NUM> is connected with one of the thin electrically conductive layer structures <NUM> delimiting a bottom of the cavity <NUM> (after having removed release structure <NUM>) by sintering. Thereby, also the semiconductor component <NUM> is thermally coupled with the block <NUM> via said thin electrically conductive layer structure <NUM> in between. Thus, the block <NUM> is mechanically and thermally connected to the semiconductor component <NUM> via said electrically conductive layer structure <NUM> and by said sinter connection structure <NUM>. Highly advantageously, the thermal path between semiconductor component <NUM> and block <NUM> may be extremely short, which may result in an excellent removal of heat generated by the semiconductor component <NUM> through the block <NUM>. More specifically, the block <NUM> is directly connected with said electrically conductive layer structure <NUM> and quasi directly with the semiconductor component <NUM>.

Thus, the block <NUM> is connected within the stack <NUM> for removing and spreading heat generated by the semiconductor component <NUM> during operation of the component carrier <NUM>. Due to the shown geometry, the block <NUM> may efficiently contribute to the removal of heat from an interior of the manufactured component carrier <NUM> towards the lower main surface of the stack <NUM>. As a result of the procedure of forming cavity <NUM> and inserting block <NUM> completely into cavity <NUM>, the block <NUM> completely fills cavity <NUM> and is therefore aligned with and flushes with an exterior main surface of the layer structures <NUM>, <NUM>.

Still referring to <FIG>, the copper block <NUM> is connected to said electrically conductive layer structure <NUM> of the stack <NUM> by sintering, to thereby connect the sinter connection structure <NUM> to the mentioned electrically conductive layer structure <NUM>.

As shown in <FIG>, the electrically insulating sheet <NUM> may be subsequently connected to the structure shown in <FIG>, for instance by adhesion or lamination.

As a result, component carrier <NUM> according to an exemplary embodiment of the invention and shown in <FIG> is obtained.

A schematic plan view <NUM> of <FIG> shows that the highly conductive block <NUM> couples the semiconductor component <NUM> also with electrically conductive inlay <NUM> (for instance a copper inlay). The inlay <NUM> may also be a copper pillar.

The illustrated component carrier <NUM> comprises the stack <NUM> comprising the laminated electrically conductive layer structures <NUM> and the laminated electrically insulating layer structures <NUM>. Semiconductor component <NUM> is fully embedded in the stack <NUM> so that electric contacts <NUM> extend up to an upper main surface of the component carrier <NUM> for connection to an electronic periphery. Highly conductive block <NUM> is embedded within the stack <NUM> and is fully circumferentially surrounded by material of the stack <NUM>.

<FIG> additionally shows that an optional cooling channel <NUM> is formed in the block <NUM> (and optionally also in the stack <NUM>) and is configured for guiding cooling fluid, such as water or air, to further improve the cooling performance of the block <NUM>. By the cooling channel <NUM>, a coolant such as water or air can be guided to the embedded block <NUM> to further improve the capability of removing heat from thermally coupled semiconductor component <NUM>.

Cooling channel <NUM> may be formed by drilling, etching or laser processing. Alternatively, a filament (not shown) may be embedded in a preform of the block <NUM> (for instance within not yet connected sinter particles thereof). By pulling the filament (for instance made of steel) out of the block <NUM> after sintering, the cooling channel <NUM> can be created within block <NUM>. The described concept of a filament as sacrificial structure may be also applied when the cooling channel <NUM> shall partially extend through the layer structures <NUM>, <NUM>, <NUM> of the stack <NUM>.

<FIG> illustrates a cross-sectional view and <FIG> shows a partial top view of a component carrier <NUM> according to another exemplary embodiment of the invention.

The component carrier <NUM> according to <FIG> and <FIG> comprises a further highly conductive block <NUM> which may have the same features as previously described block <NUM>. Moreover, the component carrier <NUM> according to <FIG> and <FIG> comprises a further semiconductor component <NUM> which may have the same features as previously described semiconductor component <NUM>. According to <FIG>, the embedding of the (in the shown embodiment two) highly thermally conductive blocks <NUM> in the stack <NUM> is carried out so that the (in the shown embodiment two) semiconductor components <NUM> are embedded in stacking direction <NUM> of the stack <NUM> more centrally than the blocks <NUM>, being located closer to a periphery or an exterior main surface of the stack <NUM>. This results in a short thermal flow path oriented advantageously from the center towards a periphery of the stack <NUM>, so that the heat removal is highly efficient.

As shown, the block <NUM> and the further block <NUM> are arranged side-by-side and at the same vertical level of the stack <NUM>. Correspondingly, the semiconductor component <NUM> and the further semiconductor component <NUM> are arranged side-by-side and at the same vertical level of the stack <NUM>, but more centrally in the stack <NUM> than the blocks <NUM>, <NUM>. According to <FIG> and <FIG>, an embodiment is shown having two semiconductor components <NUM>, each assigned to a respective one of the blocks <NUM> in terms of thermal coupling.

In an embodiment, it is also possible that blocks <NUM> with a variable height are embedded in the stack <NUM> (for instance to balance out height differences or functional differences), depending on the power conditions of a respective application.

Furthermore, <FIG> shows a further build-up on an upper main surface of the semiconductor components <NUM>. This further build-up includes one or more further electrically insulating layer structures <NUM> and one or more further electrically conductive layer structures <NUM>, including vertical through-connections such as (in particular copper-filled) laser vias <NUM> and (in particular copper) pillars or posts <NUM>.

Again referring to the partial top view according to <FIG>, the chip-type semiconductor component <NUM> is laterally surrounded by conductive connections in form of vias (extending in z direction) as further electrically conductive layer structures <NUM>. Those vias in z direction may conduct electrical signals (as shown in <FIG>) as well as support to direct heat towards the blocks <NUM> and/or heat sinks <NUM> (while using as short paths as possible, compare <FIG>).

The second surface that can be seen from the top view of <FIG> is a conductive surface partially located below the semiconductor component <NUM>, partially extending laterally beyond the semiconductor component <NUM>.

<FIG> illustrate cross-sectional views of a component carrier <NUM> with embedded semiconductor components <NUM> in a half-bridge configuration according to still another exemplary embodiment of the invention.

Referring to <FIG>, the illustrated component carrier <NUM> comprises a heat sink <NUM> (such as a cooling body) attached to an exterior main surface of the stack <NUM>. Moreover, a thermally conductive and electrically insulating thermal interface material <NUM> may be arranged between blocks <NUM> and heat sink <NUM>. When a heat sink <NUM> is provided, it may also be possible to omit the thermal interface material <NUM>. The thermal interface material <NUM> and/or heat sink <NUM> may improve the cooling performance. Blocks <NUM> being thermally coupled with semiconductor components <NUM> may significantly contribute to heat removal and heat spreading and are thermally coupled to thermal interface material <NUM> and/or heat sink <NUM>.

Furthermore, a respective upper main surface and sidewalls of the block <NUM> are covered with or surrounded by electrically conductive layer structures <NUM>. Thus, <FIG> shows an embodiment in which the blocks <NUM> are surrounded at upper main surfaces as well as at its sidewalls by electrically conductive layer structures <NUM>. This establishes an electric coupling of the blocks <NUM> to the semiconductor components <NUM> and ensures a high current conductance by the blocks <NUM> (for instance by a parallel circuitry of the blocks <NUM>). Thus, according to <FIG>, the blocks <NUM> are electrically coupled in a low ohmic fashion with the semiconductor components <NUM> and can carry current during operation of the component carrier <NUM>. For instance, the shown arrangement is compatible with current values of <NUM> Ampère or more flowing through the blocks <NUM>.

Furthermore, an excellent heat management promoted by the blocks <NUM> can be combined with thick copper structures (see reference numeral <NUM>) for current management and thin signal lines (see reference numeral <NUM>).

The enormous heat removal by component carrier <NUM> is illustrated by arrows <NUM> in <FIG>.

Arrows <NUM> in <FIG> indicate a current flow. A phase connection is indicated with reference numeral <NUM>.

<FIG> illustrate cross-sectional views of structures obtained during carrying out a method of manufacturing a component carrier <NUM> with embedded semiconductor components <NUM> and an even larger number of embedded blocks <NUM>, shown in <FIG>, according to yet another exemplary embodiment of the invention.

In <FIG>, four highly electrically and highly thermally conductive blocks <NUM> are shown which are arranged on two opposing main surfaces of power core <NUM>.

<FIG> shows the four copper blocks <NUM> on both opposing main surfaces in a configuration in which the power core <NUM> has been connected with further cores <NUM>, <NUM> on both opposing main surfaces of power core <NUM>.

<FIG> illustrates that, by laser processing, portions of the further cores <NUM>, <NUM> may be removed by laser cutting or the like to form cavities <NUM> shown in <FIG> for embedding the blocks <NUM>. As described above, a release structure <NUM> may support this cavity formation procedure.

Referring to <FIG>, a component carrier <NUM> according to an exemplary embodiment of the invention is shown which is manufactured based on the structure shown in <FIG>. Each of the blocks <NUM> has meanwhile been inserted into a respective cavity <NUM>, and a sinter connection between the blocks <NUM> and adjacent electrically conductive layer structures <NUM> has meanwhile been established by sinter connection structures <NUM>. On a respective upper main surface of each of the semiconductor components <NUM>, the respective semiconductor component <NUM> is electrically and thermally coupled to a corresponding one of the blocks <NUM>. On a respective lower main surface of each of the semiconductor components <NUM>, the respective semiconductor component <NUM> is thermally coupled to a corresponding one of the blocks <NUM>. Furthermore, the upper blocks <NUM> are electrically and thermally coupled with the lower blocks <NUM> via electrically conductive layer structures <NUM>.

An optional heat pipe <NUM> is shown which is thermally connected to one of the blocks <NUM>. The heat pipe <NUM> is partially arranged inside of the block <NUM> and partially outside of block <NUM> and extends beyond a lateral sidewall of the stack <NUM>. Thus, heat pipe <NUM> is embedded partially in block <NUM>, partially in the stack <NUM> and partially extends beyond the stack <NUM>. Alternatively, the heat pipe <NUM> may also extend up to the sidewall of the stack <NUM>, i.e. in alignment with the sidewall of the stack <NUM>. Such a heat pipe <NUM> may significantly improve heat removal out of an interior of the component carrier <NUM>.

<FIG> shows a component carrier <NUM> in which, in addition to <FIG>, vertical through-connections <NUM> are formed extending through the entire stack <NUM> and also through some of the blocks <NUM>. The vertical through connections <NUM> may be formed by drilling and may be at least partially filled with electrically conductive material such as copper for further improving the electric performance and/or thermal performance of the component carrier <NUM>.

Claim 1:
Component carrier (<NUM>), wherein the component carrier (<NUM>) comprises:
a stack (<NUM>) comprising at least one electrically conductive layer structure (<NUM>) and at least one electrically insulating layer structure (<NUM>);
a semiconductor component (<NUM>) embedded in the stack (<NUM>);
characterised by
a highly conductive block (<NUM>) provided with a sinter connection structure (<NUM>) on one main surface of the highly conductive block (<NUM>), wherein the highly conductive block is an electrically highly conductive block with an electrical conductivity at <NUM> of at least <NUM>·<NUM><NUM> S/m and/or a thermally highly conductive block with a thermal conductivity of at least <NUM> W/mK;
the highly conductive block (<NUM>) is embedded in the stack (<NUM>) and inserted into a cavity (<NUM>), a bottom of which is delimited by the electrically conductive layer structure (<NUM>), and the sinter connection structure (<NUM>) of the highly conductive block (<NUM>) is connected to the electrically conductive layer structure (<NUM>) delimiting the bottom of the cavity (<NUM>) so that the highly conductive block (<NUM>) is thermally coupled with the semiconductor component (<NUM>) via the electrically conductive layer structure (<NUM>) in between.