Patent Description:
In known art, a light emitting element has been proposed that includes a semiconductor structure including an n-type semiconductor layer and a light emitting layer and a p-type semiconductor layer that are layered so as to expose a portion of the n-type semiconductor layer, an insulating film including a plurality of opening portions provided in the semiconductor structure, an n-electrode connected through an opening portion, of the plurality of opening portions, provided in the n-type semiconductor layer exposed from the light emitting layer and the p-type semiconductor layer, a p-electrode connected through an opening portion, of the plurality of opening portions, provided in the p-type semiconductor layer, a p-side external connection portion connected to the p-electrode, and an n-side external connection portion connected to the n-electrode (Japanese Translation of <CIT>, for example).

Document <CIT> relates to a light emitting element and a light emitting device. The light emitting element includes a semiconductor layered body, an insulating film, first and second electrodes, first external connecting parts and at least one second external connecting part. The semiconductor layered body includes a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The first electrode is connected to the first semiconductor layer at exposed parts through openings in the insulating film, and partially arranged on the second semiconductor layer via the insulating film. The first external connecting parts are connected to the first electrode. The first external connecting parts are spaced apart from the exposed parts in a plan view. A group comprising at least one of the first external connecting parts and other group comprising at least one of the first external connecting parts respectively surround adjacent ones of the exposed parts while being spaced apart from each other in the plan view.

Document <CIT> relates to a light emitting element including a semiconductor stacked body, an insulating film, first and second electrodes, a second external connection portion, and first external connection portions. The first semiconductor layer is exposed at a plurality of exposed portions disposed in a plurality of rows in plan view. The first external connection portions include at least one smaller - size first external connection portion disposed between adjacent ones of the rows other than the outermost one of the rows, and at least one larger - size first external connection portion extending from the end region, in which a spacing between a first outer edge of a second semiconductor layer and the exposed portions in the outermost one of the rows is narrower than a spacing between the exposed portions in adjacent ones of the rows, to at least a position between the outermost one of the rows and an adjacent one of the rows.

In such a light emitting element, in order to improve heat dissipation performance, it is preferable to increase the area over which the n-side external connection portion and the p-side external connection portion are disposed. On the other hand, when the light emitting element, in which the n-side external connection portion and the p-side external connection portion having the large area are disposed, is bonded to a substrate, it becomes necessary to increase an external force to be applied, and there is a risk that the insulating film and the electrodes may be damaged. Further, in consideration of the spread of a bonding material at the time of bonding, it is necessary to separate the n-side external connection portion from the p-side external connection portion. As a result of these factors, enlargement of the area of the external connection portion itself that can improve the heat dissipation performance is not sufficiently achieved.

The present disclosure has been made in light of such problems, and an object of the present disclosure is to provide a light emitting element and a light emitting device that can suppress an occurrence of damage to an insulating film, an electrode, and the like at a time of bonding, while improving heat dissipation performance.

The present invention is defined in independent claim <NUM>. The following aspects are disclosed.

According to a light emitting element and a light emitting device according to certain embodiments of the present disclosure, it is possible to suppress an occurrence of damage to an insulating film, an electrode, and the like at a time of bonding while improving heat dissipation performance.

Note that the drawings referred to in the following description are diagrams that schematically illustrate embodiments, and thus scales and intervals of members, positional relationships, and the like are exaggerated, or some of the members may not be illustrated in the drawings. Further, the scales and intervals of the members may not be the same between a plan view and a cross-sectional view thereof. Further, in the following description, members having the same designations and reference signs, in principle, represent the same members or equivalent members, and a detailed description of such members may be omitted as appropriate. In the present specification and the drawings, a first direction refers to a direction parallel to one side of a semiconductor layered body, and includes both a direction indicated by an arrow F and the opposite direction thereof. Similarly, a second direction refers to a direction orthogonal to the first direction, and includes both a direction indicated by an arrow S and the opposite direction thereof.

For example, as illustrated in <FIG>, a light emitting element <NUM> according to an embodiment of the present disclosure includes a semiconductor layered body <NUM> that includes a first semiconductor layer 13n, a light emitting layer 13a, and a second semiconductor layer 13p in this order, and further includes a plurality of exposed portions 13b in which the first semiconductor layer 13n is exposed from the second semiconductor layer 13p and the light emitting layer 13a. The light emitting element <NUM> covers the semiconductor layered body <NUM>, and includes an insulating film <NUM> including opening portions 14a above the plurality of exposed portions 13b, and a first electrode <NUM> connected to the exposed portions 13b at the opening portions 14a, a portion of the first electrode <NUM> being disposed on the second semiconductor layer 13p via the insulating film <NUM>. The light emitting element <NUM> includes a second electrode <NUM> connected to the second semiconductor layer 13p, first external connection portions <NUM> connected to the first electrode <NUM> and spaced apart from the exposed portions 13b in a plan view, and second external connection portions <NUM> connected to the second electrode <NUM>.

The semiconductor layered body <NUM> has a rectangular planar shape. The exposed portions 13b are arrayed so as to be exposed on the upper surface side of the second semiconductor layer 13p, and are surrounded by the second semiconductor layer 13p in a plan view.

The first external connection portions <NUM> include first portions <NUM>-<NUM> and second portions <NUM>-<NUM>. The first portions <NUM>-<NUM> are positioned between the exposed portions 13b adjacent to each other in the first direction F parallel to one side of the semiconductor layered body <NUM>, and a plurality of the first portions <NUM>-<NUM> are arrayed in the first direction F. In other words, the plurality of first portions <NUM>-<NUM> are disposed between the exposed portions 13b so that the first portions <NUM>-<NUM> overlap the exposed portions 13b when viewed along the first direction F. The first portions <NUM>-<NUM> are spaced apart from each other. The second portion <NUM>-<NUM> is not positioned between the exposed portions 13b in the first direction F. In other words, the second portions <NUM>-<NUM> do not overlap the exposed portions 13b when viewed along the first direction F. The second portion <NUM>-<NUM> has a planar shape that is different in shape or size from that of the first portion <NUM>-<NUM>, and a plurality of the second portions <NUM>-<NUM> are arrayed in the first direction F.

The light emitting element <NUM> as described above has a structure suitable for flip-chip mounting in which a surface, of the light emitting element <NUM>, provided with the first electrode <NUM> and the second electrode <NUM>, and the first external connection portions <NUM> and the second external connection portions <NUM> is used as a mounting surface. In the light emitting element <NUM>, a surface on the opposite side of the mounting surface serves as a main light extraction surface.

As will be described below, with the light emitting element <NUM>, since the planar area of a plurality of portions corresponding to the first external connection portions <NUM> is extremely small compared to the planar area of the light emitting element <NUM>, the plurality of portions can be disposed in a dense manner. As a result, the total planar area of the first external connection portions <NUM> can be increased, and heat dissipation performance can be improved when the light emitting element <NUM> is bonded to wires on a substrate. Further, by disposing a plurality of the first external connection portions <NUM> having the small planar area, an external force applied when bonding the light emitting element <NUM> to the wires on the substrate can be reduced, and it is thus possible to suppress damage to the insulating film <NUM> and the electrodes in the vicinity of the exposed portions 13b. As a result, it is possible to improve a bonding performance while maintaining reliability of the light emitting element <NUM>. Furthermore, the plurality of first external connection portions <NUM> (two or more) are disposed between adjacent ones of the exposed portions 13b, and the plurality of first external connection portions <NUM> disposed between adjacent ones of the exposed portions 13b are spaced apart from each other. Therefore, in a light emitting device to be described below, with respect to the light emitting element <NUM> that has been flip-chip mounted on a substrate <NUM>, when an uncured resin material containing a light reflective substance, which forms the resin member <NUM>, is poured between the light emitting element <NUM> and the substrate <NUM>, the resin member <NUM> is easily disposed directly below the adjacent exposed portions 13b. As a result, light traveling from the light emitting element <NUM> toward the substrate <NUM> can be reflected by the resin member <NUM> toward the light emitting element <NUM> side, so the light extraction efficiency of the light emitting device can be improved.

The semiconductor layered body <NUM> is constituted by the first semiconductor layer 13n, the light emitting layer 13a, and the second semiconductor layer 13p that are layered in this order. The semiconductor layered body <NUM> as described above is typically formed on a support substrate <NUM> having insulation properties, such as a sapphire substrate, for example. However, the support substrate <NUM> may finally be removed from the light emitting element <NUM>.

Examples of the semiconductor layered body <NUM> include various semiconductors, such as an III-V compound semiconductor and an II-VI compound semiconductor. Specifically, the examples include a nitride-based semiconductor material such as InXAlYGa<NUM>-X-YN (<NUM> ≤ X, <NUM> ≤ Y, X + Y ≤ <NUM>), and InN, AlN, GaN, InGaN, AlGaN, InGaAlN, and the like can be used. With respect to the film thickness of each of the layers and the layer structure, a film thickness and a layer structure known in this field can be employed.

The planar shape of the semiconductor layered body <NUM> may be a quadrangular shape or a quadrangular shape of which a part is missing, for example, and it is preferably a rectangular shape (a square, a rectangle, and the like). It is more preferable that the semiconductor layered body <NUM> have a rectangular shape that is short in the first direction F.

In a plan view, the semiconductor layered body <NUM> may further include an outer peripheral portion (13no in <FIG>) in which the first semiconductor layer 13n is exposed from the second semiconductor layer 13p and the light emitting layer 13a, over the entire outer periphery or a part of the outer periphery of the second semiconductor layer 13p.

One semiconductor layered body <NUM>, for example, as illustrated in <FIG> and <FIG>, may be disposed on one support substrate <NUM> in one light emitting element <NUM>. As illustrated in <FIG>, <FIG>, and <FIG>, one light emitting element <NUM> may include two or more light emitting portions in which at least the light emitting layer 13a and the second semiconductor layer 13p are spaced apart from each other. Hereinafter, the semiconductor layered body <NUM> constituting two or more of the light emitting portions spaced apart from each other in one light emitting element <NUM> may be referred to as a first light emitting portion, a second light emitting portion, and the like, respectively (see 10X and 10Y in <FIG>). The planar shape of the first light emitting portion and the second light emitting portion may be a quadrangular shape, and is preferably a rectangular shape. Of those, the planar shape of the first light emitting portion and the second light emitting portion is more preferably a rectangular shape having short sides along the first direction F. A first light emitting portion 10X and a second light emitting portion 10Y are preferably disposed in close proximity to each other. In <FIG>, the shortest distance between the first light emitting portion 10X and the second light emitting portion 10Y, which is indicated by a distance D3, is <NUM> or less, for example. Note that even between the light emitting portions, the outer peripheral portion 13no in which the first semiconductor layer 13n is exposed from the second semiconductor layer 13p and the light emitting layer 13a is provided.

The light emitting layer 13a, and the second semiconductor layer 13p provided on the upper surface of the light emitting layer 13a are provided in predetermined regions of the upper surface of the first semiconductor layer 13n. In other words, in some regions on the first semiconductor layer 13n, the second semiconductor layer 13p and the light emitting layer 13a are not present. In this way, a region in which the first semiconductor layer 13n is exposed from the light emitting layer 13a and the second semiconductor layer 13p and which is surrounded by the second semiconductor layer 13p in a plan view is referred to as the exposed portion 13b. In other words, the semiconductor layered body <NUM> has holes penetrating through the second semiconductor layer 13p and the light emitting layer 13a. In a plan view, a plurality of the holes provided in the semiconductor layered body <NUM> are spaced apart from each other. The side surfaces of the holes provided in the semiconductor layered body <NUM> include the side surfaces of the first semiconductor layer 13n, the side surfaces of the second semiconductor layer 13p, and the side surfaces of the light emitting layer 13a. Further, a portion of the first semiconductor layer 13n may be exposed from the side surfaces of the holes provided in the semiconductor layered body <NUM>.

The shape, size, position, and the number of the exposed portions 13b can be set appropriately in accordance with the size, shape, electrode shape, and the like of an intended light emitting element.

Examples of the shape of the exposed portion 13b in a plan view include a circular or elliptical shape, polygonal shapes such a triangular shape, a quadrangular shape, and a hexagonal shape, and of those, the circular shape is preferable. The plurality of exposed portions 13b may each have substantially the same planar shape and approximately the same size, or all or some of the exposed portions 13b may have planar shapes and sizes that are different from each other. By regularly aligning and disposing the plurality of exposed portions 13b of approximately the same size, a bias in current density distribution can be suppressed. As a result, luminance unevenness can be suppressed in the light emitting element as a whole.

The size of the exposed portion 13b can be set appropriately in accordance with the size of the semiconductor layered body, required output, luminance, and the like of the light emitting element, and the like. In a plan view, the exposed portion 13b preferably has a size having a diameter of <NUM> to <NUM>, for example. From another perspective, in a plan view, the diameter of the exposed portion 13b is preferably from <NUM>% to <NUM>% of one side of the semiconductor layered body <NUM>. A distance between the exposed portions 13b adjacent to each other may be from <NUM>/<NUM> to <NUM>/<NUM> of the one side of the semiconductor layered body <NUM>. The distance between the adjacent exposed portions 13b is preferably greater than the diameter of the exposed portion 13b. The distance between the adjacent exposed portions 13b may be the same for all of the adjacent exposed portions 13b, or may be different for some or all of the adjacent exposed portions 13b. From the perspective of suppressing the bias in the current density distribution, the distance between the adjacent exposed portions 13b is preferably substantially the same for all of the adjacent exposed portions 13b. Note that the distance between the adjacent exposed portions 13b is a distance between the centers of the exposed portions 13b in a plan view. In particular, it is preferable that the exposed portion 13b have a substantially circular shape in a plan view, the diameter thereof be from <NUM> to <NUM>, for example, and the exposed portions 13b be disposed on the upper surface side at a constant interval, for example, at an interval of <NUM> times to <NUM> times the diameter of the exposed portion 13b.

The exposed portions 13b are preferably disposed regularly in one light emitting element, and a plurality of the exposed portions 13b are preferably disposed in a matrix pattern, for example. As a result, the bias in the current density distribution in the light emitting element can be suppressed, and thus the luminance unevenness can be suppressed. Specifically, it is preferable that the exposed portions 13b be disposed regularly in a plurality of columns along the first direction F. Here, the first direction F refers to a direction parallel to one side of the semiconductor layered body <NUM>. For example, the plurality of exposed portions 13b are preferably disposed in two or more columns along the first direction F. Further, the exposed portions 13b are preferably also disposed in a plurality of rows in the second direction S that is orthogonal to the first direction F. For example, the plurality of exposed portions 13b are preferably disposed in two rows to <NUM> rows in the second direction S. As a result of arraying the plurality of exposed portions 13b in the first direction F and the second direction S, respectively, the first external connection portions <NUM>, which will be described below, can be spaced apart from each other between the rows and columns of the exposed portions 13b arrayed along the first direction F and the second direction S.

The number of exposed portions 13b arrayed along the first direction F is preferably two or more, and may be three or more, five or more, or seven or more. The number of exposed portions 13b aligned in the second direction S may be less than or greater than the number of exposed portions 13b aligned in the first direction F. The number of exposed portions 13b aligned in the second direction S is preferably greater than the number of exposed portions 13b aligned in the first direction F.

In a plan view, the exposed portions 13b arrayed along the first direction F preferably include a column adjacent to the second electrode <NUM>, which will be described below. The first external connection portion <NUM> is not disposed between the column, of the exposed portions 13b, adjacent to the second electrode <NUM> and the second electrode <NUM>.

A plurality of the exposed portions 13b are preferably disposed inside the semiconductor layered body <NUM>. In a plan view, the total planar area of the exposed portions 13b disposed inside the outer edge of the semiconductor layered body <NUM> is preferably <NUM>% or less, <NUM>% or less, <NUM>% or less, <NUM>% or less, <NUM>% or less, or <NUM>% or less of the area of the semiconductor layered body <NUM>. By having such a range, the luminance unevenness caused by the bias in the current density distribution in the semiconductor layered body <NUM> can be suppressed while securing the area of the light emitting layer 13a.

Further, the first semiconductor layer 13n may further include an outer peripheral exposed portion 13c in which the first semiconductor layer 13n is exposed from the second semiconductor layer 13p and the light emitting layer 13a, at the outer periphery of the second semiconductor layer 13p in a plan view. As described above, when the outer peripheral portion 13no that exposes the first semiconductor layer 13n is provided at the outer periphery of the semiconductor layered body <NUM>, the outer peripheral exposed portion 13c may be disposed as part of the outer peripheral portion 13no. Further, when the semiconductor layered body <NUM> constitutes the plurality of light emitting portions, the outer peripheral exposed portion 13c may also be disposed between the light emitting portions.

The exposed portions 13b and the outer peripheral exposed portions 13c are preferably disposed symmetrically with respect to a bisector bisecting the area of the semiconductor layered body <NUM> or the area of the light emitting portion in the first direction F or the second direction S.

The insulating film <NUM> covers the upper and side surfaces of the semiconductor layered body <NUM>. Further, the insulating film <NUM> has the opening portions 14a above the plurality of exposed portions 13b. Furthermore, the insulating film <NUM> has opening portions 14b above the second semiconductor layer 13p. The insulating film <NUM> is provided to prevent the first electrode <NUM> and the second semiconductor layer 13p, or the second electrode <NUM> and the first semiconductor layer 13n from being electrically connected to each other. Since the insulating film <NUM> covers the upper surface of the semiconductor layered body <NUM> and has the opening portions 14a above the exposed portions 13b, the first electrode <NUM> can be formed over a wide range of the upper surface of the insulating film <NUM> covering the upper surface of the second semiconductor layer 13p.

The insulating film <NUM> is preferably formed of a material and with a thickness that can ensure electrical insulation properties, using a material known in this field. Specifically, the insulating film <NUM> can be formed of a metal oxide, a metal nitride, or the like, and for example, can be formed of at least one type of an oxide or a nitride selected from a group consisting of Si, Ti, Zr, Nb, Ta, and Al. It is sufficient that the insulating film <NUM> be a film having a film thickness that can ensure the insulation properties.

The first electrode <NUM> and the second electrode <NUM> are disposed on the upper surface side of the semiconductor layered body <NUM>.

The first electrode <NUM> is connected to the exposed portions 13b at the opening portions 14a of the insulating film <NUM> above the exposed portions 13b. In this case, the first electrode <NUM> preferably covers the plurality of exposed portions 13b and is connected to each of the plurality of exposed portions 13b, and the first electrode <NUM> more preferably covers all of the exposed portions 13b, and is connected to all of the exposed portions 13b. The first electrode <NUM> is disposed not only on the first semiconductor layer 13n, but also above the second semiconductor layer 13p. In other words, the first electrode <NUM> is disposed, via the insulating film <NUM>, on the side surfaces of the light emitting layer 13a, the side surfaces of the second semiconductor layer 13p, and the upper surface of the second semiconductor layer 13p.

Note that when the semiconductor layered body <NUM> includes the outer peripheral portion 13no, the first electrode is preferably connected to a portion of the outer peripheral portion 13no. Further, when the first semiconductor layer 13n includes the outer peripheral exposed portion 13c, the first electrode <NUM> is preferably connected to the outer peripheral exposed portion 13c.

The second electrode <NUM> is disposed on the second semiconductor layer 13p and is connected to the second semiconductor layer 13p at the opening portions 14b of the insulating film <NUM> above the second semiconductor layer 13p.

The first electrode <NUM> and the second electrode <NUM> are not in contact with the first semiconductor layer 13n and the second semiconductor layer 13p, respectively, and may be electrically connected thereto via a conductive member such as a light reflective electrode <NUM> to be described below.

When the planar shape of the semiconductor layered body <NUM> has a rectangular shape, similarly, the planar shape of the outer edge of the first electrode <NUM> and the second electrode <NUM> is also preferably rectangular or substantially rectangular. In a plan view, the first electrode <NUM> and the second electrode <NUM> provided on one semiconductor layered body <NUM> are preferably disposed alternately in the second direction S. For example, in a plan view, the second electrode <NUM> is preferably disposed between the first electrodes <NUM>. In particular, when the semiconductor layered body <NUM> has a rectangular shape having short sides along the first direction F, it is preferable that, in a plan view, the second electrode <NUM> has a rectangular shape that is long in the first direction F, and that the first electrodes <NUM> are disposed with the second electrode <NUM> interposed therebetween in the second direction S. However, when the second electrode <NUM> is disposed between the first electrodes <NUM> in a plan view, the first electrodes <NUM> may be connected to each other at either side of the second electrode <NUM>.

The first electrode <NUM> and the second electrode <NUM> may be formed, for example, of a single-layer or layered film of a metal such as Au, Pt, Pd, Rh, Ni, W, Mo, Cr, Ti, Al, or Cu, or an alloy thereof. Specifically, the first electrode <NUM> and the second electrode <NUM> can be formed of a layered film such as Ti/Rh/Au, Ti/Pt/Au, W/Pt/Au, Rh/Pt/Au, Ni/Pt/Au, Al-Cu alloy/Ti/Pt/Au, Al-Si-Cu alloy/Ti/Pt/Au, Al-Si-Cu alloy/Ti/Pt/Au, Ti/Rh, or the like, each of which is layered in that order from the semiconductor layered body <NUM> side. The film thickness of the first electrode <NUM> and the second electrode <NUM> may be any film thickness of a film used in this field. Note that "Ti/Rh/Au" layered in that order from the semiconductor layered body <NUM> side means that Ti, Rh, and Au are layered in that order from the semiconductor layered body <NUM> side.

The light emitting element <NUM> preferably includes the light reflective electrode <NUM> interposed between the first electrode <NUM> and/or the second electrode <NUM>, and the second semiconductor layer 13p.

As the light reflective electrode <NUM>, an alloy whose principal components are Ag and Al, or one of those metals can be used, and in particular, it is preferable to use silver or a silver alloy having high light reflectivity with respect to light emitted from the light emitting layer 13a. The light reflective electrode <NUM> preferably has a thickness that can effectively reflect the light emitted from the light emitting layer 13a, and the thickness may be from <NUM> to <NUM>, for example. The greater the contact area between the light reflective electrode <NUM> and the second semiconductor layer 13p, the more preferable the configuration. Specifically, the total planar area of the light reflective electrode <NUM> may be <NUM>% or more, <NUM>% or more, or <NUM>% or more of the planar area of the semiconductor layered body <NUM>. The light reflective electrode <NUM> is preferably formed of a metal material having a reflectivity of <NUM>% or more, or preferably of <NUM>% or more with respect to a peak wavelength of the light from the light emitting layer 13a.

When the light reflective electrode <NUM> contains silver, a protective layer <NUM> covering the upper surface, or preferably the upper surface and the side surfaces of the light reflective electrode <NUM> may be provided to prevent migration of the silver. The protective layer <NUM> may be formed of a material similar to that of the insulating film <NUM> described above. For example, SiN is preferably used as the material of the protective layer <NUM>. Since a film formed of SiN is a dense film and can be easily formed, it is an excellent material for suppressing the penetration of moisture. The thickness of the protective layer <NUM> may be from <NUM> to <NUM> to effectively prevent the migration of the silver. When the protective layer <NUM> is formed by an insulating member, the protective layer <NUM> can cause the light reflective electrode <NUM> and the second electrode <NUM> to be electrically connected to each other by having an opening above the light reflective electrode <NUM>. Note that when the light emitting element <NUM> includes the light reflective electrode <NUM> and the protective layer <NUM> on the second semiconductor layer 13p, the insulating film <NUM> covering the semiconductor layered body <NUM> covers the light reflective electrode <NUM> and the protective layer <NUM>, and has an opening in a region directly below the second electrode <NUM>. As a result, the second electrode <NUM> and the light reflective electrode <NUM> are electrically connected to each other.

The first external connection portion <NUM> and the second external connection portion <NUM> are provided to be connected to wires to be described below.

The first external connection portion <NUM> is connected to the first electrode <NUM>. The first external connection portion <NUM> is provided on the first electrode <NUM> provided on the upper surface of the insulating film <NUM> above the second semiconductor layer 13p, and is connected to the first electrode <NUM>.

The first external connection portion <NUM> is disposed so as to be spaced apart from the exposed portion 13b in a plan view. Further, when the outer peripheral exposed portion 13c is present, the first external connection portion <NUM> is also spaced apart from the outer peripheral exposed portion 13c.

A plurality of the first external connection portions <NUM> are disposed on the first electrode <NUM>. The first external connection portions <NUM> include at least two portions, namely, the first portions <NUM>-<NUM> and the second portions <NUM>-<NUM>. The plurality of first portions <NUM>-<NUM> and second portions <NUM>-<NUM> are disposed along the first direction F.

The first portion <NUM>-<NUM> is positioned between the exposed portions 13b in the first direction F parallel to the one side of the semiconductor layered body <NUM>. For example, in a plan view, two of the first portions <NUM>-<NUM> may be disposed so as to sandwich one exposed portion 13b. The first portion <NUM>-<NUM> is spaced apart from the exposed portion 13b.

An interval between the first portion <NUM>-<NUM> and the exposed portion 13b in the first direction F may be from <NUM> to <NUM>, for example. By disposing the first portion <NUM>-<NUM> and the exposed portion 13b in close proximity to each other in this manner, heat generated around the exposed portion 13b can be efficiently released. Further, since the first portion <NUM>-<NUM> and the exposed portion 13b do not overlap with each other in a plan view, damage to the semiconductor layered body <NUM> around the exposed portion 13b, which occurs at a time of bonding, can be suppressed.

The plurality of first portions <NUM>-<NUM> disposed between the exposed portions 13b are spaced apart from each other. The first portions <NUM>-<NUM>, which are spaced apart from each other between the adjacent exposed portions 13b, are preferably spaced apart by <NUM> or more, for example. By setting such a distance, even when the first external connection portion <NUM> expands at the time of bonding, it is possible to prevent the adjacent first external connection portions <NUM> from coming into contact with each other. Then, the uncured resin material constituting the resin member <NUM> can be allowed to flow while suppressing generation of a void or the like between the first external connection portions <NUM>. As a result, peeling or the like of the light emitting element caused by thermal expansion of a gas present between the light emitting element and the substrate can be effectively prevented.

The second portion <NUM>-<NUM> is not positioned between the exposed portions 13b in the first direction F, and has the planar shape that is different in shape or size from that of the first portion <NUM>-<NUM>. However, the second portion <NUM>-<NUM> may be positioned between the exposed portions 13b in the second direction S. For example, in a plan view, two of the second portions <NUM>-<NUM> may be disposed so as to sandwich one exposed portion 13b. The second portion <NUM>-<NUM> is spaced apart from the exposed portion 13b.

The number of the first external connection portions <NUM>, for example, the numbers of the first portions <NUM>-<NUM> and the second portions <NUM>-<NUM>, can be set appropriately in accordance with the number of the exposed portions 13b formed in the semiconductor layered body <NUM>. For example, it is sufficient that the numbers of the first portions <NUM>-<NUM> and the second portions <NUM>-<NUM> be two or more with respect to one exposed portion 13b, and may be three, four or more, for example. However, depending on the positions of the exposed portions 13b, the numbers and/or shapes of the first portions <NUM>-<NUM> and the second portions <NUM>-<NUM> may be varied, or regardless of the positions of the exposed portions 13b, the shapes and/or sizes of the first portions <NUM>-<NUM> and the second portions <NUM>-<NUM> may be varied. For example, depending on the positions of the first portions <NUM>-<NUM> and the second portions <NUM>-<NUM>, such as the position facing the outer edge of the semiconductor layered body <NUM>, the position facing the second electrode <NUM>, the position on the inner side of the semiconductor layered body <NUM>, and the position adjacent to the outer peripheral exposed portion 13c, the numbers, sizes, and/or shapes of the first portions <NUM>-<NUM> and the second portions <NUM>-<NUM> may be varied, or some of the numbers, sizes, and/or shapes of the first portions <NUM>-<NUM> and the second portions <NUM>-<NUM> may be varied.

Note that the first portions <NUM>-<NUM> and the second portions <NUM>-<NUM> may include those disposed regularly or randomly, as long as the first portions <NUM>-<NUM> and the second portions <NUM>-<NUM> are disposed as described above.

Examples of the shape of the first portion <NUM>-<NUM> and the second portion <NUM>-<NUM> in a plan view include various shapes, such as polygonal shapes including triangular and quadrangular shapes, a fan-shape, a semi-circular shape, a circular shape, an elliptical shape, an annular shape, a shape obtained by cutting out a part of the shape mentioned above, and a polygonal shape partially including a curved line. Of those, the shape of the first portion <NUM>-<NUM> and the second portion <NUM>-<NUM> is preferably a quadrangular shape, a shape including a curved line on one side of the quadrangular shape, a quadrangular shape whose corners are partially rounded, a combination of those shapes, or the like. For example, by setting the shape of the first portion <NUM>-<NUM> and the second portion <NUM>-<NUM> to be the quadrangular shape, the first external connection portions <NUM> are easily disposed at a higher density and at equal intervals.

Specifically, the first portion <NUM>-<NUM> may have a planar shape having a curved portion k on a side facing the exposed portion 13b, and the second portion <NUM>-<NUM> may have a quadrangular planar shape. When the planar shape of the exposed portion 13b is a circular shape, by the first portion <NUM>-<NUM> including the curved portion k corresponding to the shape of the exposed portion 13b on the side facing the exposed portion 13b, the area of the first external connection portion <NUM> disposed in close proximity to the exposed portion 13b can be made greater. As a result, the heat dissipation performance can be improved.

In addition to the first portions <NUM>-<NUM> and the second portions <NUM>-<NUM>, the first external connection portion <NUM> may further include at least one of a third portion <NUM>-<NUM>, a fourth portion <NUM>-<NUM>, a fifth portion <NUM>-<NUM>, and an eighth portion <NUM>-<NUM>. In a plan view, the third portion <NUM>-<NUM> preferably has a planar area greater than the planar area of the first portion <NUM>-<NUM> or the second portion <NUM>-<NUM>, around a corner of the semiconductor layered body <NUM>. The planar area of the third portion <NUM>-<NUM> is preferably twice or more, or three times or more the planar area of the first portion <NUM>-<NUM> or the second portion <NUM>-<NUM>, for example. One third portion <NUM>-<NUM> or two or more of the third portions <NUM>-<NUM> may be disposed around one corner of the semiconductor layered body <NUM>, or at least one third portion <NUM>-<NUM> may be disposed around two or more corners of the semiconductor layered body <NUM>, respectively. By disposing this type of the third portion <NUM>-<NUM> having a relatively large planar area around the corner of the semiconductor layered body <NUM>, a probe configured to check the current and voltage during and after a manufacturing process can be easily brought into contact with the third portion <NUM>-<NUM>.

When the semiconductor layered body <NUM> includes the outer peripheral exposed portion 13c, the fourth portion <NUM>-<NUM> is adjacent to the outer peripheral exposed portion 13c, or so as to follow the shape of the outer peripheral exposed portion 13c. One fourth portion <NUM>-<NUM> may be disposed with respect to one outer peripheral exposed portion 13c, or two or more of the fourth portions <NUM>-<NUM> may be disposed so as to be adjacent to each other. At least one of the fourth portions <NUM>-<NUM> is preferably disposed with respect to all of the outer peripheral exposed portions 13c, respectively. Further, in a plan view, the fourth portion <NUM>-<NUM> preferably has a planar shape including a curved portion r1 on a side facing the outer peripheral exposed portion 13c. By the fourth portion <NUM>-<NUM> including the curved portion r1 corresponding to the shape of the outer peripheral exposed portion 13c on the side facing the outer peripheral exposed portion 13c, the area of the first external connection portion <NUM> disposed in close proximity to the outer peripheral exposed portion 13c can be made greater. When a plurality of the fourth portions <NUM>-<NUM> are disposed, each of the curved portions r1 included in the fourth portions <NUM>-<NUM> may have a different shape depending on the shape and position of the outer peripheral exposed portion 13c.

In a plan view, the fifth portion <NUM>-<NUM> is preferably provided adjacent to the second external connection portion <NUM>, in the vicinity of an end portion of the second semiconductor layer 13p in the first direction F. In a plan view, the fifth portion <NUM>-<NUM> preferably has a planar shape including an inclined portion m that is inclined with respect to the one side of the semiconductor layered body <NUM>, on a side facing the second external connection portion <NUM>. An inclination angle of the inclined portion m with respect to the one side of the semiconductor layered body <NUM> may be from <NUM>° to <NUM>°, for example. By the fifth portion <NUM>-<NUM> including the inclined portion m, a short-circuit with the wire of the substrate <NUM>, which will be described below, can be effectively prevented. Only one fifth portion <NUM>-<NUM> may be disposed, or two or more of the fifth portions <NUM>-<NUM> may be disposed adjacent to each other. In this case, when two or more of the fifth portions <NUM>-<NUM> are disposed, the sizes and/or shapes thereof may be the same or different from each other.

The shapes, sizes, numbers, and the like of the third portion <NUM>-<NUM>, the fourth portion <NUM>-<NUM>, and the fifth portion <NUM>-<NUM> can be set appropriately within the same range as exemplified above in relation to the first portion <NUM>-<NUM> and the second portion <NUM>-<NUM>, except that the above-described curved portion r1 and inclined portion m are additionally provided.

The eighth portion <NUM>-<NUM> is disposed adjacent to the second portion <NUM>-<NUM>, is not positioned between the exposed portions 13b in the first direction F, and has a planar shape that is different in shape or size from that of the first portion <NUM>-<NUM>. The size of the eighth portion <NUM>-<NUM> can be set as desired. The eighth portion <NUM>-<NUM> may be positioned between the exposed portions 13b in the second direction S. At least one eighth portion <NUM>-<NUM> is preferably disposed in one light emitting portion and at least four eighth portions <NUM>-<NUM> are preferably disposed in one light emitting element <NUM>. In the present embodiment, two eighth portions <NUM>-<NUM> are disposed in one light emitting portion. In particular, in a case where the planar shape of the light emitting element <NUM> is quadrangular, each eighth portion <NUM>-<NUM> is preferably disposed in a region (hereinafter referred to as "region near the corner portion") having an area that is <NUM>/<NUM> or less of the entire area of the light emitting element <NUM> and including quadrilateral corners. "Region near the corner portion" refers to one region where the entire region of the light emitting element <NUM> is divided into portions, for example, <NUM> or more portions, having the same area. The planar shape of the eighth portion <NUM>-<NUM> is preferably circular or substantially circular.

By providing the eighth portions <NUM>-<NUM>, when the light emitting element <NUM> is disposed on and bonded to a substrate including a wiring line, it is possible to check the bonding performance between the light emitting element <NUM> and the wiring line from the planar shape of each eighth portion <NUM>-<NUM> after bonding. In particular, when the planar shape of the eighth portion <NUM>-<NUM> is circular or substantially circular, the eighth portion <NUM>-<NUM> collapses in a concentric shape, and thus, the amount by which the eighth portion <NUM>-<NUM> has widened after bonding is easily determined compared to a case where the planar shape of the eighth portion <NUM>-<NUM> is quadrangular. In addition, by disposing the eighth portion <NUM>-<NUM> in the region near the corner portion, in which the first external connection portion <NUM> is less likely to collapse than in the central region of the light emitting element <NUM>, and determining bonding performance, it becomes easy to determine that the first external connection portion <NUM> has collapsed in the light emitting element <NUM>. This makes it possible to evaluate bonding performance more accurately.

The total planar area of the first external connection portion <NUM> can be set appropriately in accordance with the size of the semiconductor layered body <NUM>, the number and size of the exposed portions 13b, and the like. For example, it is sufficient that the total planar area of the first external connection portion be <NUM>% or more of the planar area of the semiconductor layered body <NUM>, and it is preferably <NUM>% or less of the planar area of the semiconductor layered body <NUM>. By having such a range, while ensuring the heat dissipation performance, manufacturing costs of the first external connection portion <NUM> can be reduced, for example, when a material forming the first external connection portion <NUM> is an expensive metal.

For example, the first external connection portion <NUM> is preferably disposed at a density of <NUM> units/mm<NUM> or more, more preferably disposed at a density of <NUM> units/mm<NUM> to <NUM> units/mm<NUM>, and even more preferably disposed at a density of <NUM> units/mm<NUM> to <NUM> units/mm<NUM>. An interval between the first portions <NUM>-<NUM> adjacent to each other, an interval between the second portions <NUM>-<NUM> adjacent to each other and an interval between the first portion <NUM>-<NUM> and the second portion <NUM>-<NUM>, and further optionally, an interval between any one of the first portion <NUM>-<NUM> to the fifth portion <NUM>-<NUM> and any other one of the first portion <NUM>-<NUM> to the fifth portion <NUM>-<NUM>, or an interval between the same portions, are preferably <NUM> or more, more preferably from <NUM> to <NUM>, and even more preferably from <NUM> to <NUM>. By having such an interval, for example, even if the planar area of the first external connection portion <NUM> and the like expands when the light emitting element is bonded to the wire on the substrate, it is possible to prevent the first external connection portions <NUM> adjacent to each other from coming into contact with each other. Further, by having such an interval, as will be described below, the resin member <NUM> constituting the light emitting device and having light reflectivity is easily inserted into a space between the first external connection portions <NUM>.

The planar area of one of the portions of the first external connection portion <NUM> can be set appropriately in accordance with the size of the planar area of the semiconductor layered body <NUM>. For example, when the size of the semiconductor layered body <NUM> in a plan view is <NUM> to <NUM> × <NUM> to <NUM>, the planar area of the one of the portions of the first external connection portion <NUM> may be from <NUM><NUM> to <NUM><NUM>, and is preferably from <NUM><NUM> to <NUM><NUM>. For example, the planar area of the first portion <NUM>-<NUM>, the second portion <NUM>-<NUM>, or the fourth portion <NUM>-<NUM> may be from <NUM><NUM> to <NUM><NUM>. Specifically, the first portion <NUM>-<NUM>, the second portion <NUM>-<NUM>, and the fourth portion <NUM>-<NUM> may each have a planar area of <NUM> × <NUM> or greater. The planar area of the third portion <NUM>-<NUM> or the fifth portion <NUM>-<NUM> may be from <NUM><NUM> to <NUM><NUM>. Specifically, the third portion <NUM>-<NUM> and the fifth portion <NUM>-<NUM> may each have a planar area of <NUM> × <NUM> or greater.

The second external connection portion <NUM> is connected to the second electrode <NUM>.

The plurality of second external connection portions <NUM> are disposed on the second electrode <NUM>. The second external connection portion <NUM> preferably includes a plurality of sixth portions <NUM>-<NUM> and a plurality of seventh portions <NUM>-<NUM>, for example.

The second external connection portion <NUM> is preferably disposed between the first external connection portions <NUM> in the second direction S.

Examples of the shape of the sixth portion <NUM>-<NUM> and the seventh portion <NUM>-<NUM> in a plan view include various shapes, such as polygonal shapes including triangular and quadrangular shapes, a fan-shape, a semi-circular shape, a circular shape, an elliptical shape, an annular shape, an annular fan-shape, and a shape obtained by cutting out a part of the shape mentioned above.

A plurality of the sixth portions <NUM>-<NUM> may be disposed in a matrix pattern on the second electrode <NUM>. The seventh portions <NUM>-<NUM> may be disposed on both sides, in the first direction F, of the plurality of sixth portions <NUM>-<NUM>. The seventh portion <NUM>-<NUM> preferably has a planar area greater than the planar area of the sixth portion <NUM>-<NUM>. The seventh portion <NUM>-<NUM> has a shape that is long in the second direction S, and may have a length shorter than the length of the second electrode <NUM> in the second direction S. For example, the seventh portion <NUM>-<NUM> may have a length of <NUM>% to <NUM>% of the length of the second electrode <NUM> in the second direction S. Each of the sixth portions <NUM>-<NUM> may be different in size and/or shape, or may have the same size and shape. Each of the seventh portions <NUM>-<NUM> may be different in size and/or shape, or may have the same size and shape. For example, the seventh portions <NUM>-<NUM> disposed on both the sides, in the first direction F, of the plurality of sixth portions <NUM>-<NUM> preferably have planar shapes different in shape or size from each other. Specifically, in a plan view, the seventh portion <NUM>-<NUM> adjacent to one end of the semiconductor layered body <NUM> in the first direction F may include a missing portion t at which a corner portion of the seventh portion <NUM>-<NUM> is missing on a side facing the one end of the semiconductor layered body <NUM>. The missing portion t may be inclined at an angle of <NUM>° to <NUM>° with respect to the one side of the semiconductor layered body <NUM>, for example. The planar area of the seventh portion <NUM>-<NUM> is preferably greater than the planar area of the third portion <NUM>-<NUM> of the first external connection portion <NUM>. For example, the planar area of the seventh portion <NUM>-<NUM> may be from <NUM>% to <NUM>% of the planar area of the third portion <NUM>-<NUM>, and is preferably from <NUM>% to <NUM>% of the planar area of the third portion <NUM>-<NUM>. Specifically, when the planar area of the third portion <NUM>-<NUM> is <NUM> × <NUM> or greater (e.g., <NUM> × <NUM>), the planar area of the seventh portion <NUM>-<NUM> may be <NUM> × <NUM> or greater (<NUM> × <NUM>). The planar area of the seventh portion <NUM>-<NUM> is preferably greater than the planar area of the sixth portion <NUM>-<NUM>. By disposing this type of the seventh portion <NUM>-<NUM> having a relatively large planar area at the one end of the semiconductor layered body <NUM>, a probe configured to test the current/voltage during and after the manufacturing process can be easily brought into contact with the seventh portion <NUM>-<NUM>.

An interval between the sixth portions <NUM>-<NUM> adjacent to each other, an interval between the seventh portions <NUM>-<NUM> adjacent to each other, and an interval between the sixth portion <NUM>-<NUM> and the seventh portion <NUM>-<NUM> are preferably <NUM> or more, more preferably from <NUM> to <NUM>, and even more preferably from <NUM> to <NUM>. By having such an interval, as described above, when the light emitting element is bonded to the wire on the substrate, it is possible to prevent the second external connection portions <NUM> adjacent to each other from coming into contact with each other. However, the interval between the sixth portions <NUM>-<NUM> adjacent to each other, the interval between the seventh portions <NUM>-<NUM> adjacent to each other, and the interval between the sixth portion <NUM>-<NUM> and the seventh portion <NUM>-<NUM> need not necessarily be all the same.

The sixth portions <NUM>-<NUM> and the seventh portions <NUM>-<NUM> may be disposed regularly or randomly in the first direction F, as long as the above-described arrangements are satisfied. Further, the sixth portions <NUM>-<NUM> and the seventh portions <NUM>-<NUM> may be different in shape and/or size depending on the locations at which they are disposed on the semiconductor layered body <NUM>. For example, the size of the second external connection portion <NUM> can be set to <NUM>% to <NUM>%, <NUM>% to <NUM>%, or <NUM>% to <NUM>% of the first external connection portion <NUM>.

The first external connection portion <NUM> and the second external connection portion <NUM> can each be formed by a known method in this field. Examples of the method include a plating method, a sputtering method, a vapor deposition method, and the like.

The first external connection portion <NUM> and the second external connection portion <NUM> can be formed using a single-layer or layered structure of a metal such as Al, Ag, Cu, Au, or Ni, or of an alloy including those metals.

Note that the thickness of the first external connection portion <NUM> and the second external connection portion <NUM> can be set appropriately in accordance with the size of the light emitting element <NUM>, and the like. For example, the thickness may be from <NUM> to <NUM>, and is preferably from <NUM> to <NUM>.

When the semiconductor layered body <NUM> includes one semiconductor layered body <NUM> on one support substrate <NUM>, the first external connection portions <NUM> and the second external connection portions <NUM> are preferably disposed symmetrically with respect to the bisector bisecting the area of the semiconductor layered body <NUM> or the area of the light emitting portion in the first direction F or the second direction S, respectively.

When the semiconductor layered body <NUM> includes the plurality of light emitting portions as described above, the semiconductor layered body <NUM> is preferably symmetrical in terms of the arrangement of the first external connection portion <NUM> and the second external connection portion <NUM> in the first light emitting portion 10X, the arrangement of the first external connection portion <NUM> and the second external connection portion <NUM> in the second light emitting portion 10Y, and a bisector bisecting the area of the support substrate <NUM>.

As illustrated in <FIG> and <FIG>, a light emitting device <NUM> according to an embodiment of the present disclosure includes the substrate <NUM> including a plurality of wires <NUM>, <NUM>, and <NUM> on the upper surface thereof, the light emitting element <NUM> described above (or a light emitting element to be described below), and a cover member <NUM>. Only one light emitting element <NUM> may be disposed on the substrate <NUM>, or two or more of the light emitting elements <NUM> may be disposed thereon. The light emitting element <NUM> is flip-chip mounted on the wires <NUM>, <NUM>, and <NUM> via the plurality of first external connection portions <NUM> and the plurality of second external connection portions <NUM>. A portion of the first wire <NUM> and a portion of the third wire <NUM> are exposed from the cover member <NUM>.

The substrate <NUM> can be formed, for example, of an insulating member such as glass epoxy, resin, or ceramics, a metal member on a front surface of which the insulating member is formed, or the like. Of those, a ceramic having high heat resistance and weather resistance is preferably used as the material of the substrate <NUM>. Examples of the ceramic material include alumina, aluminum nitride, and the like. Furthermore, the ceramic material may be layered on a metal member made of, for example, aluminum.

It is sufficient that the wires <NUM>, <NUM>, and <NUM> can supply the current to the light emitting element <NUM>, and the wires <NUM>, <NUM>, and <NUM> are formed with a material, thickness, shape, and the like commonly used in this field. Specifically, the wires <NUM>, <NUM>, and <NUM> can be formed of a metal such as copper, aluminum, gold, silver, platinum, titanium, tungsten, palladium, iron, or nickel, an alloy containing those metals, or the like. In particular, the wires <NUM>, <NUM>, and <NUM> formed on the upper surface of the substrate <NUM> are preferably formed with the outermost surfaces thereof covered with a material having a high reflectivity such as silver or gold, in order to efficiently extract light from the light emitting element <NUM>. The wires <NUM>, <NUM>, and <NUM> are formed by an electrolytic plating method, an electroless plating method, a vapor deposition method, a sputtering method, or the like. For example, when the outermost surfaces of the first external connection portion <NUM> and the second external connection portion <NUM> of the light emitting element <NUM> are formed of gold, the outermost surfaces of the wires <NUM>, <NUM>, and <NUM> are preferably also formed of Au. As a result, the bonding performance between the light emitting element <NUM> and the wires on the substrate <NUM> can be improved.

When the light emitting element <NUM> is flip-chip mounted on the substrate <NUM> via the wires <NUM>, <NUM>, and <NUM> using a surface, of the light emitting element <NUM>, on which the first external connection portions <NUM> and the second external connection portions <NUM> are formed as the lower surface of the light emitting element <NUM>, the upper surface on the opposite side of the lower surface becomes the main light extraction surface of the light emitting element <NUM>. The wires <NUM>, <NUM>, and <NUM> may be disposed not only on the upper surface of the substrate <NUM>, but also inside and/or on the lower surface of the substrate <NUM>.

In particular, when the light emitting element <NUM> including the two light emitting portions is provided, for example, when the light emitting element <NUM> is used in which the first light emitting portion 10X and the second light emitting portion 10Y, each including the first external connection portion <NUM> and the second external connection portion <NUM>, are formed on the support substrate <NUM>, as illustrated in <FIG> and <FIG>, it is preferable to use the wires that include the first wire <NUM> (the first wire portion) connected to the first external connection portion <NUM> of the first light emitting portion 10X, the second wire <NUM> (the second wire portion) connected to the second external connection portion <NUM> of the first light emitting portion 10X and the first external connection portion <NUM> of the second light emitting portion 10Y, and the third wire <NUM> (the third wire portion) connected to the second external connection portion <NUM> of the second light emitting portion 10Y. In the light emitting element <NUM>, the first external connection portion <NUM> of the first light emitting portion 10X is connected to the first wire <NUM>, and the second external connection portion <NUM> of the first light emitting portion 10X is connected to the second wire <NUM>. Further, in the light emitting element <NUM>, the first external connection portion <NUM> of the second light emitting portion 10Y is connected to the second wire <NUM>, and the second external connection portion <NUM> of the second light emitting portion 10Y is connected to the third wire <NUM>.

Further, in the second direction S, a portion, of the second wire <NUM>, to which the second external connection portion <NUM> of the first light emitting portion 10X is connected is preferably positioned between the first wires <NUM>, and a portion, of the third wire <NUM>, to which the second external connection portion <NUM> of the second light emitting portion 10Y is connected is preferably positioned between the second wires <NUM>. In a plan view, the first wire <NUM> includes a concave region in a portion thereof on a side facing the second wire <NUM> in the first direction F, and the second wire <NUM> includes a concave region in a portion thereof on a side facing the third wire <NUM> in the first direction F. The second wire <NUM> includes a convex region in a portion thereof on a side facing the first wire <NUM> in the first direction F, and the third wire <NUM> includes a convex region in a portion thereof on a side facing the second wire <NUM> in the first direction F. Then, the convex region of the second wire <NUM> is positioned in the concave region of the first wire <NUM>, and the convex region of the third wire <NUM> is positioned in the concave region of the second wire <NUM>.

For example, as illustrated in <FIG>, a concave region G of the first wire <NUM> includes inclined portions G1 and G2 at positions facing corner portions of the convex region of the second wire <NUM>. Further, the concave region G of the first wire <NUM> includes inclined portions G3 and G4 at positions facing corner portions of the convex region of the third wire <NUM>. A convex region H of the second wire <NUM> includes inclined portions H1 and H2 having a constant distance from the inclined portions G1 and G2, respectively, at positions facing the inclined portions G1 and G2. Further, the convex region of the second wire <NUM> includes inclined portions H3 and H4 having a constant distance from the inclined portions G3 and G4, respectively. The concave region of the second wire <NUM> and the convex region of the third wire <NUM> also preferably have the same shapes in correlation to the relationship between the concave region of the first wire <NUM> and the convex region of the second wire <NUM>. A distance D1 between the first wire <NUM> and the second wire <NUM> and a distance D2 between the second wire <NUM> and the third wire <NUM> may be from <NUM> to <NUM> in a plan view. These distances D1 and D2 are preferably constant between the first wire <NUM> and the second wire <NUM>, and between the second wire <NUM> and the third wire <NUM>, respectively.

By using such wires, the two light emitting portions can be connected in series. Further, by adopting such shapes of the wires, the distance between the first wire <NUM> and the second wire <NUM> and the distance between the second wire <NUM> and the third wire <NUM> are made shorter, and thus the distance between the two light emitting portions can be narrowed.

In particular, when the light emitting element <NUM> is disposed on the substrate <NUM> illustrated in <FIG>, the second external connection portion <NUM> of the first light emitting portion 10X faces the convex region of the second wire <NUM>, and the second external connection portion <NUM> of the second light emitting portion 10Y faces the convex region of the third wire <NUM>. Then, as illustrated in <FIG>, the missing portions t of the seventh portion <NUM>-<NUM> of the second external connection portion <NUM> are disposed so as to correspond to the inclined portions H1 and H2 in the convex region of the second wire <NUM>. Further, the inclined portions m of the fifth portion <NUM>-<NUM> of the first external connection portion <NUM> are disposed so as to correspond to the inclined portions G3 and G4 in the concave region G of the first wire <NUM>. In this way, by forming the shapes of the fifth portion <NUM>-<NUM> of the first external connection portion <NUM> and/or the seventh portion <NUM>-<NUM> of the second external connection portion <NUM> so as to correspond to the wires <NUM> and <NUM>, it is possible to prevent a short-circuit between the two light emitting portions from occurring. <FIG> is a schematic diagram for describing relationships between the shapes of the wires and the arrangement of the first external connection portions <NUM> and the second external connection portions <NUM>, and thus all the constituent members are illustrated with solid lines.

The first external connection portion <NUM> and the second external connection portion <NUM> can be bonded to the wires <NUM>, <NUM>, and <NUM> using an ultrasonic bonding method, for example. When bonding the first external connection portion <NUM> and the second external connection portion <NUM> to the wires <NUM>, <NUM>, and <NUM>, heat and/or pressure may be applied while applying ultrasonic vibrations.

The cover member <NUM> covers the light emitting element <NUM>, the first external connection portions <NUM>, the second external connection portions <NUM>, and the substrate <NUM>. In other words, the cover member <NUM> covers the side surfaces of the light emitting element <NUM>, a section between the light emitting element <NUM> and the substrate <NUM>, and the side surfaces of the first external connection portions <NUM> and the second external connection portions <NUM>. The cover member <NUM> is preferably also disposed directly below the exposed portions 13b on the lower surface of the light emitting element <NUM>. Further, as will be described below, when the light emitting device <NUM> includes a light transmissive member <NUM> on the upper surface of the light emitting element <NUM>, the cover member <NUM> preferably also covers the side surfaces of the light transmissive member <NUM>.

The cover member <NUM> can be formed of a resin having light reflective properties, light transmissive properties, light shielding properties, and the like, or a resin or the like obtained by adding, to the above-described resin, a light reflective substance, a phosphor, a diffusing material, a coloring agent, or the like. Of those, the cover member <NUM> preferably has the light reflective and/or light shielding properties. Any resins, light reflective substances, and the like normally used in this field can be used to constitute the cover member <NUM>. Examples of the resin include a resin or a hybrid resin including at least one of a silicone resin, a modified silicone resin, an epoxy resin, a modified epoxy resin, and an acrylic resin, and the like. Examples of the light reflective substance include titanium oxide, silicon oxide, zirconium oxide, potassium titanate, alumina, aluminum nitride, boron nitride, mullite, and the like.

An amount of light reflection, an amount of light transmission, and the like can be varied by changing the content of the light reflective substance or the like contained in the material constituting the cover member <NUM>. The cover member <NUM> preferably contains <NUM> wt% or more of the light reflective substance, for example.

The cover member <NUM> can be molded by injection molding, potting molding, transfer molding, compression molding, or the like, for example.

Before disposing the cover member <NUM>, the resin member <NUM> may be disposed, for example, on the side surfaces of the light emitting element <NUM>, the side surfaces of the electrodes of the light emitting element <NUM>, the side surfaces of the first external connection portions <NUM> and the second external connection portions <NUM>, and the section between the light emitting element <NUM> and the substrate <NUM>. This resin member <NUM> preferably has light reflectivity. By providing this type of the resin member <NUM>, the light traveling from the light emitting element <NUM> toward the substrate <NUM> can be reflected toward the light emitting element <NUM> side, and the light extraction efficiency can be improved.

The light emitting device <NUM> preferably includes the light transmissive member <NUM> on the upper surface of the light emitting element <NUM>. The light transmissive member <NUM> is disposed covering the light extraction surface of the light emitting element <NUM>. The light transmissive member <NUM> is a member that can transmit <NUM>% to <NUM>% or preferably <NUM>% or more of the light emitted from the light emitting element <NUM> and that can emit the light to the outside. The light transmissive member <NUM> can contain a phosphor that can perform wavelength conversion of at least a portion of the light emitted from the light emitting element <NUM>. Further, the light transmissive member <NUM> may contain a light diffusing material that diffuses the light emitted from the light emitting element <NUM>. The light transmissive member <NUM> preferably has a plate-like shape, and the thickness of the light transmissive member <NUM> may be from <NUM> to <NUM>, for example.

The light transmissive member <NUM> can be formed, for example, of resin, glass, or an inorganic substance, or the like. Further, examples of the light transmissive member <NUM> containing the phosphor include a sintered body obtained by sintering a phosphor, glass or another inorganic substance containing the phosphor, and the like. Further, the light transmissive member <NUM> containing the phosphor may be obtained by forming a resin layer containing a phosphor on a front surface of a molded body formed of plate-like resin, glass, or inorganic substance, or the like.

Examples of the phosphor contained in the light transmissive member <NUM> include an yttrium aluminum garnet based phosphor (Y<NUM>(Al,Ga)<NUM>O<NUM>:Ce, for example), a lutetium aluminum garnet based phosphor (Lu<NUM>(Al,Ga)<NUM>O<NUM>:Ce, for example), a terbium aluminum garnet based phosphor (Tb<NUM>(Al,Ga)<NUM>O<NUM>:Ce, for example), a β-SiALON based phosphor ((Si,Al)<NUM>(O,N)<NUM>:Eu, for example), an α based SiAlON phosphor (Ca(Si,Al)<NUM>(O,N)<NUM>:Eu, for example), an SLA based phosphor (SrLiAl3N4:Eu, for example), a nitride based phosphor such as a CASN based phosphor (CaAlSiN3:Eu, for example) or an SCASN based phosphor ((Sr,Ca)AlSiN3:Eu, for example), a fluoride phosphor such as a KSF based phosphor (K2SiF6:Mn, for example), a KSAF based phosphor (K2(Si,Al)F6:Mn, for example), or an MGF based phosphor (<NUM>. 5MgO·<NUM>. 5MgF2GeO2:Mn, for example), a phosphor having a perovskite structure (CsPb(F,Cl,Br,I)<NUM>, for example), a quantum dot phosphor (CdSe, InP, AgInS<NUM>, or AgInSe2, for example), and the like. By combining those phosphors with a light emitting element that emits blue light or a light emitting element that emits ultraviolet light, a light emitting device of a desired light emission color can be obtained. When such a phosphor is contained in the light transmissive member <NUM>, the content of the phosphor is preferably from <NUM> wt% to <NUM> wt%, for example.

The light transmissive member <NUM> is bonded so as to cover the light extraction surface of the light emitting element <NUM>. The light transmissive member <NUM> and the light emitting element <NUM> can be bonded together directly or via an adhesive material. For example, a light transmissive resin material, such as epoxy or silicone, can be used as the adhesive material. The light transmissive member <NUM> and the light emitting element <NUM> may be bonded together by a direct bonding method, using pressure bonding, sintering, surface activation bonding, atomic diffusion bonding, hydroxyl group bonding, or the like. For the purposes of protecting the light transmissive member <NUM>, preventing the light reflection, or the like, a cover layer <NUM> may be disposed on the upper surface of the light transmissive member <NUM>. Examples of the cover layer <NUM> include an anti reflection (AR) layer, and the like.

The light emitting device <NUM> may optionally include another element such as a protective element, an electronic component, or the like. Those element and electronic component are preferably embedded in the cover member <NUM>. Specifically, as illustrated in <FIG>, a protective element <NUM> may be disposed that electrically connects the first wire <NUM> and the third wire <NUM>.

As illustrated in <FIG>, the light emitting element <NUM> according to a first embodiment includes the semiconductor layered body <NUM>, the insulating film <NUM>, the first electrodes <NUM> and the second electrodes <NUM>, and the first external connection portions <NUM> and the second external connection portions <NUM>.

The semiconductor layered body <NUM> is constituted by the first semiconductor layer 13n, the light emitting layer 13a, and the second semiconductor layer 13p that are layered on the support substrate <NUM> in this order from the support substrate <NUM> side. The support substrate <NUM> is formed of sapphire and has a protrusion and recession structure on the upper surface thereof. The shape of the support substrate <NUM> in a plan view is substantially a square shape, and one side thereof has a length of <NUM>, for example. The semiconductor layered body <NUM> serves as the first light emitting portion 10X and the second light emitting portion 10Y disposed side by side in the first direction F, each having a rectangular shape that has short sides along the first direction F. The first light emitting portion 10X and the second light emitting portion 10Y each include the first semiconductor layer 13n, the light emitting layer 13a, and the second semiconductor layer 13p. The first semiconductor layer 13n is exposed from the second semiconductor layer 13p and the light emitting layer 13a of the semiconductor layered body <NUM>, and includes the plurality of exposed portions 13b surrounded by the second semiconductor layer 13p in a plan view. The exposed portions 13b each have a circular shape in a plan view, and are disposed in a matrix pattern. Specifically, in each of the first light emitting portion 10X and the second light emitting portion 10Y, three columns of the exposed portions 13b are arrayed along the first direction F, and four rows of the exposed portions 13b are arrayed along the second direction S. The exposed portion 13b has a circular shape having a diameter of approximately <NUM> in a plan view. The distance between the adjacent exposed portions 13b is approximately <NUM> in the first direction F and the second direction S, respectively.

In a plan view, the semiconductor layered body <NUM> includes the outer peripheral portion 13no from which the first semiconductor layer 13n is exposed at the outer periphery thereof, and further includes the outer peripheral exposed portion 13c in which the first semiconductor layer 13n is exposed from the second semiconductor layer 13p and the light emitting layer 13a, at the outer periphery of the second semiconductor layer 13p. The outer peripheral exposed portion 13c is disposed as part of the outer peripheral portion 13no. The outer peripheral exposed portions 13c are disposed at the same positions as the exposed portions 13b, namely, three of the outer peripheral exposed portions 13c are disposed along the first direction F and four of the outer peripheral exposed portions 13c are disposed along the second direction S in each of the first light emitting portion 10X and the second light emitting portion 10Y.

As illustrated in <FIG>, the semiconductor layered body <NUM> is covered by the insulating film <NUM> formed of SiO<NUM>. The insulating film <NUM> has the opening portions 14a and 14b at least above the plurality of exposed portions 13b and above regions of the second semiconductor layer 13p to which the second electrode <NUM> is connected, respectively.

In a cross-sectional view, the light reflective electrode <NUM> formed of silver is disposed between the second semiconductor layer 13p and the first electrode <NUM> and/or the second electrode <NUM>. The light reflective electrode <NUM> is disposed on substantially the entire upper surface of the second semiconductor layer 13p. The light reflective electrode <NUM> is covered by the protective layer <NUM> whose upper surface and side surfaces are formed of SiN or SiO<NUM>.

The light emitting element <NUM> includes the second electrode <NUM> connected to the second semiconductor layer 13p, on the upper surface side of the semiconductor layered body <NUM> via the light reflective electrode <NUM>. The second electrode <NUM> is disposed in a region including the center of each of the first light emitting portion 10X and the second light emitting portion 10Y of the light emitting element <NUM> in a plan view. The shape of the second electrode <NUM> in a plan view is the rectangular shape having long sides along the first direction F, and the second electrode <NUM> is formed so as to have a size of <NUM> × <NUM>.

In a plan view, the first light emitting portion 10X and the second light emitting portion 10Y each include the first electrodes <NUM> disposed so as to sandwich the second electrode <NUM> in the second direction S. The first electrode <NUM> is connected to the exposed portions 13b at the opening portions 14a of the insulating film <NUM>, and further, is formed on the second semiconductor layer 13p via the insulating film <NUM>.

The first external connection portion <NUM> is disposed on the first electrode <NUM>. The first external connection portion <NUM> is spaced apart from the exposed portions 13b.

The plurality of first external connection portions <NUM> are disposed including the plurality of first portions <NUM>-<NUM>, the plurality of second portions <NUM>-<NUM>, the plurality of third portions <NUM>-<NUM>, the plurality of fourth portions <NUM>-<NUM>, and the plurality of fifth portions <NUM>-<NUM>.

Two of the first portions <NUM>-<NUM> are disposed so as to sandwich one exposed portion 13b in the first direction F. Further, two of the first portions <NUM>-<NUM> are disposed between the adjacent exposed portions 13b while being spaced apart from each other. The interval between the first portion <NUM>-<NUM> and the exposed portion 13b in the first direction F is <NUM>, for example. The first portions <NUM>-<NUM> that are spaced apart from each other are spaced apart by <NUM>, for example. The first portion <NUM>-<NUM> has a rectangular shape that is long in the second direction S, and includes the curved portion k on the side facing the exposed portion 13b. The curved portion k is provided with the curved line corresponding to the planar shape of the exposed portion 13b. The first portion <NUM>-<NUM> has a size of <NUM> × <NUM>, for example. Further, the first portion <NUM>-<NUM>, which is provided adjacent to the second electrode <NUM> and faces the exposed portion 13b, has a smaller planar area than that of the first portion <NUM>-<NUM> described above.

The second portions <NUM>-<NUM> are arrayed along the first direction F, and each have a planar shape that is different in shape and size from that of the first portion <NUM>-<NUM>. For example, the second portion <NUM>-<NUM> has a rectangular shape that is long in the first direction F, and has a size of <NUM> × <NUM>. Eight of the second portions <NUM>-<NUM> are disposed in the first direction F, and three rows of the second portions <NUM>-<NUM> are disposed between the exposed portions 13b. Further, four, three, or two rows of the second portions <NUM>-<NUM> are disposed between the exposed portion 13b and the outer periphery of the semiconductor layered body <NUM> in the second direction S. The second portion <NUM>-<NUM> disposed between the exposed portion 13b and the outer periphery of the semiconductor layered body <NUM> in the second direction S has a rectangular shape that is long in the first direction F, and has a size of <NUM> × <NUM>.

The third portion <NUM>-<NUM> is disposed in each of the first light emitting portion 10X and the second light emitting portion 10Y. In a plan view, the third portions <NUM>-<NUM> are disposed at four corners of the second semiconductor layer 13p. The size of the third portion <NUM>-<NUM> in a plan view is <NUM> × <NUM>, for example.

One or two of the fourth portions <NUM>-<NUM> are disposed adjacent to each of the outer peripheral exposed portions 13c disposed at the outer periphery of the semiconductor layered body <NUM> along the first direction F. One fourth portion <NUM>-<NUM> is disposed adjacent to each of the outer peripheral exposed portions 13c disposed at the outer periphery of the semiconductor layered body <NUM> along the second direction S. Each of the fourth portions <NUM>-<NUM> adjacent to the outer peripheral exposed portions 13c has one of mutually different curved portions r1, r2, r3 and r4, on the side thereof facing the outer peripheral exposed portion 13c. When two of the fourth portions <NUM>-<NUM> face one outer peripheral exposed portion 13c disposed along the first direction F, each of the fourth portions <NUM>-<NUM> has a rectangular shape including the curved portion r1 at a corner, of the rectangular shape, facing the outer peripheral exposed portion 13c. When one fourth portion <NUM>-<NUM> faces one outer peripheral exposed portion 13c disposed along the first direction F, the fourth portion <NUM>-<NUM> has a rectangular shape in which a short side thereof facing the outer peripheral exposed portion 13c includes the curved portion r2. When one fourth portion <NUM>-<NUM> faces one outer peripheral exposed portion 13c disposed along the second direction S, the fourth portion <NUM>-<NUM> has a rectangular shape in which a long side thereof facing the outer peripheral exposed portion 13c includes the curved portion r3. The fourth portion <NUM>-<NUM> facing the outer peripheral exposed portion 13c closest to the second electrode <NUM> has a rectangular shape in which a long side thereof facing the outer peripheral exposed portion 13c includes the curved portion r4, and has a shape having a smaller planar area than that of the fourth portion <NUM>-<NUM> including the curved portion r3.

The fifth portion <NUM>-<NUM> is disposed in each of the first light emitting portion 10X and the second light emitting portion 10Y. In a plan view, the fifth portion <NUM>-<NUM> is provided adjacent to the second electrode <NUM> at one end of the second semiconductor layer 13p in the first direction F. In a plan view, the fifth portion <NUM>-<NUM> includes the inclined portion m inclined with respect to the one side of the second semiconductor layer 13p, on a side thereof facing the second electrode <NUM>. Further, in a plan view, the fifth portion <NUM>-<NUM> includes a curved portion corresponding to the shape of the exposed portion 13b on a side thereof facing the exposed portion 13b.

The plurality of second external connection portions <NUM> are disposed on the second electrode <NUM>. The second external connection portions <NUM> include the plurality of sixth portions <NUM>-<NUM> and the plurality of seventh portions <NUM>-<NUM>.

The sixth portions <NUM>-<NUM> are disposed on the second electrode <NUM> in a matrix pattern, for example, in a pattern of <NUM> x <NUM>. The sixth portion <NUM>-<NUM> has a substantially square planar shape. The sixth portion <NUM>-<NUM> has a size of <NUM> × <NUM>, for example.

One seventh portion <NUM>-<NUM> is disposed on each side of the plurality of sixth portions <NUM>-<NUM> in the first direction F. The seventh portion <NUM>-<NUM> has an elongated rectangular planar shape in the second direction S. The seventh portion <NUM>-<NUM> has a size of <NUM> × <NUM>, for example. The seventh portion <NUM>-<NUM> has a rectangular shape in which the corners thereof located on the outer side of the first light emitting portion 10X or the second light emitting portion 10Y are missing.

A distance between any one of the first portion <NUM>-<NUM>, the second portion <NUM>-<NUM>, the third portion <NUM>-<NUM>, the fourth portion <NUM>-<NUM>, the fifth portion <NUM>-<NUM>, the sixth portion <NUM>-<NUM>, and the seventh portion <NUM>-<NUM>, and the adjacent one of the first to seventh portions <NUM>-<NUM> to <NUM>-<NUM> is approximately <NUM>.

The first external connection portions <NUM> are disposed at a density of <NUM> units/mm<NUM> or more, and the second external connection portions <NUM> are disposed at a density of <NUM> units/mm<NUM> or more.

The thickness of the first external connection portion <NUM> and the second external connection portion <NUM> is <NUM>.

The first external connection portions <NUM> and the second external connection portions <NUM> disposed in the first light emitting portion 10X, and the first external connection portions <NUM> and the second external connection portions <NUM> disposed in the second light emitting portion 10Y are disposed symmetrically with respect to the bisector bisecting the area of the support substrate <NUM>. Further, in each of the first light emitting portion 10X and the second light emitting portion 10Y, the first external connection portions <NUM> and the second external connection portions <NUM> are disposed symmetrically with respect to the bisector bisecting the area of the semiconductor layered body <NUM> in the second direction S. Each of the first portion <NUM>-<NUM> to the seventh portion <NUM>-<NUM> may also be referred to as described below. The first portion <NUM>-<NUM> is an inter-exposed portions connection portion. The second portion <NUM>-<NUM> is an intermediate connection portion. The third portion <NUM>-<NUM> is an outer corner connection portion. The fourth portion <NUM>-<NUM> is an inner corner connection portion. The fifth portion <NUM>-<NUM> is an inclined connection portion. The sixth portion <NUM>-<NUM> is an inner side connection portion. The seventh portion <NUM>-<NUM> is an outer side connection portion.

In this type of the light emitting element <NUM>, by disposing the plurality of first external connection portions <NUM> and second external connection portions <NUM> at a high density within a small planar area, the force applied to the electrodes, the insulating film, the semiconductor layered body, and the like at the time of bonding can be alleviated using the first external connection portions <NUM> and the like, while ensuring the bonding performance with the substrate <NUM>. Furthermore, when the light emitting element <NUM> is bonded to the wires on the substrate <NUM>, the first external connection portions <NUM> expand, but it is possible to prevent the first external connection portions <NUM> adjacent to each other from coming into contact with each other. As a result, the uncured resin material constituting the resin member <NUM>, which constitutes the light emitting device, can be easily poured into the spaces between the first external connection portions <NUM>. In this way, the light extraction efficiency of the light emitting device can be improved, and at the same time, peeling of the light emitting element <NUM> caused by thermal expansion of a gas can be prevented, the gas being generated as a result of a void being present between the first external connection portions <NUM>. Further, since the first external connection portions <NUM> and the second external connection portions <NUM> disposed in the first light emitting portion 10X and the second light emitting portion 10Y are disposed symmetrically in the second direction S, a bias in the force applied to the first external connection portions <NUM> and the second external connection portions <NUM> can be alleviated when flip-chip mounting the light emitting element <NUM> onto the substrate <NUM>. In this way, a bonding accuracy between the light emitting element <NUM> and the substrate <NUM> can be stabilized. As a result, a light emitting device with a high heat dissipation performance, high reliability, and high light extraction efficiency can be provided.

A light emitting element 10A according to a second embodiment has substantially the same configuration as that of the light emitting element <NUM>, except that the positions of the outer peripheral exposed portions 13c, and the shapes of the third portion <NUM>-<NUM> and the fourth portion <NUM>-<NUM> of the first external connection portion <NUM> facing the outer peripheral exposed portion 13c are different from those in the light emitting element <NUM>, as illustrated in <FIG>.

The outer peripheral exposed portions 13c are disposed at each of corner portions of the semiconductor layered body <NUM> in a plan view. Four of the outer peripheral exposed portions 13c are disposed along the first direction F and six thereof are disposed along the second direction S. <NUM> of the outer peripheral exposed portions 13c are disposed in one semiconductor layered body <NUM>.

The third portion <NUM>-<NUM> includes a curved portion z at a portion thereof facing the outer peripheral exposed portion 13c disposed at the corner of the semiconductor layered body <NUM>.

Two of the fourth portions <NUM>-<NUM> are disposed so as to face one outer peripheral exposed portion 13c disposed along the first direction F, and each of those rectangular fourth portions <NUM>-<NUM> includes the curved portion r1 at the corner facing the outer peripheral exposed portions 13c.

The light emitting element 10A as described above can also achieve the same effects as those of the light emitting element <NUM> described above.

A light emitting element 10B according to a third embodiment has substantially the same configuration as that of the light emitting element <NUM>, except that the positions of the outer peripheral exposed portions 13c, the shape of the fourth portion <NUM>-<NUM> of the first external connection portion <NUM> facing the outer peripheral exposed portion 13c, the positions of the exposed portions 13b, the shape of the second portion <NUM>-<NUM> facing the exposed portion 13b, and the size of the sixth portion <NUM>-<NUM> of the second external connection portion <NUM> are different from those in the light emitting element <NUM>, as illustrated in <FIG>.

In each of the first light emitting portion 10X and the second light emitting portion 10Y, the exposed portions 13b are arrayed in two columns along the first direction F and in two rows along the second direction S.

In each of the first light emitting portion 10X and the second light emitting portion 10Y, two of the outer peripheral exposed portions 13c are disposed along the first direction F, and four thereof are disposed along the second direction S. <NUM> of the outer peripheral exposed portions 13c are disposed in one semiconductor layered body <NUM>.

In the first direction F, two of the first portions <NUM>-<NUM> are disposed so as to sandwich one exposed portion 13b therebetween. Two of the first portions <NUM>-<NUM> are disposed between the adjacent exposed portions 13b while being spaced apart from each other. The first portion <NUM>-<NUM> has a rectangular shape having long sides along the first direction F, and includes the curved portion k on the side facing the exposed portion 13b. The first portion <NUM>-<NUM> has a size of <NUM> × <NUM> in a plan view, for example.

The second portion <NUM>-<NUM> has a rectangular shape having long sides along the second direction S and having short sides of various lengths in the first direction F, and has a size of <NUM> to <NUM> × <NUM>. <NUM> of the second portions <NUM>-<NUM> are disposed in the first direction F, and two columns of the second portions <NUM>-<NUM> are disposed between the exposed portions 13b in the second direction S. Further, three rows, two rows, or one row of the second portions <NUM>-<NUM> are disposed between the exposed portion 13b and the outer periphery of the semiconductor layered body <NUM> in the second direction S.

The third portion <NUM>-<NUM> has a rectangular shape having long sides along the second direction S, and has a size of <NUM> × <NUM>, for example.

Two of the fourth portions <NUM>-<NUM> are adjacent to one outer peripheral exposed portion 13c disposed at the outer periphery of the semiconductor layered body <NUM> along the first direction F. One fourth portion <NUM>-<NUM> is adjacent to each of the outer peripheral exposed portions 13c disposed at the outer periphery of the semiconductor layered body <NUM> along the second direction S.

Two of the fifth portions <NUM>-<NUM> are provided in each of the first light emitting portion 10X and the second light emitting portion 10Y. In a plan view, the fifth portion <NUM>-<NUM> is provided adjacent to the second electrode <NUM> at one end of the second semiconductor layer 13p in the first direction F. In a plan view, each of the fifth portions <NUM>-<NUM> includes the inclined portion m inclined with respect to the one side of the second semiconductor layer 13p, on the side facing the second electrode <NUM>.

Each of the first portion <NUM>-<NUM>, the second portion <NUM>-<NUM>, the third portion <NUM>-<NUM>, the fourth portion <NUM>-<NUM>, the fifth portion <NUM>-<NUM>, the sixth portion <NUM>-<NUM>, and the seventh portion <NUM>-<NUM> does not necessarily have the same shape and size depending on its location, or the same shape as the shape of the adjacent one of the first to seventh portions <NUM>-<NUM> to <NUM>-<NUM>.

This light emitting element 10B can also achieve the same effects as those of the light emitting elements <NUM> and 10A.

As illustrated in <FIG>, in a light emitting element 10C according to a fourth embodiment, one semiconductor layered body <NUM> having a substantially square shape is disposed on one support substrate <NUM>.

In the semiconductor layered body <NUM>, the exposed portions 13b are arrayed in four rows along the first direction F, and arrayed in five columns in the second direction S. Further, five of the outer peripheral exposed portions 13c are disposed along the first direction F and four thereof are disposed along the second direction S. <NUM> of the outer peripheral exposed portions 13c are disposed in one semiconductor layered body <NUM>.

Each of the first external connection portions <NUM> and the second external connection portions <NUM> is substantially the same as that disposed at the light emitting element 10B, except that the numbers and/or shapes of the first external connection portion <NUM> and the second external connection portion <NUM> are different in accordance with the size of the semiconductor layered body <NUM>, the fifth portions <NUM>-<NUM> are not provided, and the planar shape of the seventh portion <NUM>-<NUM> is substantially rectangular.

This light emitting element 10C can also achieve the same effects as those of the light emitting elements <NUM> and 10B.

As illustrated in <FIG>, in a light emitting element 10D according to a fifth embodiment, one semiconductor layered body <NUM> having a substantially square shape is disposed on one support substrates <NUM>.

In the semiconductor layered body <NUM>, the exposed portions 13b are arrayed in four rows along the first direction F, and arrayed in six columns along the second direction S. Further, six of the outer peripheral exposed portions 13c are disposed along the first direction F, and four thereof are disposed along the second direction S. <NUM> of the outer peripheral exposed portions 13c are disposed in one semiconductor layered body <NUM>. Each of the first external connection portions <NUM> and the second external connection portions <NUM> is substantially the same as that disposed at the light emitting element <NUM>, except that the numbers and/or shapes of the first external connection portion <NUM> and the second external connection portion <NUM> are different in accordance with the size of the semiconductor layered body <NUM>, the fifth portions <NUM>-<NUM> are not provided, and the planar shape of the seventh portion <NUM>-<NUM> is substantially rectangular.

This light emitting element 10D can also achieve the same effects as those of the light emitting element <NUM>.

As illustrated in <FIG>, in a light emitting element 10E according to a sixth embodiment, the positions of the outer peripheral exposed portions 13c, and the shapes of the third portion <NUM>-<NUM> and the fourth portion <NUM>-<NUM> of the first external connection portion <NUM> facing the outer peripheral exposed portion 13c, are different. Furthermore, the light emitting element 10E has substantially the same configuration as that of the light emitting element <NUM>, except that each eighth portion <NUM>-<NUM> is disposed in the region near the corner portion, that is, in a region having an area that is <NUM>/<NUM> or less of the entire area of the semiconductor layered body and including corners, in the light emitting element 10E.

The positions of the outer peripheral exposed portions 13c, and the shapes of the third portion <NUM>-<NUM> and the fourth portion <NUM>-<NUM> of the first external connection portion <NUM> facing the outer peripheral exposed portion 13c are substantially different from those in the light emitting element 10A.

This light emitting element 10E can also achieve the same effects as those of the light emitting elements <NUM> and 10A.

As illustrated in <FIG> and <FIG> and <FIG>, the light emitting device <NUM> according to a seventh embodiment includes the substrate <NUM> including the wires <NUM>, <NUM>, and <NUM> on the upper surface thereof, the above-described light emitting element <NUM>, the cover member <NUM>, and the light transmissive member <NUM>.

The substrate <NUM> is formed of aluminum nitride, and includes the wires <NUM>, <NUM>, and <NUM> on the upper surface thereof. The outermost surfaces of the wires <NUM>, <NUM>, and <NUM> are formed of Au. The distances D1 and D2 between the wires <NUM>, <NUM>, and <NUM> are <NUM>, for example.

On the substrate <NUM>, the light emitting element <NUM> is flip-chip mounted using the surface on which the first external connection portions <NUM> and the second external connection portions <NUM> are formed as the mounting surface.

In other words, when the light emitting element <NUM> is disposed, the second external connection portion <NUM> of the first light emitting portion 10X faces the convex region of the second wire <NUM>, and the second external connection portion <NUM> of the second light emitting portion 10Y faces the convex region of the third wire <NUM>. Then, as illustrated in <FIG>, the missing portions t of the seventh portion <NUM>-<NUM> of the second external connection portion <NUM> are disposed so as to correspond to the inclined portions H1 and H2 in the convex region of the second wire <NUM>. Further, the inclined portions m of the fifth portion <NUM>-<NUM> of the first external connection portion <NUM> are disposed so as to correspond to the inclined portions G3 and G4 in the concave region G of the first wire <NUM>.

The light transmissive member <NUM>, which is formed of a ceramic containing approximately <NUM> wt% of the phosphor is bonded to the upper surface of the light emitting element <NUM>. The thickness of the light transmissive member <NUM> is approximately <NUM>, and in a plan view, the outer edge of the lower surface of the light transmissive member <NUM> is disposed so as to be substantially aligned with the outer edge of the light emitting element <NUM>.

For example, as illustrated in <FIG>, the protective element <NUM> that electrically connects the wire <NUM> and the wire <NUM> is disposed at a side of the light emitting element <NUM>. The protective element <NUM> is a Zener diode, for example.

The cover member <NUM> is disposed on the side surfaces of the light emitting element <NUM>, and between the light emitting element <NUM> and the substrate <NUM>. The cover member <NUM> further covers the upper surface of the substrate <NUM>, all of the side surfaces of the first external connection portion <NUM> and the second external connection portion <NUM>, and the protective element <NUM> is also embedded inside the cover member <NUM>. Further, the cover member <NUM> exposes the front surface of the cover layer <NUM> disposed on the upper surface of the light transmissive member <NUM>, and covers the side surfaces of the light transmissive member <NUM> and the cover layer <NUM>.

The cover member <NUM> is formed of a modified silicone resin containing approximately <NUM> wt% of titanium oxide, and has light reflectivity.

In the light emitting device having such a configuration, the light emitting element <NUM> is bonded to the substrate <NUM> in a state in which the high heat dissipation performance is secured, and at the same time, damage to the electrodes and the like caused by the external force applied at the time of bonding can be prevented in the vicinity of the exposed portion 13b. Further, it is possible to prevent the short circuit between two of the light emitting portions from occurring, while reducing the distance between the two light emitting portions. Accordingly, the light emitting device having high reliability and high light extraction efficiency can be obtained.

A light emitting device according to an eighth embodiment includes the light emitting element <NUM>, a first substrate 23A, a second substrate 23Aa, and a conductive member <NUM>. As illustrated in <FIG>, the first substrate 23A includes a plurality of external terminals, for example, a first external terminal <NUM>, a second external terminal <NUM>, a third external terminal <NUM>, and a fourth external terminal <NUM>, on the upper surface of the first substrate 23A. The second substrate 23Aa is disposed on the first substrate 23A, and includes a plurality of wiring lines, for example, a first wiring line 26A, a second wiring line 25A1, a third wiring line 24A, and a fourth wiring line 25A2, on the upper surface of the second substrate 23Aa. The first substrate 23A is, for example, an aluminum substrate. The second substrate 23Aa is, for example, an aluminum nitride substrate.

On the second substrate 23Aa, the light emitting element <NUM> is flip-chip mounted using the surface on which the first external connection portions <NUM> and the second external connection portions <NUM> are formed as the mounting surface.

The first wiring line 26A is electrically connected to the first external connection portion <NUM> of the first light emitting portion 10X in the light emitting element <NUM>. The second wiring line 25A1 is electrically connected to the second external connection portion <NUM> of the first light emitting portion 10X. The third wiring line 24A is electrically connected to the first external connection portion <NUM> of the second light emitting portion 10Y. The fourth wiring line 25A2 is electrically connected to the second external connection portion <NUM> of the second light emitting portion 10Y.

The first external terminal <NUM>, the second external terminal <NUM>, the third external terminal <NUM>, and the fourth external terminal <NUM> are electrically connected to the first wiring line 26A, the second wiring line 25A1, the third wiring line 24A, and the fourth wiring line 25A2, respectively, via the conductive member <NUM>. For example, a metal wire can be used as the conductive member <NUM>. Specifically, the first external terminal <NUM> and the first wiring line 26A, the second external terminal <NUM> and the second wiring line 25Al, the third external terminal <NUM> and the third wiring line 24A, and the fourth external terminal <NUM> and the fourth wiring line 25A2 are electrically connected by the conductive member <NUM>.

The circuit connecting the first light emitting portions 10X in series is configured by electrically connecting the first external terminal <NUM>, the first wiring line 26A, the second wiring line 25A1, and the second external terminal <NUM>. The circuit connecting the second light emitting portions 10Y in series is configured by electrically connecting the third external terminal <NUM>, the third wiring line 24A, the fourth wiring line 25A2, and the fourth external terminal <NUM>. For example, by appropriately changing the value of the current flowing into each circuit, the first light emitting portion 10X and the second light emitting portion 10Y can be individually controlled. For example, when the value of the current flowing through the first light emitting portion 10X is lower than the value of the current flowing through the second light emitting portion 10Y, the light output on the first light emitting portion 10X side can be relatively low in the light emitting element <NUM>.

A light emitting device according to a ninth embodiment includes the light emitting element <NUM>, a first substrate 23B, a second substrate 23Ba, and the conductive member <NUM>. As illustrated in <FIG>, the first substrate 23B includes a plurality of external terminals, for example, a first external terminal 41B and a second external terminal 42B, on the upper surface of the first substrate 23B. The second substrate 23Ba is disposed on the first substrate 23B, and includes a plurality of wiring lines, for example, a first wiring line 26B, the second wiring line 25A1, the third wiring line 24A, the fourth wiring line 25A2, and a conductive layer 26C, on the upper surface of the second substrate 23Ba. The conductive layer 26C is disposed adjacent to the first wiring line 26B and is electrically insulated from the first wiring line 26B. A constant current diode <NUM> is connected in series to the first wiring line 26B and the conductive layer 26C.

The first external terminal 41B is electrically connected to the conductive layer 26C and the third wiring line 24A by the conductive member <NUM>. The second external terminal 42B is electrically connected to each of the second wiring line 25A1 and the fourth wiring line 25A2 by the conductive member <NUM>. A circuit in which the first light emitting portion 10X and the second light emitting portion 10Y in the light emitting element <NUM> are connected in parallel between the first external terminal 41B and the second external terminal 42B is configured. The constant current diode <NUM> is connected in series with the first light emitting portion 10X.

The circuit connecting the first light emitting portions 10X in series is configured by electrically connecting the first external terminal 41B, the conductive layer 26C, the constant current diode <NUM>, the first wiring line 26B, the second wiring line 25A1, and the second external terminal 42B. The circuit connecting the second light emitting portions 10Y in series is configured by electrically connecting the first external terminal 41B, the third wiring line 24A, the fourth wiring line 25A2, and the second external terminal 42B. Apart from these configurations, the ninth embodiment has substantially the same configuration as the eighth embodiment.

By providing the constant current diode <NUM> in this manner, the light output of the first light emitting portion 10X can be made relatively lower than the light output of the second light emitting portion 10Y, by one circuit and not individually controlling the light emitting portions by using two circuits.

Claim 1:
A light emitting element (<NUM>) comprising:
a semiconductor layered body (<NUM>) having a rectangular planar shape and including a first semiconductor layer (13n), a light emitting layer (13a), and a second semiconductor layer (13p) in this order, the semiconductor layered body (<NUM>) defining a plurality of exposed portions (13b) in which the first semiconductor layer (13n) is exposed from the second semiconductor layer (13p) and the light emitting layer (13a), each of the exposed portions (13b) being surrounded by the second semiconductor layer (13p) in a plan view;
an insulating film (<NUM>) covering the semiconductor layered body (<NUM>), and defining a plurality of opening portions (14a) respectively above the exposed portions (13b);
a first electrode (<NUM>) connected to the exposed portions (13b) at the opening portions (14a), a portion of the first electrode (<NUM>) being disposed on the second semiconductor layer (13p) via the insulating film (<NUM>);
a second electrode (<NUM>) connected to the second semiconductor layer (13p);
a first external connection portion (<NUM>) connected to the first electrode (<NUM>) and spaced apart from the exposed portions (13b) in the plan view; and
a second external connection portion (<NUM>) connected to the second electrode (<NUM>), wherein
in the plan view, the first external connection portion (<NUM>) includes
a plurality of first portions (<NUM>-<NUM>) located between the exposed portions (13b) in a first direction (F) parallel to one side of the semiconductor layered body (<NUM>), and arrayed in the first direction (F), with a number of the first portions (<NUM>-<NUM>) disposed between adjacent ones of the exposed portions (13b) being two or more, and
a plurality of second portions (<NUM>-<NUM>) not located between the exposed portions (13b) in the first direction (F), and arrayed in the first direction (F), each of the second portions (<NUM>-<NUM>) being different in shape or size from each of the first portions (<NUM>-<NUM>).