Patent Description:
Modem multichannel transceiver RFICs find numerous applications in antenna array based systems, such as phased array or MIMO systems. Examples of such systems are communications systems or radar sensor systems. Modem systems, such as <NUM>, WLAN or MIMO radar systems, have tens of radio channels or even more. Generation of multiple radio signals and distributing them on-chip while maintaining high signal integrity poses significant challenges. For example, generation of high-purity signals requires high-quality voltage controlled oscillators. Distribution of both transmitted signals and receive local oscillator signals to multiple transceivers poses a risk of signal contamination through leakage at the crossings of signal distribution lines. Effective radiation of signals from the RFICs require efficient antennas, which are preferable located on or in proximity to the RFIC, such as in the package of the RFIC.

The dimensions of radio frequency integrated circuits (RFIC) often give rise to a disparity between the required and actual response of electronic circuits. For example, where a capacitor bank is expected to provide selectable known capacitance it has been found that when the physical dimensions of the capacitor bank is a fraction of the signal wavelength, electronic coupling within a capacitor bank produce significant deviation from required capacitance of each switched capacitor array branch of the capacitor bank.

Various methods are used to counter signal dependent deviation within the capacitor bank. For example, the connecting components between the functional circuit and the capacitance bank are particularly thick, constructed from high conductivity materials or otherwise selected so as to lower the overall inductance and resistance to all the capacitors. However this has been found to result in non-linear characteristics of capacitance dependency on branch switching. In an application example of a capacitor bank in a voltage controlled oscillator (V CO), this results in nonlinear or even non-monotonous dependency of frequency on branch switching.

Another method is to use adjusted capacitance values in the capacitor bank such that the capacitance of each array branch is corrected to compensate for its distance from the terminals of the functional circuit. In practice however, in such unbalanced capacitor bank the uniformity of capacitance steps is compromised and they are very difficult to tune.

It is further important to electronically isolate crossing signals to avoid crosstalk therebetween. Isolation is particularly hard to achieve on a printed circuit board or integrated circuit chip where the physical dimensions are limited and where leakage limits system performance.

One way in which crosstalk is reduced is to introduce an extended conducting plate to serve as a ground shield between the crossing signal lines. However, where the conducting plate is not actually grounded, it has surprisingly been found that charge flows within or around the conducting material of the ground shield to some extent. As a result crosstalk still occurs even where the ungrounded conductor is introduced as a shield.

The need remains, therefore, for a circuit which enabling a large capacitor bank in a functional circuit without compromising step uniformity or linearity as well as for an improved isolation mechanism for use in an ungrounded chip. The invention described herein addresses the above-described needs.

It is also noted that PCB based antennas, such as Surface Mount Technology (SMT) dipole antennas are manufactured by printing copper radiating elements upon a glass epoxy substrate. Such antennas are used to transmit or receive electromagnetic radiation within a certain bandwidth. The antenna bandwidth is limited by the physical dimensions of the radiating elements, which is generally around a half wavelength.

The idea of combining an electric dipole with a magnetic dipole to obtain a symmetric radiation pattern (in E-plane and in H-plane) was proposed in the <NUM>'s with the original aim of providing efficient illumination of dish antennas. To achieve this effect, the electric and magnetic dipoles were displaced along the axis of radiation. More recently, the idea was applied to antennas above a ground plane, where the directivity and bandwidth of the radiation are improved by combining an electric dipole with a magnetic dipole to produce a complementary wideband antenna, for example, United States Patent Number <CIT>, titled, "Complementary wideband antenna" describes a complementary wideband antenna which includes a planar dipole formed of two dipole wing sections and a shorted patch antenna located between the dipole wing sections. The dipole sections of the planar dipole are spaced above a ground plane. A feed probe is used to excite the antenna. Such complementary wideband antenna shows low back radiation and a stable gain and radiation pattern shape over a wide frequency bandwidth.

However, the transmission frequency of such complementary wideband antennas is highly dependent on the physical dimensions of the antenna elements themselves. For example, for a transmission wavelength of l, the length of each of the dipole element is approximately <NUM> and these are separated by a gap of approximately O. so as to form the patch antenna therebetween. Accordingly, the tip-to-tip length of the antenna is approximately <NUM>. In the orthogonal orientations, both the width of the antenna and its height from the ground plane are approximately <NUM>.

Accordingly, to transmit radiation at, say, <NUM> (which has a wavelength of about <NUM> in free space) would require dimensions of about <NUM> x <NUM> x <NUM>. Such large antennas are impractical in a wideband array configuration, that requires an element to element spacing of half wave length at the highest frequency. Therefore, if a single antenna is capable to operate at <NUM>-<NUM> range, the requirement would be to space them <NUM> apart (<NUM>= half wavelength at <NUM>).

Document <CIT> discloses a switched capacitor which includes a capacitor and a switch. The capacitor is coupled between a p-node and an n-node and includes interleaved p-fingers and n-fingers. A number of the p-fingers is greater than a number of the n-fingers. The switch is coupled between the n-node and ground.

The need remains, therefore, for a wideband unidirectional compact antennas with small enough dimensions. The invention described herein addresses this need.

The object is solved by an array of switched capacitors comprising a plurality of capacitors upon a substrate, said capacitors arranged into a plurality of capacitor array branches, each capacitor array branch having a characteristic capacitance, and a plurality of electronic switches configured to selectively connect each capacitor array branch to an extended conducting ground plane, wherein each said capacitor array branch is conductively coupled to common functional circuit terminal junction, and wherein said ground plane comprises at least one current limiting element located such that return current from each said capacitor array branch to the functional circuit terminal junction is equalized according to claim <NUM>.

Preferred embodiments are mentioned in the dependent claims.

For a better understanding of the embodiments and to show how it is carried into effect, reference will now be made, purely by way of example, to the accompanying drawings.

With specific reference now to the drawings in detail, it is stressed that the particulars shown are by way of example and for purposes of illustrative discussion of selected embodiments only, and are presented in the cause of providing what is believed to be the most useful and readily understood description of the principles and conceptual aspects. In this regard, no attempt is made to show structural details in more detail than is necessary for a fundamental understanding; the description taken with the drawings making apparent to those skilled in the art how the various selected embodiments are put into practice. In the accompanying drawings:.

Aspects of the present disclosure relate to system and methods for improving RFIC chips. Systems and methods are described for providing capacitance banks in radio frequency integrated circuits which use a ground plane to equalize return currents from array branches in a capacitor bank. Systems and methods are described for reducing crosstalk between crossing signal lines by providing isolation mechanisms for use as a modified shield between the signal carrying lines.

Further systems and methods improve PCB mounted antenna arrays for example by providing MIMO antenna-arrays combining antennas having directivity-levels and where appropriate providing material encapsulated magneto-electric antennas. Particularly, the antennas are integrated with the RFIC or within its package.

In various embodiments of the disclosure, one or more tasks as described herein are performed by a data processor, such as a computing platform or distributed computing system for executing a plurality of instructions. Optionally, the data processor includes or accesses a volatile memory for storing instructions, data or the like. Additionally, or alternatively, the data processor accesses a non-volatile storage, for example, a magnetic hard-disk, flash-drive, removable media or the like, for storing instructions and/or data.

It is particularly noted that the systems and methods of the disclosure herein are not limited in its application to the details of construction and the arrangement of the components or methods set forth in the description or illustrated in the drawings and examples. The systems and methods of the disclosure are capable of other embodiments, or of being practiced and carried out in various ways and technologies.

Alternative methods and materials similar or equivalent to those described herein are used in the practice or testing of embodiments of the disclosure. Nevertheless, particular methods and materials are described herein for illustrative purposes only. The materials, methods, and examples are not intended to be necessarily limiting.

Aspects of the present disclosure relate to systems and methods for providing capacitor banks in radio frequency integrated circuits.

By way of example only, one circuit affected by difficulties in connecting switched capacitor arrays uniformly, is the frequency tuning capacitor bank of a voltage controlled oscillator (V CO) circuit. Where the bank is of a large enough physical size that the array branches of the order of magnitude of the signal wavelength, the capacitor bank develops non-linear characteristics of capacitance dependency on branch switching.

This occurs when the each array branch of individual switched capacitor array elements are connected with unequal impedance to the VCO main inductor at different junction points. It has been found that such systems develop non-linear frequency switching or even non-monotonic behavior.

It has been surprisingly found that such non-linear and non-monotonic behavior are an acute problem, for example, large-array differential switched capacitor circuits, when capacitance control algorithms perform actions which have unexpected outcomes. These drawbacks have necessitated creative solutions.

It is therefore suggested that by adding a virtual ground plane to act as the return path between the two differentially arranged large-array switched capacitor banks. Accordingly, the array is laid out such that the capacitor side terminals of each of the array branches of switched capacitor array elements in each capacitor bank is connected to a common connection point.

Various features of the virtual ground plane architecture are discussed herein below such as biasing the ground plane to either the source or drain voltages of the so as to allow small size array FET switches to be used due to an extended voltage range driving the FET gate-source voltages.

Further the bias terminal is located at the geometric center of the ground plane, possibly through a choke component, to improve common-mode ground noise rejection or injection.

Moreover, the ground plane itself is used as a current shaping device, perhaps by cutting holes or slots within the metal (cheesing) in such as manner so as to equalize the return path from each switched array branch to the functional circuit terminals.

As required, detailed embodiments of the present invention are disclosed herein; however, it is to be understood that the disclosed embodiments are merely examples of the invention that are embodied in various and alternative forms. The figures are not necessarily to scale; some features are exaggerated or minimized to show details of particular components.

Reference is now made to the block diagram of <FIG> which indicates selected elements of an electronic system <NUM> including a functional circuit <NUM> connected to an array of switched capacitors <NUM> according to the current disclosure.

The electronic system <NUM> includes the functional circuit <NUM>, a capacitance bank <NUM>, a ground plane <NUM>, a noise reduction mechanism <NUM> and a bias voltage terminal <NUM>. It is particularly noted that the array of switched capacitors <NUM> is connected to the functional circuit at a single terminal <NUM> whereas each array branch 122A-D of the capacitance bank <NUM> is individually connected to the ground plane <NUM>.

The capacitance bank <NUM> is a plurality of capacitors mounted upon a substrate. The capacitors are arranged into a plurality of capacitor array branches 122A-D having a characteristic capacitance. One end of each capacitor array branch 122A-D is connected to a common function circuit terminal <NUM>. The other end of each capacitor array branch 122A-D is connected to the ground plane <NUM> at separate connection points.

Where required, a plurality of electronic switches is provided for selectively connecting each capacitor array branch to the ground plane. Additionally or alternatively, the plurality of electronic switches is provided for selectively connecting each capacitor array branch to the common functional circuit terminal junction.

Referring now to the schematic circuit diagram of <FIG>, an example of a particular functional circuit <NUM> is shown which is configured as a voltage controlled oscillator (VCO). The VCO circuit includes a fine tuning circuit <NUM> and an inductor element <NUM>. The capacitor bank <NUM>, which is used for coarse tuning, is connected between the terminals 215A, 215B of the inductor <NUM>.

The capacitor bank <NUM> includes a plurality of array branches <NUM> each having a different known capacitance each array branch is connected to the ground plane via a corresponding electronic switch <NUM>. Required capacitance is selected by switching required the branches such that the overall sum of the capacitance bank is equal to the sum of the individual capacitances of all the selected branches. In some implementations, the capacitance of each array branch is a multiple of a power of two such that, where there are N array branches in the bank, 2N discrete values of capacitance are selected.

As noted herein, in order for the required value of capacitance to have any linearity, the capacitance of each branch must be controlled. However where the physical size of the branches is a significant fraction of the signal wavelength, electronic coupling within a capacitor bank produces significant deviation from required capacitance to a differing degree for each switched capacitor array branch.

Reference is now made to the schematic circuit diagram of <FIG> which indicates how two arrays 230A, 230B of switched capacitors of the disclosure are incorporated into a similar VCO functional circuit.

It is noted that the VCO circuit is used for illustrative purposes. It will occur to those skilled in the art that balanced capacitance banks of the disclosure are used with a variety of functional circuits such as, but not limited to phase shifters, filters, tuning circuits and the like.

The system includes a first capacitance bank 230A connected to a first terminal 215A of the functional circuit <NUM> and a second capacitance bank 230B connected to a second terminal 215B of the functional circuit <NUM>. It is a particular feature of the system that each array branch 222A of the capacitance bank is connected to a common ground line GND at a separate junction point 223A. Accordingly, the return current path for each branch is different for each branch. Consequently, the capacitance of each branch is controlled.

Furthermore, the ground line itself is biased to a known voltage, such as the true ground, the source supply voltage (VSS), the drain supply voltage (VDD) or the like as suits requirements.

It will be appreciated that such as bias extends the voltage range driving the FET gate-source voltages. This in turn allows FET switches of smaller size to be used in the array branches.

With reference now to <FIG>, which shows an isometric representation of an extended ground plane <NUM>, current shaping elements <NUM> are introduced into the ground plane <NUM> for equalizing return path current from each array branch 320A, 320B of the capacitance bank.

Current shaping zones <NUM> are used to produce a ground plane with a required conductivity map such that the path from each array branch has a required reactance. The reactance is selected so as to counteract the deviations from required capacitance for each array branch.

Reference is now made to the isometric representation of <FIG> and the top view of <FIG>, which schematically represent a particular example of a pair of capacitance arrays 420A, 420B connected to a common current shaping ground plane <NUM>.

Each capacitance array branch of the example includes a terminal plate 422A, 422B connected to the functional circuit <NUM> at its center point. The terminal plate 422A, 422B is connected to a grounding zone 434A, 434B of the common ground plane <NUM> via an array of <NUM> switchable capacitor arranged around its perimeter. It will be appreciated that where each switchable capacitor has the same capacitance C, the capacitor array itself is used to select a total capacitance of any value up to 64C in steps of C by switching the required number of capacitors.

It is noted that where equal capacitances are used, and each is at a common difference from the connecting point in the center 424A, 424B of the terminal plate, the impedance of each switchable capacitor should be equal.

Alternatively, the various switchable capacitors have different capacitors for example one of the capacitors have a capacitance of C2 such that <NUM> values of capacitance up to <NUM>. 5C are selected in steps of C/<NUM>. It will be appreciated that other by providing certain capacitors with other fractional values provide still smaller steps as required. Furthermore, smaller capacitors allow FET switches having smaller sizes to be used. As required central control is provided to subsets of capacitors.

Another feature of this embodiment is that the common current shaping ground plane has a slot <NUM> therethrough dividing the grounding zone 434A of the first array 420A with the grounding zone 434B of the second array 420B, thus current flow therebetween is limited such that the return path between the closest capacitors is equal to the return path between the furthest capacitors.

Although the array described herein consists of an array of capacitance branches arranged around the perimeter of a rectangle, it will be appreciated that other configurations are preferred as required. For example, circular arrays, spiral arrays, checkerboard arrays, hexagonal arrays, fractal arrays are implemented as suit requirements.

Typically, current forming holes are cut into the metal of the ground plane. The current forming holes provide the current shaping zones within the ground plane which direct and shape the return current between each array branch to the bias terminal.

Such current shaping zones are additionally or alternatively formed by using a ground plane of varying thickness or varying materials. For example, insulating or semiconducting materials are introduced into the ground plane to generate the required resistance map.

Furthermore, by connecting the ground plane to the bias voltage via a bias terminal located at its geometric center common-mode ground noise is reduced. Further noise reduction mechanisms such as chokes are further included.

Other aspects of the present disclosure relate to systems and methods for providing an isolating mechanism for reducing crosstalk between crossing signal lines. In particular the disclosure relates to an isolation mechanism introducing a current forming element between the signal carrying lines.

It has been found that although crosstalk is reduced when a conducting shield is introduced between crossing signal wires, significant capacitive coupling occurs between the two signal carrying wires. Surprisingly, this capacitive coupling sets a limiting threshold to the extent that crosstalk between the signal lines is reduced. It has been found that the amount of crosstalk increases with the frequency of the signal.

It is suggested that crosstalk between the signal lines is reduced by introducing inductive coupling between the signal lines so as to balance the capacitive coupling such that they cancel each other out. Accordingly, an isolation mechanism includes current forming elements which set up required currents within the conducting shield such that the reactive component of the inductive coupling cancels the reactive component of the capacitive coupling.

For example, current directing elements such as shaped holes, insulators, semiconductors or the like are introduced into the conducting shield between the crossing transmission lines. It is noted that shaped holes cut through the metal shield have been found to be particularly effective. This forces the current within the conducting shield to flow around the holes in such as a way that the introduced inductive coupling balances the capacitive coupling reducing crosstalk between the signals.

In particular, it has been surprisingly found that diagonal holes of appropriate direction, shape and dimensions through the conducting shield make a significant improvement in the isolation between transmission and reception transition lines in certain systems. It has further been found that the dimensions of the hole through the conducting shield is selected to isolate the signal coupling in a preferred direction.

As suit requirements, shapes for the holes are selected from a group including ellipses, rectangles, triangles, dumbbells, or the like as well as combinations thereof. Accordingly, the dimensions of the hole are determined by suitable selection of defining parameters such as inclination angle, length, width, depth, eccentricity, function of curvature or the like. It is noted that the method is implemented in both single end and differential structures and provides a solution to the crosstalk without adding to overall chip area or complexity. Indeed it is achieved by reducing material from the conducting shield.

Reference is now made to <FIG> which respectively show a top view and an isometric view schematically representing an isolation mechanism <NUM> according to the disclosure introduced between two crossing single ended signal lines 520A, 520B.

The signal isolation mechanism for reducing crosstalk between at least two crossing signal lines. The system includes a conducting shield <NUM> a first signal line 520A, a second signal line 520B.

The conducting shield <NUM> of the example is an extended conducting plate having a first side (the upperside, say) and a second side (the underside, say). The first signal line 520A runs parallel to the upperside side of the conducting shield in a first direction. The second signal line 520B runs parallel to the underside of the conducting shield <NUM> in a second direction not parallel to the first direction. Accordingly, the second signal line 520B crosses the first signal line 520A.

It is a particular feature of the disclosure that the conducting shield <NUM> includes at least one current directing element <NUM> selected such that inductive coupling generated between the first signal line and the second signal line cancels the capacitive coupling therebetween.

The current forming element is a hole <NUM> extending from the first side to the second side of the conductor. It has been found that signal isolation is improved by locating the hole through the conducting shield at the point where the two signals cross along a line extending through the shield from the first signal line to the second signal line.

The through-hole <NUM> is shaped such that inductive coupling generated between the first signal line 520A and the second signal line 520B cancels capacitive coupling therebetween. Where appropriate the through-hole <NUM> is diagonally elongated at an angle to both the first signal line 520A and the second signal line 520B.

Referring now to <FIG> a top view, an isometric view and an exploded isometric view are shown schematically representing an isolation mechanism <NUM> introduced between two crossing differential signal lines 620A, 62B according to the current disclosure.

The first differential signal line 620A comprises a first differential pair of conductors. The first differential pair includes a PLUS-line conductor and a MINUS-line conductor.

Similarly, the second differential signal 620B line comprises a second differential pair of conductors. The second differential pair includes a PLUS-line conductor and a MINUS-line conductor.

Accordingly, the signal isolation mechanism <NUM> has a first through hole 612A located along a line through the conducting shield extending from a PLUS-line conductor of the first signal line to a PLUS- line conductor of the second signal line at the point at which they cross.

Further the signal isolation mechanism has a second through hole 612B located along a line through the conducting shield extending from a PLUS-line conductor of the first signal line to a MINUS-line conductor of the second signal line at the point at which they cross.

Moreover, the signal isolation mechanism has a third through hole 612C located along a line through the conducting shield extending from a MINUS-line conductor of the first signal line to a PLUS-line conductor of the second signal line at the point at which they cross.

The signal isolation mechanism also has a fourth through hole 612D located along a line through the conducting shield extending from a MINUS-line conductor of the first signal line to a MINUS-line conductor of the second signal line at the point at which they cross.

It has been found that couple balancing is improved by shaping and positioning the through holes such that the first through hole is diagonally elongated at a first angle across both the first signal line and the second signal line, the second through hole is diagonally elongated at a second angle across both the first signal line and the second signal line, the third through hole is diagonally elongated at the second angle; and the fourth through hole is diagonally elongated at the first angle.

Although only through holes are described above, other embodiments include conductors of varying thicknesses, for example pits or rises are etched into the conducting shield to shape eddy- currents therewithin. Similarly other current forming elements, such as variously shaped indentations, dimples, insulators, semiconductors or the like are introduced into the conducting shield as suit requirements.

Referring now to the graphs presented in <FIG>, results are presented of a simulation illustrating how crosstalk is reduced using various embodiments of the isolation mechanism.

It is noted that performance of various dimensions of the diagonal holes are compared against performance of a conducting shield having no current shaping elements at all. The results indicate that where the holes are sufficiently large cross talk is reduced significantly particularly at signal frequencies in the region of about <NUM>-<NUM>.

It is further noted that where required, hole dimensions and shapes are optimized for particular frequency ranges.

This disclosure further discloses possible array topologies for combining antennas having directivity-levels into a Multiple Input Multiple Output (MIMO) array. MIMO arrays are useful and well known concepts to utilize efficiently high-resolution beam-pattern (either by pure digital beamforming or a combination of analog and digital beam-steering).

Referring to <FIG>, some array topologies include an L-shape array 800A, a Pi-shape 800B and a frame-array 800C. Such topologies limit the possible attainable system-tradeoffs (such as angular resolution, field-of-view and signal to noise ratio).

It has surprisingly been found that more efficient utilization of MIMO and beam-formed arrays are produced by combining L-shape and Pi-shape array topologies using antennas of different directivity- values. Such a novel array topology uses a combination of non-directional (wide-beam) and directional antennas over different edges of the array, permitting enhancement of the array performance, for example over selected sectors of the arena.

Referring now to <FIG>, by way of example, one possible embodiment of a combined array is a first asymmetric array 800D. The asymmetric array is produced by connecting a large number of transmitting ports to wide-beam antennas <NUM> along a first leg <NUM> OD of a Pi-shape array and a smaller number of transmitting ports to directional antennas <NUM> along a second leg 820D of the Pi-shape array.

With reference to <FIG>, it is noted that the asymmetric array 800D provide most of the high-SNR (signal to noise ratio) and high angular-resolution on the vertical axis of the L-shape array. This produces a wide vertical field-of-view <NUM> and a narrow vertical field-of-view <NUM> while doubling the horizontal angular-resolution over a narrow slice <NUM> in the vertical field-of-view. Accordingly, an enhanced horizontal angular resolution is achieved in a central region <NUM> of the field-of-view
The allocation of ports between directional and non-directional antennas is derived from overall system requirements (SNR and resolution over different angular sectors).

In a non-limiting example, one possible method for obtaining a balanced response from the two asymmetrical branches <NUM>, <NUM> is by choosing the beamwidth of the directional antennas to be approximately Δθ ∼ <NUM>° (Nd/Nnd) η<NUM>, and antennas-spacing of (λ/<NUM>) (Nnd/Nd) η<NUM>, where Nd is the number of directional antennas, and Nnd is the number of wide-beam antennas, and η<NUM> and η<NUM> are realization factors.

Other possible embodiments of assymetric arrays are represented in <FIG>. With particular reference to <FIG>, in a staggered-branch array 800E the directional-antennas are staggered over the vertical-axis. Such an arrangement extends the field-of-view of the staggered branch 820E (grating-lobes rejection).

With particular reference to <FIG>, in a horizontally-extended array 800F highly-directional antennas 820F are extended over the horizontal axis for further enhancement of the horizontal-resolution.

Although only asymmetrical arrays of transmitters is illustrated here, it will be appreciated that still other embodiments include similarly modified arrays of receiving antennas.

In addition, the gain and directivity of the receiving antennas and the transmitting antennas are different, and adjusted to optimize system-performance. For example - in the first asymmetric array, slightly-directional antennas are implemented for the receiving ports - which directivity is between the directional and the non-directional transmitting antennas - Dtx,dn < Drx < Dtx,d.

A possible transmission-scheme over this topology variously uses a MIMO transmission, or analog-beam forming of the transmitting-antenna, and combine the two transmitting branches either by using time-domain multiplexing (TDM), orthogonal-coding (e.g. Fladamard encoding), frequency-domain multiplexing (FDM, e.g. using different RF frequency per branch) or other methods as required.

Still other aspects of the present disclosure relate to the implementation of magneto-electric antennas implemented with common printed circuit board (PCB) technology. In particular the disclosure relates to providing encapsulated wideband magneto-electric antennas, where the radome is embedded within the antenna design.

Reference is now made to <FIG>, which is a schematic representation of a magneto-electric dipole antenna which has been found to provide a directional transmission.

The magneto-electric dipole antenna is a hybrid combination of an electric dipole and a magnetic dipole, which has been shown to generate wideband directional radiation patterns in both the E-plane and the H-plane.

The magneto-electric dipole antenna includes an electric dipole section, a magnetic dipole section in the form of a magnetic loop and a feed probe.

The electric dipole section has a first dipole wing section and a second dipole wing section parallel to a ground plane but spaced therefrom by about a half wavelength spacing.

The magnetic dipole section is formed in a region between the first dipole wing section and the second dipole wing section and is thus bounded on three sides by a first vertical patch section and a second vertical patch section and a connecting patch section of said ground plane. The first vertical section connects the ground plane to the first dipole wing section of the electric dipole section and the second vertical section connects the ground plane to the second dipole section.

The feed probe is situated within the region between the first vertical dipole section and the second vertical dipole section. The feed probe is configured and operable to excite the antenna. For example, the feed probe includes a gamma-shaped conductor which is connected to an oscillator. The gamma-shaped probe has a leg section, a neck section and a folded section the dimensions of which are selected to suit required resistive and capacitive characteristics of the antenna.

The gain profile for such an antenna is shown in the graph of <FIG> which presents the simulated gain profile for such an antenna. It will be noted that the simulated results indicate two resonant reflection zeros within a transmission frequency band of about 6GFHz to 10GFHz.

Referring now to <FIG>, a schematic representation is shown of an example of an encapsulated magneto-electric dipole antenna which is used to provide a directional radiation over a wide band of operating frequencies.

The wideband antenna comprises a magneto-electric dipole including an electric dipole, a magnetic dipole antenna, and a feed probe, all encapsulated inside within a dielectric enclosure. The dielectric enclosure is constructed from a glass epoxy material, for example a glass epoxy laminate such as G-<NUM>, G-<NUM>, FR-<NUM>, FR-<NUM> and FR-<NUM> or the like. The enclosure is also constructed from magnetic materials having relative magnetic permeability higher than <NUM>.

It is noted that the higher the relative permittivity Er of a dielectric material, the lower the speed of electromagnetic waves passing therethrough. Accordingly, the wavelength of electromagnetic waves of a given frequency is reduced according to the relative permittivity Er. Indeed the wavelength decrease according to the square root of the relative permittivity Er.

Accordingly, the mechanical dimensions of the encapsulated a magneto-electric dipole antenna are significantly smaller than the equivalent air based magneto-electric dipole antenna.

For example, the flame resistant glass epoxy FR-<NUM> has a relative permittivity Er of <NUM>-<NUM> so the wavelength of electromagnetic waves of a given frequency passing therethrough is about half the wavelength of the same frequency radiation in air. Therefore, by encasing a magneto-electric dipole in a dielectric enclosure (like FR-<NUM>) the physical dimensions of the antenna are reduced by almost a half. In one example, the dielectric box dimensions are as small as <NUM> millimeters x <NUM> millimeters x <NUM> millimeters. Such a small magneto-electric dipole is readily mounted and stacked upon a PCB for example. At higher frequencies, having shorter wavelength, magneto-electric dipole antennas are suitable for embedding into the PCB or an RFIC package.

Referring now to the graph of <FIG> the simulated reflection coefficient over frequency is shown for the antenna of <FIG>. It is noted that, surprisingly, whereas the air based magneto-electric dipole had only two resonant zeros (see <FIG>), the dielectric embedded magneto-electric dipole displays three distinct zeros within an extended transmission band of <NUM> to <NUM>. The additional resonant zero is a result of the dielectric enclosure serving as a resonant chamber surrounding the antenna formed of dielectric material having a relative permittivity higher than air.

The graph of <FIG> shows how the E-Plane radiation pattern of the antenna of <FIG> as a function of frequency between <NUM> and <NUM>. The patterns are very stable over frequency in both the E and H planes.

Reference is now made to <FIG> which illustrates another possible encapsulated magneto-electric dipole antenna designed to be manufactured by standard PCB production processes.

The wideband antenna again comprises a magneto-electric dipole including an electric dipole, a magnetic dipole antenna, and a feed probe, all encapsulated inside within a dielectric enclosure.

Here the magnetic dipole part is not a complete sheet of metal as illustrated in the embodiments above but rather the vertical sections of the magnetic dipole antenna are formed from by a row of platted via holes extending from the ground plane to the dipole wing.

The feed probe is a gamma-probe including a leg section, a neck section and a folded section, which is similarly formed from vias. The leg section comprises a via extending from the ground plane to the bridge section, the neck section comprises a conducting strip coplanar with the dipole wings, and the folded section comprises a via extending from the neck section towards the ground plane and separated therefrom by an insulator.

For manufacturing purposes it is useful to construct the dielectric enclosure in multiple parts which are then joined together. For example, the dielectric enclosure includes a lower section and an upper section. The magneto-electric dipole is embedded in the lower section and the upper section comprises a dielectric layer, which is subsequently affixed to cover the lower section. Accordingly, an embedded antenna element is provided which is readily affixed to a printed circuit board.

A method is therefore taught for manufacturing a wideband antenna. The method includes the following steps: providing a magneto-electric dipole, by providing a pair of horizontal conducting plates spaced so as to serve as two electric dipole wings but leaving a space suitable for a magnetic dipole therebetween; providing a first row of vias extending from a ground plane to a first electric dipole wing to serve as a first vertical section of a magnetic dipole section of the magneto-electric dipole; providing a second row of vias extending from a ground plane to a first electric dipole wing to serve as a second vertical section of a magnetic dipole section of the magneto-electric dipole, and encapsulating the magneto-electric dipole thus constructed in a dielectric material.

Furthermore the feed probe is manufactured by providing a conducting strip coplanar with the dipole wings to serve as a neck section of the feed probe; providing a first via extending from the ground plane to the conducting strip section to serve as a leg section of the feed probe; and providing a second via extending from the neck section towards the ground plane and separated therefrom by an insulator to serve as a folded section.

Reference is now made to the graphs of <FIG> which illustrate simulated values showing how gain of the encapsulated magneto-electric dipole antenna of <FIG> varies over space angle and over frequency at normal direction!.

<FIG> shows how the H-Plane gain radiation pattern varies over space angle for frequencies between <NUM> and <NUM>. <FIG> shows how the realized gain of the antenna is stable over frequencies between about 5GFHz to <NUM> GFHz.

The graphs of <FIG> illustrate how the simulated results (done using CST Microwave Studio) for the encapsulated magneto-electric dipole antenna of <FIG> compare to experimental results for a real encapsulated magneto-electric dipole antenna. It is noted how closely the experimental results follow the expected simulation results.

Referring now to <FIG>, a schematic representation is shown of an E-Plane antenna array. A row of encapsulated magneto-electric dipole antennas are arranged along a line parallel to their electric dipoles. <FIG> is a schematic E-Plane cross section representation of the magneto-electric antenna array.

It is particularly noted that all the antennas along the array share a common encapsulating radome cover. Accordingly, each antenna is embedded in an individual dielectric lower section, and a common dielectric radome cover caps all antenna of the array, thereby forming an encapsulated array.

Such an array is manufactured by a method including providing a plurality of magneto-electric dipole antennas, embedding each of the magneto-electric dipole antennas in a dielectric rectangular cuboid , providing a common dielectric radome layer, for all magneto-electric dipole antennas, mounting the embedded magneto-electric dipoles in an array upon a printed circuit board; and covering the array of embedded magneto-electric dipoles with the common dielectric radome layer.

By way of comparison, <FIG> shows a schematic representation of an E-Plane antenna array comprising a row of standard electric-dipole antenna arranged along a line parallel to their electric dipoles. <FIG> is a schematic E-Plane cross section representation of the electric-dipole antenna array.

Computer simulated models were created for both of these arrays. The behavior is presented in the graphs of <FIG> which compare the reflection coefficient and realized gain over wide frequency range for the E-Plane magneto electric antenna array of <FIG> and <FIG> having a radome layer with a relative permittivity of <NUM> and a thickness of <NUM> millimeters, and the E-Plane electric dipole antenna array of <FIG> and <FIG>.

Further computer simulated models were created for H-Plane antenna arrays such as shown in <FIG> and 17B.

<FIG> is a schematic representation of an H-Plane antenna array comprising a row of encapsulated magneto-electric dipole antenna arranged along a line orthogonal to their electric dipoles and sharing a common encapsulating radome cap;
For comparison, Fig. 17B is a schematic representation of an H-Plane antenna array comprising a row of standard electric-dipole antenna arranged along a line orthogonal to their electric dipoles.

The behavior of the simulated H-Plane antenna arrays is presented in the graphs of <FIG> are graphs comparing the reflection coefficient and realized gain over wide frequency range for the H- Plane magneto electric antenna array of <FIG> having a radome layer with a relative permittivity of <NUM> and a thickness of <NUM> millimeters, and the H-Plane electric dipole antenna array of Fig 17B.

Technical and scientific terms used herein should have the same meaning as commonly understood by one of ordinary skill in the art to which the disclosure pertains. Nevertheless, it is expected that during the life of a patent maturing from this application many relevant systems and methods will be developed. Accordingly, the scope of the terms such as computing unit, network, display, memory, server and the like are intended to include all such new technologies a priori.

As used herein the term "about" refers to at least ± <NUM> %.

The terms "comprises", "comprising", "includes", "including", "having" and their conjugates mean "including but not limited to" and indicate that the components listed are included, but not generally to the exclusion of other components. Such terms encompass the terms "consisting of and "consisting essentially of".

The phrase "consisting essentially of means that the composition or method includes additional ingredients and/or steps, but only if the additional ingredients and/or steps do not materially alter the basic and novel characteristics of the claimed composition or method.

As used herein, the singular form "a", "an" and "the" includes plural references unless the context clearly dictates otherwise. For example, the term "a compound" or "at least one compound" includes a plurality of compounds, including mixtures thereof.

Any embodiment described as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments or to exclude the incorporation of features from other embodiments.

Any particular embodiment of the disclosure includes a plurality of "optional" features unless such features conflict.

It should be understood, therefore, that the description in range format is merely for convenience and brevity and should not be construed as an inflexible limitation on the scope of the disclosure. Accordingly, the description of a range should be considered to have specifically disclosed all the possible sub-ranges as well as individual numerical values within that range. For example, description of a range such as from <NUM> to <NUM> should be considered to have specifically disclosed sub-ranges such as from <NUM> to <NUM>, from <NUM> to <NUM>, from <NUM> to <NUM>, from <NUM> to <NUM>, from <NUM> to <NUM>, from <NUM> to <NUM> etc., as well as individual numbers within that range, for example, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, and <NUM> as well as non-integral intermediate values.

It is appreciated that certain features of the disclosure, which are, for clarity, described in the context of separate embodiments, are also provided in combination in a single embodiment. Conversely, various features of the disclosure, which are, for brevity, described in the context of a single embodiment, are also provided separately or in any suitable sub-combination or as suitable in any other described embodiment of the disclosure. Certain features described in the context of various embodiments are not to be considered essential features of those embodiments unless the embodiment is inoperative without those elements.

Although the disclosure has been described in conjunction with specific embodiments thereof, it is evident that many alternatives, modifications and variations will be apparent to those skilled in the art.

Citation or identification of any reference in this application shall not be construed as an admission that such reference is available as prior art to the present disclosure. To the extent that section headings are used, they should not be construed as necessarily limiting.

Claim 1:
An array of switched capacitors (<NUM>, <NUM>, 230A, 230B) comprising:
a plurality of capacitors upon a substrate, said capacitors arranged into a plurality of capacitor array branches (122A-D), each capacitor array branch (122A-D) having a characteristic capacitance; and
a plurality of electronic switches configured to selectively connect each capacitor array branch (122A-D) to an extended conducting ground plane (<NUM>, <NUM>, <NUM>),
wherein each said capacitor array branch (122A-D) is conductively coupled to a common functional circuit terminal junction, and
wherein said ground plane (<NUM>, <NUM>, <NUM>) comprises at least one current limiting element located such that return current from each said capacitor array branch (122A-D) to the functional circuit terminal junction is equalized.