Patent Description:
The present disclosure relates generally to communication networks, and particularly to delivery of electrical power over communication links.

In various communication networks, electrical power is delivered to communication devices over the same physical links used for data communication. In twisted-pair 100BASE-T1 and 1000BASE-T1 Ethernet networks, for example, this sort of power delivery is referred to as Power over Data Lines (PoDL). PoDL is specified, for example, in <NPL>.

The description above is presented as a general overview of related art in this field and should not be construed as an admission that any of the information it contains constitutes prior art against the present patent application.

<CIT> relates to a Power Over Data Lines (PoDL) system which includes Power Sourcing Equipment (PSE) supplying DC power and Ethernet data over a single twisted wire pair to a Powered Device (PD). The PSE supplies the DC current and AC data through a cascaded coupling network including a series of AC-blocking inductor stages having different inductances to substantially filter out the AC component and pass the DC component. The data is supplied to the wires via capacitors. The PD may have a matched decoupling network for providing the separated DC power and data to a PD load.

It is the object of the present invention to improve the filter response of a PoDL filtering device.

The present application discloses an apparatus for filtering an electrical power signal in an Ethernet communication system (<NUM>), the apparatus comprising:a link interface, configured to connect to an Ethernet link;a power interface, configured to connect to one or both of (i) a power-supply that supplies the electrical power signal for transfer over the Ethernet link, and (ii) a circuit that consumes the electrical power signal transferred over the Ethernet link; and a filter (<NUM>), which is connected between the link interface and the power interface, the filter (<NUM>) comprising at least:a primary inductor (Li), configured to filter the electrical power signal transferred to or from the Ethernet link;one or more complementary inductors (L2 , L3 ) connected in series with the primary inductor (Li), the one or more complementary inductors (L2 , L3 ) configured to reduce a parasitic capacitance of the filter (<NUM>); and a resistor (Rp ), which is connected in parallel with the primary inductor (Li ), or in parallel with one of the complementary inductors (L2 , L3 ), the resistor (Rp ) configured to suppress resonance effects in the filter (<NUM>). The present application discloses a method for filtering an electrical power signal in an Ethernet communication system (<NUM>), the method comprising: receiving the electrical power signal from a power-supply that supplies the electrical power signal for transfer over the Ethernet link, or providing the electrical power signal to a circuit that consumes the electrical power signal transferred over the Ethernet link; and applying to the electrical power signal a filter (<NUM>), which comprises at least a primary inductor (Li ) and one or more complementary inductors (L2 , L3 ) connected in series with the primary inductor (Li ), including (i) filtering the electrical power signal by the primary inductor (Li ), (ii) reducing a parasitic capacitance of the filter (<NUM>) by the one or more complementary inductors (L2 , L3 ), and (iii) suppressing resonance effects in the filter (<NUM>) using a resistor (Rp ), which is connected in parallel with the primary inductor (Li ) or in parallel with one of the complementary inductors (L2 , L3 ). The method according to claim <NUM>, wherein receiving the electrical power signal comprises receiving the electrical power signal from a Media Dependent Interface (MDI) (<NUM>) that couples the Ethernet link to an Ethernet physical layer (PHY) transceiver (<NUM>); or wherein providing the electrical power signal comprises providing the electrical power signal to a Media Dependent Interface (MDI) (<NUM>) that couples the Ethernet link to an Ethernet physical layer (PHY) transceiver (<NUM>).

In an Ethernet link that uses PoDL, one communication device (referred to as a Power Sourcing Equipment - PSE) applies an electrical power signal to one end of the link. A communication device at the opposite end of the link (referred to as a Powered Device - PD) receives the electrical power signal from the link and uses it to power its circuitry. PoDL eliminates a considerable amount of heavy and expensive electrical cabling, making it highly attractive for use in automotive networks, for example.

One of the prime challenges in PoDL is the need to filter the electrical power signal with minimal effect on communication performance. For example, in a typical implementation a PoDL filter is coupled to a Media Dependent Interface (MDI) that connects the end of the link to an Ethernet physical layer (PHY) device. The PoDL filter is typically required to meet specified Electro-Magnetic Compatibility (EMC) requirements, e.g., signal/noise coupling ratios and power-conversion ratios. At the same time, to maintain adequate signal integrity, the MDI is required to meet specified return-loss and insertion-loss levels. Example requirements are set, for example, in <NPL> and <NUM>.

Both signal integrity and EMC performance deteriorate dramatically with increasing data rate, frequency and bandwidth. Therefore, PoDL filtering is particularly difficult in multi-Gigabit Ethernet, e.g., in <NUM> Gb/s, <NUM> Gb/s and <NUM> Gb/s links. It has been found that the parasitic capacitance of the filter is a major limiting factor in achieving high-performance PoDL filtering. For example, for a PoDL filter consisting of a series inductor, simulations show that the minimum allowable inductance and the maximum allowable parasitic capacitance of the inductor are ~4µH and ~<NUM>. 7pF, respectively. Inductors having this performance are extremely difficult to implement with low-cost and small-size, e.g., in Surface-Mount Technology (SMT).

Embodiments that are described herein provide improved PoDL filters that achieve both high-performance filtering and minimal degradation in communication performance. At the same time, the disclosed filters are suitable for SMT implementation, and therefore have a small form-factor and can be mass-produced with low cost. The disclosed PoDL filter configurations are described herein in the context of automotive Ethernet networks, solely by way of example. The disclosed filters and associated techniques are applicable and useful in various other suitable systems and applications, for example in industrial networks and home networks.

In some embodiments described herein, a filtering device is configured to filter an electrical power signal before it is applied to an Ethernet link (e.g., in a PSE), and/or to an electrical power signal that has been received from an Ethernet link (e.g., in a PD). When installed in a PSE, the filtering device is typically connected between the link and a power supply that produces the electrical power signal. When installed in a PD, the filtering device is typically connected between the link and a circuit that consumes the electrical power signal.

In an embodiment, the filtering device comprises a link interface for connecting to the link (e.g., to the MDI of the link), a power interface for connecting to the power supply or to the power-consuming circuit, and a filter connected between the link interface and the power interface. The filter comprises at least a primary inductor and one or more complementary inductors connected in series with the primary inductor. The primary inductor is configured to filter the electrical power signal. The complementary inductor or inductors are configured to reduce the parasitic capacitance of the filter.

In an example implementation, the inductance of each complementary inductor is an order of magnitude smaller than the inductance of the primary inductor. Since the primary and complementary inductors are connected in series, their total equivalent parasitic capacitance is smaller than the smallest parasitic capacitance of any individual inductor. Therefore, by using complementary inductor(s), it is possible to achieve a small total parasitic capacitance even when the individual parasitic capacitance of the primary inductor is relatively large, e.g., above <NUM>. The filter can thus be implemented using small and low-cost inductors. As an added benefit, the inductance of the complementary inductor increases the total equivalent inductance of the filter, thereby improving the filtering performance.

In some embodiments the filter further comprises a resistor, which is connected in parallel with one of the inductors (primary or complementary). The resistor is configured to suppress resonance effects in the filter. The added resistor also provides more freedom in choosing the inductor values.

In some embodiments, the Ethernet link is a twisted-pair link having two conductors. The filter in such embodiments typically comprises two parallel sections, each connected to one of the conductors of the twisted pair. Each section comprises a primary inductor, one or more complementary inductors, and in some embodiments a resistor. The two sections are typically matched in inductance, e.g., fabricated on the same substrate with matching component values.

Several example filter configurations are described herein. Example simulation results that illustrate the achievable filter performance are provided in <CIT>, cited above.

The simulation results show, inter alia, that the high-frequency performance (in the hundreds of MHz to GHz range) is dramatically improved by adding one complementary inductor to reduce the parasitic capacitance. Without a parallel resistor, a narrow-band resonance can be noticed, caused by interactions between inductors. Addition of a parallel resistor flattens and eliminates this resonance effect, without degrading the performance at other frequencies. A filter with two inductors and one resistor is sufficient for complying with the requirements of the IEEE <NUM>. 3ch-<NUM> standard. Higher performance at the GHz range can be achieved by adding one additional inductor, i.e., using a filter having three inductors and one resistor.

<FIG> is a block diagram that schematically illustrates an automotive communication system <NUM> that uses Power-over-Data-Lines (PoDL) power delivery, in accordance with an embodiment that is described herein. System <NUM> is installed in a vehicle <NUM>, and comprises multiple sensors <NUM> and a Central Computer (CC) <NUM>. In various embodiments, sensors <NUM> may comprise any suitable types of sensors. Several non-limiting examples of sensors comprise video cameras, velocity sensors, accelerometers, audio sensors, infra-red sensors, radar sensors, lidar sensors, ultrasonic sensors, rangefinders or other proximity sensors, and the like.

In some embodiments, sensors <NUM> communicate with CC <NUM> over an Ethernet network that comprises an Ethernet switch <NUM> and a plurality of Ethernet links. Each Ethernet link comprises a PSE physical layer (PHY) device <NUM>, a physical link <NUM> (also referred to as a network cable, in the present example a twisted-pair cable) and a PD PHY device <NUM>. In a given Ethernet link, PSE PHY <NUM> applies an electrical power signal to physical link <NUM>, and PD PHY <NUM> is powered by this electrical power signal. In the present example, PD PHYs <NUM> are coupled to sensors <NUM>, so as to eliminate (i) power-supply circuitry at each sensor and (ii) power-supply cabling to reach each sensor. In this example CC <NUM> is also coupled to a PD PHY <NUM>, by way of example. The opposite ends of physical links <NUM> (the ends connected to the ports of switch <NUM>) are coupled to respective PSE PHY devices <NUM>.

The network configuration shown in <FIG> is a highly simplified configuration that is depicted solely for demonstrating the deployment of PoDL using PSE-side and PD-side PHY devices. In alternative embodiments, any other suitable configuration can be used. For example, the choice as to which PHY device is to be a PSE PHY <NUM> and which PHY device is to be a PD PHY <NUM> can be made per each individual link, as appropriate. As another example, not all the links in the network necessarily employ PoDL.

In various embodiments, PHY devices <NUM> and <NUM> of system <NUM> may communicate over network cables <NUM> at any suitable bit rate. Example bit rates are <NUM> Gb/s, <NUM> Gb/s, and <NUM> Gb/s in accordance with IEEE <NUM>.

An inset in the middle of <FIG> illustrates the internal structure of PSE PHY <NUM>, in accordance with an embodiment. In the present example, cable <NUM> is a twisted-pair cable that comprises (i) two signal conductors <NUM>, (ii) an inner shield layer <NUM> (e.g., a foil wrap) and (iii) an outer shield layer <NUM> (e.g., a metallic mesh braid). PSE PHY <NUM> comprises a PHY transceiver (TCVR) <NUM> that transmits and receives Ethernet signals to and from a PD PHY device <NUM> (not seen in this figure) over cable <NUM>. PHY <NUM> further comprises a Media-Dependent Interface (MDI) <NUM> that connects transceiver <NUM> to twisted-pair cable <NUM> via a connector <NUM>.

In an embodiment, PSE PHY <NUM> comprises a voltage regulator <NUM> that produces electrical power signals for powering both the local circuitry and the remote circuitry on the far side of cable <NUM>. In the present example, regulator <NUM> produces a voltage denoted VCC for powering local PHY transceiver <NUM>, and another voltage Vfeed (also referred to as an "electrical power signal") that is to be applied to cable <NUM> in accordance with PoDL. In the case of a twisted-pair cable, Vfeed is to be applied as a differential voltage between conductors <NUM>.

In the embodiment of <FIG>, PSE PHY <NUM> further comprises a PoDL filtering device <NUM>, which is connected between regulator <NUM> and MDI <NUM>. Filtering device <NUM> is configured to filter the electrical power signal (voltage Vfeed) before it is applied to the Ethernet link.

Another inset, at the bottom of <FIG>, illustrates the structure of PoDL filtering device <NUM>, in accordance with an embodiment. In the present example, PoDL filtering device <NUM> comprises four terminals denoted A, B, C and D. Terminals A and B serve as a link interface for connecting to the Ethernet link. Terminals C and D serve as a power interface, for connecting to the power supply circuitry that generates the electrical power signal to be filtered. Device <NUM> comprises two parallel sections <NUM>, each section <NUM> connected (via MDI <NUM>) to one of conductors <NUM> of cable <NUM>.

In Some embodiments, PoDL filtering device <NUM> is implemented as a packaged four-terminal SMT device, e.g., a Multi-Chip Module (MCM). In these embodiments, terminals A, B, C and D comprise SMT balls or pads. In alternative embodiments, PoDL filtering device <NUM> is implemented at board-level. In these embodiments, the various components of the filtering device are mounted on a common Printed Circuit Board (PCB).

Sections <NUM> are typically matched in inductance, e.g., have matching inductance values and layouts, and fabricated on the same substrate. Alternatively, any other suitable implementation can be used. For example, an alternative filtering device may be single-ended, having only a single section <NUM>.

Each section <NUM> comprises a primary inductor <NUM> and one or more complementary inductors (in the present example a single complementary inductor <NUM>). The cascade of primary inductor <NUM> and one or more complementary inductors <NUM> acts as a filter, in the present example a Low-Pass Filter (LPF), which filters the electrical power signal. As will be explained in detail below, this configuration is highly effective in achieving a filter having a very low total equivalent parasitic capacitance.

<FIG> are circuit diagrams of PoDL filters, in accordance with example embodiments that are described herein. Any of the PoDL filters depicted in <FIG> can be used, for example, to implement a section <NUM> in filtering device <NUM> of <FIG>. Alternatively, any of the disclosed PoDL filters can be used to implement a standalone, single-ended filtering device.

<FIG> illustrates a PoDL filter comprising a primary inductor L<NUM> and a single complementary inductor L<NUM>. The parasitic capacitance of L<NUM> is denoted CL1, and the Ohmic resistance of L<NUM> is denoted RL1. Similarly, the parasitic capacitance of L<NUM> is denoted CL2 and the Ohmic resistance of L<NUM> is denoted RL2.

In one example embodiment, the inductance of the primary inductor L<NUM> is 4µH, and the inductance of the complementary inductor L<NUM> is <NUM>. When inductors L<NUM> and L<NUM> are implemented using SMT, their parasitic capacitances are typically on the order of 2pF and <NUM>. 5pF, respectively. The resistances of L<NUM> and L<NUM> in this example (RL1 and RL2) are typically on the order of 10mΩ.

Since the primary and complementary inductors are connected in series, their total equivalent parasitic capacitance is smaller than the smallest parasitic capacitance of any individual inductor. Therefore, the inductance of L<NUM> is typically chosen to be considerably smaller than that of L<NUM>. Typically, although not necessarily, the ratio between the inductances of L<NUM> and L<NUM> is set to be at least <NUM>, and in some embodiments at least <NUM>. All the numerical values given above are chosen purely by way of example. Alternatively, any other suitable inductances can be used.

<FIG> illustrates an alternative PoDL filter comprising a primary inductor L<NUM> and two complementary inductor L<NUM> and L<NUM>, all connected in series to one another. The parasitic capacitance of L<NUM> is denoted CL3, the Ohmic resistance of L<NUM> is denoted RL3. In one embodiment, the inductances, parasitic capacitances and resistances of L<NUM> and L<NUM> are the example values given in <FIG> above. The inductance of the additional complementary inductor L<NUM> is <NUM>. 125µH, the parasitic capacitance of L3 is on the order of <NUM>. 1pF, and the resistance of L3 is on the order of 10mΩ.

<FIG> illustrates yet another PoDL filter, in accordance with an alternative embodiment. In this example, the PoDL filter is similar to that of <FIG>, and further comprises a resistor Rp connected across (in parallel with) the complementary inductor L<NUM>. The resistance of Rp is typically on the order of 500Ω, although any other suitable value can be used.

Generally, a resistor of this sort can be connected across any of the inductors of the PoDL filter (primary or complementary), or across more than one of the inductors. The additional resistor reduces resonance effects, which may result from interaction between inductors. Such resonant effects may distort the filter response, e.g., introduce unwanted peaks or dips into the filter's transfer function or return loss in the frequency domain. Examples of this sort of distortion, and of its suppression by resistor Rp, are given in <CIT>, cited above.

<FIG> illustrates still another PoDL filter, in accordance with an embodiment. The PoDL filter of <FIG> is similar to that of <FIG>, and further comprises a resistor Rp connected across (in parallel with) the complementary inductor L<NUM>. The resistance of Rp is typically on the order of 500Ω, although any other suitable value can be used. In this configuration, the additional resistor is connected across the middle inductor in the cascade. This configuration is chosen in some embodiments, although not necessarily, because the parallel resistor suppresses the resonances, dampens the resonant peaks in return loss as well the resonant dips in insertion loss.

The configurations of system <NUM>, the various PHY devices <NUM> and <NUM> and their components such as filtering device <NUM> shown in <FIG>, as well as the various PoDL filters shown in <FIG>, are example configurations that are depicted solely by way of example. In alternative embodiments, any other suitable configurations can be used. For example, in an alternative embodiment, a PoDL filtering device such as device <NUM> can be installed in PD-side PHY devices <NUM> (additionally or alternatively to PSE PHY devices <NUM>).

As another example, the disclosed PoDL filters or filtering devices can be integrated in the respective PHY device. As noted above, the disclosed PoDL filters or filtering devices can be implemented at package-level (e.g., in an MCM) or at board-level (i.e., on a common PCB). In yet other embodiments, the disclosed PoDL filters or filtering devices can be implemented using a hybrid packaged/board-level implementation.

The various elements of system <NUM> and its components, e.g., PHY devices <NUM> and <NUM> and their components such as filtering device <NUM> shown in <FIG>, as well as the various PoDL filters shown in <FIG>, may be implemented using any suitable hardware, e.g., using discrete components or in a packaged SMT device.

Claim 1:
An apparatus for filtering an electrical power signal in an Ethernet communication system (<NUM>), the apparatus comprising:
a link interface, configured to connect to an Ethernet link;
a power interface, configured to connect to one or both of (i) a power-supply that supplies the electrical power signal for transfer over the Ethernet link, and (ii) a circuit that consumes the electrical power signal transferred over the Ethernet link; and
a filter (<NUM>), which is connected between the link interface and the power interface, the filter (<NUM>) comprising at least:
a primary inductor (L<NUM>), configured to filter the electrical power signal transferred to or from the Ethernet link;
one or more complementary inductors (L<NUM>, L<NUM>) connected in series with the primary inductor (L<NUM>), the one or more complementary inductors (L<NUM>, L<NUM>) configured to reduce a parasitic capacitance of the filter (<NUM>); and characterized by
a resistor (Rp), which is connected in parallel with the primary inductor (L<NUM>), or in parallel with one of the complementary inductors (L<NUM>, L<NUM>), the resistor (Rp) configured to suppress resonance effects in the filter (<NUM>).