Patent Description:
In certain applications, such as power integrated circuits, it is desirous to provide both high voltage electronic elements with low voltage electrical elements on a single semiconductor chip. https://www. com/en/articles/techzone/<NUM>/may/smart-high-side-drivers-help-meet-tough-new-automotive-standards, <CIT>, <CIT>, <CIT> and <CIT> each disclose devices that include a transistor whose operated by a control mechanism.

A semiconductor transistor device according to the preamble of appended claim <NUM> is disclosed in <CIT>.

A discrete semiconductor transistor device according to the invention is defined in appended independent claim <NUM>.

Further preferred embodiments are defined in the appended dependent claims.

The invention thereby provides an 'intelligent' switch or amplifier that can be used, alone or in combination with others instead of a microcontroller. An example application is use in a power adaptor circuit.

The invention will now be described by way of example with reference to the following figures in which:.

With reference to <FIG> there is shown a schematic of a transistor device <NUM> that can be a discrete electronic component or one of a number of electronic components of an integrated circuit.

The device <NUM> comprises a NPN bipolar junction transistor (BJT) <NUM> formed on a semiconductor chip <NUM>, the BJT <NUM> having an emitter terminal E, collector terminal C and base terminal B.

Also formed on the chip <NUM> are further electronic elements that provide controller circuitry <NUM> having an output 4A that is connected to the base terminal B of the BJT <NUM> in order to control the functioning of the BJT <NUM>.

The controller circuitry <NUM> has ports <NUM>, <NUM>* and <NUM>. Ports <NUM>, <NUM>* connect across a resistor on the emitter side of the BJT <NUM> in order to receive an analogue signal indicative of the current through the BJT <NUM>.

Port <NUM> connects to the collector side of the BJT <NUM> in order to receive an analogue signal indicative of the voltage at the collector side of the BJT relative to ground (or some other reference point). In the example of <FIG>, voltage may be referenced to port <NUM> to give a voltage across the collect C and emitter E.

The controller circuitry <NUM> has a further port <NUM> for receiving signals, e.g. control signals from an external source. The further port <NUM> may act as a two-way port for both receiving signals and transmitting signals from the controller circuitry <NUM>.

The controller circuitry <NUM> comprises analogue computing circuitry <NUM> and digital computing circuitry <NUM>, which in this example provides the functions of programmable logic circuits and a one time programmable memory. The digital circuitry <NUM> is adapted to program (i.e. select circuit elements or sub-circuits of) the analogue computing circuitry <NUM> to provide the analogue computational function(s) required.

The circuitry <NUM> may be arranged so that the analogue signals from one or more of the ports <NUM>*, <NUM> or <NUM> may be operated on by the analogue computing circuitry <NUM>. In certain arrangements, the digital circuitry <NUM> may be arranged to enable the analogue computer circuitry to operate selectively on either analogue signals from first, second and third ports <NUM>*, <NUM> or <NUM>.

Alternatively, any of the analogue signals received through the ports <NUM>*, <NUM> or further port <NUM> may be received by the digital computing circuitry <NUM>.

The inclusion of analogue computing circuitry <NUM> is preferred as it allows for fast computation using a relatively small number of integrated electrical components.

The output of the analogue circuitry may provide an output signal via output 4A of the controller circuitry <NUM> in order to control the BJT <NUM>. Alternatively, the circuitry may be arranged to provide a digital output signal (e.g. pulse width modulated signal) via output 4A to control the BJT <NUM>.

In addition to selecting which analogue functions (mathematical operations) e.g. one or more of addition, subtraction, inversion, multiplication, integration, exponentiation, division, logarithum and differentiation, are performed by the analogue circuitry <NUM>. The digital circuitry may also be arranged to select between electrical components of the analogue circuitry e.g. select between capacitors of different capacitances or resistors of different resistances, in order to alter the variables of the computation. Where the digital circuitry provides a CPU function, selection of components to alter variables may be carried out dynamically using registers.

In a variant embodiment where analogue computing circuitry is not used and instead digital computing circuitry is used alone, computations made from the inputs through ports <NUM>*, <NUM> or <NUM> will be undertaken using algorithms and registers of the digital computing circuitry.

When analogue computing is used either alone or in conjunction with digital circuitry, the OTP can be used to store analogue values which may be used as further inputs for the mathematical functions applied to the input signals, or to control analogue functions e.g. period of analogue counters.

The digital or analogue circuitry may comprise sub-circuits that provide additional functions such as timers, temperature sensors.

In the preferred embodiment, where the device is used as a switch in a power circuit, the lateral size of the BJT is significantly greater than the total lateral size of the controller circuitry. The BJT <NUM> may have a lateral size that is at least <NUM> times greater than the individual electronic components, e.g. transistors, diodes, resistors and capacitors that form the controller circuitry <NUM>.

The controller circuitry <NUM> may be powered through ports <NUM> and/or <NUM> with port <NUM> connected to the negative supply rail, or alternatively through a voltage across ports <NUM> and <NUM>. Further detail of the manner in which this may be achieved is described below with reference to <FIG>.

A resistor between the transistor's <NUM> base and collector allows the transistor to be kept on and hence the controller circuitry <NUM> powered. In this instance the output 4A of the controller <NUM> primary functions to switch the transistor off when required.

In certain arrangements the device may comprise two transistors arranged as a Darlington pair.

The inclusion of analogue computing circuitry allows for very simple arrangements of controller circuitry <NUM> that avoids the problems associated with ensuring a power supply is maintained to the controller circuitry in order, for example, to power volatile memory, digital program counters and registers etc..

Nevertheless, in embodiments of the device, e.g. those that comprise volatile memory, a storage capacitance (e.g. a capacitor) may be used to keep the control powered when there is no external power available.

<FIG> illustrates a variant transistor device <NUM>' comprising a PNP bipolar junction transistor (BJT) <NUM>'. The primary difference of this variant to that of <FIG> is that the controller circuitry <NUM>' is constructed to reference positive voltage rather than ground to enable high side switching. As such the device has a first ports <NUM>' <NUM>'* that connect to the emitter side of the BJT <NUM>' in order to receive an analogue signal indicative of the current through the BJT <NUM>' and a second port <NUM>' that connects to the collector side of the BJT <NUM> in order to receive the voltage at the collector side of the BJT <NUM>' relative to the emitter side (or some other reference point).

<FIG> & <FIG> illustrate variant NPN transistor devices showing different example arrangements of controller circuitry.

In the variant of <FIG> the controller circuitry <NUM> comprises only analogue computing circuitry <NUM> which in this arrangement has been programmed to provide functions of a PID (proportional-integral-derivative) feedback mechanism.

The analogue computer circuitry <NUM> may comprise a non-volatile analogue memory, e.g. OTP memory, for initial configuration of the circuits or to hold values used in computations, e.g. the K values (tuning constants Kp, Ki, Kd used in PID controller) or in functions such as analogue clock mechanism.

The OTP may be comprised from degradable electronic devices. This can be used to provided either analogue or digital memory elements. In one example, the OTP may be comprised from an array of degradable bipolar junction transistors. In a non-degraded state the transistor is consider to hold a first value, e.g. <NUM>, and in a degraded state the transistor is considered to hold a second value e.g. <NUM>. The transistors within the array can be selectively degraded in order to store a program within the memory. In one example a transistor of the array may be degraded by applying voltage of reverse polarity to the base terminal of the transistor of a magnitude that degrades the transistor such as to permanently reduce the transistor's gain value. In another variant, the array be comprised from polysilicon resistors through which an overrated current is passed to alter their resistance.

Because the transistor gain value (where transistor's used) or resistance value (where resistors used) can be degraded in a graduated fashion, they are each also capable of holding an analogue value to provide an analogue memory.

<FIG> shows a variant in which in addition to analogue computing circuitry <NUM> providing the functions of a PID feedback mechanism, the controller circuitry further comprises a digital CPU or programmable logic device and OTP memory that can be used to select which (if not all) of the proportional control, integral and derivative functions are to be applied.

Where the device of <FIG> is a discrete component, as illustrated in <FIG>, the device includes a housing <NUM>, of any desired shape, that encases (typically moulded around) the chip <NUM>, an emitter connector <NUM> connected to the emitter terminal E and a collector connector <NUM> connected to the collector terminal C. The connectors connect to the chip <NUM> and protrude out of the housing <NUM> in order to provide means to connect the discrete device <NUM> into a circuit.

The device of <FIG> also comprises a third connector <NUM> that extends out of the housing <NUM> in order to provide connection between the third input <NUM> of the controller circuitry <NUM> and an external signal source. In a variant design for use where the device may be operated without input signals into a third port <NUM>, the device may be formed with two pins <NUM><NUM> for connection to emitter and collector only.

In an alternative arrangement where multiple integrated transistor devices <NUM> are formed on a single semiconductor monolith, at least some of the connections between inputs <NUM> may be provided by patterned metallisation on the chip.

<FIG> is a schematic of a NPN BJT transistor device <NUM> illustrating example power circuitry that enables the controller circuitry <NUM> to be powered through the device's connection to the external circuit on the collector side of the transistor <NUM> or via the third port <NUM>. In addition <FIG> illustrates a circuit arrangement to allow the device to: a) receive an input data signal via port <NUM>; and b) provide an output signal via port <NUM>.

The device comprises a voltage regulator <NUM> which in association with a zener diode <NUM> provides a regulated voltage from the third port <NUM> to power the controller circuitry <NUM>.

The controller circuitry <NUM> can optionally be powered from the collector pin via current regulator <NUM>. Because the voltage between the collector and emitter may be substantial - e.g. greater than 50V, which could be expected where the device is used in power driver applications, there is a risk that the current regulator may overheat. To guard against this, the circuit includes a switch <NUM> that can be enabled by the controller circuitry <NUM> when the voltage at the collector, as determined through first port <NUM>, is below a safe voltage.

The current regulator <NUM> requires a small amount of power to function. In high voltage power applications it is more practicable to power the current regulator <NUM> from port <NUM> shown by connection <NUM>, though in low power applications the current regulator may be powered via the collector pin.

The device further comprises a high impedance measurement element or sub-circuit <NUM>, e.g. one or more of a resistor, reverse-biased diode or omp-amp, that is connected between port <NUM> and a data input port <NUM> of the controller circuitry <NUM>. The relatively high voltage at port <NUM> is dropped over the high impedance measurement element/sub-circuit <NUM> to provide a relatively low voltage data signal at input port <NUM>.

The device further comprises data output circuitry that includes a pull down resistor <NUM> lying between port <NUM> and the emitter side of the transistor <NUM> and transistor switch <NUM>. An output signal from output data port <NUM> is used to control transistor <NUM>. To transmit a data signal out of port <NUM>, a signal from output data port <NUM> is used to turn on transistor <NUM> which sinks a current through port <NUM> which can be used to transmit a signal, e.g. as a voltage drop seen by an external device connected to port <NUM>.

<FIG> illustrates the device <NUM> of <FIG> connected to an external programming tool <NUM> to allow a user to program the chip <NUM> using an external computer. An output <NUM> of the tool <NUM> is connected to the third port <NUM> of the controller circuitry <NUM>, which acts, when the controller circuitry <NUM> is in programming mode, as a data port. A second output <NUM> of the programming tool <NUM> is connected to the collector terminal in order that a clocking signal from the tool <NUM> can be received from the collector side by the controller circuitry <NUM> through the first port <NUM> to clock data into the controller circuitry <NUM>. The one time memory function of the digital circuitry (though it could be of the analogue circuitry) can then be programmed using conventional techniques.

As an alternative, data could instead be transferred via the second output <NUM> and port <NUM>, and the clocking signal via first output <NUM> and port <NUM>.

A variant tool is required to program a PNP transistor device adapted to account for the fact the emitter is referenced to the positive rail, as is the controller <NUM> and input <NUM>). Programming tools for both NPN and PNP could be combined into a single external programming tool device,.

<FIG> is a schematic of a variant device <NUM>" that omits the memory but has a number of further pin connectors <NUM> that connect additional ports of the controller circuitry <NUM>" to an external debugging tool <NUM>. The debugging tool comprises a reprogrammable memory that is used by controller circuitry <NUM>" in place of the omitted OTP. The re-programmable memory of the debugging tool allows for repeated programming of the device <NUM>" from an external computer e.g. P. This provides a convenient means for a programmer to test programs which are intended to be installed on the memory of the earlier described devices.

Optionally, a number of the pin connectors <NUM> may be used to output signals internal to the controller circuitry <NUM>" such as for example, program counter values, control flags, RAM values (if RAM is present) etc..

An example application of the device variously described above is for use as, or as a part of a power management device. For example, the transistor device may form part of a power adapter for a LED lamp arranged to be connected to a mains (e.g. 120V or 240V AC) lighting circuit.

Another example application is illustrated in <FIG> that shows a schematic of a driving circuit <NUM> comprised of six bipolar junction transistor devices, three of NPN type <NUM> and three of PNP type <NUM> for powering a three phase brushless DC electric motor <NUM> from a battery <NUM>. The three PNP devices <NUM> source from the positive rail <NUM>, and three NPN transistor devices <NUM> switch to negative rail (ground) <NUM>. The third port 41A, 42A of each of the devices <NUM>,<NUM> are connected together in order to receive a control signal (that may be a pulse width modulated signal or analogue signal) via an input <NUM> from a controller or feedback device, e.g. an encoder associated with the motor <NUM> in which case the signal may be indicative of position or speed of the motor's rotor.

A pair of PNP, NPN devices <NUM><NUM> are each associated with a winding W of the motor <NUM>. Through suitable programming of each of the devices <NUM>, <NUM>, the devices <NUM>, <NUM>, using the external input signal received via third port 41A 42A, will control current flow through their respective motor winding in order to control the motor <NUM>.

<FIG> illustrates a variant circuit that allows communication between the NPN and the PNP of a pair of devices of <FIG> without affecting the control signal from input <NUM>.

Where a high voltage from positive rail <NUM>, e.g. greater than the control signal from input <NUM>, is used to drive the motor <NUM>, a controller <NUM> in a NPN <NUM> device may be arranged to signal via current level shifting to PNP <NUM> to effect switching of the PNP device <NUM>.

The output port 42A of NPN device <NUM> can be pulled down to the emitter E via transistor <NUM> of the data output circuitry of the NPN device <NUM> thereby lowering the voltage at 42A. The potential divider circuit created through the resister arrangement of R1 (lying in a connection between the upper rail <NUM> and PNP device input 41A) & R2 (in line between PNP input 41A and NPN input 41A) results in corresponding voltage change at 41A. This voltage change is detected by the high impedance measurement circuit <NUM> of the PNP <NUM>.

Resistor R3 sitting between NPN port 42A and the control input <NUM> ensures the act of pulling down the output port 42A to the emitter does not adversely affect the signal received from input <NUM> where could otherwise affect other device connected to input <NUM>. The control input <NUM> ensures the act of pulling down the output port 42A to the emitter does not adversely affect the signal received from input <NUM> which could otherwise affect other device connected to input <NUM>.

This configuration allows the NPN <NUM> to send commands to the PNP <NUM> such as, for example, to provide or change the size of a timing delay between the NPN <NUM> switching off and the PNP <NUM> switching on in order to prevent shorting circuiting the supply rails <NUM> and <NUM>.

In a variant to the above described embodiments, the BJT <NUM> may be replaced with a FET, in such an arrangement the output 4A of the controller circuitry is connected to a gate terminal of the FET.

In a variant arrangement, the device may not include one or both of the first and second inputs and may instead be adapted to control the BJT using a signal received through the third port. In variants according to this arrangement the controller circuitry <NUM> would need to be factory programmed to provide the required function.

Claim 1:
A discrete semiconductor transistor device (<NUM>) comprising:
a transistor (<NUM>) having a first terminal (E) and a second terminal (C) for connecting the transistor (<NUM>) into an external circuit in order to control current flow through said external circuit, and a control terminal;
a controller circuitry (<NUM>) having an output that is connected to the control terminal (B) of the transistor (<NUM>) in order to control operation of the transistor (<NUM>);
the controller circuitry (<NUM>) comprising at least one input (<NUM>) to allow the discrete semiconductor transistor device (<NUM>) to receive control and/or data signals from an external source and wherein the controller circuitry comprises analogue computing circuitry and digital computing circuitry (<NUM>); characterised in that the analogue
computing circuitry comprises multiple sub circuits, each for carrying out a different mathematical operation selected from addition, inversion, multiplication, integration, exponentiation, division, logarithm and differentiation; and in which the digital computing circuitry (<NUM>) is configurable to program the analogue computing circuity (<NUM>) which comprises selecting one or more of the sub-circuits to select a mathematical operation (<NUM>).