Patent Description:
To meet increasing network rate requirements, expanding a signal bandwidth and improving spectrum utilization are two most commonly used means. For example, in a wireless Wi-Fi technology, a signal bandwidth has been expanded from <NUM> in <NUM> to <NUM> in <NUM>. 11ac, signal modulation is improved from orthogonal frequency division multiplexing (Orthogonal Frequency Division Multiplexing, OFDM) <NUM>-QAM (Quadrature Amplitude Modulation, quadrature amplitude modulation) to OFDM <NUM>-QAM, and a corresponding rate is increased from <NUM> Mbps to <NUM> Gbps. In a mobile communication technology, a signal bandwidth has been expanded from <NUM> in a long term evolution (Long Term Evolution, LTE) technology in the 4th generation mobile communication technology (the 4th Generation mobile communication technology, <NUM>) to <NUM> in the 5th generation mobile communication technology (tthe 5th generation mobile communication technology, <NUM>), and a corresponding rate is increased from <NUM> Mbps to more than <NUM> Gbps. In a coaxial cable access (Data Over Cable Service Interface Specifications, DOCSIS) technology, a signal bandwidth has been expanded from <NUM> in DOCSIS <NUM> to <NUM> in DOCSIS <NUM>, signal modulation is improved from single-carrier <NUM>/<NUM>-QAM to OFDM <NUM>-QAM, and a corresponding rate is increased from <NUM> Mbps to <NUM> Gbps.

In conclusion, a signal in a current common communications system has characteristics of a large bandwidth and being modulated through high-order QAM. However, usually, the signal that has the large bandwidth and that is modulated through high-order QAM causes an increase in a peak-to-average-ratio (Peak-to-Average-Ratio, PAR) of the signal. To ensure lossless transmission of the signal, a functional module in a communication link needs to operate in a backoff area based on the PAR.

As one of core functional modules in the communication link, a power amplifier (Power Amplifier, PA) needs to have higher linearity in response to expansion of a bandwidth of a current signal. An increase in a PAR causes the PA to back off to an area with lower efficiency, resulting in a system energy loss and a temperature increase, and therefore, a complex heat dissipation system design needs to be added. Therefore, how to design an efficient PA to meet a current requirement in transmission of a signal with a large bandwidth and a high PAR becomes a problem that needs to be resolved urgently.

In structures such as a Doherty power amplifier and a Class-G power amplifier in a conventional technology, a size of a corresponding backoff area is <NUM> dB. To improve efficiency of the backoff area, in the conventional technology, manners such as increasing a quantity of paths of auxiliary power amplifiers in the Doherty power amplifier are usually used. However, this manner greatly increases a size of the power amplifier while improving the efficiency of the backoff area.

<CIT> discloses a composite amplifier comprising several Chireix pairs of power amplifiers connected to a common load. Further, means are provided for driving each Chireix pair by drive signals having amplitude dependent phase over at least a part of the dynamic range of the composite amplifier.

<CIT> discloses a power amplifier comprising a first, second and third sub-amplifier for amplification of an input signal into an output signal. The sub-amplifiers are connected to an input network and an output network. The output network comprises a first, second and third transmission line connected to the first, second and third sub-amplifier, respectively. A difference in electrical length between the first, second and third transmission lines is an integer number of quarter-wavelengths of a center frequency of the power amplifier. A first, second and third electrical length includes the first, second and third transmission line, respectively. A longest one of the electrical lengths is at least a multiple of quarter-wavelengths of the center frequency. Furthermore, a radio network node, comprising the power amplifier, and a user equipment, comprising the power amplifier, are disclosed.

In <CIT>, a composite power amplifier structure includes a first power amplifier configured as an auxiliary amplifier of a Doherty amplifier and connected to an output node and an even number of further power amplifiers configured into at least one Chireix pair connected to the same output node. The Chireix pairs are driven at least partially in outphasing modes and the first power amplifier is driven in the same manner as the auxiliary amplifier of a Doherty amplifier.

This application provides a signal processing method, apparatus, and system, to effectively improve efficiency of a backoff area, as set out in the appended claims.

In the following, the alternative that each path of auxiliary power amplification module includes two outphasing power amplifier arrays does not form part of the claimed subject-matter.

According to a first aspect, an embodiment of this application provides a signal processing system. The system includes n paths of load modulation modules and a combination module, where the n paths of load modulation modules are connected in parallel, an output end of each path of load modulation module is connected to an input end of the combination module, and n is an integer greater than <NUM>; the combination module receives, by using the input end, n paths of signals output by the n paths of load modulation modules and combines the n paths of signals; the n paths of load modulation modules include one path of main power amplification module and (n-<NUM>) paths of auxiliary power amplification modules, and the auxiliary power amplification modules are turned on when power values of signals received by input ends of the load modulation modules are greater than a first threshold; and the main power amplification module includes two outphasing (outphasing) power amplification units, and each path of auxiliary power amplification module includes two outphasing power amplifier arrays or one digital polar (digital polar) power amplifier array.

According to the foregoing manner, this application provides a system in which a quantity of paths of auxiliary power amplifiers does not need to be increased, but efficiency of a backoff area can be effectively improved, and in particular, efficiency of a deep backoff area can be improved.

In a possible implementation, the outphasing power amplification unit includes one digital outphasing power amplifier array. In other words, each path of the two paths of outphasing power amplification units includes one digital outphasing power amplifier array, and each digital outphasing power amplifier array includes two or more outphasing power amplifiers. Therefore, when the main power amplification module is turned on, a quantity of outphasing power amplifiers that are turned on in the main power amplification module is further controlled, to improve the efficiency of the backoff area.

In a possible implementation, the two outphasing power amplification units are connected in parallel.

In a possible implementation, the main power amplification module further includes a combination unit, where output ends of the two paths of outphasing power amplification units are separately connected to an input end of the combination unit, an output end of the combination unit is connected to the input end of the combination module, and the combination unit may be configured to receive, by using the input end, two paths of signals output by the two paths of outphasing power amplification units and combine the two paths of signals; and the combination unit and the combination module each include a transformer.

According to the foregoing manner, a device size is reduced, and a system can be integrated into a chip by using a CMOS process.

In a possible implementation, the first combination unit is a Chireix combiner, and the second combination unit is a Doherty combiner.

According to the foregoing manner, Chireix outphasing load modulation and Doherty load modulation are combined.

According to a second aspect, an embodiment of this application provides a signal processing method, where the method is applied to the signal processing system according to the first aspect. The method includes: receiving signals by using n paths of load modulation modules connected in parallel; turning on one or more paths of load modulation modules in the n paths of load modulation modules based on power values of the signals; and if the power values are less than or equal to a first threshold, turning on one path of main power amplification module in the n paths of load modulation modules; or if the power values are greater than the first threshold, turning on the one path of main power amplification module and at least one path of auxiliary power amplification module in (n-<NUM>) paths of load modulation modules, where the main power amplification module includes two outphasing (outphasing) power amplification units, and the auxiliary power amplification module includes two outphasing power amplifier arrays or one digital polar (digital polar) power amplifier array.

In a possible implementation, the step of turning on one or more paths of load modulation modules in the n paths of load modulation modules based on power values of the signals includes: if amplitude values of the signals are less than or equal to a second threshold, turning on the main power amplification module; or if the amplitude values of the signals are greater than the second threshold, turning on the at least one path of auxiliary power amplification module.

In a possible implementation, the step of turning on the one path of main power amplification module and at least one path of auxiliary power amplification module in (n-<NUM>) paths of load modulation modules includes: if the amplitude values of the signals meet a trigger condition of one or more power amplifiers in the outphasing power amplifier arrays or the digital polar power amplifier array, turning on the one or more power amplifiers.

In a possible implementation, the step of turning on one or more paths of load modulation modules in the n paths of load modulation modules based on power values of the signals includes: if phase values of the signals are greater than or equal to a third threshold, turning on the main power amplification module; or if the phase values of the signals are less than the third threshold, turning on the at least one path of auxiliary power amplification module, where the phase values are obtained after outphasing conversion is performed on the signals.

In a possible implementation, the step of turning on the one path of main power amplification module and at least one path of auxiliary power amplification module in (n-<NUM>) paths of load modulation modules includes: if the phase values of the signals meet a trigger condition of one or more power amplifiers in the outphasing power amplifier arrays or the digital polar power amplifier array, turning on the one or more power amplifiers.

According to a third aspect, an embodiment of this application provides a signal processing apparatus, including: a control module, configured to control n paths of load modulation modules connected in parallel to receive signals, where the control module may be further configured to: turn on one or more paths of load modulation modules in the n paths of load modulation modules based on power values of the signals; and if the power values are less than or equal to a first threshold, turn on one path of main power amplification module in the n paths of load modulation modules; or if the power values are greater than the first threshold, turn on the one path of main power amplification module and at least one path of auxiliary power amplification module in (n-<NUM>) paths of load modulation modules, where the main power amplification module includes two outphasing (outphasing) power amplification units, and the auxiliary power amplification module includes two outphasing power amplifier arrays or one digital polar (digital polar) power amplifier array.

In a possible implementation, the control module is further configured to: if amplitude values of the signals are less than or equal to a second threshold, turn on the main power amplification module; or if the amplitude values of the signals are greater than the second threshold, turn on the at least one path of auxiliary power amplification module.

In a possible implementation, the control module is further configured to: if the amplitude values of the signals meet a trigger condition of one or more power amplifiers in the outphasing power amplifier arrays or the digital polar power amplifier array, turn on the one or more power amplifiers.

In a possible implementation, the control module is further configured to: if phase values of the signals are greater than or equal to a third threshold, turn on the main power amplification module; or if the phase values of the signals are less than the third threshold, turn on the at least one path of auxiliary power amplification module, where the phase values are obtained after outphasing conversion is performed on the signals.

In a possible implementation, the control module is further configured to: if the phase values of the signals meet a trigger condition of one or more power amplifiers in the outphasing power amplifier arrays or the digital polar power amplifier array, turn on the one or more power amplifiers.

According to a fourth aspect, an embodiment of this application provides a computer-readable medium, configured to store a computer program. The computer program includes instructions used to perform the method in the second aspect or any possible implementation of the second aspect.

According to a fifth aspect, an embodiment of this application provides a computer program. The computer program includes instructions used to perform the method in the second aspect or any possible implementation of the second aspect.

According to a sixth aspect, an embodiment of this application provides a chip. The chip includes a processing circuit and a transceiver pin. The transceiver pin communicates with the processing circuit by using an internal connection path, and the processing circuit performs the method in the second aspect or any possible implementation of the second aspect, to control the transceiver pin to receive a signal and send a signal.

To describe the technical solutions in embodiments of this application more clearly, the following briefly describes the accompanying drawings required for describing the embodiments of this application. Apparently, the accompanying drawings in the following description show merely some embodiments of this application, and a person of ordinary skill in the art may still derive other drawings from these accompanying drawings without creative efforts.

The term "and/or" in this specification describes only an association relationship for associated objects and represents that three relationships may exist.

In the specification and claims in the embodiments of this application, the terms "first", "second", and so on are intended to distinguish between different objects but do not indicate a particular order of the objects. For example, a first target object, a second target object, and the like are intended to distinguish between different target objects but do not indicate a particular order of target objects.

In addition, in the embodiments of this application, the word "for example" is used to represent giving an example, an illustration, or a description. Any embodiment or design scheme described as "for example" in the embodiments of this application should not be explained as being more preferred or having more advantages than another embodiment or design scheme. Exactly, use of the word "for example" or the like is intended to present a relative concept in a specific manner.

In the description of the embodiment of this application, unless otherwise stated, "a plurality of" means two or more than two. For example, a plurality of processing units refer to two or more processing units; and a plurality of systems refer to two or more systems.

To enable a person skilled in the art to better understand the technical solutions in the embodiments of this application, a conventional technology is first described.

<FIG> is a schematic structural diagram of a power amplifier in the conventional technology.

The power amplifier is of a multi-path analog Doherty (Doherty) PA structure, and includes a main power amplifier <NUM> and two paths of auxiliary power amplifiers: an auxiliary power amplifier <NUM> and an auxiliary power amplifier <NUM>.

The main power amplifier includes a power amplifier <NUM> and a power amplifier <NUM>, and the power amplifier <NUM> and the power amplifier <NUM> are two paths of outphasing (outphasing) power amplifiers.

The two paths of auxiliary power amplifiers further include an input signal separation unit, an output signal combiner, and the like (which are not marked in the figure).

It should be noted that, an operating principle of the Doherty PA structure is as follows: When an input signal (or may be described as a power of the input signal) is relatively small (a definition manner of a relatively small input signal may be: if the power of the input signal is less than a preset threshold, the input signal is a relatively small signal; or if the power of the input signal is greater than or equal to the preset threshold, the input signal is a relatively large signal), the auxiliary power amplifiers (for example, the two paths of auxiliary power amplifiers <NUM> and <NUM> in <FIG>) are in a non-operating state, and the main power amplifier is in an operating state. Refer to <FIG>. In other words, when the PA operates in an outphasing mode, to be specific, the main power amplifier <NUM> is in the operating state, the PA amplifies the input signal, and an efficiency curve of the PA forms a first backoff area (to be specific, T1 to T2) shown in <FIG>. In the Doherty PA, the auxiliary power amplifiers are turned on when the input signal is relatively large (in this case, the main power amplifier is still in the operating state, to be specific, all the main power amplifier and the auxiliary power amplifiers are in the operating state when the input signal is relatively large). Still refer to <FIG>. As the input signal becomes larger, the auxiliary power amplifiers <NUM> and <NUM> are gradually turned on. In this case, the auxiliary power amplifier <NUM>, the auxiliary power amplifier <NUM>, and the main power amplifier form Doherty load modulation, and the efficiency curve forms a second backoff area and a third backoff area.

In the power amplifier structure shown in <FIG>, a size of a backoff area is determined by a quantity of paths of auxiliary power amplifiers. That is, in the amplifier structure shown in <FIG> that includes the two paths of auxiliary power amplifiers, two backoff points may be added based on the outphasing main power amplifier. However, if a backoff point needs to be further added (that is, the size of the backoff area needs to be increased, or may be understood as improving efficiency of the backoff area), the quantity of the paths of auxiliary power amplifiers and a corresponding impedance conversion transmission line need to be added, resulting in a more complex structure of an output combiner and more complex separation of a corresponding input signal, and thereby reducing gain and efficiency of the entire PA.

<FIG> is a schematic structural diagram of another power amplifier in a conventional technology.

The power amplifier <NUM> incorporates a conventional analog Doherty PA structure and a digital polar (digital polar) PA structure. In a Doherty PA in the conventional technology, auxiliary power amplifiers are replaced by digital polar PAs (namely, <NUM> in the figure), and a main power amplifier is still a conventional analog PA (namely, <NUM> in the figure). Based on an operating principle of the Doherty PA, when an input signal is relatively small, all the auxiliary power amplifiers are turned off, and only the main power amplifier <NUM>, namely, the analog PA, is in an operating state. As the input signal becomes larger, PAs in a digital polar power amplifier array (namely, the auxiliary power amplifiers <NUM>) are gradually turned on. In this case, Doherty load modulation is formed between one path of main PA and one path of auxiliary PA.

Based on the power amplifier structure shown in <FIG>, a size of a backoff area corresponding to the power amplifier structure is <NUM> dB. To be specific, the size of the backoff area is the same as a size of a backoff area that can be achieved by two paths of conventional analog Doherty PAs. In the power amplifier shown in <FIG>, efficiency of the backoff area may be further improved by using an asymmetric Doherty structure. In other words, the size of the backoff area may be further increased. However, there is a problem in the asymmetric Doherty structure: If a relatively large backoff area needs to be achieved, for example, if a deep backoff area needs to be implemented (to be specific, more than <NUM> dB), a power of the auxiliary power amplifier needs to be at least three times as large as a power of the main power amplifier. Therefore, a size of the auxiliary power amplifier is relatively increased (with a relatively large increase amplitude). Consequently, in actual application, it is difficult to improve efficiency of the deep backoff area of the PA.

In conclusion, for a problem in the conventional technology that improvement of the efficiency of the backoff area greatly increases the size of the power amplifier, resulting in increased process difficulty and a failure to implement the deep backoff area, this application provides a signal processing system. The system can effectively improve the efficiency of the backoff area by combining an outphasing load modulation manner and a Doherty load modulation manner, to implement the deep backoff area without additionally adding a quantity of paths of auxiliary power amplifiers.

In the following, the alternative that the auxiliary power amplification module includes outphasing power amplifier arrays does not form part of the claimed subject-matter.

<FIG> is a schematic structural diagram of a signal processing system according to an embodiment of this application.

A signal processing system <NUM> includes a digital signal processing (digital signal processing, DSP) module <NUM> and two paths of load modulation modules connected in parallel, where the two paths of load modulation modules include a main power amplification module <NUM> and an auxiliary power amplification module <NUM>. In addition, the signal processing system <NUM> further includes a combination module <NUM> and a feedback module <NUM>.

Refer to <FIG>. An output end of the DSP module <NUM> in the signal processing system <NUM> is separately connected to input ends of the two paths of load modulation modules (namely, the main power amplification module <NUM> and the auxiliary power amplification module <NUM>). In addition, an input end of the combination module <NUM> is separately connected to output ends of the two paths of load modulation modules (namely, the main power amplification module <NUM> and the auxiliary power amplification module <NUM>). In addition, an output end of the combination module <NUM> is connected to an input end of the feedback module <NUM>, and an output end of the feedback module <NUM> is connected to an input end of the DSP module <NUM>, thereby forming a feedback loop. The feedback loop may be used to collect a signal output by a PA, and feed a collected signal back to the DSP module for processing such as calibration of undesirable factors such as distortion and mismatch. For a specific processing manner of the feedback loop, refer to the technical solutions in the embodiment of the conventional technology. Details are not described in this application.

Optionally, in this application, the main power amplification module <NUM> includes two outphasing power amplifiers (namely, an outphasing power amplifier <NUM> and an outphasing power amplifier <NUM> in the figure) connected in parallel and a combination unit <NUM>. Optionally, the combination unit <NUM> may be a low-isolation Chireix combiner, and includes an inductor and a capacitor. In another embodiment, the combiner may alternatively be another low-isolation combiner. This is not limited in this application.

The DSP module (for example, the DSP module <NUM>) may be a DSP processor or a module including main functional units of a DSP processor.

In addition, the auxiliary power amplification module <NUM> includes a digital polar power amplifier array. In other words, an auxiliary power amplifier may be quantified as an array including a plurality of (to be specific, two or more) polar power amplifiers.

Optionally, in this application, the combination module <NUM> includes but is not limited to a transmission line <NUM> and a combiner <NUM>. Optionally, the transmission line <NUM> may be a λ/<NUM> transmission line, and is configured to perform impedance conversion of Doherty load modulation. Optionally, in this application, the combiner <NUM> may be a Doherty combiner.

With reference to <FIG>, <FIG> is a flowchart of a signal processing method according to an embodiment of this application. The method is applied to the signal processing system shown in <FIG>.

Step <NUM>: Receive signals by using load modulation modules connected in parallel.

Specifically, in this embodiment of this application, the DSP module performs digital signal processing on a signal (to distinguish from another signal such as an output signal, the signal is collectively referred to as an input signal in this embodiment and the following embodiments), and then the DSP module sends a processed input signal to the input ends of the two paths of load modulation modules by using the output end. As shown in <FIG>, the signals input into the two paths of load modulation modules include input signals S<NUM> and S<NUM> of the two paths of outphasing PAs, and an input signal S<NUM> and control signals A<NUM> to An of the digital polar PAs.

Optionally, in this application, the load modulation modules may constitute a Doherty PA structure. To be specific, the load modulation modules in this application may operate in a Doherty load modulation mode. Specifically, based on the foregoing operating principle of the Doherty PA, that is, when the input signal is relatively small, the main power amplifier is turned on, and the auxiliary power amplifiers are turned off; and when the input signal is relatively large, the main power amplifier and the auxiliary power amplifiers are all turned on.

In this application, there may be two manners for determining a size of the input signal. One manner for determining the size of the input signal is as follows: In this application, an amplitude threshold may be set, the DSP module may determine the size of the input signal based on the amplitude threshold, and determine a processing manner corresponding to the input signal based on a determining result.

Specifically, refer to <FIG>. When an amplitude value of the input signal is less than or equal to an amplitude threshold Ath, the DSP module converts the input signal Sin into the two paths of signals S<NUM> and S<NUM>, and outputs the two paths of signals to the main power amplification module, so that the main power amplification module is in an operating state. Then, step <NUM> is performed. When the amplitude value of the input signal is greater than the amplitude threshold Ath, the DSP module converts the input signal into the input signal S<NUM>, the control signals A<NUM> to An, and the two paths of signals S<NUM> and S<NUM>. The input signal S<NUM> and the control signals A<NUM> to An are used to enable the auxiliary power amplification module to be in an operating state. Then, step <NUM> is performed. For a manner in which one or more power amplifiers in a power amplifier array included in the auxiliary power amplification module are turned on by using the control signals A<NUM> to An, refer to step <NUM>.

For example, the input signal Sin may be expressed as: <MAT> where A(t) is an amplitude-modulated signal, φ(t) is a phase-modulated signal, and ω is a carrier frequency.

The DSP module may obtain the amplitude value of the input signal based on an envelope value of the input signal, and determine a power of the input signal based on the amplitude value (that is, if the amplitude value is less than or equal to the amplitude threshold, the input signal is a relatively small signal, and a corresponding power is also relatively small; or if the amplitude value is greater than the amplitude threshold, the input signal is a relatively large signal).

Optionally, if the DSP module detects that the input signal is relatively small, the DSP module performs outphasing processing on the signal, to obtain the separated two paths of signals S<NUM> and S<NUM>, which are expressed as follows: <MAT> and <MAT> where A<NUM> = max(abs(A(t))), θ(t) = arccos(<NUM> x A(t)/A<NUM>), and θ(t) is a phase value.

The DSP module <NUM> outputs the two paths of signals S<NUM> and S<NUM> to the main power amplification module, to turn on the two paths of outphasing power amplifiers in the main power amplification module <NUM>.

Optionally, if the DSP module <NUM> detects that the input signal is relatively large, the DSP module <NUM> performs outphasing processing on the signal, to obtain the two paths of signals S<NUM> and S<NUM> that are used to turn on the main power amplification module. In addition, the DSP module <NUM> performs polar processing on the signal, to obtain the input signal S<NUM> and the control signals A<NUM> to An that are used to turn on the auxiliary power amplification module. For specific details of performing polar processing on the input signal by the DSP module <NUM>, refer to the technical solutions in the conventional technology. Details are not described in this application.

In this application, the other manner for determining the size of the input signal is as follows: In this application, a phase threshold may be set, and the DSP module <NUM> may perform outphasing processing on the input signal Sin (for a processing process, refer to the foregoing), to obtain a phase value θ(t) ∈ [<NUM>, π/<NUM>] related to amplitude information. Smaller amplitude of the input signal indicates a larger value of θ(t). Otherwise, larger amplitude of the input signal indicates a smaller value of θ(t).

As the amplitude of the input signal increases, the control signals A<NUM> to An control the polar PAs in the digital polar amplifier array included in the auxiliary power amplification module <NUM> to be turned on. Because the amplitude is related to θ(t), θ(t) may be directly converted into the control signals A<NUM> to An. As shown in <FIG>, larger amplitude indicates a smaller value of θ(t). When θ(t) is less than a phase threshold θth, signals A<NUM> to An and S<NUM> obtained after polar processing are output, and S<NUM> and S<NUM> obtained after outphasing conversion are output. That is, all of the two paths of outphasing power amplifiers <NUM> and <NUM> and one or more polar power amplifiers in the digital polar power amplifier array are in the operating state.

Step <NUM>: If power values are less than or equal to a first threshold, turn on one path of main power amplification module in the load modulation modules.

Specifically, in this application, as described above, the DSP module <NUM> may determine the power of the input signal based on the amplitude value of the input signal or based on the phase value of the input signal that is obtained after outphasing conversion. That is, when the amplitude value is less than or equal to the amplitude threshold or the phase value obtained after conversion is greater than or equal to the phase threshold, it may be determined that the input signal is a relatively small signal, that is, a power value of the input signal is less than or equal to a power threshold. When the amplitude value is greater than the amplitude threshold or the phase value obtained after conversion is less than the phase threshold, it may be determined that the input signal is a relatively large signal, that is, the power value of the input signal is greater than the power threshold.

Therefore, in this application, if the DSP module determines that the input signal is a relatively small signal, as described above, the DSP module performs outphasing conversion on the input signal to obtain the two paths of signals S<NUM> and S<NUM>, outputs S<NUM> to the outphasing power amplifier <NUM> in the main power amplification module <NUM>, and outputs S<NUM> to the outphasing power amplifier <NUM> in the main power amplification module <NUM>, to turn on the two paths of outphasing power amplifiers. The outphasing power amplifiers respectively amplify the two paths of signals, and output processed signals to the Chireix combiner <NUM> in the main power amplification module <NUM>.

Subsequently, the Chireix combiner outputs a combined signal to the combination module <NUM>. The signal is transmitted to the Doherty combiner <NUM> by using the transmission line <NUM>. The Doherty combiner <NUM> processes the signal and outputs the signal by using an output end, and the feedback loop collects the signal output by the Doherty combiner <NUM> and feeds the signal back to the DSP module <NUM>.

Step <NUM>: If the power values are greater than the first threshold, turn on the main power amplification module and the auxiliary power amplification module.

Still refer to <FIG>. If the DSP module <NUM> determines that the input signal is a relatively large signal, as described above, optionally, the DSP module <NUM> may perform outphasing conversion on the input signal to obtain the two paths of signals S<NUM> and S<NUM>, outputs S<NUM> to the outphasing power amplifier <NUM> in the main power amplification module <NUM>, and outputs S<NUM> to the outphasing power amplifier <NUM> in the main power amplification module <NUM>, to turn on the two paths of outphasing power amplifiers. The outphasing power amplifiers respectively amplify the two paths of signals, and output processed signals to the Chireix combiner <NUM> in the main power amplification module <NUM>. In addition, the DSP module <NUM> performs polar processing on the input signal, to obtain the input signal S<NUM> and the control signals A<NUM> to An.

Optionally, in this application, the DSP module <NUM> stores a trigger condition of one or more power amplifiers in the digital polar power amplifier array.

Optionally, in this application, the DSP module <NUM> may determine, based on a size of the amplitude value, whether a trigger condition of a polar power amplifier is met. If the trigger condition of the polar power amplifier is met, a control signal is sent to the polar power amplifier whose trigger condition is met. For example, a trigger condition of a polar PA <NUM> in the digital polar power amplifier array is as follows: When the amplitude value reaches an amplitude value <NUM> (the value may be set based on an actual requirement, and is not limited in this application), the polar PA <NUM> is turned on. A trigger condition of a polar PA <NUM> is that the amplitude value reaches an amplitude value <NUM>, and a trigger condition of a polar PA <NUM> (which is not shown in the figure) is that the amplitude value reaches an amplitude value <NUM>. In this application, when it is detected that the amplitude value of the input signal reaches the amplitude value <NUM>, the DSP module <NUM> outputs the control signal A<NUM> to control the polar PA <NUM> to be turned on, and amplifies the input signal S<NUM>. When it is detected that the amplitude value of the input signal reaches the amplitude value <NUM>, the DSP module <NUM> outputs the control signals A<NUM> and A<NUM>, to control the polar PA <NUM> and the polar PA <NUM> to be turned on. When it is detected that the amplitude value of the input signal reaches the amplitude value <NUM>, the DSP module <NUM> outputs the control signals A<NUM>, A<NUM>, and A<NUM>, to control the polar PA <NUM>, the polar PA <NUM>, and the polar PA <NUM> to be turned on.

Optionally, in this application, the DSP module <NUM> may determine, based on a size of the phase value obtained after outphasing conversion, whether a trigger condition of a polar power amplifier is met. If the trigger condition of the polar power amplifier is met, a control signal is sent to the polar power amplifier whose trigger condition is met. For example, a trigger condition of the polar PA <NUM> in the digital polar power amplifier array is as follows: When the phase value reaches a phase value <NUM> (the value may be set based on an actual requirement, and is not limited in this application), the polar PA <NUM> is turned on. A trigger condition of the polar power amplifier <NUM> is that the phase value reaches a phase value <NUM>, and a trigger condition of the polar PA <NUM> is that the phase value reaches a phase value <NUM>. In this application, when it is detected that the phase value of the input signal that is obtained after outphasing conversion reaches the phase value <NUM>, the DSP module <NUM> outputs the control signal A<NUM> to control the polar power amplifier <NUM> to be turned on, and amplifies the input signal S<NUM>. When it is detected that the phase value of the input signal reaches the phase value <NUM>, the DSP module <NUM> outputs the control signals A<NUM> and A<NUM>, to control the polar PA <NUM> and the polar PA <NUM> to be turned on. When it is detected that the phase value of the input signal reaches the phase value <NUM>, the DSP module <NUM> outputs the control signals A<NUM>, A<NUM>, and A<NUM>, to control the polar PA <NUM>, the polar PA <NUM>, and the polar PA <NUM> to be turned on.

Compared with a conventional polar solution, in this application, polar processing needs to be performed on only a portion (to be specific, a portion that exceeds a threshold) of the input signal. <FIG> is a spectrum diagram of an amplitude signal obtained after processing in different polar manners. A bandwidth of the amplitude signal obtained after complete polar processing is expanded to be relatively large, and a solution in which partial polar processing is performed may significantly reduce a bandwidth expansion effect. For example, a power value equal to -<NUM> dB/Hz is used as a reference. After partial polar processing is used, an expanded bandwidth of the amplitude signal may be reduced from <NUM> to <NUM>. Therefore, in this application, polar processing is performed on a portion of a signal, so that a bandwidth expansion effect can be effectively reduced.

<FIG> show load impedance variation curves of the outphasing PAs in this embodiment. <FIG> shows load impedance variation curves in which only the outphasing PAs are turned on, to be specific, shows variation cases of load impedance of the two paths of outphasing PAs with θ(t) in a case in which there is no Doherty load modulation (which is shown in <FIG>). Because of action of a Chireix compensating network, there are two points at which an imaginary part of impedance is equal to zero. <FIG> shows load impedance variation curves in which the outphasing PAs and the polar PA <NUM> are turned on. Because of action of a Doherty load modulation effect, the load impedance of the two paths of outphasing PAs are reduced, and are moved to the left in a Smith (Smith) chart. <FIG> shows load impedance variation curves in which the outphasing PAs are turned on and the polar PA <NUM> and the polar PA <NUM> are turned on by using the control signals A<NUM> and A<NUM>. <FIG> shows load impedance variation curves in which the outphasing PAs are turned on and the polar PA <NUM>, the polar PA <NUM>, and the polar PA <NUM> are turned on by using the control signals A<NUM>, A<NUM>, and A<NUM>. Clearly, the load impedance decrease gradually with an increase in a quantity of polar PAs that are turned on.

In conclusion, because of the Doherty load modulation effect, the load impedance of the outphasing PAs decrease correspondingly, and as the quantity of the polar PAs that are turned on increases, load impedance of the outphasing PAs become smaller and corresponding output powers become larger. Therefore, in this application, sizes of the output powers may be adjusted by controlling the quantity of the polar PAs that are turned on, to adapt to different PAPR scenarios. For example, <FIG> shows an efficiency curve that is obtained by applying the technical solution in this embodiment and that is based on ideal model simulation (including an ideal voltage source, a current source, an ideal transmission line, and the like). Refer to <FIG>. When n = <NUM> (that is, when the DSP module <NUM> outputs the control signals A<NUM>, A<NUM>, and A<NUM>, to turn on corresponding polar power amplifiers), a high efficiency value may still be obtained in a <NUM> dB backoff area, where a backoff area of outphasing is determined by a Chireix compensation unit, and is <NUM> dB in this embodiment.

It should be noted that, if a PAR of the input signal is <NUM> dB, it is required that a peak output power of the system reaches <NUM> dBm, and a corresponding average power is <NUM> dBm. In this case, statuses of A<NUM>, A<NUM>, and A<NUM> need to be dynamically controlled, to improve efficiency of a <NUM> dB deep backoff area. If the PAR of the input signal is <NUM> dB, it is required that the peak output power reaches <NUM> dBm, and the corresponding average power is <NUM> dBm. In this case, statuses of A<NUM> and A<NUM> need to be dynamically controlled, to improve efficiency of an <NUM> dB deep backoff area. If the PAR of the input signal is <NUM> dB, it is required that the peak output power reaches <NUM> dBm, and the corresponding average power is <NUM> dBm. In this case, a status of A<NUM> needs to be dynamically controlled, to improve efficiency of a <NUM> dB deep backoff area. If the PAR of the input signal is <NUM> dB, only the outphasing PAs may operate, or the Chireix compensating network may be modified, to reduce backoff areas of the outphasing PAs and control the statuses of A<NUM>, A<NUM>, and A<NUM>, thereby improving efficiency of a <NUM> dB backoff area.

In conclusion, in this application, efficient transmission of signals with different PARs may be implemented through flexible control. That is, in this application, an efficient requirement in signal scenarios with different PARs may be met by controlling the quantity of the digital polar PAs that are turned on.

A signal processing system <NUM> includes a DSP module <NUM> and two paths of load modulation modules connected in parallel, where the two paths of load modulation modules include a main power amplification module <NUM> and an auxiliary power amplification module <NUM>. In addition, the signal processing system <NUM> further includes a combination module <NUM> and a feedback module <NUM>.

Refer to <FIG>. An output end of the DSP module <NUM> in the signal processing system <NUM> is separately connected to input ends of the two paths of load modulation modules (namely, the main power amplification module <NUM> and the auxiliary power amplification module <NUM>). In addition, an input end of the combination module <NUM> is separately connected to output ends of the two paths of load modulation modules (namely, the main power amplification module <NUM> and the auxiliary power amplification module <NUM>). In addition, an output end of the combination module <NUM> is connected to an input end of the feedback module <NUM>, and an output end of the feedback module <NUM> is connected to an input end of the DSP module <NUM>, thereby forming a feedback loop.

Optionally, in this application, the main power amplification module <NUM> includes two outphasing power amplifier arrays connected in parallel (namely, an outphasing power amplifier array <NUM> and an outphasing power amplifier array <NUM> in the figure, where each outphasing power amplifier array includes two or more outphasing power amplifiers; and it should be noted that, the outphasing power amplifiers in the two paths of outphasing power amplifier arrays are disposed in pairs, for example, an outphasing PA 421a in the outphasing power amplifier array <NUM> and an outphasing PA 422a in the outphasing power amplifier array <NUM> are a pair; to be specific, a control signal A<NUM> may be used to control the outphasing PA 421a and the outphasing PA 422a). In other words, a main power amplifier in a Doherty PA is quantified as an array including a plurality of outphasing power amplifiers.

Optionally, in this application, the main power amplification module <NUM> further includes a combination unit <NUM>. Optionally, the combination unit <NUM> may be a low-isolation Chireix combiner, and includes an inductor and a capacitor. In another embodiment, the combiner may alternatively be another low-isolation combiner. This is not limited in this application.

In addition, in this embodiment of this application, the combination module <NUM> includes a transmission line <NUM> and a combiner <NUM>.

With reference to <FIG>, <FIG> shows a signal processing method according to an embodiment of this application. The method is applied to the signal processing system shown in <FIG>.

Specifically, in this embodiment of this application, the DSP module performs digital signal processing on a signal (to distinguish from another signal such as an output signal, the signal is collectively referred to as an input signal in this embodiment and the following embodiments), and then the DSP module sends a processed input signal to the input ends of the two paths of load modulation modules by using the output end. As shown in <FIG>, the signals input into the two paths of load modulation modules include input signals S<NUM> and S<NUM> and control signals A<NUM> to A1n of the two paths of outphasing PAs, and an input signal S<NUM> and control signals A<NUM> to A2n of the digital polar PAs.

In this application, there may be two manners for determining a size of the input signal. For specific details, refer to step <NUM>.

Similar to step <NUM>, in this embodiment, when the input signal is relatively large, the DSP module also determines, based on an amplitude value or based on a phase value obtained after outphasing conversion, whether a trigger condition of each digital polar power amplifier in the auxiliary power amplification module <NUM> is met. If the trigger condition of each digital polar power amplifier in the auxiliary power amplification module <NUM> is met, S<NUM> and a corresponding control signal A2n are output.

Step <NUM>: If power values are less than or equal to a first threshold, turn on one or more pairs of outphasing power amplifiers in the outphasing power amplifier arrays.

Optionally, in this application, when the input signal is relatively small (to be specific, the amplitude value of the input signal is less than or equal to an amplitude threshold or the phase value obtained after outphasing conversion is greater than a phase threshold), the DSP module <NUM> may further determine, based on a stored trigger condition of each pair of outphasing power amplifiers in the outphasing power amplifier arrays, outphasing power amplifiers to be turned on. For example, a trigger condition of the outphasing PA 421a and the outphasing PA 422a is that the amplitude value of the input signal reaches an amplitude value <NUM>, and a trigger condition of an outphasing PA 421b and an outphasing PA 422b is that the amplitude value of the input signal reaches an amplitude value <NUM>. Therefore, when the amplitude value of the input signal reaches the amplitude value <NUM>, the DSP module <NUM> outputs the two paths of signals S<NUM> and S<NUM> and the control signal A<NUM>, to turn on the outphasing PA 421a and the outphasing PA 422a. When the amplitude value of the input signal reaches the amplitude value <NUM>, the DSP module <NUM> outputs the two paths of signals S<NUM> and S<NUM> and the control signals A<NUM> and A<NUM>, to turn on the outphasing PA 421a, the outphasing PA 422a, the outphasing PA 421b, and the outphasing PA 422b.

Other details are similar to those in step <NUM>, and are not described herein.

Step <NUM>: If the power values are greater than the first threshold, turn on all outphasing power amplifiers in the outphasing power amplifier arrays and one or more polar power amplifiers in the digital polar power amplifier array.

Still refer to <FIG>. If the DSP module <NUM> determines that the input signal is a relatively large signal, as described above, optionally, the DSP module <NUM> may perform outphasing conversion on the input signal, to obtain the two paths of signals S<NUM> and S<NUM>, and the DSP module <NUM> outputs S<NUM> and S<NUM> and the control signals A<NUM> to A1n to the main power amplification module <NUM>, to turn on all the outphasing power amplifiers in the outphasing power amplifier arrays. The outphasing power amplifiers respectively amplify the two paths of signals, and output processed signals to the Chireix combiner <NUM> in the main power amplification module <NUM>. In addition, the DSP module <NUM> performs polar processing on the input signal, to obtain the input signal S<NUM> and the control signals A<NUM> to A2n.

Optionally, in this application, the DSP module <NUM> stores a trigger condition of one or more power amplifiers in the digital polar power amplifier array. The DSP module <NUM> may determine, based on the amplitude value of the input signal or based on the phase value obtained after outphasing conversion and the trigger condition, a polar power amplifier to be turned on, and output corresponding control signals A2n and S<NUM>.

<FIG> shows an efficiency curve that is obtained by applying the technical solution in this embodiment and that is based on ideal model simulation (including an ideal voltage source, a current source, an ideal transmission line, and the like), where the outphasing PAs are quantified as <NUM> bits, and the polar PAs are quantified as <NUM> bits. <FIG> shows corresponding efficiency curves when power amplifiers of a plurality of quantity combinations are turned on, including: a corresponding efficiency curve when only outphasing power amplifiers controlled by the control signal A<NUM> in the outphasing power amplifiers (namely, only the main power amplifier module <NUM>) are turned on; a corresponding efficiency curve when outphasing power amplifiers controlled by the control signals A<NUM> and A<NUM> in the outphasing power amplifiers are turned on; a corresponding efficiency curve when outphasing power amplifiers controlled by the control signals A<NUM>, A<NUM>, and A<NUM> in the outphasing power amplifiers are turned on; a corresponding efficiency curve when outphasing power amplifiers controlled by the control signals A<NUM>, A<NUM>, A<NUM>, and A<NUM> in the outphasing power amplifiers are turned on; a corresponding efficiency curve when all the outphasing power amplifiers in the main power amplification module are turned on and the polar power amplifier controlled by the control signal A<NUM> in the digital polar power amplifier array are turned on; a corresponding efficiency curve when all the outphasing power amplifiers in the main power amplification module are turned on and the polar power amplifiers controlled by the control signals A<NUM> and A<NUM> in the digital polar power amplifier array are turned on; and a corresponding efficiency curve when all the outphasing power amplifiers in the main power amplification module are turned on and all polar power amplifiers in the digital polar power amplifier array are turned on. Clearly, the system may still obtain a high efficiency value in a <NUM> dB backoff area (to be specific, when all the power amplifiers are turned on), thereby further improving efficiency of the backoff area.

Optionally, <FIG> is a schematic structural diagram of another signal processing system according to an embodiment of this application. In <FIG>, the system includes a DSP module <NUM>, a main power amplification module <NUM> in a Doherty load modulation mode, an auxiliary power amplification module <NUM>, a combination module <NUM>, and a feedback module <NUM>. The main power amplification module <NUM> in the Doherty load modulation modules may include two paths of digital outphasing power amplifier arrays, and the auxiliary power amplification module <NUM> may include two paths of digital outphasing power amplifier arrays. The main power amplification module <NUM> and the auxiliary power amplification module <NUM> may implement the Doherty load modulation mode, that is, when an input signal is relatively small, the main power amplification module is turned on, and when the input signal is relatively large, the main power amplification module and the auxiliary power amplification module are turned on. Optionally, when the input signal is relatively small, the DSP module may turn on two or more outphasing power amplifiers in the main power amplification module based on a trigger condition of each outphasing power amplifier in the main power amplification module. In addition, when the input signal is relatively large, the DSP module <NUM> may turn on all outphasing power amplifiers included in the main power amplification module, and turn on one or more pairs of outphasing power amplifiers in the auxiliary power amplification module based on a trigger condition of each pair of outphasing power amplifiers included in the auxiliary power amplification module. For specific details, refer to the foregoing embodiments.

Optionally, <FIG> is a schematic structural diagram of a signal processing system according to an embodiment of this application. In <FIG>, the system includes a DSP module <NUM>, a main power amplification module <NUM> in a Doherty load modulation mode, an auxiliary power amplification module <NUM>, a combination module <NUM>, and a feedback module <NUM>. Optionally, the main power amplification module <NUM> further includes a Chireix combiner <NUM>, and the combination module <NUM> may be a Doherty combiner. The Chireix combiner <NUM> and the Doherty combiner <NUM> each use a transformer to implement Chireix outphasing active load modulation and Doherty active load modulation, and reduce a size of the system to implement on-chip integration by using a CMOS process. It should be noted that, the structure in this embodiment may be used in any system shown in <FIG>, <FIG>, and <FIG>. That is, the main power amplification module and/or the auxiliary power amplification module including outphasing power amplifiers or outphasing power amplifier arrays may use the Chireix combiner including the transformer, and the Doherty combiner also uses a transformer structure.

Optionally, in this application, the main power amplification module in the Doherty load modulation mode may also be a digital polar power amplifier array, and the auxiliary power amplification module may be a conventional outphasing power amplifier or a digital outphasing power amplifier array. For an operating manner of the system, refer to the foregoing embodiments.

It should be noted that, in this application, only two paths of Doherty structures are used as an example for description. Optionally, in this application, the signal processing system may include n paths of load modulation modules, where n is an integer greater than <NUM>. For example, the signal processing system may include three paths of load modulation modules. The n paths of load modulation module include one path of main power amplification module and (n-<NUM>) paths of auxiliary power amplification modules. Functions of modules in a multi-path Doherty structure are similar to those described in the embodiments of this application, that is, the main power amplification module may implement an outphasing mode, and the (n-<NUM>) paths of auxiliary power amplification modules may implement a digital outphasing mode and/or a digital polar mode. The auxiliary power amplification module is in a non-operating state when an input signal is relatively small. In other words, the auxiliary power amplification module is turned on only when the input signal is relatively large. In this application, a larger quantity of paths of auxiliary power amplification modules in the system indicates higher efficiency of a backoff area and a larger depth of the backoff area. However, considering limitation on complexity of the system, two paths of load modulation structures, namely, n = <NUM>, may be usually used, to achieve a deep backoff area under a target that a process can be implemented.

The foregoing mainly describes solutions provided in the embodiments of this application from the perspective of interaction between network elements. It may be understood that, to implement the foregoing functions, a signal processing apparatus includes corresponding hardware structures and/or software modules for performing various functions. A person of ordinary skill in the art should easily be aware that, with reference to the units and algorithm steps described in the embodiments disclosed in this application, the embodiments of this application can be implemented in a form of hardware or a combination of hardware and computer software. Whether a function is performed by hardware or hardware driven by computer software depends on particular applications and design constraints of the technical solutions.

According to the embodiments of this application, the signal processing apparatus may be divided into functional modules based on the foregoing method examples. For example, each functional module may be obtained through division corresponding to each function, or two or more functions may be integrated into one processing module. The integrated module may be implemented in a form of hardware, or may be implemented in a form of a software functional module. It should be noted that, in this embodiment of this application, module division is an example, and is merely a logical function division. In actual implementation, another division manner may be used.

When the functional modules are obtained through division by using corresponding functions, <FIG> is a possible schematic structural diagram of a signal processing apparatus <NUM> involved in the foregoing embodiments. As shown in <FIG>, the signal processing apparatus may include: a control module <NUM>, where the module is configured to control n paths of load modulation modules connected in parallel to receive signals. The control module <NUM> may be further configured to turn on one or more paths of load modulation modules in the n paths of load modulation modules based on power values of the signals.

All related content of each step involved in the foregoing method embodiments may be referred to a function description of a corresponding functional module, and details are not described herein.

Based on a same technical concept, an embodiment of this application further provides a computer-readable storage medium. The computer-readable storage medium stores a computer program. The computer program includes at least one segment of code. The at least one segment of code may be executed by a signal processing apparatus, to control a signal processing apparatus to implement the foregoing method embodiments.

Based on a same technical concept, an embodiment of this application further provides a computer program. The computer program is used to implement the foregoing method embodiments when being executed by a signal processing apparatus.

The program may be completely or partially stored in a storage medium packaged with a processor, or may be partially or completely stored in a memory not packaged with the processor.

Based on a same technical concept, an embodiment of this application further provides a processor, and the processor is configured to implement the foregoing method embodiments. The processor may be a chip.

Methods or algorithm steps described in combination with the content disclosed in this embodiment of this application may be implemented by hardware, or may be implemented by a processor by executing software instructions. The software instructions may include a corresponding software module. The software module may be stored in a random access memory (Random Access Memory, RAM), a flash memory, a read only memory (Read Only Memory, ROM), an erasable programmable read only memory (Erasable Programmable ROM, EPROM), an electrically erasable programmable read only memory (Electrically EPROM, EEPROM), a register, a hard disk, a removable hard disk, a compact disc read-only memory (CD-ROM), or any other form of storage medium well-known in the art. For example, a storage medium is coupled to a processor, so that the processor can read information from the storage medium or write information into the storage medium. Certainly, the storage medium may be a component of the processor. The processor and the storage medium may be located in the ASIC. In addition, the ASIC may be located in network equipment. Certainly, the processor and the storage medium may exist in network equipment as discrete components.

A person skilled in the art should be aware that in the foregoing one or more examples, functions described in the embodiments of this application may be implemented by hardware, software, firmware, or any combination thereof. When the functions are implemented by software, the foregoing functions may be stored in a computer-readable medium or transmitted as one or more instructions or code in the computer-readable medium. The computer-readable medium includes a computer storage medium and a communications medium, where the communications medium includes any medium that enables a computer program to be transmitted from one place to another. The storage medium may be any available medium accessible to a general-purpose or dedicated computer.

Claim 1:
A signal processing system (<NUM>, <NUM>, <NUM>), comprising n paths of load modulation modules and a combination module (<NUM>, <NUM>, <NUM>, <NUM>), wherein
the n paths of load modulation modules are connected in parallel, an output end of each path of load modulation module is connected to an input end of the combination module (<NUM>, <NUM>, <NUM>, <NUM>), n is an integer greater than <NUM>, and the combination module (<NUM>, <NUM>, <NUM>, <NUM>) receives, by using the input end, n paths of signals output by the n paths of load modulation modules and combines the n paths of signals;
the n paths of load modulation modules comprise one path of main power amplification module (<NUM>, <NUM>, <NUM>, <NUM>) and n-<NUM> paths of auxiliary power amplification modules (<NUM>, <NUM>, <NUM>, <NUM>), and the auxiliary power amplification modules (<NUM>, <NUM>, <NUM>, <NUM>) are turned on when power values of signals received by input ends of the load modulation modules are greater than a first threshold; and
the main power amplification module (<NUM>, <NUM>, <NUM>, <NUM>) comprises two outphasing (outphasing) power amplification units, and each path of auxiliary power amplification module comprises one digital polar (digital polar) power amplifier array.