Patent Description:
An electronic device, such as a portable terminal, is required to be miniaturized and to have multiple functions. For this, the electronic device includes a printed circuit board (PCB) on which various components are mounted (e.g., PCB, printed board assembly (PBA), and flexible printed circuit board (FPCB)).

The PCB may include a processor, a memory, a camera, a broadcast receiver module, and a communication module, which are necessary in the electronic device (e.g., a smart phone). The PCB may include circuit interconnects for connecting a plurality of electronic components mounted thereon.

<CIT> discloses a PCB assembly for a mobile terminal; the PCB assembly includes a main PCB, a body PCB and a cover PCB. The main PCB has a first electronic component mounted thereon. The body PCB is mounted on the main PCB and includes a cavity there through. The first electronic component is positioned within the cavity when the body PCB is mounted on the main PCB. The cover PCB is aligned and mounted on the body PCB to cover the cavity. The cover PCB has a second electronic component mounted on a surface thereof. When the cover PCB is mounted on the body PCB, the second electronic component is positioned within the cavity and faces the main PCB.

In order to lengthen the usage time of the electronic device, it is required to increase the capacity of a battery.

If the printed circuit board (PCB) built in the electronic device is formed in a single layer, it may be difficult to secure a space for extending the capacity of the battery.

In order to increase the battery capacity of the electronic device, it is required to reduce the area of the built-in PCB, and to secure a battery extension space.

Accordingly, an aspect of the disclosure is to provide an electronic device including an interposer, which can reduce an area of a PCB by inserting the interposer, in which a space for mounting via and components therein is formed, between a first circuit board and a second circuit board and by laminating the first circuit board and the second circuit board, and can secure a battery extension space of the electronic device as large as the reduced area of the PCB.

The invention is defined in the independent claim and various embodiments are defined in the dependant claims.

According to the various aspects of the disclosure, since the interposer in which the space for mounting the via and components therein is formed is inserted between the first circuit board and the second circuit board and the first circuit board and the second circuit board are laminated, the area of the PCB can be reduced, and the battery extension space of the electronic device can be secured as large as the reduced area of the PCB.

The above and other aspects, features, and advantages of certain embodiments of the disclosure will be more apparent from the following description taken in conjunction with the accompanying drawings.

The embodiments covered by the claims correspond to <FIG> and <FIG>; the embodiments of <FIG>, <FIG> and <FIG> are not covered by the claims, while the embodiments of <FIG>, <FIG> and <FIG> are examples for better understanding of the invention.

<FIG> is a block diagram illustrating an electronic device in a network environment according to various embodiments of the disclosure.

Referring to <FIG>, an electronic device <NUM> in a network environment <NUM> may communicate with an electronic device <NUM> via a first network <NUM> (e.g., a short-range wireless communication network), or an electronic device <NUM> or a server <NUM> via a second network <NUM> (e.g., a long-range wireless communication network). According to an embodiment of the disclosure, the electronic device <NUM> may communicate with the electronic device <NUM> via the server <NUM>. According to an embodiment of the disclosure, the electronic device <NUM> may include a processor <NUM>, memory <NUM>, an input device <NUM>, a sound output device <NUM>, a display device <NUM>, an audio module <NUM>, a sensor module <NUM>, an interface <NUM>, a haptic module <NUM>, a camera module <NUM>, a power management module <NUM>, a battery <NUM>, a communication module <NUM>, a subscriber identification module (SIM) <NUM>, or an antenna module <NUM>. In some embodiments of the disclosure, at least one (e.g., the display device <NUM> or the camera module <NUM>) of the components may be omitted from the electronic device <NUM>, or one or more other components may be added in the electronic device <NUM>. In some embodiments of the disclosure, some of the components may be implemented as single integrated circuitry.

According to an embodiment of the disclosure, as at least part of the data processing or computation, the processor <NUM> may load a command or data received from another component (e.g., the sensor module <NUM> or the communication module <NUM>) in a volatile memory <NUM>, process the command or the data stored in the volatile memory <NUM>, and store resulting data in non-volatile memory <NUM>. According to an embodiment of the disclosure, the processor <NUM> may include a main processor <NUM> (e.g., a central processing unit (CPU) or an application processor (AP)), and an auxiliary processor <NUM> (e.g., a graphics processing unit (GPU), an image signal processor (ISP), a sensor hub processor, or a communication processor (CP)) that is operable independently from, or in conjunction with, the main processor <NUM>.

The auxiliary processor <NUM> may control at least some of functions or states related to at least one component (e.g., the display device <NUM>, the sensor module <NUM>, or the communication module <NUM>) among the components of the electronic device <NUM>, instead of the main processor <NUM> while the main processor <NUM> is in an inactive state (e.g., a sleep state), or together with the main processor <NUM> while the main processor <NUM> is in an active state (e.g., executing an application). According to an embodiment of the disclosure, the auxiliary processor <NUM> (e.g., an ISP or a CP) may be implemented as part of another component (e.g., the camera module <NUM> or the communication module <NUM>) functionally related to the auxiliary processor <NUM>.

According to an embodiment of the disclosure, the receiver may be implemented as separate from, or as part of the speaker.

According to an embodiment of the disclosure, the display device <NUM> may include touch circuitry adapted to detect a touch, or sensor circuitry (e.g., a pressure sensor) adapted to measure the intensity of force incurred by the touch.

According to an embodiment of the disclosure, the audio module <NUM> may obtain the sound via the input device <NUM>, or output the sound via the sound output device <NUM> or a headphone of an external electronic device (e.g., an electronic device <NUM>) directly (e.g., wiredly) or wirelessly coupled with the electronic device <NUM>.

According to an embodiment of the disclosure, the sensor module <NUM> may include, for example, a gesture sensor, a gyro sensor, an atmospheric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an infrared (IR) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

According to an embodiment of the disclosure, the interface <NUM> may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, a secure digital (SD) card interface, or an audio interface.

According to an embodiment of the disclosure, the connecting terminal <NUM> may include, for example, a HDMI connector, a USB connector, a SD card connector, or an audio connector (e.g., a headphone connector).

According to an embodiment of the disclosure, the haptic module <NUM> may include, for example, a motor, a piezoelectric element, or an electric stimulator.

According to an embodiment of the disclosure, the camera module <NUM> may include one or more lenses, image sensors, ISPs, or flashes.

According to one embodiment of the disclosure, the power management module <NUM> may be implemented as at least part of, for example, a power management integrated circuit (PMIC).

According to an embodiment of the disclosure, the battery <NUM> may include, for example, a primary cell which is not rechargeable, a secondary cell which is rechargeable, or a fuel cell.

The communication module <NUM> may include one or more CPs that are operable independently from the processor <NUM> (e.g., the AP) and supports a direct (e.g., wired) communication or a wireless communication. According to an embodiment of the disclosure, the communication module <NUM> may include a wireless communication module <NUM> (e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module <NUM> (e.g., a local area network (LAN) communication module or a power line communication (PLC) module). The wireless communication module <NUM> may identify and authenticate the electronic device <NUM> in a communication network, such as the first network <NUM> or the second network <NUM>, using subscriber information (e.g., international mobile subscriber identity (IMSI)) stored in the SIM <NUM>.

According to an embodiment of the disclosure, the antenna module <NUM> may include one or more antennas, and, therefrom, at least one antenna appropriate for a communication scheme used in the communication network, such as the first network <NUM> or the second network <NUM>, may be selected, for example, by the communication module <NUM> (e.g., the wireless communication module <NUM>).

According to an embodiment of the disclosure, commands or data may be transmitted or received between the electronic device <NUM> and the external electronic device <NUM> via the server <NUM> coupled with the second network <NUM>. According to an embodiment of the disclosure, all or some of operations to be executed at the electronic device <NUM> may be executed at one or more of the external electronic devices <NUM>, <NUM>, or <NUM>.

As used herein, such terms as "1st" and "2nd," or "first" and "second" may be used to simply distinguish a corresponding component from another, and does not limit the components in other aspects (e.g., importance or order).

For example, according to an embodiment of the disclosure, the module may be implemented in a form of an application-specific integrated circuit (ASIC).

Various embodiments as set forth herein may be implemented as software (e.g., the program <NUM>) including one or more instructions that are stored in a storage medium (e.g., an internal memory <NUM> or an external memory <NUM>) that is readable by a machine (e.g., the electronic device <NUM>). Wherein, the term "non-transitory" simply means that the storage medium is a tangible device, and does not include a signal (e.g., an electromagnetic wave), but this term does not differentiate between where data is semipermanently stored in the storage medium and where the data is temporarily stored in the storage medium.

Certain aspects of the disclosure can also be embodied as computer readable code on a non-transitory computer readable recording medium. A non-transitory computer readable recording medium is any data storage device that can store data which can be thereafter read by a computer system. Examples of the non-transitory computer readable recording medium include a Read-Only Memory (ROM), a Random-Access Memory (RAM), Compact Disc-ROMs (CD-ROMs), magnetic tapes, floppy disks, and optical data storage devices. The non-transitory computer readable recording medium can also be distributed over network coupled computer systems so that the computer readable code is stored and executed in a distributed fashion. In addition, functional programs, code, and code segments for accomplishing the disclosure can be easily construed by programmers skilled in the art to which the disclosure pertains.

At this point it should be noted that the various embodiments of the disclosure as described above typically involve the processing of input data and the generation of output data to some extent. This input data processing and output data generation may be implemented in hardware or software in combination with hardware. For example, specific electronic components may be employed in a mobile device or similar or related circuitry for implementing the functions associated with the various embodiments of the disclosure as described above. Alternatively, one or more processors operating in accordance with stored instructions may implement the functions associated with the various embodiments of the disclosure as described above. If such is the case, it is within the scope of the disclosure that such instructions may be stored on one or more non-transitory processor readable mediums. Examples of the processor readable mediums include a ROM, a RAM, CD-ROMs, magnetic tapes, floppy disks, and optical data storage devices. The processor readable mediums can also be distributed over network coupled computer systems so that the instructions are stored and executed in a distributed fashion. In addition, functional computer programs, instructions, and instruction segments for accomplishing the present disclosure can be easily construed by programmers skilled in the art to which the present disclosure pertains.

According to various embodiments of the disclosure, each component (e.g., a module or a program) of the above-described components may include a single entity or multiple entities. According to various embodiments of the disclosure, one or more of the above-described components may be omitted, or one or more other components may be added. In such a case, according to various embodiments of the disclosure, the integrated component may still perform one or more functions of each of the plurality of components in the same or similar manner as they are performed by a corresponding one of the plurality of components before the integration. According to various embodiments of the disclosure, operations performed by the module, the program, or another component may be carried out sequentially, in parallel, repeatedly, or heuristically, or one or more of the operations may be executed in a different order or omitted, or one or more other operations may be added.

<FIG> is an exploded perspective view of partial configurations of an electronic device according to various embodiments of the disclosure, and <FIG> is a combined view of partial configurations of an electronic device according to various embodiments of the disclosure.

Referring to <FIG> and <FIG>, an electronic device <NUM> according to various embodiments of the disclosure includes a housing <NUM>, a first circuit board <NUM>, a second circuit board <NUM>, an interposer <NUM>, a third circuit board <NUM>, a connector <NUM>, a first battery <NUM>, a second battery <NUM>, an antenna module <NUM>, and a back cover <NUM>.

According to various embodiments of the disclosure, the electronic device <NUM> may include the electronic device (at least one of <NUM>, <NUM>, and <NUM>) of <FIG>. The first battery <NUM> and the second battery <NUM> may include the battery <NUM> of <FIG>. The antenna module <NUM> may include the antenna module <NUM> of <FIG>. The back cover <NUM> may be provided on the back of the electronic device <NUM> of <FIG>. Each of the first circuit board <NUM>, the second circuit board <NUM>, and the third circuit board <NUM> include at least one connection terminal (e.g., a connector) for electrically connecting to other constituent elements. Each of the first circuit board <NUM>, the second circuit board <NUM>, and the third circuit board <NUM> include a printed circuit board (PCB), a printed board assembly (PBA), and a flexible printed circuit board (FPCB).

The housing <NUM> may be configured in a side bezel structure to accommodate the constituent elements of the electronic device <NUM> as described above, such as the first circuit board <NUM>, the second circuit board <NUM>, the interposer <NUM>, the third circuit board <NUM>, the connector <NUM>, the first battery <NUM>, the second battery <NUM>, the antenna module <NUM>, and the back cover <NUM>. At least a part of an external exposure surface of the housing <NUM> may be made of a conductive material (e.g., metal). At least a part of the external exposure surface of the housing <NUM> may be used as an antenna of the electronic device <NUM>.

According to an embodiment of the disclosure, the housing <NUM> may include a support member (e.g., a bracket) <NUM> provided therein. The support member <NUM> may accommodate therein and support constituent elements of the electronic device <NUM>. The support member <NUM> may be integrally formed on one surface of the housing <NUM>. The support member <NUM> may be formed of, for example, a metal material and/or a non-metal material (e.g., polymer).

The first circuit board <NUM> may be deployed in at least a part of the housing <NUM>. The first circuit board <NUM> may include a processor (e.g., the processor <NUM> of <FIG>) required to operate the electronic device <NUM>, a memory (e.g., the memory <NUM> of <FIG>), a communication circuit (e.g., the communication module <NUM> of <FIG>), a power management module (e.g., the power management module <NUM> of <FIG>), and/or an interface (e.g., the interface <NUM> of <FIG>).

According to an embodiment of the disclosure, the processor (e.g., the processor <NUM> of <FIG>) may include one or more of a CPU, an AP (e.g., an AP <NUM> of <FIG>), a call processor (e.g., a call processor <NUM> of <FIG>), a graphic processor, an ISP, a sensor hub processor, and a CP. The memory (e.g., the memory <NUM> of <FIG>) may include, for example, a volatile memory or a non-volatile memory. The communication circuit (e.g., the communication module <NUM> of <FIG>) may include, for example, a wireless communication module (e.g., the wireless communication module <NUM> of <FIG>) or a wired communication module (e.g., the wired communication module <NUM> of <FIG>). The interface (e.g., interface <NUM> of <FIG>) may include, for example, a HDMI, a USB interface, an SD card interface, and/or an audio interface. For example, the interface may electrically or physically connect the electronic device <NUM> to an external electronic device (e.g., the electronic device <NUM> of <FIG>), and may include a USB connector, an SD card/MMC connector, or an audio connector.

The second circuit board <NUM> may be laminated on the first circuit board <NUM> through the interposer <NUM>. The second circuit board <NUM> may include a transceiver (e.g., a transceiver <NUM> of <FIG>) or a wireless communication module (e.g., a Wi-Fi module) in which a (e.g., the call processor <NUM> of <FIG>) and a transceiver are integrated.

The interposer <NUM> is deployed between the first circuit board <NUM> and the second circuit board <NUM>. The interposer <NUM> may include a space S in which at least one component mounted on the second circuit board <NUM> (e.g., the AP <NUM> of <FIG>, call processor <NUM>, transceiver <NUM>, and Wi-Fi module) is deployed. The interposer <NUM> includes a plurality of vias <NUM> for electrically connecting the first circuit board <NUM> and the second circuit board <NUM> to each other.

The third circuit board <NUM> may further include at least one antenna (e.g., an antenna <NUM> of <FIG>) for transmitting/receiving a signal or power to/from an outside or a connection terminal connected to the antenna.

The connector <NUM> may electrically connect the first circuit board <NUM>, the second circuit board <NUM>, and the third circuit board <NUM> to each other.

The first battery <NUM> (e.g., the battery <NUM> of <FIG>) may supply the power to at least one constituent element of the electronic device <NUM>.

The second battery <NUM> may supply the power to at least one constituent element of the electronic device <NUM>. The second battery <NUM> may be an auxiliary battery for increasing the capacity of the first battery <NUM>. The second battery <NUM> may be deployed in a space secured by laminating the first circuit board <NUM> and the second circuit board <NUM> through the interposer <NUM>.

According to an embodiment of the disclosure, the second battery <NUM> may be deployed between the second circuit board <NUM> and the third circuit board <NUM>. According to an embodiment of the disclosure, the connector <NUM> may electrically connect the second circuit board <NUM> and the third circuit board <NUM> to each other, and may be deployed on at least one of an upper portion, a lower portion, and a side portion of the first battery <NUM> or the second battery <NUM>.

According to an embodiment of the disclosure, the first battery <NUM> and the second battery <NUM> may include, for example, a non-rechargeable primary cell, a rechargeable secondary cell, or a fuel cell. The first battery <NUM> and the second battery <NUM> may be integrally deployed in the housing <NUM> of the electronic device <NUM>, or may be detachably deployed in the housing <NUM> of the electronic device <NUM>. The first battery <NUM> and the second battery <NUM> may be configured as one pack. The first battery <NUM> and the second battery <NUM> may include different fuel gauges for grasping the capacities thereof, or may use different chargers. Through this, the batteries having different sizes can be efficiently managed. The first battery <NUM> and the second battery <NUM> may be configured as one cell.

The antenna module <NUM> may be deployed between the third circuit board <NUM> and the back cover <NUM>. The antenna module <NUM> (e.g., the antenna module <NUM> of <FIG>) may be connected to the third circuit board <NUM>. The antenna module <NUM> may include an antenna <NUM> illustrated in <FIG>. The third circuit board <NUM> may include a connection terminal connected to the antenna module <NUM>.

According to an embodiment of the disclosure, the antenna module <NUM> may, for example, communicate with an external device or wirelessly transmit and receive the power necessary for charging. According to another embodiment of the disclosure, an antenna structure may be formed by a partial exposure surface of the housing <NUM> and/or a part of the support member <NUM> or a combination thereof.

The back cover <NUM> may be a cover for protecting the back surface of the electronic device <NUM> (e.g., the electronic device <NUM> of <FIG>).

<FIG> is a perspective view schematically illustrating a connection relationship among first, second, and third circuit boards of an electronic device according to various embodiments of the disclosure, and <FIG> is a side view schematically illustrating a connection relationship among first, second, and third circuit boards of an electronic device according to various embodiments of the disclosure.

Referring to <FIG> and <FIG>, an electronic device <NUM> according to various embodiments of the disclosure includes a first circuit board <NUM>, a second circuit board <NUM>, an interposer <NUM>, and a third circuit board <NUM>.

A communication circuit (e.g., the communication module <NUM> of <FIG>) may be deployed on the first circuit board <NUM>. The communication circuit may include, for example, an AP (e.g., the AP <NUM> of <FIG>) and a call processor (e.g., the call processor <NUM> of <FIG>). A first connection terminal <NUM> electrically connected to an output of the communication circuit is formed on a first surface (e.g., the upper portion) of the first circuit board <NUM>.

The second circuit board <NUM> may include, for example, a transceiver (e.g., the transceiver <NUM> of <FIG>) or a Wi-Fi module. A second connection terminal <NUM> is deployed on a first surface (e.g., a lower portion) of the second circuit board <NUM>, and a third connection terminal <NUM> may be deployed on a second surface (e.g., upper portion) of the second circuit board <NUM>. The second connection terminal <NUM> is electrically connected (e.g., a digital signal) to components (e.g., communication circuit) mounted on the second circuit board <NUM>. The third connection terminal <NUM> may be electrically connected (e.g., an analog signal) to a fourth connection terminal <NUM> formed on the third circuit board <NUM>. According to various embodiments of the disclosure, the third connection terminal <NUM> may be connected to the first circuit board <NUM> through another connection terminal (e.g., a sixth connection terminal (not illustrated)) excluding the first connection terminal <NUM> formed on the first circuit board <NUM>. According to various embodiments of the disclosure, the third connection terminal <NUM> connected to the connector <NUM> may be deployed on the first circuit board <NUM>. Through this, in case of falling of the electronic device <NUM>, the interposer <NUM> can be prevented from being pressed and damaged after the back cover <NUM> makes an impact on a head of the connector <NUM>. The third connection terminal <NUM> may be electrically connected to the first circuit board <NUM> through another connection member excluding the first connection terminal <NUM> formed on the first circuit board <NUM>, and thus a signal can be transferred from the second circuit board <NUM> to the first circuit board <NUM> through the interposer <NUM> without a loss. According to an embodiment of the disclosure, for impedance matching, the interposer <NUM> may have different permittivity from that of the first circuit board <NUM> and the second circuit board <NUM>. According to an embodiment of the disclosure, the second connection terminal <NUM> of the second circuit board <NUM> is electrically connected to a second end portion (e.g., an upper portion) of a via <NUM>, and the second circuit board <NUM> is attached to a second surface (e.g., an upper surface) of the interposer <NUM> in an opposite direction to the a first surface (lower surface) of the interposer <NUM> so that the second circuit board <NUM> forms an inner space S together with the first circuit board <NUM> and the interposer <NUM>.

The interposer <NUM> is deployed between the first circuit board <NUM> and the second circuit board <NUM>. The interposer <NUM> may have a space S in which at least one component mounted on the second circuit board <NUM> (e.g., the AP <NUM> of <FIG>, call processor <NUM>, transceiver <NUM>, and Wi-Fi module) is deployed. The interposer <NUM> may be configured in a rectangular shape or in other various shapes. The interposer <NUM> includes a plurality of vias <NUM> for electrically connecting the first connection terminal <NUM> formed on the first surface (e.g., an upper surface) of the first circuit board <NUM> and the second connection terminal <NUM> formed on the first surface (e.g., a lower surface) of the second circuit board <NUM> to each other. According to an embodiment of the disclosure, the first surface (e.g., a lower surface) of the interposer <NUM> is attached to the first circuit board <NUM> so that the interposer <NUM> at least partly surrounds at least a partial region of the first circuit board <NUM> and the first end portion (e.g., a lower portion) of the via <NUM> is electrically connected to the first connection terminal <NUM>.

The fourth connection terminal <NUM> may be deployed on a first side of the third circuit board <NUM>, and a fifth connection terminal <NUM> may be deployed on a second side of the third circuit board <NUM>. The fourth connection terminal <NUM> and the fifth connection terminal <NUM> may be electrically connected to each other. The fifth connection terminal <NUM> formed on the third circuit board <NUM> may be electrically connected to the antenna <NUM> (e.g., the antenna module <NUM> of <FIG>).

According to various embodiments of the disclosure, although it is described that the third connection terminal <NUM> is deployed on the second circuit board <NUM>, the third connection terminal <NUM> may be deployed on the first circuit board <NUM> as a sixth connection terminal (not illustrated). If the sixth connection terminal is deployed on the first circuit board <NUM>, the sixth connection terminal may be electrically connected to the fourth connection terminal <NUM> formed on the third circuit board <NUM> through the connector <NUM>. The connector <NUM> may be a FPCB type, coaxial type, or connector type connection member connecting the circuit boards through blocking of a radio frequency (RF) signal.

The third connection terminal <NUM> formed on the second surface (e.g., an upper portion) of the second circuit board <NUM> and the fourth connection terminal <NUM> formed on the first side of the third circuit board <NUM> may be electrically connected to each other through the connector <NUM>. According to various embodiments of the disclosure, the third connection terminal <NUM> may not be limited to be formed on the second circuit board <NUM>. For example, the third connection terminal <NUM> may be deployed on the first circuit board <NUM> so far as it can minimize a loss through impedance matching by changing the size and/or permittivity of the via <NUM> formed on the interposer <NUM>.

According to various embodiments of the disclosure, the first circuit board <NUM> may extract raw data by decoding an in-phase signal and a quadrature signal received through a transceiver of the second circuit board <NUM>. The second circuit board <NUM> may separate a RF band and may process analog data including a carrier frequency signal. The interposer <NUM> may transfer a baseband signal that does not include the carrier frequency signal to the first circuit board <NUM>. The interposer <NUM> may process a digital signal including the in-phase signal and the quadrature signal. The connector <NUM> may transfer an analog signal from which the (RF) band is separated to the fourth connection terminal <NUM> of the third circuit board <NUM> through the third connection terminal <NUM> formed on the second circuit board <NUM>. According to various embodiments of the disclosure, the first circuit board <NUM> may transfer the digital signal related to the RF band to the second circuit board <NUM> through the interposer <NUM>. In order to minimize a loss of the RF band, the second circuit board <NUM> may transfer the digital signal related to the RF band to the third circuit board <NUM>, to which the antenna <NUM> is connected, other than the first circuit board <NUM>.

According to various embodiments of the disclosure, the analog signal, from which the RF band that is electrically connected to the antenna <NUM> is separated, may be transferred to the first circuit board <NUM> through the interposer <NUM>. For the impedance matching to minimize a loss of the analog signal from which the RF band is separated, the permittivity of the interposer <NUM> or the size of the via <NUM> may be adjusted. In this case, the analog signal from the interposer <NUM> may be transferred to the first circuit board <NUM>. The transferred analog signal may be transferred to the fourth connection terminal of the third circuit board <NUM> through another connection terminal on the first circuit board <NUM>.

According to various embodiments of the disclosure, in order to transfer the analog signal from which the RF band is separated to the first circuit board <NUM> without a loss after the impedance matching of the analog signal, the via <NUM> formed on the interposer <NUM> may be copied into the connector <NUM> to calculate the impedance. The impedance calculation of the connector <NUM> is as in mathematical Equation <NUM> below.

Z<NUM> denotes impedance, d1 denotes an inner diameter of a shield pattern surrounding the via <NUM>, d2 denotes an outer diameter of the via <NUM>, and k denotes relative permittivity.

For example, if the via <NUM> is pierced with <NUM> phi, the impedance Z<NUM> of the connector <NUM> may be <NUM>. 18Ω, whereas if the via <NUM> is pierced with <NUM> phi, the impedance Z<NUM> of the connector <NUM> may be 46Ω (e.g., εr of the first circuit board <NUM> is εr=<NUM>, and d1 is an impedance value in case of <NUM> phi as compared with d2). In this case, the impedance Z<NUM> of the connector <NUM> may be controlled to approach 50Ω by changing the permittivity in case where the via <NUM> is pierced with <NUM> phi.

<FIG> is a diagram illustrating a configuration of first to third circuit boards of an electronic device and a connection relationship among them according to various embodiments of the disclosure.

Referring to <FIG>, an electronic device <NUM> according to various embodiments of the disclosure includes a first circuit board <NUM>, a second circuit board <NUM>, an interposer <NUM>, and a third circuit board <NUM>.

The first circuit board <NUM> may include, for example, an AP <NUM>, and a call processor <NUM>. The first circuit board <NUM> includes a first connection terminal <NUM> on a first surface thereof.

According to an embodiment of the disclosure, the AP <NUM> may control functions of constituent elements (e.g., the processor <NUM>, the memory <NUM>, the communication module <NUM>, and the power management module <NUM> of <FIG>) required to operate the electronic device <NUM>. The call processor <NUM> may modulate and demodulate a signal related to a communication protocol of the electronic device <NUM>.

The second circuit board <NUM> may include a transceiver <NUM>, a first filter <NUM>, a power amplifier <NUM>, a switch <NUM>, a second filter <NUM>, and a low-noise amplifier <NUM>. A second connection terminal <NUM> is deployed on a first surface of the second circuit board <NUM>, and a third connection terminal <NUM> may be deployed on a second surface of the second circuit board <NUM>. The second connection terminal <NUM> and the third connection terminal <NUM> may be electrically connected to each other through another component.

According to an embodiment of the disclosure, the transceiver <NUM> may mix a signal modulated through the call processor <NUM> of the first circuit board <NUM> with a carrier frequency signal through a mixer to transmit (Tx) the mixed signal, or may separate the receive (Rx) demodulated signal from the carrier frequency signal to modulate the separated signal. The first filter <NUM> may perform matching of the signal transferred from the transceiver <NUM>, or may perform filtering of a noise signal from the carrier frequency signal. The power amplifier <NUM> may amplify the transmit (Tx) signal filtered through the first filter <NUM> to increase a current gain of the signal. The switch <NUM> may separate paths of the transmit (Tx) signal and the receive (Rx) signal from each other. The second filter <NUM> may perform filtering of the noise signal from the receive (Rx) signal transferred through the switch <NUM>. For example, the low-noise amplifier <NUM> may amplify the receive (Rx) signal transferred through the second filter <NUM>, and may transfer the amplified signal to the transceiver <NUM>.

The interposer <NUM> is deployed between the first circuit board <NUM> and the second circuit board <NUM>. The interposer <NUM> includes a plurality of vias <NUM> for electrically connecting the first connection terminal <NUM> formed on the first surface of the first circuit board <NUM> and the second connection terminal <NUM> formed on the first surface of the second circuit board <NUM> to each other.

The third circuit board <NUM> may include a matching switch <NUM> controlled through the call processor <NUM> mounted on the first circuit board <NUM> and a hall integrated circuit (IC) <NUM> controlled through the AP <NUM>. According to various embodiments of the disclosure, a control signal provided by the AP <NUM> and the CP <NUM> mounted on the first circuit board <NUM> may be transferred to a separate connection member (e.g., a connector FPCB) electrically connecting the first circuit board <NUM> and the third circuit board <NUM> to each other. A fourth connection terminal <NUM> may be deployed on a first side of the third circuit board <NUM>, and a fifth connection terminal <NUM> may be deployed on a second side of the third circuit board <NUM>. The fourth connection terminal <NUM> and the fifth connection terminal <NUM> may be electrically connected to each other. The fifth connection terminal <NUM> formed on the third circuit board <NUM> may be electrically connected to the antenna <NUM>.

According to an embodiment of the disclosure, the matching switch <NUM> may adjust matching of ground (GND) or feeding of the antenna <NUM> connected to the fifth connection terminal <NUM> of the third circuit board <NUM>. The hall IC <NUM> may recognize, for example, opening or closing of a mobile terminal having a cover (e.g., a folder phone). The antenna <NUM> may transmit and receive a transmit (Tx) signal and a receive (Rx) signal for a specific wavelength.

According to an embodiment of the disclosure, the third connection terminal <NUM> formed on the second surface of the second circuit board <NUM> and the fourth connection terminal <NUM> formed on the first side of the third circuit board <NUM> may be electrically connected to each other through the connector <NUM>.

<FIG> is a view illustrating a configuration of first and second circuit boards of an electronic device according to various embodiments of the disclosure.

Referring to <FIG>, an electronic device <NUM> according to various embodiments of the disclosure may include a first circuit board <NUM>, a second circuit board <NUM>, an interposer <NUM>, a first shield member <NUM>, and a second shield member <NUM>.

On a lower portion of the first circuit board <NUM>, for example, an AP <NUM> may be mounted. The first shield member <NUM> may be deployed on an outside of the AP <NUM> mounted on the lower portion of the first circuit board <NUM>. The first shield member <NUM> may block, for example, a noise signal output from the first circuit board <NUM> of the electronic device <NUM>, and may block noise input from an outside of the electronic device <NUM>. The first shield member <NUM> may be a shield can or electromagnetic interference (EMI) molding member.

On an upper portion of the first circuit board <NUM>, for example, the CP <NUM> may be mounted. The CP <NUM> mounted on the upper portion of the first circuit board <NUM> may be deployed in a component mount space S in the interposer <NUM>. A first connection terminal <NUM> may be deployed on the first surface (e.g., an upper portion) of the first circuit board <NUM>. A second connection terminal <NUM> may be deployed on the first surface (e.g., a lower portion) of the second circuit board <NUM>.

According to an embodiment of the disclosure, the interposer <NUM> may include a via <NUM>, a first pad <NUM>, a second pad <NUM>, and a side plating member <NUM>.

The via <NUM> may electrically connect the first connection terminal <NUM> formed on the first circuit board <NUM> and the second connection terminal <NUM> formed on the second circuit board <NUM> to each other. The via <NUM> may include a through via or a stacked via.

The first pad <NUM> may be formed on a lower portion of the via <NUM> and may be electrically connected to the first connection terminal <NUM> of the first circuit board <NUM>.

The second pad <NUM> may be formed on an upper portion of the via <NUM> and may be electrically connected to the second connection terminal <NUM> of the second circuit board <NUM>.

The side plating member <NUM> may be provided on an outside of the via <NUM>. The side plating member <NUM> may combine the first circuit board <NUM> and the second circuit board <NUM> with each other (e.g., may be electrically connected to the first circuit board <NUM> or the second circuit board <NUM>), or may support them (may not be electrically connected to the first circuit board <NUM> or the second circuit board <NUM>). The side plating member <NUM> may be selectively used.

On an upper portion of the second circuit board <NUM>, for example, a transceiver <NUM> may be mounted. The second shield member <NUM> may be deployed on an outside of the transceiver <NUM> mounted on the upper portion of the second circuit board <NUM>. The second shield member <NUM> may block, for example, a noise signal output from the second circuit board <NUM> of the electronic device <NUM>, and may block noise input from an outside of the electronic device <NUM>. The second shield member <NUM> may be a shield can or EMI molding member.

According to an embodiment of the disclosure, the EMI molding members of the first shield member <NUM> and the second shield member <NUM> may be respectively combined with the first circuit board <NUM> and the second circuit board <NUM> through the following process.

In a first process, a pad for shield may be formed on at least a part of the lower portion of the first circuit board <NUM> and on at least a part of the upper portion of the second circuit board <NUM>.

In a second process, the first shield member <NUM> and the second shield member <NUM> may be mounted on the pad for shield formed on at least the part of the lower portion of the first circuit board <NUM> and on at least the part of the upper portion of the second circuit board <NUM>.

In a third process, after the first shield member <NUM> and the second shield member <NUM> are mounted through the second process, non-conductive molding liquid (e.g., epoxy molding compound (EMC)) may be spread.

In a fourth process, the non-conductive molding liquid spread around the pad for shield on which the first shield member <NUM> and the second shield member <NUM> are mounted may be etched through laser.

In a fifth process, sputtering of a conductive metal may be performed with respect to the pad for shield and the non-conductive molding liquid.

Referring to <FIG>, an electronic device <NUM> according to various embodiments of the disclosure may include a first circuit board <NUM>, a second circuit board <NUM>, an interposer <NUM>, a first shield member <NUM>, a TIM <NUM>, a heat dissipation member <NUM>, a copper sheet <NUM>, and a second shield member <NUM>.

On a lower portion of the first circuit board <NUM>, for example, an AP <NUM> may be mounted. The first shield member <NUM> may be deployed on an outside of the AP <NUM> mounted on the lower portion of the first circuit board <NUM>. The first shield member <NUM> may block, for example, a noise signal output from the first circuit board <NUM> of the electronic device <NUM>, and may block noise input from an outside of the electronic device <NUM>. The first shield member <NUM> may be a shield can or EMI molding member.

According to an embodiment of the disclosure, at least a part of the first shield member <NUM> may be opened. A first end of the thermal interface material (TIM) <NUM> may be deployed adjacent to the AP <NUM>, and a second end thereof may be provided to penetrate the open part of the first shield member <NUM>. The TIM <NUM> may serve to transfer heat generated from the call processor <NUM> of the electronic device <NUM> to the heat dissipation member <NUM>. For example, the TIM <NUM> may be made of a material having a large heat transfer coefficient. The copper sheet <NUM> may be provided between the first end and the second end of the TIM <NUM>. The copper sheet <NUM> may close the open part of the first shield member <NUM>. The copper sheet <NUM> may block the noise generated inside the electronic device <NUM>. The heat dissipation member <NUM> may be deployed on a support member (e.g., a bracket) <NUM>. The heat dissipation member <NUM> may transfer the heat transferred through the TIM <NUM> to the support member <NUM>, and may dissipate the heat to outside through the support member <NUM>.

On an upper portion of the first circuit board <NUM>, for example, the call processor <NUM> may be mounted. The call processor <NUM> mounted on the upper portion of the first circuit board <NUM> may be deployed in a component mount space S in the interposer <NUM>. A first connection terminal <NUM> may be deployed on the first surface (e.g., an upper portion) of the first circuit board <NUM>. A second connection terminal <NUM> may be deployed on the first surface (e.g., a lower portion) of the second circuit board <NUM>.

The side plating member <NUM> may be provided on an outside of the via <NUM>. The side plating member <NUM> may combine the first circuit board <NUM> and the second circuit board <NUM> with each other, or may support them. The side plating member <NUM> may be selectively used.

<FIG> is a perspective view schematically illustrating a connection relationship between first and second circuit boards of an electronic device according to various embodiments of the disclosure, and <FIG> is a side view schematically illustrating a connection relationship between first and second circuit boards of an electronic device according to various embodiments of the disclosure.

Referring to <FIG> and <FIG>, an electronic device <NUM> according to various embodiments of the disclosure may include a first circuit board <NUM>, a second circuit board <NUM>, and an interposer <NUM>.

A communication circuit (e.g., <NUM> RF module) may be deployed on the first circuit board <NUM>. A first connection terminal <NUM> electrically connected to an output of the communication circuit may be formed on a first surface (e.g., an upper portion) of the first circuit board <NUM>.

On an upper portion of the second circuit board <NUM>, for example, an array antenna <NUM> (e.g., an antenna module <NUM> of <FIG>) may be arranged. A second connection terminal <NUM> may be deployed on a first surface (e.g., a lower portion) of the second circuit board <NUM>. The array antenna <NUM> and the second connection terminal <NUM> may be electrically connected to each other. In order to lower the height of the electronic device <NUM>, electronic components may be mounted only on one surface of the second circuit board <NUM>. According to an embodiment of the disclosure, a third connection terminal (e.g., a third connection terminal <NUM> of <FIG>) or a c clip that can electrically connect another antenna element may be deployed on a second surface (e.g., an upper portion) of the second circuit board <NUM>.

According to various embodiments of the disclosure, the array antenna <NUM> may be at least one antenna patterned on the second circuit board <NUM> or a connection member connected to the antenna (e.g., the antenna <NUM> of <FIG>). For example, as illustrated in <FIG>, a third circuit board <NUM> to which the antenna <NUM> is connected may not be provided.

The interposer <NUM> may be deployed between the first circuit board <NUM> and the second circuit board <NUM>. The interposer <NUM> may have a space S in which at least one component (e.g., <NUM> RF module) mounted on the first circuit board <NUM> is deployed. The interposer <NUM> may be configured in a rectangular shape or in other various shapes. The interposer <NUM> may include at least one via <NUM> for electrically connecting the first connection terminal <NUM> formed on the first surface (e.g., an upper surface) of the first circuit board <NUM> and the second connection terminal <NUM> formed on the first surface (e.g., a lower surface) of the second circuit board <NUM> to each other.

According to an embodiment of the disclosure, as illustrated in <FIG> and <FIG>, the electronic device <NUM> according to various embodiments of the disclosure may be configured to be able to perform 3D beamforming. For example, in order to implement the <NUM> RF array antenna, the second circuit board <NUM> may include the array antenna <NUM>. Further, the interposer <NUM> may include at least one side plating member <NUM> provided on the side surface thereof. The side plating member <NUM> may be connected to the array antenna <NUM>. The side plating member <NUM> may operate as a part of the array antenna <NUM>. The side plating member <NUM> may cover three surfaces (e.g., upper, side, and back surfaces) of the interposer <NUM>. The side plating member <NUM> may be in a "c " shape.

According to various embodiments of the disclosure, as illustrated in <FIG> and <FIG>, the electronic device <NUM> according to various embodiments of the disclosure may be configured to transfer an RF signal to the third circuit board <NUM> through the third connection terminal (e.g., the third connection terminal <NUM> of <FIG>) after mounting a Wi-Fi module on the second circuit board <NUM>, or to directly connect the antenna (e.g., the antenna <NUM> of <FIG>) through an antenna connection terminal (fifth connection terminal <NUM> of <FIG> or c clip) formed on the second circuit board <NUM> without transferring the RF signal to the third circuit board <NUM>. For example, the AP <NUM> mounted on the first circuit board <NUM> may transfer a digital signal for controlling the Wi-Fi module mounted on the second circuit board <NUM> to the second circuit board <NUM> through the via <NUM> of the interposer <NUM>, and the Wi-Fi module on the second circuit board <NUM> may modulate the digital signal and may directly transfer the RF signal through the antenna <NUM> that is not the third circuit board <NUM> through the antenna connection terminal (fifth connection terminal <NUM> of <FIG> or c clip).

<FIG> and <FIG> are views illustrating embodiments of an interposer of an electronic device according to various embodiments of the disclosure.

Referring to <FIG>, an interposer <NUM> of an electronic device <NUM> according to various embodiments of the disclosure may be composed of a first portion <NUM> having vias <NUM> formed thereon, a second portion <NUM>, a third portion <NUM>, and a fourth portion <NUM>, which are integrally connected to each other. Even if the interposer <NUM> is configured in various different shapes, all portions constituting the interposer <NUM> may be integrally connected to each other. The interposer <NUM> may include a space S in which at least one component (e.g., the AP <NUM>, call processor <NUM>, or transceiver <NUM>) mounted on the second circuit board <NUM> is deployed.

Referring to <FIG>, an electronic device <NUM> according to various embodiments of the disclosure may be provided with at least one interposer <NUM>. According to an embodiment of the disclosure, the interposer <NUM> may include a first portion (e.g., first interposer) <NUM> having vias <NUM> formed thereon, a second portion (e.g., first interposer) <NUM>, a third portion (e.g., first interposer) <NUM>, and a fourth portion (e.g., first interposer) <NUM>, which can be separated from each other through first to fourth slits s1 to s4. For example, the first portion <NUM> and the second portion <NUM> may be separated from each other by the first slit s1. The second portion <NUM> and the third portion <NUM> may be separated from each other by the second slit s2. The third portion <NUM> and the fourth portion <NUM> may be separated from each other by the third slit s3. The fourth portion <NUM> and the first portion <NUM> may be separated from each other by the fourth slit s4. Even if the interposer <NUM> is configured in various different shapes, all portions constituting the interposer <NUM> may be configured to be separated from each other. According to an embodiment of the disclosure, the first to fourth slits s1 to s4 may be configured enough to prevent inflow of a noise signal from outside. For example, the first to fourth slits s1 to s4 may be configured at an interval that is smaller than the electrical wavelength of the noise signal from the outside. According to an embodiment of the disclosure, in order to block the inflow of the noise signal through the first to fourth slits s1 to s4, the interposer <NUM> may further include a shield member for shielding partial components in an inner space S. The shield member may be a shield can or EMI molding member.

<FIG> is a view illustrating a via and an interposer of an electronic device according to various embodiments of the disclosure.

Referring to <FIG>, a via <NUM> of an electronic device <NUM> according to various embodiments of the disclosure may be composed of a through via. The via (e.g., through via) <NUM> may include a hole <NUM>, a plating pad <NUM>, and an insulation region <NUM>.

The hole <NUM> may be formed to penetrate, for example, at least a part of an interposer <NUM> through a drill. An inner wall of the hole <NUM> may be plated to transfer an electrical signal.

The plating pad <NUM> (e.g., the first pad <NUM> or second pad <NUM> of <FIG>) may be formed to surround an outer side of the hole <NUM>. The plating pad <NUM> may be composed of a copper film and a gold film. The gold film may correspond to gold plating performed to prevent corrosion of the copper film.

The insulation region <NUM> may be formed to surround an outer side of the plating pad <NUM>. The insulation region <NUM> may be, for example, a region in which the copper film is opened so that the plating pad <NUM> of the via <NUM> is not connected to another signal (e.g., a ground region <NUM>) of the interposer <NUM>. Only solder resist (SR) ink may be spread on the region in which the copper film is open.

Referring to <FIG>, the interposer <NUM> of the electronic device <NUM> according to various embodiments of the disclosure may include a ground region <NUM>, a first keep-out region <NUM>, and a second keep-out region <NUM>.

The ground region <NUM> may surround or may be electrically connected to at least a part (e.g., the insulation region <NUM>) of the via <NUM>. The ground region <NUM> may be composed of a copper film and SR ink. The SR ink may be ink spread to prevent corrosion of the copper film.

The first keep-out region <NUM> may be formed on the first side of the ground region <NUM>. The second keep-out region <NUM> may be formed on the second side of the ground region <NUM>. For example, the first keep-out region <NUM> and the second keep-out region <NUM> may be formed on both sides of the ground region <NUM>. The first keep-out region <NUM> or the second keep-out region <NUM> may be a region in which an interconnect formed based on an error that is necessary for routing to cut an outline of the interposer <NUM> in a desired shape does not exist.

Referring to <FIG>, a via <NUM> of an electronic device <NUM> according to various embodiments of the disclosure may be composed of a tacked via. The via (e.g., stacked via) <NUM> may include an inner via <NUM>, a plating pad <NUM>, and an insulation region <NUM>.

The inner via <NUM> may be formed to be smaller than the plating pad <NUM> (e.g., the first pad <NUM> or second pad <NUM> of <FIG>) for high-speed signal movement.

The plating pad <NUM> may surround an outer side of the inner via <NUM>. The plating pad <NUM> may close an end portion of the inner via <NUM>. The plating pad <NUM> may be composed of a copper film and a gold film. The gold film may correspond to gold plating performed to prevent corrosion of the copper film.

The insulation region <NUM> may be formed to surround an outer side of the plating pad <NUM>. The insulation region <NUM> may be, for example, a region in which the copper film is opened so that the plating pad <NUM> of the via <NUM> is not connected to another signal (e.g., the ground region <NUM>) of the interposer <NUM>. Only SR ink may be spread on the region in which the copper film is open.

Referring to <FIG>, the interposer <NUM> of the electronic device <NUM> according to various embodiments of the disclosure may include a ground region <NUM>, a first keep-out region <NUM>, and a second keep-out region <NUM>. The interposer <NUM> illustrated in <FIG> may have the same configuration as the configuration of the interposer <NUM> illustrated in <FIG>.

Referring to <FIG>, a via <NUM> of an electronic device <NUM> according to various embodiments of the disclosure may be composed of a through via. The via (e.g., through via) <NUM> includes a plating pad <NUM> and may include a hole <NUM>, and an insulation region <NUM>.

The via <NUM> illustrated in <FIG> may have the same configuration as the configuration of the via <NUM> illustrated in <FIG>.

The interposer <NUM> illustrated in <FIG> may have the same configuration as the configuration of the interposer <NUM> illustrated in <FIG>.

The configuration illustrated in <FIG> is different from the configuration illustrated in <FIG> on the point that the ground region <NUM> of the interposer <NUM> and the plating pad of the via <NUM> are connected to each other using an interconnect <NUM>.

<FIG> is a view illustrating a configuration of an interposer of an electronic device according to various embodiments of the disclosure.

Referring to <FIG>, an interposer <NUM> of an electronic device <NUM> according to various embodiments of the disclosure may be configured so that a part (e.g., an inner side) of a ground region <NUM> is removed, and the width of the interposer <NUM> is reduced as much as the removed ground region <NUM>.

Referring to <FIG>, an interposer <NUM> of an electronic device <NUM> according to various embodiments of the disclosure may include different vias (e.g., stacked via and through via) <NUM>. The interposer <NUM> may be configured so that a part (e.g., an outer side) of a ground region <NUM> is removed, and a side plating member <NUM> is deployed in the removed region and a first keep-out region <NUM>. The side plating member <NUM> may cover three surfaces (e.g., upper, side, and back surfaces) of the interposer <NUM>. The side plating member <NUM> may be in a "⊏ " shape. According to another embodiment of the disclosure, the interposer <NUM> may be configured so that a part (e.g., an inner side) of the ground region <NUM> is removed, and the side plating member <NUM> is deployed in the removed region and a second keep-out region <NUM>. The first and second keep-out regions <NUM> and <NUM> may be regions in which an interconnect formed based on an error that is necessary for routing to cut an outline of the interposer <NUM> in a desired shape does not exist. Accordingly, after the routing, the side plating member <NUM> is formed in the first and second keep-out regions <NUM> and <NUM> through a separate addition process (e.g., drilling, copper plating, and gold plating in the first and second keep-out regions <NUM> and <NUM> of the side surface of the interposer <NUM> after the routing), and thus the existing unused space can be utilized. Through this, the width of the interposer <NUM> can be reduced as large as a part of the width of the removed ground region <NUM>.

According to an embodiment of the disclosure, the side plating members deployed on the outer side and the inner side of the interposer <NUM> may be deployed in parallel locations or may be deployed to cross each other in a zigzag shape.

According to an embodiment of the disclosure, the side plating member <NUM> may be integrally connected to the via <NUM>. For example, the side plating member <NUM> may be connected to the via <NUM> through the interconnect <NUM>. The side plating member <NUM> may be connected to the array antenna <NUM> illustrated in <FIG> and may operate as a part of the antenna. According to an embodiment of the disclosure, the side plating member <NUM> may be connected to the ground region <NUM> through an extension part extending from the ground region <NUM>. The side plating member <NUM> connected to the via <NUM> and the ground region <NUM> may serve as a shield member blocking noise input from an outside of the electronic device <NUM>.

Referring to <FIG>, an interposer <NUM> of an electronic device <NUM> according to various embodiments of the disclosure may include different vias (e.g., through via and stacked via) <NUM>. As compared with the above-described interposers in <FIG>, the interposer <NUM> illustrated in <FIG> may be configured so that a ground region <NUM> surrounding the via <NUM> is not formed. Through this, the width of the interposer <NUM> can be reduced as large as the removed ground region <NUM>.

According to an embodiment of the disclosure, if a signal of the electronic device <NUM> is at low speed or a margin of an impedance signal is wide, or if the height of the interposer <NUM> is low and thus impedance mismatch is within an error range, the ground region <NUM> can be deleted. If the ground region <NUM> is not formed in the interposer <NUM>, the interposer <NUM> may be made of a shield can or EMI molding material that is a shield structure.

According to an embodiment of the disclosure, if the ground region <NUM> is not formed in the interposer <NUM>, components deployed in an inner space of the interposer <NUM> or outside the interposer <NUM> may be shielded through shield can or EMI molding that is a shield structure, and may replace the noise shielding of the removed ground region <NUM>.

<FIG> is a view illustrating a configuration of an interposer, a via, and a side plating member of an electronic device according to various embodiments of the disclosure.

Referring to <FIG>, an interposer <NUM> of an electronic device <NUM> according to various embodiments of the disclosure may include different vias (e.g., through via and stacked via) deployed in a zigzag shape. According to an embodiment of the disclosure, the interposer <NUM> may have the different vias (e.g., through via and stacked via) deployed in a straight line. According to an embodiment of the disclosure, the interposer <NUM> may have the same vias (e.g., through vias or stacked vias) deployed in a zigzag shape. According to an embodiment of the disclosure, the interposer <NUM> may have the same vias (e.g., through vias or stacked vias) deployed in a straight line.

According to various embodiments of the disclosure, a plurality of side plating members <NUM> may be deployed in a zigzag shape in the interposer <NUM>. For example, the side plating member <NUM> formed on an outer side of the interposer <NUM> may block inflow of a noise signal from an outside of the electronic device <NUM>. The side plating member <NUM> formed on an inner side of the interposer <NUM> may block a noise signal output from the inside of the electronic device <NUM> (e.g., the first circuit board <NUM> and/or second circuit board <NUM>). Through this, the via <NUM> can be moved adjacent to the first and second keep-out regions <NUM> and <NUM>, and thus the width of the interposer <NUM> can be reduced. Further, since an opposite space occurring through the movement of the via <NUM> is secured as a space in which the side plating member <NUM> can be generated, it can also serve to shield the inner and outer portions of the interposer <NUM> as well as reducing the width of the interposer <NUM>.

<FIG> illustrate a configuration of a via, an interposer, and a first circuit board of an electronic device according to various embodiments of the disclosure.

<FIG> is a cross-sectional view of a via formed in an interposer according to various embodiments of the disclosure, and <FIG> is a cross-sectional view illustrating the configuration of a third conduction pad formed on a first circuit board (or second circuit board) according to various embodiments of the disclosure. <FIG> is a plan view illustrating the configuration of a third conduction pad formed on a first circuit board (or second circuit board) according to various embodiments of the disclosure.

Referring to <FIG>, an interposer <NUM> according to various embodiments of the disclosure may include a via (e.g., through via of <FIG>) <NUM>. The via <NUM> may include a hole <NUM>, a first pad <NUM>, and a second pad <NUM>.

The hole <NUM> may be formed to penetrate, for example, at least a part of the interposer <NUM> through a drill.

The first pad <NUM> (e.g., first pad <NUM> of <FIG>) and the second pad <NUM> (e.g., second pad <NUM> of <FIG>) may be formed to surround an outer side of the hole <NUM>. The first pad <NUM> may be exposed through a lower portion of the interposer <NUM>. The second pad <NUM> may be exposed through an upper portion of the interposer <NUM>. The first pad <NUM> and the second pad <NUM> may be composed of a copper film and a gold film. According to an embodiment of the disclosure, the first pad <NUM> may be electrically connected to a first connection terminal <NUM> deployed on a first circuit board <NUM>. The second pad <NUM> may be electrically connected to a second connection terminal <NUM> deployed on a second circuit board <NUM>.

Referring to <FIG> and <FIG>, on an upper portion of the first circuit board <NUM> according to various embodiments of the disclosure, a third pad <NUM> may be deployed to strengthen connectivity with the first pad <NUM> of the via <NUM> formed in the interposer <NUM>. The third pad <NUM> may be deployed in a location corresponding to the first pad <NUM> of the via <NUM>.

According to an embodiment of the disclosure, a non-plating region <NUM> may be included inside the third pad <NUM> deployed on the first circuit board <NUM>. The non-plating region <NUM> may be deployed in a location corresponding to the hole <NUM> of the via <NUM>. The area of the non-plating region <NUM> may be equal to or larger than the area of the hole <NUM> so that soldering liquid spread on the third pad <NUM> is prevented from flowing into the hole <NUM> of the via <NUM> during application of surface mount devices (SMD) or surface mount technology (SMT), which is the surface mount technology for connecting the first pad <NUM> of the interposer <NUM> and the third pad <NUM> of the first circuit board <NUM> to each other. According to an embodiment of the disclosure, the third pad <NUM> deployed on the first circuit board <NUM> may also be deployed on the second circuit board <NUM>.

Referring to <FIG>, an interposer <NUM> according to various embodiments of the disclosure may include a via (e.g., stacked via of <FIG>) <NUM>. The via <NUM> may include an inner via <NUM>, a first pad <NUM>, and a second pad <NUM>.

The inner via <NUM> may be formed to be smaller than the first pad <NUM> and/or the second pad <NUM> for high-speed signal movement.

The first pad <NUM> (e.g., first pad <NUM> of <FIG>) and the second pad <NUM> (e.g., second pad <NUM> of <FIG>) may close an upper portion and a lower portion of the inner via <NUM>. The first pad <NUM> may be exposed through a lower portion of the interposer <NUM>. The second pad <NUM> may be exposed through an upper portion of the interposer <NUM>. The first pad <NUM> and the second pad <NUM> may be composed of a copper film and a gold film. According to an embodiment of the disclosure, the first pad <NUM> may be electrically connected to a first connection terminal <NUM> deployed on a first circuit board <NUM>. The second pad <NUM> may be electrically connected to a second connection terminal <NUM> deployed on a second circuit board <NUM>.

Referring to <FIG> and <FIG>, on an upper portion of the first circuit board <NUM> according to various embodiments of the disclosure, a third pad <NUM> may be deployed to strengthen connectivity with the first pad <NUM> of the via <NUM> formed in the interposer <NUM>. The third pad <NUM> may be deployed in a location corresponding to the first pad <NUM> of the via <NUM>. According to an embodiment of the disclosure, the third pad <NUM> deployed on the first circuit board <NUM> may also be deployed on the second circuit board <NUM>.

<FIG> is a side view illustrating a configuration of an interposer and a side plating member of an electronic device according to various embodiments of the disclosure.

Referring to <FIG>, a side plating member <NUM> according to various embodiments of the disclosure may include a first surface (e.g., a lower surface) 305a, a second surface (e.g., a side surface) 305b, and a third surface (e.g., an upper surface) 305c. For example, the side plating member <NUM> may cover three surfaces (e.g., upper, side, and back surfaces) of the interposer <NUM>. The side plating member <NUM> may be in a "⊏ " shape.

According to an embodiment of the disclosure, the side plating member <NUM> formed on the interposer <NUM> may block inflow of a noise signal from an outside of the electronic device <NUM>. The side plating member <NUM> may block a noise signal output from the inside of the electronic device <NUM> (e.g., the first circuit board <NUM> and/or second circuit board <NUM>). According to an embodiment of the disclosure, the side plating member <NUM> may be connected to the array antenna <NUM> illustrated in <FIG> and may operate as a part of the antenna.

<FIG> is a view illustrating a configuration of a via of an electronic device according to various embodiments of the disclosure.

Referring to <FIG>, an interposer <NUM> according to various embodiments of the disclosure may include an inner via <NUM>, an interconnect <NUM>, and a plating pad <NUM>. Unlike the via (e.g., stacked via) <NUM> illustrated in <FIG>, the inner via <NUM> and the plating pad <NUM> may be formed in different regions of the interposer <NUM>. In this case, the inner via <NUM> and the plating pad <NUM> may be connected to each other using the interconnect <NUM>. The inner via <NUM> may be SR-processed so as not to be exposed to an outside, and may exist to be separated from the ground region <NUM>. Through this, in order to electrically connect the first circuit board <NUM> and the second circuit board <NUM> to each other, various types of interconnects may exist in the interposer <NUM> in addition to the vias directly connected to each other in a straight line, and thus flexibility of the interconnects can be heightened.

Claim 1:
A portable communication device comprising:
a first printed circuit board, PCB, (<NUM>) having a first connection terminal formed thereon;
a first electronic component connected to the first connection terminal and disposed on the first PCB;
a second PCB (<NUM>) disposed over or under the first PCB having a second connection terminal formed thereon;
a second electronic component connected to the second connection terminal and disposed on the second PCB; and
an interposer (<NUM>) disposed between the first PCB and the second PCB such that the first PCB, the second PCB and the interposer form an inner space together, the interposer including:
a first surface facing the first PCB;
a second surface facing the second PCB; and
a plurality of vias (<NUM>) disposed in the interposer and electrically connecting the first PCB and the second PCB to each other, the plurality of vias including a first via and a second via spaced apart from each other;
a first end portion of the first via being electrically connected to the first connection terminal (<NUM>) and a second end portion of the first via being electrically connected to the second connection terminal (<NUM>); and
a ground region (<NUM>) disposed on the second surface, the ground region including a first portion and a second portion, wherein the second end portion of the first via is surrounded by the first portion, and an end portion of the second via exposed at the second surface is surrounded by the second portion, and
wherein a plating pad (<NUM>) of the second via is disposed on the second surface and electrically connected with the second portion of the ground region (<NUM>) via an interconnect (<NUM>).