Patent Description:
Power semiconductor module arrangements often include a base plate within a housing. At least one substrate is arranged on the base plate. A semiconductor arrangement including a plurality of controllable semiconductor elements (e.g., two IGBTs in a half-bridge configuration) is arranged on each of the at least one substrate. Each substrate usually comprises a substrate layer (e.g., a ceramic layer), a first metallization layer deposited on a first side of the substrate layer and a second metallization layer deposited on a second side of the substrate layer. The controllable semiconductor elements are mounted, for example, on the first metallization layer. The second metallization layer is usually attached to the base plate by means of a solder layer or a sintering layer. When mounting the at least one substrate to the base plate, e.g., by soldering or sintering techniques, the substrates are under the influence of high temperatures, wherein the temperatures usually lie at about <NUM> or more, sometimes even at about <NUM> and more. The at least one substrate, the connection layer (e.g., solder layer), and the base plate usually have different CTEs (coefficients of thermal expansion). When heating, and subsequently cooling the different components during the assembly process, the difference between the CTEs of the different materials (e.g., copper, ceramic, solder) leads to a deformation of the base plate, usually a concave deflection in the direction of the surface on which the substrates are mounted.

When mounting the base plate to a heat sink, a connection layer (e.g., thermal interface material) is arranged between the base plate and the heat sink. Such a connection layer usually completely fills the space between the base plate and the heat sink and therefore has a non-uniform thickness because of the deflection of the base plate. The connection layer often has poor heat conducting properties as compared to the substrate and the base plate. Therefore, the thickness of the connection layer greatly influences the heat conduction as well as other parameters (the thicker the connection layer, the poorer the heat conduction). During the assembly of the semiconductor module arrangement, however, the base plate may locally expand or contract which may lead to local deflections in the areas below the substrates. This may result in unwanted cavities or voids between the base plate and the heat sink that are not filled with the material of the connection layer (e.g., thermal paste) at all. In other areas, the connection layer may be too thick to still provide sufficient heat conducting properties. This negatively influences the heat dissipation from the base plate to the heat sink. Document <CIT> discloses a power semiconductor module having a bottom plate and a circuit carrier. The bottom plate has an upper side, a lower side, and a recess embossed in the bottom plate, which extends from the upper side into the bottom plate. The circuit carrier is arranged above the recess on the upper side of the bottom plate, so that the recess is located completely or at least partially between the circuit carrier and the bottom of the bottom plate. Document <CIT> discloses a composite member including a substrate formed of a composite material which contains metal and nonmetal, the substrate being provided with: a large warpage portion which is provided on one side of the substrate and has a spherical warpage having a curvature radius; and a small warpage portion which is partially provided on the large warpage portion and has a warpage different in size from the curvature radius, wherein the curvature radius is <NUM>-<NUM>, the thermal conductivity of the substrate is <NUM> W/m·K or more, and the linear expansion coefficient of the substrate is <NUM> ppm/K or less.

There is a need for a base plate that avoids the drawbacks mentioned above as well as others and which allows to produce power semiconductor module arrangements with an increased performance and reliability, and for a method for producing such a base plate.

A method includes producing a base plate, wherein producing the base plate comprises forming a layer of a metallic material, and forming at least one first area in the layer of metallic material, wherein forming the at least one first area comprises locally inducing stress into the layer of metallic material such that a local stress in the at least one first area differs from a local stress of those areas of the metallic layer surrounding the at least one first area. Locally increasing the stress in the metallic layer comprises increasing a yield strength in the at least one first area as compared to surrounding areas of the metallic layer, wherein a yield strength of the areas surrounding the at least one first area is between 100MPa and 300MPa and a yield strength of the at least one first area is increased by between <NUM>% and <NUM>% of the yield strength of the areas surrounding the at least one first area.

A base plate for a power semiconductor module includes a layer of a metallic material, and at least one first area formed in the layer of metallic material in which a yield strength is locally increased in the layer of metallic material such that a yield strength in the at least one first area differs from a yield strength of those areas of the metallic layer surrounding the at least one first area. A yield strength of the areas surrounding the at least one first area is between 100MPa and 300MPa and a yield strength of the at least one first area is increased by between <NUM>% and <NUM>% of the yield strength of the areas surrounding the at least one first area.

An arrangement includes a base plate, and at least one substrate mounted on the base plate, wherein each of the at least one substrate includes a dielectric insulation layer and a first metallization layer attached to the dielectric insulation layer, and the base includes a layer of a metallic material, and at least one first area formed in the layer of metallic material in which a yield strength is locally increased in the layer of metallic material such that a yield strength in the at least one first area differs from a yield strength of those areas of the metallic layer surrounding the at least one first area. A yield strength of the areas surrounding the at least one first area is between 100MPa and 300MPa and a yield strength of the at least one first area is increased by between <NUM>% and <NUM>% of the yield strength of the areas surrounding the at least one first area.

In the following detailed description, reference is made to the accompanying drawings. The drawings show specific examples in which the invention may be practiced. It is to be understood that the features and principles described with respect to the various examples may be combined with each other, unless specifically noted otherwise. In the description as well as in the claims, designations of certain elements as "first element", "second element", "third element" etc. are not to be understood as enumerative. Instead, such designations serve solely to address different "elements". That is, e.g., the existence of a "third element" does not necessarily require the existence of a "first element" and a "second element". An electrical line or electrical connection as described herein may be a single electrically conductive element, or include at least two individual electrically conductive elements connected in series and/or parallel. Electrical lines and electrical connections may include metal and/or semiconductor material, and may be permanently electrically conductive (i.e., non-switchable). A semiconductor body as described herein may be made from (doped) semiconductor material and may be a semiconductor chip or be included in a semiconductor chip. A semiconductor body has electrically connectable pads and includes at least one semiconductor element with electrodes.

Referring to <FIG>, a cross-sectional view of a power semiconductor module arrangement <NUM> is illustrated. The power semiconductor module arrangement <NUM> includes a housing <NUM> and a substrate <NUM>. The substrate <NUM> includes a dielectric insulation layer <NUM>, a (structured) first metallization layer <NUM> attached to the dielectric insulation layer <NUM>, and a (structured) second metallization layer <NUM> attached to the dielectric insulation layer <NUM>. The dielectric insulation layer <NUM> is disposed between the first and second metallization layers <NUM>, <NUM>.

Each of the first and second metallization layers <NUM>, <NUM> may consist of or include one of the following materials: copper; a copper alloy; aluminum; an aluminum alloy; any other metal or alloy that remains solid during the operation of the power semiconductor module arrangement. The substrate <NUM> may be a ceramic substrate, that is, a substrate in which the dielectric insulation layer <NUM> is a ceramic, e.g., a thin ceramic layer. The ceramic may consist of or include one of the following materials: aluminum oxide; aluminum nitride; zirconium oxide; silicon nitride; boron nitride; or any other dielectric ceramic. Alternatively, the dielectric insulation layer <NUM> may consist of an organic compound and include one or more of the following materials: Al<NUM>O<NUM>, AlN, SiC, BeO, BN, or Si<NUM>N<NUM>. For instance, the substrate <NUM> may, e.g., be a Direct Copper Bonding (DCB) substrate, a Direct Aluminum Bonding (DAB) substrate, or an Active Metal Brazing (AMB) substrate. Further, the substrate <NUM> may be an Insulated Metal Substrate (IMS). An Insulated Metal Substrate generally comprises a dielectric insulation layer <NUM> comprising (filled) materials such as epoxy resin or polyimide, for example. The material of the dielectric insulation layer <NUM> may be filled with ceramic particles, for example. Such particles may comprise, e.g., Si<NUM>O, Al<NUM>O<NUM>, AlN, SiN or BN and may have a diameter of between about <NUM> and about <NUM>. The substrate <NUM> may also be a conventional printed circuit board (PCB) having a non-ceramic dielectric insulation layer <NUM>. For instance, a non-ceramic dielectric insulation layer <NUM> may consist of or include a cured resin.

The substrate <NUM> is arranged in a housing <NUM>. In the example illustrated in <FIG>, the substrate <NUM> is arranged on a base plate <NUM> which forms a base surface of the housing <NUM>, while the housing <NUM> itself solely comprises sidewalls and a cover. In some power semiconductor module arrangements <NUM>, more than one substrate <NUM> is arranged on the same base plate <NUM> and within the same housing <NUM>. The base plate <NUM> may comprise a layer of a metallic material such as, e.g., copper or AlSiC. Other materials, however, are also possible.

One or more semiconductor bodies <NUM> may be arranged on the at least one substrate <NUM>. Each of the semiconductor bodies <NUM> arranged on the at least one substrate <NUM> may include a diode, an IGBT (Insulated-Gate Bipolar Transistor), a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), a JFET (Junction Field-Effect Transistor), a HEMT (High-Electron-Mobility Transistor), or any other suitable semiconductor element.

The one or more semiconductor bodies <NUM> may form a semiconductor arrangement on the substrate <NUM>. In <FIG>, only two semiconductor bodies <NUM> are exemplarily illustrated. The second metallization layer <NUM> of the substrate <NUM> in <FIG> is a continuous layer. According to another example, the second metallization layer <NUM> may be a structured layer. According to other examples, the second metallization layer <NUM> may be omitted altogether. The first metallization layer <NUM> is a structured layer in the example illustrated in <FIG>. "Structured layer" in this context means that the respective metallization layer is not a continuous layer, but includes recesses between different sections of the layer. Such recesses are schematically illustrated in <FIG>. The first metallization layer <NUM> in this example includes three different sections. Different semiconductor bodies <NUM> may be mounted to the same or to different sections of the first metallization layer <NUM>. Different sections of the first metallization layer may have no electrical connection or may be electrically connected to one or more other sections using electrical connections <NUM> such as, e.g., bonding wires. Semiconductor bodies <NUM> may be electrically connected to each other or to the first metallization layer <NUM> using electrical connections <NUM>, for example. Electrical connections <NUM>, instead of bonding wires, may also include bonding ribbons, connection plates or conductor rails, for example, to name just a few examples. The one or more semiconductor bodies <NUM> may be electrically and mechanically connected to the substrate <NUM> by an electrically conductive connection layer <NUM>. Such an electrically conductive connection layer <NUM> may be a solder layer, a layer of an electrically conductive adhesive, or a layer of a sintered metal powder, e.g., a sintered silver (Ag) powder, for example.

The power semiconductor module arrangement <NUM> illustrated in <FIG> further includes terminal elements <NUM>. The terminal elements <NUM> are electrically connected to the first metallization layer <NUM> and provide an electrical connection between the inside and the outside of the housing <NUM>. The terminal elements <NUM> may be electrically connected to the first metallization layer <NUM> with a first end, while a second end <NUM> of the terminal elements <NUM> protrudes out of the housing <NUM>. The terminal elements <NUM> may be electrically contacted from the outside at their second end <NUM>. Such terminal elements <NUM>, however, are only an example. The components inside the housing <NUM> may be electrically contacted from outside the housing <NUM> in any other suitable way. For example, terminal elements <NUM> may be arranged closer to or adjacent to the sidewalls of the housing <NUM>. It is also possible that terminal elements <NUM> protrude vertically or horizontally through the sidewalls of the housing <NUM>. It is even possible that terminal elements <NUM> protrude through a ground surface of the housing <NUM>. The first end of a terminal element <NUM> may be electrically and mechanically connected to the substrate <NUM> by an electrically conductive connection layer, for example (not explicitly illustrated in <FIG>). Such an electrically conductive connection layer may be a solder layer, a layer of an electrically conductive adhesive, or a layer of a sintered metal powder, e.g., a sintered silver (Ag) powder, for example. The first end of a terminal element <NUM> may also be electrically coupled to the substrate <NUM> via one or more electrical connections <NUM>, for example.

The power semiconductor module arrangement <NUM> may further include an encapsulant <NUM>. The encapsulant <NUM> may consist of or include a silicone gel or may be a rigid molding compound, for example. The encapsulant <NUM> may at least partly fill the interior of the housing <NUM>, thereby covering the components and electrical connections that are arranged on the substrate <NUM>. The terminal elements <NUM> may be partly embedded in the encapsulant <NUM>. At least their second ends <NUM>, however, are not covered by the encapsulant <NUM> and protrude from the encapsulant <NUM> through the housing <NUM> to the outside of the housing <NUM>. The encapsulant <NUM> is configured to protect the components and electrical connections of the power semiconductor module <NUM>, in particular the components arranged inside the housing <NUM>, from certain environmental conditions and mechanical damage. It is generally also possible to omit the housing <NUM> and solely protect the substrate <NUM> and any components mounted thereon with an encapsulant <NUM>. In this case, the encapsulant <NUM> may be a rigid material, for example.

At least some semiconductor bodies <NUM> of the power semiconductor module arrangement <NUM> generally perform a plurality of switching operations during the operation of the power semiconductor module arrangement <NUM>. When performing many switching operations within a short period of time, for example, the semiconductor bodies <NUM> generate heat which, in the worst case, may rise to a temperature above a certain maximum threshold. Temperatures above such a maximum threshold may adversely affect the operation of the power semiconductor module, or even lead to the total failure of one or more semiconductor dies <NUM>. Heat generated during the operation of the power semiconductor module arrangement <NUM> is usually dissipated from the substrate <NUM> through the base plate <NUM> to a heat sink (not specifically illustrated in <FIG>). This will be explained in further detail with respect to <FIG> below.

Now referring to <FIG>, a process of mounting a substrate <NUM> on a base plate <NUM> is schematically illustrated. The substrate <NUM> may be mechanically connected to the base plate <NUM> by a heat-conducting connection layer <NUM>. That is, referring to <FIG>, a heat-conducting connection layer <NUM> may be arranged between the substrate <NUM> and the base plate <NUM>. The heat-conducting connection layer <NUM> that is applied between the substrate <NUM> and the base plate <NUM> may be a metallic solder layer or a sintered layer, for example. These, however, are only examples. The heat-conducting connection layer <NUM> may comprise any other suitable heat conducting material that is suitable to form a mechanical connection between the substrate <NUM> and the base plate <NUM>. When the substrate <NUM> is mounted on the base plate <NUM> (at least one semiconductor body <NUM> may already be mounted on the substrate <NUM> at this stage), the substrate <NUM> is pressed onto the base plate <NUM> under the influence of high temperatures. This is schematically illustrated in <FIG>. During this process, the substrate <NUM> and the base plate <NUM> may be distorted. This is, because the semiconductor body <NUM>, the substrate <NUM>, the connection layer <NUM> and the base plate <NUM> each comprise different materials. The different materials have different CTEs (coefficients of thermal expansion). Therefore, under the influence of high temperatures each of the components expands to a different extent, which is indicated with the different arrows in <FIG>. The components are subsequently cooled down again, which results in a contraction of the different materials (indicated with the different arrows in <FIG>). The extent of the contraction also depends on the CTE of the materials. Therefore, after mounting a substrate <NUM> on the base plate <NUM>, the base plate <NUM> often has a concave deflection in the direction of the surface on which the substrate <NUM> is mounted. This is schematically illustrated in <FIG>. The base plate <NUM> may be deflected in one direction in space only. However, as is schematically illustrated in <FIG>, the base plate <NUM> may also be deflected in two directions in space, resulting in a cushion-shape or shell-like shape of the base plate <NUM>. The deflection of the base plate <NUM> or, in other words, the deviation from its original (essentially plane/flat) form, may be, e.g., between about <NUM> and about <NUM> or even more (the deviation corresponds to the difference in height between the edges and the center of the base plate <NUM>). In order to compensate the resulting deflection, base plates <NUM> are often pre-bent (before mounting the substrate <NUM> on the base plate <NUM>) in a direction opposite to the direction of the resulting deflection.

In a power semiconductor module, one or more substrates <NUM> are usually arranged on a single base plate <NUM>. The base plate <NUM> may have a thickness of between about <NUM> and about <NUM>, for example. The base plate <NUM>, however, may also be thinner than <NUM> or thicker than <NUM>. The base plate <NUM> may comprise a layer consisting of or including a metal or a metal matrix composite material (e.g., metal matrix composite MMC such as aluminum silicon carbide), for example. Suitable materials for a metal base plate <NUM> are, for example, copper, a copper alloy, aluminum, or an aluminum alloy. The base plate <NUM> may be coated by a thin coating layer (not illustrated). Such a coating layer may consist of or include nickel, silver, gold, or palladium, for example. The coating layer is optional and may improve the solderability of the base plate <NUM>.

A plurality of substrates <NUM> that is mounted on a base plate <NUM> is exemplarily illustrated in <FIG>. In particular, <FIG> schematically illustrates the base plate <NUM> after soldering the substrates <NUM> to the base plate <NUM> (corresponds to the state of the substrate <NUM> and base plate <NUM> as illustrated in <FIG>). During operation of the semiconductor module arrangement, heat is generated by the semiconductor bodies <NUM> (semiconductor bodies <NUM> not specifically illustrated in <FIG>) which is transferred to the substrates <NUM> and further to the base plate <NUM>. The temperatures are usually considerably higher in areas of the base plate <NUM> arranged directly below the substrates <NUM> than in areas of the base plate <NUM> arranged in between the substrates <NUM>. The base plate <NUM>, therefore, is heated unevenly. When heating the base plate <NUM> during operation of the semiconductor arrangement, it may deform even further. Due to the uneven heating of the base plate <NUM> in addition to the different CTEs of the different components (CTE mismatch), some areas of the base plate <NUM> deform more than others. This is exemplarily illustrated in <FIG>. The base plate <NUM> illustrated in <FIG>, in addition to the overall concave deflection, shows a plurality of local deflections below the different substrates <NUM>. These local deflections may be convex deflections in the direction of the surface on which the substrates <NUM> are mounted.

<FIG> schematically illustrates a top view of the base plate <NUM> and substrates <NUM> of <FIG>, while <FIG> schematically illustrates a cross-sectional view of the base plate <NUM> in a different horizontal direction (section plane B - B') than <FIG> (section plane A - A'). <FIG> schematically illustrates the base plate <NUM> of <FIG> which is mounted on a heat sink <NUM>. As can be seen, due to the local deflections the base plate <NUM> may be in direct contact with the heat sink <NUM> only in some areas. In other areas, unwanted cavities or voids may form between the base plate <NUM> and the heat sink <NUM>. As the cavities or voids are mainly formed directly below the substrates <NUM> where most of the heat is generated, the heat dissipation from the base plate <NUM> to the heat sink <NUM> is greatly deteriorated.

In order to reduce or even prevent such local cavities or voids from forming when mounting the substrates <NUM> on the base plate <NUM> or, possibly, also during the operation of the power semiconductor module arrangement, a base plate <NUM> according to one example comprises at least one area of increased local stress. This is exemplarily illustrated in the cross-sectional view of <FIG> schematically illustrates a cross-sectional view of a base plate <NUM>. A first tool <NUM> is used to create an area of increased stress in the base plate <NUM>. In particular, the first tool <NUM> exerts pressure onto the base plate <NUM> in a desired area. In this way, the material of the base plate <NUM> is locally compressed and the stiffness of the base plate <NUM>, therefore, is locally increased. At the same time, the base plate <NUM> may be locally deformed. In particular, a local concave deformation is formed in the base plate <NUM> in the direction of the surface on which the substrate <NUM> is mounted (substrate not specifically illustrated in <FIG>).

In this way, a yield strength of the base plate <NUM> may be locally increased. The yield strength of the base plate <NUM> in its normal state may generally be between <NUM> and <NUM> MPa, for example. This yield strength may be locally increased by between <NUM>% and <NUM>% of the yield strength of the base plate <NUM> in the normal state, for example. Usually, within the area of increased yield strength, the yield strength is increased differently for different sections A, B, C. For example, in a first section A near the edge of the area of increased yield strength, the yield strength may be between <NUM> and <NUM> MPa, for example. In a second section B arranged adjacent to the first section A, the yield strength may be between <NUM> and <NUM> MPa, for example. In a third section C arranged at the center of the area of increased yield strength, the yield strength may be between <NUM> and <NUM> MPa, for example. This is, because the first tool <NUM> may not be able to create the same yield strength within the whole area of increased yield strength. In the Figures, three different sections A, B, C are exemplarily illustrated. This, however, is only an example. The number of sections A, B, C, for example, may depend on the kind and form of the first tool <NUM> that is used to form the area of increased yield strength, on the size of the area of increased yield strength, on the maximum value of increased yield strength, or on any other parameters relevant for the formation of the area of increased yield strength. The transitions between the different sections may be fluent and not strictly defined.

The area of increased stress with the different sections A, B, C of increased stress is also schematically illustrated in the top views of <FIG>. The first tool <NUM>, and therefore the resulting area of increased stress may have an angular (e.g., square or rectangular, <FIG>), oval (<FIG>) or rounded (not specifically illustrated) cross-section, for example. Other shapes, however, are also possible.

The number of areas of increased stress or yield strength on a base plate <NUM> may depend on the number of substrates <NUM> mounted to the base plate <NUM>. If only one substrate <NUM> is to be mounted to the base plate <NUM>, one area of increased stress or yield strength may be formed in the base plate <NUM>. If more than one substrate <NUM> is to be mounted to a single base plate <NUM>, the number of areas of increased stress or yield strength may correspond to the number of substrates <NUM> that are to be mounted to the base plate <NUM>. A base plate <NUM> with a plurality of areas of increased stress or yield strength is schematically illustrated in the top view of <FIG>. In this example, six areas of increased stress or yield strength are formed in the base plate <NUM>.

When forming an area of increased stress in the base plate <NUM>, the Young's modulus (also referred to as e-module) may also be increased in this area. The Young's modulus is a mechanical property that measures the stiffness of a solid material. That is, by increasing the Young's modulus, the stiffness of the base plate <NUM> is locally increased. By increasing the yield strength and the stiffness, the deformation of the base plate <NUM> when mounting the substrates <NUM> on the base plate <NUM> is significantly reduced. This is schematically illustrated in <FIG>. Firstly, an overall deflection (as exemplarily illustrated in <FIG>) may be reduced significantly. In this context, <FIG> schematically illustrates a base plate <NUM> that has a comparably severe or heavy bow, and <FIG> schematically illustrates a base plate <NUM> having a reduced bow as compared to the base plate <NUM> of <FIG>. The base plate <NUM> illustrated in <FIG> is a base plate <NUM> without an area of increased stress, while the base plate <NUM> illustrated in <FIG> comprises a plurality of areas of increased stress (illustrated in dashed lines in <FIG>). Further, and as is schematically illustrated in <FIG> (cross-sectional view in a section plane C - C', see <FIG>), the formation of local deformations of the base plate <NUM> below the substrates <NUM> during the process of mounting the substrates <NUM> to the base plate <NUM> is greatly reduced as compared to the conventional arrangement as illustrated in <FIG>. Even further, while in the conventional arrangement the local deflections may be convex deflections in the direction of the surface on which the substrates <NUM> are mounted (base plate <NUM> is hollow below substrates <NUM>), the local deflections in the example illustrated in <FIG> are concave deflections in the direction of the surface on which the substrates <NUM> are mounted (base plate <NUM> is crowned below substrates <NUM>). This results from the local deformations introduced in the base plate <NUM> during the formation of the areas of increased stress (see, e.g., <FIG>). Even further, the direction of the deflection may be reversed as compared to the arrangement of <FIG>. In this way, the contact between those areas of the base plate <NUM> arranged below the substrates <NUM> and the heat sink <NUM> is significantly increased. In particular, the contact between those areas of the base plate <NUM> arranged below the central regions of the substrates <NUM> where the semiconductor bodies <NUM> are usually mounted and the heat sink <NUM> is significantly increased.

The local deflections below the substrates <NUM> are generally small enough in order not to result in large cavities. That is, the comparably small cavities that are formed between the base plate <NUM> and the heat sink <NUM> may be completely filled with heat conducting material which significantly increases the heat dissipation from the base plate <NUM> to the heat sink <NUM>. Even further, as the local deflections of the base plate <NUM> are significantly reduced, the contact area between the base plate <NUM> and the heat sink <NUM> increases. A direct contact between the base plate <NUM> and the heat sink <NUM> may be primarily provided in such areas that are arranged centrally below the substrates <NUM>. This helps to further increase the overall heat dissipation, as the central areas of the substrates <NUM> are usually the areas where most heat is generated. Therefore, the heat conduction between the substrates <NUM> and the base plate <NUM> as well as between the base plate <NUM> and the heat sink <NUM> is satisfactory. <FIG>, similar to <FIG>, schematically illustrates a cross-section of the base plate <NUM> of <FIG> in a section plane D - D', while <FIG> illustrates the base plate <NUM> in a section plane C - C'. <FIG> illustrates the base plate <NUM> of <FIG> that is mounted on a heat sink <NUM>.

In addition to reducing the local deflections (local bow) below the substrates <NUM>, the overall concave deflection of the base plate <NUM> may also be reduced. The areas of increased stress are generally formed before mounting the substrates <NUM> to the base plate <NUM>. For example, the areas of increased stress may be formed during or immediately after production of the base plate <NUM>. When mounting the substrates <NUM> to the base plate <NUM> after forming such areas of increased stress, the base plate <NUM> deforms to a significantly lower degree while mounting the substrates <NUM> to the base plate <NUM>. This also adds to an increase of the thermal coupling between the base pate <NUM> and the heat sink <NUM>.

The cross-sectional area of an area of increased stress is generally smaller than the cross-sectional area of the base plate <NUM>. That is, there are areas of the base plate <NUM> surrounding the areas of increased stress in which the properties of the base plate <NUM> are substantially unaltered. A stress induced in the areas of increased stress is higher than a basic stress in the surrounding areas of the base plate <NUM>. A yield strength in the areas of increased stress is higher than a yield strength in those areas of the base plate <NUM> surrounding the areas of increased stress. Further, no or no significant deflection is induced in those areas of the base plate <NUM> surrounding the areas of increased stress.

The cross-sectional area of an area of increased stress may be smaller than the cross-sectional area of the substrate <NUM> that is mounted on the respective section of increased stress. That is, an area of increased stress may be completely covered by a substrate <NUM> mounted thereon. It is, however, also possible that the cross-sectional area of an area of increased stress is larger than the cross-sectional area of the substrate <NUM> that is mounted thereon. According to one example, the cross-sectional area of an area of increased stress may be up to <NUM>% smaller or larger than the cross-sectional area of the substrate <NUM> that is mounted on the respective section of increased stress. Other sizes of the areas of increased stress, however, are also possible. If more than one area of increased stress is formed in a single base plate <NUM>, such areas of increased stress may be formed at a certain distance from each other. That is, one area of increased stress may not directly contact any of the other areas of increased stress. It is, however, also possible that different areas of increased stress directly adjoin each other.

The dimension of the local deflection below a substrate <NUM> may depend on the kind of first tool <NUM> that is used to form the deflection. A depth Δd of a local deflection (deviation from its original flat position, see <FIG>) may be between <NUM> to <NUM>, for example. The size (cross-sectional area) of the local deflection or area of increased stress may depend on the size and shape of the first tool <NUM> used to form the deflection. Different exemplary geometries of a first tool <NUM> are exemplarily illustrated in <FIG>. The first tool <NUM> illustrated in <FIG> generally has a flat underside with rounded edges towards its sides. The first tool <NUM> illustrated in <FIG> generally has a flat underside with comparably sharp edges towards its sides. The first tool <NUM> illustrated in <FIG> has a generally triangular shape. Other geometries of the first tool <NUM>, however, are generally also possible, resulting in different sizes and shapes of the areas of increased stress.

Now referring to <FIG>, a first tool <NUM> is schematically illustrated that is configured to simultaneously form a plurality of areas of increased stress in a base plate <NUM>. The first tool <NUM> comprises a main body and a plurality of stamping tools <NUM> extending from the main body. The first tool <NUM> may be pressed onto a base plate <NUM> such that the plurality of stamping tools <NUM> contact the base plate <NUM>. Each stamping tool <NUM> may have a geometry similar to the geometries that have been explained with respect to <FIG>.

The first tool <NUM> as described herein, however, is only an example. Generally it is possible to form an area of increased stress in any other suitable way. For example, laser welding techniques, piezo-peening techniques, coining techniques, bending techniques, or cold forging techniques may also be used to form areas of increased stress in the base plate <NUM>, to name just a few examples.

In the examples described above, an area of increased stress and, at the same time, a local deflection are formed in the base plate <NUM>. This, however, is only an example. Generally, it is also possible to only form a local deflection as described above in the base plate <NUM>, without locally increasing the stress though. Solely forming a local deflection below each of the at least one substrate <NUM> may be enough to reduce the negative effects as described with respect to <FIG> above. The locally formed concave deflections may counteract the formation of the local convex deflection as described with respect to <FIG> above, even without additionally forming areas of increased stress, yield strength and stiffness below each of the at least one substrate <NUM>. Therefore, forming concave deflections below the substrates <NUM> may be sufficient for some applications.

On the other hand, it is also possible to form areas of increased stress below the substrates <NUM>, without locally deforming the base plate <NUM>. This may also be sufficient for some applications. For other applications it may be beneficial to both form local deflections as well as areas of increased stress below the substrates <NUM> as described above. Forming both local deflections as well as areas of increased stress below the substrates <NUM> may be beneficial, for example, if the base plate <NUM> and substrates <NUM> are comparably large.

Claim 1:
A method comprising:
producing a base plate (<NUM>), wherein producing the base plate (<NUM>) comprises forming a layer of a metallic material; and
forming at least one first area in the layer of metallic material, wherein forming the at least one first area comprises locally inducing stress into the layer of metallic material such that a local stress in the at least one first area differs from a local stress of those areas of the metallic layer surrounding the at least one first area, wherein
locally increasing the stress in the metallic layer comprises increasing a yield strength in the at least one first area as compared to surrounding areas of the metallic layer, characterized in that
a yield strength of the areas surrounding the at least one first area is between 100MPa and 300MPa and a yield strength of the at least one first area is increased by between <NUM>% and <NUM>% of the yield strength of the areas surrounding the at least one first area.