Patent Description:
A signal processing apparatus for an encoder such as described in <CIT> is given as an example of a known conventional signal processing apparatus for an encoder. In the signal processing apparatus for an encoder described in <CIT>, an encoder connected to a rotary shaft outputs two-phase output signals having mutually different phases one pulse per revolution of the rotary shaft as shown in <FIG>. The number of revolutions of the rotary shaft can be counted, by inputting these two-phase output signals to a multi-turn counter. The <CIT> also discloses an encoder.

However, there is a problem with the signal processing apparatus for an encoder described in <CIT> in that, when an anomaly occurs in the encoder output signals and the phase output signal of one of the encoder output signals is fixed at H or L, this anomaly cannot be detected.

This invention was made to solve such a problem, and an object thereof is to provide a signal processing apparatus for an encoder that is able to detect anomalies in encoder output signals when such anomalies occur in the encoder output signals, and a method of generating multi-turn data of an encoder.

In order to solve the above problem, a signal processing apparatus for an encoder according to this invention includes an encoder configured to output multiphase output signals of at least three phases one pulse per revolution of a rotary shaft, at least three multi-turn counters configured to respectively receive input of different combinations of output signals of two phases out of the multiphase output signals, and respectively output counter values based on the output signals of two phases, and a comparison unit configured to receive input of the counter values and compare the counter values.

Also, the comparison unit may output a non-matching counter values alarm if the counter values do not match.

Also, the signal processing apparatus further includes a signal monitoring unit configured to monitor the multiphase output signals, and, if the phase output signals of the multiphase output signals are square waves capable of taking two types of values H and L, and the phase output signals of the multiphase output signals are all H at the same time or the phase output signals of the multiphase output signals are all L at the same time, the signal monitoring unit may output a signal anomaly alarm.

Also, the multiphase output signals output by the encoder consists of a first phase output signal, a second phase output signal and a third phase output signal, the multi-turn counters consist of a first multi-turn counter, a second multi-turn counter and a third multi-turn counter, the first multi-turn counter outputs a first counter value based on the first phase output signal and the second phase output signal, the second multi-turn counter outputs a second counter value based on the first phase output signal and the third phase output signal, and the third multi-turn counter outputs a third counter value based on the second phase output signal and the third phase output signal.

Also, either the first phase output signal, the second phase output signal and the third phase output signal have a phase difference of <NUM> degrees from each other, or the first phase output signal and the second phase output signal have a phase difference of <NUM> degrees, the first phase output signal and the third phase output signal have a phase difference of <NUM> degrees, and the second phase output signal and the third phase output signal have a phase difference of <NUM> degrees.

Also, in order to solve the above problem, a method of generating multi-turn data of an encoder according to this invention includes outputting multiphase output signals of at least three phases one pulse per revolution of a rotation angle of a rotary shaft with use of an encoder, respectively counting different combinations of output signals of two phases out of the multiphase output signals and outputting counter values with use of at least three multi-turn counters, and comparing the counter values with use of a comparison unit.

A signal processing device for an encoder according to this invention includes an encoder configured to output multiphase output signals of at least three phases one pulse per revolution of a rotary shaft, at least three multi-turn counters configured to respectively receive input of different combinations of output signals of two phases having different phases out of the multiphase output signals, and respectively output counter values based on the output signals of two phases, and a comparison unit configured to receive input of the counter values and compare the counter values, thus enabling anomalies in the encoder output signals to be detected when such anomalies occur in the encoder output signals.

Also, a method of generating multi-turn data of an encoder according to the present invention includes outputting multiphase output signals of at least three phases one pulse per revolution of a rotation angle of a rotary shaft with use of an encoder, respectively counting different combinations of output signals of two phases out of the multiphase output signals and outputting counter values with use of at least three multi-turn counters, and comparing the counter values with use of a comparison unit, thus enabling anomalies in the encoder output signals to be detected when such anomalies occur in the encoder output signals.

Hereinafter, a signal processing apparatus for an encoder according to Embodiment <NUM> of the present invention will be described based on the accompanying drawings.

<FIG> is a schematic view showing a signal processing apparatus for an encoder of Embodiment <NUM>. A signal processing apparatus <NUM> is provided with an encoder <NUM> which is a known optical rotary encoder. The encoder <NUM> is connected to a rotary shaft <NUM> of a rotary electrical machine <NUM>, and detects the number of revolutions and rotation direction of the rotary shaft <NUM>. Also, the encoder <NUM> has a waveform shaping circuit (not shown), and outputs output signals of three phases, namely, a first phase output signal S1, a second phase output signal S2 and a third phase output signal S3, via the waveform shaping circuit.

Also, the signal processing apparatus <NUM> is provided with a first multi-turn counter <NUM>, a second multi-turn counter <NUM> and a third multi-turn counter <NUM> for counting the output signals of the encoder <NUM>. The first phase output signal S1 and the second phase output signal S2 of the encoder <NUM> are input to the first multi-turn counter <NUM>. The first phase output signal S1 and the third phase output signal S3 of the encoder <NUM> are input to the second multi-turn counter <NUM>. The second phase output signal S2 and the third phase output signal S3 of the encoder <NUM> are input to the third multi-turn counter <NUM>.

Also, the signal processing apparatus <NUM> is provided with a comparison unit <NUM> that is connected to the first multi-turn counter <NUM>, the second multi-turn counter <NUM> and the third multi-turn counter <NUM>. Furthermore, the signal processing apparatus <NUM> is provided with a signal monitoring unit <NUM> that is connected to the encoder <NUM>, in order to monitor the output signals of the encoder <NUM>. The first phase output signal S1, the second phase output signal S2 and the third phase output signal S3 of the encoder <NUM> are input to the signal monitoring unit <NUM>. Furthermore, the signal processing apparatus <NUM> is provided with a control unit <NUM> that performs overall control of the signal processing apparatus <NUM>.

Next, operations of the signal processing apparatus <NUM> for an encoder according to Embodiment <NUM> will be described.

The encoder <NUM> of the signal processing apparatus <NUM> detects the revolution of the rotary shaft <NUM> of the rotary electrical machine <NUM> and outputs three-phase output signals consisting of the first phase output signal S1, the second phase output signal S2 and the third phase output signal S3 shaped into square waves by a waveform shaping circuit (not shown).

<FIG> shows the three-phase output signals that are output from the encoder <NUM> (see <FIG>) of Embodiment <NUM>. The first phase output signal S1, the second phase output signal S2 and the third phase output signal S3 are square-wave three-phase output signals that are output one pulse per revolution, that is, <NUM> degree revolution, of the rotary shaft <NUM>, and take either an H or L value. Also, the first phase output signal S1, the second phase output signal S2 and the third phase output signal S3 have a phase difference of <NUM> degrees from each other.

Next, the first phase output signal S1 and the second phase output signal S2 are input to the first multi-turn counter <NUM> as shown in <FIG>. The first multi-turn counter <NUM> detects the rotation direction of the rotary shaft <NUM> based on the first phase output signal S1 and the second phase output signal S2. Also, the first multi-turn counter <NUM> counts the number of pulses of the first phase output signal S1 and the second phase output signal S2, and outputs the resultant counter value to the comparison unit <NUM> as a first counter value C1.

Also, the first phase output signal S1 and the third phase output signal S3 are input to the second multi-turn counter <NUM>. The second multi-turn counter <NUM> detects the rotation direction of the rotary shaft <NUM> based on the first phase output signal S1 and the third phase output signal S3. Also, the second multi-turn counter <NUM> counts the number of pulses of the first phase output signal S1 and the third phase output signal S3, and outputs the resultant counter value to the comparison unit <NUM> as a second counter value C2.

Furthermore, the second phase output signal S2 and the third phase output signal S3 are input to the third multi-turn counter <NUM>. The third multi-turn counter <NUM> detects the rotation direction of the rotary shaft <NUM> based on the second phase output signal S2 and the third phase output signal S3. Also, the third multi-turn counter <NUM> counts the number of pulses of the second phase output signal S2 and the third phase output signal S3, and outputs the resultant counter value to the comparison unit <NUM> as a third counter value C3.

Next, the comparison unit <NUM> compares the first counter value C1 of the first multi-turn counter <NUM>, the second counter value C2 of the second multi-turn counter <NUM> and the third counter value C3 of the third multi-turn counter <NUM>. If the first counter value C1, the second counter value C2 and the third counter value C3 that are compared do not match, the comparison unit <NUM> then outputs a non-matching counter values alarm A to the control unit <NUM> of the signal processing apparatus <NUM>.

For example, if the value of any of the first phase output signal S1, the second phase output signal S2 and the third phase output signal S3 remains unchanged at H or L due, for instance, to a failure of a signal output unit (not shown) of the encoder <NUM>, the first counter value C1, the second counter value C2 and the third counter value C3 of the first multi-turn counter <NUM>, the second multi-turn counter <NUM> and the third multi-turn counter <NUM> will not match, and thus the comparison unit <NUM> outputs the non-matching counter values alarm A. The control unit <NUM> of the signal processing apparatus <NUM> is thereby able to detect that an anomaly has occurred in the signal processing apparatus <NUM>, if the non-matching counter values alarm A is input. Similarly, if a failure occurs in any of the first multi-turn counter <NUM>, the second multi-turn counter <NUM> and the third multi-turn counter <NUM>, resulting in a counter value not being output from one of the multi-turn counters, the first counter value C1, the second counter value C2 and the third counter value C3 will not match, and thus the comparison unit <NUM> outputs the non-matching counter values alarm A. The control unit <NUM> of the signal processing apparatus <NUM> is thereby able to detect that an anomaly of non-matching counter values has occurred.

Also, the signal monitoring unit <NUM> constantly monitors the combination of the value of the first phase output signal S1, the value of the second phase output signal S2 and the value of the third phase output signal S3 of the encoder <NUM>. When the encoder <NUM> is operating, the combinations of the value of the first phase output signal S1, the value of the second phase output signal S2 and the value of the third phase output signal S3 will be the six combinations (H, H, L), (H, L, L), (H, L, H), (L, L, H), (L, H, H) and (L, H, L), as shown in <FIG>. Therefore, if the combination of the value of the first phase output signal S1, the value of the second phase output signal S2 and the value of the third phase output signal S3 is (H, H, H), or (L, L, L), that is, if the first phase output signal S1, the second phase output signal S2 and the third phase output signal S3 are all H or L at the same time, an anomaly of some sort has occurred in the encoder <NUM> of the signal processing apparatus <NUM>, signal lines thereof or the like, and the values of the output signals of all the phases remain unchanged at H or L.

If the combination of the value of the first phase output signal S1, the value of the second phase output signal S2 and the value of the third phase output signal S3 is (H, H, H) or (L, L, L), the signal monitoring unit <NUM> outputs a signal anomaly alarm B to the control unit <NUM> of the signal processing apparatus <NUM> as shown in <FIG>. The control unit <NUM> of the signal processing apparatus <NUM> is thereby able to detect that an anomaly in the output signals of the encoder <NUM> has occurred.

Note that, in a conventional signal processing apparatus for an encoder that outputs output signals of two phases, the combinations of the value of the first phase output signal and the value of the second phase output signal will be the four combinations (H, H), (H, L), (L, H) and (L, L) as shown in <FIG>. Therefore, if the combination of the value of the first phase output signal and the value of the second phase output signal is (H, H), it can only be determined that the angle of the rotary shaft is an angle at which the combination of the output signals will be (H, H) and the encoder is functioning normally, or that the values of the output signals of all the phases remain unchanged at H due to an anomaly of some sort having occurred in the encoder or the like. Similarly, if the combination of the value of the first phase output signal and the value of the second phase output signal is (L, L), it can only be determined that the angle of the rotary shaft is an angle at which the combination of the output signals will be (L, L) and the encoder is functioning normally, or that the values of the output signals of all the phases remain unchanged at L due to an anomaly of some sort having occurred in the encoder or the like.

On the other hand, with the signal processing apparatus <NUM> (see <FIG>) of Embodiment <NUM>, if the encoder <NUM>, the signal lines and the like are functioning normally as described above, the combination of the value of the first phase output signal S1, the value of the second phase output signal S2 and the value of the third phase output signal S3 will not be (H, H, H) or (L, L, L) as shown in <FIG>, and if the combination of the output signal values is (H, H, H) or (L, L, L), the signal monitoring unit <NUM> outputs the signal anomaly alarm B to the control unit <NUM> of the signal processing apparatus <NUM>, thus enabling the occurrence of an anomaly in the encoder <NUM>, the signal lines or the like to be detected.

In this way, the signal processing apparatus <NUM> for an encoder according to Embodiment <NUM> includes the encoder <NUM> that outputs the first phase output signal S1, the second phase output signal S2 and the third phase output signal S3 one pulse per revolution of the rotary shaft <NUM>, at least three multi-turn counters including the first multi-turn counter <NUM>, the second multi-turn counter <NUM> and the third multi-turn counter <NUM> that respectively receive input of different combinations of output signals of two phases out of the first phase output signal S1, the second phase output signals S2 and the third phase output signal S3, and respectively output the first counter value C1, the second counter value C2 and the third counter value C3 based on the output signals of two phases, and the comparison unit <NUM> that receives input of the first counter value C1, the second counter value C2 and the third counter value C3, and compares the first counter value C1, the second counter value C2 and the third counter value C3, thus enabling an anomaly in the encoder output signals to be detected.

Also, the comparison unit <NUM> outputs the non-matching counter values alarm A if the first counter value C1, the second counter value C2 and the third counter value C3 do not match, thus enabling the occurrence of an anomaly of non-matching counter values to be detected in the signal processing apparatus <NUM>.

Also, the signal processing apparatus <NUM> further includes the signal monitoring unit <NUM> that monitors the first phase output signal S1, the second phase output signal S2 and the third phase output signal S3, and, in the case where the first phase output signal S1, the second phase output signal S2 and the third phase output signal S3 are square waves capable of taking two types of values H and L, and the values of the first phase output signal S1, the second phase output signal S2 and the third phase output signal S3 are all H at the same time or the values of the first phase output signal S1, the second phase output signal S2 and the third phase output signal S3 are all L at the same time, the signal monitoring unit <NUM> outputs the signal anomaly alarm B, thus enabling an anomaly in which the values of the encoder output signals are all H at the same time or an anomaly in which the values of the encoder output signal are all L at the same time to be detected in the signal processing apparatus <NUM>.

Also, the multiphase output signals that are output by the encoder <NUM> consist of the first phase output signal S1, the second phase output signal S2 and the third phase output signal S3, the multi-turn counters consist of the first multi-turn counter <NUM>, the second multi-turn counter <NUM> and the third multi-turn counter <NUM>, and the first multi-turn counter <NUM> outputs the first counter value C1 based on the first phase output signal S1 and the second phase output signal S2, the second multi-turn counter <NUM> outputs the second counter value C2 based on the first phase output signal S1 and the third phase output signal S3, and the third multi-turn counter <NUM> outputs the third counter value C3 based on the second phase output signal S2 and the third phase output signal S3, thus enabling anomalies in the encoder output signals to be detected in the case where the output signals of the encoder <NUM> are three-phase output signals.

Also, since the phase difference between the first phase output signal S1, the second phase output signal S2 and the third phase output signal S3 is <NUM> degrees, the values of the first phase output signal S1, the second phase output signal S2 and the third phase output signal S3 will not all be H or L at the same time in the case where the encoder <NUM>, the signal lines and the like are functioning normally, thus enabling an anomaly in which the values of the encoder output signals are all H at the same time or an anomaly in which the values of the encoder output signals are all L at the same time to be detected.

Also, the method of generating multi-turn data of an encoder according to Embodiment <NUM> includes outputting the first phase output signal S1, the second phase output signal S2 and the third phase output signal S3 one pulse per revolution of the rotation angle of the rotary shaft <NUM> with use the encoder <NUM>, respectively counting different combinations of output signals of two phases out of the first phase output signal S1, the second phase output signal S2 and the third phase output signal S3 and outputting the first counter values C1, the second counter value C2 and the third counter value C3 with use of the first multi-turn counter <NUM>, the second multi-turn counter <NUM> and the third multi-turn counter <NUM>, and comparing the counter values with use of the comparison unit <NUM>, thus enabling an anomaly in the encoder output signals to be detected.

Next, a signal processing apparatus for an encoder according to Embodiment <NUM> of the present invention will be described based on the accompanying drawings. Note that, in the following embodiments, reference signs that are the same as signs in <FIG> and <FIG> of Embodiment <NUM> are the same or similar constituent elements, and thus detailed description thereof will be omitted. In the signal processing apparatus for an encoder according to Embodiment <NUM>, the phase difference between the first phase output signal, the second phase output signal and the third phase output signal of the encoder <NUM> has been changed compared with Embodiment <NUM>.

<FIG> is a schematic diagram showing the respective phase output signals of the encoder <NUM> (see <FIG>) of Embodiment <NUM>. The first phase output signal S1, the second phase output signal S2 and the third phase output signal S3 that are output from the encoder <NUM> are square-wave three-phase output signals that are output one pulse per <NUM> degree revolution of the rotary shaft <NUM>.

The encoder <NUM> is configured such that the phase difference of the second phase output signal S2 from the first phase output signal S1 is <NUM> degrees. The encoder <NUM> is configured such that the phase difference of the third phase output signal S3 from the first phase output signal S1 is <NUM> degrees. Furthermore, the encoder <NUM> is configured such that the phase difference of the third phase output signal S3 from the second phase output signal S2 is <NUM> degrees. The remaining configuration thereof is the same as Embodiment <NUM>.

Next, operations of the signal processing apparatus <NUM> of Embodiment <NUM> will be described as shown in <FIG>. In the signal processing apparatus <NUM> of Embodiment <NUM>, the operation in which the comparison unit <NUM> outputs the non-matching counter values alarm A to the control unit <NUM> of the signal processing apparatus <NUM> in the case where the first counter value C1, the second counter value C2 and the third counter value C3 do not match is the same as Embodiment <NUM>.

Also, as shown in <FIG>, the combinations of the value of the first phase output signal S1, the value of the second phase output signal S2 and the value of the third phase output signal S3 when the encoder <NUM> of Embodiment <NUM> is functioning normally are the six combinations (H, H, L), (H, L, L), (H, L, H), (L, L, H), (L, H, H) and (L, H, L). That is, when the encoder <NUM> is functioning normally, the combination of the value of the first phase output signal S1, the value of the second phase output signal S2 and the value of the third phase output signal S3 will not be (H, H, H) or (L, L, L). Therefore, if the combination of the value of the first phase output signal S1, the value of the second phase output signal S2 and the value of the third phase output signal S3 is (H, H, H) or (L, L, L), the signal monitoring unit <NUM> outputs the signal anomaly alarm B to the control unit <NUM> of the signal processing apparatus <NUM>. The control unit <NUM> of the signal processing apparatus <NUM> is thereby able to detect that an anomaly in the output signals has occurred.

In this way, in the signal processing apparatus <NUM> for an encoder according to Embodiment <NUM>, the phase difference between the first phase output signal S1 and the second phase output signal S2 is <NUM> degrees, the phase difference between the first phase output signal S1 and the third phase output signal S3 is <NUM> degrees, and the phase difference between the second phase output signal S2 and the third phase output signal S3 is <NUM> degrees, thus enabling the occurrence of an anomaly in the output signals to be detected by the signal monitoring unit <NUM> of the signal processing apparatus <NUM> similarly to Embodiment <NUM>.

Next, a signal processing apparatus for an encoder according to Embodiment <NUM> of the present invention will be described based on the accompanying drawings. In the signal processing apparatus of the encoder according to Embodiment <NUM>, the number of phases of output signals of the encoder has been changed to four phases compared with Embodiment <NUM>.

<FIG> is a schematic diagram of the signal processing apparatus for an encoder of Embodiment <NUM>. A signal processing apparatus <NUM> is provided with an encoder <NUM> that is a known optical rotary encoder. The encoder <NUM> outputs four-phase output signals, namely, a first phase output signal S1, a second phase output signal S2, a third phase output signal S3 and a fourth phase output signal S4, shaped into square waves by a waveform shaping circuit (not shown).

Also, the signal processing apparatus <NUM> is provided with a total of six multi-turn counters for counting the output signals of the encoder <NUM>, namely, a first multi-turn counter <NUM>, a second multi-turn counter <NUM>, a third multi-turn counter <NUM>, a fourth multi-turn counter <NUM>, a fifth multi-turn counter <NUM> and a sixth multi-turn counter <NUM>.

The first phase output signal S1 and the second phase output signal S2 of the encoder <NUM> are input to the first multi-turn counter <NUM>. The first phase output signal S1 and the third phase output signal S3 of the encoder <NUM> are input to the second multi-turn counter <NUM>. The second phase output signal S2 and the third phase output signal S3 of the encoder <NUM> are input to the third multi-turn counter <NUM>. The first phase output signal S1 and the fourth phase output signal S4 of the encoder <NUM> are input to the fourth multi-turn counter <NUM>. The second phase output signal S2 and the fourth phase output signal S4 of the encoder <NUM> are input to the fifth multi-turn counter <NUM>. The third phase output signal S3 and the fourth phase output signal S4 of the encoder <NUM> are input to the sixth multi-turn counter <NUM>.

Also, the signal processing apparatus <NUM> is provided with a comparison unit <NUM> to which the first multi-turn counter <NUM>, the second multi-turn counter <NUM>, the third multi-turn counter <NUM>, the fourth multi-turn counter <NUM>, the fifth multi-turn counter <NUM> and the sixth multi-turn counter <NUM> are connected. Furthermore, the signal processing apparatus <NUM> is provided with a signal monitoring unit <NUM> for monitoring the output signals of the encoder <NUM>. The first phase output signal S1, the second phase output signal S2, the third phase output signal S3 and the fourth phase output signal S4 of the encoder <NUM> are input to the signal monitoring unit <NUM>. The remaining configuration thereof is the same as Embodiment <NUM>.

Next, operations of the signal processing apparatus <NUM> of Embodiment <NUM> will be described.

<FIG> shows the four-phase output signals that are output from the encoder <NUM> (see <FIG>) of Embodiment <NUM>. The first phase output signal S1, the second phase output signal S2, the third phase output signal S3 and the fourth phase output signal S4 are square wave four-phase output signals that are output one pulse per revolution, that is, <NUM> degree revolution, of the rotary shaft <NUM>, and take either an H or L value. Also, the second phase output signal S2 has a phase difference of <NUM> degrees from the first phase output signal S1, the third phase output signal S3 has a phase difference of <NUM> degrees from the first phase output signal S1, and the fourth phase output signal S4 has a phase difference of <NUM> degrees from the first phase output signal S1.

Also, the second phase output signal S2 and the third phase output signal S3 are input to the third multi-turn counter <NUM>. The third multi-turn counter <NUM> detects the rotation direction of the rotary shaft <NUM> based on the second phase output signal S2 and the third phase output signal S3. Also, the third multi-turn counter <NUM> counts the number of pulses of the second phase output signal S2 and the third phase output signal S3, and outputs the resultant counter value to the comparison unit <NUM> as a third counter value C3.

Also, the first phase output signal S1 and the fourth phase output signal S4 are input to the fourth multi-turn counter <NUM>. The fourth multi-turn counter <NUM> detects the rotation direction of the rotary shaft <NUM> based on the first phase output signal S1 and the fourth phase output signal S4. Also, the fourth multi-turn counter <NUM> counts the number of pulses of the first phase output signal S1 and the fourth phase output signal S4, and outputs the resultant counter value to the comparison unit <NUM> as a fourth counter value C4.

Also, the second phase output signal S2 and the fourth phase output signal S4 are input to the fifth multi-turn counter <NUM>. The fifth multi-turn counter <NUM> detects the rotation direction of the rotary shaft <NUM> based on the second phase output signal S2 and the fourth phase output signal S4. Also, the fifth multi-turn counter <NUM> counts the number of pulses of the second phase output signal S2 and the fourth phase output signal S4, and outputs the resultant counter value to the comparison unit <NUM> as a fifth counter value C5.

Also, the third phase output signal S3 and the fourth phase output signal S4 are input to the sixth multi-turn counter <NUM>. The sixth multi-turn counter <NUM> detects the rotation direction of the rotary shaft <NUM> based on the third phase output signal S3 and the fourth phase output signal S4. Also, the sixth multi-turn counter <NUM> counts the number of pulses of the third phase output signal S3 and the fourth phase output signal S4, and outputs the resultant counter value to the comparison unit <NUM> as a sixth counter value C6.

Next, the comparison unit <NUM> compares the first counter value C1 of the first multi-turn counter <NUM>, the second counter value C2 of the second multi-turn counter <NUM>, the third counter value C3 of the third multi-turn counter <NUM>, the fourth counter value C4 of the fourth multi-turn counter <NUM>, the fifth counter value C5 of the fifth multi-turn counter <NUM> and the sixth counter value C6 of the sixth multi-turn counter <NUM>. If the first counter value C1, the second counter value C2, the third counter value C3, the fourth counter value C4, the fifth counter value C5 and the sixth counter value C6 that are compared do not match, the comparison unit <NUM> outputs the non-matching counter values alarm A to the control unit <NUM> of the signal processing apparatus <NUM>.

Also, the signal monitoring unit <NUM> constantly monitors the combination of the value of the first phase output signal S1, the value of the second phase output signal S2, the value of the third phase output signal S3 and the value of the fourth phase output signal S4 of the encoder <NUM>. When the signal processing apparatus <NUM> is operating, the combinations of the value of the first phase output signal S1, the value of the second phase output signal S2, the value of the third phase output signal S3 and the value of the fourth phase output signal S4 will be the eight combinations (H, L, H, L), (H, H, H, L), (H, H, L, L), (H, H, L, H), (L, H, L, H), (L, L, L, H), (L, L, H, H) and (L, L, H, L), as shown in <FIG>. Therefore, if the combination of the value of the first phase output signal S1, the value of the second phase output signal S2, the value of the third phase output signal S3 and the value of the fourth phase output signal S4 is (H, H, H, H) or (L, L, L, L), that is, if the first phase output signal S1, the second phase output signal S2, the third phase output signal S3 and the fourth phase output signal S4 are all H or L at the same time, an anomaly of some sort has occurred in the encoder <NUM> of the signal processing apparatus <NUM>, the signal lines thereof or the like, and the values of the output signals of all the phases remain unchanged at H or L.

If the combination of the value of the first phase output signal S1, the value of the second phase output signal S2, the value of the third phase output signal S3 and the value of the fourth phase output signal S4 is (H, H, H, H) or (L, L, L, L), the signal monitoring unit <NUM> outputs the signal anomaly alarm B to the control unit <NUM> of the signal processing apparatus <NUM>. The control unit <NUM> of the signal processing apparatus <NUM> is thereby able to detect that an anomaly in the output signals has occurred.

In this way, in the signal processing apparatus <NUM> for an encoder according to Embodiment <NUM>, the comparison unit <NUM> outputs the non-matching counter values alarm A to the control unit <NUM> of the signal processing apparatus <NUM>, in the case where the first counter value C1, the second counter value C2, the third counter value C3, the fourth counter value C4, the fifth counter value C5 and the sixth counter value C6 do not match. Also, in the signal processing apparatus <NUM> for an encoder according to Embodiment <NUM>, the signal monitoring unit <NUM> outputs the signal anomaly alarm B to the control unit <NUM> of the signal processing apparatus <NUM>, in the case where the combination of the value of the first phase output signal S1, the value of the second phase output signal S2, the value of the third phase output signal S3 and the value of the fourth phase output signal S4 is (H, H, H, H) or (L, L, L, L). Thus, anomalies in the encoder output signals can also be detected in the case where the encoder <NUM> outputs four-phase output signals, due to the non-matching counter values alarm A and the signal anomaly alarm B being input to the control unit <NUM> of the signal processing apparatus <NUM>.

Also, an optical rotary encoder that outputs three-phase output signals is used as the encoder <NUM> in Embodiments <NUM> and <NUM> of the present invention, and an optical rotary encoder that outputs four-phase output signals is used as the encoder <NUM> in Embodiment <NUM>, but the present invention is not limited thereto. For example, an optical rotary encoder that outputs output signals of five phases or more may be used as the encoders <NUM> and <NUM>, in which case the signal processing apparatuses <NUM> and <NUM> need only be provided with an appropriate number of multi-turn counters. For example, another type of rotary encoder such as a magnetic rotary encoder may be used as the encoders <NUM> and <NUM>, instead of an optical rotary encoder.

Claim 1:
A signal processing apparatus for an encoder comprising:
an encoder (<NUM>, <NUM>) configured to output multiphase output signals of at least three phases, each output signal having one pulse per revolution of a rotary shaft (<NUM>);
at least three multi-turn counters (<NUM>, <NUM>, <NUM>), configured to respectively output counter values, and ,
a comparison unit (<NUM>) configured to receive input of the counter values and compare the counter values,
characterized in that
the counter values are based on the output signals of two phases,
the at least three multi-turn counters (<NUM>, <NUM>, <NUM>) are configured to respectively receive input of different combinations of output signals of two phases out of the multiphase output signals,
the signal processing apparatus further comprises a signal monitoring unit (<NUM>) configured to monitor the multiphase output signals,
wherein, if the phase output signals of the multiphase output signals are square waves capable of taking two types of values H and L, and the phase output signals of the multiphase output signals are all H at the same time or the phase output signals of the multiphase output signals are all L at the same time, the signal monitoring unit (<NUM>) is configured to output a signal anomaly alarm, wherein
the multiphase output signals output by the encoder (<NUM>) consist of a first phase output signal, a second phase output signal and a third phase output signal,
the multi-turn counters consist of a first multi-turn counter (<NUM>), a second multi-turn counter (<NUM>) and a third multi-turn counter (<NUM>),
the first multi-turn counter (<NUM>) outputs a first counter value based on the first phase output signal and the second phase output signal,
the second multi-turn counter (<NUM>) outputs a second counter value based on the first phase output signal and the third phase output signal,
the third multi-turn counter (<NUM>) outputs a third counter value based on the second phase output signal and the third phase output signal, and
either the first phase output signal, the second phase output signal and the third phase output signal have a phase difference of <NUM> degrees from each other,
or the first phase and the second phase output signal have a phase difference of <NUM> degrees, the first phase output signal and the third phase output signal have a phase difference of <NUM> degrees and the second phase output signal and the third phase output signal have a phase difference of <NUM> degrees.