Patent Description:
A photovoltaic device generates electrical power by converting light into electricity using semiconductor materials that exhibit the photovoltaic effect. Photovoltaic devices include a number of layers divided into a plurality of photovoltaic cells by selective removal of certain regions of the layers. Each photovoltaic cell converts sunlight into electrical power and can be electrically connected with one or more neighboring cells. Such electrical connections can be formed by filling the removed regions with conductive materials. The dimensions of the removed regions and the conductive materials can impact the performance and manufacturability of the photovoltaic device.

Selective removal of certain regions of the layers can be performed using a laser ablation process, sometimes referred to as laser scribing. Scribing processes involving the removal of layer stacks for the purpose of forming a plurality of interconnected photovoltaic cells are disclosed in documents <CIT>, <CIT>, and <CIT>. A need exists to improve the accuracy and repeatability of scribes placed over photovoltaic device substrates.

According to an embodiment, a method for forming a conductive interconnection is provided. The method includes forming a semiconductor stack <NUM> (<FIG> and <FIG>) over a first contact. A first conductive layer <NUM> (M1) is formed over the semiconductor stack <NUM>. A shaped region of the first conductive layer <NUM> (M1) is ablated from the semiconductor stack <NUM>, wherein a conductive island <NUM> (<FIG>) is formed from the first conductive layer <NUM> (M1) and demarcated by the shaped region (for example, the shape produced by the annular scribe ring <NUM>, <NUM> of <FIG> and <FIG>, respectively). A dielectric layer <NUM> (<FIG>) is formed over the first conductive layer <NUM> (M1), wherein the dielectric layer at least partially fills the shaped region. A passage (P2. <NUM> scribe <NUM>, <FIG>) is formed through the circular conductive island <NUM> of the first conducting layer <NUM> (M1), leaving behind the remaining portion of conductive island <NUM> (<FIG>). The passage extends through the dielectric layer <NUM>, the remaining portion of conductive island <NUM>, and the semiconductor stack <NUM>. The passage is at least partially filled with an interconnect that forms an electrical connection with the first contact (TCO layer <NUM>).

The features provided by the embodiments described herein will be more fully understood in view of the following detailed description, in conjunction with the drawings.

Embodiments for producing conducting layer interconnects for photovoltaic devices using an alignment process are presented herein. Photovoltaic devices include a number of layers divided into a plurality of photovoltaic cells by selective removal of certain regions of the layers. Each photovoltaic cell converts sunlight into electrical power and can be electrically connected with one or more neighboring cells. Such electrical connections can be formed by filling the removed regions with conductive materials. The dimensions of the removed regions directly control the dimensions of the conductive materials. As such, the dimensions of the removed regions can impact the performance and manufacturability of the photovoltaic device. Selective removal of certain regions of the layers can be performed using a laser ablation process, sometimes referred to as laser scribing.

Referring now to <FIG>, a photovoltaic device <NUM> is schematically depicted. The photovoltaic device <NUM> can be configured to receive light and transform light into electrical signals, e.g., photons can be absorbed from the light and transformed into electrical signals via the photovoltaic effect. Accordingly, the photovoltaic device <NUM> can define a first side <NUM> configured to be exposed to a light source such as, for example, the sun. The photovoltaic device <NUM> can also define an opposing side <NUM> offset from the first side <NUM> such as, for example, by a plurality of material layers. It is noted that the term "light" can refer to various wavelengths of the electromagnetic spectrum such as, but not limited to, wavelengths in the ultraviolet (UV), infrared (IR), and visible portions of the electromagnetic spectrum. "Sunlight," as used herein, refers to light emitted by the sun.

The photovoltaic device <NUM> can include a plurality of layers disposed between the first side <NUM> and the opposing side <NUM>. As used herein, the term "layer" refers to a thickness of material provided upon a surface. Each layer can cover all or any portion of the surface. In some embodiments, the layers of the photovoltaic device <NUM> can be divided into an array of photovoltaic cells <NUM>. For example, photovoltaic device <NUM> can be scribed according to a plurality of serial scribes <NUM> and a plurality of parallel scribes <NUM>. The serial scribes <NUM> can extend along a length Y of photovoltaic device <NUM> and demarcate photovoltaic cells <NUM> along length Y of photovoltaic device <NUM>.

The serial scribes <NUM> can be configured to connect neighboring cells of the photovoltaic cells <NUM> serially along a width X of photovoltaic device <NUM>. Serial scribes <NUM> can form a monolithic interconnect of the neighboring cells, i.e., on either side of a serial scribe <NUM>. Under operations, current <NUM> can predominantly flow along the width X through the photovoltaic cells <NUM> serially connected by serial scribes <NUM>. Under operations, parallel scribes <NUM> can limit the ability of current <NUM> to flow along length Y of photovoltaic device <NUM>. Parallel scribes <NUM> are optional and can be configured to separate the photovoltaic cells <NUM> that are connected serially into groups <NUM> arranged along length Y. Accordingly, the serial scribes <NUM> and the parallel scribes <NUM> can demarcate the array of the photovoltaic cells <NUM>.

Referring still to <FIG>, the parallel scribes <NUM> can electrically isolate the groups <NUM> of photovoltaic cells <NUM> that are connected serially. In some embodiments, serially-connected groups <NUM> of the photovoltaic cells <NUM> can be connected in parallel to one another, such as, for example, via electrical bussing. Optionally, the number of parallel scribes <NUM> can be configured to limit a maximum current generated by each group <NUM> of photovoltaic cells <NUM>. In some embodiments, the maximum current generated by each group <NUM> can be less than or equal to about <NUM> milliamps (mA).

Referring to <FIG>, the layers of the photovoltaic device <NUM> can include a substrate <NUM> configured to facilitate the transmission of light into the photovoltaic device <NUM>. The substrate <NUM> can be disposed at the first side <NUM> of the photovoltaic device <NUM>. Substrate <NUM> can have a first surface <NUM> substantially facing the first side <NUM> of the photovoltaic device <NUM> and a second surface <NUM> substantially facing the opposing side <NUM> of the photovoltaic device <NUM>. One or more layers of material can be disposed between the first surface <NUM> and the second surface <NUM> of the substrate <NUM>.

Referring to <FIG>, substrate <NUM> can include a transparent layer <NUM> having a first surface <NUM> substantially facing the first side <NUM> of photovoltaic device <NUM> and a second surface <NUM> substantially facing the opposing side <NUM> of photovoltaic device <NUM>. In some embodiments, the second surface <NUM> of transparent layer <NUM> can form the second surface <NUM> of substrate <NUM>. The transparent layer <NUM> can be formed from a substantially transparent material such as, for example, glass. Suitable glass can include soda-lime glass, or any glass with reduced iron content. The transparent layer <NUM> can have any suitable transmittance, including about <NUM> to about <NUM>,<NUM> in some embodiments, or about <NUM> to about <NUM> in other embodiments. The transparent layer <NUM> may also have any suitable transmission percentage, including, for example, between about <NUM>% and <NUM>% transmittance, or higher. Optionally, the substrate <NUM> can include a coating <NUM> applied to the first surface <NUM> of the transparent layer <NUM>. The coating <NUM> can be configured to interact with light or to improve durability of the substrate <NUM> such as, but not limited to, an antireflective coating, an anti-soiling coating, or a combination thereof.

Referring again to <FIG>, the photovoltaic device <NUM> can include a barrier layer <NUM> configured to mitigate diffusion of contaminants (e.g. sodium) from the substrate <NUM>, which could result in degradation or delamination. The barrier layer <NUM> can have a first surface <NUM> substantially facing first side <NUM> of photovoltaic device <NUM> and a second surface <NUM> substantially facing the opposing side <NUM> of photovoltaic device <NUM>. In some embodiments, the barrier layer <NUM> can be provided adjacent to the substrate <NUM>. For example, the first surface <NUM> of the barrier layer <NUM> can be provided upon the second surface <NUM> of the substrate <NUM>. The phrase "adjacent to," as used herein, means that two layers are disposed contiguously and without any intervening materials between at least a portion of the layers, and "over" means that the two layers have a fixed relationship to one another, which could include adjacent or having some intermediate layers.

Generally, the barrier layer <NUM> can be substantially transparent, thermally stable, with a reduced number of pin holes, high sodium-blocking capability, and/or good adhesive properties. Alternatively or additionally, barrier layer <NUM> can be configured to apply color suppression to light. Barrier layer <NUM> can include one or more layers of suitable material, including, but not limited to, tin oxide, silicon dioxide, aluminum-doped silicon oxide, silicon oxide, silicon nitride, or aluminum oxide. Barrier layer <NUM> can have any suitable thickness bounded by the first surface <NUM> and the second surface <NUM>, including, for example, more than about <NUM>Å in one embodiment, more than about <NUM>Å in another embodiment, or less than about <NUM>Å in a further embodiment.

Referring still to <FIG>, the photovoltaic device <NUM> can include a transparent conductive oxide (TCO) layer <NUM> configured to provide electrical contact to transport charge carriers generated by an absorber layer of the photovoltaic device <NUM>. The TCO layer <NUM> can have a first surface <NUM> substantially facing first side <NUM> of photovoltaic device <NUM>, and a second surface <NUM> substantially facing opposing side <NUM> of photovoltaic device <NUM>. In some embodiments, TCO layer <NUM> can be provided adjacent to barrier layer <NUM>. For example, first surface <NUM> of TCO layer <NUM> can be provided upon second surface <NUM> of barrier layer <NUM>. Generally, TCO layer <NUM> can be formed from one or more layers of n-type semiconductor material that is substantially transparent and has a wide band gap. Specifically, the wide band gap can have a larger energy value compared to the energy of the photons of the light, which can mitigate undesired absorption of light. The TCO layer <NUM> can include one or more layers of suitable material, including, but not limited to, tin dioxide, doped tin dioxide (e.g., F-SnO<NUM>), indium tin oxide, doped or undoped zinc oxide or cadmium stannate.

Photovoltaic device <NUM> can include a buffer layer <NUM> configured to provide an insulating layer between TCO layer <NUM> and any adjacent semiconductor layers. Buffer layer <NUM> can have a first surface <NUM> substantially facing first side <NUM> of the photovoltaic device <NUM>, and a second surface <NUM> substantially facing opposing side <NUM> of photovoltaic device <NUM>. In some embodiments, buffer layer <NUM> can be provided adjacent to TCO layer <NUM>. For example, first surface <NUM> of buffer layer <NUM> can be provided upon second surface <NUM> of TCO layer <NUM>. Buffer layer <NUM> may include material having higher resistivity than the TCO later <NUM>, including, but not limited to, intrinsic tin dioxide, zinc magnesium oxide (e.g., Zn<NUM>-xMgxO), tin dioxide (SnO<NUM>), aluminum oxide (Al<NUM>O<NUM>), aluminum nitride (AlN), zinc tin oxide, zinc oxide, tin silicon oxide, or any combination thereof. In some embodiments, the material of buffer layer <NUM> can be configured to substantially match the band gap of an adjacent semiconductor layer (e.g., an absorber). Buffer layer <NUM> may have any suitable thickness between first surface <NUM> and second surface <NUM>, including, for example, more than about <NUM>Å in one embodiment, between about <NUM>Å and about <NUM>Å in another embodiment, or between about <NUM>Å and about <NUM>Å in a further embodiment.

Referring still to <FIG>, the photovoltaic device <NUM> can include an absorber layer <NUM> configured to cooperate with another layer and form a p-n junction within the photovoltaic device <NUM>. Accordingly, absorbed photons of the light can free electron-hole pairs in absorber <NUM> and generate carrier flow, which can yield electrical power. Absorber layer <NUM> can have a first surface <NUM> substantially facing first side <NUM> of photovoltaic device <NUM>, and a second surface <NUM> substantially facing opposing side <NUM> of photovoltaic device <NUM>. A thickness of absorber layer <NUM> can be defined between the first surface <NUM> and the second surface <NUM>. The thickness of the absorber layer <NUM> can be between about <NUM> to about <NUM> such as, for example, between about <NUM> to about <NUM> in one embodiment, or between about <NUM> to about <NUM> in another embodiment.

According to the embodiments described herein, absorber layer <NUM> can be formed from a p-type semiconductor material having an excess of positive charge carriers, i.e., holes or acceptors. Absorber layer <NUM> can include one or more layers of any suitable p-type semiconductor material such as group II-VI semiconductors. Specific examples include, but are not limited to, semiconductor materials comprising cadmium, tellurium, selenium, or any combination thereof. Suitable examples include, but are not limited to, binaries of cadmium and tellurium, ternaries of cadmium, selenium and tellurium (e.g., CdSexTe<NUM>-x), ternaries of cadmium, zinc, and tellurium (e.g., CdZnxTe<NUM>-x), a compound comprising cadmium, selenium, tellurium, and one or more additional element, or a compound comprising cadmium, zinc, tellurium, and one or more additional element. Alternatively, absorber <NUM> may include lead halide and other metal halide perovskite compounds ABX<NUM>, where A and B are cations and X is a halogen anion. In examples, the A site may be occupied by one or more organic or inorganic cations, and the B site may be occupied by one or more metals, such as lead (Pb) or tin (Sb).

In embodiments where the absorber layer <NUM> comprises tellurium and cadmium, the atomic percent of the tellurium can be greater than or equal to about <NUM> atomic percent and less than or equal to about <NUM> atomic percent. In embodiments where absorber layer <NUM> comprises selenium and tellurium, the atomic percent of the selenium in the absorber layer <NUM> can be greater than about <NUM> atomic percent and less or equal to than about <NUM> atomic percent. In the above examples, the respective concentrations of tellurium, cadmium, and selenium can vary through the thickness of absorber layer <NUM>. For example, when the absorber layer <NUM> comprises a compound including selenium at a mole fraction of x and tellurium at a mole fraction of <NUM>-x (SexTe<NUM>-x), x can vary in the absorber layer <NUM> with distance from first surface <NUM> of absorber layer <NUM>.

Referring still to <FIG>, absorber layer <NUM> can be doped with a dopant configured to manipulate the charge carrier concentration. In some embodiments, absorber layer <NUM> can be doped with a group I or V dopant such as, for example, copper, arsenic, phosphorous, antimony, or a combination thereof. The total density of the dopant within the absorber layer <NUM> can be controlled. Alternatively or additionally, the amount of the dopant can vary with distance from first surface <NUM> of absorber layer <NUM>.

According to the embodiments provided herein, the p-n junction can be formed by providing absorber layer <NUM> sufficiently close to a portion of the photovoltaic device <NUM> having an excess of negative charge carriers, i.e., electrons or donors. In some embodiments, absorber layer <NUM> can be provided adjacent to n-type semiconductor material. Alternatively, one or more intervening layers can be provided between absorber layer <NUM> and n-type semiconductor material. In some embodiments, absorber layer <NUM> can be provided adjacent to buffer layer <NUM>. For example, first surface <NUM> of the absorber layer <NUM> can be provided upon second surface <NUM> of buffer layer <NUM>.

The photovoltaic device <NUM> can include a back contact layer <NUM> configured to mitigate undesired alteration of the dopant and to provide electrical contact to the absorber layer <NUM> to transport charge carriers generated therefrom. The back contact layer <NUM> can have a first surface <NUM> substantially facing first side <NUM> of photovoltaic device <NUM> and a second surface <NUM> substantially facing opposing side <NUM> of photovoltaic device <NUM>. A thickness of back contact layer <NUM> can be defined between first surface <NUM> and second surface <NUM>. The thickness of back contact layer <NUM> can be between about <NUM> to about <NUM> such as, for example, between about <NUM> to about <NUM> in one embodiment.

In some embodiments, back contact layer <NUM> can be provided adjacent to absorber layer <NUM>. For example, the first surface <NUM> of back contact layer <NUM> can be provided upon the second surface <NUM> of absorber layer <NUM>. In some embodiments, back contact layer <NUM> can include binary or ternary combinations of materials from groups I, II, VI, such as for example, one or more layers containing zinc, copper, cadmium and tellurium in various compositions. Further exemplary materials include, but are not limited to, zinc telluride doped with copper telluride, or zinc telluride alloyed with copper telluride. For ease of discussion, a stack of layers including buffer layer <NUM>, absorber layer <NUM>, back contact layer <NUM>, or a combination thereof, may be referred to herein as a semiconductor stack <NUM>.

The photovoltaic device <NUM> can include a first conducting layer <NUM> configured to provide electrical contact with the absorber layer <NUM> and/or back contact <NUM>. The first conducting layer <NUM> can have a first surface <NUM> substantially facing the first side <NUM> of the photovoltaic device <NUM> and a second surface <NUM> substantially facing the opposing side <NUM> of the photovoltaic device <NUM>. In some embodiments, first conducting layer <NUM> can be provided adjacent to back contact layer <NUM>. For example, first surface <NUM> of first conducting layer <NUM> can be provided upon second surface <NUM> of back contact layer <NUM>. A thickness of the first conducting layer <NUM> can be defined between first surface <NUM> and second surface <NUM>. The thickness of first conducting layer <NUM> can be less than about <NUM> such as, for example, between about <NUM> to about <NUM> in one embodiment, or between about <NUM> to about <NUM> in another embodiment.

The first conducting layer <NUM> can include any suitable conducting material having a sheet resistance between <NUM>Ω/sq and <NUM>Ω/sq. Suitable examples include one or more layers of metal, one or one or more layers of nitrogen-containing metal, one or more conductive oxides, or any combination thereof. Alternatively or additionally, the first conducting layer <NUM> can be transparent or transparent to certain wavelengths of light. In some embodiments, the first conducting layer <NUM> can include a combination of layers conducting material. Each layer can contribute structural or electrical characteristics such that the stack of layers of conductive material have desired performance characteristics. Suitable metals include, but are not limited to, silver, nickel, copper, aluminum, titanium, palladium, chrome, molybdenum, gold, or combinations thereof. Suitable examples of a nitrogen-containing metals include, but are not limited to, aluminum nitride, nickel nitride, titanium nitride, tungsten nitride, selenium nitride, tantalum nitride, or vanadium nitride.

The photovoltaic device <NUM> can include a dielectric layer <NUM> configured to electrically isolate one or more layers of the photovoltaic device <NUM>. For example, within a cell <NUM>, dielectric layer <NUM> can electrically isolate first conducting layer <NUM> from a second conducting layer <NUM>. The dielectric layer <NUM> can have a first surface <NUM> substantially facing the first side <NUM> of the photovoltaic device <NUM> and a second surface <NUM> substantially facing the opposing side <NUM> of the photovoltaic device <NUM>. In some embodiments, the dielectric layer <NUM> can be provided adjacent to first conducting layer <NUM>. For example, first surface <NUM> of dielectric layer <NUM> can be provided upon second surface <NUM> of first conducting layer <NUM>. A thickness of the dielectric layer <NUM> can be defined between first surface <NUM> and second surface <NUM>. The thickness of the dielectric layer <NUM> can be less than about <NUM> such as, for example, less than about <NUM> in one embodiment. Generally, the thickness of the dielectric layer <NUM> is at least one order of magnitude larger than the thickness of the first conducting layer <NUM> such as, for example, greater than about <NUM> times the thickness of the first conducting layer <NUM> in one embodiment.

The dielectric layer <NUM> can include a dielectric material such as, for example, a photoresist material or a non-conductive polymer. Suitable example dielectric material can further include epoxy, acrylic, phenolic, polyimide, or the like. In some embodiments, the dielectric material can have greater than about <NUM>% transmissivity to wavelengths of light suitable for use for laser ablation, i.e., the wavelength range can be associated with solid state laser wavelengths. For example, the wavelength range can be between about <NUM> and about <NUM>,<NUM>.

Referring still to <FIG>, photovoltaic device <NUM> can include a second conducting layer <NUM> configured to provide electrical contact with the TCO layer <NUM>, the first conducting layer <NUM> of a neighboring cell <NUM>, or both. The second conducting layer <NUM> can have a first surface <NUM> substantially facing the first side <NUM> of photovoltaic device <NUM> and a second surface <NUM> substantially facing the opposing side <NUM> of photovoltaic device <NUM>. In some embodiments, the second conducting layer <NUM> can be provided adjacent to dielectric layer <NUM>. For example, the first surface <NUM> of second conducting layer <NUM> can be provided upon the second surface <NUM> of dielectric layer <NUM>. A thickness of the second conducting layer <NUM> can be defined between the first surface <NUM> and the second surface <NUM>. The thickness of the second conducting layer <NUM> can be less than about <NUM> such as, for example, between about <NUM> to about <NUM> in one embodiment, or between about <NUM> to about <NUM> in another embodiment. The second conducting layer <NUM> can include any suitable conducting material having a sheet resistance between <NUM>Ω/sq and <NUM>Ω/sq. Suitable examples include one or more layers of metal, one or one or more layers of nitrogen-containing metal, or both, as described above with respect to the first conducting layer <NUM>. Alternatively or additionally, the second conducting layer <NUM> can be transparent or transparent to certain wavelengths of light. In some embodiments, the second conducting layer <NUM> can have a different material composition than the first conducting layer <NUM>. Alternatively or additionally, the first conducting layer <NUM>, the second conducting layer <NUM>, or both can include non-metal materials such as, for example, oxides.

The photovoltaic device <NUM> can include a back support <NUM> configured to cooperate with substrate <NUM> to form a housing for the photovoltaic device <NUM>. The back support <NUM> can be disposed at the opposing side <NUM> of the photovoltaic device <NUM>. For example, back support <NUM> can be formed over the second conducting layer <NUM>. The back support <NUM> can include any suitable material, including, for example, glass (e.g., soda-lime glass).

Referring to <FIG>, manufacturing of a photovoltaic device <NUM> generally includes sequentially disposing functional layers or layer precursors in a "stack" of layers through one or more thin film deposition processes, including, but not limited to, sputtering, spray, evaporation, molecular beam deposition, pyrolysis, closed space sublimation (CSS), pulse laser deposition (PLD), chemical vapor deposition (CVD), electrochemical deposition (ECD), atomic layer deposition (ALD), or vapor transport deposition (VTD). In some embodiments, VTD may be preferred for greater through put quality.

Manufacturing of photovoltaic devices <NUM> can further include the selective removal of the certain regions of the stack of layers, i.e., scribing or ablation, to divide the photovoltaic device into <NUM> a plurality of photovoltaic cells <NUM>. For example, the serial scribes <NUM> can comprise a first isolation scribe referred to as a P1 scribe <NUM>, and a second isolation scribe referred to as a P3 scribe <NUM>. The P1 scribe <NUM> can be formed to ensure that the TCO layer <NUM> is electrically isolated between neighboring cells <NUM>. Specifically, the P1 scribe <NUM> can be formed though the TCO layer <NUM>, the buffer layer <NUM>, and the absorber layer <NUM> of photovoltaic device <NUM>. The P3 scribe <NUM> can be formed to isolate the conducting layer <NUM> into individual cells <NUM>. The P3 scribe <NUM> can be formed through the second conducting layer <NUM>. The P1 scribe <NUM>, the P3 scribe <NUM>, or both can be filled with a dielectric material. The dielectric material can be formed with a non-conducting material such as, but not limited to, the material of dielectric layer <NUM>.

Referring collectively to <FIG> and <FIG>, a first conducting layer interconnect <NUM> can be formed to electrically connect layers of a photovoltaic cell <NUM>. The conducting layer interconnect <NUM> can be configured to electrically connect the TCO layer <NUM> with the second conducting layer <NUM>. As described herein, in some embodiments conducting layer interconnect <NUM> is formed using an alignment process as described below so as to isolate the interconnect <NUM> from first conducting layer <NUM> via the gap formed between these respective portions of the conductive layer. In some embodiments, interconnect <NUM> can be formed though and electrically isolated from some or all of the semiconductor stack <NUM>. The interconnect <NUM> can be formed with a conducting material such as, but not limited to, the material of second conducting layer <NUM>.

In some embodiments, the photovoltaic cell <NUM> can include a plurality of conducting layer interconnects <NUM> (a portion of which are schematically shown in <FIG>) each configured to allow a desired amount of current to flow between the second conducting layer <NUM> and the TCO layer <NUM>. For example, the number of conducting layer interconnects <NUM> in each cell <NUM> and the desired amount of current flowing through each of the conducting layer interconnects <NUM> can correspond to the current <NUM> to be generated by the group <NUM> of serially connected photovoltaic cells <NUM>. Thus, the quantity of the conducting layer interconnects <NUM> can be scaled in accordance with the current <NUM> to be generated by the group <NUM> of photovoltaic cells <NUM>.

Referring collectively to <FIG> and <FIG>, a second conducting layer interconnect <NUM> can be formed to electrically connect layers of the photovoltaic cell <NUM>. The conducting layer interconnect <NUM> can be configured to electrically connect the first conducting layer <NUM> with the second conducting layer <NUM>. Specifically, the conducting layer interconnect <NUM> can be configured to form selective points of electrical contact between the first conducting layer <NUM> and the second conducting layer <NUM>, while the majority of the first conducting layer <NUM> and the second conducting layer <NUM> are electrically isolated by the dielectric layer <NUM>. The conducting layer interconnect <NUM> can be formed from a conductive material having a sheet resistance between <NUM>Ω/sq and <NUM>Ω/sq. Suitable conductive materials are described above with respect to the first conducting layer <NUM>. In some embodiments, the conducting layer interconnect <NUM> can comprise one or more dissimilar materials than the first conducting layer <NUM>. For example, the conducting layer interconnect <NUM> can comprise a conductive material not present in the first conducting layer <NUM>.

The photovoltaic cell <NUM> can include a plurality of conducting layer interconnects <NUM> (a portion of which are schematically shown in <FIG>) each configured to allow a desired amount of current to flow between the first conducting layer <NUM> and the second conducting layer <NUM>. For example, as discussed above for conducting interconnects <NUM>, the number of conducting layer interconnects <NUM> in each cell <NUM> and the desired amount of current flowing through each of the conducting layer interconnects <NUM> can correspond to the current <NUM> to be generated by the group <NUM> of serially connected photovoltaic cells <NUM>.

Referring to <FIG>, the dielectric layer <NUM> can be significantly thicker than the first conducting layer <NUM>. The average thicknesses the dielectric layer <NUM> and the first conducting layer <NUM> can be determined at the cell <NUM> level.

<FIG> is a flowchart depicting a process for producing the conducting layer interconnect <NUM> using an alignment process according to one or more embodiments described herein. <FIG> will be discussed in conjunction with <FIG>. <FIG> schematically depicts a cross-sectional view of a layered device having a first conducting layer and a plurality of P1 scribes <NUM>. The process of <FIG> commences at block <NUM> where a layered device <NUM> (<FIG>) is provided. The layered device <NUM> can include transparent layer <NUM>, transparent conductive oxide (TCO) layer <NUM>, semiconductor stack <NUM>, and first conducting layer <NUM>, also designated as M1 in some figures. One or more P1 scribes <NUM> can be formed through first conducting layer <NUM>, absorber layer <NUM>, and TCO layer <NUM>.

Next, at block <NUM> of <FIG>, a P2. <NUM> laser ablation process is performed on the layered device <NUM> (<FIG>) to produce a P2. <NUM> scribe <NUM> through first conducting layer <NUM> (M1). Generally, the P2. <NUM> scribe <NUM> can be considered substantially tubular, i.e., a tubular shaped section can be removed from the first conducting layer <NUM>. For example, as will be discussed, from a top view perspective the annular scribe ring <NUM> (<FIG>) or <NUM> (<FIG>) may be used to form the P2. <NUM> scribe <NUM> having an annular ring shape. While some embodiments of the P2. <NUM> scribe <NUM> are formed herein by an annular scribe ring, other shapes are contemplated. For example, the P2. <NUM> scribe <NUM> may be any closed ended regular shape or repeatable shape, one example of which is shown in <FIG> as a square scribe 232a. Also, while some embodiments of the P2. <NUM> scribe <NUM> are formed at a given gap width G (<FIG>), any gap width is contemplated that results in an effective scribe (as described in more detail below). See for example P2. <NUM> scribe 232a in <FIG>. <FIG> schematically depicts a layered device <NUM> which represents the layered device <NUM> of <FIG> after the P2. <NUM> laser ablation process of block <NUM> (<FIG>) has been performed. Laser ablation of first conducting layer <NUM> (<FIG>) is performed down to the semiconductor stack <NUM>, to produce a P2. <NUM> scribe <NUM>.

<NUM> scribe <NUM> can be produced using the annular scribe ring <NUM> or <NUM> (<FIG> or <FIG>, respectively) to define a conductive island <NUM> (<FIG>) which remains in first conducting layer <NUM> (M1). Accordingly, the conductive island <NUM> is formed from the same material as the first conducting layer <NUM> (M1). The conductive island <NUM> of first conducting layer <NUM> (M1) can be any regularly or geometrically shaped protuberance projecting away from the semiconductor stack <NUM>. Conductive island <NUM> can be formed by selective removal of first conducting layer <NUM> (M1). Generally, the amount of material removed (defined by a gap G in <FIG> and <FIG>) is such to provide sufficient electrical isolation between the conductive island <NUM> and the remainder of the first conducting layer <NUM> (M1). For example, the gap G can be in the range <NUM> to <NUM> microns, and preferably <NUM> to <NUM> microns.

Note that because conductive island <NUM> remains after this scribing operation, the volume of material ablated from first conducting layer <NUM> (M1) is less than what would have been required to completely remove all of first conducting layer <NUM> (M1) within the outer wall <NUM> of the P2. <NUM> scribe. In other words, the volume of material ablated within an annular scribe ring of a given diameter is much less than the volume of material that would need to be ablated from within a circle having the same overall diameter as the annular scribe ring. The lower volume of material ablated serves to reduce the pulse energy of the laser required for the ablation process. For example, the Joules per second requirement of the laser can be relaxed and, in some embodiments, reduced by over <NUM>%. According to some embodiments, the J/sec requirement is in the range of <NUM> J/sec to <NUM> J/sec. According to other embodiments, the J/sec requirement is in the range of <NUM> J/sec to <NUM> J/sec. This factor increases the available options for laser systems, and also improves overall throughput.

The process of <FIG> advances to block <NUM> where a dielectric layer is added to the layered device <NUM> of <FIG> to produce a layered device <NUM> as shown in <FIG>. The layered device <NUM> (<FIG>) includes a dielectric layer <NUM> which has been added to fill in the P1 scribes <NUM> and the P2. <NUM> scribe <NUM>.

Then, at block <NUM>, the process of <FIG> performs a P2. <NUM> laser ablation to produce a P2. <NUM> scribe, using the ring shape of the P2. <NUM> scribe as an alignment fiducial for the P2. <NUM> ablation. Accordingly, for ablation systems that require alignment fiducials, as described in more detail below P2. <NUM> scribe <NUM> may be of sufficient size for an ablation tool alignment system to detect and use as an alignment fiducial.

<FIG> present three different embodiments of the geometry of scribe <NUM>, conductive island <NUM>, and targeted area for scribe P2. All depictions are plan views of surface <NUM> of first conducing layer <NUM>, taken from the surface portion <NUM>-<NUM> of <FIG>.

In <FIG>, scribe P2. <NUM> results in an annular scribe <NUM> having a width (or gap) G, that defines a corresponding concentric, circular conductive island <NUM>. While conductive island <NUM> is referred to as "circular," in some embodiments it may be cylindrical, as it has the same thickness of first conducting layer <NUM>. The area to be targeted for a subsequent scribe P2. <NUM> is shown as a hatched, circular area that is smaller than (and concentric with) circular conductive island <NUM>. It is to be understood that the gap G can be tuned as a function of parameters of the scribe operation, as described in more detail below. Moreover, while the diameter of the target area for scribe P2. <NUM> is shown as being approximately one-third the diameter of circular conductive island <NUM>, in practice the difference in diameter can be any differential, so long as the diameter of the P2. <NUM> scribe is less than the diameter of the P2. <NUM> scribe, resulting in an opening completely within circular conductive island <NUM>. In other words, in an embodiment as shown in <FIG>, outer portions of circular conductive island <NUM> remain after scribe P2. This is illustrated in <FIG> as remaining portions <NUM> of conductive island <NUM>.

In <FIG>, scribe P2. <NUM> results in a square scribe 232a having a width (or gap) G, that defines a corresponding concentric, square conductive island 240a. The area to be targeted for a subsequent scribe P2. <NUM> is shown as a hatched, circular area that is smaller than (and concentric with) square conductive island <NUM>. Again, while the width of the target area for scribe P2. <NUM> is shown as being approximately one-third the width of square conductive island <NUM>, in practice this differential can vary so long as the width of the P2. <NUM> scribe is less than the width of the P2. <NUM> scribe, resulting in an opening completely within square conductive island <NUM>. Similarly to the embodiment depicted in <FIG>, in an embodiment as shown in <FIG> outer portions of square conductive island 232a remain after performing scribe P2.

<FIG> is similar to <FIG>, in that scribe P2. <NUM> results in an annular scribe 232b that defines a corresponding concentric, circular conductive island 240b. However, unlike the embodiments shown in <FIG>, in this embodiment the area to be targeted for a subsequent scribe P2. <NUM> is shown as a hatched, circular area that is larger than (and concentric with) circular conductive island <NUM>. While the diameter of the target area for scribe P2. <NUM> is shown as being slightly larger than the diameter of circular conductive island 240b, in practice the difference in diameter can be any differential, so long as the P2. <NUM> scribe results in an opening completely outside circular conductive island 240b. In other words, in an embodiment as shown in <FIG>, circular conductive island <NUM> is substantially ablated during scribe P2. <NUM>, such that (in a cross section otherwise the same as shown in <FIG>) there would be no remaining portions <NUM> of conductive island <NUM> after scribe P2.

<FIG> schematically depicts a layered device <NUM> which represents the layered device <NUM> of <FIG> after the P2. <NUM> laser ablation process steps <NUM> (<FIG>) have been performed, in accordance with embodiments such as those shown in <FIG>. Referring to <FIG>, the P2. <NUM> laser ablation is preferably ablated from the glass side, by passing the laser through the glass <NUM> and TCO layer <NUM> (at a laser frequency that does not cause ablation of these layers), and then into the semiconductor stack <NUM>, the first conducting layer <NUM> (M1) and the dielectric <NUM>, to ablate these layers and produce the P2. <NUM> scribe <NUM>. Alternatively, the P2. <NUM> ablation may be performed from the dielectric side.

The laser scribing operation discussed above locates alignment fiducials by use of projected markers (essentially, by running predictive software that will predict, or "project," where fiducials will be located along the scanned workpiece surface). The projected marker for the P2. <NUM> scribe <NUM> is indicated as a projected circle C1. Once projected circle C1 is correlated to the detected scribe <NUM>, the alignment system then determines the location of scribe <NUM> by correlating projected circle C1 to a reference mark R, via one or more dimensional lengths represented by the single line d1. The projected circle C2 for the P2. <NUM> scribe can then be determined using the reference mark R and similar dimensional length d1. Accordingly, the P2. <NUM> scribe <NUM> is produced using the ring shape of the P2. <NUM> scribe <NUM> as an alignment fiducial for the ablation P2.

<FIG> is a pictorial representation, similar to <FIG>, and showing the P2. <NUM> ablation within the P2. <NUM> scribe. The ring or closed surface of the P2. <NUM> scribe allows for easy detection of the donut ring after the P2. <NUM> ablation is done because there is a contrast between scribe P2. <NUM> and the interior conductive island, as shown in <FIG>. Whereas, if there was just a full ablated circle with no interior conductive island, there would be no contrast presented.

Additionally, in some embodiments, a scribe is performed down to the first conductive layer <NUM> (<FIG>) to produce a P2. <NUM> scribe <NUM>. <NUM> scribe may also be referenced to the P2. <NUM> scribe via the reference mark R and dimensional lengths different from d1, in a manner similar to how the P2. <NUM> scribe was referenced to the P2. <NUM> scribe as described above with reference to <FIG>.

With reference to <FIG>, at block <NUM> a second conducting layer <NUM> (M2) is added to the layered device <NUM> of <FIG> to produce a layered device <NUM> as shown in <FIG>, to form the conducting layer interconnect <NUM>. The layered device <NUM> (<FIG>) includes the P2. <NUM> scribes <NUM>, the P2. <NUM> scribe <NUM>, and a new P3 scribe <NUM> (which may also be located via the reference mark R and dimensional lengths different from d1, in a manner similar to how the P2. <NUM> scribe was referenced to the P2. <NUM> scribe as described above with reference to <FIG>). As illustrated in <FIG>, a portion of second conducting layer <NUM> disposed within P2. <NUM> scribe <NUM> forms a cylindrically shaped interconnect to layer <NUM>. That portion of second conductive layer <NUM> is disposed substantially within, and extends through, circular conductive island <NUM> (depicted in <FIG> as remaining portions <NUM> of circular conductive island <NUM>), and extends through both dielectric layer <NUM> and semiconductor stack <NUM> to TCO <NUM>. As such, the cylindrical shaped interconnect is disposed laterally substantially within the conductive island, is disposed substantially vertically through the conductive island and dielectric layer <NUM> to the TCO <NUM>, and has a diameter that is less than the diameter of circular conductive island <NUM>. As previously described, circular conductive island <NUM> may be cylindrical in shape, due to the thickness of first conductive layer <NUM> from which conductive island <NUM> was formed. In such embodiments, the length of cylindrical conductive island <NUM> is less than the length of the cylindrical shaped interconnect.

According to some embodiments, the shape of the P2. <NUM> ablation is in the form of an annular (ring-shaped) beam. A cross-section of the beam is defined as an area between a first concentric ring and a second concentric ring, where the first concentric ring has a larger diameter than the second concentric ring, and the first and second concentric rings are each substantially circular in shape. <FIG> is a pictorial representation of an annular scribe ring <NUM> produced using a first distance between a focal lens and a diffractive axicon (DA). Likewise, <FIG> is a pictorial representation of an annular scribe ring <NUM> produced using a second distance between a focal lens and the DA, where the second distance is greater than the first distance.

The diffractive axicon includes a first axicon lens with a sharp tip, a second axicon lens with a sharp tip, and a focusing lens that focuses an incident beam at a focal plane. By "sharp tip," we refer to the emitting lens surfaces forming an acute angle at the center of the lens, as opposed to the center of the lens being rounded. The specific angle of the emitting lens surfaces varies (as a function of, for example, lens size, composition, number of emitting surfaces, and polish), and can be any angle that results in generating the imaging described herein. In another embodiment, instead of two axicon lenses, a single binary diffractive axicon lens may be utilized. In yet another embodiment, a single axicon lens may be utilized. The DA is used to generate a Bessel profile, which in turn becomes a ring at the focal plane. In general, the DA fits in a lens tube, and is easy to auto-align with the use of retaining rings. In an alternate embodiment DA alignment does not require the use of retaining rings. The beam focuses to a ring, meaning that the highest fluence occurs when the beam has an annular profile.

Through the use of a laser optic which creates an annular (ring-shaped) beam profile at focus, one can overcome or circumvent many of the issues that arise when attempting to defocus a Gaussian laser beam. The annular scribe rings <NUM>, <NUM> of <FIG> and <FIG>, respectively, may be generated using an appropriate axicon (axially-symmetric conical) optic of the diffractive type, in conjunction with a normal plano-convex focal lens.

The annular scribe ring <NUM> (<FIG>) has an outer diameter <NUM> and an inner diameter <NUM>. Likewise, the annular scribe ring <NUM> (<FIG>) has an outer diameter <NUM> and an inner diameter <NUM>. The inner and outer diameters <NUM>, <NUM> and <NUM>, <NUM>, respectively, of the annular scribe rings <NUM>, <NUM> may be adjusted by placing the DA after the focal lens, and then varying the distance L of the DA from the focal lens. The inner and outer diameters <NUM>, <NUM> and <NUM>, <NUM>, decrease in a substantially linear manner as a function of increasing distance between the DA and the focal lens. The thickness of the annular scribe ring <NUM>, <NUM> can be defined as the difference between one-half of the outer diameter (<NUM> or <NUM>) and one-half of the inner diameter (<NUM> or <NUM>), where one-half of the outer diameter comprises an outer radius and one-half of the inner diameter comprises an inner radius. The thickness of each scribe may be adjusted by varying the input beam diameter. A larger input beam results in a thinner ring, and vice versa. In some embodiments, the outer diameter <NUM>, <NUM> is greater than or equal to <NUM>. In other embodiments, the outer diameter <NUM>, <NUM> is in the range of <NUM> to <NUM>.

Unexpectedly, the inventors also found that the thickness of the annular scribe ring <NUM>, <NUM> varies as a function of the distance L of the DA from the focal lens. As the distance L increases, while the overall ring diameter decreases, ring thickness increases. Pursuant to one set of illustrative examples, when L is <NUM>, ring thickness is approximately <NUM>. This annular ring is illustrated in <FIG>. As L increases to <NUM>, ring thickness is approximately <NUM>. As illustrated in <FIG>, with L set to <NUM>, ring thickness (<NUM>-to-<NUM>) is approximately <NUM>, and ring diameter is approximately <NUM>, when ablated at a pulse energy of 40µJ and duration of 28ns. Then, as shown in <FIG>, when L is increased to <NUM>, ring thickness (<NUM>-to-<NUM>) increases to <NUM>, and ring diameter is approximately <NUM>, when ablated at a pulse energy of 45µJ and duration of 28ns. The relationship between ring thickness and L may also be affected by collimation and/or alignment. Also, the beam may be focused to a smaller area so that the outer edges of the Gaussian have more fluence.

Each of the two concentric rings defining the annular scribe ring <NUM>, <NUM> (<FIG> and <FIG>) is substantially circularly shaped, thereby providing an annular beam profile. In some embodiments, the annular beam profile may be a perfect or near-perfect circle. In other embodiments, the annular beam profile may be in the shape of concentric ovals, concentric rectangles, concentric squares, or concentric polygons. In some embodiments, a peripheral thickness of the annular beam profile, at a point of intersection with the surface of the layered device, is in a range of <NUM> to <NUM>. In some embodiments, the peripheral thickness is <NUM>-<NUM>% of the outer diameter or an outer maximum width of the annular beam profile, at a point of intersection with the layered device <NUM> (<FIG>).

The pulse energy used to generate the annular scribe rings <NUM>, <NUM> of <FIG> and <FIG>, respectively, is significantly decreased from a "full circle" ablation (i.e., no conductive island) due to the total ablated area being smaller (><NUM>% decrease in this application, due to the annular shape), relative to ablating the entire diameter of a circular area. Pursuant to one illustrative example, to make a ~<NUM> P2. <NUM> circular ablation using a defocused Gaussian beam, approximately 150µJ of pulse energy is used. Using the same laser but with the diffractive axicon (DA) installed to make an annular ring instead of a circle, approximately <NUM>µJ to <NUM>µJ is used, or up to approximately <NUM>µJ in other examples. Pursuant to other illustrative examples, approximately <NUM>µJ to <NUM>µJ is used, with a pulse repetition rate of <NUM> to <NUM>, and a distance L of the DA from the focal lens of <NUM> to <NUM>.

Pursuant to other illustrative examples (including those illustrated in <FIG> and <FIG>), the distance L of the DA from the focal lens can be set to a value in the range of <NUM> to <NUM>, or in the range of <NUM> to <NUM>, or in the range of <NUM> to <NUM>. In some embodiments, depth of field (DoF) is in the range of plus or minus <NUM>. In other embodiments, DoF is in the range of plus or minus <NUM>. In still other embodiments, DoF is in the range of plus or minus <NUM>.

In embodiments where the generated laser beam generates an ablation in the shape of an annular scribe ring <NUM>, <NUM> (<FIG> and <FIG>, respectively), or otherwise generates a regular (that is, perfect or near-perfect) closed shape (such as a circle) P2. <NUM> ablation, this feature significantly enhances the ability of computer pattern recognition software to find the center of the annular scribe ring. A similar approach can be adopted for beams that are shaped in the form of other regular, closed shaped ablations such as ovals, rectangles, squares, or polygons. The ability to use pattern recognition software makes meeting the accuracy requirement of ±<NUM> for the placement of P2. <NUM> ablations facile and reliable, as the shape being referenced has a substantially exact, easily-defined center. However, in other embodiments, the annular beam pattern can be used as a fiducial for alignment of any other feature, in addition to or in lieu of performing a P2. <NUM> ablation.

Through the use of the annular scribe ring <NUM>, <NUM> as illustrated in <FIG> and <FIG>, the accuracy and repeatability of scribes placed over device substrates is improved. More specifically, the ability to generate a perfectly (or near-perfectly) circular P2. <NUM> ablation is facilitates hitting the same region on the substrate twice with a laser beam, within an accuracy of ±<NUM> over a <NUM><NUM> area, because the beam has a shape with an exact center. According to another embodiment, the accuracy is within the range of ±<NUM> over a <NUM><NUM> area. According to yet another embodiment, the accuracy is within the range of ±<NUM> over a <NUM><NUM> area. According to still another embodiment, the accuracy is within the range of ±<NUM> over a <NUM><NUM> area. According to some embodiments, the process begins with a P2. <NUM> ablation being performed. As previously discussed with reference to <FIG>, before the P2. <NUM> ablation is made, the position of the center of the P2. <NUM> ablation is referenced using, for example, pattern recognition. This position information is used to accurately place P2. <NUM> ablation entirely within the bounds of the P2. <NUM> ablation. Furthermore, the significant decrease in required pulse energy may improve the processing time required for the P2. <NUM> ablation by allowing higher laser repetition rates to be used. For example, required pulse energy may decrease by <NUM>% or more.

In some embodiments, by the use of annular scribe rings <NUM>, <NUM> (<FIG> and <FIG>) that better optimize P2. <NUM>-to-P2. <NUM> alignment over a wider area of the photovoltaic module, interconnect current collection efficiency is enhanced, resulting in higher module wattages. This approach further opens pathways to realizing manufacturing techniques and precision engineering of photovoltaic cells that would otherwise be limited due to the scribe alignment tolerances required for scale-up. According to some embodiments, the approach of using annular scribe rings may be applied to any thin film device or printed circuit board (PCB) fabrication process.

According to some embodiments, the layered device <NUM> is used to provide a photovoltaic device. The layered device <NUM> includes the semiconductor stack <NUM>. The semiconductor stack <NUM> is formed over a first electrical contact, such as the TCO layer <NUM>. The first conductive layer <NUM> (M1) is formed over the semiconductor stack <NUM>. The conductive island <NUM> is formed in the first conductive layer <NUM> (M1) over the semiconductor stack <NUM>. An interconnect <NUM> is formed through the conductive island <NUM>, where the conductive island <NUM> and the interconnect are isolated from the first conductive layer <NUM> (M1) at the conductive island <NUM>. The interconnect forms an electrical connection with the first contact (such as the TCO layer <NUM>).

According to a further set of embodiments, a portion of the conductive island <NUM> is ablated, leaving behind the remaining portion of conductive island <NUM>. An interconnect is formed through the remaining portion of conductive island <NUM>, where the remaining portion of conductive island <NUM> and the interconnect are isolated from the first conductive layer <NUM> (M1) at the remaining portion of conductive island <NUM>. The interconnect forms an electrical connection with the first contact (such as the TCO layer <NUM>).

According to an example which is not part of the present invention, a photovoltaic device is provided that has a semiconductor stack over a first contact, a conductive island formed in a first conductive layer over the semiconductor stack, and an interconnect formed through the conductive island, wherein the conductive island and the interconnect are isolated from the first conductive layer at the conductive island, and the interconnect forms an electrical connection with the first contact.

According to an example which is not part of the present invention, a conductive device is provided that has a plurality of layers on a substrate, including at least one conductive layer and at least one dielectric layer on the conductive layer, a regular closed shaped island on the dielectric layer, and a cylindrical shaped interconnect disposed laterally substantially within the island and disposed substantially vertically through the island and the dielectric layer to the conductive layer. The regular island can be cylindrical, the vertical length of the cylindrical conductive island being less than the vertical length of the cylindrical shaped interconnect.

According to some embodiments, a method for forming a conductive interconnection is provided. The method includes forming a semiconductor stack <NUM> (<FIG> and <FIG>) over a first contact. A first conductive layer <NUM> (M1) is formed over the semiconductor stack <NUM>. A shaped region of the first conductive layer <NUM> (M1) is ablated from the semiconductor stack <NUM>, wherein a conductive island <NUM> (<FIG>) is formed from the first conductive layer <NUM> (M1) and demarcated by the shaped region (for example, the shape produced by the annular scribe ring <NUM>, <NUM> of <FIG> and <FIG>, respectively). A dielectric layer <NUM> (<FIG>) is formed over the first conductive layer <NUM> (M1), wherein the dielectric layer at least partially fills the shaped region. A passage (P2. <NUM> scribe <NUM>, <FIG>) is formed through the circular conductive island <NUM> of the first conducting layer <NUM> (M1), leaving behind the remaining portion of conductive island <NUM> (<FIG>). The passage extends through the dielectric layer <NUM>, the remaining portion of conductive island <NUM>, and the semiconductor stack <NUM>. The passage is at least partially filled with an interconnect that forms an electrical connection with the first contact (TCO layer <NUM>).

According to an example provided herein and which is not part of the present invention, a photovoltaic device includes a semiconductor stack formed over a first electrical contact. A first conductive layer is formed over the semiconductor stack. A conductive island is formed in the first conductive layer over the semiconductor stack. An interconnect is formed through the conductive island, where the conductive island and the interconnect are isolated from the first conductive layer at the conductive island. The interconnect forms an electrical connection with the first contact. According to some embodiments, the conductive island is produced using an annular scribe.

According to a further set of embodiments, a portion of the conductive island is ablated, leaving behind a remaining portion of the island. An interconnect is formed through the remaining portion of the island, where the remaining portion of the island and the interconnect are isolated from the first conductive layer at the remaining portion of the island. The interconnect forms an electrical connection with the first contact.

According to some embodiments, a method for forming a conductive interconnection is provided. The method includes forming a semiconductor stack <NUM> over a first contact. A first conductive layer is formed over the semiconductor stack. A shaped region of the first conductive layer is ablated from the semiconductor stack, wherein a conductive island is formed from the first conductive layer and demarcated by the shaped region (for example, the shaped region may be produced by an annular scribe ring). A dielectric layer <NUM> is formed over the first conductive layer, wherein the dielectric layer at least partially fills the shaped region. A passage is formed through the conductive island of the first conductive layer, leaving behind the remaining portion of the island. The passage extends through the dielectric layer, the remaining portion of conductive island <NUM>, and the semiconductor stack. The passage is at least partially filled with an interconnect that forms an electrical connection with the first contact.

According to an example which is not part of the present invention, a method for forming a photovoltaic device is provided. A layered device is provided comprising a transparent layer, a transparent conductive oxide layer, a semiconductor stack, and a first conducting layer. <NUM> laser ablation is performed on the first conducting layer down to the semiconductor stack to produce a P2. <NUM> scribe using an annular scribe ring to define a conductive island in the first conducting layer. A dielectric layer is added to the layered device by at least partially filling the P2. <NUM> scribe with dielectric material. <NUM> laser ablation is performed on the dielectric layer, the island, and the semiconductor stack to produce a P2. <NUM> scribe within the P2. <NUM> scribe.

According to an example which is not part of the present invention, a device is provided that has a substrate having at least one conductive layer and at least one dielectric layer disposed thereon, one of the conductive and dielectric layers being over the substrate to form an intermediate layer, and the other one of the conductive and dielectric layers being over the intermediate layer to form an upper layer, and an alignment fiducial island on the upper layer, the alignment fiducial having a regular closed shape. In some embodiments, the island has a shape selected from the group consisting of circles, ovals, rectangles, squares, and polygons.

It is noted that the terms "substantially" and "about" may be utilized herein to represent the inherent degree of uncertainty that may be attributed to any quantitative comparison, value, measurement, or other representation. These terms are also utilized herein to represent the degree by which a quantitative representation may vary from a stated reference without resulting in a change in the basic function of the subject matter at issue.

Claim 1:
A method for forming a conductive interconnection comprising:
forming a semiconductor stack (<NUM>) over a first contact (<NUM>);
forming a first conductive layer (<NUM>) over the semiconductor stack (<NUM>); and
removing a shaped region of the first conductive layer (<NUM>) from the semiconductor stack (<NUM>), wherein a conductive island (<NUM>) is formed from the first conductive layer (<NUM>) and demarcated by the shaped region;
forming a dielectric layer (<NUM>) over the first conductive layer (<NUM>), after the step of removing a shaped region of the first conductive layer (<NUM>) from the semiconductor stack (<NUM>);
forming a passage (<NUM>) through the conductive island (<NUM>) of the first conductive layer (<NUM>), the passage (<NUM>) extending through the dielectric layer (<NUM>), the conductive island (<NUM>) of the first conductive layer (<NUM>), and the semiconductor stack (<NUM>); and
filling the passage (<NUM>), at least partially, with an interconnect (<NUM>) that forms an electrical connection with the first contact (<NUM>).