Patent Description:
A lithographic apparatus is a machine constructed to apply a desired pattern onto a substrate. A lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). A lithographic apparatus may, for example, project a pattern (also often referred to as "design layout" or "design") at a patterning device (e.g., a mask) onto a layer of radiation-sensitive material (resist) provided on a substrate (e.g., a wafer).

To project a pattern on a substrate a lithographic apparatus may use electromagnetic radiation. The wavelength of this radiation determines the minimum size of features which can be formed on the substrate. Typical wavelengths currently in use are <NUM> (i-line), <NUM>, <NUM> and <NUM>. A lithographic apparatus, which uses extreme ultraviolet (EUV) radiation, having a wavelength within the range <NUM>-<NUM>, for example <NUM> or <NUM>, may be used to form smaller features on a substrate than a lithographic apparatus which uses, for example, radiation with a wavelength of <NUM>.

Low-k<NUM> lithography may be used to process features with dimensions smaller than the classical resolution limit of a lithographic apparatus. In such process, the resolution formula may be expressed as CD = k<NUM>×λ/NA, where λ is the wavelength of radiation employed, NA is the numerical aperture of the projection optics in the lithographic apparatus, CD is the "critical dimension" (generally the smallest feature size printed, but in this case half-pitch) and k<NUM> is an empirical resolution factor. In general, the smaller k<NUM> the more difficult it becomes to reproduce the pattern on the substrate that resembles the shape and dimensions planned by a circuit designer in order to achieve particular electrical functionality and performance. To overcome these difficulties, sophisticated fine-tuning steps may be applied to the lithographic projection apparatus and/or design layout. These include, for example, but not limited to, optimization of NA, customized illumination schemes, use of phase shifting patterning devices, various optimization of the design layout such as optical proximity correction (OPC, sometimes also referred to as "optical and process correction") in the design layout, or other methods generally defined as "resolution enhancement techniques" (RET). Alternatively, tight control loops for controlling a stability of the lithographic apparatus may be used to improve reproduction of the pattern at low k<NUM>.

International Patent Application <CIT> discloses a method of obtaining diagnostic information relating to an industrial process. Alignment data or other measurements are made at stages during the performance of the lithographic process to obtain object data representing positional deviation or other parameters measured at points spatially distributed across each wafer. Overlay and alignment residuals typically show patterns across the wafer, known as fingerprints.

In semiconductor manufacture, the Critical Dimension (CD) performance parameter fingerprint can be corrected using a simple control loop. Typically a feedback mechanism controls the average dose per wafer, using the scanner (a type of lithographic apparatus) as an actuator. Similarly, for the overlay performance parameter overlay, fingerprints induced by processing tools can be corrected by adjusting scanner actuators.

Sparse after-develop inspection (ADI) measurements are used as input for a global model used for controlling a scanner (typically run-to-run). Less-frequently measured dense ADI measurements are used for modelling per exposure. Modelling per exposure is performed for fields having large residual, by modelling with higher spatial density using dense data. Corrections that require such a denser metrology sampling cannot be done frequently without adversely affecting throughput.

It is a problem that model parameters based on sparse ADI data typically do not accurately represent densely measured parameter values. This may result from crosstalk that occurs between model parameters and non-captured parts of the fingerprint. Furthermore, the model may be over-dimensioned for such a sparse data set. This introduces a problem that a non-captured fingerprint in run-to-run control is not fully captured by a per-field model. Another problem is erratic sparse-to-dense behavior for distributed sampling, where different wafers (and different lots) have different sampling so that superposing the layouts of many wafers effectively leads to a dense measurement result. There are large residuals between modeled sparse data and densely measured parameter values. This leads to a poor fingerprint description, leading to sub-optimal corrections per exposure.

It is further a problem that for alignment control, only small number of alignment marks can be measured (~<NUM>) during exposure without impacting throughput. High-order alignment control requires denser alignment layout and impacts throughput. A solution to this problem, as shown in <FIG> is to measure denser alignment marks in an offline tool (Takehisa Yahiro et. , "Feed-forward alignment correction for advanced overlay process control using a standalone alignment station "Litho Booster"," Proc. SPIE <NUM>, Metrology, Inspection, and Process Control for Microlithography XXXII) and feed forward this high-order correction during exposure, where low-order corrections are still calculated during exposure.

For overlay control, dense overlay measurements can practically be performed only once in several lots (known as higher-order parameter update) to update the high-order correction. The high-order parameters used to determine the scanner control recipe do not change between higher-order parameter update measurements.

It is desirable to provide a method of determining a correction to a process, that solves one or more of the above-discussed problems or limitations.

Embodiments of the invention are disclosed in the claims and in the detailed description.

In a first aspect of the invention there is provided a method for determining a correction to a process, the method comprising:.

In a second aspect of the invention there is provided a semiconductor manufacturing process comprising a method for determining a correction to a process according to the method of the first aspect.

In a third aspect of the invention there is provided a lithographic apparatus comprising:.

In a fourth aspect of the invention there is provided a lithographic cell comprising the lithographic apparatus of the third aspect.

In a fifth aspect of the invention there is provided a computer program product comprising machine readable instructions for causing a general-purpose data processing apparatus to perform the steps of the method of the first aspect.

In the present document, the terms "radiation" and "beam" are used to encompass all types of electromagnetic radiation, including ultraviolet radiation (e.g. with a wavelength of <NUM>, <NUM>, <NUM>, <NUM> or <NUM>) and EUV (extreme ultra-violet radiation, e.g. having a wavelength in the range of about <NUM>-<NUM>).

The term "reticle", "mask" or "patterning device" as employed in this text may be broadly interpreted as referring to a generic patterning device that can be used to endow an incoming radiation beam with a patterned cross-section, corresponding to a pattern that is to be created in a target portion of the substrate. The term "light valve" can also be used in this context. Besides the classic mask (transmissive or reflective, binary, phase-shifting, hybrid, etc.), examples of other such patterning devices include a programmable mirror array and a programmable LCD array.

<FIG> schematically depicts a lithographic apparatus LA. The lithographic apparatus LA includes an illumination system (also referred to as illuminator) IL configured to condition a radiation beam B (e.g., UV radiation, DUV radiation or EUV radiation), a mask support (e.g., a mask table) MT constructed to support a patterning device (e.g., a mask) MA and connected to a first positioner PM configured to accurately position the patterning device MA in accordance with certain parameters, a substrate support (e.g., a wafer table) WT constructed to hold a substrate (e.g., a resist coated wafer) W and connected to a second positioner PW configured to accurately position the substrate support in accordance with certain parameters, and a projection system (e.g., a refractive projection lens system) PS configured to project a pattern imparted to the radiation beam B by patterning device MA onto a target portion C (e.g., comprising one or more dies) of the substrate W.

In operation, the illumination system IL receives a radiation beam from a radiation source SO, e.g. via a beam delivery system BD. The illumination system IL may include various types of optical components, such as refractive, reflective, magnetic, electromagnetic, electrostatic, and/or other types of optical components, or any combination thereof, for directing, shaping, and/or controlling radiation. The illuminator IL may be used to condition the radiation beam B to have a desired spatial and angular intensity distribution in its cross section at a plane of the patterning device MA.

The term "projection system" PS used herein should be broadly interpreted as encompassing various types of projection system, including refractive, reflective, catadioptric, anamorphic, magnetic, electromagnetic and/or electrostatic optical systems, or any combination thereof, as appropriate for the exposure radiation being used, and/or for other factors such as the use of an immersion liquid or the use of a vacuum. Any use of the term "projection lens" herein may be considered as synonymous with the more general term "projection system" PS.

The lithographic apparatus LA may be of a type wherein at least a portion of the substrate may be covered by a liquid having a relatively high refractive index, e.g., water, so as to fill a space between the projection system PS and the substrate W - which is also referred to as immersion lithography. More information on immersion techniques is given in <CIT>.

The lithographic apparatus LA may also be of a type having two or more substrate supports WT (also named "dual stage"). In such "multiple stage" machine, the substrate supports WT may be used in parallel, and/or steps in preparation of a subsequent exposure of the substrate W may be carried out on the substrate W located on one of the substrate support WT while another substrate W on the other substrate support WT is being used for exposing a pattern on the other substrate W.

In addition to the substrate support WT, the lithographic apparatus LA may comprise a measurement stage. The measurement stage is arranged to hold a sensor and/or a cleaning device. The sensor may be arranged to measure a property of the projection system PS or a property of the radiation beam B. The measurement stage may hold multiple sensors. The cleaning device may be arranged to clean part of the lithographic apparatus, for example a part of the projection system PS or a part of a system that provides the immersion liquid. The measurement stage may move beneath the projection system PS when the substrate support WT is away from the projection system PS.

In operation, the radiation beam B is incident on the patterning device, e.g. mask, MA which is held on the mask support MT, and is patterned by the pattern (design layout) present on patterning device MA. Having traversed the mask MA, the radiation beam B passes through the projection system PS, which focuses the beam onto a target portion C of the substrate W. With the aid of the second positioner PW and a position measurement system IF, the substrate support WT can be moved accurately, e.g., so as to position different target portions C in the path of the radiation beam B at a focused and aligned position. Similarly, the first positioner PM and possibly another position sensor (which is not explicitly depicted in <FIG>) may be used to accurately position the patterning device MA with respect to the path of the radiation beam B. Patterning device MA and substrate W may be aligned using mask alignment marks M1, M2 and substrate alignment marks P1, P2. Although the substrate alignment marks P1, P2 as illustrated occupy dedicated target portions, they may be located in spaces between target portions. Substrate alignment marks P1, P2 are known as scribe-lane alignment marks when these are located between the target portions C.

As shown in <FIG> the lithographic apparatus LA may form part of a lithographic cell LC, also sometimes referred to as a lithocell or (litho)cluster, which often also includes apparatus to perform pre- and post-exposure processes on a substrate W. Conventionally these include spin coaters SC to deposit resist layers, developers DE to develop exposed resist, chill plates CH and bake plates BK, e.g. for conditioning the temperature of substrates W e.g. for conditioning solvents in the resist layers. A substrate handler, or robot, RO picks up substrates W from input/output ports I/O1, I/O2, moves them between the different process apparatus and delivers the substrates W to the loading bay LB of the lithographic apparatus LA. The devices in the lithocell, which are often also collectively referred to as the track, are typically under the control of a track control unit TCU that in itself may be controlled by a supervisory control system SCS, which may also control the lithographic apparatus LA, e.g. via lithography control unit LACU.

In order for the substrates W exposed by the lithographic apparatus LA to be exposed correctly and consistently, it is desirable to inspect substrates to measure properties of patterned structures, such as overlay errors between subsequent layers, line thicknesses, critical dimensions (CD), etc. For this purpose, inspection tools (not shown) may be included in the lithocell LC. If errors are detected, adjustments, for example, may be made to exposures of subsequent substrates or to other processing steps that are to be performed on the substrates W, especially if the inspection is done before other substrates W of the same batch or lot are still to be exposed or processed.

An inspection apparatus, which may also be referred to as a metrology apparatus, is used to determine properties of the substrates W, and in particular, how properties of different substrates W vary or how properties associated with different layers of the same substrate W vary from layer to layer. The inspection apparatus may alternatively be constructed to identify defects on the substrate W and may, for example, be part of the lithocell LC, or may be integrated into the lithographic apparatus LA, or may even be a stand-alone device. The inspection apparatus may measure the properties on a latent image (image in a resist layer after the exposure), or on a semi-latent image (image in a resist layer after a post-exposure bake step PEB), or on a developed resist image (in which the exposed or unexposed parts of the resist have been removed), or even on an etched image (after a pattern transfer step such as etching).

Typically, the patterning process in a lithographic apparatus LA is one of the most critical steps in the processing which requires high accuracy of dimensioning and placement of structures on the substrate W. To ensure this high accuracy, three systems may be combined in a so called "holistic" control environment as schematically depicted in <FIG>. One of these systems is the lithographic apparatus LA which is (virtually) connected to a metrology tool MT (a second system) and to a computer system CL (a third system). The key of such "holistic" environment is to optimize the cooperation between these three systems to enhance the overall process window and provide tight control loops to ensure that the patterning performed by the lithographic apparatus LA stays within a process window. The process window defines a range of process parameters (e.g. dose, focus, overlay) within which a specific manufacturing process yields a defined result (e.g. a functional semiconductor device) - typically within which the process parameters in the lithographic process or patterning process are allowed to vary.

The computer system CL may use (part of) the design layout to be patterned to predict which resolution enhancement techniques to use and to perform computational lithography simulations and calculations to determine which mask layout and lithographic apparatus settings achieve the largest overall process window of the patterning process (depicted in <FIG> by the double arrow in the first scale SC1). Typically, the resolution enhancement techniques are arranged to match the patterning possibilities of the lithographic apparatus LA. The computer system CL may also be used to detect where within the process window the lithographic apparatus LA is currently operating (e.g. using input from the metrology tool MT) to predict whether defects may be present due to e.g. sub-optimal processing (depicted in <FIG> by the arrow pointing "<NUM>" in the second scale SC2).

The metrology tool MT may provide input to the computer system CL to enable accurate simulations and predictions, and may provide feedback to the lithographic apparatus LA to identify possible drifts, e.g. in a calibration status of the lithographic apparatus LA (depicted in <FIG> by the multiple arrows in the third scale SC3).

<FIG> depicts schematically after-develop and after-etch overlay control of a process. Feedback control loops run outside the lithographic apparatus. In control loop design, the following parts play a role.

The horizontal arrows <NUM> represent a substrate's flow through the lithographic process. Several arrows are stacked, representing time, t. Exposure (EXP) <NUM> is followed by after-develop inspection (ADI) overlay measurements <NUM>, <NUM>. Etch (ETC) <NUM> is followed by after-etch inspection (AEI) overlay measurements that are dense and sparse <NUM>, and hyper-dense <NUM>. Sparse measurements <NUM>, <NUM> are used to limit metrology time, with dense measurements <NUM>, <NUM>, <NUM> being performed less frequently as they require more metrology time. After-develop <NUM> measurements using a sparse sampling layout are performed to produce sparse ADI data <NUM> (e.g. <=<NUM> points per wafer). The sparse data is modeled using a certain model (consisting of different sets of parameters; for example Radial Tangential interfield parameters, hyperbolical or exponential edge model or intrafield polynomial model) that describes the process fingerprint <NUM> in a sufficient manner (fingerprint capture) without introducing too much noise. More parameters mean better fingerprint description, but also more noise.

The sparse model result (process fingerprint) <NUM> is averaged over lots (for example using an Exponentially Weighted Moving Average) to reduce the impact of lot-to-lot variation and as such can be used, either directly or via a correction optimization step (OPT) <NUM>, to provide stable corrections that can be applied to the exposure <NUM> of the next lot(s).

The sparse measurement layout is optimized to capture data to the model (reduced normalized model uncertainty) and have uniform spatial coverage. Model uncertainty is typically defined as the relative propagation of measurement error to a modelling (e.g. fitting) error when applying the model to the measurements. A more elaborate explanation of model uncertainty, and more specifically normalized model uncertainty (nMU) (commonly referred to as a G-optimality criterion) is given in paragraph [<NUM>] of US patent application publication <CIT>.

After-etch <NUM> measurements using a sparse or dense sampling layout produce sparse AEI data <NUM>. These after-etch measurement data <NUM> are used to derive a global sparse model result <NUM>. The global sparse model result <NUM> is used to apply a model offset (Metrology To Device, MTD) <NUM> to the after-develop data, via the ADI measurement steps <NUM>, <NUM>. This optional step may be done so that the control is based on reducing after-etch overlay.

Dense after-develop <NUM> or hyper-dense after-etch <NUM> measurements are performed. These measurements are typically not performed for every lot, because of the additionally required metrology effort. The dense data <NUM> (e.g. <NUM>,<NUM> point per wafer) or hyper-dense data <NUM> (e.g. <NUM>,<NUM> points per wafer) is used for further modelling of fingerprints associated with individual exposure fields, for example to enable Corrections Per Exposure (CPE) of the overlay fingerprint. A higher-order modelling (typically a per-field model) is performed for this purpose to provide dense model results <NUM> and hyper-dense model results <NUM>. The assumption is that the higher-order fingerprint may be more stable and as such does not have to be modeled every lot.

To avoid double corrections, the higher order model is determined on the residuals of the lower order model. The lower order model content can be determined on the dense data, which however may lead to a dense-to-sparse mismatch. the regular lower model determination is on sparse data which might give (only when the lower order model does not capture the fingerprint - which is typically the case) a different result then when modeling on dense data. To correct for this, the dense data may be first downsampled to determine the lower order model content. Thus, modelling-per-exposure is based on the residuals of the sparse subsampled data.

The higher-order (modelling-per-exposure) ADI fingerprint <NUM> and higher-order (modelling-per-exposure) AEI fingerprint <NUM> are added (optionally after also being averaged over lots) to the lower-order fingerprint to provide a single correction set via the optimization step (OPT) <NUM>.

The after-etch measurements are of equal or higher density than the after-develop measurements, therefore allowing an even higher order fit.

Additionally or alternatively, the dense data can be collected by means of distributed sampling. Different wafers (and different lots) have different sampling schemes so that superposing the layouts of the sampling schemes of many wafers effectively leads to a dense measurement result. In this case, no separate dense measurement is needed.

There is a sparse-to-dense mismatch problem. The performance of the sparse measurements depends on how well the fingerprint can be described with limited number of sampling points. In case the used model does not fully describe the fingerprint (which is typically the case), then the fingerprint capture will not be as good as when one would use a dense layout.

There is a problem with dense overlay to dense device measurement mismatch. Dense overlay data is not always representative of the overlay between the real product structures on the wafer. The reason being the overlay targets are of inherently different design than product structures and so, have a different response to the optical signals used for metrology. This contributes to metrology to device offset. The inherent noise of metrology device also plays a role in it. If the overlay data can be trained (such as, using electrical measurement as reference) to filter out this offset, a 'cleaner' overlay measurement is possible to control the product overlay.

There is a problem with noise propagation in distributed sampling. This is a form of sparse-to-dense mismatch, but now varying from wafer to wafer, or lot to lot (depending on the type of distribution).

Another problem is that the model used on the sparse data may be over-dimensioned.

Typically a per-field model is used for modelling per exposure (field), which partly will pick-up the sparse-to-dense mismatch, for which it is not designed. A global model could be used, but then the per-field model content is missed. A combination is expensive in terms of metrology need and will show increased noise performance.

Another problem is that modelling per exposure will not capture the higher order content or sparse-to-dense mismatch of each lot.

Dense-to-sparse handling in modelling per exposure in the case of distributed sampling is not optimal except when the same wafers are measured as for the sparse measurement and when the specific sparse layout is used for mismatch handling. A modelling-per-exposure update will in practice not be performed on every lot - even with distributed sampling.

In an embodiment, described below with reference to <FIG> and <FIG>, historical data is used to focus on the sparse-to-dense mismatch to address the abovementioned problems. For example, given a model and sampling layout, the following steps are taken:.

From the historical data sparse overlay measurement is used as trainable dataset and dense overlay data is used as reference dataset.

From application of a model, using an automatic algorithm, which part(s) of the model correction parameters is responsible for significant sparse-to-dense mismatch is evaluated. From that knowledge a set of weight factors are derived which make the sparse-to-dense mismatch minimum for this historical dataset. This adapted model is applied to a future dataset.

<FIG> is a flowchart of a method for determining a correction to a process according to an embodiment. The method has the steps:.

First (historical) sparse data <NUM> is obtained, representing measured values of a parameter across a substrate subject to the process, measured <NUM> using a sparse sampling layout. Examples of parameters are overlay, alignment, focus and dose.

Historical dense data <NUM> is obtained, representing measured values of the parameter across one or more substrate subject to the process, measured <NUM> using a dense sampling layout that is more spatially dense than the sparse sampling layout.

A model <NUM> is applied <NUM> to the sparse data and dense data to determine a sparse-to-dense mismatch.

Second sparse data <NUM> is obtained representing measured values of the parameter across a substrate subject to the process. The second sparse data <NUM> is measured <NUM> using a sparse sampling layout.

The model <NUM> is adapted <NUM> based on the sparse-to-dense mismatch. This may be done by evaluating different contributions of respective parts of the model to the sparse-to-dense mismatch. Weighting <NUM> factors are then determined for weighting the respective parts of the model to reduce, or preferably minimize, the sparse-to-dense mismatch. The model <NUM> is adapted with the weighting factors <NUM>. Determining the sparse-to-dense mismatch may involve training a matrix on the first sparse data and the dense data. In that case, the step of adapting the model based on the sparse-to-dense mismatch then comprises modifying the second sparse data using the matrix.

The adapted model is applied <NUM> to the second sparse data <NUM> to determine a sparse model result <NUM>.

The sparse model result <NUM> may be averaged <NUM> over several lots. A correction to the process is determined <NUM> based on the sparse model result <NUM>.

The correction is then applied to the process to control the process. For example the scanner setting may be adjusted based on the correction, thus controlling the lithographic process.

After-etch inspection or electrical measurements of semiconductor devices <NUM> may be used to determine a metrology-to-device (MTD) model offset <NUM>, which is applied with the determined correction <NUM>. When the MTD between overlay and some other measurement is of concern, the other measurement can be taken as reference dense data <NUM> while the sparse overlay data <NUM> can itself be trained to it.

<FIG> is a flowchart of a method for determining a correction to a process according to another embodiment using distributed dense sampling. Features in common with those of <FIG> have the same reference numerals. The method has the steps:.

First (historical) sparse data <NUM> is obtained, representing measured values of a parameter across a substrate subject to the process, measured <NUM> using a sparse sampling layout.

Second sparse data <NUM> is obtained by downsampling <NUM> second dense data <NUM> representing measured values of the parameter across a plurality of the substrates subject to the process. The dense data <NUM> is measured <NUM> using different sparse sampling layouts distributed over the plurality of substrates.

The adapted model is applied <NUM> to the second sparse data <NUM> to determine a sparse model result <NUM>, <NUM>. The sparse model result comprises sparse model residuals <NUM>.

The model <NUM> is applied <NUM> to the sparse model residuals <NUM> to determine a dense model result <NUM>, which is a modelling-per-exposure fingerprint. The dense model result <NUM> may be averaged <NUM> over several lots.

The sparse model result <NUM> may be averaged <NUM> over several lots. A correction to the process is determined <NUM> based on the sparse model result <NUM> and the dense model result <NUM>.

In embodiments a method is implemented of mapping model parameters associated with fitting sparse parameter data (e.g. sparse ADI overlay, alignment, focus, etc.) to updated model parameters which are better equipped to describe a dense distribution of values of the parameter of interest across the wafer.

For example a matrix may be trained on historical sparse and dense (ADI/AEI) data, the matrix mapping the sparse model parameters to modified sparse model parameters which are better suited to represent densely measured parameter data.

Using the modified model parameter yields smaller residuals between modeled sparse data and densely measured parameter values leading to better fingerprint description (global and per-field model) leading to more optimal corrections-per-exposure (CPE) corrections.

<FIG> depicts results of an example comparing the residual overlay performance of a dense layout for a conventional method and an embodiment. The sparse layout contains <NUM> points where the dense is ~<NUM> points. Wafer maps <NUM> to <NUM> of overlay residuals are shown. Larger residuals are depicted as longer vectors at each point on the wafer. Therefore, darker areas of the wafer maps represent worse residual overlay performance. Using a conventional method (A), decorrected <NUM> and corrected <NUM> results are shown. Using a method (B) in accordance with an embodiment described with reference to <FIG>, decorrected <NUM> and corrected <NUM> results are shown. The box plots <NUM> compare mean <NUM>-sigma overlay (overlay residual) in the x-direction (OVX) and y-direction (OVY) in nm, for the conventional method (A) and the embodiment (B). The embodiment (B) has lower overlay residual than the conventional method (A). This illustrates the advantage of the embodiment.

<FIG> depicts results of an example for distributed sampling. The distributed layout uses a <NUM>-wafer cycle over <NUM> points in each different sparse layout to provide a dense layout (~<NUM> points). Wafer maps <NUM> to <NUM> of overlay residuals are shown, as for <FIG>. Using a conventional method (A), decorrected <NUM> and corrected <NUM>, <NUM> results are shown. Using a method (B) in accordance with an embodiment described with reference to <FIG>, decorrected <NUM> and corrected <NUM>, <NUM> results are shown. The modeling is done in two steps; at a global level <NUM>, <NUM> and from global residuals for a corrections-per-exposure (CPE) model (modelling-per-exposure level) <NUM>, <NUM>.

The box plots <NUM> compare mean <NUM>-sigma overlay (overlay residual) in the x-direction (OVX) and y-direction (OVY) in nm, for the conventional method (A) and the embodiment (B) at the global level (step <NUM>). The embodiment (B) has lower overlay residual than the conventional method (A).

The box plots <NUM> compare mean <NUM>-sigma overlay (overlay residual) in the x-direction (OVX) and y-direction (OVY) in nm, for the conventional method (A) and the embodiment (B) at the modelling-per-exposure level (step <NUM>). The embodiment (B) has lower overlay residual than the conventional method (A). The noise suppression with the embodiment (B) helps at the global level <NUM> already, so the cumulative effect makes the modelling-per-exposure correction even more noise-free at the modelling-per-exposure level <NUM>.

Embodiments may be implemented in a semiconductor manufacturing process comprising a method for determining a correction to the process according to the embodiments described herein.

Embodiments may be implemented in a lithographic apparatus or lithographic cell as described with reference to <FIG>.

Embodiments may be implemented in a computer program product comprising machine readable instructions for causing a general-purpose data processing apparatus (such as LACU in <FIG>) to perform the steps of a method as described herein.

Embodiments actively adapt the overlay model with respect to historical data, suppressing noise from it. Information gathering from historical dataset is used to know more about the interplay of metrology data and model/sampling. Two-step noise suppression in distributed sampling is also provided by embodiments.

If we observe the training result, and determine which parameters are becoming more important and which are becoming irrelevant, we may understand which process tool is malfunctioning and then actively improve the control flow (such as increase the modelling-per-exposure frequency, etc.).

As mentioned above, typically a per-field model is used for modelling per exposure, which partly will pick-up the sparse-to-dense mismatch, for which it is not designed. Embodiments reduce the noise impact for per-field model, which may result in modelling-per-exposure updates with fewer measured points.

Overall, embodiments provide improved process control resulting in process yield performance gain.

Although specific reference may be made in this text to the use of lithographic apparatus in the manufacture of ICs, it should be understood that the lithographic apparatus described herein may have other applications. Possible other applications include the manufacture of integrated optical systems, guidance and detection patterns for magnetic domain memories, flat-panel displays, liquidcrystal displays (LCDs), thin-film magnetic heads, etc..

Although specific reference may be made in this text to embodiments of the invention in the context of an inspection or metrology apparatus, embodiments of the invention may be used in other apparatus. Embodiments of the invention may form part of a mask inspection apparatus, a lithographic apparatus, or any apparatus that measures or processes an object such as a wafer (or other substrate) or mask (or other patterning device). It is also to be noted that the term metrology apparatus or metrology system encompasses or may be substituted with the term inspection apparatus or inspection system. A metrology or inspection apparatus as disclosed herein may be used to detect defects on or within a substrate and/or defects of structures on a substrate. In such an embodiment, a characteristic of the structure on the substrate may relate to defects in the structure, the absence of a specific part of the structure, or the presence of an unwanted structure on the substrate, for example.

Although specific reference is made to "metrology apparatus / tool / system" or "inspection apparatus / tool / system", these terms may refer to the same or similar types of tools, apparatuses or systems. the inspection or metrology apparatus that comprises an embodiment of the invention may be used to determine characteristics of physical systems such as structures on a substrate or on a wafer. the inspection apparatus or metrology apparatus that comprises an embodiment of the invention may be used to detect defects of a substrate or defects of structures on a substrate or on a wafer. In such an embodiment, a characteristic of a physical structure may relate to defects in the structure, the absence of a specific part of the structure, or the presence of an unwanted structure on the substrate or on the wafer.

Although specific reference may have been made above to the use of embodiments of the invention in the context of optical lithography, it will be appreciated that the invention, where the context allows, is not limited to optical lithography and may be used in other applications, for example imprint lithography.

While the targets or target structures (more generally structures on a substrate) described above are metrology target structures specifically designed and formed for the purposes of measurement, in other embodiments, properties of interest may be measured on one or more structures which are functional parts of devices formed on the substrate. Many devices have regular, grating-like structures. The terms structure, target grating and target structure as used herein do not require that the structure has been provided specifically for the measurement being performed. With respect to the multi-sensitivity target embodiment, the different product features may comprise many regions with varying sensitivities (varying pitch etc.). Further, pitch p of the metrology targets is close to the resolution limit of the optical system of the scatterometer, but may be much larger than the dimension of typical product features made by lithographic process in the target portions C. In practice the lines and/or spaces of the overlay gratings within the target structures may be made to include smaller structures similar in dimension to the product features.

Claim 1:
A computer-implemented method for determining a correction to a process, the method comprising:
- obtaining first sparse data (<NUM>) representing measured values of a parameter across one or more substrates subject to the process, measured (<NUM>) using a sparse sampling layout;
- obtaining dense data (<NUM>) representing measured values of the parameter across one or more substrates subject to the process, measured (<NUM>) using a dense sampling layout that is more spatially dense than the sparse sampling layout;
- applying (<NUM>) a model (<NUM>) to the sparse data and dense data to determine a sparse-to-dense mismatch;
- obtaining second sparse data (<NUM>;<NUM>) representing measured values of the parameter across a substrate subject to the process, measured (<NUM>) using a sparse sampling layout;
- adapting (<NUM>) the model (<NUM>) based on the sparse-to-dense mismatch;
- applying the adapted model to the second sparse data to determine a sparse model result (<NUM>); and
- determining (<NUM>) a correction to the process based on the sparse model result (<NUM>).