Patent Description:
The exemplary embodiments generally relate to semiconductor fabrication equipment, and more particularly, to identification of substrate in semiconductor fabrication equipment.

There are various places that a single substrate or a stack of substrates (such as, e.g., wafers, reticles, filmframes, trays, etc.) can be held in semiconductor fabrication equipment. The physical state of the substrate at each of these locations can be one of many, including but not limited to, absent, present, double-slotted, cross-slotted, and shifted/tilted. Generally, the physical state of each substrate at the holding locations is determined (or mapped) to facilitate substrate handling within the semiconductor fabrication equipment.

One example of substrate mapping of a single substrate, such as located on a robotic end effector, includes a vacuum-suction technique where a vacuum suction cup is in contact with the back side of the substrate. By opening a valve on a vacuum line of the end effector, the vacuum pressure level of the suction cup determines the substrate state, which in this case is present or absent (the vacuum-suction technique does not detect substrate shifting). The vacuum-suction technique may result in a false reading when the contact of the substrate with the vacuum suction cup is not tightly sealed. In addition, it takes a few hundred milliseconds of time between activation of the vacuum valve and establishing a steady state vacuum pressure level to obtain a determination of the presence or absence of the substrate on the end effector. As may be realized, a few hundred milliseconds over a number of wafers has a negative impact on substrate throughput through the semiconductor fabrication equipment.

Generally, for mapping a stack of substrates (with gaps separating each of the stacked substrates) held at, for example, a load port in a substrate cassette or carrier, a break-beam technique is employed. Here a light beam extends from a transmitter to a receiver in a direction parallel to the substrate planes. The transmitter and receiver may be referred to as a through-beam sensor. The through-beam sensor is moved up or down along a side of the substrate stack so that the light beam engages and is broken by the substrates (a break in the light beam indicates a presence of a substrate). While the break-beam technique can detect many of the substrate states noted above, the break-beam technique is sensitive to the angle of the light beam relative to the substrate planes such that it is desired the light beam be precision aligned with the substrate planes. Here, extending and retracting the through-beam sensor to and from the substrate holding location takes at least a few seconds and the correlation of beam breaking and beam restoring events for each substrate position generally entails a controlled and slow motion profile of the through-beam sensor, all of which negatively impact substrate throughput.

Both the vacuum-suction and break-beam techniques involve complexity in mechanical design. For example, the vacuum-suction technique employs a vacuum supply to the substrate handling equipment, and involves routing a vacuum line through a substrate transport arm to the end effector. The break-beam technique involves moving parts as well as extension and retraction of the through-beam sensor. This increased complexity increases the costs of manufacturing and servicing the semiconductor processing equipment.

In addition to the above, in advanced semiconductor fabrication technology the substrates are provided with varied thicknesses. The different thicknesses of the substrates pose a challenge to the break-beam technique in determining the map of the substrate holding location. For example, thin substrates may have a thickness that does not completely block the light beam resulting in a false identification of an absent substrate.

Imaging systems have also been employed for substrate mapping; however, in conventional image mapping systems substrates, such as those imaging substrates through a load port opening, images of substrates towards the top (or bottom) of the substrate stack may be distorted or some substrates may be blocked from view by substrates positioned above or below. There may also be an issue with light reflecting off of the substrates and/or an interior of the substrate carrier which reflected light may obscure substrate detection.

Further, in semiconductor fabrication facilities, various types of substrates (as noted above) are transported by substrate transports (e.g., robots) having end effectors on which the substrates are seated for transport. To transport a substrate, the substrate transport extends the end effector into a small space below (or from above for some applications) the substrate (e.g., seated on a substrate seating surface of a substrate carrier, process module, or other suitable substrate holding location) to pick up the substrate. Picking the substrate with the end effector poses no issues where the substrate is flat; however, as noted above, in advanced semiconductor fabrication technology the substrates are provided with varied thicknesses and may not be flat. For example, thinned substrates, reconstructed substrates, and fan-out substrates in advanced packaging may bow/warp up to a few millimeters. The warping of these substrates may prevent an end effector from extending into the small space below (or above) the substrate to pick the substrate up.

The following document is cited as being a pertinent prior art illustration: <CIT> discloses a semiconductor wafer mapping apparatus.

The following additional documents are also mentioned as a complementary prior art illustration:.

The foregoing aspects and other features of the disclosed embodiment are explained in the following description, taken in connection with the accompanying drawings, wherein:.

<FIG>, <FIG>, and <FIG> illustrate exemplary substrate processing apparatus <NUM>, <NUM>, <NUM> in accordance with aspects of the present disclosure. Although the aspects of the present disclosure will be described with reference to the drawings, it should be understood that the aspects of the present disclosure can be embodied in many forms. In addition, any suitable size, shape or type of elements or materials could be used.

Referring to <FIG>, <FIG>, <FIG>, and <FIG>, the aspects of the present disclosure provide a substrate mapping apparatus <NUM> (also referred to herein as a semiconductor wafer mapping apparatus) that includes a machine vision system <NUM> (also referred to herein as an image acquisition system) and at least one illuminator <NUM> (e.g., distributed direct or indirect light source including, but not limited to, LEDs, fluorescent light, flood light, light arrays, etc., or a combination thereof) for performing substrate mapping and/or substrate edge profiling. In accordance with the aspects of the present disclosure the machine vision system <NUM> includes at least one camera <NUM> (or any suitable image acquisition sensor). The at least one camera <NUM> of the machine vision system <NUM> and the at least one illuminator <NUM> are placed at one or more positions to capture images of a substrate stack <NUM> disposed at any suitable location of the substrate processing apparatus <NUM>, <NUM>, <NUM>. In some aspects, the at least one camera <NUM> is a camera array <NUM> (also referred to herein as a camera system or array of cameras) as described herein. A substrate map <NUM> (referred to herein as a map) of the substrates S (also referred to herein as wafers) in the substrate stack <NUM> is determined from, for example, true edge profiles 500T (see <FIG>) (or in some aspects corrected true edge profiles 500TC as shown in, e.g., <FIG>) of substrates S in the substrate stack <NUM> through any suitable analyzation/processing of the captured images of the substrates S in the substrate stack <NUM>. As may be realized from the present disclosure, the substrate mapping apparatus <NUM> disclosed herein overcomes the deficiencies, such as those noted above, of conventional substrate mappers. The substrate mapping apparatus <NUM> of the present disclosure is substantially free of moving parts and can be integrated into any suitable semiconductor fabrication equipment (also referred to herein as substrate processing apparatus), such as substrate processing apparatus <NUM>, <NUM>, <NUM> (or one or more components thereof) while providing opportunity to enhance substrate mapping through software, substantially free from hardware upgrades. As will also be described herein, the aspects of the present disclosure provide for advanced mapping application including, but not limited to, measuring substrate edge profiles that may not be flat.

The aspects of the present disclosure also provide for measuring edge profiles of the substrates S so that a distance TD (see <FIG>) between substrate holding tines 180ET1, 180ET2 of an end effector 180E (see also <FIG>) of a substrate transport <NUM> (See <FIG>) can be adjusted to pick up warped/bowed substrates. Suitable examples of end effectors having adjustable tines can be found in <CIT> and titled "Substrate Processing Apparatus".

Suitable examples of a substrate transport <NUM> in which the end effectors with adjustable substrate holding tines 180ET1, 180ET2 can be incorporated is described in <CIT> and titled "Wafer Aligner".

As will be described herein, the at least one camera <NUM> and the at least one illuminator <NUM> are disposed at positions that capture images of the substrate S or the substrate stack <NUM> across a width of the substrate(s) S. The edge profile of each substrate S is defined from processing the captured images. Based on the edge profiles of the substrate(s), the available space below each substrate S across its width is determined in any suitable manner. The substrate transport <NUM> under control of any suitable controller, such as controller <NUM>, commands adjustment of a distance TD (see <FIG>) between substrate holding tines 180TE1, 180TE2 of the end effector 180E so that the tines extend into regions underneath the warped/bowed substrate S having clearance that allows the end effector 180E to extend under the substrate S.

Generally, as described in greater detail herein, the aspects of the present disclosure employ the at least one camera <NUM> to capture images of outer edges <NUM> of substrates while the substrates are illuminated by the at least one illuminator <NUM>. Here, any suitable controller (such as controller <NUM>) defines the substrate edge profiles from the captured image(s) using any suitable algorithms such as those described herein. A number of data points on the outer edge <NUM> of each substrate imaged by the at least one camera <NUM> is maximized through the employment of distributed and diffused illumination across the substrate width W where multiple exposure techniques (e.g., adjusting exposure speed, aperture, etc.) for different sections of the substrate width are employed. The accuracy of the data points on the outer edge <NUM> of each substrates S is maximized by an algorithm (e.g., which is programmed into the controller <NUM>) that captures and stores the edge profiles of a standard substrate as spatial calibration data <NUM> (as will be described in greater detail herein). At runtime of the substrate mapping apparatus <NUM> for determining the map <NUM> and/or edge profiles, the measured substrate raw profiles are compared against the spatial calibration data <NUM> to determine corrected true profiles 500TC of the substrates S (See <FIG>). The raw profile is the edge profile of a substrate as seen by a respective camera (i.e., the projection of the three-dimensional substrate edge onto the two-dimensional plane of the camera's field of view - see the left-hand side in <FIG> and also <FIG>). The true profile 500T and/or corrected true profile 500TC is what an end effector 180E of a substrate transport <NUM> would "see" when picking a substrate S (i.e., a straight-on projection of the three-dimensional substrate edge onto the plane of extension/retraction of the end effector 180E - see the right-hand side of <FIG> and also <FIG>).

Referring to <FIG>, <FIG>, and <FIG>, the aspects of the present disclosure will be described with respect to substrate processing apparatus <NUM>, <NUM>, <NUM>; however, the aspects of the present disclosure are equally applicable to sorters where multiple carriers <NUM> are coupled to a transfer chamber <NUM> and substrates are moved from one carrier <NUM> to another carrier <NUM> by a substrate transport <NUM> within the transfer chamber <NUM> (e.g., to arrange the substrates in one or more carriers according to a predetermined sequence/order), where there is no substrate process (such as process <NUM>, <NUM>, <NUM>) included in the sorter. Referring to <FIG>, the substrate processing apparatus <NUM> includes a load port <NUM>, a transport chamber <NUM>, and any suitable front end of line process <NUM> (e.g., generally including thin film processes that use vacuum such as etching, chemical vapor deposition, plasma vapor deposition, implantation, metrology, rapid thermal processing, dry strip atomic layer, oxidation/diffusion, forming of nitrides, lithography, epitaxy, or other thin film processes for fabrication of individual semiconductor structures patterned in the semiconductor up to, but not including, the deposition of metal interconnect layers). The load port <NUM> is coupled to a transport chamber <NUM> and is configured to interface any suitable substrate cassette or carrier <NUM> to the transport chamber <NUM>. The transport chamber <NUM> is coupled to the front end of line process <NUM> and includes any suitable opening and/or valves through which substrates are passed between the transport chamber <NUM> and the front end of line process <NUM>.

The transport chamber <NUM> includes substrate transport <NUM> configured to transfer substrates S between the substrate carrier <NUM> and the front end of line process <NUM>. Here the substrate transport <NUM> includes the transport arm 180TA having an end effector 180E for loading and unloading substrates S to and from the substrate carrier <NUM> through an opening <NUM> of the load port <NUM>. As noted above, a suitable example of a substrate transport <NUM> can be found in <CIT> and titled "Wafer Aligner".

For example, referring also to <FIG> and <FIG>, the aspects of the disclosed embodiment will be described with respect to an atmospheric transport robot <NUM> but it should be understood that the aspects of the disclosed embodiment are equally applicable to vacuum transport robots such as those found in the front end of line process <NUM>, the back end of line process <NUM>, and the back end process <NUM>. As may be realized, the substrate transport <NUM> is mounted to a linear slide <NUM> or a boom arm BA (such as described in <CIT> entitled "Substrate Processing Apparatus" so as to be movable in at least the X and/or Y directions while in other aspects the substrate transport so as to be fixed from movement in the X and/or Y directions. The configuration shown is representative for description purposes only and the arrangement, shapes and placement of the illustrated components may be varied as desired without deviating from the scope of the invention which is defined by the appended claims.

As can be seen in <FIG> and <FIG>, in one aspect, the substrate transport <NUM> is movably mounted to a frame <NUM> of the transport chamber <NUM> or in other aspects to a frame of any suitable module of the substrate processing apparatus <NUM>, <NUM>, <NUM>. As may be realized, the frame <NUM> includes one or more openings <NUM> (also referred to herein as a wafer load opening) communicating with the load port <NUM> (also referred to herein as a load station) for the substrate carrier <NUM> that is disposed on the load port <NUM> to hold one or more than one substrate S in a vertically distributed arrangement (as described herein) for loading into the substrate processing apparatus <NUM> (and similarly into the substrate processing apparatus <NUM>, <NUM> described herein) through the opening <NUM>. The substrate transport <NUM> includes a transport arm 180TA (also referred to herein as a movable arm) that, in one aspect, is mounted to a carriage <NUM> so that the transport arm 180TA is movably mounted to the frame <NUM>. The carriage <NUM> is, in one aspect, mounted to the linear slide <NUM> so as to be movable in the X direction while in other aspects the carriage <NUM> is mounted to the frame <NUM> so as to be fixed in the X (and/or Y direction). In one aspect any suitable drive <NUM> is mounted to the frame <NUM> and drivingly connected to the carriage <NUM> by any suitable transmission for moving the transport arm 180TA in the X direction. In this aspect the transmission is a belt and pulley transmission and the drive is a rotary drive but in other aspects the drive <NUM> is a linear actuator that is drivingly connected to the carriage <NUM> with any suitable transmission or without a transmission (e.g. such as where the carriage includes a drive portion of the linear actuator). Here the transport arm 180TA includes a rotational drive <NUM>, a Z-drive column <NUM>, a slide body <NUM> and one or more end effectors 180E. The rotational drive <NUM> is any suitable rotational drive mounted to the carriage <NUM> and the Z drive column <NUM> is mounted to an output of the rotational drive <NUM> so as to rotate in the direction of arrow T about the θ axis (e.g. the θ direction). The slide body <NUM> is movably mounted to the Z drive column <NUM> where the Z-drive column <NUM> includes any suitable drive motor and/or transmission for moving the slide body <NUM> in the Z direction.

The one or more (e.g. at least one) end effectors 180E are movably mounted to the slide body <NUM> in any suitable manner so as to extend and retract in the R direction (noting the R direction rotates about axis θ so that extension of the end effector(s) 180E can be aligned with the X or Y axes or at any suitable rotational angle in the X-Y plane). While two end effectors 180E are illustrated for exemplary purposes only it should be understood that any suitable number of end effectors are mounted to the slide body <NUM>. As may be realized, the one or more end effectors 180E traverse, with the transport arm 180TA as a unit, in a first direction (e.g. one or more of the X, Y and Z directions) relative to the frame <NUM> and traverses linearly, relative to the transport arm 180TA, in a second direction (e.g. the R direction) that is different from the first direction. The slide body <NUM> includes one or more linear drives <NUM> configured to independently move each end effector 180E in the R direction. The one or more linear drives <NUM> are any suitable drive(s) having any suitable transmissions which in one aspect are substantially similar to those described in, for example, <CIT> entitled "Substrate Transport Apparatus".

The end effectors 180E are arranged on the slide body <NUM> so that they are stacked one over the other so as to have a common axis R of extension and retraction. The end effectors may also include any suitable drives for adjusting the distance TD (see <FIG>) between the end effector tines 180ET1, 180ET2 as described in <CIT> and titled "Substrate Processing Apparatus".

The carrier <NUM> may be any suitable carrier <NUM> such as a front opening carrier (illustrated in <FIG> and <FIG> - a suitable example of which is a front opening unified pod (FOUP)) or bottom opening carrier (a suitable example of which is a standard mechanical interface (SMIF) pod). In one aspect, the carrier <NUM> may be substantially similar to those described in <CIT> (titled "Side Opening Unified Pod").

In one aspect, the transport chamber <NUM> has the same atmosphere (e.g., a vacuum atmosphere) as that of the front end of line process <NUM>; while in other aspects the transport chamber has an atmospheric environment and the front end of line process <NUM> includes any suitable load lock for transferring substrates S between the front end of line process <NUM> and the transport chamber <NUM> without degradation of a processing atmosphere of the front end of line process <NUM>.

Referring to <FIG>, the substrate processing apparatus <NUM> includes the load port <NUM> (similar to that described herein), the transport chamber <NUM> (similar to that described herein), and any suitable back end of line process <NUM> (e.g., generally associated with fabrication of metal interconnect layers of the semiconductor structures formed by the front end of line process <NUM> and includes any suitable processing steps after the front end of line process up to and including final passivation layer fabrication). The load port <NUM> is coupled to a transport chamber <NUM> and is configured to interface any suitable substrate carrier <NUM> to the transport chamber <NUM>. The transport chamber <NUM> is coupled to the back end of line process <NUM> and includes any suitable opening and/or valves through which substrates are passed between the transport chamber <NUM> and the back end of line process <NUM>. The transport chamber <NUM> includes substrate transport <NUM> (such as that described above) configured to transfer substrates between the carrier <NUM> and the back end of line process <NUM>. The carrier <NUM> may be any suitable carrier <NUM> such as a front opening carrier (illustrated in <FIG> and <FIG> - a suitable example of which is a front opening unified pod (FOUP)) or bottom opening carrier (a suitable example of which is a standard mechanical interface (SMIF) pod). In one aspect, the carrier <NUM> may be substantially similar to those described in <CIT> (titled "Side Opening Unified Pod").

In one aspect, the transport chamber <NUM> has the same atmosphere (e.g., a vacuum atmosphere) as that of the back end of line process <NUM>; while in other aspects the transport chamber has an atmospheric environment and the back end of line process <NUM> includes any suitable load lock for transferring substrates S between the back end of line process <NUM> and the transport chamber <NUM> without degradation of a processing atmosphere of the back end of line process <NUM>.

Referring to <FIG>, the substrate processing apparatus <NUM> includes the load port <NUM> (similar to that described herein), the transport chamber <NUM> (similar to that described herein), and any suitable back end process <NUM> (e.g., generally including substrate test, substrate backgrinding, die separation, die tests, IC (integrated circuit) packaging, and final test). The load port <NUM> is coupled to a transport chamber <NUM> and is configured to interface any suitable substrate carrier <NUM> to the transport chamber <NUM>. The transport chamber <NUM> is coupled to the back end process <NUM> and includes any suitable opening and/or valves through which substrates S are passed between the transport chamber <NUM> and the back end process <NUM>. The transport chamber <NUM> includes substrate transport <NUM> (such as that described above) configured to transfer substrates between the carrier <NUM> and the back end process <NUM>. The carrier <NUM> may be any suitable carrier <NUM> such as a front opening carrier (illustrated in <FIG> and <FIG> - a suitable example of which is a front opening unified pod (FOUP)) or bottom opening carrier (a suitable example of which is a standard mechanical interface (SMIF) pod) as noted above. In one aspect, the carrier <NUM> may be substantially similar to those described in <CIT> (titled "Side Opening Unified Pod").

Referring to <FIG>, <FIG>, the substrate mapping apparatus <NUM> will be described with respect to one substrate S or a stack of substrates <NUM> held in a substrate carrier <NUM> seated on and engaged with the load port <NUM>; however, in other aspects the one substrate S or stack of substrates <NUM> may be disposed at any suitable location of the substrate processing apparatus <NUM>, <NUM>, <NUM> including, but not limited to, any suitable substrate buffers, substrate aligners, load locks, and any other location where one or more substrates S are held. As described above, the substrate mapping apparatus <NUM> includes at least one camera <NUM> and at least one illuminator <NUM> that are coupled to any suitable controller, such as controller <NUM> the substrate processing apparatus <NUM>, <NUM>, <NUM>. The substrate S or stack of substrates <NUM> is/are illuminated by the at least one illuminator <NUM> as will be described herein so that the at least one camera captures at least one image of the substrate edge(s) illuminated by the at least one illuminator <NUM>. Signals embodying the image are transmitted from the at least one camera <NUM> to the controller <NUM> for processing of the image and to extract (or otherwise determine) the map <NUM> from the image using any suitable image processing algorithms. The map <NUM> is stored in any suitable memory <NUM> of or accessible by the controller <NUM> so that the controller <NUM> can command movement of substrate transport equipment based on a state of the substrate S or each substrate in the substrate stack <NUM> as determined by the map <NUM>. As will be described herein, in one or more aspects a single camera and illuminator pair is employed to image the substrate(s) S and determine the map, while in other aspects more than one camera and/or more than one illuminator are used. In some aspects, such as depending on a substrate type (e.g., thickness, shape, material, etc.) as well as an environment surrounding the substrate (e.g., located within a carrier <NUM>, located within an unenclosed rack, etc.), more than one image of the substrate S or substrate stack <NUM> are taken and analyzed as described herein to determine the map <NUM>. For exemplary purposes only, the description provided herein assumes only a single image is analyzed; however, as noted above more than one image can be compared, superposed, etc. and analyzed in a manner similar to that described herein without departing from the aspects of the present invention which is defined by the appended claims.

Also for ease of explanation, the present disclosure is described with respect to analyzation of substrate stack <NUM>; however, analyzation of a single substrate S is substantially similar to that described herein.

As will be described herein, the map <NUM> is determined or otherwise generated to determine the state of each substrate S in each holding slot of the substrate stack <NUM>. An image of the substrate stack <NUM> is taken with the at least one camera <NUM> and at least one illuminator <NUM> in any suitable location(s) relative to the substrate stack <NUM> so that outer edges <NUM> of the substrates S in the substrate stack <NUM> are captured in the image (see, e.g., image <NUM> in <FIG>). The image is processed by the controller <NUM> in any suitable manner, such as described herein, to identify the outer edges <NUM> of the substrates S, where at least a partial definition of the outer edge <NUM> is performed by the controller <NUM> based on the image.

As noted briefly above, and referring also to <FIG>, for each holding slot of the substrate stack <NUM> (noting that the holding slot(s) (n, n+<NUM>, n+<NUM>,. ; each having a predetermined height relative to a load port reference location as provided for in SEMI® standards) is/are defined by the substrate carrier <NUM> or other substrate support and are arranged to support a respective substrate S in the substrate stack <NUM> with a predetermined distance or pitch between the substrates S) the edge data of each substrate S (see, e.g., <FIG>) is determinative of the state of the substrate S in the holding slot based on the following exemplary substrate mapping rules:.

It is noted that the state of each substrate S in each holding slot together form the map <NUM>.

Referring to <FIG>, <FIG>, <FIG> and <FIG>, in accordance with aspects of the present disclosure, the at least one camera <NUM> is mounted in one or more of a near plane <NUM> and a far plane <NUM>. The near plane <NUM> is adjacent the substrate carrier <NUM> (e.g., seated on the load port <NUM>) while the far plane <NUM> is further away from the substrate carrier <NUM>. The near plane <NUM> is any suitable distance Y1 that is nearest the opening <NUM> of the substrate carrier <NUM> with all of the substrates S stacked within the substrate carrier <NUM> captured in and substantially fill a field of view FOVW of the camera <NUM> fitted with the wide angle lens (see <FIG>). The far plane <NUM> is any suitable distance Y2 that is nearest the opening <NUM> of the substrate carrier <NUM> with all of the substrates S stacked within the substrate carrier <NUM> captured in and substantially fill a field of view FOVT of the camera <NUM> fitted with a telephoto lens (<FIG>). As may be realized, the distances Y1, Y2 can be determined based on a height of the substrate stack <NUM> and a focal length of the respective wide angle lens and telephoto lens. In accordance with the present disclosure, the mounting location of the at least one camera <NUM> in the X direction is substantially along a vertical (Z-axis) centerline <NUM> of the substrate stack <NUM> (not shown in <FIG> for clarity but is substantially coincident with a vertical centerline of the substrate carrier <NUM>); however, in other aspects the at least one camera <NUM> can be mounted on one or more sides (e.g., to the left or right) of the vertical centerline <NUM>. The mounting location of the at least one camera <NUM> in the Z direction may be substantially in-line with a horizontal center plane <NUM> (the X-Y plane) of the substrate carrier <NUM>; however, in other aspects the at least one camera <NUM> can be mounted above or below the center plane <NUM>. <FIG> illustrates a single camera <NUM> mounted in-line with the horizontal center plane <NUM> while <FIG> illustrates a camera 210B mounted at the horizontal center plane <NUM>, a camera 210A mounted above the horizontal center plane <NUM>, and a camera 210C mounted below the horizontal center plane <NUM> (noting that <FIG> are generic with respect to near plane <NUM> and far plane <NUM>). In other aspects more or fewer cameras may be used. The one or more cameras described herein are generally referred to as at least one camera <NUM> (which is inclusive of a single camera or a system/array of cameras 210A, 210B, 210C, etc.).

In one or more aspects, at least one of the at least one camera <NUM> is mounted at the lower center location LC so as to image the substrate stack <NUM> in an angled upwards direction. In lower center location LC the resulting image substantially eliminates background noise due to, for example, environmental reflections (such as from the interior of the carrier <NUM>) and/or top surfaces of the substrates which may include the die grip patterns. Here the substrates are illuminated from one or more of the locations (e.g., upper left UL, upper center UC, upper right UR, middle left ML, middle center MC, middle right MR, lower left LL, lower center LC, and lower right LR). In one or more aspects, at least one of the at least one camera <NUM> is mounted at the upper center location UC where the substrate stack is illuminated from one or more of the lower locations LL, LC, LR and middle locations ML, MC, MR so that at least background noise from or imaging of the top surface of the substrate is suppressed (e.g., the top surfaces of the substrate are cast in shadow in a manner similar to that described in <CIT> and titled "Method and Apparatus for Substrate Alignment").

In one or more aspects, at least one of the at least one camera <NUM> is mounted at the middle center location MC where the substrate stack <NUM> is illuminated from one or more of the lower locations LL, LC, LR to suppress at least background noise from or imaging of the top surface of the substrates S. In still other aspects, the at least one camera <NUM> may be located at any number and combination (such as where the at least one camera <NUM> comprises more than one camera) of the mounting locations UL, US, UR, ML, MC, MR, LL, LC, LR on the near plane <NUM> and/or far plane <NUM>; however, where the at least one camera <NUM> is mounted at the middle center location MC on the near plane <NUM> the at least one camera <NUM> is mounted to a load port door 120D of the load port so that the at least one camera is moved with the load port door from a substrate transfer path to and from the substrate cassette <NUM>. Here, the at least one camera <NUM> images the substrate stack <NUM> (with one or more images) as the load port door 120D moves to open and close the load port/substrate carrier.

Referring to <FIG> and <FIG>, the at least one camera <NUM> is mounted to a fixed location within an interior of the substrate processing apparatus <NUM>, <NUM>, <NUM> (so as to be stationary with respect to the substrate stack <NUM>) (See <FIG>). The at least one camera <NUM> can also be mounted to a movable component (e.g., the load port door 120D and/or substrate transport <NUM>) of the substrate processing apparatus <NUM>, <NUM>, <NUM> (See <FIG>). Here the movable component positions the at least one camera <NUM> in the desired location UL, US, UR, ML, MC, MR, LL, LC, LR on the near plane <NUM> and/or far plane <NUM> for imaging the substrate stack <NUM>. <FIG> illustrates an example, where the camera array <NUM> including more than one camera 210A, 210B, 210C is located on the substrate transport <NUM>. Here, the camera array <NUM> is located on a common support <NUM> (which in this aspect is the Z-drive column <NUM>) of the substrate transport <NUM> (where the "common support" refers to a single support to which each camera in the camera array <NUM> is mounted so that the cameras share the single support); however, in other aspects, where stationarily mounted in the transfer chamber <NUM> the camera array <NUM> may be mounted to any common support of the substrate processing apparatus <NUM>, <NUM>, <NUM>, and where movably mounted the camera array can be mounted to any movable structure of the substrate processing apparatus <NUM>, <NUM>, <NUM>. Each camera 210A, 210B, 210C is fixed to (or fixed with respect to) the common support <NUM>. The common support <NUM> is static with respect to each camera 210A, 210B, 210C of the camera array <NUM> (i.e., there is no relative movement between the cameras 210A, 210B, 210C and the common support).

In one aspect, any suitable camera controllers <NUM> are located on the substrate transport <NUM> and are coordinated by any suitable controller, such as controller <NUM>; while, in other aspects the camera controllers <NUM> are incorporated into controller <NUM>. In one or more aspects, the at least one illuminator <NUM> is mounted to the substrate transport <NUM> or in a stationary location within the substrate processing apparatus <NUM>, <NUM>, <NUM>.

Where the at least one camera <NUM> and, in some aspects, the at least one illuminator <NUM> is/are mounted to the substrate transport <NUM>, the substrate transport <NUM> transports the at least a portion of the machine vision system <NUM> to any desired location within the substrate processing apparatus <NUM>, <NUM>, <NUM> at which a substrate stack <NUM> is held. Mounting the at least one camera <NUM> and, in some aspects, the at least one illuminator <NUM> to the substrate transport <NUM> may decrease the number of cameras and illuminators (such as where the substrate processing apparatus <NUM>, <NUM>, <NUM> has multiple load ports at which substrate carriers <NUM> are held and substrate stacks <NUM> are mapped) and may provide for optimal positioning (e.g., unobstructed fields of view on the near plane <NUM> and/or far plane <NUM> at any one or more of the locations UL, US, UR, ML, MC, MR, LL, LC, LR) of the at least one camera <NUM> and at least one illuminator <NUM> regardless of the construction of the robotic environment (i.e., the interior of the substrate processing apparatus <NUM>, <NUM>, <NUM>).

In the example illustrated in <FIG> (see also <FIG> and <FIG>), each respective camera 210A, 210B, 210C is disposed on the Z-drive column <NUM> of the substrate transport <NUM> so that the fields of view FOVA, FOVB, FOVC extend in a direction parallel to or along the center plane <NUM> of the substrate carrier <NUM> (e.g., perpendicular to an extension axis of the substrate transport end effector). Here the fields of view FOVA, FOVB, FOVC are positioned on the Z-drive column <NUM> (i.e., the common support <NUM>) to view, through the opening <NUM> with the Z-drive column <NUM> positioned by the transfer arm 180TA (<FIG>) at a common position CP (see <FIG> - where the "common position" refers to a single position of the substrate transport so that the cameras 210A, 210B, 210C mounted to the common support <NUM> are dependent from the single position of the common support <NUM>) relative to the opening <NUM>, a different separate part (see, e.g., regions RA, RB, RC in <FIG>, and a representative region of interest (i.e., any one of the regions RA, RB, RC) in <FIG>) of the substrate carrier <NUM>. Each different separate region RA, RB, RC has substrate slots for holding at least one or more than one substrates S, separate and different from parts of the substrate carrier <NUM> with different substrate holding slots for holding substrates S different than the at least one or more than one substrates S in regions/parts viewed by each other camera 210A, 210B, 210C with the Z-axis drive <NUM> at the common position CP. Each substrate S held in the substrate carrier <NUM> is imaged by camera array <NUM> with the Z-axis drive <NUM> at the common position CP. In some aspects, each of the corresponding different separate parts is imaged by but one respective camera 210A, 210B, 210C of the camera array <NUM> (although the fields of view may overlap the images may be cropped so that each of the corresponding different separate part is imaged by but one respective camera 210A, 210B, 210C; while in other aspects the fields of view do not overlap). In some aspects, at least one substrate S held in the corresponding wafer slot of the corresponding different separate part is imaged by but one of the respective camera 210A, 210B, 210C of the camera array <NUM> (again noting that although the fields of view may overlap the images may be cropped so that each of the corresponding different separate part is imaged by but one respective camera 210A, 210B, 210C; while in other aspects the fields of view do not overlap). Here, the controller <NUM> is communicably coupled to the transport arm 180TA to move the transport arm 180TA relative to the frame <NUM> (see <FIG>) and position the common support <NUM> at the common position CP.

Each different separate part of the substrate carrier <NUM> and substrate stack <NUM> therein viewed by the respective camera 210A, 210B, 210C of the camera array <NUM>, has a different set of wafer slots, corresponding to the separate part and the respective camera 210A, 210B, 210C, vertically distributed at predetermined reference heights viewed by the respective camera 210A, 210B, 210C. The predetermined reference heights are those corresponding to the different holding slot numbers (in this example, for a <NUM> slot substrate carrier) established by SEMI® standards for substrate carriers from, for example, a reference location of the load port <NUM> on which the substrate carrier <NUM> is seated. For example, each field of view FOVA, FOVB, FOVC of the respective camera 210A, 210B, 210C captures respective region of interest RA, RB, RC of an interior <NUM> of the substrate carrier <NUM> (and of the substrate stack <NUM> therein). In one or more aspects, an image captured by each respective camera 210A, 210B, 210C of the corresponding different separate part excludes each other different separate part viewed by each other respective camera 210A, 210B, 210C, and each substrate in each slot in the substrate carrier <NUM> is imaged by the camera array <NUM> with the common support <NUM> at the common position CP. In this example, the substrate carrier <NUM> is a <NUM> substrate carrier and region of interest RC corresponds to holding slots <NUM>-<NUM>, region of interest RB corresponds to holding slots <NUM>-<NUM>, and region of interest RA corresponds to holding slots <NUM>-<NUM>. The fields of view FOVA, FOVB, FOVC may overlap any desired amount to provide substantially complete coverage of the interior <NUM> (which in some aspects may increase the amount of image information and increase resolution of the resulting map <NUM>); while in other aspects, as described herein, the fields of view may not overlap or be cropped for image processing. In this aspect, image processing is performed as described herein for each image captured by respective camera 210A, 210B, 210C where the controller <NUM> combines the respective processed images to generate the map <NUM> of the substrate stack <NUM> within the substrate carrier <NUM>.

While the cameras 210A, 210B, 210C in <FIG> are illustrated one above the other (e.g., in locations UC, MC, LC) in other aspects, (which also apply to stationarily mounted cameras) may be mounted in any number of the locations UL, US, UR, ML, MC, MR, LL, LC, LR so as to form one dimensional vertical (in the Z direction) camera arrays, one dimensional horizontal (e.g., in the X direction) camera arrays, or a two dimensional arrays of cameras (e.g., in the X-Z plane). As may be realized, generally for round shaped substrates, the far left side FL and far right side FR (see <FIG>) of the substrates when viewed through the opening <NUM> may be dimmer in illumination as the substrate outer edge <NUM> curves away from the at least one camera <NUM>. Where the edge signal obtained by the at least one camera <NUM> falls below any suitable predetermined threshold, additional images of the substrates can be taken with longer exposure times and/or with a larger camera aperture. As may be realized, the longer exposure times and/or larger aperture may cause overexposure of a center region WC of the substrate in the image, where several images (low exposure and high exposure images) are combined using any suitable image processing algorithms including, but not limited to, high dynamic range (HDR) algorithms, or combining different vertical segments of the different images to produce a resulting image that has a uniform exposure that highlights the substrate edges <NUM>. As such, cameras located in different ones of the locations UL, US, UR, ML, MC, MR, LL, LC, LR may be programmed with different aperture sizes and or exposure speeds that are optimized for different regions of the substrate stack/substrate carrier. For example, cameras closer to the at least one illuminator <NUM> may have a slower exposure speed and/or smaller aperture than cameras further from the at least one illuminator <NUM> so as to substantially prevent overexposure of the image which may prevent substrate edge detection. As may be realized, the exposure speeds and/or aperture sizes of the cameras in the different locations may be determined such that the resulting combined image has a consistent exposure and contrast of features in the image substantially throughout the image (see.

Referring to <FIG>, <FIG>, and <FIG>, the substrates S are illuminated by at least one illuminator <NUM> (also referred to herein as an illumination source) and the images are captured by the at least one camera <NUM> in a manner such that the signal in the image corresponding to the substrate edge <NUM> is maximized and the signal in the image corresponding to the background (including the environment surrounding the substrate S, the top/bottom of the substrate S, any die grid pattern on the substrates S, etc.) is minimized to, for example, produce a high contrast image that emphasizes the edge <NUM>. One example, of high contrast imaging is described in <CIT>.

As will also be described herein, the at least one illuminator is configured to provide diffused illumination across a width W of the each substrate(s) S (when viewed from a minor side of the substrate - see, e.g., <FIG> where the width W is a visible width of the substrate(s) S held in a substrate holding location). As may be realized, the at least one illuminator <NUM> may be positioned within the substrate processing apparatus <NUM>, <NUM>, <NUM> in a manner substantially similar to that described herein with respect to the cameras <NUM>, 210A, 210B, 210C.

As an example, referring to <FIG>, <FIG>, <FIG>, <FIG>, and <FIG>, the at least one illuminator <NUM> is connected to the common support <NUM> and is/are configured to illuminate, through the opening <NUM> with the common support <NUM> in the common position CP, an outer edge <NUM> (see <FIG>) (the term "outer" being with respect to the substrate carrier <NUM> and refers the a portion of the substrate edge that is visible through the opening <NUM>) of each substrate S in the substrate carrier <NUM>. The outer edge <NUM> delineates upper and lower edge boundaries 233U, <NUM> (see <FIG>) of the outer edge <NUM> of the respective substrate S. The at least one illuminator <NUM> is disposed with respect to each camera <NUM>, 210A, 210B, 210C so that the outer edge <NUM> directs reflected edge illumination, from the at least one illuminator <NUM>, at the camera <NUM>, 210A, 210B, 210C, and optically blanks, at the upper edge boundary 233U and the lower edge boundary <NUM>, background reflection light, viewed by each camera <NUM>, 210A, 210B, 210C through the opening <NUM> with the common support <NUM> at the common position CP. The at least one illuminator <NUM> is disposed relative to a respective camera 210A, 210B, 210C so that reflected light from planar surfaces SP1, SP2 (e.g., the top and bottom major planar surfaces) of the substrate S and each other substrate S slotted in (or otherwise held in) the substrate carrier <NUM> are optically blanked in each image (see for example, the image illustrated in <FIG> and <FIG>) by the respective camera 210A, 210B, 210C of the different separate part of the substrate carrier <NUM>. For example, the region of interest in <FIG> is illustrative of any one or more of regions RA, RB, RC in <FIG> (see also <FIG>) where the image from each camera 210A, 210B, 210C images (although the field of view may be larger than the captured image) a portion of the respective field of view FOVA, FOVB, FOVC in which the reflected light from the planar surfaces SP1, SP2 of the substrate S (and any background of the carrier) and each other substrate S in the substrate carrier <NUM> are optically blanked. Here, the outer edge <NUM> of the substrate S defines or otherwise delineates the upper and lower edge boundaries 233U, <NUM> in relief in image contrast (see, e.g., <FIG>), formed by and between the edge reflection and the optically blanked background, registered by each camera <NUM>, 210A, 210B, 210C so as to effect edge detection of each substrate S in the substrate carrier <NUM> with the common support <NUM> at the common position CP.

As illustrated in <FIG> and <FIG>, in one aspect, the at least one illumination source <NUM> is at least one shaped line of illumination <NUM>. In the examples illustrated, the shaped line of illumination <NUM> is disposed in the near plane <NUM> in one or more of the upper and lower locations; however, in other aspects the shaped line of illumination <NUM> can be disposed in the far plane <NUM> in one or more of the upper and lower locations or in the middle location of one or more of the near plane <NUM> and far plane <NUM>. The shaped line of illumination <NUM> has a shape that corresponds with the outer edge <NUM> of the substrates S held within the substrate carrier <NUM>; however in other aspects the shaped line of illumination <NUM> may have any suitable shape for illuminating the substrates S in the manner described herein.

Referring to <FIG> and <FIG>, the at least one illuminator <NUM> includes at least one vertically (Z-axis) oriented illuminator 220V1, 220V2 and at least one horizontally (in the X-Y plane) oriented illuminator <NUM>. Here the cameras 210A, 210B, 210C (though three are shown, there may be <NUM> or more cameras, imaging two or more different separate carrier regions) are arranged in the upper center location UC, middle center location MC and lower center location LC (see <FIG> and <FIG>) and are straddled by two illuminators 220V1, 220V2 that extend respectively from the upper right location UR to the lower right location LR and from the upper left location UL to the lower left location LL so as to form two straight lines of illumination. The illuminator <NUM> is located above the cameras 210A, 210B, 210C so as to illuminate the outer edge <NUM> of each substrate S from any suitable angle β (in the example illustrated in <FIG> the angle β is relative to the X-Y plane but in other aspects the angle may be relative to the Z axis). Here, the illuminator <NUM> is positioned to illuminate the substrates S so that the cameras 210A, 210B, 210C detect substrates S1 that are slid out from the carrier <NUM> while the illuminators 220V1, 220V2 illuminate the outer edges <NUM> in a manner so as to substantially prevent or otherwise blank background reflections (e.g., from the interior of the carrier, the top of the substrates, or the bottom of the substrates).

In one aspect, referring also to <FIG>, the illuminators 220V1, 220V2 are arranged to direct diffuse light in any suitable direction (i.e., at any suitable angle) in the X-Y plane for illuminating the edges <NUM> of the substrates S through the opening <NUM> (see <FIG>). For exemplary purposes, as illustrated in <FIG>, the illuminators 220V1, 220V1 are arranged to shine the diffuse light in one or more directions that are oblique to a plane 888P of the opening <NUM>. In the example shown the illuminators shine the light in a direction that is angled outward relative to a centerline 110C of the substrate carrier <NUM> by any suitable angle α. In the example, shown the angle α is the same for both illuminators 220V1, 220V2; however, in other aspects the angle α for illuminator 220V1 may be different than the angle α for illuminator 220V2. Here, the light from the illuminators 220V1, 220V2 is arranged vertically so that the light reaches substrates S in all of the substrate holding slots of the substrate carrier <NUM> and is not blocked by vertically adjacent substrates. In this aspect, the light from the illuminators 220V1, 220V2 is directed towards reflective surfaces <NUM>, <NUM> within the transfer chamber <NUM> so that the light is reflected (now indirect light) onto the edges <NUM> of the substrates S by the reflective surfaces <NUM>, <NUM> to substantially eliminate reflections from the interior of the substrate carrier <NUM> as seen by the cameras 210A, 210B, 210C. In other aspects the illuminators 220V1, 220V2 are provided with diffusers or other light scattering devices that provide indirect or diffuse light to the substrate edges <NUM> in a manner that substantially eliminates reflections from the interior of the substrate carrier <NUM> as seen by the cameras 210A, 210B, 210C. The resultant effect imaged by each of the cameras 210A, 210B, 210C in the corresponding different separate regions/parts RA, RB, RC, is that the substrate edge reflection optically blanks the background defining the boundaries of each substrate edge in relief in image contrast.

The illuminators <NUM>, 220V1, 220V2, <NUM>, <NUM> are, in one or more aspects, coupled to the controller <NUM> so as to be dynamically controlled (e.g., turned on and off) and/or adjusted (e.g., in intensity). The controller <NUM> is configured to cycle one or more of the illuminators <NUM>, 220V1, 220V2, <NUM>, <NUM> or a portion(s) thereof so as to separately or in combination illuminate different portions of the substrate stack <NUM> (e.g., separate illuminate the top section, the bottom section, the middle section, or any combination thereof such as substantially simultaneously illuminating both the top and middle sections, both the top and bottom sections, or illuminate one or more of the different sections in any suitable sequence where the sections are illuminated either separately or in combination) being imaged. The controller <NUM> is configured to maintain an intensity of illumination from one or more of the illuminators <NUM>, 220V1, 220V2, <NUM>, <NUM> as static (e.g., a substantially constant intensity) or dynamically vary the intensity. Where the intensity of one or more of the illuminators <NUM>, 220V1, 220V2, <NUM>, <NUM> is dynamically varied the intensity may vary along the X direction, the Y direction, and/or the Z direction of the illuminators <NUM>, 220V1, 220V2, <NUM>, <NUM>, including on different illumination intensity on different sides of the cassette <NUM>. In one or more aspects, the dynamic variation in intensity may be regular (e.g., in a regular sequence such as high-low where the illumination is high at a reference line (e.g., baseline) for each slot of the cassette <NUM> and decreases (e.g., low) away from the slot reference line, for each reference line. In other aspects, the illumination may be dynamically varied irregularly such as high-high-high-low at respective slot reference lines in a series of slot reference lines. Further, different types of light spectrum may be employed by the different illuminators <NUM>, 220V1, 220V2, <NUM>, <NUM> (e.g., infrared, visible white, visible color, etc.) to enhance image contrast. Each illuminator <NUM>, 220V1, 220V2, <NUM>, <NUM> may be controlled by the controller <NUM> independently for one or more of intensity and light spectrum.

Referring now to <FIG>, <FIG>, <FIG>, and <FIG>, the images (e.g., a final image, original image, or re-combined image) is processed by the controller <NUM> to define the edge profile of the outer edges <NUM>. As may be realized, any suitable image processing can be applied to the images to enhance contrast of the outer edges <NUM> of the substrates <NUM> relative to background. Examples of image processing that can be applied to the images to enhance contrast include, but are not limited to, grey scale filters, contrast stretching, and intensity transition edge filters. An example application of an intensity transition edge filter is provided in <FIG>, where each outer edge <NUM> is identified with two intensity transitions (e.g., representing the upper and lower edge boundaries 233U, <NUM> of each substrate). As can be seen in <FIG> two substrates disposed one top of the other (i.e., the "double" state) are located in substrate holding slot <NUM> of the substrate carrier <NUM>.

The substrate edge profiles are produced (through any suitable edge construction/image processing algorithm(s)) in a raw view/profile. The spatial correction algorithm is applied to the raw profiles using the spatial calibration data to produce the true substrate edge profiles (employed by the controller when commanding position of the end effector 180E for picking substrates S) that are independent of a position of the at least one camera <NUM>. Here, multiple camera optical recognition systems (such as described herein) produce substantially identical true profiles 500T from the different raw profiles in the images taken by the different cameras.

The edge defining algorithm programmed into the controller <NUM> is the same for substrate mapping and edge profile defining. In one or more aspects, vertical image slices <NUM>-<NUM> of an image are analyzed to detect the outer edge <NUM>. Substrate mapping may be performed with one or more of the vertical slices <NUM>-<NUM>, where edge profile defining is performed with more than one of the vertical slices <NUM>-<NUM>. It is noted that seven vertical slices are illustrated in <FIG> for exemplary purposes only and in other aspects more or less than seven slices (or two or three slices) may be employed. To define the edges <NUM> of the substrates S for mapping and edge profiling an image <NUM> is sliced into the vertical slices <NUM>-<NUM>, which are narrow vertical strips of the image <NUM> taken at predetermined locations relative to a width 499W of the image <NUM>. For each slice <NUM>-<NUM> the controller <NUM> averages an intensity of the image pixels along the horizontal direction <NUM> (the terms horizontal and vertical being used or reference and ease of explanation only) to produce an intensity profile <NUM> as a function of the vertical position within the slice <NUM>-<NUM>. The intensity profile <NUM> for, e.g., slice <NUM> is illustrated in <FIG> for a portion of the substrate stack, where each substrate edge <NUM> (corresponding to outer edge <NUM>) is identified by a peak <NUM> (only some of which are labeled in <FIG> for clarity) over background levels <NUM>. A thickness of each substrate S can be determined based on a width of a respective peak base where as can be seen in <FIG> the peak base of the peak corresponding to slot <NUM> in the substrate stack <NUM> has a width that is roughly twice the expected thickness of a substrate S (where the pixel size of the image can be converted to inches or millimeters by controller <NUM> in any suitable manner such as through image recognition of substrate cassette features having known sizes), which is indicative of two substrates S, one on top of the other, in the same slot (e.g., the "double" state illustrated in <FIG>). As can also be seen in <FIG>, the peak <NUM> corresponding to slot <NUM> comprises a "double peak" that is also indicative of two substrates S, one on top of the other, in the same slot.

With the intensity profile <NUM> established and the peaks <NUM> determined, for each substrate slot, the controller <NUM> searches for/determines which peaks are vertically located closest to a predetermined baseline height for the respective substrate holding slot (a predetermined vertical position within the cassette at which a substrate is to be held, i.e., a slot height). Here the peaks are correlated with the substrate slot heights so as to determine if a substrate is held in the respective substrate holding slot. Where a peak is found and correlated to a substrate holding height, the positions along the peak in the intensity profile <NUM> form a raw edge profile of the substrate in the respective substrate holding slot. For example, the height of slot <NUM> is identified in <FIG>, where the peak 489A is substantially centered relative to the slot <NUM> height such that the controller <NUM> correlates peak 489A with slot <NUM> to indicate that a substrate is present in slot <NUM>. The true edge profile 500T (<FIG>) of any given substrates S is determined by the controller <NUM> by subtracting the vertical position of the calibrated base lines (at the horizontal position of the image slice) from the vertical position of the raw profile (for that given substrate S at the same horizontal position of the image slice) for each data point (of the raw profile) in the intensity profile <NUM>. The thickness of the given substrate S is determined by the controller <NUM> to be the mean of the thickness measured from all data points on the respective raw profile.

In one or more aspects, referring to <FIG>, <FIG>, and <FIG>, the edge defining algorithm includes dividing (e.g., with controller <NUM>) the raw images from the at least one camera <NUM> into a middle region <NUM>, a left region <NUM>, and a right region 600R. The left region <NUM> is illuminated substantially by illuminator 220V2, the right region 600R is illuminated substantially by illuminator 220V1, and the center region <NUM> is illuminated substantially by illuminator <NUM>; however, in other aspects the regions <NUM>, <NUM>, 600R may be illuminated in any suitable manner by any one or more of the illuminators described herein. Here, the above-noted states are determined (e.g., in a manner similar to that described above with respect to image intensity profiles) for each of the middle region <NUM>, the left region <NUM>, and the right region 600R. Substrates that are disposed below (or above depending on the camera and/or lighting angles) a substrate that is slid out of the substrate carrier <NUM> may be hidden from view by the slid out substrate and may not be detected in the middle region <NUM> but those hidden substrate are detectable in the left region <NUM> and the right region 600R (see <FIG>). As illustrated in <FIG>, the fourth substrate (or wafer) from the top of the image (identified as the "detected wafer (slid out)") has slid out of the substrate carrier <NUM> and is blocking light from shining on substrates below the slid out substrate in the middle region <NUM>; however the substrates below the slid out substrate are visible in the left region <NUM> and the right region 600R. Here a substrate for any given slot is detected (i.e., identified as present) when that substrate is detected in both of the left region <NUM> and the right region 600R for that given slot as illustrated in <FIG>. Reflections detected in the middle region <NUM> but in the left region <NUM> and right region 600R for any given slot are mapped as being absent (e.g., an empty slot) (see <FIG>). As can be seen in <FIG>, areas in the image corresponding to substrate holding slots in which a reflection in the middle region <NUM> exists but where there are no corresponding reflections in both the left region <NUM> and the right region 600R are mapped as being empty slots (i.e., substrate is absent).

<FIG> illustrates an image, captured by at least one camera <NUM> located in the middle center MC of the far plane <NUM> that has been optimized by the controller <NUM> (using any suitable image processing such as that described herein) that illustrates detected substrate edges in the middle region <NUM>, the left region <NUM>, and the right region <NUM>. The controller <NUM> is configured to detect (through any suitable image processing such as described herein) the edges of the substrates in any suitable region of interest (that is inclusive of each of the middle region <NUM>, the left region <NUM>, and the right region <NUM>) within the captured as illustrated in <FIG>. As can be seen in <FIG>, the controller <NUM> is configured to connected the detected edges (corresponding to the substrate holding slots of the substrate carrier <NUM> which have slot boundaries that are known to the controller) in each of the middle region <NUM>, the left region <NUM>, and the right region <NUM> to determine substrate presence.

One or more of the middle region <NUM>, the left region <NUM>, and the right region 600R in <FIG> and <FIG> is/are employed for detecting substrate warp/bow as described herein.

At this point in the edge defining algorithm sufficient data is obtained to perform substrate mapping of the states of the substrates S in the substrate cassette <NUM> by employing the exemplary substrate mapping rules described above.

It is noted that for edge profiling of the substrates further data is desired (in addition to the data obtained for mapping) for determining bows/warps of the substrate that may hinder picking of the substrates. As noted above, the raw profiles of the substrates may depend on a position of the at least one camera <NUM> imaging the substrates. The controller <NUM> is configured to transform the raw profiles to camera independent corrected true profiles 500TC (see <FIG>) by applying the spatial correction to the raw profiles (see <FIG>). Examples of raw (edge) profiles compared to a true (edge) profile are provided in <FIG>. <FIG> illustrates a true edge profile 500T of each substrate S in the substrate stack <NUM>. The true edge profile 500T is substantially equivalent to a raw image of a camera <NUM> (equipped with a telephoto lens) positioned on the far plane <NUM> (<FIG> and <FIG>) and located at the middle center location MC. For exemplary purposes only a telephoto lens is a lens having a focal length of about <NUM> or greater and employed with a full-frame camera (i.e., a camera with an image sensor format that is the same size as a <NUM> format film); however in other aspects the telephoto lens focal length may be more or less than about <NUM>. Here, the curved shape of the substrate edge is not apparent as the direction of the three-dimensional to two-dimensional projection is substantially parallel to the substrate planes. <FIG> illustrates the raw image of a camera <NUM> (equipped with a wide angle lens) positioned at the near plane <NUM> at the middle center location MC. For exemplary purposes only a wide angle lens is a lens having a focal length of about <NUM> or less and employed with a full-frame camera; however, in other aspects the wide angle lens focal length may be more or less than about <NUM>. <FIG> is an illustration of the raw image of a camera <NUM> (equipped with the wide angle lens) located at the lower center location LC on the near plane <NUM> with its field of view pointed upwards (at an angle) towards the substrates S in the substrate stack <NUM>. <FIG> is an illustration of the raw image of a camera <NUM> (equipped with the wide angle lens) located at the upper center location LC on the near plane <NUM> with its field of view pointed downwards (at an angle) towards the substrates S in the substrate stack <NUM>. Here, the wide angle lens raw views (from the near plane <NUM>) illustrate the effects of three-dimensional objects projecting in to the two-dimensional image plane of the camera field of view. As is apparent from <FIG>, the substrates' shapes become visible as the three-dimensional to two-dimensional projection lines are no longer parallel due to, for example, the close proximity to the camera <NUM>. The further away the substrates are from the camera location, the more apparent the three-dimensional shape of the substrate is. The perspective also changes as the substrates are positioned further from the camera (as illustrated in <FIG>), where the substrates at further distances appear to be smaller than substrates at closer distances relative to the camera <NUM>. The substrates in the raw images of <FIG> may also be distorted (e.g., barrel distortion) from characteristics of the wide angle lens.

The distortions of the substrate edges illustrated above in <FIG> can be corrected by the controller <NUM> by applying the spatial calibration data <NUM> to the raw images. The controller <NUM> is configured to transform the raw profiles into corrected true profiles 500TC with an empirical method, where the corrected true profiles 500TC provide for substrate warp/bow determination and end effector adjustment for picking and placing the warped/bowed substrates S. The empirical method includes an initial spatial calibration and spatial correction at runtime when measuring substrate profiles.

The controller <NUM> is communicably coupled to the camera array <NUM> and is programmed with each respective camera calibration (also referred to herein as the spatial calibration data <NUM>), that has a baseline image (see the baselines <NUM> illustrated in <FIG> and <FIG>, where each baseline <NUM> for the respective substrate carrier <NUM> slots collectively form the baseline image) for the respective camera 210A, 210B, 210C. Examples of baseline images are provided in <FIG> (noting these baseline images correspond to, for exemplary purposes only, the raw and true profiles of <FIG>, <FIG>). The baseline image for each respective camera 210A, 210B, 210C (<FIG> illustrate baseline images for four cameras, one located at the far plane <NUM> center middle CM, and three located at the near plane center middle CM, upper center US, and lower center LC) is different from the baseline image of each other respective camera 210A, 210B, 210C (as is apparent in <FIG>) and defines predetermined baseline characteristics for each of at least one substrate S in each of the at least one corresponding slot of the corresponding separate different part of the substrate carrier <NUM> (see regions RA, RB, RC in <FIG> and the region of interest in <FIG>) imaged by the respective camera 210A, 210B, 210C. As will be described herein, the controller <NUM> is configured to register (such as in any suitable memory) the spatial calibration data <NUM> of each respective camera 210A, 210B, 210C, wherein a calibration wafer <NUM> that characterizes the baseline image of the respective camera 210A, 210B, 210C is disposed in each of the at least one corresponding slot of the corresponding separate different part and imaged with the respective camera 210A, 210B, 210C defining the baseline image of the respective camera 210A, 210B, 210C registered by the controller <NUM>.

Referring also to <FIG>, the initial spatial calibration is obtained by capturing raw profiles of flat substrates (e.g., the calibration wafers <NUM> which are known to be flat and not bowed/warped) whose true profiles 500T and locations within the substrate stack <NUM> are known. The raw baseline or calibration images are saved in the controller <NUM> (or a memory <NUM> accessible by the controller <NUM>) as spatial calibration data <NUM> (see <FIG>) for each respective camera 210A, 210B, 210C. The edge profiles of the calibration wafers <NUM> corresponding to each of the substrate holding slots forms the baseline image and a baseline <NUM> position for each substrate (i.e., expected position of a respective substrate in the substrate carrier obtained from the baseline image) illustrated in, for example, <FIG> and <FIG>. Generally, spatial calibration is performed following camera installation, and re-run if the camera position or angle changes after initial installation. In one or more aspects, the calibration wafers <NUM> are integrally formed with or otherwise affixed to a calibration cassette (substantially similar to cassette <NUM> but with the calibration wafers fixed therein in predetermined locations). Here the calibration wafers <NUM> may be partial wafers coupled to the carrier so as to form the front edges of the wafers that are scanned/detected in the calibration images in the manner described herein. Here the calibration cassette forms with the integral calibration wafers a calibration wafer rack that is seated on a load port as a unit. In other aspects, the calibration wafers <NUM> may be integrally formed as a stack of wafers that are inserted into a cassette as rack unit, with the predetermined spacing and vertical alignment between the integrally formed calibration wafers in the integral wafer stack. Here the integrally formed wafer stack may be seated on and/or removed from the slots of a cassette <NUM> as a rack unit.

At runtime, where the substrate edge profiles are measured (such as for mapping and/or edge profiling), the controller <NUM> performs a spatial correction on the raw images/profiles where the spatial calibration data <NUM> is applied by the controller <NUM> to correct the raw profiles of the substrates and obtain the corrected true profiles 500TC by subtracting the raw profile of a substrate in a given slot from the baseline <NUM> for the given slot (e.g., where any deviations of the measured raw profile <NUM> from the baseline <NUM> represent a bow/warp of the substrate as represented in the corrected true profile 500TC (see the right-hand side of <FIG>).

The spatial correction described herein provides for at least a transformation from a wide angle lens at close distance projection (e.g., at the near plane <NUM>) to an equivalent of a telephoto lens at a long distance (e.g., at the far plane <NUM>), correction of perspective effects corresponding to a camera's angle and distance from the substrates being imaged, correction of barrel distortion introduced by the wide angle lens, and correction of mechanical variation of position and direction in camera mounting. Experimental data obtained from employment of the spatial correction in edge profiling are illustrated in <FIG> which illustrate the effectiveness of the spatial correction described herein. <FIG> illustrates raw profiles <NUM> of three substrates across the width of the substrate cassette <NUM>. <FIG> illustrates the middle substrate (e.g., slot <NUM> substrate) of <FIG>. <FIG> illustrates the corrected true profile 500TC of the slot <NUM> substrate, which exhibits a warp/bow. Further, it is noted that the spatial correction can be applied prior to or after the processing the image by slicing of the image into the vertical image slices <NUM>-<NUM>.

As noted above, the substrate profiles are employed by the controller <NUM> when commanding the substrate transport <NUM> to pick substrates. Here the controller <NUM> may command the end effector 180E of the substrate transport to widen/increase the distance TD (see <FIG>) between the tines 180TE1, 180TE2 (See <FIG>), based on the corrected true profile 510TC of a substrate to accommodate any warp/bow in the substrate (e.g., such as in the slot <NUM> substrate of <FIG>) by placing the tines 180TE1, 180TE2 in the exemplary locations illustrated in <FIG>, such as where there is sufficient space to insert the tines below the substrate.

Referring to <FIG>, <FIG>, <FIG>, <FIG>, and <FIG>, an exemplary substrate mapping/edge profiling operation will be described. A frame <NUM> forming an opening <NUM> (e.g., a wafer load opening) that is in communication with a load port <NUM> is provided (<FIG>, Block <NUM>). As described herein, the load port <NUM> is configured to hold a substrate carrier <NUM> where the substrate carrier <NUM> holds more than one substrates S vertically distributed within the substrate carrier <NUM> for loading through the opening <NUM> into the substrate processing apparatus <NUM>, <NUM>, <NUM>. A transport arm 180TA (e.g., a movable arm) is provided and is mounted to the frame <NUM> (<FIG>, Block <NUM>) so as to move relative to the opening <NUM>. As described the transport arm 180TA includes an end effector 180E movably mounted to the transport arm 180TA for loading substrates from the substrate carrier <NUM> through the opening <NUM> to the substrate processing apparatus <NUM>, <NUM>, <NUM> (and vice versa).

The machine vision system <NUM> (e.g., image acquisition system) is provided (<FIG>, Block <NUM>) and includes at least one camera <NUM>. For exemplary purposes the method is described with respect camera array <NUM> but it should be understood that the method is equally applicable to images captured by a single camera. As described above, each respective camera 210A, 210B, 210C is positioned with a field of view FOVA, FOVB, FOVC disposed to view, through the opening <NUM> with the common support <NUM> positioned by the transport arm 180TA at a common position CP, a different separate part of the substrate carrier <NUM> with wafer slots for holding at least one of the more one substrates S, separate and different from parts of the substrate carrier <NUM> with different wafer slots for holding substrates S different than the at least one substrate S viewed by each other camera 210A, 210B, 210C with the common support <NUM> at the common position CP, and each substrate S held in the substrate carrier <NUM> is imaged by the camera array <NUM> with the common support <NUM> at the common position CP.

The at least one illuminator <NUM> is provided (<FIG>, Block <NUM>) and is connected to the common support <NUM>. As described above, the at least one illuminator is configured so as to illuminate, through the opening <NUM> with the common support <NUM> in the common position CP, an outer edge <NUM> of each substrate S in the substrate carrier <NUM>, which edge delineates upper and lower edge boundaries 233U, <NUM> of the outer edge <NUM> of the substrate S. The at least one illuminator <NUM> is disposed with respect to each respective camera 210A, 210B, 210C, and the image of the corresponding separate different part (see, e.g., regions RA, RB, RC in <FIG> and the region of interest in <FIG>) by each respective camera 210A, 210B, 210C is disposed so that the outer edge <NUM> directs reflected edge illumination, from the at least one illuminator <NUM>, at the respective camera 210A, 210B, 210C, and optically blanks, at the upper edge boundary 233U and the lower edge boundary <NUM>, background reflection light, in the image captured of the separate different part of the substrate carrier <NUM> by the respective camera 210A, 210B, 210C through the opening <NUM> with the common support <NUM> at the common position CP. As described herein, the outer edge <NUM> of the substrate S is defined with the upper and lower edge boundaries 233U, <NUM> in relief in image contrast, formed by and between the edge reflection and the optically blanked background, registered by each camera 210A, 210B, 210C so as to effect edge detection of each substrate S in the substrate carrier <NUM> with the common support <NUM> at the common position CP.

With the substrate carrier <NUM> seated on the load port <NUM>, the controller <NUM> commands movement of the transfer arm 180TA so that the transfer arm 180TA is positioned relative to the opening <NUM> (<FIG>, Block <NUM>) for imaging the substrates S within the carrier <NUM> through the opening <NUM>. The substrates S are illuminated by the at least one illuminator <NUM> and images of the substrates S in the different separate regions (see, e.g., regions RA, RB, RC in <FIG>) are captured through the opening <NUM> by camera array <NUM> (<FIG>, Block <NUM>). With the raw images of the substrates in each different separate region captured, the controller <NUM> is configured to perform one or more of determining a substrate map and determining substrate warp/bow. As described herein, mapping and determining warps/bows of substrates may be determined in any suitable order relative to one another such as where both are desired to be determined.

With respect to substrate mapping, the controller <NUM> determines the intensity profile <NUM> (see <FIG> and <FIG>) in the manner described herein (<FIG>, Block <NUM>) for each of the different separate regions (e.g., regions RA, RB, RC). From the intensity profile <NUM>, the controller <NUM> determines the true edge profile 500T in the manner described herein (<FIG>, Block <NUM>) and the so as to determine the substrate map <NUM> (<FIG>, Block <NUM>) for each different separate region and the substrate carrier <NUM> as a whole. The substrate state (e.g., absent, present, double, cross, shift) is determined (<FIG>, Block <NUM>) by the controller <NUM> from the substrate map <NUM> as described herein through employment of any suitable image processing algorithms for applying the substrate mapping rules to the true edge profiles <NUM>. Referring briefly to <FIG>, the controller <NUM> is configured to compare adjacent substrate holding locations of adjacent different separate regions to determine, for example, cross-slotted substrates that span between the adjacent different separate regions. For example, as can be seen in <FIG> slots <NUM> and <NUM> of different separate regions RC and RB respectively are adjacent one another and in some aspects there may be a substrate that is cross-slotted between slots <NUM> and <NUM>. The controller <NUM> is configured to employ the wafer mapping rules described herein in the slots that form the bounds between adjacent different separate regions (in this example referring to different separate regions RC and RB, the bounding slots are slots <NUM> and <NUM>) when determining the substrate map <NUM> and the state of the substrates S in the substrate carrier <NUM> such as where multiple cameras 210A, 210B, 210C are employed for capturing images in different separate regions RA, RB, RC.

It is noted that capturing images in the different separate regions (e.g., multiple images from different cameras that cover a respective one of the different separate regions and are combined to form a substrate map) provides less distortion of the substrates S when the substrates S are imaged compared to imaging an entire substrate carrier <NUM> in a single image. For example, <FIG> illustrates raw profile images of substrates S captured from the cameras 210A, 210B, 210C for each respective different separate region RA, RB, RC and <FIG> illustrates true profile images of substrates S captured from the cameras 210A, 210B, 210C for each respective different separate region RA, RB, RC. When the distortion of the substrate profiles in each of the different separate regions RA, RB, RC are compared with the raw profiles of <FIG> it can be seen that there is less distortion of the substrates (i.e., between the raw profiles and the true profiles) when multiple cameras 210A, 210B, 210C are employed for imaging the respective different separate regions RA, RB, RC when compared to a single camera imaging all substrates S in the substrate carrier <NUM> at one time.

With respect to the determination of substrate warping/bowing, where spatial calibration data <NUM> does not exist for each camera 210A, 210B, 210C for the load port <NUM> on which the substrate cassette <NUM> is seated, the controller <NUM> obtains/determines the spatial calibration data <NUM> (<FIG>, Block <NUM>) for each camera 210A, 210B, 210C in the manner described herein. The controller <NUM> determines the intensity profile <NUM> (see <FIG> and <FIG>) of the substrates S held in the substrate carrier <NUM> (in each of the different separate regions) seated on the load port <NUM> in the manner described herein (<FIG>, Block <NUM>). The spatial calibration data <NUM> is applied to the captured image (the imaged substrates thereof being identified through at least the intensity profile <NUM>) (<FIG>, Block <NUM>) so that the corrected true edge profile 500TC is determined for the imaged substrates S. For example, camera 210A corresponds with different separate region RA, camera 210B corresponds with different separate region RB, and camera 210C corresponds with different separate region RC. The spatial correction data <NUM> for camera 210A is applied to different separate region RA, the spatial correction data <NUM> for camera 210B is applied to different separate region RB, and the spatial correction data <NUM> for camera 210C is applied to different separate region RC. Any substrate warping/bowing of the substrates in the different separate regions RA, RB, RC is determined by the controller <NUM> in any suitable manner (such as with the image processing described herein) from the corrected true edge profiles 500TC of the substrates S (<FIG>, Block <NUM>). The warping/bowing determination is employed by the controller <NUM> to adjust the distance TD (or spacing) (see <FIG>) between end effector tines 180ET1, 180ET2 for picking the warped/bowed substrates S (<FIG>, Block <NUM>).

In accordance with one or more aspects of the present disclosure a semiconductor wafer mapping apparatus comprises: a frame forming a wafer load opening communicating with a load station for a substrate carrier disposed to hold more than one wafers vertically distributed in the substrate carrier for loading through the wafer load opening; a movable arm movably mounted to the frame so as to move relative to the wafer load opening and having at least one end effector movably mounted to the movable arm to load wafers from the substrate carrier through the wafer load opening; an image acquisition system including an array of cameras arranged on a common support and each camera is fixed with respect to the common support that is static with respect to each camera of the array of cameras, wherein each respective camera is positioned with a field of view disposed to view, through the wafer load opening with the common support positioned by the movable arm at a common position, a different separate part of the substrate carrier with wafer slots for holding at least one of the more one wafers, separate and different from parts of the substrate carrier with different wafer slots for holding wafers different than the at least one wafer viewed by each other camera with the common support at the common position, and each wafer held in the substrate carrier is imaged by the array of cameras with the common support at the common position; and an illumination source connected to the common support configured so as to illuminate, through the wafer load opening with the common support in the common position, an outer edge of each wafer in the substrate carrier, which edge delineates upper and lower edge boundaries of the outer edge of the wafer, the illumination source being disposed with respect to each camera so that the outer edge directs reflected edge illumination, from the illumination source, at each camera, and optically blanks, at the upper and lower edge boundaries, background reflection light, viewed by each camera through the wafer load opening with the common support at the common position; wherein the outer edge of the wafer is defined with the upper and lower edge boundaries in relief in image contrast, formed by and between the edge reflection and the optically blanked background, registered by each camera so as to effect edge detection of each wafer in the substrate carrier with the common support at the common position.

In accordance with one or more aspects of the present disclosure each different separate part viewed by the respective camera of the array of cameras, has a different set of wafer slots, corresponding to the separate part and the respective camera, vertically distributed at predetermined reference heights viewed by the respective camera.

In accordance with one or more aspects of the present disclosure the semiconductor wafer mapping apparatus further comprises a controller communicably coupled to the movable arm to move the movable arm relative to the frame and position the common support at the common position.

In accordance with one or more aspects of the present disclosure the movable arm is an arm of a wafer transport robot having an end effector for loading and unloading wafers to and from the substrate carrier through the wafer load opening.

In accordance with one or more aspects of the present disclosure the illumination source is dispose relative to the respective camera so that reflected light from planar surfaces of the wafer and each other wafer slotted in the substrate carrier are optically blanked in each image by the respective camera of the different separate part of the substrate carrier.

In accordance with one or more aspects of the present disclosure a semiconductor wafer mapping apparatus comprises: a frame forming a wafer load opening communicating with a load station for a substrate carrier disposed to hold more than one wafers vertically distributed in the substrate carrier for loading through the wafer load opening; a movable arm movably mounted to the frame so as to move relative to the wafer load opening and having at least one end effector movably mounted to the movable arm to load wafers from the substrate carrier through the wafer load opening; an image acquisition system including an array of cameras arranged on a common support and each camera is fixed with respect to the common support that is static with respect to each camera of the array of cameras, wherein each respective camera is positioned with a field of view disposed to view, through the wafer load opening with the common support positioned by the movable arm at a common position, a corresponding different separate part of the substrate carrier each with at least one corresponding wafer slot different from at least one other wafer slot in each other corresponding different separate part of the substrate carrier, each of the corresponding different and separate parts being viewed, through the wafer load opening from the common position, by each respective camera, so that an image captured by each respective camera of the corresponding different separate part excludes each other different separate part viewed by each other respective camera, and each wafer in each slot in the substrate carrier is imaged by the array of cameras with the common support at the common position.

In accordance with one or more aspects of the present disclosure the semiconductor wafer mapping apparatus further comprises an illumination source connected to the common support configured so as to illuminate, through the wafer load opening with the common support in the common position, an outer edge of each wafer in the substrate carrier, which outer edge delineates upper and lower edge boundaries of the outer edge of the wafer, wherein the illumination source is disposed with respect to each respective camera, and the image of the corresponding separate different part by each respective camera is disposed so that the outer edge directs reflected edge illumination, from the illumination source, at respective camera, and optically blanks, at the upper and lower edge boundaries, background reflection light, in the image captured of the separate different part by the respective camera through the wafer load opening with the common support at the common position.

In accordance with one or more aspects of the present disclosure the outer edge of the wafer is defined with the upper and lower edge boundaries in relief in image contrast, formed by and between the edge reflection and the optically blanked background, registered by each respective camera so as to effect edge detection of each wafer in the substrate carrier with the common support at the common position.

In accordance with one or more aspects of the present disclosure each of the corresponding different separate part is imaged by but one respective camera of the array.

In accordance with one or more aspects of the present disclosure each of at least one wafer held in the corresponding wafer slot of the corresponding different separate part is imaged by but one of the respective camera of the array of cameras.

In accordance with one or more aspects of the present disclosure the semiconductor wafer mapping apparatus further comprises a controller communicably coupled to the array of cameras and programmed with each respective camera calibration, that has a baseline image for the respective camera, different from the baseline image of each other respective camera, the baseline image defining predetermined baseline characteristics for each of at least one wafer in each of the at least one corresponding slot of the corresponding separate different part imaged by the respective camera.

In accordance with one or more aspects of the present disclosure the controller is configured to register calibration of each respective camera, wherein a calibration wafer that characterizes the baseline image of the respective camera is disposed in each of the at least one corresponding slot of the corresponding separate different part and imaged with the respective camera defining the baseline image of the respective camera registered by the controller.

In accordance with one or more aspects of the present disclosure a method comprises: providing a frame forming a wafer load opening communicating with a load station for a substrate carrier disposed to hold more than one wafers vertically distributed in the substrate carrier for loading through the wafer load opening; providing a movable arm movably mounted to the frame so as to move relative to the wafer load opening and having at least one end effector movably mounted to the movable arm to load wafers from the substrate carrier through the wafer load opening; providing an image acquisition system including an array of cameras arranged on a common support and each camera is fixed with respect to the common support that is static with respect to each camera of the array of cameras; moving the movable arm so that each respective camera is positioned with a field of view disposed to view, through the wafer load opening with the common support positioned by the movable arm at a common position, a different separate part of the substrate carrier with wafer slots for holding at least one of the more one wafers, separate and different from parts of the substrate carrier with different wafer slots for holding wafers different than the at least one wafer viewed by each other camera with the common support at the common position, and each wafer held in the substrate carrier is imaged by the array of cameras with the common support at the common position; and illuminating, with an illumination source connected to the common support, through the wafer load opening with the common support in the common position, an outer edge of each wafer in the substrate carrier, which edge delineates upper and lower edge boundaries of the outer edge of the wafer, the illumination source being disposed with respect to each camera so that the outer edge directs reflected edge illumination, from the illumination source, at each camera, and optically blanks, at the upper and lower edge boundaries, background reflection light, viewed by each camera through the wafer load opening with the common support at the common position; wherein the outer edge of the wafer is defined with the upper and lower edge boundaries in relief in image contrast, formed by and between the edge reflection and the optically blanked background, registered by each camera so as to effect edge detection of each wafer in the substrate carrier with the common support at the common position.

In accordance with one or more aspects of the present disclosure the method further comprises commanding movement of the movable arm, with a controller communicably coupled to the movable arm, relative to the frame so as to position the common support at the common position.

Claim 1:
A semiconductor wafer mapping apparatus (<NUM>) comprising:
a frame (<NUM>) forming a wafer load opening (<NUM>) communicating with a load station (<NUM>) for a substrate carrier (<NUM>) disposed to hold more than one wafers vertically distributed in the substrate carrier for loading through the wafer load opening;
a movable arm (180TA) movably mounted to the frame so as to move relative to the wafer load opening and having at least one end effector (180E) movably mounted to the movable arm to load wafers from the substrate carrier through the wafer load opening;
an image acquisition system (<NUM>) including an array of cameras (<NUM>) arranged on a common support (<NUM>) and each camera (210A, 210B, 210C) is fixed with respect to the common support that is static with respect to each camera of the array of cameras, wherein each respective camera is positioned with a field of view (FOVA, FOVB, FOVC) disposed to view, through the wafer load opening with the common support positioned by the movable arm at a common position (CP), corresponding different separate part (RA, RB, RC) of the substrate carrier each with at least one corresponding wafer slot (<NUM>-<NUM>) different from at least one other wafer slot (<NUM>-<NUM>) in each other corresponding different separate part of the substrate carrier, each of the corresponding different and separate parts being viewed, through the wafer load opening from the common position, by each respective camera, so that an image captured by each respective camera of the corresponding different separate part excludes each other different separate part viewed by each other respective camera, and each wafer in each slot in the substrate carrier is imaged by the array of cameras with the common support at the common position.