Patent Description:
A chip with high power consumption, for example, a chip in a flip chip ball grid array (FCBGA) packaging form, generates much heat in a working process. Most of the heat is conducted to a back side of the chip, and the heat is dissipated from the back side of the chip.

Currently, a liquid cooling manner may be used for heat dissipation. As shown in <FIG>, and <FIG>, in a liquid cooling based heat dissipation solution, a refrigerating apparatus <NUM> is fastened to a printed circuit board (printed circuit board, PCB) <NUM> by using a spring screw <NUM>, and an accommodation cavity <NUM> is formed between a chip <NUM> and the refrigerating apparatus <NUM> by using a supporting part <NUM> and a sealing kit <NUM>. A cooling medium enters the accommodation cavity <NUM> from a liquid inlet 101a and a sprinkler-shaped flow channel 101b to perform heat exchange with the chip, and flows out of the accommodation cavity <NUM> from a liquid return port 101c.

However, in the foregoing solution, the chip <NUM> needs to be in direct contact with the cooling medium. As shown in <FIG>, the cooling medium exists on an upper surface of the chip <NUM> and in the accommodation cavity <NUM> on a side surface of the chip <NUM>. After an adhesive layer between the supporting part <NUM> and a substrate <NUM> is in contact with the cooling medium, the adhesive layer is prone to failure. In addition, an underfill adhesive between the chip <NUM> and the substrate <NUM> has a risk of cooling medium penetration. In structures shown in <FIG> and <FIG>, the cooling medium may penetrate into the chip <NUM> from the back of the chip <NUM>. In conclusion, the foregoing chip package structures all have a problem of low waterproof performance.

In addition, in the structures shown in the foregoing solution, the substrate is more greatly deformed than the chip, and the substrate is prone to warping. Document <CIT> describes a semiconductor device including a substrate, a semiconductor package, a plurality of pillars and a lid is provided. Document <CIT> describes a package structure including a wafer-form semiconductor package and a thermal dissipating system. Document <CIT> describes a chip package and a fabrication method therefor used to mitigate the deformation of a heat dissipation sheet caused by the deformation of a substrate. Document <CIT> describes semiconductor device package including a substrate, a semiconductor chip, a first ring structure and asecond ring structure, and a method of manufacturing the same. Document <CIT> describes a cooling apparatus and method of fabrication for facilitating removal of heat from a heat-generating electronic device. Document <CIT> describes a semiconductor device having a higher thermal dissipation efficiency includes a thermally conducting structure attached to a surface of the semiconductor device via soldering.

Embodiments of this application provide a chip package structure, a packaging method, and an electronic device, to resolve a problem of low waterproof performance of a chip.

To achieve the foregoing objective, this application uses the following technical solutions.

According to a first aspect, a chip package structure is provided. The chip package structure includes: a substrate; a chip, having a first surface close to the substrate and a second surface opposite to the first surface; a first pin layer, including a plurality of first pins disposed between the first surface of the chip and the substrate; a molding part, disposed on a periphery of the chip and the first pin layer, where a surface that is of the molding part and that is away from the substrate is higher than the first surface of the chip, and covers a side surface of the first pin layer and at least a part of a side surface of the chip, and the molding part is attached to the side surface of the chip; and a waterproof layer, disposed on the second surface of the chip and the surface that is of the molding part and that is away from the substrate.

Based on the chip package structure provided in the first aspect, the molding part is disposed on the periphery of the chip and the first pin layer, and the waterproof layer is disposed on the surface that is of the molding part and that is away from the substrate and the second surface of the chip, so that the molding part can prevent a refrigerating medium from penetrating into the first pin layer or the chip from the side surface of the first pin layer and the side surface of the chip, and the waterproof layer can prevent the refrigerating medium from penetrating into the chip from a surface of the chip and prevent the refrigerating medium from penetrating into the chip from the molding part, to improve waterproof performance of the chip, and improve reliability of the chip.

In addition, the molding part is disposed on the substrate. Because the molding part has a large modulus and cannot be easily deformed, deformation of the substrate may be limited when the substrate warps, to reduce a warping degree of the substrate. This reduces circuit faults caused by deterioration in the waterproof performance and poor contact.

In a possible design solution, the molding part covers all side surfaces of the chip, and the surface that is of the molding part and that is away from the substrate may be flush with the second surface of the chip. In other words, a distance between the surface that is of the molding part and that is away from the substrate and the substrate is equal to a distance between the second surface of the chip and the substrate. In this way, refrigerating media that penetrate into the chip from the side surface of the chip may be further reduced, and the waterproof performance is further improved. In addition, the molding part covers all the side surfaces of the chip, and when an edge of the chip is squeezed by an external force, the molding part can implement a buffering function, to better protect the chip and further improve the reliability. In addition, the surface that is of the molding part and that is away from the substrate is flush with the second surface of the chip, so that the waterproof layer can be easily processed.

In a possible design solution, the surface that is of the molding part and that is away from the substrate may be lower than the second surface of the chip. In other words, the distance between the surface that is of the molding part and that is away from the substrate and the substrate is less than the distance between the second surface of the chip and the substrate. In this way, in a process of forming the molding part, raw materials of the molding part flowing to the second surface of the chip may be reduced, and a surface of a chip is not covered by a molding part <NUM>, to reduce raw material grinding processes for the molding part of the second surface of the chip, and improve efficiency. In addition, an upper half part of the side surface of the chip is not covered by the molding part, so that heat dissipation can be implemented, and heat dissipation efficiency can be improved.

In a possible design solution, the chip package structure may further include: a supporting part, disposed on the substrate. The supporting part surrounds the molding part, and an outer side surface of the molding part is attached to an inner side surface of the supporting part. In this way, pressure may be applied to an edge of the substrate by using the supporting part, to reduce the warping degree of the substrate. This reduces the circuit faults caused by the deterioration in the waterproof performance and the poor contact. In addition, the refrigerating medium can be prevented from penetrating into the chip from the outer side surface of the molding part, to further improve waterproof effect.

A surface that is of the supporting part and that is away from the substrate is higher than the second surface of the chip. In other words, a distance between the surface that is of the supporting part and that is away from the substrate and the substrate may be greater than the distance between the second surface of the chip and the substrate. In this way, pressure can be better applied to the substrate by using the supporting part, to further reduce the warping degree of the substrate. This further reduces the circuit faults caused by the deterioration in the waterproof performance and the poor contact.

Alternatively, optionally, a surface that is of the supporting part and that is away from the substrate may be lower than the second surface of the chip. In other words, a distance between the surface that is of the supporting part and that is away from the substrate and the substrate may be less than the distance between the second surface of the chip and the substrate. In this way, operations, for example, grinding the molding part or the chip, can be more conveniently performed, to improve efficiency.

In a possible design solution, the chip package structure may further include: a refrigerating apparatus, including a liquid inlet, a liquid return port, and a sprinkler-shaped flow channel. An accommodation cavity for accommodating a refrigerant is formed between the sprinkler-shaped flow channel, the liquid return port, and the waterproof layer, and the accommodation cavity covers at least the waterproof layer corresponding to the second surface of the chip. The liquid inlet is in communication with the sprinkler-shaped flow channel, the sprinkler-shaped flow channel is in communication with the accommodation cavity, and the accommodation cavity is in communication with the liquid return port. In this way, the accommodation cavity formed between the refrigerating apparatus and the chip may completely cover areas that are on the waterproof layer and that correspond to the second surface of the chip. In this way, heat dissipation can be implemented on the second surface of the chip, and pins may be arranged in all the areas corresponding to the second surface, without a limitation. In addition, a sealing force is applied outside the second surface of the chip to reduce a risk that the chip is damaged by an external force. This ensures the waterproof performance, heat dissipation efficiency, and the reliability.

According to a second aspect, an electronic device is provided. The electronic device includes a printed circuit board and at least one chip package structure according to any design solution of the first aspect, and the chip package structure is connected to the printed circuit board. The electronic device provided in the second aspect has a same technical effect as the chip package structure provided in the first aspect.

For example, the electronic device according to the second aspect may include an electronic product such as a server or a super computer. It may be understood that the electronic device may further include an electronic product used for industrial control, an electronic product of a data center, or the like.

According to a third aspect, a chip packaging method is provided. The chip packaging method includes: forming, on a substrate, a molding part that surrounds a chip, where the chip is disposed on the substrate, the chip has a first surface close to the substrate and a second surface opposite to the first surface, the first surface is connected to the substrate through a first pin layer, the first pin layer includes a plurality of first pins disposed between the first surface of the chip and the substrate, a surface that is of the molding part and that is away from the substrate is higher than the first surface of the chip, the molding part covers a side surface of the first pin layer and at least a part of a side surface of the chip, and the molding part is attached to the side surface of the chip; and forming a waterproof layer on the second surface of the chip and the surface that is of the molding part and that is away from the substrate.

In a possible design solution, the molding part covers all side surfaces of the chip, and the surface that is of the molding part and that is away from the substrate may be flush with the second surface of the chip.

In a possible design solution, the surface that is of the molding part and that is away from the substrate may be lower than the second surface of the chip.

In a possible design solution, before the forming, on a substrate, a molding part that surrounds a chip, the chip packaging method may further include: forming, on a periphery of the chip, an enclosure dam for limiting the molding part. The enclosure dam is located on the substrate. The forming, on a substrate, a molding part that surrounds a chip may include: forming the molding part between the enclosure dam and the chip.

Optionally, the enclosure dam may be a supporting part, and an outer side surface of the molding part is attached to an inner side surface of the supporting part.

Further, a surface that is of the supporting part and that is away from the substrate is higher than the second surface of the chip.

Alternatively, further, the surface that is of the supporting part and that is away from the substrate may be lower than the second surface of the chip.

In a possible design solution, before the forming, on a substrate, a molding part that surrounds a chip, the chip packaging method may further include: connecting the substrate to a printed circuit board.

In a possible design solution, after the forming a waterproof layer on the second surface of the chip and the surface that is of the molding part and that is away from the substrate, the chip packaging method may further include: connecting the substrate to a printed circuit board.

The chip packaging method in the third aspect and the chip packaging structure provided in the first aspect have a same technical effect.

numerals: 101a-Liquid inlet; 101b-Sprinkler-shaped flow channel; 101c-Liquid return port; <NUM>-Refrigerating apparatus; <NUM>-Spring screw; <NUM>-Printed circuit board; <NUM>-Supporting part; <NUM>-Sealing kit; <NUM>-Chip; <NUM>-Accommodation cavity; <NUM>-Substrate; <NUM>-Printed circuit board; <NUM>-Second pin; <NUM>-Chip package structure; <NUM>-Substrate; 402a-First surface; 402b-Second surface; <NUM>-Chip; 403a-First pin; 403b-Underfill adhesive; <NUM>-First pin layer; <NUM>-Molding part; <NUM>-Waterproof layer; 501a-Supporting part; 501b-Bonding adhesive; <NUM>-Enclosure dam; 601a-Liquid inlet; 601b-Liquid return port; 601c-Sprinkler-shaped flow channel; <NUM>-Refrigerating apparatus; <NUM>-Spring screw; <NUM>-Sealing kit; <NUM>-Accommodation cavity; 701a-First bracket; 701b-Second bracket; <NUM>-Bracket.

The following describes the technical solutions in embodiments of this application with reference to the accompanying drawings in embodiments of this application. It is clear that the described embodiments are merely a part rather than all of embodiments of this application.

Terms "first", "second", and the like in this specification are merely intended for a purpose of description, and shall not be understood as an indication or implication of relative importance or implicit indication of a quantity of indicated technical features. Therefore, a feature limited by "first" or "second" may explicitly or implicitly include one or more such features. In the descriptions of this application, unless otherwise stated, "a plurality of" means two or more than two.

In addition, in this specification, orientation terms such as "top" and "bottom" are defined relative to orientations of structures in the accompanying drawings. It should be understood that these position terms are relative concepts used for relative description and clarification, and may correspondingly change based on changes in the orientations of the structures.

In this application, it should be noted that a term "connection" should be understood in a broad sense unless otherwise expressly specified and limited. For example, the "connection" may be a fixed connection, or may be a detachable connection or an integrated connection; and may be a direct connection, or may be an indirect connection through an intermediate medium. In addition, a term "coupling" may be a manner of implementing an electrical connection for signal transmission. The "coupling" may be a direct electrical connection, or may be an indirect electrical connection through an intermediate medium.

An embodiment of this application provides an electronic device. The electronic device includes an electronic device such as a server or a super computer. It may be understood that the electronic device may further include an electronic device used for industrial control, an electronic device of a data center, or the like. A specific form of the foregoing electronic device is not specifically limited in this embodiment of this application.

The electronic device may include a printed circuit board (printed circuit board, PCB) <NUM> shown in <FIG> and a chip package structure <NUM> disposed on the printed circuit board <NUM>. The chip package structure <NUM> is connected to the printed circuit board <NUM> by using a plurality of pins.

The following describes in detail the chip package structure <NUM> and a chip packaging method with reference to <FIG>.

As shown in <FIG>, in some embodiments of this application, the chip package structure <NUM> includes a substrate <NUM>, a chip (Die) <NUM>, a first pin layer <NUM>, a molding part <NUM>, and a waterproof layer <NUM>. A placement orientation of the structure shown in <FIG> is used as an example. The first pin layer <NUM> is disposed on the substrate <NUM>, and the chip <NUM> is disposed on the first pin layer <NUM>. The following describes a location relationship between components in the chip package structure <NUM> with reference to this orientation.

As shown in <FIG>, the chip <NUM> has a first surface 402a close to the substrate <NUM> and a second surface 402b opposite to the first surface 402a.

In this embodiment of this application, a lower surface of the chip <NUM> is close to the substrate <NUM>. In other words, the lower surface of the chip <NUM> is the first surface 402a. An upper surface of the chip <NUM> is away from the substrate <NUM>. In other words, the upper surface of the chip <NUM> is the second surface 402b. It may be understood that an area of the first surface 402a or the second surface 402b may be larger than an area of any side surface of the chip <NUM>.

As shown in <FIG>, the first pin layer <NUM> includes a plurality of first pins 403a disposed between the first surface 402a of the chip <NUM> and the substrate <NUM>. In other words, the first pin layer <NUM> is disposed between the lower surface of the chip <NUM> and the substrate <NUM>, and the first pin layer <NUM> may include the plurality of first pins 403a.

In this embodiment of this application, the plurality of first pins 403a in the foregoing first pin layer <NUM> may be solder bumps (solder bumps), solder balls (solder balls), or copper pillars (Cu pillars). The plurality of first pins 403a in the first pin layer <NUM> are arranged in an array. For example, when the first pin 403a is a solder ball, the plurality of first pins 403a form a solder ball grid array (ball grid array, BGA). The chip <NUM> and the substrate <NUM> may be electrically connected by using the plurality of first pins 403a.

In addition, the first pin layer <NUM> may further include an underfill (Underfill) adhesive 403b. The underfill adhesive 403b is located in a gap between the first surface 402a and the substrate <NUM>, to be specific, between the lower surface of the chip <NUM> and the substrate <NUM>, and the underfill adhesive 403b may cover the plurality of first pins 403a. For an implementation of the underfill adhesive 403b, refer to a specific implementation of the underfill adhesive 403b in a conventional technology.

As shown in <FIG>, the molding (Molding) package <NUM> is disposed on a periphery of the chip <NUM> and the first pin layer <NUM>. In other words, the molding part <NUM> is disposed around the chip <NUM> and the first pin layer <NUM>. In addition, a surface that is of the molding part <NUM> and that is away from the substrate <NUM> is higher than the first surface 402a of the chip <NUM>. To be specific, an upper surface of the molding part <NUM> is higher than the lower surface of the chip <NUM>. In other words, a distance between the surface that is of the molding part <NUM> and that is away from the substrate <NUM> and the substrate <NUM> is greater than a distance between the first surface 402a of the chip <NUM> and the substrate <NUM>. To be specific, a distance between the upper surface of the molding part <NUM> and the substrate <NUM> is greater than a distance between the lower surface of the chip <NUM> and the substrate <NUM>.

In addition, the molding part <NUM> covers a side surface of the first pin layer <NUM> and at least a part of a side surface of the chip <NUM>. For example, the molding part <NUM> shown in <FIG> covers all side surfaces of the first pin layer <NUM> and all side surfaces of the chip <NUM>. However, the molding part <NUM> shown in <FIG> covers all the side surfaces of the first pin layer <NUM> and a part of a side surface of the chip <NUM>, for example, a part of a side surface close to a side of the substrate <NUM>. Among surfaces of the molding part <NUM>, two surfaces other than a surface in contact with the substrate <NUM> and a surface opposite to the substrate <NUM> are side surfaces. In other words, two surfaces between the upper surface of the molding part <NUM> and the lower surface of the molding part <NUM> are two side surfaces of the molding part <NUM>. In the two side surfaces of the molding part <NUM>, a side surface with a smaller distance from the side surface of the chip <NUM> is an inner side surface of the molding part <NUM>, and a side surface with a larger distance from the side surface of the chip <NUM> is an outer side surface of the molding part <NUM>.

It may be understood that the inner side surface of the molding part <NUM> is attached to a side surface that is of the chip <NUM> and that is covered by the molding part <NUM>, and the inner side surface of the molding part <NUM> may be further attached to the side surface of the first pin layer <NUM>. A surface that is of the molding part <NUM> and that is close to the substrate <NUM> may be attached to a surface that is of the substrate <NUM> and that is close to the chip <NUM>. In other words, the lower surface of the molding part <NUM> may be attached to an upper surface of the substrate <NUM>.

In this embodiment of this application, in this way, a refrigerating medium can be prevented from penetrating into the chip <NUM> from the side surface of the first pin layer <NUM> and the side surface of the chip <NUM>. A material of the molding part <NUM> may be made of one or both of the following thermosetting materials: epoxy plastic or phenolic plastic. The epoxy plastic may include an epoxy resin, a hardening agent, a filling agent, or an additive agent.

It may be understood that the upper surface of the molding part <NUM> may be flush with the upper surface of the chip <NUM> in height, may be higher than the upper surface of the chip <NUM>, or may be lower than the upper surface of the chip <NUM>. The following uses examples for description with reference to <FIG>.

In some embodiments, as shown in <FIG>, the surface that is of the molding part <NUM> and that is away from the substrate <NUM> may be flush with the second surface 402b of the chip <NUM>. To be specific, the upper surface of the molding part <NUM> is flush with the upper surface of the chip <NUM>. In other words, the distance between the surface that is of the molding part <NUM> and that is away from the substrate <NUM> and the substrate <NUM> may be equal to a distance between the second surface 402b of the chip <NUM> and the substrate <NUM>. The distance between the upper surface of the molding part <NUM> and the substrate <NUM> may be equal to a distance between the upper surface of the chip <NUM> and the substrate <NUM>. In this case, the molding part <NUM> may cover all the side surfaces of the chip <NUM>. The distance between the surface that is of the molding part <NUM> and that is away from the substrate <NUM> and the substrate <NUM> is the thickness or the height of the molding part <NUM> on the substrate <NUM>. The distance between the second surface 402b of the chip <NUM> and the substrate <NUM> is the thickness or the height of the chip <NUM> on the substrate <NUM>.

In this way, the molding part <NUM> covers all the side surfaces of the chip <NUM>, so that refrigerating media that penetrate into the chip <NUM> from the side surface of the chip <NUM> may be further reduced, and waterproof performance may be further improved. In addition, when an edge of the chip <NUM> is squeezed by an external force, the molding part <NUM> may implement a buffering function, to better protect the chip <NUM> and further improve reliability. In addition, the surface that is of the molding part <NUM> and that is away from the substrate <NUM> is flush with the second surface 402b of the chip <NUM>, so that the waterproof layer <NUM> can be easily processed, to improve efficiency.

For example, in the structure shown in <FIG>, if the distance between the second surface 402b of the chip <NUM> and the substrate <NUM> is A, the distance between the surface that is of the molding part <NUM> and that is away from the substrate <NUM> and the substrate <NUM> is also A.

It may be understood that, in this embodiment of this application, the surface that is of the molding part <NUM> and that is away from the substrate <NUM> is flush with the second surface 402b of the chip <NUM> by using the substrate <NUM> as a reference for description. Unless otherwise specified, "higher than", "lower than", or "flush with" is described below by using the substrate <NUM> as a reference.

In some other embodiments, as shown in <FIG>, the surface that is of the molding part <NUM> and that is away from the substrate <NUM> may be higher than the second surface 402b of the chip <NUM>. To be specific, the upper surface of the molding part <NUM> is higher than the upper surface of the chip <NUM>. In other words, the distance between the surface that is of the molding part <NUM> and that is away from the substrate <NUM> and the substrate <NUM> may be greater than the distance between the second surface 402b of the chip <NUM> and the substrate <NUM>. To be specific, the distance between the upper surface of the molding part <NUM> and the substrate <NUM> may be greater than the distance between the upper surface of the chip <NUM> and the substrate <NUM>. In this case, the molding part <NUM> covers all the side surfaces of the chip <NUM>. In this way, refrigerating media that penetrate into the chip <NUM> from the side surface of the chip <NUM> may be further reduced, and waterproof performance may be further improved. In addition, when the edge of the chip <NUM> is squeezed by an external force, the molding part <NUM> may further implement a buffering function, to better protect the chip <NUM> and further improve reliability.

For example, if the distance between the second surface 402b of the chip <NUM> and the substrate <NUM> is A, and the distance between the surface that is of the molding part <NUM> and that is away from the substrate <NUM> and the substrate <NUM> is B, B is greater than A.

In still some other embodiments, as shown in <FIG>, the surface that is of the molding part <NUM> and that is away from the substrate <NUM> may be lower than the second surface 402b of the chip <NUM>. To be specific, the upper surface of the molding part <NUM> is lower than the upper surface of the chip <NUM>. In other words, the distance between the surface that is of the molding part <NUM> and that is away from the substrate <NUM> and the substrate <NUM> may be less than the distance between the second surface 402b of the chip <NUM> and the substrate <NUM>. To be specific, the distance between the upper surface of the molding part <NUM> and the substrate <NUM> may be less than the distance between the upper surface of the chip <NUM> and the substrate <NUM>.

In this case, the molding part <NUM> covers a part of the side surface of the chip <NUM>. In this way, process flows may be reduced. For example, in a process of forming the molding part <NUM>, raw materials of the molding part <NUM> flowing to the second surface 402b of the chip <NUM> may be reduced, and the surface of the chip <NUM> is not covered by the molding part <NUM>, to reduce grinding process flows of the upper surface of the chip <NUM>, and improve efficiency. In addition, an upper part of the side surface of the chip <NUM> is not covered by the molding part <NUM>, so that a heat dissipation area can be increased to improve heat dissipation efficiency.

For example, if the distance between the second surface 402b of the chip <NUM> and the substrate <NUM> is A, and the distance between the surface that is of the molding part <NUM> and that is away from the substrate <NUM> and the substrate <NUM> is C, C is less than A.

In this embodiment of this application, the waterproof layer <NUM> may be disposed in the chip package structure <NUM> shown in any one of <FIG>.

As shown in <FIG>, the waterproof layer <NUM> is disposed on the second surface 402b of the chip <NUM> and the surface that is of the molding part <NUM> and that is away from the substrate <NUM>. In other words, the waterproof layer <NUM> is disposed on the upper surface of the chip <NUM> and the upper surface of the molding part <NUM>. The waterproof layer <NUM> may be used to block the refrigerating medium, to prevent the cooling medium from penetrating into the chip <NUM> from the second surface 402b of the chip <NUM>, and prevent the cooling medium from penetrating into the chip <NUM> from the side surface of the chip <NUM> or from the molding part <NUM>.

Optionally, as shown in <FIG>, when the upper surface of the molding part <NUM> is flush with the upper surface of the chip <NUM>, the waterproof layer <NUM> may be disposed on one surface. In this way, the waterproof layer <NUM> can be conveniently disposed.

Alternatively, optionally, as shown in <FIG>, when the upper surface of the molding part <NUM> is higher or lower than the upper surface of the chip <NUM>, the waterproof layer <NUM> may be disposed on a plurality of surfaces. For example, the waterproof layer <NUM> is disposed on a side surface that is of the chip <NUM> and that is not covered by the molding part <NUM>, for example, an upper part of the side surface of the chip <NUM> in <FIG>. In other words, the waterproof layer <NUM> may be disposed on all of a part that is of the side surface of the chip <NUM> and that is not covered by the molding part <NUM>, the second surface 402b of the chip <NUM>, and the surface that is of the molding part <NUM> and that is away from the substrate <NUM>. Alternatively, for example, the waterproof layer <NUM> is disposed on a part that is of the inner side surface of the molding part <NUM> and that is not in contact with the side surface of the chip <NUM>, for example, an upper part of the inner side surface of the molding part <NUM> in <FIG>. In other words, the waterproof layer <NUM> may be disposed on all of the part that is of the inner side surface of the molding part <NUM> and that is not covered by the molding part <NUM>, the second surface 402b of the chip <NUM>, and the surface that is of the molding part <NUM> and that is away from the substrate <NUM>.

As shown in <FIG>, for example, the waterproof layer <NUM> may include one or more of the following: a first waterproof sublayer, a second waterproof sublayer, or a third waterproof sublayer.

The first waterproof sublayer may include a thin film made from one of the following: titanium (Ti), nickel (Ni), or carbon. For example, the first waterproof sublayer is made from carbon, and the first waterproof sublayer may be a diamond-like carbon (diamond-like carbon, DLC) film. The diamond-like carbon film may be formed through a sputtering process. It may be understood that a thin film made from titanium (Ti), a thin film made from nickel (Ni), or a thin film made from carbon all has a characteristic of low water vapor transmittance. Therefore, a waterproof function can be implemented. In addition, the first waterproof sublayer can further prevent the refrigerating medium from impacting a surface of the chip.

The second waterproof sublayer may include a thin film made from one of the following: silicon dioxide (SiO<NUM>) or aluminum oxide, for example, aluminium trioxide. The aluminum oxide is used as an example. The second waterproof sublayer may be an aluminum oxide film. The aluminum oxide film may be formed through an atomic layer deposition process. A thin film made from silicon dioxide or a thin film made from aluminum oxide has the characteristic of low water vapor transmittance, so that the waterproof function can be implemented.

The third waterproof sublayer may include an organic layer, and the organic layer may be made from parylene (parylene). The organic layer has the characteristic of low water vapor transmittance, so that the waterproof function can be implemented.

Optionally, the waterproof layer <NUM> may include only two layers. For example, the waterproof layer <NUM> may include the first waterproof sublayer and the second waterproof sublayer. The first waterproof sublayer and the second waterproof sublayer are sequentially disposed on the second surface 402b. In this way, the waterproof performance can be further improved. Alternatively, the waterproof layer <NUM> may include only one layer. For example, the waterproof layer <NUM> may include only the first waterproof sublayer.

It should be noted that the first waterproof sublayer, the second waterproof sublayer, or the third waterproof sublayer may alternatively be implemented by using another material. The materials of the layers listed above are merely used as examples, and do not limit a specific implementation of the first waterproof sublayer, the second waterproof sublayer, or the third waterproof sublayer.

To further improve waterproof effect, the waterproof layer <NUM> may alternatively be disposed on a surface that is of a supporting part 501a and that is away from the substrate <NUM>. To be specific, the waterproof layer <NUM> is disposed on an upper surface of the supporting part 501a.

In the chip package structure shown in <FIG>, the molding part <NUM> is disposed on the periphery of the chip <NUM> and the first pin layer <NUM>, and the waterproof layer <NUM> is disposed on the surface that is of the molding part <NUM> and that is away from the substrate <NUM> and the second surface 402b of the chip <NUM>. A combination of the molding part <NUM> and the waterproof layer <NUM> may prevent the refrigerating medium from penetrating into the chip <NUM> and the first pin layer <NUM>, to improve the waterproof performance of the chip <NUM>. This improves reliability of the chip <NUM>.

In addition, the molding part <NUM> is disposed on the substrate <NUM>. Because the molding part <NUM> has a large modulus and cannot be easily deformed, deformation of the substrate <NUM> may be limited when the substrate <NUM> warps, to reduce a warping degree of the substrate <NUM>. This reduces circuit faults caused by deterioration in the waterproof performance and poor contact. For example, in a possible implementation, a modulus of the substrate <NUM> is <NUM> giga pascals (giga pascals, GPa), and the modulus of the molding part <NUM> may be <NUM> GPa or <NUM> GPa. It may be understood that, in this embodiment of this application, that the molding part <NUM> has a large modulus means that when the molding part <NUM> is subject to a same stress, a deformation magnitude of the molding part <NUM> is less than a deformation magnitude of gas or liquid.

To better reduce the warping degree of the substrate <NUM>, an expansion coefficient of the molding part <NUM> may be less than an expansion coefficient of the substrate <NUM>. For example, the expansion coefficient of the substrate <NUM> is <NUM>*<NUM>-<NUM> per Celsius temperature (per Celsius temperature, /°C), and the expansion coefficient of the molding part <NUM> may be <NUM>*<NUM>-<NUM>/°C. In this way, when a temperature changes, the substrate <NUM> and the chip <NUM> may be better fastened together, to implement expansion coefficient matching between the substrate <NUM> and the chip <NUM>, reduce a difference between deformation of the substrate <NUM> and the chip <NUM>, and reduce the warping degree of the substrate <NUM>. This reduces the circuit faults caused by the deterioration in the waterproof performance and the poor contact. The expansion coefficient of the substrate <NUM> or the molding part <NUM> may be implemented by selecting a material of the substrate <NUM> or the molding part <NUM>. For an implementation of the material of the substrate <NUM> or the molding part <NUM>, correspondingly refer to an implementation of a material of the substrate <NUM> or the molding part <NUM> in a conventional technology.

The chip package structure <NUM> shown in <FIG> is used as an example. As shown in <FIG>, the chip package structure <NUM> may further include the supporting part (Ring) 501a. The supporting part 501a is disposed on the substrate <NUM>, and the supporting part 501a surrounds the molding part <NUM>. In other words, the supporting part 501a is disposed around the molding part <NUM>. In this way, a refrigerating apparatus <NUM> and the supporting part 501a shown in <FIG> may apply an external force to an edge of the substrate <NUM>, to further reduce the warping degree of the substrate <NUM>. This reduces the circuit faults caused by the deterioration in the waterproof performance and the poor contact. On this basis, to prevent the refrigerating medium from penetrating into the chip <NUM> from the outer side surface of the molding part <NUM>, and further improve the waterproof effect, the outer side surface of the molding part <NUM> is attached to an inner side surface of the supporting part 501a.

It may be understood that, among surfaces of the supporting part 501a, two surfaces other than two surfaces opposite to the substrate <NUM> are side surfaces. In the two side surfaces of the supporting part 501a, a side surface having a smaller distance from the side surface of the chip <NUM> is the inner side surface of the supporting part 501a.

In this case, the outer side surface of the molding part <NUM> is attached to the inner side surface of the supporting part 501a, to avoid a case in which the refrigerating medium penetrates into a bonding adhesive 501b from a position between the molding part <NUM> and the supporting part 501a to cause failure of the bonding adhesive 501b and cause leakage of the refrigerating medium. This further improves the reliability of the chip <NUM>.

For example, the supporting part 501a may be bonded to the substrate <NUM> by using the bonding adhesive 501b. In this case, the supporting part 501a and the bonding adhesive 501b may form an enclosure dam <NUM>. The enclosure dam <NUM> may be used to limit a thermosetting material for forming the molding part <NUM> in the process of forming the molding part <NUM>. The outer side surface of the molding part <NUM> may alternatively be attached to an inner side surface of the bonding adhesive 501b. The inner side surface of the bonding adhesive 501b is a side surface that is of the bonding adhesive 501b and that is close to the substrate <NUM>, and an outer side surface of the bonding adhesive 501b is a side surface that is of the bonding adhesive 501b and that is close to the substrate <NUM>.

It should be noted that the supporting part 501a may be made of a metal material, for example, copper alloy or stainless steel. The bonding adhesive 501b may also be referred to as an AD bonding adhesive. The bonding adhesive 501b in this embodiment of this application may be implemented by using an existing material having a bonding function.

Refer to <FIG>. The surface that is of the supporting part 501a and that is away from the substrate <NUM> is higher than the surface that is of the chip <NUM> and that is away from the substrate <NUM>, may be lower than the surface that is of the chip <NUM> and that is away from the substrate <NUM>, or may be flush with the surface that is of the chip <NUM> and that is away from the substrate. In other words, the upper surface of the supporting part 501a is behigher than the upper surface of the chip <NUM>, may be lower than the upper surface of the chip <NUM>, or may be flush with the upper surface of the chip <NUM> in height. The following uses examples for description with reference to <FIG>.

In some embodiments not encompassed by the subj ect-matter of the claims but considered useful for understanding the invention, as shown in <FIG>, the surface that is of the supporting part 501a and that is away from the substrate <NUM> may be flush with the second surface 402b of the chip <NUM>. To be specific, the upper surface of the supporting part 501a is flush with the upper surface of the chip <NUM>. In other words, a distance between the surface that is of the supporting part 501a and that is away from the substrate <NUM> and the substrate <NUM> may be equal to the distance between the second surface 402b of the chip <NUM> and the substrate <NUM>. To be specific, a distance between the upper surface of the supporting part 501a and the substrate <NUM> may be equal to the distance between the upper surface of the chip <NUM> and the substrate <NUM>. In this case, the supporting part 501a may form the enclosure dam <NUM>, to form the molding part <NUM>.

For example, if the distance between the second surface 402b of the chip <NUM> and the substrate <NUM> is A, the distance between the surface that is of the supporting part 501a and that is away from the substrate <NUM> and the substrate <NUM> is also A.

As shown in <FIG>, the surface that is of the supporting part 501a and that is away from the substrate <NUM> is higher than the second surface 402b of the chip <NUM>. To be specific, the upper surface of the supporting part 501a is higher than the upper surface of the chip <NUM>. In other words, a distance between the surface that is of the supporting part 501a and that is away from the substrate <NUM> and the substrate <NUM> may be greater than the distance between the second surface 402b of the chip <NUM> and the substrate <NUM>. To be specific, the distance between the upper surface of the supporting part 501a and the substrate <NUM> may be greater than the distance between the upper surface of the chip <NUM> and the substrate <NUM>. The distance between the surface that is of the supporting part 501a and that is away from the substrate <NUM> and the substrate <NUM> is the height of the surface that is of the supporting part 501a and that is away from the substrate <NUM> relative to the upper surface of the substrate <NUM>. In this way, pressure can be better applied to the substrate <NUM> by using the supporting part 501a, to further reduce the warping degree of the substrate <NUM>. This further improves the waterproof performance of the chip <NUM> and alleviates a problem of poor contact between electronic components caused by warping of the substrate <NUM>. In addition, the supporting part 501a may form the enclosure dam <NUM>, to form the molding part <NUM>.

For example, if the distance between the second surface 402b of the chip <NUM> and the substrate <NUM> is A, and a first distance between the surface that is of the supporting part 501a and that is away from the substrate <NUM> and the substrate <NUM> is D, A is less than D.

In still some other embodiments not encompassed by the subject-matter of the claims but considered useful for understanding the invention, as shown in <FIG>, the surface that is of the supporting part 501a and that is away from the substrate <NUM> may be lower than the second surface 402b of the chip <NUM>. To be specific, the upper surface of the supporting part 501a may be lower than the upper surface of the chip <NUM>. In other words, a distance between the surface that is of the supporting part 501a and that is away from the substrate <NUM> and the substrate <NUM> may be less than the distance between the second surface 402b of the chip <NUM> and the substrate <NUM>. To be specific, the distance between the upper surface of the supporting part 501a and the substrate <NUM> may be less than the distance between the upper surface of the chip <NUM> and the substrate <NUM>. In this way, operations, for example, grinding the molding part <NUM> or the chip <NUM>, can be more conveniently performed, to improve efficiency.

For example, if the distance between the second surface 402b of the chip <NUM> and the substrate <NUM> is A, and the distance between the surface that is of the supporting part 501a and that is away from the substrate <NUM> and the substrate <NUM> is E, A is larger than E.

It should be noted that, as shown in <FIG>, the molding part <NUM> may extend to the surface that is of the supporting part 501a and that is away from the substrate <NUM>, and cover the surface that is of the supporting part 501a and that is away from the substrate <NUM>.

It may be understood that, in the chip package structure <NUM> including the supporting part 501a, the surface that is of the supporting part 501a and that is away from the substrate <NUM> may be flush with the surface that is of the molding part <NUM> and that is away from the substrate <NUM>. To be specific, the upper surface of the supporting part 501a may be flush with the upper surface of the chip <NUM>. Alternatively, the surface that is of the supporting part 501a and that is away from the substrate <NUM> may be higher than the surface that is of the molding part <NUM> and that is away from the substrate <NUM>. To be specific, the upper surface of the supporting part 501a may be higher than the upper surface of the chip <NUM>. Alternatively, the surface that is of the supporting part 501a and that is away from the substrate <NUM> may be lower than the surface that is of the molding part <NUM> and that is away from the substrate <NUM>. To be specific, the upper surface of the supporting part 501a may be lower than the upper surface of the chip <NUM>.

It should be noted that, in this embodiment of this application, a height of the upper surface of the supporting part 501a (where the supporting part 501a exists and the upper surface of the supporting part 501a is not covered by the molding part <NUM>) or the molding part <NUM> (where the supporting part 501a does not exist or the upper surface of the supporting part 501a is covered by the molding part <NUM>) may match the refrigerating apparatus <NUM> shown in <FIG> not encompassed by the subject-matter of the claims but considered useful for understanding the invention or <FIG>, so that an accommodation cavity <NUM> shown in <FIG> or <FIG> is large enough to accommodate sufficient refrigerants. In addition, the supporting part 501a or the molding part <NUM> may further fasten the chip <NUM>, to avoid deformation of the substrate <NUM> and the chip <NUM>.

Similarly, in the structure shown in <FIG>, the supporting part 501a may also be disposed. For a specific implementation, refer to the specific implementation of the supporting part 501a shown in <FIG>.

In some possible design solutions, as shown in either <FIG> or <FIG>, any chip package structure <NUM> in <FIG> or <FIG> may further include the refrigerating apparatus <NUM>. The refrigerating apparatus <NUM> has a liquid inlet 601a, a liquid return port 601b, and a sprinkler-shaped flow channel 601c. The accommodation cavity <NUM> for accommodating a refrigerant is formed between the sprinkler-shaped flow channel 601c, the liquid return port 601b, and the waterproof layer <NUM>. The accommodation cavity <NUM> covers at least areas that are on the waterproof layer <NUM> and that correspond to the second surface 402b of the chip <NUM>. The liquid inlet 601a is in communication with the sprinkler-shaped flow channel 601c, the sprinkler-shaped flow channel 601c is in communication with the accommodation cavity <NUM>, and the accommodation cavity <NUM> is in communication with the liquid return port 601b.

For example, the chip package structure <NUM> may be connected to the printed circuit board <NUM> by using the substrate <NUM>. The substrate <NUM> and the refrigerating apparatus <NUM> are located on a same side of the printed circuit board <NUM>. It may be understood that a second pin layer may be disposed between the substrate <NUM> and the printed circuit board <NUM>, and the second pin layer may include a plurality of second pins <NUM>. The substrate <NUM> may be electrically connected to the printed circuit board <NUM> by using the plurality of second pins <NUM>. For an implementation of the second pin layer, refer to an existing implementation.

The refrigerating apparatus <NUM> may be fastened on the printed circuit board <NUM> by using a connecting piece such as a spring screw <NUM> or a screw. To improve reliability of the refrigerating apparatus <NUM>, brackets <NUM> may be further disposed on two sides of the printed circuit board <NUM>, and the refrigerating apparatus <NUM> is connected to the bracket <NUM> by using the spring screw <NUM>. The bracket <NUM> may include one or both of the following: a first bracket 701a or a second bracket 701b. The first bracket 701a is disposed on a side that is of the printed circuit board <NUM> and that is close to the substrate <NUM>, and the second bracket 701b is disposed on a side that is of the printed circuit board <NUM> and that is away from the substrate <NUM>.

It should be noted that, after the connecting piece is connected to the refrigerating apparatus <NUM>, a distance between the refrigerating apparatus <NUM> and the waterproof layer <NUM> on the chip <NUM> is greater than a distance threshold, so that the accommodation cavity <NUM> can accommodate sufficient refrigerating media, to ensure a refrigerating effect.

Similarly, on the package structure shown in any one of <FIG>, and <FIG> to <FIG>, the refrigerating apparatus <NUM> may also be disposed. For a specific implementation, refer to the specific implementation of the refrigerating apparatus <NUM> shown in <FIG> or <FIG>.

It may be understood that the refrigerating apparatus <NUM> in this embodiment of this application may be a jet liquid-refrigerating apparatus.

To further understand the solutions in embodiments of this application, the following describes a refrigeration principle of the foregoing package structure by using an example with reference to <FIG> and <FIG>.

For example, as shown in <FIG> or <FIG>, when the chip <NUM> works, heat generated is conducted to the second surface 402b of the chip <NUM>, and is further conducted to the waterproof layer <NUM>. The liquid inlet 601a and the liquid return port 601b of the refrigerating apparatus <NUM> are connected to a liquid supply system (not shown in <FIG>) of the refrigerating medium. Driven by the liquid supply system, the refrigerating medium is injected into the sprinkler-shaped flow channel 601c through the liquid inlet 601a of the refrigerating apparatus <NUM>, and then enters the accommodation cavity <NUM> through the sprinkler-shaped flow channel 601c. The refrigerating medium that enters the accommodation cavity <NUM> performs heat exchange with the waterproof layer <NUM>, to absorb the heat generated by the chip <NUM>. After absorbing the heat, the refrigerating medium flows out of the accommodation cavity <NUM> through the liquid return port 601b of the refrigerating apparatus <NUM>, to transfer the heat out of the chip package structure <NUM>, and implement heat dissipation of the chip <NUM>.

In this way, heat dissipation can be implemented on the second surface 402b of the chip <NUM>, and the first pins 403a may be arranged in all the areas corresponding to the second surface 402b, without a limitation. All the areas corresponding to the second surface 402b may be areas at which the second surface 402b is projected in a direction perpendicular to the second surface 402b.

In this case, to prevent a refrigeration fluid from penetrating from the accommodation cavity <NUM> to structures such as the printed circuit board <NUM> other than the accommodation cavity <NUM>, a sealing kit <NUM> may be further disposed between the refrigerating apparatus <NUM> and the waterproof layer <NUM>.

In some embodiments, with reference to <FIG> and <FIG>, as shown in <FIG>, the sealing kit <NUM> may be disposed on the waterproof layer <NUM> covering the molding part <NUM>. The sealing kit <NUM> is separately in contact with the waterproof layer <NUM> and the refrigerating apparatus <NUM>. In this case, the sealing kit <NUM> surrounds the areas that are on the waterproof layer <NUM> and that correspond to the second surface 402b.

In some other embodiments, with reference to <FIG>, as shown in <FIG>, the sealing kit <NUM> may be disposed on the supporting part 501a. For example, as shown in <FIG>, the sealing kit <NUM> is separately in contact with the waterproof layer <NUM> covering the upper surface of the supporting part 501a and the refrigerating apparatus <NUM>. For another example, as shown in <FIG>, the sealing kit <NUM> is disposed on the upper surface of the supporting part 501a. For still another example, as shown in <FIG>, the sealing kit <NUM> is disposed on an area that is on the waterproof layer <NUM> and that corresponds to the upper surface of the supporting part 501a, and is separately in contact with the waterproof layer <NUM> and the refrigerating apparatus <NUM>.

The area that is on the waterproof layer <NUM> and that corresponds to the second surface 402b may be an area at which the second surface 402b is projected on the waterproof layer <NUM> in the direction perpendicular to the second surface 402b.

It should be noted that pressure at the sealing kit <NUM> should be greater than a first pressure threshold and less than or equal to a second pressure threshold, to avoid a poor sealing effect caused by excessively low pressure, or avoid damage to the waterproof layer <NUM> or the supporting part 501a of the chip package structure <NUM> caused by excessively high pressure. The first pressure threshold is a minimum pressure bearing requirement of the sealing kit <NUM> during working. A value, a material, and a dimension of the first pressure threshold may be determined according to a use standard of a sealing kit <NUM> in a conventional technology, for example, a use standard of a sealing ring. The second pressure threshold is related to a related parameter of the chip <NUM> and the first pin 403a on the first surface 402a. For example, the first pin 403a is a solder ball, and the second pressure threshold may be related to a quantity of solder balls on the chip. For example, for solder balls of some pressure bearing specifications, the second pressure threshold may be <NUM> grams per ball (grams per ball, g/ball).

An embodiment of this application further provides a chip packaging method. The packaging method is applicable to the chip package structure <NUM> shown in any one of <FIG> or <FIG>. The chip packaging method may be performed before the substrate <NUM> is connected to the printed circuit board <NUM>, or may be performed after the substrate <NUM> is connected to the printed circuit board <NUM>. In other words, the chip packaging method may be performed before board loading. In other words, packaging is performed in a production process of the chip <NUM>. Alternatively, the chip packaging method may be performed after board loading. In other words, packaging is performed in a process of an intermediate product (for example, a PCB board) of a production device. The following describes the chip packaging method in this embodiment of this application with reference to specific examples.

Example <NUM>: The following uses an example in which the chip packaging method is performed before the substrate <NUM> is connected to the printed circuit board <NUM> for description. Refer to <FIG>. As shown in <FIG>, the chip packaging method may include S1401 and S1402.

S1401: Form, on the substrate <NUM>, the molding part <NUM> that surrounds a chip <NUM>.

For example, the molding part <NUM> may be formed in the following manners: a molding process, an injection molding process, or a glue dispensing and curing process.

It may be understood that, in this embodiment of this application, before the operation S1401 is performed, a connection structure of the substrate <NUM>, a first pin layer <NUM>, and the chip <NUM> is shown in <FIG>. The chip <NUM> is disposed on the substrate <NUM>, and the first pin layer <NUM> is disposed between the chip <NUM> and the substrate <NUM>. For a connection manner of the substrate <NUM>, the first pin layer <NUM>, and the chip <NUM>, refer to a connection manner of the substrate <NUM>, the first pin layer <NUM>, and the chip <NUM> in a conventional technology.

The following describes in detail a manner of performing S1401 by using an example with reference to the glue dispensing and curing process.

Manner <NUM> not encompassed by the subject-matter of the claims but considered useful for understanding the invention: Glue dispensing and curing are directly performed to form the molding part <NUM>.

As shown in <FIG> not encompassed by the subject-matter of the claims but considered useful for understanding the invention, the molding part <NUM> that surrounds a side surface of the chip <NUM> and a side surface of the first pin layer <NUM> is formed through the glue dispensing and curing process.

Optionally, in this embodiment of this application, an outer side surface or an upper surface of the molding part <NUM> may be irregular. In this case, after a material for forming the molding part <NUM> is cured, an operation such as grinding or polishing may be further performed on the outer side surface or the upper surface of the molding part <NUM>.

Manner <NUM>: The molding part <NUM> is formed between an enclosure dam <NUM> and the chip <NUM>, as shown in (a) in <FIG> in <FIG>.

For example, S1401 is performed on the structure shown in (a) in <FIG> in <FIG>, to correspondingly form a structure shown in <FIG> or <FIG>. In this case, in S1401, the forming, on the substrate <NUM>, the molding part <NUM> that surrounds the chip <NUM> may include: forming, between the chip <NUM> and the enclosure dam <NUM> through the glue dispensing and curing process, the molding part <NUM> that surrounds the side surface of the chip <NUM> and the side surface of the first pin layer <NUM>.

In this case, before the forming, on the substrate <NUM>, the molding part <NUM> that surrounds the chip <NUM> in S1401, the chip packaging method shown in <FIG> may further include step <NUM>.

Step <NUM>: Form the enclosure dam <NUM> for limiting the molding part <NUM> on a periphery of the chip <NUM>. The enclosure dam <NUM> is located on the substrate <NUM>.

Optionally, in step <NUM>, the forming the enclosure dam <NUM> for limiting the molding part <NUM> on a periphery of the chip <NUM> may include: as shown in (a) in <FIG>, in the structure shown in <FIG>, disposing a thermosetting material on the substrate <NUM> around the chip <NUM> through the dispensing process. Then, the thermosetting material around the chip <NUM> is heated to a preset temperature, so that the thermosetting material is attached to the side surface of the first pin layer <NUM>, the side surface of the chip <NUM>, and a part of the surface of the substrate <NUM> that is close to the chip <NUM> (that is, the upper surface of the substrate <NUM>) and that is not covered by the first pin layer <NUM>. Then, the thermosetting material is cooled so that the thermosetting material is cured, to form the enclosure dam <NUM>. A material of the enclosure dam <NUM> may be the same as the material of the molding part <NUM>.

It may be understood that, in this embodiment of this application, an outer side surface or an upper surface of the enclosure dam <NUM> may be irregular. In this case, after the material for forming the enclosure dam <NUM> is cured, an operation such as grinding or polishing may be further performed on the outer side surface or the upper surface of the enclosure dam <NUM>.

Alternatively, optionally, in step <NUM>, the forming the enclosure dam <NUM> for limiting the molding part <NUM> on a periphery of the chip <NUM> may include: as shown in (b) in <FIG>, in the structure shown in <FIG>, bonding the supporting part 501a to the substrate <NUM> on the periphery of the chip <NUM> by using the bonding adhesive 501b. In other words, a structure including the supporting part S01a and the bonding adhesive 501b may be used as the enclosure dam <NUM>. The supporting part 501a and the chip <NUM> are located on a same side of the substrate <NUM>.

In addition, for descriptions of structures and materials of the supporting part 501a and the molding part <NUM>, refer to the foregoing structure descriptions and the foregoing material descriptions of the chip package structure <NUM>.

It should be noted that, in this embodiment of this application, grinding the surface that is of the molding part <NUM> and that is away from the substrate <NUM> and/or the second surface 402b of the chip <NUM> through the grinding process makes the surface that is of the molding part <NUM> and that is away from the substrate <NUM> be flush with the second surface 402b of the chip <NUM>. To be specific, grinding the upper surface of the molding part <NUM> or the upper surface of the chip <NUM> makes the upper surface of the molding part <NUM> be flush with the upper surface of the chip <NUM>.

It may be understood that, as shown in <FIG>, before the forming, on the substrate <NUM>, the molding part <NUM> that surrounds the chip <NUM> in S1401, the chip packaging method shown in <FIG> may further include step <NUM>.

Step <NUM>: Connect the chip <NUM> to the substrate <NUM> to form the structure shown in <FIG>.

In addition, for descriptions of a specific structure and material of the molding part <NUM> or the supporting part 501a formed by performing S1401, refer to the foregoing structure descriptions and the foregoing material descriptions of the chip package structure <NUM>.

S1402: Form the waterproof layer <NUM> on the second surface 402b of the chip <NUM> and the surface that is of the molding part <NUM> and that is away from the substrate <NUM>.

It may be understood that the first waterproof sublayer, the second waterproof sublayer, or the third waterproof sublayer may be formed through one of the following processes: physical vapor deposition (physical vapor deposition, PVD), chemical vapor deposition (chemical vapor deposition, CVD), and atomic layer deposition (atomic layer deposition, ALD). For example, the waterproof layer <NUM> includes the first waterproof sublayer, the second waterproof sublayer, or the third waterproof sublayer shown in <FIG>. The first waterproof sublayer is first formed, and then the second waterproof sublayer is formed on a side that is away from the chip <NUM> or the molding part <NUM>. Next, the third waterproof sublayer is formed on a side that is of the second waterproof layer and that is away from the chip <NUM> or the molding part <NUM>.

For structure descriptions and material descriptions of the waterproof layer <NUM>, refer to the foregoing structure descriptions of the chip package structure <NUM>. It may be understood that the foregoing process for forming the waterproof layer <NUM> is merely used as an example. In an actual implementation, another process may be used based on an actual scenario.

A structure obtained after the waterproof layer <NUM> is formed in the structure shown in <FIG> is shown in <FIG>. A structure obtained after the waterproof layer <NUM> is formed in the structure shown in <FIG> is shown in <FIG>.

Optionally, the chip packaging method shown in <FIG> in this embodiment of this application may further include S1403.

S1403: Connect the substrate <NUM> in the chip package structure <NUM> to the printed circuit board <NUM>. After the chip package structure <NUM> shown in <FIG> performs S1403, a structure shown in (a) in <FIG> not encompassed by the subject-matter of the claims but considered useful for understanding the invention is formed. After the chip package structure <NUM> shown in <FIG> performs S1403, a structure shown in (b) in <FIG> is formed.

As shown in <FIG> or <FIG>, in this embodiment of this application, a structure formed after S1403 is performed may be further connected to the refrigerating apparatus <NUM>. For example, the structure shown in (a) in <FIG> is connected to the refrigerating apparatus <NUM> to form the structure shown in <FIG>. For another example, the structure shown in (b) in <FIG> is connected to the refrigerating apparatus <NUM>, to form the structure shown in <FIG>.

Example <NUM>: The following uses an example in which the chip packaging method is performed after the substrate <NUM> is connected to the printed circuit board <NUM> for description. Refer to <FIG>. As shown in <FIG>, the chip packaging method may include S2001 and S2002.

S2001: Form, on a substrate <NUM>, a molding part <NUM> that surrounds a chip <NUM>.

It may be understood that, when S2001 starts to be performed, initial states of the substrate <NUM>, a first pin layer <NUM>, the chip <NUM>, and a printed circuit board <NUM> are shown in <FIG> not encompassed by the subject-matter of the claims but considered useful for understanding the invention. The substrate <NUM> is disposed on the printed circuit board <NUM>, and the chip <NUM> is disposed on a side that is of the substrate <NUM> and that is away from the printed circuit board <NUM>. The first pin layer <NUM> is disposed between the chip <NUM> and the substrate <NUM>.

The following describes in detail a manner of performing S2001 by using an example with reference to the glue dispensing and curing process.

For an implementation of Manner <NUM>, refer to the specific implementation of Manner <NUM>.

In this way, the structure shown in <FIG> may form a structure shown in <FIG> not encompassed by the subject-matter of the claims but considered useful for understanding the invention.

Manner <NUM>: The molding part <NUM> is formed between the enclosure dam <NUM> and the chip <NUM>, as shown in (a) in <FIG> in <FIG>.

In this case, before S2001 is performed, the chip packaging method shown in <FIG> may further include step <NUM>.

Step <NUM>: Form the enclosure dam <NUM> for limiting the molding part <NUM> on the periphery of the chip <NUM>. For a specific implementation of step <NUM>, refer to the implementation of step <NUM>.

After step <NUM> is performed, the structure shown in <FIG> may form a structure shown in (a) in <FIG> in <FIG>.

Optionally, in this embodiment of this application, before step <NUM> is performed, the chip packaging method shown in <FIG> may further include: Step <NUM>: Connect the chip <NUM> to the substrate <NUM> to form the structure shown in <FIG>.

Optionally, before the forming, on the substrate <NUM>, the molding part <NUM> that surrounds the chip <NUM> in S2001, the chip packaging method shown in <FIG> may further include S2000. S2000: Connect the substrate <NUM> to the printed circuit board <NUM> to form the structure shown in <FIG>. S2000 may be performed before step <NUM>, or may be performed after step <NUM>. This is not limited in this embodiment of this application.

S2002: Form the waterproof layer <NUM> on the second surface 402b of the chip <NUM> and the surface that is of the molding part <NUM> and that is away from the substrate <NUM>.

For example, with reference to the structure shown in <FIG>, the operation S2002 is performed, to form the structure shown in (a) in <FIG>. The operation S2002 is performed on a structure shown in <FIG>, to form the structure shown in (b) in <FIG>.

It may be understood that, in this embodiment of this application, a top view of the structure shown in <FIG> is shown in <FIG>.

For an implementation of S2002, refer to the specific implementation of S1402.

In addition, for descriptions of the structure and the material of the molding part <NUM>, refer to the foregoing structure descriptions and the foregoing material descriptions of the chip package structure <NUM>.

Claim 1:
A chip package structure (<NUM>), comprising:
a substrate (<NUM>);
a chip (<NUM>), having a first surface (402a) close to the substrate (<NUM>) and a second surface (402b) opposite to the first surface (402a);
a first pin layer (<NUM>), comprising a plurality of pins disposed between the first surface (402a) of the chip (<NUM>) and the substrate (<NUM>);
a molding part (<NUM>), disposed on a periphery of the chip (<NUM>) and the first pin layer (<NUM>), wherein a surface that is of the molding part (<NUM>) and that is away from the substrate (<NUM>) is higher than the first surface (402a) of the chip (<NUM>), and covers a side surface of the first pin layer (<NUM>) and at least a part of a side surface of the chip (<NUM>), and the molding part (<NUM>) is attached to the side surface of the chip (<NUM>); and
a waterproof layer (<NUM>), disposed on the second surface (402b) of the chip (<NUM>) and the surface that is of the molding part (<NUM>) and that is away from the substrate (<NUM>);
wherein the chip package structure (<NUM>) further comprises:
a supporting part (501a), disposed on the substrate (<NUM>), wherein the supporting part (501a) surrounds the molding part (<NUM>), and an outer side surface of the molding part (<NUM>) is attached to an inner side surface of the supporting part (501a), wherein a surface that is of the supporting part (501a) and that is away from the substrate (<NUM>) is higher than the second surface (402b) of the chip (<NUM>).