Patent Description:
Semiconductor packages in which a vertical Schottky barrier diode is connected onto a lead frame are known (see, e.g., Patent Literature <NUM>).

The Schottky barrier diode described in Patent Literature <NUM> has a SiC semiconductor substrate and a SiC epitaxial layer formed thereon, and is configured such that an electrode provided on the SiC semiconductor substrate is connected to a pad portion of a lead frame through a conductive bonding material, and an electrode provided on the SiC epitaxial layer is connected to a terminal of the lead frame via a conductive wire.

Furthermore, documents <CIT>, <CIT> and <CIT> also disclose prior art.

According to Patent Literature <NUM>, semiconductor materials different from SiC, such as GaN or Ga<NUM>O<NUM>, may be used. However, when the substrate of the Schottky barrier diode is formed of a material with low thermal conductivity, such as Ga<NUM>O<NUM>, heat dissipation is poor since heat generated in the epitaxial layer during operation of the Schottky barrier diode cannot be efficiently transferred to the lead frame, which adversely affects the operation of the Schottky barrier diode.

It is an object of the invention to provide a semiconductor device in which a vertical semiconductor element formed using a Ga<NUM>O<NUM>-based semiconductor as a material of a substrate and an epitaxial layer material is mounted on a lead frame such that heat can be efficiently released from the semiconductor device to the lead frame.

To achieve the above-mentioned object, one aspect of the invention provides a semiconductor device defined by (<NUM>) to (<NUM>) below.

According to the invention, a semiconductor device can be provided in which a vertical semiconductor element formed using a Ga<NUM>O<NUM>-based semiconductor as a material of a substrate and an epitaxial layer material is mounted on a lead frame such that heat can be efficiently released from the semiconductor device to the lead frame.

In the first embodiment of the invention, a Schottky barrier diode (SBD) is used as a vertical semiconductor element.

<FIG> are vertical cross-sectional views showing semiconductor devices <NUM> in the first embodiment. The semiconductor device <NUM> includes a lead frame <NUM> and an SBD <NUM> face-down mounted on the lead frame <NUM>. The SBD <NUM> is fixed and electrically connected to the lead frame <NUM> by a conductive adhesive <NUM>.

The semiconductor device <NUM> shown in <FIG> and the semiconductor device <NUM> shown in <FIG> are different in ranges where the conductive adhesive <NUM> covers the lead frame <NUM>. This will be described later.

Hereinafter, the vertical direction of each member of the SBD <NUM> means the vertical direction when the SBD <NUM> is mounted. For example, a lower surface of each member is a surface on the lead frame <NUM> side, and an upper surface is a surface on the opposite side to the lead frame <NUM>.

The lead frame <NUM> has a raised portion <NUM> on a surface thereof. A flat portion of the lead frame <NUM>, which is located around the raised portion <NUM> and on which the raised portion <NUM> is not provided, is a flat portion <NUM>. The lead frame <NUM> of the semiconductor device <NUM> is configured such that the raised portion <NUM> and the flat portion <NUM> are integrated. The lead frame <NUM> is formed of a conductor such as copper or a copper-based alloy.

The SBD <NUM> has a substrate <NUM>, an epitaxial layer <NUM> stacked on the substrate <NUM>, a cathode electrode <NUM> connected to an upper surface (a surface on the opposite side to the epitaxial layer <NUM>) of the substrate <NUM>, and an anode electrode <NUM> connected to a lower surface (a surface on the opposite side to the substrate <NUM>) of the epitaxial layer <NUM>. The anode electrode <NUM> is connected to the raised portion <NUM> of the lead frame <NUM> through the conductive adhesive <NUM>, and the cathode electrode <NUM> is connected, through a bonding wire <NUM> formed of Al, etc., to a portion of the lead frame <NUM> which is electrically insulated from the anode electrode <NUM>.

In the SBD <NUM>, a Schottky barrier at an interface between the anode electrode <NUM> and the epitaxial layer <NUM> is lowered by applying a forward bias between the anode electrode <NUM> and the cathode electrode <NUM>, allowing a current to flow from the anode electrode <NUM> to the cathode electrode <NUM>. On the other hand, when a reverse bias is applied between the anode electrode <NUM> and the cathode electrode <NUM>, the Schottky barrier at the interface between the anode electrode <NUM> and the epitaxial layer <NUM> increases and the current does not flow.

The substrate <NUM> and the epitaxial layer <NUM> are formed of a Ga<NUM>O<NUM>-based semiconductor and contain an n-type dopant. This n-type dopant is preferably a group IV element such as Si or Sn. An n-type dopant concentration in the substrate <NUM> is usually higher than an n-type dopant concentration in the epitaxial layer <NUM>.

The Ga<NUM>O<NUM>-based semiconductor here is Ga<NUM>O<NUM>, or Ga<NUM>O<NUM> containing a substitutional impurity such as Al or In. The Ga<NUM>O<NUM>-based semiconductor is preferably a single crystal. The Ga<NUM>O<NUM>-based semiconductor is also preferably a β-type crystal.

Using Table <NUM> below, characteristics of β-type Ga<NUM>O<NUM> β-Ga<NUM>O<NUM>) will be described in comparison with characteristics of other semiconductors.

As shown in Table <NUM>, Ga<NUM>O<NUM> has a larger band gap than Si, GaAs, GaN and SiC, indicating that it provides excellent breakdown voltage when used as a material for semiconductor element. On the other hand, Ga<NUM>O<NUM> has low thermal conductivity and causes a problem of poor heat dissipation when used as a material for semiconductor element.

Therefore, in the semiconductor device <NUM> of the first embodiment, the SBD <NUM> is face-down mounted so that heat generated in the epitaxial layer <NUM> is released to the lead frame <NUM> without passing through the thick substrate <NUM>.

<FIG> are vertical cross-sectional views showing semiconductor devices 9a and 9b made as reference examples to evaluate a difference in heat dissipation between when the SBD <NUM> is face-down mounted and when face-up mounted. The SBD <NUM> is face-down mounted on a lead frame <NUM> in the semiconductor device 9a, and the SBD <NUM> is face-up mounted on the lead frame <NUM> in the semiconductor device 9b.

<FIG> is a graph showing results of measuring thermal resistance of the semiconductor devices 9a and 9b. <FIG> shows that a magnitude of thermal resistance with respect to a magnitude of thermal capacitance is significantly smaller for the semiconductor device 9a than for the semiconductor device 9b, and the semiconductor device 9a having the face-down mounted SBD <NUM> has better heat dissipation.

Meanwhile, since the band gap of the Ga<NUM>O<NUM>-based semiconductor is large, electric field intensity inside the epitaxial layer <NUM> formed of the Ga<NUM>O<NUM>-based semiconductor is larger than that in epitaxial layers formed of other semiconductors. For this reason, in the semiconductor device <NUM> of the first embodiment, a field plate portion <NUM> is provided on the anode electrode <NUM> of the SBD <NUM> to disperse the electric field near an edge of the anode electrode <NUM> where the electric field is particularly likely to concentrate, thereby suppressing a decrease in breakdown voltage.

The field plate portion <NUM> of the anode electrode <NUM> of the SBD <NUM> here is a portion of an outer peripheral portion of the anode electrode <NUM> that rides over an insulating film <NUM>, and a length L of the field plate portion <NUM> is, e.g., <NUM> to <NUM>. The insulating film <NUM> is an insulating film formed of SiOz, etc., and provided on the lower surface of the epitaxial layer <NUM> around the anode electrode <NUM>, and the insulating film <NUM> is present between the field plate portion <NUM> and the epitaxial layer <NUM>. A thickness of the insulating film <NUM> is, e.g., <NUM> to <NUM>. An outer peripheral portion and side surface of the field plate portion <NUM> are covered with an insulator <NUM> formed of polyimide, plasma SiN, or plasma SiO, etc..

However, when a reverse bias voltage is applied to the SBD <NUM>, charges gather on the surface of the epitaxial layer <NUM> due to the electric field generated in the conductive adhesive <NUM> or the lead frame <NUM> located below the epitaxial layer <NUM> (the field effect), and if a distance between the epitaxial layer <NUM> and the conductive adhesive <NUM> or the lead frame <NUM> is too small, the electric field intensity on the surface of the epitaxial layer <NUM> becomes high enough to affect breakdown voltage of the SBD <NUM>.

Thus, in the semiconductor device <NUM> of the first embodiment, the SBD <NUM> is fixed in a state of resting on the top of the raised portion <NUM> of the lead frame <NUM>, and an outer peripheral portion <NUM> of the epitaxial layer <NUM>, which is located on the outer side of the field plate portion <NUM>, is located directly above the flat portion <NUM> of the lead frame which is a portion <NUM> at which the raised portion <NUM> is not provided. This increases the distance between the outer peripheral portion <NUM> and the conductive adhesive <NUM> or the lead frame <NUM>, and a decrease in breakdown voltage of the SBD <NUM> due to the field effect is thereby suppressed.

Here, D<NUM> is a distance between the outer peripheral portion <NUM> and the conductive adhesive <NUM> located directly thereunder when the conductive adhesive <NUM> is present on the flat portion <NUM> directly below the outer peripheral portion <NUM> as shown in <FIG>, and D<NUM> is a distance between the outer peripheral portion <NUM> and the flat portion <NUM> when the conductive adhesive <NUM> is not present directly below the outer peripheral portion <NUM> as shown in <FIG>. To more effectively suppress a decrease in breakdown voltage of the SBD <NUM> due to the field effect, both the distance D<NUM> and the distance D<NUM> are preferably not less than <NUM>.

A thickness of the substrate <NUM> is, e.g., <NUM> to <NUM>. A thickness of the epitaxial layer <NUM> is, e.g., <NUM> to <NUM>.

The cathode electrode <NUM> is formed of a metal capable of forming an ohmic junction with a Ga<NUM>O<NUM>-based semiconductor, such as Ti. The cathode electrode <NUM> may have a multilayer structure formed by stacking films of different metals, e.g., Ti/Ni/Au or Ti/Al. When having a multilayer structure, a layer in contact with the substrate <NUM> is formed of a metal capable of forming an ohmic junction with a Ga<NUM>O<NUM>-based semiconductor.

The anode electrode <NUM> is formed of a metal such as Mo, Pt, or Ni. The anode electrode <NUM> may have a multilayer structure formed by stacking films of different metals, e.g., Mo/Al, Pt/Au, Ni/Au, Ni/Ti/Au or Pt/Al, etc. When, e.g., the conductive adhesive <NUM> is solder, it is preferable to stack Ti/Ni/Au, etc., as the upper layer of Mo/Al, Pt/Au, Ni/Au, Ni/Ti/Au or Pt/Al.

For example, nano silver paste or solder (e.g., Au-Sn low-melting point solder), etc., is used as the conductive adhesive <NUM>. The nano silver paste with excellent reliability under high-temperature environment is particularly preferable as the conductive adhesive <NUM>. The conductive adhesive <NUM> is connected to the anode electrode <NUM> but may not be in contact with the field plate portion <NUM>. In other words, a gap may be present between the conductive adhesive <NUM> and the field plate <NUM>. Also, a side portion of the raised portion <NUM> may not be in contact with the conductive adhesive <NUM>. In other words, to electrically connect the raised portion <NUM> to the anode electrode <NUM>, it is only necessary that an upper portion of the raised portion <NUM> is in contact with the conductive adhesive <NUM>.

<FIG> are perspective views showing an example of the overall configuration of the semiconductor device <NUM> as a package in which the SBD <NUM> is sealed. <FIG> is a diagram in which illustration of a molded resin <NUM> (described later) is omitted. In this example, the lead frame <NUM> has a pad portion 20a, a terminal portion 20b electrically connected to the pad portion 20a, and terminal portions 20c insulated from the pad portion 20a.

The anode electrode <NUM> of the SBD <NUM> is connected to the pad portion 20a, and the bonding wires <NUM> are connected to the terminal portions 20c. The pad portion 20a with the SBD <NUM> mounted thereon and end portions on of the terminal portions 20b and 20c on the pad portion 20a side are sealed with the molded resin <NUM>.

<FIG> is a vertical cross-sectional view showing a semiconductor device <NUM> which is a modification of the semiconductor device <NUM> in the first embodiment. The raised portion <NUM> of the lead frame <NUM> of the semiconductor device <NUM> is formed by pressing. Therefore, the lead frame <NUM> has a recessed portion <NUM> on the back side of the raised portion <NUM>.

The second embodiment of the invention is different from the first embodiment in the configuration of the lead frame. Note that, description for the same features as those in the first embodiment may be omitted or simplified.

<FIG> is a vertical cross-sectional view showing a semiconductor device <NUM> in the second embodiment. The semiconductor device <NUM> includes a lead frame <NUM> and the SBD <NUM> face-down mounted on the lead frame <NUM>. The SBD <NUM> is fixed and electrically connected to the lead frame <NUM> by the conductive adhesive <NUM>.

The lead frame <NUM> of the semiconductor device <NUM> has a conductor <NUM> as the raised portion. The conductor <NUM> is a separate piece from a main body <NUM> serving as the flat portion of the lead frame <NUM>, and is fixed and electrically connected to the main body <NUM> by the conductive adhesive <NUM>.

The conductor <NUM> is formed of a material having a higher thermal conductivity than the conductive adhesive <NUM>, such as Cu, and typically has a plate-like shape. Meanwhile, the main body <NUM> of the lead frame <NUM> is formed of the same material as the lead frame <NUM> in the first embodiment.

The conductive adhesive <NUM> is connected to the anode electrode <NUM> but may not be in contact with the field plate portion <NUM>. In other words, a gap may be present between the conductive adhesive <NUM> and the field plate <NUM>. Also a side portion of the conductor <NUM> may not be in contact with the conductive adhesive <NUM>. In other words, to electrically connect the conductor <NUM> to the anode electrode <NUM> and the lead frame <NUM>, it is only necessary that upper and lower portions of the conductor <NUM> are in contact with the conductive adhesive <NUM>.

<FIG> are vertical cross-sectional views showing an example of a process of mounting the SBD <NUM> on the lead frame <NUM> in the second embodiment.

Firstly, as shown in <FIG>, the conductor <NUM> is connected to the main body <NUM> of the lead frame <NUM> by a conductive adhesive 30a. The conductive adhesive 30a here is a portion of the conductive adhesive <NUM> and is used to connect the conductor <NUM> to the main body <NUM>.

Next, as shown in <FIG>, the surface of the conductor <NUM> is covered with a conductive adhesive 30b. The conductive adhesive 30b here is a portion of the conductive adhesive <NUM> and is used to connect the SBD <NUM> to the lead frame <NUM>.

Next, as shown in <FIG>, the SBD <NUM> is connected to the lead frame <NUM> having the conductor <NUM> as the raised portion. In this regard, the method of connecting the conductor <NUM> to the main body <NUM> and the method of connecting the SBD <NUM> to the lead frame <NUM> are not limited to the methods shown in <FIG>, and also the method of forming the conductive adhesive <NUM> in which the conductive adhesive 30a and the conductive adhesive 30b are separately formed is only an example. For example, after bonding the conductor <NUM> to the anode electrode <NUM> using a conductive adhesive, etc., the SBD <NUM> to which the conductor <NUM> is bonded may be bonded to the lead frame <NUM> using a conductive adhesive, etc..

The third embodiment of the invention is different from the first embodiment in that the distance between the epitaxial layer and the lead frame is increased without providing the raised portion on the lead frame. Note that, description for the same features as those in the first embodiment may be omitted or simplified.

<FIG> is a vertical cross-sectional view showing a semiconductor device <NUM> in the third embodiment. The semiconductor device <NUM> includes a lead frame <NUM> and the SBD <NUM> face-down mounted on the lead frame <NUM>. The SBD <NUM> is fixed and electrically connected to the lead frame <NUM> by the conductive adhesive <NUM>.

In the semiconductor device <NUM>, the SBD <NUM> is connected to a flat portion of the lead frame <NUM>, and the distance D<NUM> between the outer peripheral portion <NUM> and the lead frame <NUM> is increased by increasing a thickness of the conductive adhesive <NUM> that electrically connects the SBD <NUM> to the lead frame <NUM>. The distance D<NUM> is preferably not less than <NUM>, in the same manner as the semiconductor device <NUM> in the first embodiment.

To increase the distance D<NUM>, the thickness of the conductive adhesive <NUM> can be increased while ensuring stability of the SBD <NUM> on the lead frame <NUM>, by increasing a thickness of the insulator <NUM> and using the insulator <NUM> to support the SBD <NUM> as shown in <FIG>. In this case, the sum of the thickness of the insulating film <NUM> and the thickness of the insulator <NUM> is substantially equal to the distance D<NUM>.

The conductive adhesive <NUM> is connected to the anode electrode <NUM> but may not be in contact with the field plate portion <NUM>. In other words, a gap may be present between the conductive adhesive <NUM> and the field plate portion <NUM>.

The fourth embodiment of the invention is different from the first embodiment in that a recessed portion is provided on the upper surface of the substrate. Note that, description for the same features as those in the first embodiment may be omitted or simplified.

<FIG> is a vertical cross-sectional view showing a semiconductor device <NUM> in the fourth embodiment. The semiconductor device <NUM> includes the lead frame <NUM> and a SBD 10a face-down mounted on the lead frame <NUM>. The SBD 10a is fixed and electrically connected to the lead frame <NUM> by the conductive adhesive <NUM>.

In the semiconductor device <NUM>, a recessed portion <NUM> is formed on an upper surface (a surface on the opposite side to the epitaxial layer <NUM>) of a substrate 11a, a cathode electrode 13a is formed on the upper surface of the substrate 11a including an inner surface of the recessed portion <NUM>, and the bonding wire <NUM> is connected to the cathode electrode 13a on a bottom surface of the recessed portion <NUM>.

By providing the recessed portion <NUM> on the substrate 11a, a distance between the epitaxial layer <NUM> and the cathode electrode 13a is reduced and heat generated in the epitaxial layer <NUM> can be efficiently released also from the cathode electrode 13a side. The heat transferred to the cathode electrode 13a is dissipated from the bonding wire <NUM>, etc., to the outside of the SBD 10a.

A portion of the substrate 11a at which the recessed portion <NUM> is not provided has the same thickness as the substrate <NUM> in the first embodiment (e.g., <NUM> to <NUM>). Therefore, a decrease in mechanical strength can be suppressed when forming the recessed portion <NUM> as compared to when the substrate is thinned by polishing the whole surface. A thickness of the portion of the substrate 11a at which the recessed portion <NUM> is not provided (a distance between a bottom of the recessed portion <NUM> and a lower surface of the substrate 11a) is, e.g., <NUM> to <NUM>.

The SBD 10a in the fourth embodiment may be mounted on the flat portion of the lead frame <NUM> by the method in the third embodiment.

The fifth embodiment of the invention is different from the first embodiment in that a trench SBD is used as a vertical semiconductor element. Note that, description for the same features as those in the first embodiment may be omitted or simplified.

<FIG> is a vertical cross-sectional view showing a semiconductor device <NUM> in the fifth embodiment. The semiconductor device <NUM> includes the lead frame <NUM> and a trench SBD <NUM> face-down mounted on the lead frame <NUM>. The trench SBD <NUM> is fixed onto and electrically connected to the raised portion <NUM> of the lead frame <NUM> by the conductive adhesive <NUM>.

The trench SBD <NUM> has a substrate <NUM>, an epitaxial layer <NUM> stacked on the substrate <NUM>, trenches <NUM> formed on a lower surface (a surface on the opposite side to the substrate <NUM>) of the epitaxial layer <NUM>, insulating films <NUM> covering inner surfaces of the trenches <NUM>, an insulating film <NUM> covering the inner surfaces of the outer trenches <NUM> and an outer peripheral portion of the lower surface of the epitaxial layer <NUM>, an anode electrode <NUM> that is formed on the lower surface of the epitaxial layer <NUM> so as to fill the trenches <NUM> and is in Schottky contact with the epitaxial layer <NUM>, an insulator <NUM> covering a side surface of the anode electrode <NUM>, and a cathode electrode <NUM> that is formed on an upper surface (a surface on the opposite side to the epitaxial layer <NUM>) of the substrate <NUM> and is in ohmic contact with the substrate <NUM>.

The substrate <NUM> and the epitaxial layer <NUM> are formed of a Ga<NUM>O<NUM>-based semiconductor, in the same manner as the substrate <NUM> and the epitaxial layer <NUM> in the first embodiment.

The anode electrode <NUM> and the cathode electrode <NUM> can be respectively formed of the same materials as the anode electrode <NUM> and the cathode electrode <NUM> in the first embodiment. The anode electrode <NUM> is connected to the lead frame <NUM> through the conductive adhesive <NUM>, and the cathode electrode <NUM> is connected, through the bonding wire <NUM>, to a portion of the lead frame <NUM> which is electrically insulated from the anode electrode <NUM>.

Since the trench SBD <NUM> in the fifth embodiment is also face-down mounted in the same manner as the SBD <NUM> in the first embodiment, heat generated in the epitaxial layer <NUM> can be released to the lead frame <NUM> without passing through the thick substrate <NUM>.

In addition, a field plate portion <NUM> is provided on the anode electrode <NUM> of the trench SBD <NUM> to disperse the electric field near an edge of the anode electrode <NUM> where the electric field is particularly likely to concentrate, thereby suppressing a decrease in breakdown voltage.

The field plate portion <NUM> of the anode electrode <NUM> here is a portion of an outer peripheral portion of the anode electrode <NUM> which is located on the outer side of the trenches <NUM>, and an outer peripheral portion and side surface of the field plate portion <NUM> are covered with the insulator <NUM> formed of polyimide, plasma SiN, or plasma SiO, etc..

In the semiconductor device <NUM>, an outer peripheral portion <NUM> of the epitaxial layer <NUM>, which is located on the outer side of the field plate portion <NUM>, is located directly above the flat portion <NUM> of the lead frame <NUM> which is a portion at which the raised portion <NUM> is not provided. This increases the distance between the outer peripheral portion <NUM> and the conductive adhesive <NUM> or the lead frame <NUM>, and a decrease in breakdown voltage of the trench SBD <NUM> due to the field effect is thereby suppressed.

D<NUM>, which is a distance between the outer peripheral portion <NUM> and the conductive adhesive <NUM> located directly thereunder when the conductive adhesive <NUM> is present on the flat portion <NUM> directly below the outer peripheral portion <NUM>, and D<NUM>, which is a distance between the outer peripheral portion <NUM> and the flat portion <NUM> when the conductive adhesive <NUM> is not present directly below the outer peripheral portion <NUM>, are both preferably not less than <NUM>.

The trench SBD <NUM> in the fifth embodiment may be mounted on the flat portion of the lead frame <NUM> by the method in the third embodiment. That is, to increase the distance D<NUM>, the thickness of the conductive adhesive <NUM> may be increased while ensuring stability of the trench SBD <NUM> on the lead frame <NUM>, by increasing a thickness of the insulator <NUM> and using the insulator <NUM> to support the trench SBD <NUM>.

In addition, a recessed portion similar to the recessed portion <NUM> of the substrate 11a in the first embodiment may be formed on the substrate <NUM> of the trench SBD <NUM>, followed by forming the cathode electrode <NUM> on the upper surface of the substrate <NUM> including the inner surface of the recessed portion, and then connecting the bonding wire <NUM> to the cathode electrode <NUM> on a bottom surface of the recessed portion.

In addition, the conductive adhesive <NUM> is connected to the anode electrode <NUM> but may not be in contact with the field plate portion <NUM>. In other words, a gap may be present between the conductive adhesive <NUM> and the field plate portion <NUM>.

The sixth embodiment of the invention is different from the first embodiment in that a junction field effect transistor (JFET) is used as a vertical semiconductor element. Note that, description for the same features as those in the first embodiment may be omitted or simplified.

<FIG> is a vertical cross-sectional view showing a semiconductor device <NUM> in the sixth embodiment. The semiconductor device <NUM> includes a lead frame <NUM> and a JFET <NUM> face-down mounted on the lead frame <NUM>. The JFET <NUM> is fixed and electrically connected to the lead frame <NUM> by the conductive adhesive <NUM>.

The JFET <NUM> has a substrate <NUM>, an epitaxial layer <NUM> stacked on the substrate <NUM>, trenches <NUM> formed on a lower surface (a surface on the opposite side to the substrate <NUM>) of the epitaxial layer <NUM>, insulating films <NUM> covering inner surfaces of the trenches <NUM>, an insulating film <NUM> covering the inner surfaces of the outer trenches <NUM> and an outer peripheral portion of the lower surface of the epitaxial layer <NUM>, a gate electrode <NUM> with portions buried in the trenches <NUM>, insulators <NUM> covering the portions of the gate electrode <NUM> buried in the trenches <NUM>, a source electrode <NUM> that is formed on the epitaxial layer <NUM> and the insulator <NUM> and is in Schottky contact with the epitaxial layer <NUM>, an insulator <NUM> covering a portion of the gate electrode <NUM> exposed on the insulating film <NUM> and a side surface of the source electrode <NUM>, and a drain electrode <NUM> that is formed on an upper surface (a surface on the opposite side to the epitaxial layer <NUM>) of the substrate <NUM> and is in ohmic contact with the substrate <NUM>.

The source electrode <NUM> and the drain electrode <NUM> can be respectively formed of the same materials as the anode electrode <NUM> and the cathode electrode <NUM> in the first embodiment. The gate electrode <NUM> is formed of a conductor such as polycrystalline Si doped with Ni, Cr, Pt, Al, Au, or phosphorus.

The lead frame <NUM> has a portion 80a connected to the source electrode <NUM> and a portion 80b connected to the gate electrode <NUM>, and the portions 80a and 80b are electrically insulated from each other. The bonding wire <NUM> connected to the drain electrode <NUM> is connected to a portion of the lead frame <NUM> electrically insulated from the portions 80a and 80b.

Since the JFET <NUM> in the sixth embodiment is also face-down mounted in the same manner as the SBD <NUM> in the first embodiment, heat generated in the epitaxial layer <NUM> can be released to the lead frame <NUM> without passing through the thick substrate <NUM>.

In addition, a field plate portion <NUM> is provided on the source electrode <NUM> of the JFET <NUM> to disperse the electric field near an edge of the source electrode <NUM> where the electric field is particularly likely to concentrate, thereby suppressing a decrease in breakdown voltage.

The field plate portion <NUM> of the source electrode <NUM> here is a portion of an outer peripheral portion of the source electrode <NUM> that rides over the insulator <NUM>, and an outer peripheral portion and side surface of the field plate portion <NUM> are covered with the insulator <NUM> formed of polyimide, plasma SiN, or plasma SiO, etc..

In addition, in the semiconductor device <NUM>, the JFET <NUM> is connected to the flat portion of the lead frame <NUM>, and the distance D<NUM> between the lead frame <NUM> and an outer peripheral portion <NUM> of the epitaxial layer <NUM> located on the outer side of the field plate portion <NUM> is increased by increasing the thickness of the conductive adhesive <NUM> that electrically connects the JFET <NUM> to the lead frame <NUM>. The distance D<NUM> is preferably not less than <NUM>, in the same manner as the semiconductor device <NUM> in the first embodiment.

To increase the distance D<NUM>, the thickness of the conductive adhesive <NUM> can be increased while ensuring stability of the JFET <NUM> on the lead frame <NUM>, by increasing a thickness of the insulator <NUM> and using the insulator <NUM> to support the JFET <NUM> as shown in <FIG>. In this case, the sum of the thickness of the insulating film <NUM> and the thickness of the insulator <NUM> is substantially equal to the distance D<NUM>.

A recessed portion similar to the recessed portion <NUM> of the substrate 11a in the first embodiment may be formed on the substrate <NUM> of the JFET <NUM>, followed by forming the drain electrode <NUM> on the upper surface of the substrate <NUM> including the inner surface of the recessed portion, and then connecting the bonding wire <NUM> to the drain electrode <NUM> on a bottom surface of the recessed portion.

In addition, the conductive adhesive <NUM> is connected to the source electrode <NUM> but may not be in contact with the field plate portion <NUM>. In other words, a gap may be present between the conductive adhesive <NUM> and the field plate portion <NUM>.

In the first to sixth embodiments, by face-down mounting the vertical semiconductor element formed using a Ga<NUM>O<NUM>-based semiconductor and also by increasing a distance between the outer peripheral portion of the epitaxial layer and the lead frame or the conductive adhesive directly thereunder, it is possible to improve heat dissipation of the semiconductor element while suppressing a decrease in breakdown voltage due to the field effect.

Although the embodiments of the invention have been described, the invention is not intended to be limited to the embodiments. For example, even when another semiconductor element such as a vertical MOSFET or a MISFET is used as the vertical semiconductor element, similar effects can be obtained by the same method as those in the first to sixth embodiments in which the SBD, etc., is used. In addition, in each embodiment, a clip formed of Cu, etc., or a ribbon formed of Al, etc., may be used in place of the bonding wire <NUM>.

Claim 1:
A semiconductor device, comprising:
a lead frame comprising a raised portion on a surface; and
a semiconductor element that is face-down mounted on the lead frame and comprises a substrate comprising a Ga<NUM>O<NUM>-based semiconductor, an epitaxial layer comprising a Ga<NUM>O<NUM>-based semiconductor and stacked on the substrate, a first electrode connected to a surface of the substrate on an opposite side to the epitaxial layer, and a second electrode connected to a surface of the epitaxial layer on an opposite side to the substrate and comprising a field plate portion at an outer peripheral portion,
wherein the semiconductor element is fixed onto the raised portion, and
wherein an outer peripheral portion of the epitaxial layer, which is located on the outer side of the field plate portion, is located directly above a flat portion of the lead frame that is a portion at which the raised portion is not provided.