Patent Description:
The disclosure relates to the technical field of photon integrated chip detection, in particular to an avalanche photodetector and a preparation method therefor.

A photodetector is one of the key photoelectric devices in optical communication, optical interconnection, and photoelectric integration technologies. At present, the photodetector is widely used in various fields of military and national economies, in which an avalanche photodetector is welcomed by the market because of its high responsiveness and sensitivity.

<CIT> discloses an avalanche photodetector, which includes an absorption region including a first type of semiconductor material, a multiplication region including a second type of semiconductor material proximate to and separate from the absorption region and a reflector disposed proximate to the multiplication region. <CIT> discloses a photoelectric detector based on higher-order modes, which includes a detector body and a mode converter. The detector body includes a germanium absorption region which is surrounded and covered by an epitaxial silicon region. <CIT> discloses a semiconductor device, which includes a waveguide that overlies a buried oxide layer of a semiconductor substrate. An avalanche photodetector diode is disposed about a recessed waveguide layer section. A silicon cap is selectively deposited onto a germanium absorption region of the photodetector diode.

However, the current avalanche photodetector has disadvantages of high dark current and low responsiveness, so further improvements are needed.

In view of this, the invention provides an avalanche photodetector and a preparation method therefor, so as to solve at least one problem existing in the art.

In order to achieve the above purpose, technical solutions of the invention are realized as follows:.

In one aspect, an avalanche photodetector is provided. The avalanche photodetector includes a substrate and a device structure layer located on the substrate. The device structure layer at least includes a charge layer, a transition layer, an absorption layer and a first electrode contact layer which are sequentially arranged upward in a direction perpendicular to a plane of the substrate.

The charge layer is a layer of first a semiconductor material having a first doping type.

The transition layer is epitaxially grown on the charge layer, and the transition layer is an intrinsic layer.

The absorption layer is epitaxially grown on a first region of the transition layer, and the absorption layer is an intrinsic layer of a second semiconductor material.

The first electrode contact layer is epitaxially grown on a second region of the transition layer, and has a height higher than a height of the absorption layer so that the first electrode contact layer covers the absorption layer. The first electrode contact layer is a layer of the first semiconductor material.

A material of the transition layer is a composite material of the first semiconductor material and the second semiconductor material.

In an optional embodiment of the disclosure, the first semiconductor material is silicon, the second semiconductor material is germanium, and the composite material of the first semiconductor material and the second semiconductor material is silicon-germanium.

In an optional embodiment of the disclosure, the first doping type is P type.

In an optional embodiment of the disclosure, the avalanche photodetector further includes a first electrode contact region located in the first electrode contact layer, in which the first electrode contact region is a region of the first semiconductor material having the first doping type.

In an optional embodiment of the disclosure, the second region surrounds the first region. Alternatively, the second region includes two sub-regions separated by the first region.

In another aspect, a method for preparing an avalanche photodetector is provided. The method includes the following operations.

A first epitaxial layer is grown on the substrate, in which the first epitaxial layer is a layer of a first semiconductor material. Ion doping of a first doping type is performed on the first epitaxial layer to form a charge layer.

A second epitaxial layer is grown on the charge layer to form an intrinsic transition layer. A material of the second epitaxial layer is a composite material of the first semiconductor material and a second semiconductor material.

A third epitaxial layer is grown on a first region of the transition layer to form an intrinsic absorption layer. The third epitaxial layer is a layer of the second semiconductor material.

A fourth epitaxial layer is grown on a second region of the transition layer, and has a height higher than a height of the third epitaxial layer to form a first electrode contact layer covering the absorption layer. The fourth epitaxial layer is a layer of the first semiconductor material.

In an optional embodiment of the disclosure, the method further includes an operation of performing ion doping of a first doping type on the fourth epitaxial layer to form a first electrode contact region in the first electrode contact layer.

According to the invention, by arranging the transition layer and using the composite material of the semiconductor material and the second semiconductor material as the material of the transition layer, a better lattice matching can be obtained between the transition layer and the charge layer, and between the absorption layer and the first electrode contact layer. Therefore, on the one hand, the transition layer can be well grown on the charge layer, while avoiding the lattice mismatch problem caused by growing the absorption layer directly on the charge layer; on the other hand, by epitaxially growing the absorption layer by means of the first region of the transition layer, and epitaxially growing the first electrode contact layer by means of the second region of the transition layer, both the absorption layer and the first electrode contact layer have better growth quality, which is not only conducive to reducing the dark current and improving the responsiveness of the detector, but also makes the device structure simple and the process cost low.

Exemplary embodiments disclosed by the present disclosure are embodiments of the invention and will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the disclosure are shown in the drawings, it should be understood that the disclosure may be implemented in various forms and should not be limited to the specific embodiments set forth herein. Actually, these embodiments are provided for the purpose that the disclosure will be more thoroughly understood and the scope of the disclosure will be fully conveyed to those skilled in the art.

In the description below, numerous specific details are given for thorough understanding of the embodiments of the disclosure. However it will be apparent to those skilled in the art that the embodiments of the disclosure may be implemented without one or more of these details. In other examples, some technical features well-known in the art are not described, in order to avoid confusion with the embodiments of the disclosure. That is, not all features of actual embodiments are described herein, but well-known functions and structures are not described in detail.

In the drawings, the sizes of a layer, a region, and an element and their relative sizes may be exaggerated for clarity. The same reference sign denotes the same element throughout the text.

It should be understood that while an element or a layer is referred to as being "on", "adjacent to", "connected to" or "coupled to" other elements or layers, it may be directly on the other elements or layers, adjacent to the other elements or layers, or connected to or coupled to the other elements or layers, or an intermediate element or layer may be existent therebetween. In contrast, while an element is described as being "directly on", "directly adjacent to", "directly connected to" or "directly coupled to" other elements or layers, there is no intermediate element or layer therebetween. It should be understood that although the terms "first", "second", "third" and the like may be used to describe various elements, components, regions, layers, and/or portions, these elements, components, regions, layers, and/or portions should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or portion from another element, component, region, layer or portion. Therefore, without departing from the teaching of the embodiments of the disclosure, a first element, component, region, layer, or portion discussed hereinafter may be expressed as a second element, component, region, layer, or portion. While discussing a second element, component, region, layer, or portion, it does not mean that the first element, component, region, layer, or portion is necessarily present in the embodiments of the disclosure.

Spatial relationship terms such as "under. ", "lower", "underneath. ", "upper" and the like may be used herein for conveniently describing a relationship between one element or feature and another element or feature shown in the drawings. It should be understood that, the spatial relationship terms are intended to further include different orientations of a device in use and operation, in addition to the orientations shown in the drawings. For example, if the device in the drawings is turned over, the element or feature described as being "below" or "under" or "beneath" other elements will be oriented as being "above" the other elements or features. Therefore, the exemplary terms "below" and "under" may include two orientations of up and down. The device may be otherwise oriented (e.g., rotation for <NUM> degrees or other orientations), and the spatial terms used herein are interpreted accordingly.

The terms used herein are intended to describe specific embodiments only and are not to be a limitation to the embodiments of the disclosure. As used herein, singular forms "a/an", "one", and "said/the" are also intended to include plural forms, unless otherwise clearly indicated in the context. It should be further understood that terms "composing" and/or "including", while used in the specification, demonstrate the presence of the described features, integers, steps, operations, elements and/or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups. As used herein, a term "and/or" includes any and all combinations of related items listed.

In order to thoroughly understand the embodiments of the disclosure, detailed operations and structures will be set forth in the following description to illustrate the technical solution of the present disclosure. Optional embodiments of the disclosure are described in detail below. However the disclosure may be implemented via other embodiments, in addition to these detailed descriptions.

Silicon photon technology is a new generation technology, which is based on silicon and silicon-based substrate materials (such as SiGe/Si, silicon on insulator, etc.), and uses the existing complementary metal oxide semiconductor (CMOS) process to develop and integrate optical devices. Silicon photon technology combines the characteristics of ultra-large scale and ultra-high precision manufacturing of integrated circuit technology with the advantages of ultra-high speed and ultra-low power consumption of photon technology, and thus is a disruptive technology to deal with the failure of Moore's Law. This combination is due to the scalability of semiconductor wafer manufacturing, so the cost can be reduced. The photodetector, as one of the core devices of silicon photon architecture, has the function of converting optical signal to electrical signal. However, the energy band structure of crystalline silicon determines that its detection efficiency is very low in optical communication waveband. Although III-V group semiconductor materials are more suitable for photodetectors, III-V group semiconductor materials are incompatible with silicon technology and cannot be effectively integrated with silicon monolithically. Considering the compatibility between germanium material and CMOS process, the technology of forming germanium-silicon photodetector by using germanium material as the material of a light absorption layer is proposed in this field.

In a silicon photonic integrated chip, germanium-silicon material compatible with CMOS technology can be used to realize avalanche photoelectric detection, which uses silicon material as optical waveguide and avalanche gain region, and uses germanium material to absorb photons.

<FIG> is a side sectional view of an avalanche photodetector in the related art. In the related art, it is necessary to epitaxial grow an absorption layer <NUM> on a charge layer <NUM>. The charge layer <NUM> is configured to regulate the electric field distribution inside the detector. The absorption layer <NUM> is configured to absorb target detection light and convert photons of the target detection light into photo-generated carrier pairs, thereby converting optical signals into electrical signals. Herein, the charge layer <NUM> is a doped silicon layer, and the absorption layer <NUM> is a germanium layer. However, since the charge layer <NUM> and the absorption layer <NUM> are different semiconductor material layers, and the charge layer <NUM> has doped ions, lattice mismatch will occur between the charge layer <NUM> and the absorption layer <NUM> during epitaxial growth, thereby leading to poor growth quality of the absorption layer <NUM>, and thus reducing the responsivity of the detector. In addition, in the avalanche photodetector, it is required to arrange a heavy doped first electrode contact region on one side of the absorption layer <NUM>, so as to form an electric field with a second electrode contact region for extracting photo-generated carriers. If the first electrode contact region is directly formed on the absorption layer <NUM> by doping, as the absorption layer <NUM> serves as a light absorption region, the doping will cause light absorption loss and reduce the quantum efficiency of the detector. Therefore, in general, the first electrode contact layer <NUM> is grown epitaxial on the absorption layer <NUM> first, and then a first electrode contact region <NUM> is formed by performing doping in the first electrode contact layer <NUM>; the first electrode contact layer <NUM> is typically a silicon layer. However, due to the difference in material between the absorption layer <NUM> and the first electrode contact layer <NUM>, lattice mismatch occurs during epitaxial growth, thereby leading to poor growth quality of the first electrode contact layer <NUM>. In order to improve the growth quality, a transition layer can be arranged between each two semiconductor layers with different materials. However, if a transition layer is arranged between the charge layer <NUM> and the absorption layer <NUM>, and between the absorption layer <NUM> and the first electrode contact layer <NUM>, the process will be complicated and the cost will be high.

On the basis of this, the following technical solutions are proposed.

<FIG> is a side sectional view of an avalanche photodetector provided by an embodiment of the disclosure; and <FIG> is a top view of the avalanche photodetector provided by the embodiment of the disclosure. It should be noted that the side sectional view of <FIG> is obtained along the dashed line direction shown in <FIG>. As shown in <FIG> and <FIG>, the structure of the avalanche photodetector provided by the embodiments of the disclosure at least includes a substrate and a device structure layer on the substrate. The device structure layer at least includes a charge layer <NUM>, a transition layer <NUM>, an absorption layer <NUM> and a first electrode contact layer <NUM> which are sequentially arranged upward in a direction perpendicular to a plane of the substrate. Herein, the charge layer <NUM> is a layer of a first semiconductor material having a first doping type; the transition layer <NUM> is epitaxially grown on the charge layer <NUM>, and the transition layer <NUM> is an intrinsic layer; the absorption layer <NUM> is epitaxially grown on a first region <NUM> of the transition layer <NUM>, and the absorption layer <NUM> is an intrinsic layer of a second semiconductor material; the first electrode contact layer <NUM> is epitaxially grown on a second region <NUM> of the transition layer <NUM>, and has a height higher than a height of the absorption layer <NUM> so that the first electrode contact layer <NUM> covers the absorption layer <NUM>; the first electrode contact layer <NUM> is a layer of the first semiconductor material; and a material of the transition layer <NUM> is a composite material of the first semiconductor material and the second semiconductor material.

According to the invention, the transition layer <NUM> is added between the charge layer <NUM> and the absorption layer <NUM>, the absorption layer <NUM> is located on the first region <NUM> of the transition layer <NUM>, the first electrode contact layer <NUM> is located on the second region <NUM> of the transition layer <NUM> and on the absorption layer <NUM>, and the transition layer <NUM> is the intrinsic layer, and the material of the transition layer is the composite material of the first semiconductor material and the second semiconductor material. In this way, the growth quality of the absorption layer <NUM> and the first electrode contact layer <NUM> is improved, which is not only conducive to reducing the dark current and improving the responsivity of the detector, but also makes the device structure simple and the process cost low.

In an embodiment, the substrate may be an elemental semiconductor material substrate (e.g., silicon (Si) substrate, germanium (Ge) substrate, etc.), a composite semiconductor material substrate (e.g., germanium-silicon (SiGe) substrate, etc.), or a silicon on insulator (SOI) substrate, a germanium on insulator (GeOI) substrate, or the like. This embodiment is explained by taking the SOI substrate as a substrate, the SOI substrate includes a bottom substrate <NUM>, a buried oxygen layer <NUM> and a top silicon layer <NUM>. The bottom substrate <NUM> is a bottom silicon material, the buried oxygen layer <NUM> is located on the bottom substrate <NUM>, the buried oxygen layer <NUM> is, for example, a silicon dioxide layer; and the top silicon layer <NUM> is located on the buried oxygen layer <NUM>.

Herein, the substrate may include a top surface at a front face and a bottom surface at a back face opposite to the front face. A direction perpendicular to the top and bottom surfaces of the substrate is defined as a second direction in the case of ignoring the flatness of the top and bottom surfaces. The second direction is also the stacking direction of subsequent layers of the structure deposited on the substrate, or the height direction of the device. The plane where the top surface or the bottom surface of the substrate is located, or strictly speaking, the central plane in the thickness direction of the substrate, is determined as the plane of the substrate. The direction parallel to the plane of the substrate is the direction along the substrate plane. A first direction and a third direction intersecting each other are defined in the direction of the plane of the substrate. The first direction and the third direction are, for example, two directions perpendicular to each other. In the embodiment, as shown in <FIG>, the dashed line direction in the figure is the first direction and the direction perpendicular to the dashed line direction is the third direction.

In an embodiment, a first doped region <NUM> and a second doped region <NUM> adjacent to each other are formed in the top silicon layer <NUM>. The first doped region <NUM> and the second doped region <NUM> have the same doping type and both are in a second doping type different from the first doping type. The doping concentration of the second doped region <NUM> is greater than the doping concentration of the first doped region <NUM>. The first doped region <NUM> is, for example, an N+ doped region and the second doped region <NUM> is, for example, an N++ doped region. The doping concentration of the first doped region <NUM> is <NUM> × <NUM><NUM>/cm<NUM> to <NUM> × <NUM><NUM>/cm<NUM>; and the doping concentration of the second doped region <NUM> is <NUM> × <NUM><NUM>/cm<NUM> to <NUM> × <NUM><NUM>/cm<NUM>.

The charge layer <NUM>, the transition layer <NUM>, the absorption layer <NUM> and the first electrode contact layer <NUM> are arranged directly above the first doped region <NUM>. The second doped region <NUM> is used as a second electrode contact region of the avalanche photodetector.

It should be noted that there may be one or more second electrode contact regions <NUM> on the top silicon layer <NUM>. <FIG> and <FIG> only illustrate the case that two second electrode contact regions <NUM> are formed on the top silicon layer <NUM>. Specifically, the two second electrode contact regions <NUM> are respectively located on both sides of the first doped region <NUM>.

The avalanche photodetector further includes an avalanche layer <NUM> epitaxially grown on the top silicon layer <NUM>, and the avalanche layer <NUM> is an intrinsic layer of the first semiconductor material.

The avalanche layer <NUM> has a size in a range of <NUM> to <NUM> in the first direction, a size in a range of <NUM> to <NUM> in the second direction; and a size in a range of <NUM> to <NUM> in the third direction.

Here, the avalanche layer of the avalanche photodetector refers to the region where the avalanche multiplication of carriers occurs. The absorption layer of the avalanche photodetector can convert the incident optical signal into a plurality of electron-hole pairs, which flow to the electrode under the action of electric field to form photocurrent. The photocurrent formed by the absorption layer is further amplified by the avalanche layer through the action of avalanche multiplication, and then a photoelectric detection is realized by conducting the photocurrent through a pair of metal electrodes.

In an embodiment, the charge layer <NUM> is located on the avalanche layer <NUM>, and is a layer of the first semiconductor material with the first doping type.

The charge layer <NUM> is configured to regulate the distribution of an electric field inside the detector, so that there is a sufficiently high electric field in the avalanche layer <NUM> to enable the avalanche multiplication, and the absorption layer <NUM> has an appropriate electric field strength to prevent the electric field in the absorption layer <NUM> from being too high while ensuring high-speed drift of carriers, so as to prevent excessive tunnel dark current or harmful avalanche multiplication from being generated by the excessively high electric field.

The charge layer <NUM> has a size in a range of <NUM> to <NUM> in the first direction, a size in a range of <NUM> to <NUM> in the second direction, and a size in a range of <NUM> to <NUM> in the third direction.

According to the invention, the transition layer <NUM> is epitaxial grown on the charge layer <NUM>, and the transition layer <NUM> is the intrinsic layer. The material of the transition layer <NUM> is the composite material of the first semiconductor material and the second semiconductor material.

The transition layer <NUM> may also be referred to as an interface layer.

The transition layer <NUM> has a size in a range of <NUM> to <NUM> in the first direction, a size in a range of <NUM> to <NUM> in the second direction, and a size in a range of <NUM> to <NUM> in the third direction.

According to the invention, the absorption layer <NUM> is epitaxial grown on the first region <NUM> of the transition layer <NUM>, and the absorption layer <NUM> is the intrinsic layer of the second semiconductor material.

The absorption layer <NUM> is configured to absorb target detection light and convert photons of the target detection light into photo-generated carrier pairs, thereby converting optical signals into electrical signals.

The lower surface of the absorption layer <NUM> is in direct contact with the first region <NUM> of the transition layer <NUM>. One part of the lower surface of the first electrode contact layer <NUM> is in direct contact with the second region <NUM> of the transition layer <NUM>, and the other part is in direct contact with the upper surface of the absorption layer <NUM>. The first electrode contact layer <NUM> also covers the sidewall of the absorption layer <NUM> so as to be in direct contact with the sidewall.

The absorption layer <NUM> has a size in a range of <NUM> to <NUM> in the first direction. The size of the absorption layer <NUM> in the first direction is less than the size of the transition layer <NUM> in the first direction, and the size difference therebetween is for example, in a range of <NUM> to <NUM>.

The absorption layer <NUM> has a size in a range of <NUM> to <NUM> in the second direction.

The size of the absorption layer <NUM> in the third direction may be less than the size of the transition layer <NUM> in the third direction, and the size difference therebetween is, for example, greater than <NUM>. The second region <NUM> surrounds the first region <NUM>, and is a region of the transition layer <NUM> other than the first region <NUM>. Specifically, as shown in <FIG>, the first region <NUM> is, for example, a region within the smaller dashed line box, and the second region <NUM> is, for example, a region between the smaller dashed line box and the larger dashed line box in the figure.

In some other embodiments, the size of the absorption layer <NUM> in the third direction may be equal to the size of the transition layer <NUM> in the third direction. In this way, the absorption layer <NUM> may have a size in a range of <NUM> to <NUM> in the third direction. Specifically, as shown in <FIG>, the second region <NUM>' of the transition layer <NUM> is located on either side of the first region <NUM>', so that the part, in contact with the transition layer <NUM>, of the first electrode contact layer <NUM> is separated by the absorption layer <NUM> in the third direction. That is, the second region <NUM>' includes two sub-regions separated by the first region <NUM>'. The second region <NUM>' may likewise be a region of the transition layer <NUM> other than the first region <NUM>'.

According to the invention, the first electrode contact layer <NUM> is epitaxial grown on a second region <NUM> of the transition layer <NUM>, and has a height higher than a height of the absorption layer <NUM>, so that the first electrode contact layer <NUM> covers the absorption layer <NUM>. The first electrode contact layer <NUM> is a layer of the first semiconductor material.

Here, the first semiconductor material is silicon, the second semiconductor material is germanium, the composite material of the first semiconductor material and the second semiconductor material is silicon-germanium (SixGe<NUM>-x, where <NUM><x<<NUM>), and the first doping type is P type.

The doping concentration of the avalanche layer <NUM> is ≤ <NUM>×<NUM><NUM>/cm<NUM>. The doping concentration of the charge layer <NUM> is in a range from <NUM>×<NUM><NUM>/cm<NUM> to <NUM>×<NUM><NUM>/cm<NUM>. The doping concentration of the transition layer <NUM> is ≤ <NUM>×<NUM><NUM>/cm<NUM>. The doping concentration of the absorption layer <NUM> is in a range from <NUM>×<NUM><NUM>/cm<NUM> to <NUM>×<NUM><NUM>/cm<NUM>.

The top silicon layer <NUM> may also be referred to as a silicon flat layer. The avalanche layer <NUM> and the charge layer <NUM> may also be referred to as strip silicon waveguide layers. As such, the avalanche photodetector may include a region of silicon material, which may include the silicon flat layer and the strip silicon waveguide layers.

In an embodiment, the avalanche photodetector further includes a first electrode contact region <NUM> located in the first electrode contact layer <NUM>. The first electrode contact region <NUM> is a region of the first semiconductor material with the first doping type. It should be understood that the first electrode contact layer <NUM> further includes an undoped intrinsic region. In a specific embodiment, the first electrode contact region <NUM> is a P+ doped region, such as a P+ doped silicon region. The doping concentration of the first electrode contact region <NUM> is in a range from <NUM>×<NUM><NUM>/cm<NUM> to <NUM>×<NUM><NUM>/cm<NUM>.

It should be noted that there may be one or more first electrode contact regions <NUM> on the first electrode contact layer <NUM>. <FIG> and <FIG> only illustrate the case where two first electrode contact regions <NUM> are formed on the first electrode contact layer <NUM>.

The first electrode contact region <NUM> is located on the absorption layer <NUM>. In other words, the first electrode contact region <NUM> is located in the part covering the absorption layer <NUM>, of the first electrode contact layer <NUM>.

In an embodiment, the avalanche photodetector further includes an optical waveguide <NUM> arranged at a side of the absorption layer <NUM> in the direction parallel to the plane of the substrate. The optical waveguide <NUM> is configured to transmit the optical signal and couple the optical signal to the absorption layer <NUM>.

Specifically, the material of the optical waveguide <NUM> may be silicon nitride. That is, the optical waveguide <NUM> may be a silicon nitride optical waveguide. In other embodiments, the material of the optical waveguide <NUM> may also be silicon.

In an embodiment, the upper surface of the optical waveguide <NUM> may be flush with or higher than the upper surface of the absorption layer <NUM>. The lower surface of the optical waveguide <NUM> may be flush with or lower than the lower surface of the absorption layer <NUM>.

The distance between the optical waveguide <NUM> and the absorption layer <NUM> is in a range from <NUM> to <NUM>.

The optical waveguide <NUM> includes an optical input port <NUM> and a first waveguide region <NUM>. The first waveguide region <NUM> is a straight waveguide region.

The optical signal transmitted by the optical waveguide <NUM> is transmitted along the direction from the optical input port <NUM> to the first waveguide region <NUM>.

The optical waveguide <NUM> has a size in a range of <NUM> to <NUM> in the first direction, a size in a range of <NUM> to <NUM> in the second direction, and a size in a range of <NUM> to <NUM> in the third direction.

A filling layer <NUM> is arranged between the optical waveguide <NUM> and the absorption layer <NUM>, and also arranged between the optical waveguide <NUM> and the top silicon layer <NUM>. As shown in <FIG>, the filling layer <NUM> covers the top silicon layer <NUM> and the absorption layer <NUM>. The optical waveguide <NUM> is arranged within the filling layer <NUM> and separated from each of the top silicon layer <NUM> and the absorption layer <NUM> by a certain distance. The filling layer <NUM> is configured to support and fix the optical waveguide <NUM>, and has a lower refractive index, so that the transmitted optical signal can be optically constrained.

The difference in the refractive index between the optical waveguide <NUM> and the absorption layer <NUM> is large, and the optical waveguide <NUM> is provided on the side surface of the absorption layer <NUM>, thereby improving the coupling efficiency of the optical signal from the optical waveguide <NUM> to the absorption layer <NUM>. It can be understood that the higher the coupling efficiency, the more photons are coupled into the absorption layer <NUM>. By this way, the coupling region with a shorter length can achieve a high response speed. It should be noted that the length of the coupling region is equal to the length of the absorption layer <NUM> in the third direction. In this way, the gain-bandwidth product of the detector can increase by reducing the size of the region of the absorption layer <NUM>.

The sidewall of the absorption layer <NUM> has a projection having a second shape on the silicon flat layer <NUM>. In the embodiment shown in <FIG>, the second shape may be a rectangle having a long side extending in the third direction and a short side extending in the first direction. Herein, the length of the second shape in the third direction is the length of the long side of the rectangle, and the length of the first shape in the first direction is the length of the short side of the rectangle. Combined with <FIG>, it should be understood that, the length of the coupling region is the length of the second shape in the third direction. For example, the absorption layer <NUM> has a length of <NUM> to <NUM> in the third direction. That is, the length of the coupling region is <NUM> to <NUM>. The length of the coupling region can be controlled by controlling the length of the absorption layer <NUM> in the third direction.

In an embodiment, the optical waveguide <NUM> is designed as a lateral waveguide, which enables light to slowly couple into the absorption layer <NUM> and strongly interact with the absorption layer <NUM>. At the same time, due to the decoupling of the absorption layer <NUM> and the avalanche layer <NUM> and the design of adding the intrinsic transition layer <NUM>, the avalanche photoelectric detection with low dark current, high gain, large bandwidth and high quantum efficiency can be realized.

In an embodiment, a first electrode contact region <NUM> is formed on the first electrode contact layer <NUM>, and a second electrode contact region <NUM> is formed on the top silicon layer <NUM>. A first metal electrode <NUM> and a second metal electrode <NUM> are respectively provided on the first electrode contact region <NUM> and the second electrode contact region <NUM>.

Any one of the first metal electrode <NUM> and the second metal electrode <NUM> is <NUM> or more away from the optical waveguide <NUM>.

In an embodiment, an applied voltage is applied between the second metal electrode <NUM> on the top silicon layer <NUM> and the first metal electrode <NUM> on the first electrode contact layer <NUM> to form an applied electric field, to extract carriers generated in the absorption layer <NUM>. The electric field direction of the applied electric field is the same as that of the built-in electric field formed in the absorption layer <NUM>, so that the moving speed of the carriers can be accelerated through this applied electric field, thereby improving the responsivity of the avalanche detector.

In an embodiment, the avalanche photodetector is based on the designed structure with vertical electrode, so that the electric field distribution in the absorption layer is uniform, while decoupling light transmission, light absorption, and light multiplication, thereby facilitating the transport of photo-generated carriers and being beneficial to improving the gain-bandwidth product.

A method according to the invention for preparing an avalanche photodetector is provided with specific reference to <FIG>. As shown in <FIG>, the method includes the following operations.

In S502, a first epitaxial layer is grown on the substrate, in which the first epitaxial layer is a layer of a first semiconductor material. Ion doping of a first doping type is performed on the first epitaxial layer to form a charge layer.

In S503, a second epitaxial layer is grown on the charge layer to form an intrinsic transition layer. A material of the second epitaxial layer is a composite material of the first semiconductor material and a second semiconductor material.

In S504, a third epitaxial layer is grown on a first region of the transition layer to form an intrinsic absorption layer. The third epitaxial layer is a layer of the second semiconductor material.

In S505, a fourth epitaxial layer is grown on a second region of the transition layer, and has a height higher than a height of the third epitaxial layer to form a first electrode contact layer covering the absorption layer. The fourth epitaxial layer is a layer of the first semiconductor material.

The method for preparing the avalanche photodetector of the disclosure will be further described in detail below with reference to the specific embodiments.

<FIG> are side sectional views of structures of an avalanche photodetector provided by an embodiment of the disclosure during the process of preparing.

First, with reference to <FIG>, S501 is performed, in which a substrate is provided. The substrate may be an elemental semiconductor material substrate (e.g. silicon (Si) substrate, germanium (Ge) substrate, etc.), a composite semiconductor material substrate (e.g. germanium-silicon (SiGe) substrate, etc.), or a silicon on insulator (SOI) substrate, a germanium on insulator (GeOI) substrate, or the like.

This embodiment is explained by taking an SOI substrate as the substrate. The SOI substrate includes a bottom substrate <NUM>, a buried oxygen layer <NUM>, and a top silicon layer <NUM>. The bottom substrate <NUM> is a bottom silicon material, the buried oxygen layer <NUM> is located on the bottom substrate <NUM>, the buried oxygen layer <NUM> is, for example, a silicon dioxide layer, and the top silicon layer <NUM> is located on the buried oxygen layer <NUM>.

In an embodiment, by means of lithographic or ion implantation doping processes or the like, a first doped region <NUM> and a second doped region <NUM> disposed adjacent to each other are formed on the top silicon layer <NUM>. The first doped region <NUM> and the second doped region <NUM> have the same doping type and both are a second doping type. The doping concentration of the second doped region <NUM> is greater than the doping concentration of the first doped region <NUM>. The first doped region <NUM> is, for example, an N+ doped region and the second doped region <NUM> is, for example, an N++ doped region. The doping concentration of the first doped region <NUM> is in a range of <NUM>×<NUM><NUM>/cm<NUM> to <NUM>×<NUM><NUM>/cm<NUM>, and the doping concentration of the second doped region <NUM> is in a range of <NUM>×<NUM><NUM>/cm<NUM> to <NUM>×<NUM><NUM>/cm<NUM>.

It should be noted that there may be one or more second doped regions <NUM> on the top silicon layer <NUM>, and <FIG> only illustrates the case where two second doped regions <NUM> are formed on the top silicon layer <NUM>, in which the two second electrode contact regions <NUM> are respectively located on both sides of the first doped region <NUM>.

Subsequently, with reference to <FIG>, S502 is performed, in which a selective epitaxial grown process is performed, so as to grow the first epitaxial layer on the top silicon layer <NUM> to form the avalanche layer <NUM>. The first epitaxial layer is a layer of the first semiconductor material. Next, a selective doping process is performed to perform the ion doping of a first doping type on the first epitaxial layer to form the charge layer <NUM>.

The avalanche layer <NUM> has a size in a range of <NUM> to <NUM>,<NUM> in the first direction, a size in a range of <NUM> to <NUM>,<NUM> in the second direction; and a size in a range of <NUM> to <NUM> in the third direction.

The charge layer <NUM> has a size in a range of <NUM> to <NUM>,<NUM> in the first direction, a size in a range of <NUM> to <NUM>,<NUM> in the second direction; and a size in a range of <NUM> to <NUM> in the third direction.

Subsequently, with reference to <FIG>, S503 is performed, in which a selective epitaxial grown process is performed, so as to grow the second epitaxial layer on the charge layer <NUM> to form the intrinsic transition layer <NUM>. the material of the second epitaxial layer is the composite material of the first semiconductor material and the second semiconductor material.

The transition layer <NUM> has a size in a range of <NUM> to <NUM>,<NUM> in the first direction, a size in a range of <NUM> to <NUM> in the second direction; and a size in a range of <NUM> to <NUM> in the third direction.

Next, with reference to <FIG>, S504 is performed, in which a selective epitaxial grown process is performed again, so as to grow a third epitaxial layer on a first region <NUM> of the transition layer <NUM> to form the intrinsic absorption layer <NUM>. The material of the third epitaxial layer is the second semiconductor material.

The absorption layer <NUM> has a size in a range of <NUM> to <NUM>,<NUM> in the first direction. The size of the absorption layer <NUM> in the first direction is smaller than the size of the transition layer <NUM> in the first direction, and the size difference therebetween is for example, in a range of <NUM> to <NUM>,<NUM>.

The size of the absorption layer <NUM> in the third direction may be smaller than the size of the transition layer <NUM> in the third direction, and the size difference therebetween is for example greater than <NUM>. The second region <NUM> surrounds the first region <NUM>. The second region <NUM> is a region on the transition layer <NUM> other than the first region <NUM>. Specifically, as shown in <FIG>, the first region <NUM> is, for example, a region within the smaller dashed line box in the figure and the second region <NUM> is for example a region between the smaller dashed line box and the larger dashed line box in the figure.

In some other embodiments, the size of the absorption layer <NUM> in the third direction may be equal to the size of the transition layer <NUM> in the third direction. In this way, the absorption layer <NUM> may have a size in a range of <NUM> to <NUM> in the third direction. Specifically, as shown in <FIG>, the second region <NUM>' of the transition layer <NUM> is located on either side of the first region <NUM>', so that the part, in contact with the transition layer <NUM>, of the first electrode contact layer <NUM> is separated by the absorption layer <NUM> in the third direction. That is, the second region <NUM>' includes two sub-regions separated by the first region <NUM>'. The second region <NUM>' may likewise be a region on the transition layer <NUM> other than the first region <NUM>'.

Subsequently, with reference to <FIG>, S505 is performed, in which a selective epitaxial grown process is performed, so as to grow the fourth epitaxial layer on a second region <NUM> of the transition layer <NUM>. The height of the fourth epitaxial layer is higher than a height of the third epitaxial layer to form the first electrode contact layer <NUM> covering the absorption layer <NUM>. The fourth epitaxial layer is a layer of the first semiconductor material.

Here, the first semiconductor material is silicon, the second semiconductor material is germanium, the composite material of the first semiconductor material and the second semiconductor material is silicon-germanium; and the first doping type is P type.

With reference to <FIG>, after S405 is completed, the method further includes an operation of performing ion doping of a first doping type on the fourth epitaxial layer by using lithography and ion implantation doping processes or the like to form the first electrode contact region <NUM> on the first electrode contact layer <NUM>. That is, the first electrode contact region <NUM> is a P+ doped silicon region, and the doping concentration of the first electrode contact region <NUM> is in a range from <NUM>×<NUM><NUM>/cm<NUM> to <NUM>×<NUM><NUM>/cm<NUM>.

It should be noted that there may be one or more first electrode contact regions <NUM> on the first electrode contact layer <NUM>. In this embodiment, there are two first electrode contact regions <NUM>.

The first electrode contact region <NUM> is located on the absorption layer <NUM>. In other words, the first electrode contact region <NUM> is located in the part, covering the absorption layer <NUM>, of the first electrode contact layer <NUM>.

It should be understood that after each of the above-described selective epitaxial growth processes is performed, a planarization step may be performed, which is not described in detail herein.

In an embodiment, the top silicon layer <NUM> may also be referred to as a silicon flat layer. The avalanche layer <NUM> and the charge layer <NUM> may also be referred to as strip silicon waveguide layers. As such, the avalanche photodetector may include a silicon material region, and the silicon material region may include the silicon flat layer and the strip silicon waveguide layers.

Next, reference is made to <FIG> and <FIG>. First, with reference to <FIG>, the method further includes an operation of forming an optical waveguide <NUM> located on a side of the absorption layer <NUM> in a direction parallel to the plane of the substrate.

In an embodiment, a filling layer <NUM> is formed on the substrate, specifically on the top silicon layer <NUM>, before forming the optical waveguide <NUM>.

The material of the filling layer <NUM> may include silicon dioxide.

In an actual process, the filling layer <NUM> may be formed by depositing a certain thickness of silicon dioxide material and performing a planarization process.

Next, a region where the optical waveguide needs to be formed may be defined on the filling layer <NUM> by a patterned mask layer (not shown in the figure). The optical waveguide material is grown in the region, specifically for example, silicon nitride material is deposited or silicon material is grown, to form the optical waveguide <NUM>.

The material of the optical waveguide <NUM> may be specifically silicon nitride, i.e. the optical waveguide <NUM> may be a silicon nitride optical waveguide. In other embodiments, the material of the optical waveguide <NUM> may also be silicon.

The optical waveguide <NUM> is configured to transmit an optical signal and couple the optical signal to the absorption layer <NUM>.

The optical signal transmitted by the optical waveguide <NUM> is propagated along the direction from the optical input port <NUM> to the first waveguide region <NUM>.

The optical waveguide <NUM> has a size in a range of <NUM> to <NUM>,<NUM> in the first direction, a size in a range of <NUM> to <NUM> in the second direction, and a size in a range of <NUM> to <NUM> in the third direction.

Next, with reference to <FIG>, the method further includes an operation of forming a first metal electrode <NUM> and a second metal electrode <NUM> disposed perpendicular to the direction of the substrate plane (i.e., the second direction) on the first electrode contact region <NUM> of the first electrode contact layer <NUM> and the second electrode contact region <NUM> of the top silicon layer <NUM>, respectively.

Specifically, the two metal electrodes can be prepared by opening window through photolithography and inductive plasma etching, depositing a metal material by magnetron sputtering and other processes.

The upper surfaces of the first metal electrode <NUM> and the second metal electrode <NUM> should be higher than the upper surface of the optical waveguide <NUM>. Specifically, the method further includes the following operations. A filling layer <NUM> is formed on the optical waveguide <NUM>. Windows exposing the first electrode contact region <NUM> and the second electrode contact region <NUM> are formed in the filling layer <NUM> by processes, such as photolithography and etching (such as inductive plasma etching). An electrode material is filled in the windows (e.g. depositing a metal material by magnetron sputtering) to form the first metal electrode <NUM> and the second metal electrode <NUM>.

As such, the preparation of the avalanche photodetector is basically completed. Some interconnection processes may be involved in the follow-up processes, which will not be discussed here.

It should be noted that the avalanche photodetector provided in the embodiments of the disclosure and the method for preparing an avalanche photodetector provided in the embodiments of the disclosure belong to the same concept. Any technical feature(s) of the technical solution described in each embodiment can be arbitrarily combined with each other if there is no conflict, which is not repeated herein.

Claim 1:
An avalanche photodetector, comprising a substrate and a device structure layer on the substrate; wherein the device structure layer at least comprises a charge layer (<NUM>), a transition layer (<NUM>), an absorption layer (<NUM>) and a first electrode contact layer (<NUM>) which are arranged in sequence upward in a direction perpendicular to a plane of the substrate; wherein,
the charge layer (<NUM>) is a layer of a first semiconductor material having a first doping type;
the transition layer (<NUM>) is epitaxially grown on the charge layer (<NUM>), and is an intrinsic layer;
the absorption layer (<NUM>) is epitaxially grown on a first region (<NUM>) of the transition layer (<NUM>), and is an intrinsic layer of a second semiconductor material;
the first electrode contact layer (<NUM>) is epitaxially grown on a second region (<NUM>) of the transition layer (<NUM>), and has a height higher than a height of the absorption layer (<NUM>) so that the first electrode contact layer (<NUM>) covers the absorption layer (<NUM>); and the first electrode contact layer (<NUM>) is a layer of the first semiconductor material; and
a material of the transition layer (<NUM>) is a composite material of the first semiconductor material and the second semiconductor material.