Patent Description:
Progress of silicon devices is slowing and ultimately limited by silicon material properties. After more than <NUM> years of silicon processing development, ability to use current semiconductor fabrication is a path to quick adoption and improved performance to cost ratio when making semiconductor devices, such as a laterally-diffused metal oxide semiconductor (LDMOS) field-effect transistor (FET).

The described examples include a hybrid semiconductor device and a formation method for forming the hybrid semiconductor device. The illustrative hybrid semiconductor device includes a source contact, a field effect transistor having a first semiconductor material with a band-gap, a voltage-support structure including a second semiconductor material with a band-gap that is larger than the band-gap of the first semiconductor material, an electrode between the field effect transistor and the voltage-support structure and coupling the field effect transistor to the voltage-support structure, a drain contact coupled to the voltage-support structure, and one or more field control elements. The hybrid semiconductor device combines a reliable field effect transistor such as silicon field effect transistor with wide band-gap (WBG) semiconductor. The WBG semiconductor in the hybrid semiconductor device provides a voltage support region to take a portion or a large portion of the applied voltage on the hybrid semiconductor device, such that the voltage applied to other portions of the hybrid semiconductor device, such as the silicon field effect transistor/portion may be reduced. Accordingly, the critical voltage of the hybrid semiconductor device may be increased.

<FIG> illustrates a block diagram of an example hybrid semiconductor device according to described examples. The hybrid semiconductor device <NUM> includes a source contact <NUM>, a switch element <NUM> being a field effect transistor and having a first semiconductor material with a band-gap (i.e., energy band-gap), a voltage-support structure <NUM> including a wide band-gap (WBG) semiconductor material with a band-gap that is larger than the band-gap of the first semiconductor material of the switch element <NUM>, a electrode <NUM> between the switch element <NUM> and the voltage-support structure <NUM> and coupling the switch element <NUM> to the voltage-support structure <NUM>, a drain contact <NUM> coupled to the voltage-support structure <NUM>, and a field control element <NUM>. The electrode <NUM> has a first end <NUM> and a second end <NUM>; the first end <NUM> of the electrode <NUM> is coupled to and in ohmic contact with the switch element <NUM>; and the second end <NUM> of the electrode <NUM> is coupled to and in ohmic contact with the voltage support structure <NUM>. An electrode electrically couples a first component to a second component, without being in contact with additional voltage or current terminals other than the components being coupled. In some examples, the first semiconductor material of the switch element <NUM> includes at least one of silicon, germanium, or gallium arsenide.

In some examples, the first end <NUM> of the electrode <NUM> is in ohmic contact with a second region <NUM> of the field effect transistor <NUM>; the second end <NUM> of the electrode <NUM> is in ohmic contact with the voltage-support structure <NUM>; and a first region <NUM> of the field effect transistor <NUM> is in ohmic contact with the source contact <NUM>. In some examples, the field-control element <NUM> extends from the field effect transistor <NUM> towards the drain contact <NUM>.

The structures/components <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, and <NUM> may be arranged in various directions with respect to one another, e.g., in-plane direction, out-of-plane direction, and/or any other suitable direction, according to application scenarios. In one example, the voltage-support structure <NUM> is on the electrode <NUM> and the field effect transistor <NUM> along an out-of-plane direction. In another example, the voltage-support structure <NUM> is adjacent to the electrode <NUM> and the switch element <NUM> along an in-plane direction.

A doped semiconductor may be a p-type semiconductor which is doped with electron-acceptor dopants or an n-type semiconductor which is doped with electron-donor dopants. Any of the following doping levels may be chosen for components of the hybrid semiconductor device according to various application scenarios. A doping level of a p-type semiconductor may be a P-doping level that is less than <NUM>×<NUM><NUM> cm-<NUM>, a P doping level in a range of <NUM>×<NUM><NUM> cm-<NUM> to <NUM>×<NUM><NUM> cm-<NUM>, or a P+ doping level that is higher than <NUM>×<NUM><NUM> cm-<NUM>. A doping level of an n-type semiconductor may be an N- doping level that is less than <NUM>×<NUM><NUM> cm-<NUM>, an N doping level in a range of <NUM>×<NUM><NUM> cm-<NUM> to <NUM>×<NUM><NUM> cm-<NUM>, or an N+ doping level that is higher than <NUM>×<NUM><NUM> cm-<NUM>. A doping-polarity may refer to a p-type doping or an n-type doping.

<FIG> illustrates a flow chart of an example method for forming a hybrid semiconductor device, which is described below with reference to <FIG>.

At S701, a switch element that includes a first semiconductor material having a band-gap is formed. In some examples, the switch element (e.g., <NUM>) is formed by, e.g., vapor deposition, ion implantation, and/or etching. According to the claimed invention the switch element is a field effect transistor (FET). In some examples useful for understanding the present invention, the switch element <NUM> includes at least one of a diode, a bipolar transistor, or an insulated-gate bipolar transistor (IGBT); and a material of the switch element <NUM> includes silicon having a band-gap. In some examples, the field-effect transistor is a p-type field-effect transistor or an n-type field-effect transistor that includes a gate. In some examples, the switch element includes a laterally-diffused metal oxide semiconductor (LDMOS) field-effect transistor. In some examples not falling under the scope of the claims but useful for understanding the present invention, the switch element includes an insulated-gate bipolar transistor (IGBT), such as a lateral insulated-gate bipolar transistor (LIGBT).

At S702, an electrode having first and second ends is formed. In some examples, the floating electrode <NUM> having first and second ends (<NUM>, <NUM>) is formed by, e.g., deposition; the first end <NUM> of the electrode <NUM> is coupled to and in ohmic contact with the switch element <NUM>; and the second end <NUM> of the electrode <NUM> is coupled to and in ohmic contact with the voltage support structure <NUM>.

At S703, a voltage-support structure including a second semiconductor material having a band-gap that is larger than the band-gap of the first semiconductor material is formed. In some examples, the voltage-support structure <NUM> is formed by deposition and/or ion implantation, where the voltage-support structure <NUM> includes a WBG semiconductor material having a band-gap that is larger than the band-gap of the first semiconductor material, such as silicon, of the switch element <NUM>.

At S704, a drain contact coupled to the voltage-support structure is formed. In some examples, the drain contact <NUM> is formed by deposition, and the drain contact <NUM> is coupled to and in ohmic contact with the voltage-support structure <NUM>.

At S705, a source contact coupled to the switch element is formed. In some examples, the source contact <NUM> is formed by deposition, and the source contact <NUM> is coupled to and in ohmic contact with the switch element <NUM>.

At S706, a field control element is formed. In some examples, the field control element <NUM> include a field plate, and the field plate is formed by deposition. In other examples, the field control element <NUM> includes a component of the switch element <NUM> that is formed during the formation of the switch element <NUM>.

In this description, steps or processes may be performed in any suitable order. In some examples, forming the switch element that includes the first semiconductor material (S701) may be performed before forming the voltage-support structure including the second semiconductor material (S703). In other examples, forming the switch element that includes the first semiconductor material (S701) may be performed after forming the voltage-support structure including the second semiconductor material (S703). For example, after the voltage-support structure including the second semiconductor material is formed, the switch element that includes the first semiconductor material is formed, e.g., via a process for forming an LDMOS FET.

<FIG> illustrate cross-sectional views of structures of various stages of the formation of an example hybrid semiconductor device <NUM>, and <FIG> illustrates a corresponding flow chart of an example method for forming the hybrid semiconductor device <NUM>. <FIG> will now be described along with references to the flow chart of <FIG>.

<FIG> illustrates a semiconductor layer <NUM> including a source region <NUM>, a drift region <NUM>, a body region <NUM> including a channel region <NUM>, and a body-contact region <NUM>; and <FIG> illustrates this step as forming a source region, a drift region, a body region, and a body-contact region in a semiconductor layer in step S801 of <FIG>.

The semiconductor layer <NUM> has a first surface <NUM> and an opposing second surface <NUM>. The semiconductor layer <NUM> may be a substrate or an epitaxial layer grown on a substrate. <FIG> also illustrates a coordinate system having X, Y, and Z axes. The X-axis and the Y-axis are orthogonal to each other and are parallel to a plane of the semiconductor layer <NUM>, e.g., the first surface <NUM>, or the second surface <NUM>. The X and Y-axes are thus referred to as "in-plane direction. " The Z-axis is perpendicular to the X and Y-axes and thus perpendicular to the plane of semiconductor layer <NUM>. As such, the Z-axis is referred to as an "out-of-plane direction. " Along an in-plane direction (X-axis), the channel region <NUM> of the body region <NUM> is between the source region <NUM> and the drift region <NUM>, serves a conducting channel between the source region <NUM> and the drift region <NUM>.

In some examples, the semiconductor layer <NUM> is formed by epitaxial growth and/or ion implantation to form, e.g., a p-type layer at a P doping level; and the semiconductor layer <NUM> includes the body region <NUM> at a P doping level. The source region <NUM>, the drift region <NUM>, and the body-contact region <NUM> may be formed by ion implantation of dopants into the semiconductor layer <NUM>. In the examples of <FIG>, the source region <NUM> is an n-type semiconductor region with an N+ doping level; the drift region <NUM> is an n-type semiconductor region with an N doping level; the body region <NUM> is a p-type semiconductor region with a P doping level; and the body-contact region <NUM> is a p-type semiconductor region with a P+ doping level. Other suitable doping-polarities and doping level may be chosen for the structures (e.g., <NUM>, <NUM>, <NUM>, <NUM>, <NUM>) according to various application scenarios. In the examples of <FIG>, the body-contact region <NUM> is a recessed body-contact region. In other examples, the body-contact region is a planar body-contact region.

<FIG> illustrates a dielectric layer <NUM> on second surface <NUM> of the semiconductor layer <NUM>; and <FIG> illustrates this step as adding a dielectric layer on the semiconductor layer in step S802 of <FIG>. A material of the dielectric layer <NUM> may include nitride material such as silicon nitride, aluminum nitride, and/or oxide materials such as silicon oxide, aluminum oxide. The dielectric layer may be added on the semiconductor layer by vapor deposition or bonding.

<FIG> illustrates a gate (e.g., a gate terminal) <NUM> on the second surface <NUM> of the semiconductor layer <NUM>; and <FIG> illustrates this step as forming a gate on the semiconductor layer in step S803 of <FIG>. In the examples of <FIG>, the gate <NUM> corresponds to the channel region <NUM> of the body region <NUM>, and is configured to turn on and turn off the channel region <NUM>; and a dielectric portion <NUM> of the dielectric layer <NUM> is between the gate <NUM> and the second surface <NUM> of the semiconductor layer <NUM>, and, accordingly, separates the gate <NUM> from the second surface <NUM> of the semiconductor layer <NUM>.

The gate <NUM> may be formed by etching a trench (not shown in <FIG>) in the dielectric layer <NUM> and depositing gate material into the trench. In one example, the gate material of the gate <NUM> may include polysilicon and/or metal. In some examples, a dielectric material such as nitride or oxide is further deposited in the trench and on the gate <NUM>.

<FIG> illustrates a trench <NUM> in the dielectric layer <NUM>; and <FIG> illustrates this step as forming a trench in the dielectric layer in step S804 of <FIG>. The trench <NUM> may be formed by etching away a portion of the dielectric layer <NUM>.

<FIG> illustrates an electrode <NUM> in the trench <NUM> and on the second surface <NUM> of the semiconductor layer <NUM>; and <FIG> illustrates this step as forming an electrode in the trench and on the semiconductor layer in step S805 of <FIG>. The electrode <NUM> may be formed by vapor deposition, such as chemical vapor deposition (CVD).

The electrode <NUM> has a first end <NUM> and a second end <NUM>; and the first end <NUM> is coupled to and in contact with the drift region <NUM>. An electrode is used to electrically couple a first component to a second component to allow for ohmic contact to the first and second components without barrier voltage, where the first and second components include dissimilar band gap materials. Doping levels of portions of the first and second components and in contact with the electrode may be increased as compared to other portions of the first and second components. A material of an electrode may include at least one of metal or silicide. An electrode is used between two components, such as two components having materials with different band-gaps or different energy band structures, for uninterrupted no barrier current flow between the two components.

<FIG> illustrates a voltage support structure <NUM> in the trench <NUM> and on the electrode <NUM>; and <FIG> illustrates this step as forming a voltage support structure on the electrode in step S806 of <FIG>. The voltage support structure <NUM> includes a WBG semiconductor that has a larger band-gap than the semiconductor of the semiconductor layer <NUM>. In some examples, the WBG semiconductor of the voltage support structure <NUM> includes silicon carbide, gallium nitride, and/or any other suitable WBG semiconductor. The voltage support structure <NUM> may be formed by vapor deposition, such as chemical vapor deposition (CVD), and/or ion implantation.

<FIG> illustrates a drain contact <NUM> in the trench <NUM> and on the voltage support structure <NUM>; and <FIG> illustrates this step as forming a drain contact in the trench and on the voltage support structure in step S807 of <FIG>. In some examples, the drain contact <NUM> includes a silicide portion in contact with the voltage support structure <NUM>, and an aluminum portion on the silicide portion. The drain contact <NUM> may be formed using vapor deposition.

<FIG> illustrates trenches <NUM> in the dielectric layer <NUM>; and <FIG> illustrates this step as forming trenches in the dielectric layer in step S808 of <FIG>. The trenches <NUM> may be formed by etching the dielectric layer <NUM> with a mask.

<FIG> illustrates a source contact <NUM> and a field plate <NUM> in the trenches <NUM>; and <FIG> illustrates this step as forming a source contact and a field plate in the trenches in step S809 of <FIG>. The source contact and the field plate may be formed by vapor deposition. In the examples of <FIG>, the source contact <NUM> is in contact with the source region <NUM> and the body-contact region <NUM>. In some examples, the source contact <NUM> includes a silicide portion and an aluminum portion on the silicide portion; and the field plate includes a silicide portion and an aluminum portion on the silicide portion.

In the examples of <FIG>, the field plate <NUM> and the source contact <NUM> are structurally integrated as a single piece. In other examples, the field plate and the source contact are structurally separate pieces; and the field plate is electrically coupled to the source contact or another voltage contact.

<FIG> illustrates an example hybrid semiconductor device <NUM> according to described examples. The hybrid semiconductor device <NUM> includes the semiconductor layer <NUM> that has the source region <NUM>, the drift region <NUM>, the body region <NUM> including the channel region <NUM>, and the body-contact region <NUM>. A material of the semiconductor layer <NUM> may include at least one of silicon, germanium, or gallium arsenide. The semiconductor layer <NUM> has the first surface <NUM> and the opposing second surface <NUM>. Along an in-plane direction (X-axis), the channel region <NUM> of the body region <NUM> is between the source region <NUM> and the drift region <NUM>. The hybrid semiconductor device <NUM> further includes the dielectric layer <NUM> and a gate <NUM> on the second surface <NUM> of the semiconductor layer <NUM>. The dielectric portion <NUM> of the dielectric layer <NUM> is between the gate <NUM> and the second surface <NUM> of the semiconductor layer <NUM>, and, accordingly, separates the gate <NUM> from the second surface <NUM> of the semiconductor layer <NUM>. The gate <NUM> extends along an in-plane direction (X-axis) and is configured to turn on and turn off the channel regions <NUM> between the source region <NUM> and the drift region <NUM> along the in-plane direction (X-axis); and accordingly the gate <NUM> is a lateral gate that extends along the in-plane direction (X-axis).

The hybrid semiconductor device <NUM> further includes the electrode <NUM> on the drift region <NUM>, the voltage support structure <NUM> on the electrode <NUM>, the drain contact <NUM> on the voltage support structure <NUM>, the source contact <NUM>, and the field plate <NUM> that is an implementation of a field-control element, such as the field-control element <NUM> in <FIG>. The voltage support structure <NUM> includes a first region <NUM> that is in ohmic contact with the second end <NUM> of the electrode <NUM>, and a second region <NUM> that is in ohmic contact with the drain contact <NUM>. In the examples of <FIG>, the body region <NUM> is electrically coupled to the source contact <NUM> via the body-contact region <NUM>, and extends from the regions of or near the source contact <NUM> towards the drain contact <NUM>, e.g., along approximately the in-plane direction (X-axis); and the body region <NUM> serves as an implementation of a field-control element, such as the field-control element <NUM> in <FIG>.

In the examples of <FIG>, the electrode <NUM> has a first end <NUM> and a second end <NUM>; and the first end <NUM> is on and in ohmic contact with the drift region <NUM>; and the voltage support structure <NUM> is on the electrode <NUM> and is in ohmic contact with the second end <NUM> of the electrode <NUM>. The drain contact <NUM> is on the voltage support structure <NUM>. By arranging the voltage support structure <NUM> and the electrode <NUM> on the drift region <NUM> of the semiconductor layer <NUM> along an out-of-plane direction (Z axis), e.g., vertical direction, the device size along the in-plane direction (e.g. along X axis) may be reduced. The source contact <NUM> is in ohmic contact with the source region <NUM> and the body-contact region <NUM>; and the field plate <NUM> extends from the source contact <NUM> towards the drain contact <NUM> and the voltage support structure <NUM>.

The voltage support structure <NUM> includes a WBG semiconductor that has a larger band-gap than the semiconductor of the semiconductor layer <NUM>. In some examples, the WBG semiconductor of voltage support structure <NUM> includes silicon carbide, gallium nitride, and/or any other suitable WBG semiconductor. In some examples, the WBG semiconductor of the voltage support structure <NUM> includes nano-materials having a WBG, such as silicon-carbide nano-tube materials or any other suitable WBG nano-materials.

In the examples of <FIG>, The hybrid semiconductor device <NUM> includes a switch element <NUM>; and the switch element <NUM> includes the source region <NUM>, the drift region <NUM>, the body region <NUM> or a portion of the body region <NUM> that includes the channel region <NUM>, a body-contact region <NUM>, the gate <NUM>, and the dielectric portion <NUM> of the dielectric layer <NUM>. The hybrid semiconductor device <NUM> further includes the source contact <NUM>, the electrode <NUM>, the voltage-support structure <NUM>, the drain contact <NUM>, and field control elements including the field plate <NUM> and the body region <NUM> extending from the regions of or near the source contact <NUM> towards the drain contact <NUM>, e.g., along approximately the in-plane direction (X-axis). The voltage-support structure <NUM> is on the switch element <NUM> and extends, e.g., vertically, in a direction orthogonal to a surface of the switch element <NUM> (e.g., the second surface <NUM> of the semiconductor layer <NUM>).

In some examples, the first end <NUM> of the electrode <NUM> is in ohmic contact with the drift region <NUM> of the switch element <NUM>; the second end <NUM> of the electrode <NUM> is in ohmic contact with voltage-support structure <NUM>; and the body-contact region <NUM> of the switch element <NUM> is in ohmic contact with the source contact <NUM>. In some examples, regions (e.g., <NUM>, <NUM>) of the voltage-support structure <NUM> in contact with the electrode <NUM> and the drain contact <NUM> are doped with an increased doping level as compared to other regions of the voltage-support structure <NUM>, and form ohmic contacts with the electrode <NUM> and the drain contact <NUM>; region <NUM> of the drift region <NUM> that is in contact with the electrode <NUM> is doped with an increased doping level as compared to other regions of the drift region <NUM>, and forms ohmic contact with the electrode <NUM>.

<FIG> illustrates an example cross-sectional view of the hybrid semiconductor device <NUM> of <FIG> across A1-A2 according to described examples. In the examples of <FIG>, the source contact <NUM>, the source region <NUM>, the body region <NUM> that includes channel region <NUM>, and the drift region <NUM> extends along the in-plane direction (Y-axis) in a stripe configuration. <FIG> illustrates another example cross-sectional view of the hybrid semiconductor device <NUM> of <FIG> across B1-B2 according to described examples. In the examples of <FIG>, the source contact <NUM>, the dielectric layer <NUM>, the field plate <NUM>, and the voltage support structure <NUM> extends along the in-plane direction (Y-axis) in a stripe configuration.

In the examples of <FIG> and <FIG>, certain components (such as <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>) of the hybrid semiconductor device <NUM> extend along an in-plane direction (Y-axis) in a stripe configuration. In other examples, certain components (such as <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>) of the hybrid semiconductor device <NUM> extend in-plane (e.g., parallel to X-Y plane) in a circular or annular shape. For example, certain components (such as <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>) of the hybrid semiconductor device <NUM> extend around axis O1-O2 in <FIG> in, e.g., a circular or annular configuration.

<FIG> illustrates a cross-sectional view of another example hybrid semiconductor device <NUM> according to described examples. The hybrid semiconductor device <NUM> includes a semiconductor layer <NUM> that has a source region <NUM>, a drift region <NUM>, a body region <NUM> including one or more channel region <NUM>, and a body-contact region <NUM>. The semiconductor layer <NUM> has the first surface <NUM> and the opposing second surface <NUM>. Along an out-of-plane direction (Z-axis), the channel regions <NUM> of the body region <NUM> extend between the source region <NUM> and the drift region <NUM>. The hybrid semiconductor device <NUM> further includes a gate <NUM> and dielectric layers <NUM> that separate the gate <NUM> from the body region <NUM> of the semiconductor layer <NUM>. The gate <NUM> extends along the out-of-plane direction (Z-axis) and is configured to turn on and turn off the channel regions <NUM> between the source region <NUM> and the drift region <NUM> along the out-of-plane direction (Z-axis); and accordingly the gate <NUM> is a vertical gate that extends along the out-of-plane direction.

The hybrid semiconductor device <NUM> further includes a dielectric layer <NUM> on the second surface <NUM> of the semiconductor layer <NUM>, an electrode <NUM> on the drift region <NUM>, a voltage support structure <NUM> on the electrode <NUM>, a drain contact <NUM> on the voltage support structure <NUM>, a source contact <NUM>, and a field plate <NUM>.

In the examples of <FIG>, the electrode <NUM> has a first end <NUM> and a second end <NUM>; and the first end <NUM> is on and in ohmic contact with the drift region <NUM>; and the voltage support structure <NUM> is on the electrode <NUM> and is in ohmic contact with the second end <NUM> of the electrode <NUM>. The drain contact <NUM> is on the voltage support structure <NUM>. The source contact <NUM> is in ohmic contact with the source region <NUM> and the body-contact region <NUM>; and the field plate <NUM> extends from the source contact <NUM> towards the drain contact <NUM> and the voltage support structure <NUM>.

The voltage support structure <NUM> includes a WBG semiconductor that has a larger band-gap than the semiconductor of the semiconductor layer <NUM>. In some examples, the WBG semiconductor of voltage support structure <NUM> includes silicon carbide, gallium nitride, and/or any other suitable WBG semiconductor. In some examples, the WBG semiconductor of voltage support structure <NUM> includes nano-materials having a WBG, such as SiC nano-tube materials, or any other suitable nano-materials.

<FIG> illustrate cross-sectional views of structures of various stages of the formation of another example hybrid semiconductor device <NUM>, and <FIG> illustrates a corresponding flow chart of an example method for forming the hybrid semiconductor device <NUM>. <FIG> will now be described along with references to the flow chart of <FIG>.

<FIG> illustrates a semiconductor layer <NUM> including a source region <NUM>, a drift region <NUM>, a body region <NUM> including a channel region <NUM>, and a body-contact region <NUM>; and <FIG> illustrates this step as forming a source region, a drift region, a body region, and a body-contact region in a semiconductor layer in step S901 of <FIG>.

The semiconductor layer <NUM> has a first surface <NUM> and an opposing second surface <NUM>. A material of the semiconductor layer <NUM> may include at least one of silicon, germanium, or gallium arsenide. <FIG> also illustrates a coordinate system having X, Y, and Z axes. The X-axis and the Y-axis are orthogonal to each other and are parallel to a plane of the semiconductor layer <NUM>, e.g., the first surface <NUM>, or the second surface <NUM>. The X and Y-axes are thus referred to as "in-plane direction. " The Z-axis is perpendicular to the X and Y-axes and thus perpendicular to the plane of semiconductor layer <NUM>. As such, the Z-axis is referred to as an "out-of-plane direction. " Along the in-plane direction (X-axis), the channel region <NUM> of the body region <NUM> is between the source region <NUM> and the drift region <NUM>.

In some examples, the semiconductor layer <NUM> is formed by epitaxial growth and/or ion implantation to form, e.g., a p-type layer at a P doping level; and the semiconductor layer <NUM> includes the body region <NUM>. The source region <NUM>, the drift region <NUM>, and the body-contact region <NUM> may be formed by ion implantation of dopants into the semiconductor layer <NUM>. In the examples of <FIG>, the source region <NUM> is an n-type semiconductor region with an N+ doping level; the drift region <NUM> is an n-type semiconductor region with an N doping level; the body region <NUM> is a p-type semiconductor region with a P doping level; and the body-contact region <NUM> is a p-type semiconductor region with a P+ doping level. Other suitable doping-polarities and doping level may be chosen for the structures (e.g., <NUM>, <NUM>, <NUM>, <NUM>) of hybrid semiconductor device <NUM> according to various application scenarios. In the examples of <FIG>, the body-contact region <NUM> is a recessed body-contact region. In other examples, the body-contact region is a planar body-contact region.

<FIG> illustrates a voltage support structure <NUM> and a dielectric layer <NUM> in the semiconductor layer <NUM>; and <FIG> illustrates this step as forming a dielectric layer and a voltage support structure in the semiconductor layer in step S902 of <FIG>. The dielectric layer <NUM> and the voltage support structure <NUM> may be formed by etching away a portion of the semiconductor layer <NUM> to form a trench, forming the dielectric layer <NUM> by vapor deposition or oxidation at inner walls of the trench, and depositing materials of the voltage support structure <NUM> into the trench and on the dielectric layer <NUM>. In the examples of <FIG>, the voltage support structure <NUM> is adjacent to the drift region <NUM> along the in-plane direction (X axis), e.g., laterally. The dielectric layer <NUM> is between the voltage support structure <NUM> and the body region <NUM>, and separates the voltage support structure <NUM> from the body region <NUM>.

The voltage support structure <NUM> includes a WBG semiconductor that has a larger band-gap than the semiconductor of the body region <NUM> of the semiconductor layer <NUM>. In some examples, the WBG semiconductor of voltage support structure <NUM> includes silicon carbide, gallium nitride, and/or any other suitable WBG semiconductor.

<FIG> illustrates a floating electrode <NUM> between the drift region <NUM> and the voltage support structure <NUM>; and <FIG> illustrates this step as forming an electrode between the drift region and the voltage support structure in step S903 of <FIG>. The electrode <NUM> may be formed by etching away portions of the drift region <NUM>, the dielectric layer <NUM>, and the voltage support structure <NUM> to form a trench, and depositing materials of the electrode <NUM> in the trench via vapor deposition, such as chemical vapor deposition (CVD). A material of an electrode may include at least one of metal or silicide.

The electrode <NUM> has a first end <NUM> and a second end <NUM>; the first end <NUM> is coupled to and in ohmic contact with the drift region <NUM>; and the second end <NUM> is coupled to and in ohmic contact with the voltage support structure <NUM>. In the examples of <FIG>, the voltage support structure <NUM>, the drift region <NUM>, and the electrode <NUM> are arranged with respect to one another along the in-plane direction (X axis), e.g., laterally.

<FIG> illustrates a dielectric layer <NUM> on the second surface <NUM> of the semiconductor layer <NUM>; and <FIG> illustrates this step as adding a dielectric layer on the semiconductor layer in step S904 of <FIG>. A material of the dielectric layer <NUM> may include nitride material such as silicon nitride, aluminum nitride, and/or oxide materials such as silicon oxide, aluminum oxide. The dielectric layer <NUM> may be added on the semiconductor layer <NUM> by vapor deposition or bonding.

<FIG> illustrates a gate (e.g., a gate terminal) <NUM> on the second surface <NUM> of the semiconductor layer <NUM>; and <FIG> illustrates this step as forming a gate on the semiconductor layer <NUM> in step S905 of <FIG>. In the examples of <FIG>, the gate <NUM> corresponds to the channel region <NUM> of the body region <NUM>; and a dielectric portion <NUM> of the dielectric layer <NUM> is between the gate <NUM> and the second surface <NUM> of the semiconductor layer <NUM>, and, accordingly, separates the gate <NUM> from the second surface <NUM> of the semiconductor layer <NUM>.

The gate <NUM> may be formed by etching a trench in the dielectric layer <NUM> and depositing gate materials in the trench. In one example, a material of the gate <NUM> may include polysilicon and/or metal. In some examples, a dielectric material such as nitride or oxide is further deposited in the trench and on the gate <NUM>.

<FIG> illustrates trenches <NUM> and <NUM> in the dielectric layer <NUM>; and <FIG> illustrates this step as forming trenches in the dielectric layer in step S906 of <FIG>. The trenches <NUM> and <NUM> may be formed by etching the dielectric layer <NUM> with a mask.

<FIG> illustrates a source contact <NUM>, a field plate <NUM>, and a drain contact <NUM>; and <FIG> illustrates this step as forming a source contact, a field plate, and a drain contact in the trenches in step S907 of <FIG>. In the examples of <FIG>, the source contact <NUM> is in ohmic contact with the source region <NUM> and the body-contact region <NUM>. In some examples, the source contact <NUM> includes a silicide portion and an aluminum portion on the silicide portion; and the field plate <NUM> includes a silicide portion and an aluminum portion on the silicide portion. The drain contact <NUM> is on the voltage support structure <NUM>. In some examples, the drain contact <NUM> includes a silicide portion in contact with the voltage support structure <NUM>, and an aluminum portion on the silicide portion. The source contact <NUM>, the field plate <NUM>, and the drain contact <NUM> may be formed using vapor deposition.

<FIG> illustrates an example hybrid semiconductor device <NUM> according to described examples. The hybrid semiconductor device <NUM> includes the semiconductor layer <NUM>. The semiconductor layer <NUM> includes the source region <NUM>, the drift region <NUM>, the body region <NUM> including the channel region <NUM>, and the body-contact region <NUM>. The semiconductor layer <NUM> has the first surface <NUM> and the opposing second surface <NUM>.

The hybrid semiconductor device <NUM> further includes the voltage support structure <NUM> and the dielectric layer <NUM>, the electrode <NUM> between the drift region <NUM> and the voltage support structure <NUM>, the dielectric layer <NUM> and the gate <NUM> on second surface <NUM> of the semiconductor layer <NUM>, the source contact <NUM>, the field plate <NUM>, and the drain contact <NUM> in trenches formed in the dielectric layer <NUM>.

The voltage support structure <NUM> is adjacent to the drift region <NUM> along the in-plane direction (X axis), e.g., laterally. The dielectric layer <NUM> is between the voltage support structure <NUM> and the body region <NUM>, and separates the voltage support structure <NUM> from the body region <NUM>. The voltage support structure <NUM> includes a WBG semiconductor that has a larger band-gap than the semiconductor of the source region <NUM>, the drift region <NUM>, the body region <NUM> including the channel region <NUM>, and the body-contact region <NUM>. In some examples, the WBG semiconductor of voltage support structure <NUM> includes silicon carbide, gallium nitride, and/or any other suitable WBG semiconductor.

The electrode <NUM> has a first end <NUM> and a second end <NUM>; the first end <NUM> is coupled to and in ohmic contact with the drift region <NUM>; and the second end <NUM> is coupled to and in ohmic contact with the voltage support structure <NUM>. The voltage support structure <NUM>, the drift region <NUM>, and the electrode <NUM> are arranged with respect to one another along the in-plane direction (X axis), e.g., laterally.

The gate <NUM> corresponds to the channel region <NUM> of the body region <NUM>; and the dielectric portion <NUM> of the dielectric layer <NUM> is between the gate <NUM> and the second surface <NUM> of the semiconductor layer <NUM>, and, accordingly, separates the gate <NUM> from the second surface <NUM> of the semiconductor layer <NUM>.

The source contact <NUM> is in ohmic contact with the source region <NUM> and the body-contact region <NUM>. In some examples, the source contact <NUM> includes a silicide portion and an aluminum portion on the silicide portion; and the field plate <NUM> includes a silicide portion and an aluminum portion on the silicide portion. The field plate <NUM> extends from the source contact <NUM> towards the drain contact <NUM>. The drain contact <NUM> is on the voltage support structure <NUM>. In some examples, the drain contact <NUM> includes a silicide portion in contact with the voltage support structure <NUM>, and an aluminum portion on the silicide portion.

In some examples, certain components (such as <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>) of the hybrid semiconductor device <NUM> extend along the in-plane direction (Y-axis) in a stripe configuration. In other examples, certain components (such as <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>) of the hybrid semiconductor device <NUM> extend in-plane (e.g., parallel to X-Y plane) in a circular or annular shape. For example, certain components (such as <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, <NUM>) of the hybrid semiconductor device <NUM> extend around axis O3-O4 in <FIG> in, e.g., a circular or annular configuration.

In the examples of <FIG>, the hybrid semiconductor device <NUM> includes a switch element <NUM>; and the switch element <NUM> includes the source region <NUM>, the drift region <NUM>, the body region <NUM> or a portion of the body region <NUM> that includes the channel region <NUM>, a body-contact region <NUM>, the gate <NUM>, and the dielectric portion <NUM> of the dielectric layer <NUM>. The hybrid semiconductor device <NUM> further includes the electrode <NUM>, the voltage-support structure <NUM>, the drain contact <NUM>, the source contact <NUM>, and field control elements including the field plate <NUM> and the body region <NUM> extending from the regions of or near the source contact <NUM> towards the drain contact <NUM>, e.g., along approximately the in-plane direction (X-axis). The voltage-support structure <NUM> is adjacent to the switch element <NUM> along the in-plane direction (X-axis), and extends, e.g., laterally, in a direction parallel to a surface of the switch element <NUM> (e.g., a portion of the second surface <NUM> of the semiconductor layer <NUM>). In some examples the voltage-support structure <NUM> is at least partially surrounded by the switch element <NUM>.

In some examples, the first end <NUM> of the electrode <NUM> is in ohmic contact with the drift region <NUM> of the switch element <NUM>; the second end <NUM> of the electrode <NUM> is in ohmic contact with the voltage-support structure <NUM>; and the body-contact region <NUM> of the switch element <NUM> is in ohmic contact with the source contact <NUM>. In some examples, regions (e.g., <NUM>, <NUM>) of the voltage-support structure <NUM> that are in contact with the electrode <NUM> and the drain contact <NUM> are doped with an increased doping level as compared to other regions of the voltage-support structure <NUM>, and form ohmic contacts with the electrode <NUM> and the drain contact <NUM>; and region <NUM> of the drift region <NUM> that is in contact with the electrode <NUM> is doped with an increased doping level as compared to other regions of the drift region <NUM>, and forms ohmic contact with the electrode <NUM>.

<FIG> illustrates another example hybrid semiconductor device <NUM> according to described examples. The hybrid semiconductor device <NUM> includes a semiconductor layer <NUM>. The semiconductor layer <NUM> includes a source region <NUM>, a drift region <NUM>, a body region <NUM> including a channel region <NUM>, and a body-contact region <NUM>. The semiconductor layer <NUM> has a first surface <NUM> and an opposing second surface <NUM>.

The hybrid semiconductor device <NUM> further includes a voltage support structure <NUM>, an electrode <NUM> between the drift region <NUM> and the voltage support structure <NUM>, a dielectric layer <NUM> and a gate <NUM> on the second surface <NUM> of the semiconductor layer <NUM>, a source contact <NUM>, a field plate <NUM>, and a drain contact <NUM>.

The voltage support structure <NUM> is adjacent to the drift region <NUM> along the in-plane direction (X axis), e.g., laterally. The voltage support structure <NUM> is in contact with the body region <NUM>. The voltage support structure <NUM> may be formed by ion implanting dopants into the semiconductor layer <NUM> or by etching away a portion of the semiconductor layer <NUM> to form a trench and depositing materials of the voltage support structure <NUM> into the trench. In some examples, the semiconductor layer <NUM> is a silicon layer, the voltage support structure <NUM> is formed by ion implanting carbon into the semiconductor layer <NUM> and activating the implanted region to form silicon carbide as the voltage support structure <NUM>. The voltage support structure <NUM> may include a WBG semiconductor that has a larger band-gap than the semiconductor of the semiconductor layer <NUM>. In some examples, the WBG semiconductor of the voltage support structure <NUM> includes silicon carbide, gallium nitride, and/or any other suitable WBG semiconductor.

Certain components of the hybrid semiconductor device <NUM> are the same as or similar to above-described components of hybrid semiconductor devices, and refences can be made to above descriptions of components of the hybrid semiconductor devices, such as components of the hybrid semiconductor device <NUM>.

Modifications, additions, or omissions may be made to the devices, systems, apparatuses, and methods described herein without departing from the scope of the description. Moreover, the operations of the devices, systems, and apparatuses described herein may be performed by including more, fewer, or other components; and the methods described may include more, fewer, or other steps. Also, steps may be performed in any suitable order.

The term "couple" is used throughout the specification. The term may cover connections, communications, or signal paths that enable a functional relationship consistent with the description of this description. For example, if device A generates a signal to control device B to perform an action, in a first example device A is coupled to device B, or in a second example device A is coupled to device B through intervening component C if intervening component C does not substantially alter the functional relationship between device A and device B such that device B is controlled by device A via the control signal generated by device A.

Claim 1:
A semiconductor device, comprising:
a field effect transistor having a gate terminal (<NUM>) to turn on and off a channel region (<NUM>) within a body region (<NUM>), the body region being disposed between first and second regions, the body region and the first and second regions being disposed within a layer (<NUM>) of a first semiconductor material having a band-gap, the first region (<NUM>) of the field effect transistor being coupled to a source contact;
an electrode (<NUM>) having first and second ends (<NUM>, <NUM>), the first end (<NUM>) of the electrode (<NUM>) being coupled to the second region (<NUM>) of the field effect transistor;
a voltage-support structure (<NUM>) including a second semiconductor material having a band-gap that is larger than the band-gap of the first semiconductor material, the voltage-support structure being in contact with the second end of the electrode; and
a drain contact (<NUM>) coupled to the voltage-support structure (<NUM>).