Patent Description:
When designing a hearing assistive device or a hearing aid, focus is on to increasing the dynamic input range. The dynamic input range is a prerequisite for ensuring a true reproduction of natural sounds. The presence of sounds exceeding the the dynamic range of the input stage causes the signal to be clipped, which results in distorting harmonics present in the signal to be processed.

There is a need for providing excellent sound quality to users of hearing assistive devices or hearing aids even in very loud sound environments, e.g. loud music, parties, walking in busy city streets, etc..

Prior art examples of different related circuits are shown by: <NPL>; <NPL>; <NPL>; <CIT>; <CIT>; <CIT>; <NPL>; <NPL>; <NPL>; <CIT>; and <NPL>.

Document by <NPL> discloses a delta-sigma modulator for a hearing assistive device powered by a battery, where in the reference voltage is a scaled version of the power supply voltage.

Patent application <CIT> teaches a delta-sigma modulator that can be used in audio signal applications, where in the reference voltage is a scaled version of the power supply voltage. Patent application <CIT>presents a delta-sigma modulator that can be used in digital audio equipment, where in the reference voltage is a buffered scaled version of the power supply voltage.

The purpose of the invention is to provide a hearing assistive device or a hearing aid with increased dynamic input range ensuring the reproduction of natural sounds.

This purpose is according to the invention achieved by a hearing assistive device and a method for processing audio in a hearing assistive device according to the appended independent claims.

By letting a reference voltage depend on battery supply voltage rather than being fixed, the achievable dynamic range from a hearing can be increased. The increased dynamic range provides artifact-free sound processing even in even louder sound environments, and thereby improved speech intelligibility in loud sound environments.

The invention will be described in further detail with reference to preferred aspects and the accompanying drawing, in which:.

Reference is made to <FIG>, which schematically illustrates a delta sigma converter <NUM> in which a reference voltage generation circuit according to one embodiment of the invention may implemented. The delta sigma converter <NUM> converts an analog voltage or analog signal <NUM> received on an input <NUM> into a digital representation <NUM> delivered on an output <NUM>. The digital representation <NUM> is known as Pulse Density modulation or Pulse Frequency modulation. In general, frequency may vary smoothly in infinitesimal steps, as may voltage, and both may serve as an analog of an infinitesimally varying physical variable such as a speech signal or an acoustic signal. The substitution of frequency for voltage is thus entirely natural and carries in its train the transmission advantages of a pulse stream.

Most A/D converters, including the delta sigma converter <NUM>, requires as input a reference voltage. The input voltage to the A/D converter is measured relative to this reference voltage. Hence, it is important that the reference voltage has sufficiently low noise.

The delta sigma converter <NUM> converts the mean of the analog voltage into the mean of the analog pulse frequency and counts the pulses in a known interval so that the pulse count divided by the interval gives an accurate digital representation of the mean analog voltage during the interval. This interval can be chosen to give any desired resolution or accuracy.

<FIG> illustrates schematically a hearing assistive device according to an embodiment of the invention. The hearing assistive device includes an example of an A/D converter. This converter is a <NUM>-bit time-continuous delta sigma converter of first order, but the principles according to the invention applies to all converter types. The hearing assistive device may be a hearing aid.

The hearing assistive device has at least one input transducer or microphone <NUM> picking up an audio signal and transforming it into an electric representation, e.g. the analog signal <NUM>.

The delta sigma converter <NUM> receives the analog signal <NUM> at the input <NUM>. In one embodiment of the invention, the delta sigma converter <NUM> comprises an input transformer <NUM> receiving the analog signal <NUM> and outputting a transformed voltage to a summation point <NUM>. The input transformer <NUM> includes a switchable capacitor configuration which may be operated as described later with reference to <FIG>.

A feedback voltage from a feedback loop is subtracted from the transformed voltage in the summation point <NUM>, and the resulting signal is supplied to an integrator <NUM> performing a time integration of the signal voltage from the summation point <NUM>. The integrator <NUM> will have a low pass filtering effect. The integral signal provided as the output from the integrator <NUM> will increase or decrease depending on whether the signal voltage from the summation point <NUM> is positive or negative.

The integral signal from the integrator <NUM> is presented to the input of a comparator <NUM> for generating a logical "<NUM>"-level whenever the integral signal exceeds a reference voltage Vref presented to the comparator <NUM>, and a logical "<NUM>"-level whenever the integral signal from the integrator <NUM> is below the reference voltage Vref. By using a battery supply dependent reference voltage, the dynamic range and clipping level in the A/D converter, the delta sigma converter <NUM>, may become increased. With a suitable microphone <NUM> the hearing aid will be able to handle a larger dynamic range.

The reference voltage Vref is adapted to be lower than the power supply voltage provided by the battery voltage Vbattery and to follow the decay of the battery voltage Vbattery with a predefined margin. This predefined margin may in one embodiment be lower than <NUM>% of the battery voltage Vbattery. This predefined margin may in a further embodiment be lower than <NUM>% of the battery voltage Vbattery.

The binary output from the comparator <NUM> feeds the data input of a D flip-flop <NUM>. The D flip-flop <NUM> captures the value of the D-input at a definite portion of the clock cycle, such as the rising edge of a clock signal. That captured value of the D-input becomes the Q output until the next definite portion of the clock cycle occurs and a new value of the D-input is captured and becomes the next Q output.

The clock frequency of the clock signal from a clock signal generator <NUM> defines the bit rate of the output signal <NUM> from the delta sigma converter <NUM>. In the illustrated embodiment the clock frequency is stable in the range of <NUM> - <NUM>. A charging and discharging period of the input transformer <NUM> may correspond to e.g. <NUM> clock cycles from the clock signal generator <NUM>.

The bit stream from the flip-flop <NUM> is provided at the output <NUM> of the delta sigma converter <NUM> as a digital audio signal to a digital signal processor <NUM>. The digital signal processor <NUM> is preferably a specialized microprocessor with its architecture optimized for the operational needs of digital signal processing, and in the illustrated embodiment the processor <NUM> is adapted for amplifying and conditioning of the audio signal intended to become presented for the hearing aid user. The amplification and conditioning is carried out according to a predetermined setting in order to alleviate a hearing loss by amplifying sound at frequencies in those parts of the audible frequency range where the user suffers a hearing deficit.

The processor <NUM> outputs according to one embodiment of the invention a digital signal fed to a digital output stage <NUM> and an output transducer or a speaker <NUM>. The speaker <NUM> may be driven as a class D amplifier by the one-bit digital data stream received.

The output <NUM> of the delta sigma converter <NUM> is branched to provide a part of the data stream to a feedback loop. In the feedback loop, the part of the data stream is forwarded to a <NUM>-bit D/A converter <NUM> converting the logical ones and zeroes in the part of the data stream into a positive or negative voltage with respect to the transformed voltage for subtraction from the transformed voltage in the summation point <NUM>.

The gain in the A/D converter or the delta sigma converter <NUM> is inversely proportional to the reference voltage, Vref. This is opposite to the output stage <NUM>, which has a gain proportional to the reference voltage, Vref. The entire hearing aid or hearing assistive device is neutral in relation to the reference voltage, Vref, and we thereby obtain an additional advantage using a reference voltage, Vref, following the decay of the power supply voltage Vbattery with a predefined margin.

The reference voltage generation circuit <NUM> is shown in <FIG>. The reference voltage generation circuit <NUM> is adapted to provide a reference voltage Vref from a power supply Vbattery, which may be hearing aid battery cell, e.g. of type <NUM> (discharge curve indicated in <FIG>. The reference voltage generation circuit <NUM> comprises an electronic voltage amplifier or op-amp being coupled to the power supply Vbattery via a passive circuit. The electronic voltage amplifier (op-amp) outputs the reference voltage Vref. The reference voltage generation circuit <NUM> is adapted to control the reference voltage Vref to be lower than the power supply Vbattery and to follow the decay of the power supply Vbattery with a predefined margin ΔV.

The passive circuit of the reference voltage generation circuit <NUM> includes two resistors R<NUM> and R<NUM> providing a first voltage divider. The first voltage divider in the illustrated embodiment is a simple configuration with two resistors connected in series, with the input voltage Vbattery applied across the resistor pair and the output voltage emerging or being tapped from the connection between them. The output voltage from the first voltage divider is connected to a first input terminal of the electronic voltage amplifier via a low pass filter provided by a diode Di and a capacitor C<NUM>. The low pass filter removes noise originating from the power supply, and prevents rapid changes of the voltage that would generate audible artifacts.

Two resistors R<NUM> and R<NUM> provide a simple configuration for the second voltage divider with the two resistors connected in series. The reference voltage Vref is applied across the resistor pair and the output voltage emerging from the connection between them. The output voltage from the second voltage divider is connected to a second input terminal of the electronic voltage amplifier. As the electronic voltage amplifier ensures that the voltage on its two input terminals are identical, the reference voltage Vref may be expressed as follows: <MAT>.

The reference voltage Vref must be less than the battery supply Vbattery so the gain must be configured so that <MAT>.

<FIG> shows how the input transformer <NUM> is operated in two phases; a charging phase and a discharging phase. In the charging phase, the analog signal <NUM> (see <FIG>) is charging two capacitors, Ca and Cb, arranged in parallel, while the same two capacitors, Ca and Cb, are switched into series in the discharging phase and being connected to OUT or the summation point <NUM>. The benefit by switching the capacitor coupling between parallel and series coupling is that the voltage supplied to the summation point <NUM> when switching to discharge phase is doubled and subsequently the discharging is twice as fast. This is beneficial as the relative noise voltage level is reduced without the need for increasing the supply current to the amplifier in the delta sigma converter <NUM>.

Five switching transistor S<NUM> - S<NUM> are controlled by a sampling clock signal (not shown) where the signal edge of the clock signal goes positive in the charging phase, the switching transistors S<NUM>, S<NUM>, and S<NUM> close, and S<NUM> and S<NUM> open. When the signal edge of the sampling clock signal goes negative in the discharging phase, the switching transistors S<NUM>, S<NUM>, and S<NUM> of the input transformer <NUM> open, and the switching transistors S<NUM> and S<NUM> close.

The filled and unfilled squares at the gate of the switching transistor S<NUM> - S<NUM> indicate the operation of the switch. A filled square denotes a closed transistor switch in the charging phase and an open transistor switch in the discharging phase. An unfilled square denotes an open transistor switch in the charging phase and a closed transistor switch in the discharging phase.

The noise generated from the A/D converter or the delta sigma converter will be substantially independent of the reference voltage. The reason for this is that the inherent thermal noises from amplifiers etc. are the dominant noise sources independent of the reference voltage. In general, the A/D converter or the delta sigma converter will have benefits of having as high reference voltage as possible in order to increase the achievable dynamic range. Hereby the range for the input voltage for the converter increases, but the noise remains constant. For a hearing aid or a hearing assistive device this means that with a suitable microphone the hearing aid will be able to handle a larger dynamic range.

The reference voltage according to the invention may be used as supply not only for the A/D converter or the delta sigma converter. Similar to the A/D converter or the delta sigma converter, some microphone types applicable for use in the hearing aid or a hearing assistive device may benefit from an increased reference voltage for improving the dynamic range.

In order to generate a quiet and noise free reference voltage with adequate rejection of noise from the voltage supply (battery), the circuit that generates the reference voltage requires some voltage headroom. <FIG> illustrates (voltage versus time) how the voltage <NUM> from a hearing aid battery (type <NUM>) varies during its lifetime. It typically starts out at a voltage up to <NUM> Volts, but the voltage can decrease to less than <NUM> volts before the battery is no longer able to power the hearing aid or the hearing assistive device. Therefore, the reference value has traditionally been decided to be fixed at a level just below the voltage at which the battery is no longer able to power the hearing aid or a hearing assistive device allowing at least 50mV of voltage headroom for noise removal.

According to the invention, the reference voltage generation circuit is adapted to provide a reference voltage Vref which is lower than a power supply voltage Vbattery and following the decay of the power supply voltage Vbattery with a predefined margin. The reference voltage Vref is supplied to the A/D converters and microphones. This may increase the achievable dynamic range during most of the battery's lifetime.

Claim 1:
A hearing assistive device including an audio processing circuit comprising:
- a delta sigma analog-to-digital converter having
∘ an analog input being an audio signal;
∘ an integrator connected to integrate a voltage present in a summation point that is coupled with the input signal;
∘ a comparator connected to compare a voltage output from the integrator with a reference voltage (Vref) and outputting a logic level in accordance with the comparison;
∘ a flip-flop connected to latch the comparator output;
∘ a feedback loop coupling a feedback signal back to the summation point; and the feedback loop comprises a DA-Converter using the latched comparator output to generate the a feedback signal; and
- a power supply voltage (Vbattery) provided by a battery showing a decay during discharging;
- wherein a reference voltage generation circuit is adapted to provide the reference voltage (Vref) at a voltage level lower than that of the power supply voltage (Vbattery) and to follow the decay of the power supply voltage (Vbattery ) with a predefined margin;
wherein the reference voltage generation circuit comprises:
- a low-pass filter circuit comprising a diode (D1) and a capacitor (C1) arranged to remove noise originating from the power supply, the capacitor connected between the diode's cathode and ground;
- a first voltage divider (R1, R2), connected between the power supply voltage (Vbattery) and ground, wherein the output from the first voltage divider (R1, R2) is connected to the diode's anode;
- an electronic voltage amplifier (op-amp) to output the reference voltage (Vref) and with a first input connected to the diode's cathode; and
- a second voltage divider (R3, R4) connected between the reference voltage (Vref) and ground, wherein the output from the second voltage divider (R3, R4) is connected to a second input terminal of the electronic voltage amplifier (op-amp).