Patent Description:
Continued growth in computing and mobile devices will continue to increase the demand for increased bandwidth density between dies within semiconductor packages. <CIT> describes a microelectronic package that includes a radio frequency (RF) chip coupled with a die by interconnects. <CIT> describes a high-frequency circuit package and sensor module. <CIT> describes a packaged device for high frequency wireless interconnects. According to an example, a system is provided that may comprise a first die including plurality of first mixers, each of the first mixers with a first input, a second input, and output, wherein the first input of each of the first mixers receives, respectively, an intermediary frequency (IAF) signal, and the second input of each of the first mixers receives, respectively, a local oscillator (LO) signal, and wherein the output of each of the first mixers outputs a high-speed (HS) signal based on, respectively, the received IF signal and the received LO signal. The system may further comprise a plurality of transmission lines corresponding to each of the plurality of first mixers, each of the plurality of transmission lines with a first end and a second end opposite the first end, the first end of each of the transmission lines directly electrically coupled, respectively, with the output of each of the first mixers. Moreover, the system may comprise a second die including plurality of second mixers, each of the second mixers with a first input, a second input, and an output, wherein the first input of each of the second mixers is directly electrically coupled, respectively, with the second end of each of the transmission lines, and wherein the second input of the plurality of second mixers are coupled, respectively, with a LO signal, and wherein the output of the plurality of second mixers includes an IF signal based, respectively, on the received HS signal and the received LO signal for each of the plurality of second mixers. In the example, there may be no discrete amplification components between the first mixer and the transmission line. According to an example, the system may further comprise a first XPU that includes a plurality of data ports, the plurality of data ports of the first XPU electrically coupled, respectively, with the plurality of first inputs of the first mixers. The system may further comprise a second XPU that includes a plurality of data ports, the plurality of data ports of the second XPU electrically coupled, respectively, with the plurality of outputs of the second mixers. There may be no discrete amplification components between at least one of the second mixers and its corresponding transmission line. Further, the plurality of transmission lines may be conductive traces. The plurality of transmission lines are strip lines within a redistribution layer (RDL).

Embodiments described herein may be related to apparatuses, processes, and techniques related to a transceiver architecture to reduce the die area and/or footprint and power consumption of on-package based mm-wave/THz interconnects. Embodiments include amplifier-less transceivers in combination with on-package low loss transmission lines, which may include copper traces or strip lines. In embodiments, signals on the interconnect may be transmitted between up conversion mixers and down conversion mixers without any additional amplification required.

Embodiments may reduce power consumption yielding better channel efficiency, and reduce circuit sizes that yield increased bandwidth efficiency. In addition, embodiments may be easier to integrate on CMOS than legacy implementations, resulting in a lower overall manufacturing cost. Also, high-speed links enabled by embodiments herein may reduce the number of bumps required per die, enabling assembly of the large pitches without being bump limited. This may result in better reliability and yield. In addition, die disaggregation may also be facilitated by embodiments described herein.

Die disaggregation provides the ability to combine technologies from different nodes and processes to improve overall system performance. For example, a die complex that combines digital circuitries based on <NUM> technology and analog circuits based on <NUM> may be formed at the package level rather than using an SoC die, where the area-consuming analog circuits are implemented on a more expensive process. In a die complex, the packaging is the main medium used to connect the analog and digital die and enable communication between them.

XPUs may use die disaggregation and restitching to achieve yield and performance targets. With the increase demand in data rates, high bandwidth density is required between various high-speed dies on the platform. The high bandwidth density can be achieved by using multiple data lanes that operate at very low speeds, for example <<NUM> gigabits per second (Gbps) per lane, or by using fewer high-speed lanes. Challenges with the speed lanes are typically associated with the overall power consumption. For example, serialization/deserialization circuits and associated drivers may be needed for baseband signaling. For mm-wave and THz signaling, RF transceivers are required as part of the high-speed signal link. On those circuitries contribute to the overall power consumption of the links.

Legacy implementations of high-speed connectivity between co-packaged dies are achieved by using either passive or active connections. Legacy passive interconnects include embedded multi-die interconnect bridges (EMIB) or omni-directional interconnects (ODI). Active connections can be made using optical, electrical SerDes or millimeter wave technologies. Passive solutions such as EMIB and ODI are limited in reach due to insertion loss and crosstalk. Active solutions such as optical interconnects may not be efficient for short range connectivity, due to direct current (DC) power overhead needed to convert between electrical and optical signals. Mm-wave legacy solutions are copied from wireless communication, where past losses are usually high, therefore leading to an unnecessary increase in power consumption due to amplifiers inserted at the end of the transmitter and at the beginning of the receiver.

In the following detailed description, reference is made to the accompanying drawings which form a part hereof, wherein like numerals designate like parts throughout, and in which is shown by way of illustration embodiments in which the subject matter of the present disclosure may be practiced. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present disclosure. Therefore, the following detailed description is not to be taken in a limiting sense, and the scope of embodiments is defined by the appended claims.

The description may use perspective-based descriptions such as top/bottom, in/out, over/under, and the like. Such descriptions are merely used to facilitate the discussion and are not intended to restrict the application of embodiments described herein to any particular orientation.

The term "coupled with," along with its derivatives, may be used herein. "Coupled" may mean one or more of the following. "Coupled" may mean that two or more elements are in direct physical or electrical contact. However, "coupled" may also mean that two or more elements indirectly contact each other, but yet still cooperate or interact with each other, and may mean that one or more other elements are coupled or connected between the elements that are said to be coupled with each other. The term "directly coupled" may mean that two or more elements are in direct contact.

Various operations may be described as multiple discrete operations in turn, in a manner that is most helpful in understanding the claimed subject matter. However, the order of description should not be construed as to imply that these operations are necessarily order dependent.

As used herein, the term "module" may refer to, be part of, or include an ASIC, an electronic circuit, a processor (shared, dedicated, or group) and/or memory (shared, dedicated, or group) that execute one or more software or firmware programs, a combinational logic circuit, and/or other suitable components that provide the described functionality.

Various Figures herein may depict one or more layers of one or more package assemblies. The layers depicted herein are depicted as examples of relative positions of the layers of the different package assemblies. The layers are depicted for the purposes of explanation, and are not drawn to scale. Therefore, comparative sizes of layers should not be assumed from the Figures, and sizes, thicknesses, or dimensions may be assumed for some embodiments only where specifically indicated or discussed.

<FIG> illustrates a schematic block diagram of a legacy full interconnect for longrange signal transmission over a transmission line or a waveguide. Legacy channel <NUM> includes a first mixer <NUM> that receives a first input <NUM>, that may include an intermediary frequency (IF) signal coming from a baseband circuits. The first mixer <NUM> also receives a second input <NUM>, which may be a local oscillator (LO) signal. The first mixer <NUM> then generates a high-speed (HS) signal transmitted on output <NUM> that is based on a mixing of the IF signal and LO signals. The HS signal on the output <NUM> then goes through a power amplifier <NUM> before entering a transmission channel (e.g. transmission line <NUM>). In implementations, the transmission line <NUM> may be a copper routing layer, a strip line, a microstrip, a co-planar waveguide, a grounded coplanar waveguide, or other conductive material. In implementations, the transmission line <NUM> may have one first level interconnect <NUM> at one end of the transmission line <NUM> and another first level interconnect <NUM> at the other end of the transmission line <NUM>. In implementations, the transmission line <NUM> may be an on-package waveguide channel. The signal may then go through another amplifier <NUM>, which may be a low noise amplifier, before the HS signal enters a first input <NUM> of the second mixer <NUM>. A LO signal is received on a second input <NUM> of the second mixer <NUM>. An IF signal <NUM> is then output by the second mixer <NUM>, based upon a combination of the HS signal and the LO signal. In embodiments, the first mixing may be referred to as up conversion from an IF signal to an HS signal, and the second mixing may be referred to as a down conversion from the HS signal to the IF signal.

<FIG> illustrates a schematic block diagram of a mm-wave/THz interconnect architecture with omitted amplifiers, in accordance with various embodiments. Channel <NUM> includes a first mixer <NUM>, which may be similar to first mixer <NUM> of <FIG>, that receives a first input <NUM>, that may include an intermediary frequency (IF) signal coming from a baseband device. The first mixer <NUM> also receives a second input <NUM>, which may be a LO signal. The first mixer <NUM> then generates a HS signal on an output <NUM> that is based on a combination of the IF signal and LO signals. The HS signal output <NUM> then enters a transmission line <NUM>. In implementations, the transmission line <NUM> may be a copper routing layer, a strip line, or other conductive material. In implementations, the transmission line <NUM> may have one first level interconnect <NUM> at one end of the transmission line <NUM> and another first level interconnect <NUM> at the other end of the transmission line <NUM>. In embodiments, the transmission line <NUM> may be an on-package waveguide channel as discussed further below with respect to <FIG>. The HS signal may then enter a first input <NUM> of the second mixer <NUM>. A LO signal is received on a second input <NUM> of the second mixer <NUM>. An IF signal <NUM> is then output by the second mixer <NUM>, based upon a combination of the HS signal and the LO signal. Note that the embodiment of <FIG> does not involve any power amplifiers. In embodiments, the transmission line <NUM> carries a radio frequency (RF) signal.

<FIG> illustrates a millimeterwave (mm-wave)/terahertz (THz) on package interconnect for short range package connectivity, in accordance with various embodiments. Package <NUM> may be used to implement channel <NUM> of <FIG>. Package <NUM> may include a transmission line <NUM> that is electrically coupled with transmitter (Tx) die <NUM> that includes radio frequency (RF) circuitry and a receiver (Rx) die <NUM> that includes RF circuitry. The transmission line <NUM> may be similar to transmission line <NUM> of <FIG>. The Tx die <NUM> may be coupled with the transmission line <NUM> through a first level interconnect <NUM>, which may be similar to first level interconnect <NUM> of <FIG>. In embodiments, the Tx die <NUM> may include a mixer similar to mixer <NUM> of <FIG> that receives an IF and LO signal, similar to IF signal <NUM> and LO signal <NUM> of <FIG>, to produce a HS signal to be transmitted on transmission line <NUM>.

The Rx die <NUM> may be coupled with the transmission line <NUM> through a first level interconnect <NUM>, which may be similar to first level interconnect <NUM> of <FIG>. In embodiments, the Rx die <NUM> may include a mixer similar to mixer <NUM> of <FIG>, that receives a HS signal from the transmission line <NUM> and LO signal similar to HS signal <NUM> and LO signal <NUM> of <FIG>, to produce an IF signal. In embodiments, the transmission line <NUM> may be a metal-based waveguide channel. In embodiments, the first level interconnects <NUM>, <NUM> may be flip-chip bumps or bond wires. Note that in legacy implementations, the Tx die <NUM> and the Rx die <NUM> may include amplifiers similar to legacy amplifiers <NUM>, <NUM> of <FIG>.

Package <NUM> may have a typical link budget that includes expected channel losses and required power levels at the Tx die <NUM> and the Rx die <NUM> for the link to be functional. As shown, the power out for the Tx die <NUM> may be -14dBm, and the power in for the Rx die <NUM> may be -25dBm. The overall dB loss from the Tx die <NUM> to the Rx die <NUM> may be <NUM> dB from the first level interconnect <NUM>, 5dB from the transmission line <NUM>, and another 3dB from the first level interconnect <NUM>. In this example, the total loss is <NUM> dB. This loss is significantly lower than the losses that would occur if the transmission line <NUM> was a free space channel, for example an over the air transmission, or a long reach channel. As a result, one or both of the legacy amplifiers <NUM>, <NUM> of <FIG> may be omitted without negatively impacting signal transmission.

<FIG> illustrates a schematic block diagram of multiple medium reach interconnects sharing a local oscillator (LO), in accordance with various embodiments. Schematic block diagram <NUM>, which may be similar to schematic block diagram of <FIG>, shows three medium reach interconnect channels 400a, 400b, and 400c. In embodiments, the losses between the first mixers 402a, 402b, 402c, and the second mixers 422a, 422b, 422c respectively may require only amplifiers 418a, 418b, 418c. These may be low noise amplifiers (LNA), added respectively after the transmission lines 414a, 414b, 414c, and before the second mixers 422a, 422b, 422c. In embodiments, this position for the amplifiers 418a, 418b, 418c may be preferred because a LNA may be combined with filters (not shown) for noise and harmonics filtering.

It should also be noted that a single LO signal <NUM>, which may be similar to LO signal <NUM> of <FIG>, may be provided as an input to each of the first mixers 402a, 402b, 402c and/or each of the second mixers 422a, 422b, 422c. Sharing the LO signals <NUM> between multiple channels 400a, 400b, 400c will reduce overall power consumption and real estate associated with LO signal generation.

Note that in other embodiments (not shown), instead of amplifiers 418a, 418b, 418c located between transmission lines 414a, 414b, 414c and second mixers 422a, 422b, 422c respectively, amplifiers instead may be located between the first mixers 402a, 402b, 402c and the transmission lines 414a, 414b, 414c, with no amplifiers between the transmission lines 414a, 414b, 414c and second mixers 422a, 422b, 422c, respectively. In still other embodiments (not shown) one or more of the channels 400a, 400b, 400c may have different configurations of where amplifiers are placed, or whether amplifiers are included at all.

<FIG> illustrates a stacked die architecture with a transmission line embedded within a package substrate, in accordance with various embodiments. Platform <NUM> includes a substrate <NUM>, with a first die <NUM>, a second die <NUM>, and a third die <NUM> attached to a side of the substrate <NUM>. A first RF chip <NUM> is attached to the first die <NUM>, a second RF chip <NUM> is attached to the second die <NUM>, and a third RF chip <NUM> is attached to the third die <NUM>.

The first die <NUM> and the second die <NUM> may be connected by a high-speed bridge <NUM>. The second die <NUM> and the third die <NUM> may also be connected by a high-speed bridge <NUM>. The high-speed bridges <NUM>, <NUM> may include an EMIB, an ODI, a high-density on package interconnect, or a zero misalignment via (ZMV), or some other high-speed bridge. The first die <NUM>, however, may not be able to use high-speed bridges to communicate with the third die <NUM> due to the physical distance between the first die <NUM> and the third die <NUM>.

In embodiments, the first die <NUM> may communicate with the third die <NUM> using the communication path <NUM>. Data to be communicated may be identified within the first die <NUM>, which may then transmit the data within an IF signal to the first RF chip <NUM>. The first RF chip <NUM> may include one or more first mixers, such as first mixers 402a, 402b, 402c of <FIG>, to receive the IF signal from the first to die <NUM> and combine the IF signal with a LO signal (not shown) to produce an HS signal that is transmitted through the communication path <NUM> through one or more vias <NUM> within the first die <NUM>, to one or more transmission lines <NUM>, which may be similar to transmission lines 414a, 414b, 414c of <FIG>.

The communication path <NUM>, may then route from the one or more transmission lines <NUM> through one or more vias <NUM> within the third die <NUM> to the third RF chip <NUM>. The third RF chip <NUM> includes one or more second mixers, to take the HS signal from the one or more transmission lines <NUM>, combine it with a LO signal such as LO signal <NUM> of <FIG>, to produce an IF signal that is then transmitted through via <NUM> back to the third die <NUM> for processing. Note that the communication path <NUM> from the first RF chip <NUM> to the third RF chip <NUM> did not use any amplifiers either before or after the one or more transmission lines <NUM>.

<FIG> illustrates a schematic block diagram of a platform that includes multiple dies that are connected using multiple interconnects, in accordance with various embodiments. Schematic block diagram <NUM> shows a first die <NUM> and a second die <NUM> that are communicatively coupled by a package <NUM>. The first die <NUM> may include a first digital block <NUM>, which may be similar to first die <NUM> of <FIG>, and includes four first mixers 602a, 602b, 602c, 602d that may be similar to mixers 402a, 402b, 402c of <FIG>. In embodiments, the four first mixers may be included in a separate die, which may be similar to the first RF chip <NUM> of <FIG>. As shown, two separate IF data lines from the first digital block, for example a first IF data line <NUM>, and a second IF data line <NUM>, may be sent to a first first mixer 602a. An LO signal <NUM> may go through a phase shifter, for example phase shifter <NUM>, to produce a first LO signal 606a and a second LO signal 606b at a different phase than LO signal 606a. The first LO signal 606a may be combined with the first IF data line <NUM>, and the second LO signal 606b may be combined with the second IF data line <NUM> to create an HS signal 603a that includes all the data from the IF data lines <NUM>,<NUM>.

The package <NUM> has a plurality of transmission channels 614a, 614b, 614c, 614d that transmit the HS signals 603a, 603b, 603c, 603d, respectively, to four second mixers 622a, 622b, 622c, 622d on package <NUM>. The second mixers use a phase shifted LO signal <NUM>, in a process similar to LO signal <NUM> described above, to convert the respective HS signals into an IF signal on two different data lines for each of the four second mixers 622a, 622b, 622c, 622d, to a second digital block <NUM>. Thus, in embodiments, many high-speed data lanes on a package may be run to substantially increase the data rate between dies. For example, if each lane transmission can transmit <NUM> Gb per second, then <NUM> Tb per second may be aggregated over five lanes.

<FIG> illustrates a schematic block diagram of a platform that includes multiple dies that are connected using multiple interconnects that have single-sided amplification, in accordance with various embodiments. Schematic block diagram <NUM> may be similar to schematic block diagram <NUM> of <FIG>, with the exception that the four second mixers 722a, 722b, 722c, 722d, which may be similar to second mixers 622a, 622b, 622c, 622d , include an amplifier 718a, 718b, 718c, 718d, which may be similar to amplifiers 418a, 418b, 418c of <FIG>, to boost the HS signal before up conversion. In embodiments, the amplifiers 718a, 718b, 718c, 718d may be low noise amplifiers.

<FIG> illustrates a stacked die architecture with a transmission line embedded within a package substrate to communicate with remote dies on the package, in accordance with various embodiments. Platform <NUM>, which may be similar to platform <NUM> of <FIG>, includes a first die <NUM>, a second die <NUM>, and a third die <NUM>, that may be similar to first die <NUM>, second die <NUM>, third die <NUM> that are coupled to a package <NUM>, which may be similar to package <NUM> of <FIG>. An integrated heat spreader (IHS) <NUM> may be coupled to a top portion of the dies <NUM>, <NUM>, <NUM>.

The first die <NUM> may be coupled, using an RF bridge <NUM> within the package <NUM>, with a Tx Radio <NUM>, which may be similar to first RF chip <NUM>. The third die <NUM> may be electrically coupled, using an RF bridge <NUM> within the package <NUM>, with a Rx Radio <NUM>, which may be similar to third RF chip <NUM>. The bridges <NUM>, <NUM> may include EMIB, ZMV, ODI, or other bridges including high-speed bridges. The RF bridges <NUM>, <NUM> may include, respectively, one or more first mixers, which may be similar to one or more mixers 602a, 602b, 602c, 602d of <FIG>, to convert data received from the first die <NUM> into an IF signal which is then converted into an HS signal by combining a LO signal, as described with respect to <FIG>. The HS signal may then be received by the Tx Radio <NUM>, to then be transmitted through a conductive via <NUM> within the RF bridge <NUM> to a strip line <NUM>, which may be similar to transmission line <NUM> of <FIG>. The HS signal will then continue through a conductive via <NUM> through the RF bridge <NUM> to a Rx Radio <NUM>, back through the RF bridge <NUM> and to the third die <NUM>. This may be shown in conductive path <NUM>, which may be similar to conductive path <NUM> of <FIG>.

In embodiments, the strip line <NUM> may be shielded by a first ground plane <NUM> above the strip line <NUM>, and a second ground plane <NUM> below the strip line <NUM>. The HS signal will then be received by the Rx Radio <NUM>, which will pass the received HS signal to the RF bridge <NUM> and a second mixer within the RF bridge <NUM> to convert the signal to an IF signal, and then to convert the IF signal into data that is then transmitted to the third die <NUM>.

<FIG> illustrates an example of a process for creating a portion of a package that includes mixer to mixer communication over transmission line within the package without amplification, in accordance with various embodiments. This process may be performed using the techniques, methods, systems, and/or apparatus is described with respect to <FIG>.

At block <NUM>, the process may include identifying a first die with a first mixer that has a first input, a second input, and an output, wherein the first input of the first mixer receives an intermediary frequency (IF) signal and the second input of the first mixer receives a local oscillator (LO) signal, wherein the output of the first mixer outputs a high-speed (HS) signal based on the received IF signal and received LO signal. In embodiments, the LO may be similar to LO <NUM> of <FIG>, LO <NUM> of <FIG>, and LOs <NUM>, 606a, 606b of <FIG>. The first mixer may be similar to first mixer <NUM> of <FIG>, 402a, 402b, 402c of <FIG>, and 602a, 602b, 602c, 602d of <FIG>.

At block <NUM>, the process may further include identifying a second die with a second mixer that has a first input, a second input, and an output, wherein the first input of the second mixer receives a HS signal and the second input of the second mixer receives an LO signal, and wherein the output of the second mixer outputs an IF signal based upon the received HS signal and the received LO signal. In embodiments, the second mixer may be similar to second mixer <NUM> of <FIG>, 422a, 422b, 422c of <FIG>, or 622a, 622b, 622c, 622d of <FIG>.

At block <NUM>, the process may further include directly electrically coupling a first end of a transmission line with the output of the first mixer. In embodiments, the first end of the transmission line may be similar to FLI <NUM> of <FIG>, or <NUM> of <FIG>, or as shown elsewhere herein. In embodiments, the transmission line may be similar to transmission line <NUM> of <FIG>, <NUM> of <FIG>, 414a, 414b, 414c of <FIG>, <NUM> of <FIG>, 614a, 614b, 614c, 614d of <FIG>, or <NUM>, <NUM> of <FIG>, or as shown elsewhere herein.

At block <NUM>, the process may include directly electrically coupling a second end of the transmission line opposite the first end with the first input of the second mixer. In embodiments, the second end of the transmission line may be similar to FLI <NUM> of <FIG>, or <NUM> of <FIG>, as shown elsewhere herein. In embodiments, the transmission line may be similar to transmission line <NUM> of <FIG>, <NUM> of <FIG>, 414a, 414b, 414c of <FIG>, <NUM> of <FIG>, 614a, 614b, 614c, 614d of <FIG>, or <NUM>, <NUM> of <FIG>, or as shown elsewhere herein.

<FIG> schematically illustrates a computing device, in accordance with various embodiments. <FIG> is a schematic of a computer system <NUM>, in accordance with an embodiment of the present invention. The computer system <NUM> (also referred to as the electronic system <NUM>) as depicted can embody die to die high-speed communication without discrete amplifiers between a mixer and the transmission line, according to any of the several disclosed embodiments as set forth in this disclosure. The computer system <NUM> may be a mobile device such as a netbook computer. The computer system <NUM> may be a mobile device such as a wireless smart phone. The computer system <NUM> may be a desktop computer. The computer system <NUM> may be a hand-held reader. The computer system <NUM> may be a server system. The computer system <NUM> may be a supercomputer or highperformance computing system.

In an embodiment, the electronic system <NUM> is a computer system that includes a system bus <NUM> to electrically couple the various components of the electronic system <NUM>. The system bus <NUM> is a single bus or any combination of busses according to various embodiments. The electronic system <NUM> includes a voltage source <NUM> that provides power to the integrated circuit <NUM>. In some embodiments, the voltage source <NUM> supplies current to the integrated circuit <NUM> through the system bus <NUM>.

The integrated circuit <NUM> is electrically coupled to the system bus <NUM> and includes any circuit, or combination of circuits according to an embodiment. In an embodiment, the integrated circuit <NUM> includes a processor <NUM> that can be of any type. As used herein, the processor <NUM> may mean any type of circuit such as, but not limited to, a microprocessor, a microcontroller, a graphics processor, a digital signal processor, or another processor. In an embodiment, the processor <NUM> includes, or is coupled with, die to die high-speed communication without discrete amplifiers between a mixer and the transmission line, as disclosed herein. In an embodiment, SRAM embodiments are found in memory caches of the processor. Other types of circuits that can be included in the integrated circuit <NUM> are a custom circuit or an application-specific integrated circuit (ASIC), such as a communications circuit <NUM> for use in wireless devices such as cellular telephones, smart phones, pagers, portable computers, two-way radios, and similar electronic systems, or a communications circuit for servers. In an embodiment, the integrated circuit <NUM> includes on-die memory <NUM> such as static random-access memory (SRAM). In an embodiment, the integrated circuit <NUM> includes embedded on-die memory <NUM> such as embedded dynamic random-access memory (eDRAM).

In an embodiment, the integrated circuit <NUM> is complemented with a subsequent integrated circuit <NUM>. Useful embodiments include a dual processor <NUM> and a dual communications circuit <NUM> and dual on-die memory <NUM> such as SRAM. In an embodiment, the dual integrated circuit <NUM> includes embedded on-die memory <NUM> such as eDRAM.

In an embodiment, the electronic system <NUM> also includes an external memory <NUM> that in turn may include one or more memory elements suitable to the particular application, such as a main memory <NUM> in the form of RAM, one or more hard drives <NUM>, and/or one or more drives that handle removable media <NUM>, such as diskettes, compact disks (CDs), digital variable disks (DVDs), flash memory drives, and other removable media known in the art. The external memory <NUM> may also be embedded memory <NUM> such as the first die in a die stack, according to an embodiment.

In an embodiment, the electronic system <NUM> also includes a display device <NUM>, an audio output <NUM>. In an embodiment, the electronic system <NUM> includes an input device such as a controller <NUM> that may be a keyboard, mouse, trackball, game controller, microphone, voice-recognition device, or any other input device that inputs information into the electronic system <NUM>. In an embodiment, an input device <NUM> is a camera. In an embodiment, an input device <NUM> is a digital sound recorder. In an embodiment, an input device <NUM> is a camera and a digital sound recorder.

As shown herein, the integrated circuit <NUM> can be implemented in a number of different embodiments, including a package substrate having die to die high-speed communication without discrete amplifiers between a mixer and the transmission line, according to any of the several disclosed embodiments, an electronic system, a computer system, one or more methods of fabricating an integrated circuit, and one or more methods of fabricating an electronic assembly that includes a package substrate having die to die high-speed communication without discrete amplifiers between a mixer and the transmission line, according to any of the several disclosed embodiments as set forth herein in the various embodiments. The elements, materials, geometries, dimensions, and sequence of operations can all be varied to suit particular I/O coupling requirements including array contact count, array contact configuration for a microelectronic die embedded in a processor mounting substrate according to any of the several disclosed package substrates having die to die high-speed communication without discrete amplifiers between a mixer and the transmission line embodiments. A foundation substrate may be included, as represented by the dashed line of <FIG>. Passive devices may also be included, as is also depicted in <FIG>.

Various embodiments may include any suitable combination of the above-described embodiments including alternative (or) embodiments of embodiments that are described in conjunctive form (and) above (e.g., the "and" may be "and/or"). Furthermore, some embodiments may include one or more articles of manufacture (e.g., non-transitory computerreadable media) having instructions, stored thereon, that when executed result in actions of any of the above-described embodiments. Moreover, some embodiments may include apparatuses or systems having any suitable means for carrying out the various operations of the above-described embodiments.

The above description of illustrated embodiments, including what is described in the Abstract, is not intended to be exhaustive or to limit embodiments to the precise forms disclosed.

Claim 1:
An apparatus comprising:
a first die (<NUM>, <NUM>, <NUM>) having a first mixer (<NUM>, 402a-c, 602a-d) with a first input (<NUM>, <NUM>), a second input (<NUM>, <NUM>), and an output (<NUM>, <NUM>), wherein the first input (<NUM>, <NUM>) of the first mixer (<NUM>, 402a-c, 602a-d) receives an intermediary frequency, IF, signal and the second input (<NUM>, <NUM>) of the first mixer (<NUM>, 402a-c, 602a-d) receives a local oscillator, LO, signal, and wherein the output (<NUM>, <NUM>) of the first mixer (<NUM>, 402a-c, 602a-d) outputs (<NUM>, <NUM>) a high-speed, HS, signal based on the received IF signal (<NUM>, <NUM>) and received LO signal (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>, 606a, 606b);
an on-package transmission line (<NUM>, <NUM>, 414a-c, <NUM>) with a first end and a second end opposite the first end, the first end of the transmission line (<NUM>, <NUM>, 414a-c, <NUM>) directly electrically coupled with the output (<NUM>, <NUM>) of the first mixer (<NUM>, 402a-c, 602a-d);
a second die (<NUM>, <NUM>, <NUM>) having a second mixer (<NUM>, 422a-c, 622a-d, 722a-d) with a first input (<NUM>, <NUM>), a second input (<NUM>, <NUM>), and an output (<NUM>, <NUM>), wherein the first input (<NUM>, <NUM>) of the second mixer (<NUM>, 422a-c, 622a-d, 722a-d) is directly electrically coupled with the second end of the transmission line (<NUM>, <NUM>, 414a-c, <NUM>) and the second input (<NUM>, <NUM>) of the second mixer (<NUM>, 422a-c, 622a-d, 722a-d) receives the LO signal (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>, 606a, 606b), and wherein the output (<NUM>, <NUM>) of the second mixer (<NUM>, 422a-c, 622a-d, 722a-d) outputs (<NUM>, <NUM>) an IF signal (<NUM>, <NUM>) based upon the received HS signal (<NUM>, 603a-d) and the received LO signal (<NUM>, <NUM>, <NUM>, <NUM>, <NUM>, 606a, 606b; and
wherein there are no discrete amplification components between the first mixer (<NUM>, 402a-c, 602a-d) and the transmission line (<NUM>, <NUM>, 414a-c, <NUM>).