Patent Description:
Based on the uniqueness of fingerprints, fingerprint imaging recognition technology is widely applied in fingerprint acquisition, cell phone fingerprint lock and other fields. For an optical fingerprint reader, the optical sensor is a key device for realizing fingerprint acquisition, which converts a received light signal reflected by a finger surface into an electrical signal so as to realize fingerprint acquisition.

<CIT> discloses an optoelectric sensor, comprising: a light-sensitive structure which comprises a substrate and an array of pixel cells located on the substrate, wherein each of the pixel cells comprises a thin film transistor and a photodiode; a fiber optical guide plate located above the light-sensitive structure, which comprises a group of optical fiber bundles configured to be perpendicular to the substrate, and each of the optical fiber bundles has an diameter smaller than or equal to a width of pixel cell; and a backlight source located below the light-sensitive structure. The fiber plate will enable each pixel cell detecting features of an object surface corresponding thereto more independently, so as to improve the resolution of the optoelectric sensor. The optical fiber bundles are configured to be perpendicular to the substrate, and the optoelectric sensor will have a thin structure.

<CIT> discloses a photoelectric sensor and preparation method therefor, which may improve the acquisition of near infrared light sources which humans cannot see and improve photoelectric conversion efficiency. The photoelectric sensor comprises: a photoelectric diode and a reflection structure, wherein the reflection structure is arranged at the outer side or the interior of the photoelectric diode, and/or the reflection structure is arranged below the photoelectric diode so that incident light which is incident at different angles is reflected when reaching the reflection structure by traversing the photoelectric diode and is returned back into the photoelectric diode.

The accompanying drawings, which constitute part of this specification, illustrate exemplary embodiments of the present disclosure and serve to explain the principles of the present disclosure together with this specification,.

The present disclosure may be more clearly understood from the following detailed description with reference to the accompanying drawings, in which:.

Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. The description of the exemplary embodiments is merely illustrative and is in no way intended as a limitation to the present disclosure, its application or use. The present disclosure may be implemented in many different forms, which are not limited to the embodiments described herein. These embodiments are provided to make the present disclosure thorough and complete, and fully convey the scope of the present disclosure to those skilled in the art. It should be noticed that: relative arrangement of components and steps, material composition, numerical expressions, and numerical values set forth in these embodiments, unless specifically stated otherwise, should be explained as merely illustrative, and not as a limitation.

The use of the terms "first", "second" and similar words in the present disclosure do not denote any order, quantity or importance, but are merely used to distinguish between different parts. A word such as "comprise", "include" or variants thereof means that the element before the word covers the element(s) listed after the word without excluding the possibility of also covering other elements. The terms "up", "down", "left", "right", or the like are used only to represent a relative positional relationship, and the relative positional relationship may be changed correspondingly if the absolute position of the described object changes.

In the present disclosure, when it is described that a particular device is located between the first device and the second device, there may be an intermediate device between the particular device and the first device or the second device, and alternatively, there may be no intermediate device. When it is described that a particular device is connected to other devices, the particular device may be directly connected to the other devices without an intermediate device, and alternatively, may not be directly connected to said other devices but with an intermediate device.

All the terms (including technical and scientific terms) used in the present disclosure have the same meanings as understood by those skilled in the art of the present disclosure unless otherwise defined. It should also be understood that terms as defined in general dictionaries, unless explicitly defined herein, should be interpreted as having meanings that are consistent with their meanings in the context of the relevant art, and not to be interpreted in an idealized or extremely formalized sense.

Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, these techniques, methods, and apparatuses should be considered as part of this specification.

In the related art, the optical fingerprint reader needs to be improved in the resistance to intense light. In view of this, the present disclosure provides an optical sensor array substrate and an optical fingerprint reader, which are capable of effectively improving the resistance to intense light.

<FIG> is a schematic view of the structure and operation principles in an embodiment of the optical fingerprint reader according to the present disclosure. <FIG> is a schematic view of the spectrum of sunlight transmitted through a finger.

Referring to <FIG>, in some embodiments, the optical fingerprint reader includes a driving circuit board <NUM>, a backlight module <NUM> and an optical sensor array substrate <NUM>. The driving circuit board <NUM> may be arranged on one side of the backlight module <NUM> away from the optical sensor array substrate <NUM> and electrically connected to the optical sensor array substrate <NUM> for driving the optical sensor array substrate <NUM>. The driving circuit board <NUM> may also be electrically connected to the backlight module <NUM> for driving the backlight module <NUM>, for example, driving the backlight module <NUM> to emit different intensities of backlight.

In some embodiments, the driving circuit board <NUM> includes a Field Programmable Gate Array (referred to FPGA for short). In other embodiments, the driving circuit board <NUM> may include a microprocessor, for example an X86 processor or an ARM processor, or a digital signal processor (referred to DSP for short).

The optical sensor array substrate <NUM> is located on a light emitting side of the backlight module <NUM>. In <FIG>, the backlight module <NUM> is located below the optical sensor array substrate. The light L1 emitted by the backlight module <NUM> reaches the surface of a finger F through a light transmission portion of the optical sensor array substrate <NUM>, and after reflection by valleys and ridges on the surface of the finger F, the reflected light L2 returns to the optical sensor array substrate <NUM> and is sensed by a photosensitive element in the substrate <NUM>.

For the light L1 reaching the finger, part of the light reaching a valley of the finger is subjected to a substantial loss during the reflection process, so that the reflected light L2 of the valley is weak, whereas part of the light reaching a ridge of the finger is directly reflected to reach the optical sensor array substrate <NUM>, so that the reflected light L2 of the ridge is strong. The optical sensor array substrate <NUM> receives different intensities of reflected light from different parts of the finger surface, and performs photoelectric conversion so as to identify fingerprint valley/ridge information.

Considering that the optical fingerprint reader might be used in an environment of intense light (for example, the sunlight exposure environment shown in <FIG>) where ambient intense light (for example, the sunlight L3) is a great disturbance factor for the backlight, when the optical fingerprint reader is designed, there is a need to improve its resistance to ambient intense light. Since there is blood continuously circulating in the finger F, the hemoglobin in the blood and the finger muscles may absorb light other than red light in the ambient intense light, which results in that the light L4 transmitted through the finger is red light. Further, with stratum corneum of a finger surface, the light L1 of the backlight that reaches the finger does not enter an interior of the finger, and thus may not be converted into red light.

Referring to <FIG>, the sunlight L3 involves an entire wave band of the visible light, and the light L4 transmitted through the finger is mainly the visible light with a wavelength greater than <NUM> (i.e., red light and orange light). In order to overcome the disturbance of the red light transmitted through the finger on the backlight, referring to <FIG>, in some embodiments, the optical fingerprint reader further includes a filter layer <NUM> located on one side of the optical sensor array substrate <NUM> away from the backlight module <NUM>. The material of the filter layer <NUM> includes a filter material. The filter material is configured to intercept light beyond a preset wavelength range and transmit light within the preset wavelength range.

The preset wavelength range here may be set to <NUM>-<NUM>, so that part of the light reaching the filter layer <NUM> with a peak wavelength of <NUM>-<NUM> may be transmitted through the filter layer <NUM> as much as possible to reach the optical sensor array substrate <NUM>. For example, the transmittance is greater than <NUM>%. For the light after transmission through the finger with a wavelength of less than <NUM> or greater than <NUM>, it may be intercepted by the filter layer <NUM> (for example, the transmittance is less than <NUM>%) and thus cannot reach the optical sensor array substrate <NUM>. In this way, it is possible to improve the accuracy of the optical fingerprint reader.

In some embodiments, the filter layer <NUM> may be formed on the surface of the optical sensor array substrate <NUM> by a coating process (for example, a spin coating process or the like), and the filter material used may be resin or ink. In other embodiments, the filter layer <NUM> may also be arranged on another structure (for example, a transparent cover plate) independent of the optical sensor array substrate <NUM>, and the filter layer <NUM> is located on one side of the optical sensor array substrate <NUM> away from the backlight module <NUM>.

Considering that the filter material used for the filter layer <NUM> is normally soft, in order to reinforce the hardness of the optical fingerprint reader and avoid scratch of the optical fingerprint reader, referring to <FIG>, in some embodiments, the optical fingerprint reader further includes a hard coating layer <NUM>. The hard coating layer <NUM> is located on one side of the filter layer <NUM> away from the backlight module <NUM>. In some embodiments, the material of the hard coating layer <NUM> may include a periodic laminated structure formed by SiO<NUM> and Si<NUM>C<NUM> alternately. By means of the laminated structure, it is possible to realize a superhard film having high-transmittance, thereby effectively improving the hardness of the optical fingerprint reader.

In order to prevent remaining fingerprints of the user on the optical fingerprint reader during use, referring to <FIG>, in some embodiments, the optical fingerprint reader further includes an anti-fingerprint layer <NUM> located on one side of the hard coating layer <NUM> away from the backlight module <NUM>. In some embodiments, the anti-fingerprint layer <NUM> may be made from an organic fluoride material, so that it is possible to prevent fingerprints from remaining on the surface of the optical fingerprint reader and make it easier for cleaning.

<FIG> is a schematic view of the structure of the backlight module in an embodiment of the optical fingerprint reader according to the present disclosure.

Referring to <FIG>, in some embodiments, the backlight module <NUM> includes: a backplane <NUM> and a light guide plate <NUM>. The light guide plate <NUM> is located on one side of the backplane <NUM> adjacent to the optical sensor array substrate <NUM>. In <FIG>, the backlight module <NUM> may further include a reflective sheet <NUM>, a light source <NUM> and a frame bonding <NUM>. In <FIG>, the reflective sheet <NUM> is located on one side of the backplane <NUM>, and the light guide plate <NUM> is located on one side of the reflective sheet <NUM> away from the backplane <NUM>. The light source <NUM> is located on one side of the light guide plate <NUM> along a direction perpendicular to a light emitting direction of the light guide plate <NUM> so as to form an edge type backlight module. In other embodiments, the light source may also be arranged on one side in a direction opposite to a light emitting direction of the light guide plate <NUM> so as to form a direct type backlight module. The frame bonding <NUM> may be located on one side of the light guide plate <NUM> away from the backplane <NUM> so as to protect the backlight module <NUM>.

In order to meet the requirements of the overall image uniformity of the optical fingerprint reader, the backlight module <NUM> needs to increase the valley and ridge difference whilst ensuring the uniformity of the entire surface. Correspondingly, referring to <FIG>, in some embodiments, the backlight module <NUM> further includes a reverse prism <NUM> and a privacy film <NUM>. The reverse prism <NUM> which is located on one side of the light guide plate <NUM> away from the backplane <NUM>, may refract the light emitted from the light guide plate <NUM> into a direction perpendicular to the surface of the optical sensor array substrate <NUM>, thereby achieving the light collimation effect. The privacy film <NUM> achieves the light collimation effect by constraining the light. The reverse prism <NUM> and the privacy film <NUM> are combined to achieve a better light collimation effect and improve the overall image uniformity of the optical fingerprint reader.

<FIG> is a schematic view of the arrangement of a detection area and a peripheral area in the substrate in an embodiment of the optical sensor array substrate according to the present disclosure. <FIG> is a schematic view of a combined structure of an optical sensor array substrate, a readout circuit, a gate circuit and a flexible circuit board in an embodiment of the optical fingerprint reader according to the present disclosure. <FIG> is a schematic view of the connection structure of an array substrate, a readout circuit pin, a gate circuit pin and a flexible circuit board pin in an embodiment of the optical sensor array substrate according to the present disclosure.

Referring to <FIG> and <FIG>, in some embodiments, the optical fingerprint reader further includes a readout circuit (Readout Integrated Circuit, referred to ROIC for short) <NUM>, a gate circuit (Gate IC) <NUM>, and a flexible printed circuit board (Flexible Printed Circuit, referred to FPC for short) <NUM>. The readout circuit <NUM>, the gate circuit <NUM> and the flexible circuit board <NUM> are located at a periphery of the optical sensor array substrate <NUM>. The readout circuit <NUM> and the flexible circuit board <NUM> are electrically connected to the driving circuit board <NUM> respectively, and the gate circuit <NUM> is electrically connected to the flexible circuit board <NUM> through a metal trace <NUM>. The driving circuit board <NUM> may realize the fine control of an operation state of the optical sensor array substrate <NUM> by means of the readout circuit <NUM>, the gate circuit <NUM> and the flexible circuit board <NUM>.

Referring to <FIG>, the optical sensor array substrate <NUM> includes a substrate <NUM> that includes a detection area 30A (AA area) and a peripheral area 30R surrounding the detection area 30A. In some embodiments, the peripheral area 30R may include a dummy area 30B and a bonding area 30E. In <FIG>, the detection area 30A includes a plurality of photosensitive pixels 30a. The dummy area 30B also includes a plurality of dummy pixels 30b. The dummy pixel 30b is configured to collect noises in a dark state, that is, noise signals resulting from non-illuminating reasons, for representing the noises of each row of photosensitive pixels 30a, so as to reduce the random noises of each row of photosensitive pixels 30a by means of compensation.

The plurality of photosensitive pixels 30a and the plurality of dummy pixels 30b are arranged in a plurality of rows and a plurality of columns according to a row direction and column direction of the arrays. The plurality of photosensitive pixels 30a and the plurality of dummy pixels 30b may be collectively divided into a plurality of pixel groups according to the column. For example, the resolution of the detection area 30A is <NUM>×<NUM>, the pixel pitch is <NUM>, and two columns of dummy pixels 30b and a plurality of columns of photosensitive pixels may be totally divided into six groups according to the column. The first group consists in the first column of dummy pixels and <NUM>~<NUM> rows of photosensitive pixels counting from the left, the second group consists in <NUM>~<NUM> rows of photosensitive pixels, the third group consists in <NUM>~<NUM> rows of photosensitive pixels, and so forth for the fourth to sixth groups sequentially.

In <FIG>, the optical fingerprint reader includes two groups of readout circuits <NUM> respectively located on the first and second sides of the optical sensor array substrate <NUM>, wherein the first side is one side opposite to the second side (for example, the left side and right sides in <FIG>). In some embodiments, the dummy area 30B is arranged on at least one side of the detection area 30A. For example, in <FIG> and <FIG>, the two dummy areas 30B are located on the third and fourth side of the detection area 30A respectively (for example, the upper side and lower side in <FIG>), and the third side is one side opposite to the fourth side, and the third side and the fourth side are both adjacent to the first side and the second side.

Referring to <FIG> and <FIG>, in some embodiments, the bonding area 30E is located on at least one side of the detection area 30A, for example, located on the upper side, the lower sides and the left side of the detection area 30A. The bonding area 30E includes a plurality of first fanout metal structures <NUM> and a plurality of second fanout metal structures <NUM>.

In <FIG>, each group of readout circuits <NUM> includes three readout circuits <NUM>. The pins <NUM> of the three readout circuits <NUM> located on the first side of the optical sensor array substrate <NUM> are electrically connected to the first, third and fifth group of pixels through the first fanout metal structure <NUM> in the bonding area 30E, so as to respectively read out the sensing signal of each photosensitive pixel 30a and dummy pixel 30b in the three groups. The pins <NUM> of the three readout circuits <NUM> located on the second side of the optical sensor array substrate <NUM> in <FIG> are electrically connected to the second, fourth and sixth groups of pixels in the bonding area 30E through the first fanout metal structure <NUM> in the bonding area 30W, so as to read out the sensing signals of each photosensitive pixel 30a and dummy pixel 30b in the three groups respectively, thereby implementing reading out the sensing signals of all rows of photosensitive pixels 30a in the entire detection area 30A and all dummy pixels 30b in the dummy area 30B through the six readout circuits <NUM>.

The plurality of first fanout metal structures <NUM> may be electrically connected to the readout data lines of respective columns of photosensitive pixels 30a and dummy pixels 30b respectively. In some embodiments, the first fanout metal structure <NUM> may implement electrically connecting the readout circuit <NUM> to the photosensitive pixel 30a and the dummy pixel 30b by a bimetal layer (for example, Mo-Al bimetal layer) so as to reduce the resistance. Especially in the case of a long connection distance (for example, greater than <NUM>), the bimetal layer structure may effectively ensure signal conduction. The electrical connection between the bimetal layer may be achieved by a via hole penetrating through the insulating layer, for example, by more than two square via holes of <NUM>*<NUM>.

In <FIG>, the plurality of readout circuits in the two groups of readout circuits <NUM> are alternately arranged in the row direction (i.e., the left and right direction in <FIG>), so that each photosensitive pixel 30a within the detection area 30A may be driven by different readout circuits <NUM> according to the area, thereby simplifying the circuit layout and data processing, and further facilitate realizing reading uniformity of the signal by way of wiring with equal resistance. In some embodiments, the readout circuit <NUM> may be an integrated circuit arranged on the film, namely ROIC COF (Chip on Film). That is, the readout circuit is attached to the outer periphery of the optical sensor array substrate <NUM> through the film.

Referring to <FIG>, in some embodiments, the optical sensor array substrate <NUM> is rectangular, and the gate circuit <NUM> and the flexible circuit board <NUM> may be both arranged on the third side of the optical sensor array substrate <NUM>, wherein the third side is adjacent to both the first side and the second side. In <FIG>, the pins <NUM> of the two gate circuits <NUM> are electrically connected to each row of photosensitive pixels 30a and dummy pixels 30b through the second fanout metal structure <NUM> in the bonding area 30E respectively.

In some embodiments, the plurality of first fanout metal structures <NUM> may be electrically connected to the gate lines of respective columns of photosensitive pixels 30a and dummy pixels 30b. The second fanout metal structure <NUM> may also implement electrically connecting the gate circuit <NUM> to the photosensitive pixel 30a by a bimetal layer (for example, Mo-Al bimetal layer).

In some embodiments, the bimetal layer includes a first metal layer and a second metal layer. The first metal layer is located in the same layer and has the same material as the readout data line. The second metal layer is located in the same layer and has the same material as the gate line, and is electrically connected to the first metal layer through a via hole penetrating through the gate insulating layer.

The gate circuit <NUM> is configured to control the switching of each row of photosensitive pixels 30a and dummy pixels 30b. The driving circuit board <NUM> may be connected to the pin <NUM> of the gate circuit <NUM> through the pin <NUM> of the flexible circuit board <NUM> so as to turn on or off one or more rows of photosensitive pixels and dummy pixels through an input signal.

In order to reduce the resistance of the metal trace <NUM>, in some embodiments, the width of the metal trace <NUM> may be greater than <NUM>. Referring to <FIG>, in order to prevent the light around the optical sensor array substrate <NUM> from disturbing the detection area 30A and the dummy area 30B, in some embodiments, the optical fingerprint reader further includes a light-absorbing plastic frame 30D, for example a black light-absorbing plastic frame. The light-absorbing plastic frame 30D is located on one side of the optical sensor array substrate <NUM> away from the backlight module <NUM>. A light-absorbing portion of the light-absorbing plastic frame 30D may cover the peripheral area 30R and expose the dummy area 30B, for example covering the respective pins of the readout circuit <NUM>, the gate circuit <NUM> and the flexible circuit board <NUM> and their bonding areas 30E. In this way, the detection area 30A and the dummy area 30B may be exposed from a non-light-absorbing portion of the light-absorbing plastic frame 30D, so that it is possible to sense the light and also possible to prevent the disturbance of the ambient light.

<FIG> is a schematic view of the principle of the electrostatic discharge circuit in an embodiment of the optical sensor array substrate according to the present disclosure.

Referring to <FIG> and <FIG>, in some embodiments, the optical sensor array substrate further includes an electrostatic discharge area 30C, which may be located on one side of the dummy area 30B away from the detection area 30A. The plurality of electrostatic discharge units 30c are arranged according to a column direction. Referring to <FIG>, in some embodiments, the electrostatic discharge unit 30c includes a first transistor <NUM> and a second transistor <NUM>. Each of the first transistor <NUM> and the second transistor <NUM> includes a gate, a source and a drain. The gate of the first transistor <NUM> is electrically connected to the drain of the first transistor <NUM> and connected to the gate signal output terminal (gate) of the gate circuit <NUM>.

The drain of the second transistor <NUM> is electrically connected to the source of the first transistor <NUM>, and the gate of the second transistor <NUM> and the source of the second transistor <NUM> are both connected to a first voltage terminal with a lower voltage, for example VGL or GND. The voltage of the first voltage terminal is lower than the gate signal voltage of the gate signal output terminal (gate). The first transistor <NUM> and the second transistor <NUM> may realize a N-type heavily doped conductive area so as to complete a current path conductive in a forward direction and a reverse direction.

When a normal gate signal passes through the electrostatic discharge unit 30c corresponding to each row of pixels, the source and drain of the first transistor <NUM> are turned on, and the source and drain of the second transistor <NUM> are turned off, thereby presenting such a state that the electrostatic discharge unit 30c is turned off. When an abnormally high voltage signal generated by static electricity is generated, the gate of the first transistor <NUM> may be at a high potential, so that the source and drain of the first transistor <NUM> are turned on. At this time, this voltage signal reaches the drain of the second transistor <NUM> via the source and drain of the first transistor <NUM>. The abnormally high voltage signal may allow the second transistor <NUM> to reach an edge of breakdown, such that this voltage signal reaches VGL or GND via the drain and source of the second transistor <NUM>, thereby realizing electrostatic discharge and avoiding damage to the optical fingerprint reader resulting from static electricity entering the detection area 30A, the dummy area 30B and each of the driving circuits.

Referring to <FIG>, in some embodiments, a plurality of electrostatic discharge units arranged according to a column direction correspond to the plurality of rows of photosensitive pixels 30a in the detection area 30A and the dummy pixels 30b in the dummy area 30B in a one-to-one correspondence. That is, each electrostatic discharge unit 30c corresponds to a row of photosensitive pixels 30a and a row of dummy pixels 30b.

<FIG> are schematic views of the structure of the detection area and the dummy area in <FIG> respectively. <FIG> are schematic views of the dummy area in some embodiments of the optical sensor array substrate according to the present disclosure. <FIG> is a schematic view of the structure of the detection area in another embodiment of the optical sensor array substrate according to the present disclosure. <FIG> are schematic views of the coverage areas of the light-shielding metal layer in the detection area and the dummy area in <FIG>.

Referring to <FIG>, the photosensitive pixel 30a includes a thin film transistor (referred to TFT for short) <NUM> and a storage capacitor <NUM> located on the substrate <NUM>, a photosensitive element <NUM> and a first light-shielding metal layer <NUM>. The TFT <NUM> which is electrically connected to both the storage capacitor <NUM> and the photosensitive element <NUM>, may be configured to control an operation state of the photosensitive element <NUM>.

Referring to <FIG>, the first light-shielding metal layer (also referred to as a top metal) <NUM> is located on one side of the TFT <NUM> and the photosensitive element <NUM> away from the substrate 31d, and a coverage range of the first light-shielding metal layer is part of the photosensitive pixels. The orthographic projection of the first light-shielding metal layer <NUM> on the substrate <NUM> at least partially overlaps with the orthographic projection of the TFT <NUM> on the substrate <NUM>, and does not overlap with the orthographic projection of the photosensitive element <NUM> on the substrate <NUM>. This is favorable for preventing light from adversely affecting the TFT (for example, current leakage resulting from sensitization of the TFT), without affecting the photosensitive element <NUM> in receiving light.

Referring to <FIG>, the dummy pixel 30b includes a TFT <NUM> and a storage capacitor <NUM> located on a substrate <NUM>, a photosensitive element <NUM>, and a second light-shielding metal layer <NUM>'. The thin film transistor <NUM> is electrically connected to both the storage capacitor <NUM> and the photosensitive element <NUM>. In some embodiments, the photosensitive pixel 30a and the dummy pixel 30b may use the same or different TFT <NUM>, storage capacitor <NUM>, and photosensitive element <NUM>. In some embodiments, the photosensitive element <NUM> may include a photoelectric diode.

Referring to <FIG>, the second light-shielding metal layer <NUM>' is located on one side of the TFT <NUM> and the photosensitive element <NUM> away from the substrate 31d. Correspondingly, the orthographic projection of the thin film transistor <NUM> and the photosensitive element <NUM> on the substrate <NUM> is located within the orthographic projection of the second light-shielding metal layer <NUM>' on the substrate <NUM>. This is favorable for preventing light from adversely affecting the TFT (for example, current leakage resulting from sensitization of the TFT), and also avoids the photosensitive element <NUM> in the dummy pixel 30b from receiving light. In some embodiments, each of the plurality of dummy pixels 30b includes a second light-shielding metal layer <NUM>', and the second light-shielding metal layer of the plurality of dummy pixels 30b entirely covers the dummy area.

In <FIG>, the optical sensor array substrate <NUM> includes a gate insulating layer 34a, a first passivation layer 34b, a planarization layer <NUM>, and a second passivation layer 34c. The thin film transistor <NUM> includes a gate 32a, an active layer 32b, a source 32c, and a drain 32d. The gate 32a is located between the substrate <NUM> and the active layer 32b, and the gate insulating layer 34a is located on one side of the substrate <NUM> adjacent to the active layer 32b and covers the gate 32a. The source 32c and the drain 32d are located on the surface of one side of the gate insulating layer 34a away from the substrate <NUM>, and electrically connected to the active layer 32b respectively.

The first passivation layer 34b is located on one side of the source 32c and the drain 32d away from the substrate <NUM>, and covers the source 32c and the drain 32d. The planarization layer <NUM> is located on one side of the first passivation layer 34b away from the substrate <NUM>, and its thickness may be adjusted as needed, for example, <NUM>-<NUM>. The photosensitive element <NUM> is located within the planarization layer <NUM>. The second passivation layer 34c is located on one side of the planarization layer <NUM> away from the substrate <NUM>.

The storage capacitor <NUM> includes a first capacitor plate 33a and a second capacitor plate 33b. The first capacitor plate 33a, and the gate 32a of the TFT <NUM> are located in the same layer and have the same material, and may be formed by the same patterning process so as to simplify the process. The second capacitor plate 33b, and the source 32c and the drain 32d of the TFT <NUM> are located in the same layer and have the same material, and may be formed by the same patterning process so as to simplify the process. The second capacitor plate 33b is electrically connected to the source 32c or the drain 32d of the TFT <NUM>, and at least partially overlaps with the orthographic projection of the first capacitor plate 33a on the substrate <NUM>.

Referring to <FIG>, in other embodiments, the first capacitor plate 33a and the gate 32a of the thin film transistor <NUM> are located in the same layer and have the same material, and the second capacitor plate 33b' and the source 32c and the drain 32d of the thin film transistor <NUM> are located in different layers respectively. For example, in <FIG>, the second capacitor plate 33b' is electrically connected to the source 32c or the drain 32d of the TFT <NUM> through a via hole penetrating through the first passivation layer 34b.

Referring to <FIG>, in some embodiments, one end of the photosensitive element <NUM> is electrically connected to the second capacitor plate 33b through a via hole penetrating through the first passivation layer 34b. In some embodiments, the second capacitor plate 33b is also served as the bottom electrode of the photosensitive element <NUM>. The orthographic projection of the photosensitive element <NUM> on the substrate <NUM> is located within the orthographic projections of the second capacitor plate 33b and the first capacitor plate 33a on the substrate <NUM>. The first capacitor plate 33a and the second capacitor plate 33b are formed of an opaque metal, for example Au, Mu, Al or the like, so that the first capacitor plate 33a and the second capacitor plate 33b may shield the backlight on the lower side of the photosensitive element <NUM> and eliminate the disturbance of the backlight on the photosensitive element <NUM>.

A first electrode layer 36a is provided at another end of the photosensitive element <NUM>, and the first electrode layer 36a is electrically connected to the photosensitive element <NUM>. The first electrode layer 36a may increase area of a conductive electrode of the photosensitive element <NUM>. The first electrode layer 36a may be formed of indium tin oxide (referred to ITO for short).

A second electrode layer 36b that is electrically connected to the bias voltage signal terminal may also be provided on one side of the second passivation layer 34c away from the substrate <NUM>, and the second electrode layer 36b is electrically connected to the first electrode layer 36a through a via hole penetrating through the second passivation layer 34c and the planarization layer <NUM>. The second electrode layer 36b may be formed of an ITO material.

The orthographic projection of the first electrode layer 36a on the substrate <NUM> at least partially overlaps with the orthographic projection of the second capacitor plate 33b on the substrate <NUM>, such that it is possible to effectively increase the charge storage capacity of the pixel and improve the resistance to intense light of the optical fingerprint reader in a form in which the storage capacitor <NUM> formed by the first capacitor plate 33a and the second capacitor plate 33b is connected in parallel with the storage capacitor formed by the first capacitor electrode layer 36a and the second capacitor plate 33b.

Referring to <FIG>, in some embodiments, the optical sensor array substrate <NUM> further includes a third passivation layer 34d and an electrostatic shielding layer <NUM>, wherein the third passivation layer 34d is located on one side of the second passivation layer 34c away from the substrate <NUM>, and covers the second electrode layer 36b, the first light-shielding metal layer <NUM> and the second light-shielding metal layer <NUM>'. The electrostatic shielding layer <NUM> is located on one side of the third passivation layer 34d away from the substrate <NUM>, and is grounded to eliminate static electricity on the surface by conduction.

In other embodiments, the dummy pixel 30b may also be in other structures. For example, referring to <FIG>, in some embodiments, the dummy pixel 30b may not include the photosensitive element <NUM>. The dummy area includes a plurality of dummy pixels 30b, at least one of which includes: a TFT <NUM>, a storage capacitor <NUM>, and a second light-shielding metal layer <NUM>'. The second light-shielding metal layer <NUM>' is located on one side of the TFT <NUM> away from the substrate <NUM>, and the orthographic projection of the TFT <NUM> on the substrate <NUM> is located within the orthographic projection of the second light-shielding metal layer on the substrate <NUM>. Compared with the photosensitive pixel 30a, the dummy pixel 30b includes the same insulating layers as in the photosensitive pixel 30a at a position corresponding to the photosensitive element <NUM>.

Referring to <FIG>, in some embodiments, the dummy pixel 30b may further include a dummy element <NUM>' in addition to the TFT <NUM>, the storage capacitor <NUM>, and the second light-shielding metal layer <NUM>'. The dummy element <NUM>' includes a material that has the same dielectric constant as the photosensitive element <NUM> and does not have a photosensitive property. Both ends of the dummy element <NUM>' may be electrically connected to the second capacitor plate 33b and the first electrode layer 36a respectively. The dummy pixel 30b may include the second light-shielding metal layer <NUM>', or may not include the second light-shielding metal layer <NUM>'. The second light-shielding metal layer <NUM>' is located on one side of the TFT <NUM> away from the substrate <NUM>, and the orthographic projection of the TFT <NUM> on the substrate <NUM> is located within the orthographic projection of the second light-shielding metal layer on the substrate <NUM>. Referring to <FIG>, in other embodiments, the second light-shielding metal layer <NUM>' may be omitted on the basis of the embodiment in <FIG>.

<FIG> is a schematic view of overlapping the gate with the source and the drain of the TFT in an embodiment of the optical sensor array substrate according to the present disclosure. <FIG> is a schematic view of the arrangement of a readout data line and a source and drain of the TFT in an embodiment of the optical sensor array substrate according to the present disclosure. <FIG> is a schematic view of the arrangement of a gate line and a gate of the TFT in an embodiment of the optical sensor array substrate according to the present disclosure.

Referring to <FIG>, in some embodiments, the orthographic projection of the gate 32a of the TFT <NUM> on the substrate <NUM> partially overlaps with the orthographic projections of the drain 32d and the source 32c of the TFT <NUM> on the substrate <NUM> respectively, with an overlapped portion A shown in <FIG>. The orthographic projection of the active layer 32b on the substrate <NUM> also partially overlaps with the overlapped portion A.

Referring to <FIG>, in some embodiments, the photosensitive pixel 30a (which may also be a dummy pixel 30b) includes: a readout data line <NUM> extending along a first direction y and a gate line <NUM> extending along a second direction x. The second direction x is perpendicular to the first direction y. In <FIG>, the gate line <NUM> and the gate 32a of the TFT <NUM> are located in the same layer and connected (the gate line <NUM> and the gate 32a are divided by a dotted line), wherein one end of the gate 32a of the TFT <NUM> is connected to the gate line <NUM>, and another end thereof extends along the first direction y relative to the gate line <NUM>.

In <FIG>, the readout data line <NUM> and the source 32c of the TFT <NUM> are located in the same layer and connected (the readout data line <NUM> and the source 32c are divided by a dotted line), wherein one end of the source 32c is connected to the readout data line <NUM>, and another end of the source 32c extends along the second direction x relative to the readout data line <NUM>. The drain 32d of the TFT <NUM> is L-shaped, and has a first portion 32d1, a second portion 32d2, and a corner portion 32d3. The corner portion 32d3 connects the first portion 32d1 and the second portion 32d2. The first portion 32d1 extends along a direction opposite to the first direction y relative to the corner portion 32d3, and the second portion 32d2 extends along a direction opposite to the second direction x relative to the corner portion 32d3.

By way of the structures of the TFT shown in <FIG>, it is possible to obtain the effect that the orthographic projection of the gate 32a of the TFT <NUM> on the substrate <NUM> partially overlaps with the orthographic projections of both the drain 32d and source 32c of the TFT <NUM> on the substrate <NUM> respectively.

Compared with the related art where the drain and source of the TFT are strip portions parallel to each other, in this embodiment, it is possible to reduce an overlapped area of the orthographic projections of the drain 32d and source 32c of the TFT <NUM> on the substrate <NUM> with the orthographic projection of the gate 32a on the substrate <NUM>, thereby reducing the capacitance formed by the drain 32d, the source 32c and the gate 32a, and then reducing the noise of the optical sensor array substrate <NUM>.

<FIG> is a schematic view of the arrangement of a readout data line, a gate line and a second electrode layer in photosensitive pixels or dummy pixels arranged in an array in an embodiment of the optical sensor array substrate according to the present disclosure.

Referring to <FIG>, <FIG>, <FIG>, and <FIG>, in some embodiments, the plurality of photosensitive pixels 30a and the plurality of dummy pixels 30b are arranged in a plurality of rows and a plurality of columns according to a row direction (for example, the second direction x) and a column direction (for example, the first direction y) of an array. <FIG> shows a total of four adjacent photosensitive pixels 30a or dummy pixels 30b in two rows and two columns. Each column of photosensitive pixels 30a (which may also be each column of dummy pixels 30b) include a readout data line <NUM> continuously extending along the column direction and a gate line <NUM> continuously extending along the row direction.

The second electrode layers 36b of each row of photosensitive pixels 30a are all sequentially connected along the column direction to form an entirety of the second electrode layer. In order to reduce the disturbance of the readout data line <NUM> by the capacitance formed by the second electrode layer 36b and the readout data line <NUM>, it is possible to allow that the orthographic projection of an entirety of the second electrode layer on the substrate <NUM> partially overlaps with the orthographic projection of each row of photosensitive pixels 30a on the substrate <NUM>, and does not partially or wholly overlap with the readout data line <NUM> of each row of photosensitive pixels 30a. In this way, by reducing or eliminating a projection overlapped area between the second electrode layer 36b and the readout data line <NUM>, it is possible to effectively reduce the capacitance formed by the second electrode layer 36b and the readout data line <NUM>, thereby reducing the disturbance of this capacitance on the readout data line <NUM>.

Similarly, the second electrode layers 36b of the dummy pixels 30b are all sequentially connected to an entirety of the second electrode layer along the column direction. In order to reduce the disturbance of the capacitance formed by the second electrode layer 36b and the readout data line <NUM> on the readout data line <NUM>, it is possible to allow that the orthographic projection of an entirety of the second electrode layer on the substrate <NUM> partially overlaps with the orthographic projection of each column of dummy pixels 30b on the substrate <NUM>, and does not partially or wholly overlap with the readout data line <NUM> of each column of dummy pixels 30b. In this way, by reducing or eliminating a projection overlapped area between the second electrode layer 36b and the readout data line <NUM>, it is possible to effectively reduce the capacitance formed by the second electrode layer 36b and the readout data line <NUM>, thereby reducing the disturbance of this capacitance on the readout data line <NUM>.

Each of the embodiments of the above-described optical sensor array substrate according to the present disclosure may be applied to various devices for detecting a surface texture of an object, for example, detecting fingerprints or palm prints of a person. Correspondingly, the present disclosure provides an optical fingerprint reader including the foregoing optical sensor array substrate, which may realize fingerprint identification and detection of a single finger or a plurality of fingers (for example, two fingers, three fingers, or four fingers), or identification and detection of palmprints. The optical fingerprint reader may be used for fingerprint acquisition and detection in application scenarios such as customs security.

Hereto, various embodiments of the present disclosure have been described in detail. Some details well known in the art are not described in order to avoid obscuring the concept of the present disclosure. According to the above description, those skilled in the art would fully understand how to implement the technical solutions disclosed here.

Claim 1:
An optical sensor array substrate (<NUM>), comprising a substrate (<NUM>), the substrate (<NUM>) comprising a detection area (30A) and a peripheral area (30R) surrounding the detection area (30A), characterized in that the detection area (30A) comprises a plurality of photosensitive pixels (30a), at least one of which comprises:
a thin film transistor (<NUM>) arranged on the substrate (<NUM>) and having a gate, an active layer, a source and a drain;
a storage capacitor (<NUM>) arranged on the substrate (<NUM>) and having a first capacitor plate (33a) and a second capacitor plate (33b), wherein the second capacitor plate (33b) is located on one side of the first capacitor plate (33a) away from the substrate (<NUM>) and electrically connected to the source or drain of the thin film transistor (<NUM>);
a photosensitive element (<NUM>) located on one side of the storage capacitor (<NUM>) away from the substrate (<NUM>) and having one end electrically connected to the second capacitor plate (33b);
a first electrode layer (36a) located on one side of the photosensitive element (<NUM>) away from the substrate (<NUM>) and electrically connected to another end of the photosensitive element (<NUM>),
wherein an orthographic projection of the second capacitor plate (33b) on the substrate (<NUM>) at least partially overlaps with an orthographic projection of the first electrode layer (36a) on the substrate (<NUM>),
wherein the optical sensor array substrate is characterized in that the peripheral area (30R) comprises a dummy area (30B) located on at least one side of the detection area (30A), and the dummy area (30B) comprises a plurality of dummy pixels (30b), each of which is configured to collect noises in a dark state, that is, noise signals resulting from non-illuminating reasons, for representing the noises of each row of photosensitive pixels (30a), so as to reduce the random noises of each row of photosensitive pixels by means of compensation.