Patent Description:
In general, this disclosure describes techniques for determining a maximum number of subblock based merge candidates. When performing inter prediction, a video coder (e.g., a video encoder and/or a video decoder) may construct a list of subblock based merge candidates (e.g., subblockMergeCandList). For various considerations, it may be desirable to limit a number of candidates included in the list of subblock based merge candidates. As such, when encoding video data, a video encoder may test encoding with a number of subblock based merge candidates that is less than or equal to the maximum number of subblock based merge candidates. The video encoder may signal a syntax element that specifies the maximum number of subblock based merge candidates.

As opposed to signalling a syntax element that directly specifies the maximum number, the video encoder may signal a syntax element that specifies a function of the maximum number of subblock based merge candidates. For instance, the video encoder may signal a syntax element that specifies five minus the maximum number of subblock based merge candidates. The video decoder may determine the maximum number of subblock based merge candidates by adding five to the value of the syntax element.

The video encoder may constrain the value of the syntax element that specifies the function of the maximum number of subblock based merge candidates. For instance, the video encoder may constrain the value of the syntax element that specifies the function of the maximum number of subblock based merge candidates based on a value of a syntax element specifying whether affine model based motion compensation is enabled. For instance, the video encoder may constrain the value of the syntax element that specifies five minus the maximum number of subblock based merge candidates (e.g., five_minus_max_num_subblock_merge_cand) to be less than five minus a value of a syntax element specifying whether affine model based motion compensation is enabled (e.g., sps_affine_enabled_flag). However, such a constraint may result in undesirable behavior. For instance, where the flag that specifies whether affine model based motion compensation is enabled is <NUM> and the value of the syntax element that specifies five minus the maximum number of subblock based merge candidates is <NUM>, the video decoder may derive the maximum number as zero, which may result in various undesirable behaviors (e.g., merge may be disabled for affine, regardless of other flags which would enable such modes).

The invention is defined in the appended independent claims. Optional features are defined in the dependent claims.

The enabling disclosure is provided in the paragraphs right after the discussion of the state of the art (VVC Draft <NUM> and, especially, JVET-R0215). In those paragraphs the modified semantics of syntax element five_minus_max_num_subblock_merge_cand is illustrated together with the semantics of syntax element sps_sbtmvp_enabled_flag.

<FIG> is a block diagram illustrating an example video encoding and decoding system <NUM> that may perform the techniques of this disclosure. The techniques of this disclosure are generally directed to coding (encoding and/or decoding) video data. In general, video data includes any data for processing a video. Thus, video data may include raw, unencoded video, encoded video, decoded (e.g., reconstructed) video, and video metadata, such as signaling data.

As shown in <FIG>, system <NUM> includes a source device <NUM> that provides encoded video data to be decoded and displayed by a destination device <NUM>, in this example. In particular, source device <NUM> provides the video data to destination device <NUM> via a computer-readable medium <NUM>. Source device <NUM> and destination device <NUM> may comprise any of a wide range of devices, including desktop computers, notebook (i.e., laptop) computers, tablet computers, set-top boxes, telephone handsets such as smartphones, televisions, cameras, display devices, digital media players, video gaming consoles, video streaming device, or the like. In some cases, source device <NUM> and destination device <NUM> may be equipped for wireless communication, and thus may be referred to as wireless communication devices.

In the example of <FIG>, source device <NUM> includes video source <NUM>, memory <NUM>, video encoder <NUM>, and output interface <NUM>. Destination device <NUM> includes input interface <NUM>, video decoder <NUM>, memory <NUM>, and display device <NUM>. In accordance with this disclosure, video encoder <NUM> of source device <NUM> and video decoder <NUM> of destination device <NUM> may be configured to apply the techniques for determining a maximum number of subblock merge candidates. Thus, source device <NUM> represents an example of a video encoding device, while destination device <NUM> represents an example of a video decoding device. In other examples, a source device and a destination device may include other components or arrangements. For example, source device <NUM> may receive video data from an external video source, such as an external camera. Likewise, destination device <NUM> may interface with an external display device, rather than include an integrated display device.

System <NUM> as shown in <FIG> is merely one example. In general, any digital video encoding and/or decoding device may perform techniques for determining a maximum number of subblock merge candidates. Source device <NUM> and destination device <NUM> are merely examples of such coding devices in which source device <NUM> generates coded video data for transmission to destination device <NUM>. This disclosure refers to a "coding" device as a device that performs coding (encoding and/or decoding) of data. Thus, video encoder <NUM> and video decoder <NUM> represent examples of coding devices, in particular, a video encoder and a video decoder, respectively. In some examples, source device <NUM> and destination device <NUM> may operate in a substantially symmetrical manner such that each of source device <NUM> and destination device <NUM> includes video encoding and decoding components. Hence, system <NUM> may support one-way or two-way video transmission between source device <NUM> and destination device <NUM>, e.g., for video streaming, video playback, video broadcasting, or video telephony.

In general, video source <NUM> represents a source of video data (i.e., raw, unencoded video data) and provides a sequential series of pictures (also referred to as "frames") of the video data to video encoder <NUM>, which encodes data for the pictures. Video source <NUM> of source device <NUM> may include a video capture device, such as a video camera, a video archive containing previously captured raw video, and/or a video feed interface to receive video from a video content provider. As a further alternative, video source <NUM> may generate computer graphics-based data as the source video, or a combination of live video, archived video, and computer-generated video. In each case, video encoder <NUM> encodes the captured, pre-captured, or computer-generated video data. Video encoder <NUM> may rearrange the pictures from the received order (sometimes referred to as "display order") into a coding order for coding. Video encoder <NUM> may generate a bitstream including encoded video data. Source device <NUM> may then output the encoded video data via output interface <NUM> onto computer-readable medium <NUM> for reception and/or retrieval by, e.g., input interface <NUM> of destination device <NUM>.

Memory <NUM> of source device <NUM> and memory <NUM> of destination device <NUM> represent general purpose memories. In some examples, memories <NUM>, <NUM> may store raw video data, e.g., raw video from video source <NUM> and raw, decoded video data from video decoder <NUM>. Additionally or alternatively, memories <NUM>, <NUM> may store software instructions executable by, e.g., video encoder <NUM> and video decoder <NUM>, respectively. Although memory <NUM> and memory <NUM> are shown separately from video encoder <NUM> and video decoder <NUM> in this example, it should be understood that video encoder <NUM> and video decoder <NUM> may also include internal memories for functionally similar or equivalent purposes. Furthermore, memories <NUM>, <NUM> may store encoded video data, e.g., output from video encoder <NUM> and input to video decoder <NUM>. In some examples, portions of memories <NUM>, <NUM> may be allocated as one or more video buffers, e.g., to store raw, decoded, and/or encoded video data.

Computer-readable medium <NUM> may represent any type of medium or device capable of transporting the encoded video data from source device <NUM> to destination device <NUM>. In one example, computer-readable medium <NUM> represents a communication medium to enable source device <NUM> to transmit encoded video data directly to destination device <NUM> in real-time, e.g., via a radio frequency network or computer-based network. Output interface <NUM> may demodulate a transmission signal including the encoded video data, and input interface <NUM> may demodulate the received transmission signal, according to a communication standard, such as a wireless communication protocol. The communication medium may comprise any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form part of a packet-based network, such as a local area network, a wide-area network, or a global network such as the Internet. The communication medium may include routers, switches, base stations, or any other equipment that may be useful to facilitate communication from source device <NUM> to destination device <NUM>.

In some examples, source device <NUM> may output encoded data from output interface <NUM> to storage device <NUM>. Similarly, destination device <NUM> may access encoded data from storage device <NUM> via input interface <NUM>. Storage device <NUM> may include any of a variety of distributed or locally accessed data storage media such as a hard drive, Blu-ray discs, DVDs, CD-ROMs, flash memory, volatile or non-volatile memory, or any other suitable digital storage media for storing encoded video data.

In some examples, source device <NUM> may output encoded video data to file server <NUM> or another intermediate storage device that may store the encoded video data generated by source device <NUM>. Destination device <NUM> may access stored video data from file server <NUM> via streaming or download. File server <NUM> may be any type of server device capable of storing encoded video data and transmitting that encoded video data to the destination device <NUM>. File server <NUM> may represent a web server (e.g., for a website), a File Transfer Protocol (FTP) server, a content delivery network device, or a network attached storage (NAS) device. Destination device <NUM> may access encoded video data from file server <NUM> through any standard data connection, including an Internet connection. This may include a wireless channel (e.g., a Wi-Fi connection), a wired connection (e.g., digital subscriber line (DSL), cable modem, etc.), or a combination of both that is suitable for accessing encoded video data stored on file server <NUM>. File server <NUM> and input interface <NUM> may be configured to operate according to a streaming transmission protocol, a download transmission protocol, or a combination thereof.

Output interface <NUM> and input interface <NUM> may represent wireless transmitters/receivers, modems, wired networking components (e.g., Ethernet cards), wireless communication components that operate according to any of a variety of IEEE <NUM> standards, or other physical components. In examples where output interface <NUM> and input interface <NUM> comprise wireless components, output interface <NUM> and input interface <NUM> may be configured to transfer data, such as encoded video data, according to a cellular communication standard, such as <NUM>, <NUM>-LTE (Long-Term Evolution), LTE Advanced, <NUM>, or the like. In some examples where output interface <NUM> comprises a wireless transmitter, output interface <NUM> and input interface <NUM> may be configured to transfer data, such as encoded video data, according to other wireless standards, such as an IEEE <NUM> specification, an IEEE <NUM> specification (e.g., ZigBee™), a Bluetooth™ standard, or the like. In some examples, source device <NUM> and/or destination device <NUM> may include respective system-on-a-chip (SoC) devices. For example, source device <NUM> may include an SoC device to perform the functionality attributed to video encoder <NUM> and/or output interface <NUM>, and destination device <NUM> may include an SoC device to perform the functionality attributed to video decoder <NUM> and/or input interface <NUM>.

Input interface <NUM> of destination device <NUM> receives an encoded video bitstream from computer-readable medium <NUM> (e.g., a communication medium, storage device <NUM>, file server <NUM>, or the like). The encoded video bitstream may include signaling information defined by video encoder <NUM>, which is also used by video decoder <NUM>, such as syntax elements having values that describe characteristics and/or processing of video blocks or other coded units (e.g., slices, pictures, groups of pictures, sequences, or the like). Display device <NUM> displays decoded pictures of the decoded video data to a user. Display device <NUM> may represent any of a variety of display devices such as a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or another type of display device.

Video encoder <NUM> and video decoder <NUM> may operate according to a video coding standard, such as ITU-T H. <NUM>, also referred to as High Efficiency Video Coding (HEVC) or extensions thereto, such as the multi-view and/or scalable video coding extensions. Alternatively, video encoder <NUM> and video decoder <NUM> may operate according to other proprietary or industry standards, such as ITU-T H. <NUM>, also referred to as Versatile Video Coding (VVC). A recent draft of the VVC standard is described in Bross, et al. "Versatile Video Coding (Draft <NUM>)," Joint Video Experts Team (JVET) of ITU-T SG <NUM> WP <NUM> and ISO/IEC JTC <NUM>/SC <NUM>/WG <NUM>, <NUM>th Meeting: Brussels, BE, <NUM>-<NUM> Jan. <NUM>, JVET-Q2001-vE (hereinafter "VVC Draft <NUM>"). The techniques of this disclosure, however, are not limited to any particular coding standard.

As another example, video encoder <NUM> and video decoder <NUM> may be configured to operate according to VVC. According to VVC, a video coder (such as video encoder <NUM>) partitions a picture into a plurality of coding tree units (CTUs). Video encoder <NUM> may partition a CTU according to a tree structure, such as a quadtree-binary tree (QTBT) structure or Multi-Type Tree (MTT) structure. The QTBT structure removes the concepts of multiple partition types, such as the separation between CUs, PUs, and TUs of HEVC. A QTBT structure includes two levels: a first level partitioned according to quadtree partitioning, and a second level partitioned according to binary tree partitioning. A root node of the QTBT structure corresponds to a CTU. Leaf nodes of the binary trees correspond to coding units (CUs).

In an MTT partitioning structure, blocks may be partitioned using a quadtree (QT) partition, a binary tree (BT) partition, and one or more types of triple tree (TT) (also called ternary tree (TT)) partitions. A triple or ternary tree partition is a partition where a block is split into three sub-blocks. In some examples, a triple or ternary tree partition divides a block into three sub-blocks without dividing the original block through the center. The partitioning types in MTT (e.g., QT, BT, and TT), may be symmetrical or asymmetrical.

In some examples, a CTU includes a coding tree block (CTB) of luma samples, two corresponding CTBs of chroma samples of a picture that has three sample arrays, or a CTB of samples of a monochrome picture or a picture that is coded using three separate color planes and syntax structures used to code the samples. A CTB may be an NxN block of samples for some value of N such that the division of a component into CTBs is a partitioning. A component is an array or single sample from one of the three arrays (luma and two chroma) that compose a picture in <NUM>:<NUM>:<NUM>, <NUM>:<NUM>:<NUM>, or <NUM>:<NUM>:<NUM> color format or the array or a single sample of the array that compose a picture in monochrome format. In some examples, a coding block is an MxN block of samples for some values of M and N such that a division of a CTB into coding blocks is a partitioning.

The blocks (e.g., CTUs or CUs) may be grouped in various ways in a picture. As one example, a brick may refer to a rectangular region of CTU rows within a particular tile in a picture. A tile may be a rectangular region of CTUs within a particular tile column and a particular tile row in a picture. A tile column refers to a rectangular region of CTUs having a height equal to the height of the picture and a width specified by syntax elements (e.g., such as in a picture parameter set). A tile row refers to a rectangular region of CTUs having a height specified by syntax elements (e.g., such as in a picture parameter set) and a width equal to the width of the picture.

In some examples, a tile may be partitioned into multiple bricks, each of which may include one or more CTU rows within the tile. A tile that is not partitioned into multiple bricks may also be referred to as a brick. However, a brick that is a true subset of a tile may not be referred to as a tile.

The bricks in a picture may also be arranged in a slice. A slice may be an integer number of bricks of a picture that may be exclusively contained in a single network abstraction layer (NAL) unit. In some examples, a slice includes either a number of complete tiles or only a consecutive sequence of complete bricks of one tile.

Some examples of VVC also provide an affine motion compensation mode, which may be considered an inter-prediction mode. In affine motion compensation mode, video encoder <NUM> may determine two or more motion vectors that represent non-translational motion, such as zoom in or out, rotation, perspective motion, or other irregular motion types.

To perform intra-prediction, video encoder <NUM> may select an intra-prediction mode to generate the prediction block. Some examples of VVC provide sixty-seven intra-prediction modes, including various directional modes, as well as planar mode and DC mode. In general, video encoder <NUM> selects an intra-prediction mode that describes neighboring samples to a current block (e.g., a block of a CU) from which to predict samples of the current block. Such samples may generally be above, above and to the left, or to the left of the current block in the same picture as the current block, assuming video encoder <NUM> codes CTUs and CUs in raster scan order (left to right, top to bottom).

As noted above, following any transforms to produce transform coefficients, video encoder <NUM> may perform quantization of the transform coefficients. Quantization generally refers to a process in which transform coefficients are quantized to possibly reduce the amount of data used to represent the transform coefficients, providing further compression. By performing the quantization process, video encoder <NUM> may reduce the bit depth associated with some or all of the transform coefficients. For example, video encoder <NUM> may round an n-bit value down to an m-bit value during quantization, where n is greater than m. In some examples, to perform quantization, video encoder <NUM> may perform a bitwise right-shift of the value to be quantized.

Following quantization, video encoder <NUM> may scan the transform coefficients, producing a one-dimensional vector from the two-dimensional matrix including the quantized transform coefficients. The scan may be designed to place higher energy (and therefore lower frequency) transform coefficients at the front of the vector and to place lower energy (and therefore higher frequency) transform coefficients at the back of the vector. In some examples, video encoder <NUM> may utilize a predefined scan order to scan the quantized transform coefficients to produce a serialized vector, and then entropy encode the quantized transform coefficients of the vector. In other examples, video encoder <NUM> may perform an adaptive scan. After scanning the quantized transform coefficients to form the one-dimensional vector, video encoder <NUM> may entropy encode the one-dimensional vector, e.g., according to context-adaptive binary arithmetic coding (CABAC). Video encoder <NUM> may also entropy encode values for syntax elements describing metadata associated with the encoded video data for use by video decoder <NUM> in decoding the video data.

In general, video decoder <NUM> performs a reciprocal process to that performed by video encoder <NUM> to decode the encoded video data of the bitstream. For example, video decoder <NUM> may decode values for syntax elements of the bitstream using CABAC in a manner substantially similar to, albeit reciprocal to, the CABAC encoding process of video encoder <NUM>. The syntax elements may define partitioning information for partitioning of a picture into CTUs, and partitioning of each CTU according to a corresponding partition structure, such as a QTBT structure, to define CUs of the CTU. The syntax elements may further define prediction and residual information for blocks (e.g., CUs) of video data.

In VVC Draft <NUM>, the maximum number of subblock based merging motion vector prediction candidates is signalled in the sequence parameter set (SPS). Specifically, a video coder may signal a syntax element that indicates a number (e.g., a quantity) of subblock based merging motion vector prediction candidates (e.g., a five_minus_max_num_subblock_merge_cand syntax element). As shown in the syntax table below, the presence of the syntax element that indicates the number of subblock based merging motion vector prediction candidates may be based on the value of a syntax element that specifies whether affine model based motion compensation can be used for inter prediction (e.g., a sps_affine_enabled_flag syntax element). For instance, five_minus_max_num_subblock_merge_cand may be present when sps_affine_enabled_flag is <NUM>, as shown below.

The corresponding semantics are as follows:
sps_affine_enabled_flag specifies whether affine model based motion compensation can be used for inter prediction. If sps_affine_enabled_flag is equal to <NUM>, the syntax shall be constrained such that no affine model based motion compensation is used in the coded layer video sequence (CLVS), and inter_affine_flag and cu_affine_type_flag are not present in coding unit syntax of the CLVS. Otherwise (sps_affine_enabled_flag is equal to <NUM>), affine model based motion compensation can be used in the CLVS.

five_minus_max_num_subblock_merge_cand specifies the maximum number of subblock-based merging motion vector prediction candidates supported in the SPS subtracted from <NUM>. The value of five_minus_max_num_subblock_merge_cand shall be in the range of <NUM> to <NUM>, inclusive.

When decoding a picture of video data, a video decoder (e.g., video decoder <NUM>) may determine a maximum number of subblock based merging candidates for the picture (e.g., MaxNumSubblockMergeCand). In VVC Draft <NUM>, the video coder may derive the maximum number of subblock based merging candidates as follows (e.g., when processing a picture header (PH) of the picutre of video data):
if( sps_affine_enabled_flag )
MaxNumSubblockMergeCand = <NUM> - five_minus_max_num_subblock_merge_cand
else
MaxNumSubblockMergeCand =
sps_sbtmvp_enabled_flag && ph_temporal_mvp_enable_flag.

As shown above, in VVC Draft <NUM>, when sps_affine_enabled_flag is set to <NUM>, the video decoder may derive the maximum number of subblock based merging candidates for the picture (e.g., MaxNumSubblockMergeCand) directly from the syntax element that indicates the number of subblock based merging motion vector prediction candidates (e.g., five_minus_max_num_subblock_merge_cand).

As such, VVC Draft <NUM> allows for a scenario where sps_affine_enabled_flag = <NUM> and five_minus_max_num_subblock_merge_cand = <NUM>. In this scenario, the video decoder may derivce the number of subblock based merging candidates MaxNumSubblockMergeCand as <NUM>, which may result in merge being tumed off for affine as well as for subblock-based temporal motion vector prediction (SbTMVP) regardless of the SbTMVP enabling flags. Such a scenario may be undesirable.

"AHG9: Max num of subblock merge candidate signalling," Joint Video Experts Team (JVET) of ITU-T SG <NUM> WP <NUM> and ISO/IEC JTC <NUM>/SC <NUM>/WG <NUM>, <NUM>th Meeting: by teleconference, <NUM>-<NUM> April <NUM>, JVET-R0215 (hereinafter "JVET-R0215") proposes to modify the range restriction of five _minus__max_num_subblock_merge_cand to avoid the undesired scenario described above and to infer the value of the syntax element to <NUM> when it is not present.

Specifically, JVET-R0215 proposed to modify the semantics of five_minus_max_num_subblock_merge_cand as follows:
five_minus_max_num_subblock_merge_cand specifies the maximum number of subblock-based merging motion vector prediction candidates supported in the SPS subtracted from <NUM>. The value of five_minus_max_num_subblock_merge_cand shall be in the range of <NUM> to <NUM> - sps_affine_enabled_flag, inclusive. When not present, the value of five_minus_max_num_subblock_merge_cand is inferred to be equal to <NUM>.

The techniques proposed by JVET-R0215 may solve the issue that the number of subblock based merging candidates MaxNumSubblockMergeCand is derived as <NUM> which turned off merge for affine as well as for SbTMVP regardless of the SbTMVP enabling flags. However, the technique proposed by JVET-R0215 may also disable the ability to turn off affine merge while sps_affine_enabled_flag is <NUM>. This is due to the fact that <NUM> - sps_affine_enabled_flag is <NUM> when sps_affine_enabled_flag is <NUM>. Therefore, the minimum number of subblock based merge candiates is <NUM>. Note that SbTMVP is not already available despite sps_sbtmvp_enabled_flag && ph_temporal_mvp_enable_flag being true. Thus, as long as sps_affine_enabled_flag is <NUM>, a video decoder will insert at least one affine merge candiate into the subblock based merge list. This may not be desirable.

In accordance with one or more techniques of this disclosure, a video encoder may determine the maximum number of subblock based merge candidates to be within a range constrained by a value other than the syntax element that indicates whether affine is enabled (e.g., other than sps_affine_enabled_flag). For instance, the video decoder may determine the range restriction of a maximum number of subblock based merge candidates to be constrained by the availability of SbTMVP. More specifically, the video decoder may set the lower limit of the maximum number of subblock based merge candidates equal to the maximum number of SbTMVP candidates.

According to the invention the semantics of five_minus_max_num_subblock_merge_cand in VVC is modified as follows:
five_minus_max_num_subblock_merge_cand specifies the maximum number of subblock-based merging motion vector prediction candidates supported in the SPS subtracted from <NUM>. The value of five_minus_max_num_subblock_merge_cand shall be in the range of <NUM> to <NUM> - sps_sbtmvp_enabled_flag, inclusive. When not present, the value of five_minus_max_num_subblock_merge_cand is inferred to be equal to <NUM>.

The syntax of the flag that indicates the availability of SbTMVP is as follows:
sps_sbtmvp_enabled_flag equal to <NUM> specifies that subblock-based temporal motion vector predictors may be used in decoding of pictures with all slices having slice_type not equal to I in the CLVS. sps_sbtmvp_enabled_flag equal to <NUM> specifies that subblock-based temporal motion vector predictors are not used in the CLVS. When sps_sbtmvp_enabled _flag is not present, it is inferred to be equal to <NUM>.

By determining the maximum number of subblock based merge candidates to be within a range constrained by a value other than the syntax element that indicates whether affine is enabled, the video decoder may allow for affine merge to be disabled (e.g., turned off) when affine is enabled. By allowing for affine merge to be disabled, the video decoder may avoid having to perform calculations and processing to support affine merge (e.g., inserting at least one affine merge candidate into the subblock merge list). In this way, the techniques of this disclosure enable the simplification of video compression.

In accordance with the techniques of this disclosure, a video coder (e.g., video encoder <NUM> and/or video decoder <NUM>) may code, via a video bitstream, a first syntax element specifying whether affine model based motion compensation is enabled; when affine model based motion compensation is enabled, code, via the video bitstream, a second syntax element specifying a maximum number of subblock-based merging motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value other than a value of the first syntax element; and code a picture of the video data based on the maximum number of subblock-based merging motion vector prediction candidates.

This disclosure may generally refer to "signaling" certain information, such as syntax elements. The term "signaling" may generally refer to the communication of values for syntax elements and/or other data used to decode encoded video data. That is, video encoder <NUM> may signal values for syntax elements in the bitstream. In general, signaling refers to generating a value in the bitstream. As noted above, source device <NUM> may transport the bitstream to destination device <NUM> substantially in real time, or not in real time, such as might occur when storing syntax elements to storage device <NUM> for later retrieval by destination device <NUM>.

<FIG> are conceptual diagrams illustrating an example quadtree binary tree (QTBT) structure <NUM>, and a corresponding coding tree unit (CTU) <NUM>. The solid lines represent quadtree splitting, and dotted lines indicate binary tree splitting. In each split (i.e., non-leaf) node of the binary tree, one flag is signaled to indicate which splitting type (i.e., horizontal or vertical) is used, where <NUM> indicates horizontal splitting and <NUM> indicates vertical splitting in this example. For the quadtree splitting, there is no need to indicate the splitting type, because quadtree nodes split a block horizontally and vertically into <NUM> sub-blocks with equal size. Accordingly, video encoder <NUM> may encode, and video decoder <NUM> may decode, syntax elements (such as splitting information) for a region tree level of QTBT structure <NUM> (i.e., the solid lines) and syntax elements (such as splitting information) for a prediction tree level of QTBT structure <NUM> (i.e., the dashed lines). Video encoder <NUM> may encode, and video decoder <NUM> may decode, video data, such as prediction and transform data, for CUs represented by terminal leaf nodes of QTBT structure <NUM>.

In one example of the QTBT partitioning structure, the CTU size is set as 128x128 (luma samples and two corresponding 64x64 chroma samples), the MinQTSize is set as 16x16, the MaxBTSize is set as 64x64, the MinBTSize (for both width and height) is set as <NUM>, and the MaxBTDepth is set as <NUM>. The quadtree partitioning is applied to the CTU first to generate quad-tree leaf nodes. The quadtree leaf nodes may have a size from 16x16 (i.e., the MinQTSize) to 128x128 (i.e., the CTU size). If the quadtree leaf node is 128x128, the leaf quadtree node will not be further split by the binary tree, because the size exceeds the MaxBTSize (i.e., 64x64, in this example). Otherwise, the quadtree leaf node will be further partitioned by the binary tree. Therefore, the quadtree leaf node is also the root node for the binary tree and has the binary tree depth as <NUM>. When the binary tree depth reaches MaxBTDepth (<NUM>, in this example), no further splitting is permitted. When the binary tree node has a width equal to MinBTSize (<NUM>, in this example), it implies that no further vertical splitting is permitted. Similarly, a binary tree node having a height equal to MinBTSize implies that no further horizontal splitting is permitted for that binary tree node. As noted above, leaf nodes of the binary tree are referred to as CUs, and are further processed according to prediction and transform without further partitioning.

<FIG> is a block diagram illustrating an example video encoder <NUM> that may perform the techniques of this disclosure. <FIG> is provided for purposes of explanation and should not be considered limiting of the techniques as broadly exemplified and described in this disclosure. For purposes of explanation, this disclosure describes video encoder <NUM> according to the techniques of VVC (ITU-T H. <NUM>, under development), and HEVC (ITU-T H. However, the techniques of this disclosure may be performed by video encoding devices that are configured to other video coding standards.

In the example of <FIG>, video encoder <NUM> includes video data memory <NUM>, mode selection unit <NUM>, residual generation unit <NUM>, transform processing unit <NUM>, quantization unit <NUM>, inverse quantization unit <NUM>, inverse transform processing unit <NUM>, reconstruction unit <NUM>, filter unit <NUM>, decoded picture buffer (DPB) <NUM>, and entropy encoding unit <NUM>. Any or all of video data memory <NUM>, mode selection unit <NUM>, residual generation unit <NUM>, transform processing unit <NUM>, quantization unit <NUM>, inverse quantization unit <NUM>, inverse transform processing unit <NUM>, reconstruction unit <NUM>, filter unit <NUM>, DPB <NUM>, and entropy encoding unit <NUM> may be implemented in one or more processors or in processing circuitry. For instance, the units of video encoder <NUM> may be implemented as one or more circuits or logic elements as part of hardware circuitry, or as part of a processor, ASIC, of FPGA. Moreover, video encoder <NUM> may include additional or alternative processors or processing circuitry to perform these and other functions.

The various units of <FIG> are illustrated to assist with understanding the operations performed by video encoder <NUM>. The units may be implemented as fixed-function circuits, programmable circuits, or a combination thereof. Fixed-function circuits refer to circuits that provide particular functionality, and are preset on the operations that can be performed. Programmable circuits refer to circuits that can be programmed to perform various tasks, and provide flexible functionality in the operations that can be performed. For instance, programmable circuits may execute software or firmware that cause the programmable circuits to operate in the manner defined by instructions of the software or firmware. Fixed-function circuits may execute software instructions (e.g., to receive parameters or output parameters), but the types of operations that the fixed-function circuits perform are generally immutable. In some examples, one or more of the units may be distinct circuit blocks (fixed-function or programmable), and in some examples, one or more of the units may be integrated circuits.

Video encoder <NUM> may include arithmetic logic units (ALUs), elementary function units (EFUs), digital circuits, analog circuits, and/or programmable cores, formed from programmable circuits. In examples where the operations of video encoder <NUM> are performed using software executed by the programmable circuits, memory <NUM> (<FIG>) may store the instructions (e.g., object code) of the software that video encoder <NUM> receives and executes, or another memory within video encoder <NUM> (not shown) may store such instructions.

Mode selection unit <NUM> includes a motion estimation unit <NUM>, a motion compensation unit <NUM>, and an intra-prediction unit <NUM>. Mode selection unit <NUM> may include additional functional units to perform video prediction in accordance with other prediction modes. As examples, mode selection unit <NUM> may include a palette unit, an intra-block copy unit (which may be part of motion estimation unit <NUM> and/or motion compensation unit <NUM>), an affine unit, a linear model (LM) unit, or the like.

Video encoder <NUM> may partition a picture retrieved from video data memory <NUM> into a series of CTUs, and encapsulate one or more CTUs within a slice. Mode selection unit <NUM> may partition a CTU of the picture in accordance with a tree structure, such as the QTBT structure or the quad-tree structure of HEVC described above. As described above, video encoder <NUM> may form one or more CUs from partitioning a CTU according to the tree structure. Such a CU may also be referred to generally as a "video block" or "block.

Motion estimation unit <NUM> may form one or more motion vectors (MVs) that defines the positions of the reference blocks in the reference pictures relative to the position of the current block in a current picture. Motion estimation unit <NUM> may then provide the motion vectors to motion compensation unit <NUM>. For example, for uni-directional inter-prediction, motion estimation unit <NUM> may provide a single motion vector, whereas for bi-directional inter-prediction, motion estimation unit <NUM> may provide two motion vectors. Motion compensation unit <NUM> may then generate a prediction block using the motion vectors. For example, motion compensation unit <NUM> may retrieve data of the reference block using the motion vector. As another example, if the motion vector has fractional sample precision, motion compensation unit <NUM> may interpolate values for the prediction block according to one or more interpolation filters. Moreover, for bi-directional inter-prediction, motion compensation unit <NUM> may retrieve data for two reference blocks identified by respective motion vectors and combine the retrieved data, e.g., through sample-by-sample averaging or weighted averaging.

Mode selection unit <NUM> provides the prediction block to residual generation unit <NUM>. Residual generation unit <NUM> receives a raw, unencoded version of the current block from video data memory <NUM> and the prediction block from mode selection unit <NUM>. Residual generation unit <NUM> calculates sample-by-sample differences between the current block and the prediction block. The resulting sample-by-sample differences define a residual block for the current block. In some examples, residual generation unit <NUM> may also determine differences between sample values in the residual block to generate a residual block using residual differential pulse code modulation (RDPCM). In some examples, residual generation unit <NUM> may be formed using one or more subtractor circuits that perform binary subtraction.

In examples where mode selection unit <NUM> does not further partition a CU into PUs, each CU may be associated with a luma coding block and corresponding chroma coding blocks. As above, the size of a CU may refer to the size of the luma coding block of the CU. The video encoder <NUM> and video decoder <NUM> may support CU sizes of 2Nx2N, 2NxN, or Nx2N.

For other video coding techniques such as an intra-block copy mode coding, an affine-mode coding, and linear model (LM) mode coding, as a few examples, mode selection unit <NUM>, via respective units associated with the coding techniques, generates a prediction block for the current block being encoded. In some examples, such as palette mode coding, mode selection unit <NUM> may not generate a prediction block, and instead generate syntax elements that indicate the manner in which to reconstruct the block based on a selected palette. In such modes, mode selection unit <NUM> may provide these syntax elements to entropy encoding unit <NUM> to be encoded.

Quantization unit <NUM> may quantize the transform coefficients in a transform coefficient block, to produce a quantized transform coefficient block. Quantization unit <NUM> may quantize transform coefficients of a transform coefficient block according to a quantization parameter (QP) value associated with the current block. Video encoder <NUM> (e.g., via mode selection unit <NUM>) may adjust the degree of quantization applied to the transform coefficient blocks associated with the current block by adjusting the QP value associated with the CU. Quantization may introduce loss of information, and thus, quantized transform coefficients may have lower precision than the original transform coefficients produced by transform processing unit <NUM>.

Filter unit <NUM> may perform one or more filter operations on reconstructed blocks. For example, filter unit <NUM> may perform deblocking operations to reduce blockiness artifacts along edges of CUs. Operations of filter unit <NUM> may be skipped, in some examples.

Video encoder <NUM> stores reconstructed blocks in DPB <NUM>. For instance, in examples where operations of filter unit <NUM> are not needed, reconstruction unit <NUM> may store reconstructed blocks to DPB <NUM>. In examples where operations of filter unit <NUM> are needed, filter unit <NUM> may store the filtered reconstructed blocks to DPB <NUM>. Motion estimation unit <NUM> and motion compensation unit <NUM> may retrieve a reference picture from DPB <NUM>, formed from the reconstructed (and potentially filtered) blocks, to inter-predict blocks of subsequently encoded pictures. In addition, intra-prediction unit <NUM> may use reconstructed blocks in DPB <NUM> of a current picture to intra-predict other blocks in the current picture.

In some examples, operations performed with respect to a luma coding block need not be repeated for the chroma coding blocks. As one example, operations to identify a motion vector (MV) and reference picture for a luma coding block need not be repeated for identifying an MV and reference picture for the chroma blocks. Rather, the MV for the luma coding block may be scaled to determine the MV for the chroma blocks, and the reference picture may be the same. As another example, the intra-prediction process may be the same for the luma coding block and the chroma coding blocks.

Video encoder <NUM> represents an example of a device configured to encode video data including a memory configured to store video data, and one or more processing units implemented in circuitry and configured to encode, in a video bitstream, a first syntax element specifying whether affine model based motion compensation is enabled; where/when affine model based motion compensation is enabled, encode, in the video bitstream, a second syntax element specifying a maximum number of subblock-based merging motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value other than a value of the first syntax element; and encode a picture of the video data based on the maximum number of subblock-based merging motion vector prediction candidates.

<FIG> is a block diagram illustrating an example video decoder <NUM> that may perform the techniques of this disclosure. <FIG> is provided for purposes of explanation and is not limiting on the techniques as broadly exemplified and described in this disclosure. For purposes of explanation, this disclosure describes video decoder <NUM> according to the techniques of VVC (ITU-T H. <NUM>, under development), and HEVC (ITU-T H. However, the techniques of this disclosure may be performed by video coding devices that are configured to other video coding standards.

In the example of <FIG>, video decoder <NUM> includes coded picture buffer (CPB) memory <NUM>, entropy decoding unit <NUM>, prediction processing unit <NUM>, inverse quantization unit <NUM>, inverse transform processing unit <NUM>, reconstruction unit <NUM>, filter unit <NUM>, and decoded picture buffer (DPB) <NUM>. Any or all of CPB memory <NUM>, entropy decoding unit <NUM>, prediction processing unit <NUM>, inverse quantization unit <NUM>, inverse transform processing unit <NUM>, reconstruction unit <NUM>, filter unit <NUM>, and DPB <NUM> may be implemented in one or more processors or in processing circuitry. For instance, the units of video decoder <NUM> may be implemented as one or more circuits or logic elements as part of hardware circuitry, or as part of a processor, ASIC, of FPGA. Moreover, video decoder <NUM> may include additional or alternative processors or processing circuitry to perform these and other functions.

Prediction processing unit <NUM> includes motion compensation unit <NUM> and intra-prediction unit <NUM>. Prediction processing unit <NUM> may include additional units to perform prediction in accordance with other prediction modes. As examples, prediction processing unit <NUM> may include a palette unit, an intra-block copy unit (which may form part of motion compensation unit <NUM>), an affine unit, a linear model (LM) unit, or the like. In other examples, video decoder <NUM> may include more, fewer, or different functional components.

CPB memory <NUM> may store video data, such as an encoded video bitstream, to be decoded by the components of video decoder <NUM>. The video data stored in CPB memory <NUM> may be obtained, for example, from computer-readable medium <NUM> (<FIG>). CPB memory <NUM> may include a CPB that stores encoded video data (e.g., syntax elements) from an encoded video bitstream. Also, CPB memory <NUM> may store video data other than syntax elements of a coded picture, such as temporary data representing outputs from the various units of video decoder <NUM>. DPB <NUM> generally stores decoded pictures, which video decoder <NUM> may output and/or use as reference video data when decoding subsequent data or pictures of the encoded video bitstream. CPB memory <NUM> and DPB <NUM> may be formed by any of a variety of memory devices, such as DRAM, including SDRAM, MRAM, RRAM, or other types of memory devices. CPB memory <NUM> and DPB <NUM> may be provided by the same memory device or separate memory devices. In various examples, CPB memory <NUM> may be on-chip with other components of video decoder <NUM>, or off-chip relative to those components.

Additionally or alternatively, in some examples, video decoder <NUM> may retrieve coded video data from memory <NUM> (<FIG>). That is, memory <NUM> may store data as discussed above with CPB memory <NUM>. Likewise, memory <NUM> may store instructions to be executed by video decoder <NUM>, when some or all of the functionality of video decoder <NUM> is implemented in software to be executed by processing circuitry of video decoder <NUM>.

The various units shown in <FIG> are illustrated to assist with understanding the operations performed by video decoder <NUM>. The units may be implemented as fixed-function circuits, programmable circuits, or a combination thereof. Similar to <FIG>, fixed-function circuits refer to circuits that provide particular functionality, and are preset on the operations that can be performed. Programmable circuits refer to circuits that can be programmed to perform various tasks, and provide flexible functionality in the operations that can be performed. For instance, programmable circuits may execute software or firmware that cause the programmable circuits to operate in the manner defined by instructions of the software or firmware. Fixed-function circuits may execute software instructions (e.g., to receive parameters or output parameters), but the types of operations that the fixed-function circuits perform are generally immutable. In some examples, one or more of the units may be distinct circuit blocks (fixed-function or programmable), and in some examples, one or more of the units may be integrated circuits.

After inverse quantization unit <NUM> forms the transform coefficient block, inverse transform processing unit <NUM> may apply one or more inverse transforms to the transform coefficient block to generate a residual block associated with the current block. For example, inverse transform processing unit <NUM> may apply an inverse DCT, an inverse integer transform, an inverse Karhunen-Loeve transform (KLT), an inverse rotational transform, an inverse directional transform, or another inverse transform to the transform coefficient block.

Filter unit <NUM> may perform one or more filter operations on reconstructed blocks. For example, filter unit <NUM> may perform deblocking operations to reduce blockiness artifacts along edges of the reconstructed blocks. Operations of filter unit <NUM> are not necessarily performed in all examples.

Video decoder <NUM> may store the reconstructed blocks in DPB <NUM>. For instance, in examples where operations of filter unit <NUM> are not performed, reconstruction unit <NUM> may store reconstructed blocks to DPB <NUM>. In examples where operations of filter unit <NUM> are performed, filter unit <NUM> may store the filtered reconstructed blocks to DPB <NUM>. As discussed above, DPB <NUM> may provide reference information, such as samples of a current picture for intra-prediction and previously decoded pictures for subsequent motion compensation, to prediction processing unit <NUM>. Moreover, video decoder <NUM> may output decoded pictures (e.g., decoded video) from DPB <NUM> for subsequent presentation on a display device, such as display device <NUM> of <FIG>.

In this manner, video decoder <NUM> represents an example of a video decoding device including a memory configured to store video data, and one or more processing units implemented in circuitry and configured to decode, from a video bitstream, a first syntax element specifying whether affine model based motion compensation is enabled; where/when affine model based motion compensation is enabled, decode, from the video bitstream, a second syntax element specifying a maximum number of subblock-based merging motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value other than a value of the first syntax element; and decode a picture of the video data based on the maximum number of subblock-based merging motion vector prediction candidates.

<FIG> is a flowchart illustrating an example method for encoding a current block. The current block may comprise a current CU. Although described with respect to video encoder <NUM> (<FIG> and <FIG>), it should be understood that other devices may be configured to perform a method similar to that of <FIG>.

In this example, video encoder <NUM> initially predicts the current block (<NUM>). For example, video encoder <NUM> may form a prediction block for the current block. Video encoder <NUM> may then calculate a residual block for the current block (<NUM>). To calculate the residual block, video encoder <NUM> may calculate a difference between the original, unencoded block and the prediction block for the current block. Video encoder <NUM> may then transform the residual block and quantize transform coefficients of the residual block (<NUM>). Next, video encoder <NUM> may scan the quantized transform coefficients of the residual block (<NUM>). During the scan, or following the scan, video encoder <NUM> may entropy encode the transform coefficients (<NUM>). For example, video encoder <NUM> may encode the transform coefficients using CAVLC or CABAC. Video encoder <NUM> may then output the entropy encoded data of the block (<NUM>).

<FIG> is a flowchart illustrating an example method for decoding a current block of video data. The current block may comprise a current CU. Although described with respect to video decoder <NUM> (<FIG> and <FIG>), it should be understood that other devices may be configured to perform a method similar to that of <FIG>.

Video decoder <NUM> may receive entropy encoded data for the current block, such as entropy encoded prediction information and entropy encoded data for transform coefficients of a residual block corresponding to the current block (<NUM>). Video decoder <NUM> may entropy decode the entropy encoded data to determine prediction information for the current block and to reproduce transform coefficients of the residual block (<NUM>). Video decoder <NUM> may predict the current block (<NUM>), e.g., using an intra- or inter-prediction mode as indicated by the prediction information for the current block, to calculate a prediction block for the current block. Video decoder <NUM> may then inverse scan the reproduced transform coefficients (<NUM>), to create a block of quantized transform coefficients. Video decoder <NUM> may then inverse quantize the transform coefficients and apply an inverse transform to the transform coefficients to produce a residual block (<NUM>). Video decoder <NUM> may ultimately decode the current block by combining the prediction block and the residual block (<NUM>).

<FIG> is a flowchart illustrating an example technique for encoding a maximum number of subblock based merging motion vector prediction candidates, in accordance with one or more techniques of this disclosure. Although described with respect to video encoder <NUM> (<FIG> and <FIG>), it should be understood that other devices may be configured to perform a method similar to that of <FIG>.

Video encoder <NUM> may encode a first syntax element specifying whether affine model based motion compensation is enabled (<NUM>). For instance, mode selection unit <NUM> may cause entropy encoding unit <NUM> to encode, in a video bitstream, a first syntax element specifying whether affine model based motion compensation is enabled (e.g., sps_affine_enabled_flag).

Based on affine model based motion compensation being enabled ("Yes" branch of <NUM>), video encoder <NUM> may encode a second syntax element specifying a maximum number of subblock-based merging motion vector prediction candidates (<NUM>). For instance, mode selection unit <NUM> may cause entropy encoding unit <NUM> to encode, in a video bitstream, a second syntax element specifying a maximum number of subblock-based merging motion vector prediction candidates (e.g., five_minus_max_num_subblock_merge_cand). As discussed above and in accordance with one or more techniques of this disclosure, video encoder <NUM> may constrain a value of the second syntax element based on a value other than a value of the first syntax element. For example, video encoder <NUM> may signal a third syntax element that specifies whether subblock-based temporal motion vector predictors (SbTMVP) may be used in decoding of pictures of video data (e.g., sps_sbtmvp_enabled_flag) and constrain the value of the second syntax element based on a value of the third syntax element. As one example, video encoder <NUM> may constrain the value of the second element such that a maximum value of the second syntax element is five minus the value of the third syntax element. As another example, video encoder <NUM> may constrain the value of the second element such that a minimum value of the second syntax element is zero. Therefore, in some examples, video encoder <NUM> may constrain the value of five_minus_max_num_subblock_merge_cand to be in the range of <NUM> to <NUM> - sps_sbtmvp_enabled _flag, inclusive.

Video encoder <NUM> may encode a picture of the video data (<NUM>). For instance, mode select unit <NUM> may encode the picture of video data based on the maximum number of subblock-based merging motion vector prediction candidates.

Instructions may be executed by one or more processors, such as one or more digital signal processors (DSPs), general purpose microprocessors, application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), or other equivalent integrated or discrete logic circuitry. Accordingly, the terms "processor" and "processing circuitry," as used herein may refer to any of the foregoing structures or any other structure suitable for implementation of the techniques described herein.

Claim 1:
A method of encoding video data, the method comprising:
encoding (<NUM>), in a video bitstream, a first syntax element specifying whether affine model based motion compensation is enabled;
based on affine model based motion compensation being enabled (<NUM>), encoding (<NUM>), in the video bitstream, a second syntax element specifying a maximum number of subblock-based merging motion vector prediction candidates, wherein a value of the second syntax element is constrained ; and
encoding (<NUM>) a picture of the video data based on the maximum number of subblock-based merging motion vector prediction candidates;
characterized in that
the value of the second syntax element is constrained based on the value of a third syntax element that specifies whether subblock-based temporal motion vector predictors may be used in decoding of pictures of video data such that a maximum value of the second syntax element is five minus the value of the third syntax element.