Patent Description:
There is known an HILS (Hardware In the Loop Simulation) using a processor including an FPGA (Field Programmable Gate Array) or a real time OS. In the HILS, some operations of a simulation target can be calculated using the processor including the FPGA or the real time OS.

In a method of simulating the operation of an electric circuit by an FPGA, for example, after the operation of the electric circuit in a case in which the constant of a certain circuit element is a first value is simulated, the operation of the electric circuit in a case in which the constant is a second value different from the first value should be simulated in some cases. In this case, it is necessary to program the FPGA to simulate the operation of the electric circuit in the case in which the constant is the first value and execute the simulation, and after that, reprogram the FPGA to simulate the operation of the electric circuit in the case in which the constant is the second value. In this case, however, it is necessary to generate data to be incorporated in the FPGA every time the constant is changed and incorporate it in the FPGA, and this leads to a delay of verification works for verification targets including the electric circuit. Such a problem also occurs when executing a simulation using the processor including the real time OS.

The present invention has been made in consideration of the above-described problem, and has as its object to provide a technique advantageous in improving the efficiency of a verification work.

According to the first aspect of the present invention, there is provided an information processing apparatus according to claim <NUM> comprising a conversion unit configured to convert circuit configuration data representing a configuration of an electric circuit including an input terminal group and an output terminal group into circuit calculation data including an equation group that generates an output signal group corresponding to an argument group given to a variable group and an input signal group given to the input terminal group, wherein the argument group includes a constant representing a characteristic of a circuit element that forms the electric circuit.

According to a second aspect of the present invention, there is provided a simulation method according to claim <NUM> comprising a conversion step of converting circuit configuration data representing a configuration of an electric circuit including an input terminal group and an output terminal group into circuit calculation data including an equation group that generates an output signal group corresponding to an argument group given to a variable group and an input signal group given to the input terminal group, an incorporating step of incorporating the circuit calculation data in a processor, and a simulation execution step of giving the argument group to a processor incorporating the circuit calculation data and operate the processor, wherein the argument group includes a constant representing a characteristic of a circuit element that forms the electric circuit.

According to the present invention, it is possible to provide a technique advantageous in improving the efficiency of a verification work.

It should be noted that the following embodiments are not intended to limit the scope of the appended claims, and that not all the combinations of features described in the embodiments are necessarily essential to the present invention. Of a plurality of features described in the embodiments, two or more features may arbitrarily be combined. In addition, the same reference numerals denote the same or similar parts, and a repetitive description will be omitted.

<FIG> and <FIG> exemplarily show a simulation system <NUM> and a simulation method according to an embodiment of the present invention. The simulation system <NUM> can include, for example, an information processing apparatus <NUM>, a processor <NUM>, and a simulation execution apparatus <NUM>. The simulation execution apparatus <NUM> may be incorporated in the information processing apparatus <NUM> as a module like a simulation execution unit. The information processing apparatus <NUM> may have a design function (CAD function) for designing an electric circuit EC. Such a design function can be provided by installing a CAD program in the information processing apparatus <NUM>. The electric circuit EC includes an input terminal group and an output terminal group. An output signal group corresponding to an input signal group given to the input terminal group can be output from the output terminal group.

The information processing apparatus <NUM> can have a function of converting circuit configuration data <NUM> representing the configuration of the electric circuit EC into circuit calculation data <NUM> including an equation group that generates an output signal group corresponding to an argument group given to a variable group and an input signal group given to the input terminal group of the electric circuit EC. The argument group can include constants (numerical values) representing the characteristics of the circuit elements (for example, a resistor, a capacitor, an inductor, a transistor, an LSI, and the like) that form the electric circuit EC. The argument group can include a value concerning a temperature. In this case, the constants can include the temperature coefficients of the circuit elements. The argument group may include a value concerning noise applied to the electric circuit EC.

The circuit calculation data <NUM> can be incorporated in the processor <NUM> by the information processing apparatus <NUM> or another apparatus. In the processor <NUM> incorporating the circuit calculation data <NUM>, a virtual electric circuit corresponding to the electric circuit EC is constructed. The processor <NUM> can be, for example, a processor including a real time OS. In this case, the circuit calculation data <NUM> generated by the information processing apparatus <NUM> is data in a format that can be incorporated in the processor <NUM> including the real time OS or data that can be converted into the format. The processor including the real time OS can generate, for example, an output signal corresponding to a given input signal in a very short time (for example, several microseconds to several hundred microseconds). The processor <NUM> may be, for example, a processor including an FPGA. In this case, the circuit calculation data <NUM> is data in a format that can be incorporated in the FPGA (that can program the FPGA) or data that can be converted into the format.

The simulation execution apparatus <NUM> can be an information processing apparatus that gives an argument group (numerical values) to the variable group of the processor <NUM> incorporating the circuit calculation data <NUM> (the variable group of the circuit calculation data <NUM> incorporated in the processor <NUM>) and operates the processor <NUM>. The simulation execution apparatus <NUM> can be formed by installing, in a computer including a processor, a memory, and the like, a program configured to cause the computer to operate as the simulation execution apparatus <NUM>. The argument group that the simulation execution apparatus <NUM> gives to the processor <NUM> is the argument group given to the variable group of the circuit calculation data <NUM>. The argument group can include constants (numerical values) representing the characteristics of the circuit elements (for example, a resistor, a capacitor, an inductor, a transistor, an LSI, and the like) that form the electric circuit EC. The argument group can include a value concerning a temperature. In this case, the constants can include the temperature coefficients of the circuit elements. The argument group can include a value concerning noise applied to the electric circuit EC.

In a verification work for verifying the operations of apparatuses <NUM> and <NUM> connected to the electric circuit EC, a verification work for verifying the operation of the electric circuit EC, or a verification work for verifying the operations of the electric circuit EC and the apparatuses <NUM> and <NUM> connected to that, the simulation execution apparatus <NUM> gives the argument group to the processor <NUM> incorporating the circuit calculation data <NUM> and operates the processor <NUM>. At this time, a signal group can be supplied from the apparatus <NUM> to the processor <NUM>, and a signal group can be supplied from the processor <NUM> to the apparatus <NUM>. Alternatively, a signal group may be supplied from the apparatus <NUM> to the processor <NUM>, and a signal group may be supplied from the processor <NUM> to the apparatus <NUM>. A signal group may be supplied from the apparatus <NUM> to the processor <NUM>, and a signal group may be supplied from the processor <NUM> to the apparatus <NUM>. The simulation execution apparatus <NUM> may receive a signal group from the processor <NUM>.

The circuit calculation data <NUM> may be transferred from the information processing apparatus <NUM> to the simulation execution apparatus <NUM>, and incorporated in the processor <NUM> by the simulation execution apparatus <NUM>. In addition, some or all of the above-described argument group (for example, the constants representing the characteristics of the circuit elements that form the electric circuit EC and the values concerning temperatures) may be transferred from the information processing apparatus <NUM> to the simulation execution apparatus <NUM>, and upon receiving these, the simulation execution apparatus <NUM> may give the argument group to the processor <NUM>.

<FIG> shows an example of the configuration of the information processing apparatus <NUM>. The information processing apparatus <NUM> can be formed by installing a program <NUM> in a computer. The program <NUM> can be, for example, stored in a memory medium and provided to the computer in that form. Alternatively, the program <NUM> can be provided to the computer via a communication channel.

The information processing apparatus <NUM> can include, for example, a CPU (processor) <NUM>, an input device <NUM>, an output device <NUM>, a communication device <NUM>, and a memory <NUM>. The input device <NUM> can include, for example, a keyboard, a pointing device, and the like. The output device <NUM> can include, for example, a display. The communication device <NUM> can include, for example, any device configured to communicate with another apparatus. The memory <NUM> can include one or a plurality of memory devices. The plurality of memory devices can include, for example, a volatile memory device and a nonvolatile memory device. The concept of the nonvolatile memory device can include an electrically writable and erasable semiconductor memory device, a disk memory, a semiconductor memory device backed up by a battery, and the like.

The program <NUM> can include, for example, a program module that causes the information processing apparatus <NUM> to operate as an apparatus including the conversion unit <NUM>. The conversion unit <NUM> converts circuit configuration data representing the configuration of the electric circuit EC into the circuit calculation data <NUM> including an equation group that generates an output signal group corresponding to an argument group given to a variable group and an input signal group given to the input terminal group of the electric circuit EC. The program <NUM> may include a program module that causes the information processing apparatus <NUM> to operate as an apparatus including an application node setting unit <NUM> that sets a node (to be referred to as a noise application node hereinafter) in the electric circuit EC, to which noise is applied. The program <NUM> may include a program module that causes the information processing apparatus <NUM> to operate as an apparatus including an observation node setting unit <NUM> that sets an observation node in the electric circuit EC. The conversion unit <NUM> can generate the circuit calculation data <NUM> such that the output signal group includes an output signal representing the electrical value of the observation node. Also, as described above, the simulation execution apparatus <NUM> may be incorporated in the information processing apparatus <NUM>. In this case, the program <NUM> can include a program module that causes the information processing apparatus <NUM> to operate as an apparatus that forms a simulation execution unit <NUM> corresponding to the simulation execution apparatus <NUM>.

<FIG> shows an example of the operation of the information processing apparatus <NUM>. An example in which the circuit configuration data <NUM> representing the configuration of the electric circuit EC shown in <FIG> is converted into the circuit calculation data <NUM> will be described here. Step S300 can arbitrarily be executed. In step S300, the application node setting unit <NUM> can set a noise application node in the electric circuit EC in accordance with the operation of the input device <NUM> by the user. <FIG> shows an example in which a node that connects a resistor R and an inductor L is set as a noise application node. In step S300, the observation node setting unit <NUM> may set an observation node in the electric circuit EC in accordance with the operation of the input device <NUM> by the user. <FIG> shows an example in which a node that connects the resistor R and the inductor L is set as an observation node Nm1. In the examples shown in <FIG>, a voltage source Vn serving as a noise source is connected to the noise application node. A current source serving as a noise source may be added to the noise application node. The addition of the current source serving as a noise source can be done such that a current supplied by the current source flows to the noise application node.

In step S301, the conversion unit <NUM> can convert the circuit elements that form the electric circuit EC into circuit element models (equivalent circuit models) in accordance with a preset conversion rule. Here, <FIG> show conversion rules for converting the resistor R, a capacitor C, and the inductor L into circuit element models, respectively. By this conversion, for example, the electric circuit EC shown in <FIG> can be converted into an electric circuit EC' shown in <FIG>. The electric circuit EC' is an equivalent circuit of the electric circuit EC.

In step S302, the conversion unit <NUM> can construct an equation of a matrix representation from the circuit configuration data <NUM> representing the configuration of the electric circuit EC in accordance with, for example, modified nodal analysis (MNA) or the like. <FIG> shows a model of an equation of a matrix representation that can be constructed in step S302. A matrix including G<NUM> to Gnn as elements is a conductance matrix. Note that the value of a conductance is the reciprocal of the value of a resistor. A conductance matrix G corresponds to the resistor R (the reciprocal of the value of R), and a conductance matrix GL corresponds to a resistor RL (the reciprocal of the value of RL). x<NUM> to xn are variable vectors, and can be the voltage values of nodes N<NUM> to Nn (for example, N<NUM>, N<NUM>, N<NUM>, and N<NUM>) or the current values (for example, Ivin and IVL) of voltage sources (for example, Vin and VL). A<NUM> to An are input vectors, and can be a voltage source (for example, Vin or VL) or a current source (for example, Ic). Here, the nodes N<NUM> to Nn can be decided as shown in <FIG>, and the elements of the conductance matrix and the elements of the input vectors can be decided for each circuit element in accordance with a stamp rule shown in <FIG>. The constant of each circuit element is handled not as a specific numerical value but as a variable, and the elements of the conductance matrix are the variables. In this way, the equation of the matrix representation shown in <FIG> can be constructed.

In step S303, the conversion unit <NUM> can manipulate the equation of the matrix representation constructed in step S302 as shown in <FIG>. For this manipulation, for example, Gaussian elimination can be applied. That is, when a matrix that connects a conductance matrix and input vectors is created, and manipulation is performed such that the conductance matrix changes to a unit matrix, thereby obtaining an equation used to calculate the value of an electrical signal to be obtained. <FIG> shows the result of the matrix manipulation.

In step S304, the conversion unit <NUM> extracts, from the equation obtained in step S303, equations to be incorporated in the processor <NUM>. The extraction target equations can include an equation for giving the value of an electrical signal that appears in the observation node set by the observation node setting unit <NUM> in step S300, in addition to an equation for giving the value of an electrical signal that appears in the output terminal of the electric circuit EC. <FIG> shows equations that can be extracted in step S304.

If a noise application node is set by the application node setting unit <NUM> in step S300, an equation for calculating the value of the electrical signal of the noise application node can also be extracted in step S306. Accordingly, an input terminal configured to apply noise to the noise application node is added to the circuit calculation data <NUM> to be generated. This allows the simulation execution apparatus <NUM> to, in a verification operation, apply noise to the noise application node in the virtual electric circuit constructed in the processor <NUM>.

In step S304, to enable a simulation of the electric circuit EC depending on a temperature, an equation for giving a value depending on the temperature to a variable for setting the constant of a circuit element may be constructed. For example, R = R' (<NUM> + dT × krl) can be constructed concerning the variable R representing the resistance value of the resistor R, C = C' (<NUM> + dT × kcl) can be constructed concerning the variable C representing the capacitance value of the capacitor C, and L = L' (<NUM> + dT × kl1) can be constructed concerning the variable L representing the inductance value of the inductor L. Here, R' is a variable representing the resistance value of the resistor R at a reference temperature T, dT is a variable representing the difference (T - T') between the reference temperature T and a temperature T' to execute the simulation, and kr1, kc1, and Kl1 are variables representing temperature coefficients. R', C', L', kr1, kc1, and Kl1 allow the simulation execution apparatus <NUM> to give information concerning the temperature to the processor <NUM> in a verification work. In step S304, an equation for obtaining a current Ic flowing to the capacitor C from a potential difference Vc across the resistor Rc converted from the capacitor C, for example, Ic = GCVc or the like may be constructed.

In step S306, the conversion unit <NUM> generates the circuit calculation data <NUM> including an equation group including the equations extracted in step S304 and the equations constructed in step S305. The equation group of the circuit calculation data <NUM> is a function group including, as variable groups, a first variable group to which the constants of the circuit elements or the like are given as an argument group, and a second variable group to which an input signal group to be given to the input signal group is given as an argument group. That is, the equation group of the circuit calculation data <NUM> provides, as return values, function values according to the argument group given to the variable group. In step S307, the circuit calculation data <NUM> generated by the conversion unit <NUM> in step S306 can be output from the information processing apparatus <NUM> to, for example, the processor <NUM>, the simulation execution apparatus <NUM>, or another apparatus. For example, the information processing apparatus <NUM> can operate such that the circuit calculation data <NUM> is incorporated in the processor <NUM>. Alternatively, the simulation execution apparatus <NUM> or another apparatus, which has received the circuit calculation data <NUM> from the information processing apparatus <NUM>, can operate such that the circuit calculation data <NUM> is incorporated in the processor <NUM>.

The equation group of the circuit calculation data <NUM> generates an output signal group corresponding to the argument group given to the variable group and the input signal group given to the input terminal group. The argument group can include the constants (for example, R', C', and L') representing the characteristics of the circuit elements that form the electric circuit EC, values (for example, T and T') concerning temperatures, and the temperature coefficients (for example, kr1, kc1, and Kl1) of the circuit elements. The values of the argument group are supplied to the processor <NUM> by the simulation execution apparatus <NUM> in a verification work. Hence, for example, when executing a verification work while changing the values of the constants (for example, R', C', and L') representing the characteristics of the circuit elements that form the electric circuit EC, it is unnecessary to generate the circuit calculation data <NUM> for each value and incorporate it in the processor <NUM>. Changing the argument group (numerical values) to be given to the processor <NUM> by the simulation execution apparatus <NUM> suffices.

<FIG> shows the execution procedure of a simulation method in the simulation system <NUM>. Steps S1601, S1602, and S1603 are executed by the information processing apparatus <NUM>, and steps S1601 and S1602 correspond to step S300 in <FIG>. Step S1603 (conversion step) corresponds to steps S301 to S306 in <FIG>. Step S1604 (incorporation step) corresponds to step S307 in <FIG>.

Steps S1605, S1606, and S1607 can be controlled by the simulation execution apparatus <NUM>. In step S1605, the simulation execution apparatus <NUM> gives the argument group to the variable group of the circuit calculation data <NUM> incorporated in the processor <NUM>. In step S1606, the simulation execution apparatus <NUM> operates the processor <NUM> and executes a simulation. At this time, a signal group can be supplied from the apparatus <NUM> to the processor <NUM> (virtual terminals constructed in correspondence with the input terminals of the electric circuit EC), and a signal group can be supplied from the processor <NUM> (virtual terminals constructed in correspondence with the output terminals of the electric circuit EC) to the apparatus <NUM>. Alternatively, a signal group may be supplied from the apparatus <NUM> to the processor <NUM>, and a signal group may be supplied from the processor <NUM> to the apparatus <NUM>. A signal group may be supplied from the apparatus <NUM> to the processor <NUM>, and a signal group may be supplied from the processor <NUM> to the apparatus <NUM>. The simulation execution apparatus <NUM> may receive a signal group from the processor <NUM>.

In step S1605, the simulation execution apparatus <NUM> can give arbitrary noise to the noise application node in the virtual electric circuit corresponding to the electric circuit EC and constructed by the processor <NUM>. Also, in step S1605, the electrical signal of the observation node can be observed.

In step S1607, the simulation execution apparatus <NUM> determines whether to change at least one of the argument groups and re-execute the simulation. To re-execute the simulation, the process returns to step S <NUM> to reset the argument group to be given to the variable group of the circuit calculation data <NUM> incorporated in the processor <NUM> and re-execute step S1606. In the repeat of processing including steps S1605 and S1606, the circuit calculation data <NUM> need not newly be incorporated in the processor <NUM>.

Explaining in another viewpoint, the simulation execution apparatus <NUM> can execute a second operation after a first operation to be described below is executed. In the first operation, the simulation execution apparatus <NUM> gives a first argument group to the variable group of the circuit calculation data <NUM> incorporated in the processor <NUM>, and causes the processor <NUM> to generate a first output signal group corresponding to the first argument group and the input signal group from the apparatus <NUM>. In the second operation, the simulation execution apparatus <NUM> gives a second argument group different from the first argument group to the variable group of the circuit calculation data <NUM> incorporated in the processor <NUM>, and causes the processor <NUM> to generate a second output signal group corresponding to the second argument group and the input signal group from the apparatus <NUM>. Here, between the first operation and the second operation, the circuit calculation data <NUM> is not newly incorporated in the processor <NUM>.

As described above, according to this embodiment, it is possible to incorporate, in the processor <NUM>, the circuit calculation data <NUM> that can set an argument group including constants representing the characteristics of circuit elements, and the like from the outside (simulation execution apparatus <NUM>) and execute a simulation while freely changing the argument group. Hence, according to this embodiment, it is possible to largely shorten the time needed for a verification work.

The invention is not limited to the above-described embodiment, and various modifications and changes can be made within the scope of the gist of the invention.

Claim 1:
An information processing apparatus comprising
an input device;
an application node setting unit configured to set, in an electric circuit including an input terminal group and an output terminal group, a node which is designated in accordance with operation of the input device by a user, as a noise application node to which a noise is applied;
a conversion unit configured to convert circuit configuration data representing a configuration of the electric circuit into circuit calculation data including an equation group that generates an output signal group corresponding to an argument group given to a variable group and an input signal group given to the input terminal group,
wherein the conversion unit adds, to the circuit calculation data, a noise input terminal for giving the noise to the noise application node,
wherein the argument group includes a constant representing a characteristic of a circuit element that forms the electric circuit, and a value concerning the noise applied to the noise application node, and
wherein the circuit calculation data includes an equation for calculating a value of an electrical signal of the noise application node; and
a simulation execution unit configured to incorporate the circuit calculation data in a processor, give the argument group to the processor, and operate the processor.