Patent Description:
<CIT> (hereinafter PTL1) discloses the following solid-state image sensor.

A semiconductor substrate is provided with an image-capturing region including a photoelectric conversion unit and a signal scan circuit unit and having unit pixels arranged in a matrix. The image-capturing region includes an field isolation insulating film that is provided to correspond to a boundary portion between adjacent unit pixels and surround each unit pixel; a MOSFET provided on a front surface of the semiconductor substrate and in a region below the field isolation insulating film; and a first diffusion layer having a first conductive type provided in a region in the vicinity of the field isolation insulating film in the semiconductor substrate. The field isolation insulating film is provided in the semiconductor substrate at an offset from the front surface of the semiconductor substrate on which the signal scan circuit unit is formed, and reaches a back surface of the semiconductor substrate. The MOSFET includes a gate electrode and a second diffusion layer having the first conductive type formed in the semiconductor substrate and above the gate electrode. The first diffusion layer and the second diffusion layer contact each other. In a vertical direction of the semiconductor substrate, the center of the width of the first diffusion layer along a first direction orthogonal to the vertical direction is located in the vicinity of the center of the width of the second diffusion layer along the first direction.

Each of <CIT>, <CIT>, <CIT>, <CIT>, <CIT> and <CIT> forms part of the state of the art relative to the present disclosure.

However, in high speed readout (e.g., <NUM> to <NUM> frames/sec) required in recent years, exposure time reduces. Therefore, the amount of electric charge generated by photoelectric conversion decreases, which lead to a deterioration in the sensitivity.

According to the first aspect of the present invention, there is provided an image sensor as recited in claim <NUM>.

According to the second aspect of the present invention, there is provided an image-capturing device as recited in claim <NUM> below.

The dependent claims are directed to particular embodiments of each respective aspect.

<FIG> is a view illustrating a schematic configuration of a solid-state image sensor <NUM> according to a first embodiment not forming part of the claimed invention.

The solid-state image sensor <NUM> includes an image-capturing unit <NUM> having pixels <NUM> arranged on a light receiving surface. The pixels <NUM> are supplied with drive pulses from a vertical scan circuit <NUM> via vertical control lines <NUM>. Further, the pixels <NUM> are connected to vertical signal lines <NUM> on a column basis. The vertical signal lines <NUM> are connected to a pixel current source <NUM>.

Furthermore, noise outputs and signal outputs that are time-divisionally outputted from the pixels <NUM> to the vertical signal lines <NUM> are sequentially inputted to a CDS circuit (a correlated double sampling circuit) <NUM> via column amplifiers <NUM>. The CDS circuit <NUM> calculates a difference between both outputs to generate a true signal output. This true signal output is horizontally scanned by a drive signal from a horizontal scan circuit <NUM> and sequentially outputted to a horizontal signal line <NUM>. A signal output of the horizontal signal line <NUM> is outputted to an output terminal <NUM> via an output amplifier <NUM>.

<FIG> is a view illustrating an equivalent circuit of the pixel <NUM> described above. The pixel <NUM> is provided with a photodiode (PD) <NUM>. The PD <NUM> is connected to a floating diffusion (FD) <NUM> via a transfer transistor (TG: hereinafter also referred to as a transfer gate) <NUM> which is gate-controlled by a transfer drive signal (a transfer gate voltage). The FD <NUM> is connected to a gate electrode of an amplification transistor (AMP) <NUM>. The FD <NUM> is also connected to a reference potential Vdd via a reset transistor (RST: hereinafter also referred to as a reset gate) <NUM> which is gate-controlled by a reset drive signal (a reset gate voltage). The amplification transistor <NUM> has a drain connected to the potential Vdd and a source connected to the vertical signal line <NUM> via a selection transistor (SEL: hereinafter also referred to as a selection gate) <NUM> which is gate-controlled by a selection drive signal (a selection gate voltage).

The transfer gate voltage of the transfer transistor <NUM> is supplied via a transfer wiring <NUM>. The reset gate voltage of the reset transistor <NUM> is supplied via a reset wiring <NUM>. The selection gate voltage of the selection transistor <NUM> is supplied via a selection wiring <NUM>. The transfer wiring <NUM>, the reset wiring <NUM>, and the selection wiring <NUM> are formed in a wiring region (a wiring layer) <NUM> in the substrate having the PD <NUM> and the FD <NUM> formed thereon.

Other parts of the configuration are the same as those in <FIG> and repetitive description thereof will thus be omitted herein.

In the first embodiment, a top gate electrode of the amplification transistor <NUM> is connected to a potential of the FD <NUM> and a back gate electrode thereof is connected to a GND potential. The same also applies to fourth and fifth embodiments described hereinafter. In a second embodiment described hereinafter (see <FIG>), the top gate electrode of the amplification transistor <NUM> is connected to a predetermined potential and the back gate electrode thereof is connected to the potential of the FD <NUM>. In a third embodiment described hereinafter (see <FIG>), both the top gate electrode and the back gate electrode of the amplification transistor <NUM> are connected to the potential of the FD <NUM>.

<FIG> is a cross-sectional view illustrating a part of an element structure of the pixel <NUM>. Incident light enters from above in <FIG>.

The solid-state image sensor <NUM> is formed on a semiconductor substrate <NUM>. The semiconductor substrate <NUM> is a monolithic semiconductor substrate. The semiconductor substrate <NUM> is composed of generally three layers laminated from top (a light receiving surface side) to bottom (a wiring region side) in <FIG>. An oxide film <NUM> is formed as the uppermost layer, a wiring region <NUM> is formed as the lowermost layer, and a diffusion region <NUM> is formed between the oxide film <NUM> and the wiring region <NUM>. The diffusion region <NUM> is also referred to as a semiconductor region. The wiring region <NUM> is formed by oxide layer except for wiring portion. It should be noted that the oxide film and the oxide layer are a film and a layer mainly composed of a region formed by oxidizing the semiconductor substrate.

The semiconductor region (the diffusion region) <NUM> of the semiconductor substrate <NUM> is provided with vertically elongated PDs <NUM> that extend in a thickness direction (a light incident direction) of the substrate and signal readout circuits <NUM> that are disposed in an in-plane direction of the substrate. The semiconductor region <NUM> has a base region <NUM> and a protruding region 202T extending from the base region <NUM> to the side of the light receiving surface onto which light enters. The PDs <NUM> are formed in the protruding region 202T, and the signal readout circuits <NUM> are formed in the base region <NUM>. The PDs <NUM> and the signal readout circuits <NUM> are formed by selectively implanting a p-type impurity and an n-type impurity into predetermined portions of a p-type region at an appropriate concentration.

The semiconductor region <NUM> is provided with the PDs <NUM> converting incident light into electric charges by photoelectric conversion and the signal readout circuits <NUM> for outputting the electric charges photoelectric converted by the PDs <NUM> as pixel signals to the vertical signal lines <NUM>.

The signal readout circuit <NUM> formed in the semiconductor region <NUM> includes the transfer transistor <NUM> which transfers the electric charge of the PD <NUM> to the FD <NUM>; the FD <NUM> which accumulates the transferred electric charge and converts it into a voltage; the amplification transistor <NUM> which amplifies the output voltage of the FD <NUM>; the selection transistor <NUM> which selects a pixel; and the reset transistor <NUM> which resets the FD <NUM>.

The transfer transistor <NUM> transfers the electric charge generated in the PD <NUM> to the FD <NUM> when a gate voltage is applied to a gate electrode <NUM>.

The FD <NUM> is a capacitor that accumulates the electric charge transferred from the transfer transistor <NUM> and converts it into voltage. The electric charge generated in the PD <NUM> by photoelectric conversion is converted into voltage by the capacitor of the FD <NUM>, and the voltage serves as the gate voltage of the amplification transistor <NUM>. Since a pixel signal of the pixel <NUM> is based on a value obtained by dividing the electric charge Q generated in the PD <NUM> by the capacitance C of the FD <NUM>, an reduction in the capacitance of the FD <NUM> contributes to an improvement in the sensitivity of the image sensor.

The amplification transistor <NUM> amplifies the voltage of the FD <NUM> applied to the gate electrode <NUM>. The voltage amplified by the amplification transistor <NUM> is outputted as the pixel signal from the selection transistor <NUM>.

The reset transistor <NUM> discharges the electric charge accumulated in the FD <NUM> and resets the FD <NUM> to the reference potential Vdd, when the gate voltage is applied to a gate electrode <NUM>.

The wiring region <NUM> is provided with wirings <NUM>. The wiring <NUM> includes the transfer wiring <NUM>, the reset wiring <NUM>, and the selection wiring <NUM>, which are described above.

A front surface of the oxide film <NUM>, i.e., the light receiving surface, which is a back surface of the semiconductor substrate <NUM>, has a light shielding film <NUM> formed thereon. The light shielding film <NUM> is provided to prevent light from entering the signal readout circuit <NUM> or other elements. The light shielding film <NUM> has an opening <NUM> to allow light to enter the PD <NUM>. The light shielding film <NUM> blocks at least a part of the semiconductor region <NUM> from light.

The PD <NUM> will be explained in detail with reference to <FIG>.

The PD <NUM> is a photoelectric conversion unit having a p-n junction which is formed by selectively implanting an n-type impurity into a predetermined region of a p-type semiconductor region <NUM>. The PD <NUM> is formed in a prismatic shape. The inside of the prism is an n-type photoelectric conversion region 1a, while the surface of the prism is a p+ region 1b. The n region is exposed in a part of the surface of the PD <NUM>. By applying a gate voltage to the gate electrode <NUM> of the transfer transistor <NUM>, an electric current based on the electric charge accumulated in the PD <NUM> flows so that the electric charge is accumulated in the FD <NUM>. It should be noted that the PD <NUM> is not limited to the prism, but may have any three-dimensional shape extending in the light incident direction. For example, the PD <NUM> may be a cylinder, an elliptic cylinder, a pyramid, a cone, an elliptic cone, a sphere, an ellipsoid, a polyhedron, or other shape.

The p+ region in the surface region 1b of the PD <NUM> prevents a depletion layer of the photoelectric conversion region 1a from reaching the surface. The depletion layer prevents a dark current generated at a semiconductor interface from flowing to the photoelectric conversion region 1a. In other words, the PD <NUM> in the first embodiment is an embedded photodiode.

The PD <NUM> protrudes from the semiconductor region <NUM>, in which the signal readout circuit <NUM> is formed, to the light receiving surface side. In other words, the PD <NUM> is formed in the protruding region 202T that extends and protrudes from the base region <NUM> of the semiconductor region <NUM>, in which the signal readout circuit <NUM> is formed, to the light receiving surface side. In <FIG>, the PD <NUM> thus has a protruding shape that extends from the base region <NUM>, in which the signal readout circuit <NUM> is formed, to the light receiving surface side. In other words, at least a part of the PD <NUM> has a protrusion that extends along the light incident direction. At least a part of the PD <NUM> extends to the light incident direction beyond an opening 452A (see <FIG>) of the light shielding film <NUM> described hereinafter and thus is closer to the light receiving surface with respect to the light shielding film <NUM>. It should be noted that at least a part of the PD <NUM> may extend toward the light incident side beyond the reflection film <NUM> or the opening <NUM>.

The oxide film <NUM> is formed on the light receiving surface side of the semiconductor substrate <NUM>. The optical path region <NUM> through which incident light travels is formed on an outer periphery of the PD <NUM> formed in the protruding region 202T of the semiconductor region <NUM>. The cross-sectional shape of the optical path region <NUM> and the shape of the opening <NUM> are the same as the cross-sectional shape of the PD <NUM>. The cross section on the light receiving surface side of the optical path region <NUM> is rectangular, while the cross section from the top surface 1c of the PD to the light shielding film <NUM> of the optical path region <NUM>; i.e., the cross section on the bottom side (the wiring region side) of the optical path region <NUM> is angular ring. The optical path region <NUM> has an oxide layer deposited thereon. The opening <NUM> is rectangular.

The inside material of the optical path region <NUM> is not limited to the layer of oxide, and any material can be used, as long as the transmittance of visible light region is not less than a predetermined value. The optical path region <NUM> may be hollow. It should be noted that the cross-sectional shape of the optical path region <NUM> and the shape of the opening <NUM> are not limited to be rectangular. For example, the cross section of the optical path region <NUM> and the opening <NUM> may be shaped as a circle, an ellipse, a polygon, or an circular ring.

A reflection film <NUM> is formed on an inner surface of the optical path region <NUM>, and the light shielding film <NUM> is formed on the bottom (a bottom surface on the wiring region side) of the optical path region <NUM>. The PD <NUM> is formed passing through the opening 452A of the light shielding film <NUM> and protruding toward a microlens <NUM> from the base region <NUM>. The reflection film <NUM> and the light shielding film <NUM> can be formed with aluminum or other materials having a high reflectivity, using PVD. The reflection film <NUM> and the light shielding film <NUM> may be formed with the same material or different materials, as long as the reflection film <NUM> is formed with a material having high reflectivity and the light shielding film <NUM> is formed with a material having low light transmittance.

The opening <NUM> of the optical path region <NUM> is provided with a color filter <NUM> and the microlens <NUM>. The color filter <NUM> and the microlens <NUM> may be omitted, as will be described hereinafter.

The wiring region <NUM> below the semiconductor region <NUM> has various wirings <NUM> formed therein, which are insulated from each other by an oxide layer <NUM>. The wirings <NUM> includes various wirings, such as the vertical signal line <NUM> or the like, for outputting a pixel signal from each of the pixel <NUM> to an image memory or the like formed on an external chip, i.e. other semiconductor substrate. The wirings <NUM> also includes the transfer wiring <NUM>, the reset wiring <NUM>,the selection wiring <NUM>, or the like, described above.

Photoelectric conversion operation by the above-described solid-state image sensor <NUM> will now be described.

The light receiving surface of the solid-state image sensor <NUM> has pixels arranged in a matrix. Light incident onto the image sensor <NUM> is condensed by the microlens <NUM> which is provided for each pixel. The light condensed by the microlens <NUM> is wavelength-selected by the color filter <NUM> and then enters the optical path region <NUM> via the opening <NUM>. A part of the incident light enters the inside of the PD <NUM> via the surface 1c thereof. Among the light incident onto the optical path region <NUM>, the light except for the light incident into the PD <NUM> via the surface 1c, i.e., the light incident onto the optical path region <NUM> between a side surface 1d of the PD <NUM> and the reflection film <NUM> is reflected by the reflection film <NUM> and enters into the PD <NUM> via the side surface 1d. The PD <NUM> photoelectrically converts the incident lights, which enter via the surface 1c and the side surface 1d, to an electric charge. This enables the PD <NUM> to more efficiently generate the electric charge from the incident light.

The light incident onto the bottom of the optical path region <NUM> is blocked by the light shielding film <NUM>. The light shielding film <NUM> prevents the incident light from entering the semiconductor region <NUM> where the signal readout circuit <NUM> is formed. This can reduce noise generation due to the light incident to the readout circuit <NUM>. The PD <NUM> has a protruding shape as described above, and has the light shielding film <NUM> has an opening 452A (see <FIG>) in a region where the PD <NUM> extends toward the light incident side.

By turning the transfer transistor <NUM> at a time when a predetermined accumulation time has elapsed after resetting the PD <NUM> and the FD <NUM> by the transfer transistor <NUM> and the reset transistor <NUM>, a detection current based on the electric charge accumulated in the PD <NUM> allows the electric charge to be accumulated in the FD <NUM>. A voltage based on the capacitance of the FD <NUM> is applied to the gate electrode <NUM> of the amplification transistor <NUM> and the amplification transistor <NUM> amplifies the voltage of the FD <NUM>. The amplified voltage is selected by the selection transistor <NUM> and outputted as a pixel signal to the vertical signal line <NUM>.

The detection current from the PD <NUM> to the FD <NUM> flows in a direction having a component in a thickness direction of the surface of the semiconductor substrate as indicated by an arrow 4C.

In a solid-state image sensor according to PTL1, a signal readout circuit, that reads out an electric charge as a pixel signal, transfers the signal between a transfer circuit, an amplification circuit, and a selection circuit along a surface of the semiconductor substrate.

In the solid-state image sensor <NUM> according to the first embodiment, the signal path from the PD <NUM> to the FD <NUM> is the path 4C having the component in the thickness direction of the substrate. Accordingly, the size of the transfer transistor <NUM> in the in-plane direction of the substrate can be reduced. A reduction in size of the pixel can thus be achieved.

The following advantageous effects are achieved though the solid-state image sensor according to the first embodiment described above.

The solid-state image sensor <NUM> according to the first embodiment can also be described as follows.

The solid-state image sensor <NUM> according to the first embodiment also includes a floating diffusion (an accumulation unit) <NUM> that accumulates the electric charge generated by the photoelectric conversion unit, and a transfer transistor (a transfer unit) <NUM> that transfers the electric charge generated by the photoelectric conversion unit to the floating diffusion (the accumulation unit) <NUM>. The transfer transistor (the transfer unit) <NUM> is provided between the photoelectric conversion unit and the floating diffusion (the accumulation unit) <NUM> in a direction of the optical axis of the microlens <NUM>.

In the solid-state image sensor <NUM> according to the first embodiment, the arrow 4c illustrated in <FIG> is a transfer path that transfers the electric charge generated by the photoelectric conversion unit to the floating diffusion (the accumulation unit) <NUM>.

The solid-state image sensor according to a second embodiment forming part of the claimed invention will now be explained with reference to <FIG>.

The second embodiment differs from the first embodiment in that:.

<FIG> is a cross-sectional view illustrating a part of an element pattern of a pixel 20A in a solid-state image sensor 100A. The same parts as those in <FIG> are denoted by the same reference signs, and a detailed description thereof will be omitted.

The solid-state image sensor 100A is formed on the SOI semiconductor substrate <NUM>. The semiconductor substrate <NUM> has a first semiconductor substrate <NUM> and a second semiconductor substrate <NUM> integrated together by a buried oxide layer <NUM>.

The first semiconductor substrate <NUM> is provided with vertically elongated PDs <NUM> that extend in a thickness direction (an incident light direction) of the substrate, a transfer circuit including a transfer transistor <NUM>, a FD <NUM>, and a reset circuit including a reset transistor <NUM>.

The second semiconductor substrate <NUM> is provided with an amplification circuit including an amplification transistor <NUM>, a through hole wiring <NUM> of a GND terminal connecting an anode of the PD <NUM> to a ground potential, and a through hole wiring <NUM> connecting a drain of the reset transistor <NUM> and a drain of the amplification transistor <NUM> to a predetermined potential (e.g., a reference potential Vdd). The second semiconductor substrate <NUM> field isolates elements by a STI <NUM>.

Reference sign <NUM> denotes a transfer wiring that applies a gate voltage to a gate electrode <NUM> of the transfer transistor <NUM>. Reference sign <NUM> denotes a gate electrode of the reset transistor <NUM>, and the gate electrode <NUM> is supplied with a reset voltage from a reset gate wiring (not shown).

<FIG> is a view illustrating an equivalent circuit of the pixel <NUM> corresponding to <FIG>.

This equivalent circuit differs from the equivalent circuit of the first embodiment illustrated in <FIG> in that:
the FD <NUM> is connected to the back gate electrode of the amplification transistor <NUM>; a predetermined potential (e.g., a reference potential Vdd) is applied to the top gate electrode; and a selection circuit including the selection transistor <NUM> is provided on other substrate.

The solid-state image sensor 100A according to the second embodiment will be explained in detail also with reference to <FIG>.

<FIG> illustrates a planar structure of a pixel <NUM> of the solid-state image sensor 100A according to the second embodiment and <FIG> is a vertical cross-sectional view as seen from a direction indicated by an arrow VI in <FIG>. <FIG> is a vertical cross-sectional view as seen from a direction indicated by an arrow VII in <FIG>. <FIG> is a vertical cross-sectional view as seen from a direction indicated by an arrow VIII in <FIG>.

A first semiconductor substrate <NUM> will be explained with reference to <FIG>.

The first semiconductor substrate <NUM> includes a semiconductor region 501a in which a part corresponding to the PD <NUM> extends toward a light receiving surface side. The semiconductor region 501a has a base region 501aK shaped as a thin layer and a protruding region 501aT in which the PD <NUM> extends from the base region 501aK toward the light receiving surface side. The PD <NUM> is formed in the protruding region 501aT by selectively implanting an n-type impurity or a p-type impurity into a predetermined part of the p-type semiconductor region 501a. The same impurity implantation is performed for the base region 501aK to form the transfer circuit including the transfer transistor <NUM>, the FD <NUM>, and the reset circuit including the reset transistor <NUM>.

Referring to <FIG>, the base region 501aK of the semiconductor region 501a, which is shaped as a thin layer, is provided with a p+ contact region that is connected to a GND terminal via a through hole and an n+ contact region that is connected to a reference potential terminal Vdd via a through hole. An anode of the PD <NUM> and the p+ surface region 1b are fixed to a GND potential via the p+ contact region. A drain of the reset transistor <NUM> and a drain of the amplification transistor <NUM> are connected to a reference potential terminal Vdd via the n+ contact region.

The first semiconductor substrate <NUM> has an oxide film 501b provided on the light receiving surface side of the semiconductor region 501a. The oxide film 501b is formed in regions other than a protruding region 501aT of the semiconductor region 501a and an optical path region 400A formed on an outer periphery of the PD <NUM>.

A transfer wiring <NUM> is formed in the oxide film 501b in such a manner that the transfer wiring <NUM> traverses the PD <NUM> which is a protrusion of the semiconductor region 501a. The oxide film 501b is also provided with an optical path region 400A having a rectangular cross section and surrounding the outer periphery of the PD <NUM> having a protruding shape, in a region that is closer to the light receiving surface with respect to the transfer wiring <NUM>.

The transfer wiring <NUM> is formed to traverse the optical path region 400A so that light entering the optical path region 400A would not travel downward in <FIG> (i.e., toward a side opposite to the light receiving surface). This configuration therefore has the same function as that of the light shielding film <NUM> described in <FIG>, which eliminates the need for a dedicated light shielding film <NUM>.

As in the first embodiment, the PD <NUM> is a buried photodiode having a photoelectric conversion region 1a and a surface region 1b. The p+ region in the surface region 1b prevents a depletion layer of the photoelectric conversion region 1a from reaching the surface. This prevents a dark current generated at a semiconductor interface from flowing to the photoelectric conversion region 1a.

A configuration of the PD <NUM> and the FD <NUM> will be explained in detail with reference to <FIG>.

In a predetermined region on the top surface side of the protruding region 501aT of the semiconductor substrate 501a, that is, in a p-type region that is closer to the light receiving surface with respect to the transfer wiring <NUM>, an n-type impurity is implanted at an appropriate concentration to form the PD <NUM> having a p-n junction. In <FIG>, the PD <NUM> is provided with an n region and an n+ region.

The FD <NUM> is formed by implanting an n-type impurity in a boundary region between the semiconductor substrate base region 501aK and the protruding region 501aT. In <FIG> as seen from the VI direction in <FIG>, the FD <NUM> is illustrated to have an L shape for convenience. The PD <NUM> has the same shape as in the first embodiment. At least a part of the PD <NUM> has a shape that is protruding toward the incident light direction. In other words, at least a part of the PD <NUM> passes through the opening 4HA of the transfer wiring <NUM> and extends toward the incident light side and is closer to the light receiving surface with respect to the transfer wiring <NUM>. It should be noted that at least a part of the PD <NUM> may extend toward the incident light side beyond the reflection film <NUM> or the opening <NUM>.

An n-type region in an upper end of the FD <NUM> faces an n region of the PD <NUM> via a p-type region. In this facing region, the transfer gate electrode <NUM> of polysilicon for controlling this channel is formed in the oxide film 501b on the outer periphery of the protruding region 501aT in order to flow a detection current based on the electric charge accumulated in the PD <NUM>. The transfer gate electrode <NUM> is connected to the transfer wiring <NUM>. The transfer wiring <NUM> is connected to a TG terminal 4T which passes through a through hole, as illustrated in <FIG>. When the TG terminal 4T is supplied with a transfer gate signal, the transfer transistor <NUM> transfers the electric charge of the PD <NUM> to the FD <NUM>.

Furthermore, a lower part (a side opposite to the light receiving surface side) of the FD <NUM> covers the channel part of the amplification transistor <NUM> via the buried isolation layer <NUM> and serves as a back gate electrode.

A reset gate electrode <NUM> of polysilicon is formed in the oxide film 501b below the transfer gate electrode <NUM>. As illustrated in <FIG>, the reset gate electrode <NUM> is connected to a reset gate terminal RST via a through hole wiring <NUM> passing through the first semiconductor substrate <NUM> and the second semiconductor substrate <NUM>.

The transfer transistor <NUM> allows a detection current based on the electric charge generated in the PD <NUM> to flow in a direction as indicated by an arrow 4C (see <FIG>) having a component in a thickness direction of the surface of the semiconductor substrate. The FD <NUM> serves as a back gate electrode of the amplification transistor <NUM>. A predetermined potential (e.g., a reference potential Vdd) is connected to a top gate electrode <NUM> of the amplification transistor <NUM>. The potential of the FD <NUM> varies and the amplification transistor <NUM> accordingly amplifies the voltage of the FD <NUM>. The voltage amplified by the amplification transistor <NUM> is supplied to a selection transistor <NUM> (not shown) and outputted as a pixel signal from a vertical signal line by a lateral transfer system in which the transfer is performed along the substrate surface.

Conventionally, the detection current based on the electric charge generated in the PD <NUM> flows in a direction along the surface of the semiconductor substrate. Contrastingly, in the solid-state image sensor <NUM> according to the first embodiment, the signal path from the PD <NUM> to the FD <NUM> is the path having the component in the thickness direction of the substrate. Accordingly, the size of the transfer transistor <NUM> in the in-plane direction of the substrate can be reduced. A reduction in size of the pixel can thus be achieved.

The solid-state image sensor 100A according to the second embodiment can achieve the similar advantageous effects as those of the first embodiment.

In other words, the solid-state image sensor 100A according to the second embodiment includes a semiconductor substrate <NUM> having a PD <NUM> (a light receiving unit) that receives incident light passed through a microlens <NUM>, and a TG wiring (a light shielding unit) <NUM> that blocks a part of the light passed through the microlens <NUM> and enters the semiconductor substrate <NUM>. The PD <NUM> receives incident light passed through the microlens <NUM>, between the microlens <NUM> and the TG wiring (the light shielding unit) <NUM>.

At least a part of the PD <NUM> (the light receiving unit) of the solid-state image sensor 100A according to the second embodiment has a photoelectric conversion unit that photoelectrically converts the received light to generate an electric charge.

The solid-state image sensor 100A according to the second embodiment also includes a floating diffusion (an accumulation unit) <NUM> that accumulates the electric charge generated by the photoelectric conversion unit, and a transfer transistor (a transfer unit) <NUM> that transfers the electric charge generated by the photoelectric conversion unit to the floating diffusion (the accumulation unit) <NUM>. The transfer transistor (the transfer unit) <NUM> is arranged between the photoelectric conversion unit and the floating diffusion (the accumulation unit) <NUM> in a direction of an optical axis of the microlens <NUM>. Referring to <FIG>, the transfer transistor <NUM> allows a detection current based on the electric charge generated in the PD <NUM> to flow in a direction as indicated by an arrow 4C (see <FIG>) having a component in a thickness direction of the surface of the semiconductor substrate.

In the solid-state image sensor 100A according to the second embodiment, the arrow 4c illustrated in <FIG> is a transfer path that transfers the electric charge generated by the photoelectric conversion unit to the floating diffusion (the accumulation unit) <NUM>.

Additionally, the following advantageous effects can be obtained.

The second embodiment described above may be modified as follows.

<FIG> is a view illustrating a configuration of a solid-state image sensor 100B according to a first variation of the second embodiment, and it corresponds to <FIG> for the second embodiment. <FIG> is a view illustrating an equivalent circuit of the solid-state image sensor 100B in <FIG> and it corresponds to <FIG> for the second embodiment. The same parts as those in <FIG> and <FIG> are denoted by the same reference signs, and differences will be mainly described.

In the solid-state image sensor 100A in <FIG>, the FD <NUM> is connected to the back gate electrode of the amplification transistor <NUM> without wiring, and the predetermined potential (e.g., the reference potential Vdd) is applied to the top gate electrode <NUM>. Contrastingly, in the solid-state image sensor 100B in <FIG>, the FD <NUM> is connected to the top gate electrode <NUM> of the amplification transistor <NUM> with a wiring <NUM>. This makes that gate drive signals having the same potential are inputted to the back gate electrode and the top gate electrode <NUM> of the amplification transistor <NUM>.

The solid-state image sensor 100B according to the first variation of the second embodiment can also achieve similar advantageous effects as those of the second embodiment.

The solid-state image sensor 100B according to the first variation of the second embodiment also achieves the following advantageous effects since gate drive signals having the same potential originating from the FD <NUM> are inputted to both the back gate electrode and the top gate electrode of the amplification transistor <NUM>.

<FIG> is a view illustrating a configuration of a solid-state image sensor 100C according to a second variation of the second embodiment, and it corresponds to <FIG> for the first variation of the second embodiment. <FIG> is a view illustrating an equivalent circuit of the solid-state image sensor 100C in <FIG> and it corresponds to <FIG> for the second embodiment. The same parts as those in <FIG> and <FIG> are denoted by the same reference signs, and differences will be mainly described.

In the solid-state image sensor 100A in <FIG>, the FD <NUM> is connected to the back gate electrode of the amplification transistor <NUM> without wiring, and the predetermined potential (e.g., the reference potential Vdd) is applied to the top gate electrode. Contrastingly, in the solid-state image sensor 100C of <FIG>, the potential of the back gate electrode of the amplification transistor <NUM> is set to the GND potential of the p region.

The solid-state image sensor 100C according to the second variation of the second embodiment can also achieve similar advantageous effects as those of the second embodiment.

<FIG> is a view illustrating a configuration of a solid-state image sensor 100D according to a third variation of the second embodiment, and it corresponds to <FIG> for the second embodiment. An equivalent circuit of the solid-state image sensor 100D in <FIG> is illustrated in <FIG>. The same parts as those in <FIG> and <FIG> are denoted by the same reference signs, and differences will be mainly described.

In the solid-state image sensor 100A in <FIG>, the FD <NUM> is connected to the back gate electrode of the amplification transistor <NUM> without wiring, and the predetermined potential (e.g., the reference potential Vdd) is applied to the top gate electrode <NUM>. Contrastingly, in the solid-state image sensor 100D in <FIG>, the top gate electrode of the amplification transistor <NUM> is connected to the FD <NUM> without wiring, and the back gate electrode of the amplification transistor <NUM> directly connects the GND terminal to the p region. In other words, the structure of the back gate electrode is not a so-called MOS structure.

The solid-state image sensor 100D according to the third variation of the second embodiment can also achieve similar advantageous effects as those of the second embodiment.

<FIG> is a view illustrating a configuration of a solid-state image sensor 100E according to a third embodiment not forming part of the claimed invention, and it corresponds to <FIG> and <FIG> for the first embodiment. The same parts as those in <FIG> and <FIG> are denoted by the same reference signs, and differences will be mainly described.

The solid-state image sensor 100E according to the third embodiment is an element that achieves a so-called global shutter and includes a memory for storing a pixel signal for each pixel.

The solid-state image sensor 100E is formed in one single semiconductor substrate <NUM>. A FD <NUM>, a memory <NUM>, and an overfloating gate <NUM> are formed in a semiconductor base <NUM> which is a thin layer. A TG <NUM> and a TG <NUM> are gate electrodes of the transfer gate that transfers the electric charge of the PD <NUM> to the memory <NUM> and the FD <NUM>. The transfer gate electrode TG2 is formed to overlap the gate electrode TG1, which can prevent light from entering the readout circuit.

Additionally, the optical path region 400B on the outer periphery of the PD <NUM> formed in the protruding semiconductor region 202T is shaped as a pyramid, instead of the prism. The optical path region 400B forms a mortar-shaped light incident region that is recessed from the light receiving surface. The optical path region 400B is hollow.

As in the first embodiment, a material having a high visible light transmittance such as SiO2 or the like may be deposited on the optical path region 400B.

For a monochrome solid-state image sensor, color filters are not necessary. The light shielding film <NUM> on the light receiving surface of the oxide film <NUM>, the peripheral reflection film <NUM> of the optical path region <NUM>, and the light shielding film <NUM> on the bottom surface of the optical path region <NUM> may be made of the same material, instead of different materials.

The solid-state image sensor 100E according to the third embodiment can also achieve similar advantageous effects as those of the first embodiment.

<FIG> is a view illustrating a configuration of a solid-state image sensor 100F according to a fourth embodiment not forming part of the claimed invention, and it corresponds to <FIG> for the third embodiment. The same parts as those in <FIG> are denoted by the same reference signs, and differences will be mainly described.

The solid-state image sensor 100E according to the third embodiment is a so-called back illumination type element. The solid-state image sensor 100F according to the fourth embodiment is a front illumination type element in which a wiring region is arranged on the light receiving surface side. The wiring <NUM> is formed in a region further outside of the optical path region <NUM>, that is, the oxide film <NUM> on the light receiving surface side. Other parts of the configuration are the same as those in the third embodiment and an explanation thereof will thus be omitted.

The solid-state image sensor 100F according to the fourth embodiment can also achieve similar advantageous effects as those of the first embodiment.

<FIG> is a view illustrating a configuration of a solid-state image sensor <NUM> according to a fifth embodiment not forming part of the claimed invention, and it corresponds to <FIG> for the fourth embodiment. The same parts as those in <FIG> are denoted by the same reference signs, and differences will be mainly described.

The solid-state image sensor <NUM> according to the fifth embodiment is also a front illumination type element in which a wiring region is arranged on the light receiving surface side. The solid-state image sensor <NUM> differs from the solid-state image sensor 100F according to the fourth embodiment in the shape of the optical path region formed on the outer periphery of the vertically elongated PD <NUM>.

The solid-state image sensor <NUM> according to the fifth embodiment is formed in one single semiconductor substrate. A FD <NUM>, a memory <NUM>, and an overfloating gate <NUM> are formed in a semiconductor base <NUM> which is a thin layer. Additionally, instead of the optical path region 400B, a prismatic optical waveguide 400C having a rectangular cross section is formed on the outer periphery of the PD <NUM> formed in the protruding semiconductor region 202T.

The solid-state image sensor <NUM> according to the fifth embodiment can also achieve similar advantageous effects as those of the first embodiment.

Each of the embodiments described above may be modified and used in the following manner.

A variation of a solid-state image sensor described below is intended to enhance a sensitivity for each color and to improve a separability.

An internal quantum efficiency of an image sensor generally depends on a light absorption depth determined by a position at which a photodiode is formed and a wavelength of light. In a front illumination type pixel in which a photodiode is formed on a silicon front surface side, the internal quantum efficiency is higher for light having a shorter wavelength and it is lower for light having a longer wavelength. Contrastingly, in a back illumination type pixel, since a photodiode is formed in a deep region of the silicon substrate, the internal quantum efficiency is higher for light having a longer wavelength and it is lower for light having a shorter wavelength.

If the photodiode could be formed at an optimal depth for each wavelength, instead of the photodiode formed at a certain fixed depth, the internal quantum efficiency could be enhanced for both front illumination type and back illumination type. However, it has been conventionally difficult to create such a configuration since a complete transfer would be difficult with a photodiode formed in a deep region of a silicon substrate.

Additionally, an image sensor having an image plane phase difference detection function generally has two photodiodes in a pixel, which are divided to each other by a P-type isolation. In order to vary the photodiode depth for different wavelengths as described above, it is necessary to form the P-type isolation at the same depth. It is however difficult to form a satisfactory P-type isolation structure in a deep region of the silicon. If the P-type isolation is insufficient in the deep region of the silicon, the separability deteriorates for light having a longer wavelength in the front illumination type element and contrastingly for light having a shorter wavelength in the back illumination type element.

A solid-state image sensors having a configuration according to each of the following variations improves the sensitivity by forming a photodiode at a depth depending on a light wavelength by adopting a vertical transfer gate structure, and also improves the separability by adjusting a photodiode aperture ratio.

The first to fifth embodiments has a fixed depth position of the PD from the light receiving surface, irrespective of wavelength-selected light. In a first variation, the depth position of the PD from the incident surface (the light receiving surface) is a position depending on wavelength-selected light, that is, a position depending on a RGB pixel. Additionally, in the first variation, a vertical transfer gate structure is employed to transfer the electric charge from the PD to the FD.

In each of the solid-state image sensors <NUM> to <NUM> in <FIG>, each PD <NUM> is arranged at a depth depending on each wavelength of R, G, and B and the electric charge of the PD <NUM> is transferred to the FD <NUM> via a vertical transfer gate FD 61R, <NUM>, or 61B.

The solid-state image sensor <NUM> in <FIG> has RGB pixels formed in a Bayer array or the like on a semiconductor substrate <NUM> including a Si layer <NUM> and a wiring region <NUM>.

For example, in a front illumination type pixel having color filters arranged in a Bayer array, photodiodes are formed at deep positions of a silicon layer in the order of R pixel, G pixel, and B pixel, and gate lengths of the vertical transfer gates 61R, <NUM>, and 61B vary accordingly. Contrastingly, in a back illumination type pixel, the photodiode is formed in depth of the order of B pixel, G pixel, and R pixel, and gate lengths are determined according to htem.

Specifically, in the Si layer <NUM> of the R pixel, the PD <NUM> is formed at a first depth position from the surface of the Si layer <NUM> and the FD <NUM> is formed on the surface of the Si layer <NUM>. In the Si layer <NUM> of the G pixel, the PD <NUM> is formed at a second depth position from the surface of the Si layer <NUM> and the FD <NUM> is formed on the surface of the Si layer <NUM>. In the Si layer <NUM> of the B pixel, the PD <NUM> is formed at a third depth position from the surface of the Si layer <NUM> and the FD <NUM> is formed on the surface of the Si layer <NUM>. Here, the first depth position < the second depth position < the third depth position.

In each RGB pixel, the vertical transfer gate 61R, <NUM>, or 61B (hereinafter representatively referred to as <NUM>) is provided in the Si layer <NUM> to transfer the electric charge between the PD <NUM> and the FD <NUM>. For the gate length, the transfer gate 61R < the transfer gate <NUM> < the transfer gate 61B.

The wiring region <NUM> is provided with a wiring <NUM> for inputting a gate control signal to the vertical transfer gate <NUM>. The wiring region <NUM> is also provided with a wiring <NUM> for transferring the potential of the FD <NUM> to an amplification transistor (not shown). It should be noted that the region except for the wiring region <NUM> is constituted with an oxide film <NUM> of SiO2 or the like.

The solid-state image sensor 100I in <FIG> is a front illumination type element as a modification of the solid-state image sensor <NUM> in <FIG>.

Specifically, in the Si layer <NUM> of the R pixel, the PD <NUM> is formed at a fourth depth position from the surface of the Si layer <NUM> and the FD <NUM> is formed on the surface of the Si layer <NUM>. In the Si layer <NUM> of the R pixel, the PD <NUM> is formed at a fifth depth position from the surface of the Si layer <NUM> and the FD <NUM> is formed on the surface of the Si layer <NUM>. In the Si layer <NUM> of the B pixel, the PD <NUM> is formed at a sixth depth position from the surface of the Si layer <NUM> and the FD <NUM> is formed on the surface of the Si layer <NUM>. Here, the fourth depth position > the fifth depth position > the sixth depth position.

In each RGB pixel, the vertical transfer gate 61R, <NUM>, or 61B (hereinafter representatively referred to as <NUM>) is provided in the Si layer <NUM> to transfer the electric charge between the PD <NUM> and the FD <NUM>. For the gate length, the transfer gate 61R > the transfer gate <NUM> > the transfer gate 61B. The same parts as those in <FIG> are denoted by the same reference signs, and a detailed description thereof will be omitted.

The solid-state image sensors <NUM> and 100I in <FIG> and <FIG> achieve the following advantageous effects.

The same structure may also be applied to a pixel having two photodiodes therein.

Specifically, the solid-state image sensor 100J in <FIG> is a so-called 2PD-type element in which a pair of PDs <NUM> and 1R are provided in each pixel of the solid-state image sensor <NUM> in <FIG>. FDs <NUM> and 8R corresponding to the pair of PDs <NUM> and 1R are provided.

The same parts are denoted by the same reference signs, and a detailed description thereof will be omitted.

The same also applies to a pixel having more (four, eight, and so on) photodiodes.

The solid-state image sensor <NUM> in <FIG> is a so-called 2PD-type element in which a pair of PDs <NUM> and 1R are provided in each pixel of the solid-state image sensor 100I in <FIG>. FDs <NUM> and 8R corresponding to the pair of PDs <NUM> and 1R are provided. The distance between PD <NUM> and PD1R, in a pair of which are used in longer wavelength, is larger.

The solid-state image sensors <NUM> and <NUM> in <FIG> and <FIG> achieve the following advantageous effects.

For example, in a front illumination type pixel structure having a Bayer array, the separability is lower for a R wavelength absorbed in a deeper region. The separability becomes higher in the R pixel, if distances between two photodiodes are set wider in the order of R pixel, G pixel, and B pixel. Contrastingly, in a back illumination type pixel structure, the separability deteriorates for a B wavelength absorbed in a shallower region. Thus, the distance between two photodiodes is set wider in the order of B pixel, G pixel, and R pixel, which improves the separability also for the B pixel.

According to the solid-state image sensors <NUM> to <NUM> in <FIG> described above, high S/N ratio can be achieved by improving the sensitivity for each color, and an autofocus accuracy is improved by improving the separability.

<FIG> is a view illustrating a solid-state image sensor <NUM> which is a variation of the third embodiment not forming part of the claimed invention.

The same parts as those in <FIG> illustrating the third embodiment are denoted by the same reference signs, and differences will be described.

Main differences are as follows. The semiconductor substrate <NUM> of the solid-state image sensor 100E according to the third embodiment includes a semiconductor base <NUM> and a protruding semiconductor region 202T. The PD <NUM> is formed in the protruding semiconductor region 202T, and an optical path region 400B having a cross section of pyramidal shape is formed on the outer periphery of the PD <NUM>.

The solid-state image sensor <NUM> according to a variation of the third embodiment includes a semiconductor substrate <NUM>. The semiconductor substrate <NUM> includes a semiconductor base <NUM>, a light shielding unit <NUM> engaged with an upper surface of the semiconductor base <NUM>, an oxide layer <NUM> formed on the light shielding unit <NUM>, and a wiring layer <NUM> formed on a lower surface of the semiconductor base <NUM>. The oxide layer <NUM> has a pyramidal recess 2001R formed therein, which represents a pixel unit. The light shielding unit <NUM> is formed on the upper surface of the oxide layer <NUM>, except for an opening of the recess 2001R. The light shielding unit is not formed on a surface of the recess 2001R, and a PD (a photoelectric conversion unit) <NUM> is formed on inclined side wall surfaces and a bottom surface of the recess 2001R. The recess 2001R is an optical path region 400D that receives incident light.

The semiconductor base <NUM> is provided with a floating diffusion (FD) <NUM>, and a transfer transistor <NUM> for transferring an electric charge photoelectric converted by the PD <NUM> to the floating diffusion <NUM>. Conduction and non-conduction of the transfer transistor <NUM> is controlled by signal control of a gate electrode TG1. The electric charge accumulated in the floating diffusion <NUM> is amplified by an amplification circuit SFamp and read out to vertical signal lines.

The solid-state image sensor <NUM> according to the variation of the third embodiment configured in this manner includes the PD <NUM> that receives incident light passed through a microlens (not shown), the semiconductor base <NUM> on which the PD <NUM> is formed, and the light shielding unit <NUM> that blocks a part of the light passed through the microlens and enters the semiconductor substrate <NUM>. The PD <NUM> receives the incident light passed through the microlens (not shown), between the microlens and the light shielding unit <NUM>.

The following description will be made with reference to <FIG> showing an embodiment not forming part of the claimed invention.

For example, the photoelectric conversion region has a convex portion that protrudes toward light incident side beyond the opening <NUM>.

(<NUM>) A solid-state image sensor <NUM> includes a photoelectric conversion region including a photoelectric conversion unit <NUM> that photoelectrically converts incident light to generate an electric charge, an electric charge transfer region including an electric charge transfer unit <NUM> to which the electric charge is transferred from the photoelectric conversion region, and a semiconductor region <NUM> in which the photoelectric conversion region and the electric charge transfer region are provided. At least a part of the semiconductor region <NUM> has a protruding region 202T on the light incident side, and at least a part of the photoelectric conversion unit <NUM> is provided in the protruding region 202T.

At least a part of the semiconductor region <NUM> has the protruding region 202T on a side onto which the incident light enters from the opening <NUM>, and at least a part of the photoelectric conversion unit <NUM> is provided in the protruding region 202T. The opening <NUM> and the photoelectric conversion unit <NUM> are arranged so as to overlap each other in a plan view of the substrate, whereby it can achieve a reduction in size of the pixel.

(<NUM>) The solid-state image sensor <NUM> as described in (<NUM>) above has an opening <NUM>, and the solid-state image sensor <NUM> includes a light shielding unit <NUM> that blocks at least a part of the semiconductor region <NUM>, and the photoelectric conversion region is provided in the protruding region 202T in the incident direction of light enters from the opening <NUM>.

(<NUM>) A solid-state image sensor <NUM> includes a photoelectric conversion region including a photoelectric conversion unit <NUM> that photoelectrically converts incident light to generate an electric charge, an electric charge transfer region including an electric charge transfer unit <NUM> to which the electric charge is transferred from the photoelectric conversion region, and a semiconductor region <NUM> in which the photoelectric conversion region and the electric charge transfer region are provided. At least a part of the semiconductor region <NUM> is provided so as to protrude to the incident region <NUM> and at least a part of the photoelectric conversion region is provided so as to protrude to the incident region <NUM>.

At least a part of the semiconductor region <NUM> is provided so as to protrude to the incident region <NUM> and at least a part of the photoelectric conversion region is provided so as to protrude to the incident region <NUM>, whereby it contributes to a reduction in size of the pixel. Additionally, because at least a part of the photoelectric conversion region is provided so as to protrude to the incident region <NUM>, light is also enters from the periphery of the photoelectric conversion region. This enhances a conversion gain of the element.

(<NUM>) In the solid-state image sensor <NUM> as described in (<NUM>) above, at least a part of the semiconductor region <NUM> has a protruding region 202T protrudes toward a side on which incident light enters the incident region <NUM>, and at least a part of the photoelectric conversion unit <NUM> is provided in the protruding region 202T.

(<NUM>) The solid-state image sensor <NUM> as described in claim (<NUM>) above has an opening <NUM> and includes a light shielding unit <NUM> that blocks at least a part of the semiconductor region <NUM>. The protruding region 202T is a region that extends toward the incident direction of light enters from the opening <NUM>.

(<NUM>) In the solid-state image sensor <NUM> as described in (<NUM>) to (<NUM>) above, the incident region is an optical path region <NUM> of the incident light.

(<NUM>) In the solid-state image sensor <NUM> as described in (<NUM>) to (<NUM>) above, the light shielding unit <NUM> is formed so as to shield the semiconductor region <NUM> except for the photoelectric conversion region.

(<NUM>) In the solid-state image sensor as described in (<NUM>) to (<NUM>) above, a wiring is formed on other surface, which is opposite to the surface receiving the incident light, to provide the wiring region <NUM>.

The following description will be made with reference to <FIG>.

(<NUM>) In the solid-state image sensor as described in (<NUM>) to (<NUM>) above, the solid-state image sensor is provided in a SOI substrate <NUM> in which one semiconductor region <NUM> and other semiconductor region <NUM> are separated by a buried oxide layer <NUM>; the solid-state image sensor includes an amplification region including an amplification unit <NUM> that amplifies an output of an electric charge accumulation unit <NUM> in an electric charge transfer region; and the photoelectric conversion region and the electric charge transfer region are formed in the one semiconductor region <NUM> while the amplification region is formed in the other semiconductor region <NUM>.

(<NUM>) In the solid-state image sensor as described in (<NUM>) above, the electric charge transfer region is provided with the transfer unit <NUM> that transfers the electric charge as a result of the photoelectric conversion in the photoelectric conversion region, and the floating diffusion <NUM> that accumulates the transferred electric charge, wherein the floating diffusion <NUM> is formed below the photoelectric conversion unit <NUM>.

(<NUM>) In the solid-state image sensor as described in (<NUM>) above, the amplification unit <NUM> is arranged directly under the floating diffusion <NUM> and is connected to the floating diffusion <NUM> by a wiring passing through the buried oxide layer <NUM>.

(<NUM>) In the solid-state image sensor as described in (<NUM>) to (<NUM>) above, a semiconductor substrate, that is different from the ISO substrate <NUM> having the selection unit <NUM> for selecting the output amplified by the amplification unit <NUM>, is stacked on the other semiconductor region <NUM> of the IOS substrate <NUM>.

Further, as illustrated in <FIG>, the present invention may be implemented as an image-capturing device <NUM> including an image sensor <NUM> to <NUM> in one of the embodiments and variations described above and a generation unit <NUM> that generates image data based on signals outputted from the image sensor <NUM> to <NUM>.

Claim 1:
An image sensor (<NUM>) comprising:
a semiconductor substrate (<NUM>) having a photoelectric conversion unit (PD1) that is configured to receive light which has passed through a microlens (<NUM>);
a light shielding unit (<NUM>) that is configured to block a part of the light that enters the semiconductor substrate, the light shielding unit having an opening (<NUM>);
an accumulation unit (<NUM>) that is configured to accumulate the electric charge generated by the photoelectric conversion unit; and
a transfer unit (<NUM>) that is configured to transfer the electric charge generated by the photoelectric conversion unit to the accumulation unit, wherein:
the light shielding unit is configured to prevent the light which has passed through the microlens from entering the accumulation unit and the transfer unit; and
at least a part of the photoelectric conversion unit has a light receiving surface that passes through the opening and is configured to receive the light which has passed through the microlens, the light being received at a position between the microlens and the light shielding unit,
characterized in that
the transfer unit (<NUM>) is provided between the photoelectric conversion unit and the accumulation unit in a direction of an optical axis of the microlens.