Patent Description:
Electronic modules, such as radio frequency (RF) modules, contain electronic components, such as high-frequency chipsets, that may take up a considerable amount of space inside the module and may generate a significant amount of heat. RF modules in a planar phased array antenna architecture are typically mounted on a base substrate and the available area for integrating such modules is often constrained. Typically, cooling is applied through the bottom of the module via a thermal mass or a restricted cold plate, which may interfere with RF operation due to the cold plate or thermal mass being in the direct path of electrical signals on the planar phased array antenna. As electronic components for RF modules become increasingly complex, there is a need to improve the available surface area for mounting such components, as well as improve the flexibility in electronic module design, while also enhancing the cooling to such components without interfering with RF/DC operation.

<CIT> discloses a packaged semiconductor chip including a chip carrier having a large thermal conductor which can be solderbonded to a circuit panel so as to provide enhanced thermal conductivity to the circuit panel and electromagnetic shielding and a conductive enclosure which partially or completely surrounds the packaged chip to provide additional heat dissipation and shielding. The packaged unit may include both an active semiconductor chip and a passive element, desirably in the form of a chip, which includes resistors and capacitors. Inductors may be provided in whole or in part on the chip carrier.

<CIT> discloses an interposer having an opening in the central portion. A plurality of first electrode terminals are formed on the front surface near the opening of the interposer, a plurality of second electrode terminals are formed on the front surface of the peripheral portion thereof and corresponding ones of the plurality of first and second electrode terminals are electrically connected to one another via a plurality of wirings. A plurality of bump electrodes is formed on the front surface of a child chip. A plurality of bump electrodes containing a plurality of bump electrodes for connection with the exterior are formed on the front surface of a parent chip. The front surfaces of the parent chip and child chip are set to face each other with the interposer disposed therebetween and the bump electrodes are electrically connected to one another in the opening of the interposer.

<CIT> discloses a first semiconductor chip die-bonded on mount substrate, a plurality of high bumps and a plurality of low bumps formed on second semiconductor chip, and a second semiconductor chip facedown bonded on the mount substrate and the first semiconductor chip.

<CIT> discloses a method of forming a multi-piled bump, in which metal balls can be stably and securely piled so as to form the multi-piled bump having a prescribed height. The method comprises the steps of: holding a metal wire by a capillary; sparking and melting the wire so as to form metal balls; piling a plurality of the metal balls with applying a load and ultrasonic vibrations thereto. A tail length of the metal wire, which is held by the capillary, is controlled to make a gap between a center of the metal wire and a center of the metal ball one half of a diameter of the metal wire or less.

The present invention provides a method for making an electronic module, the method involving the formation of free-formed, self-supported interconnect pillars that electrically connect electronic components on a cover substrate of the electronic module with electronic components on a base substrate of the electronic module.

The free-formed, self-supported interconnect pillars may provide for improved compactness of the electronic module by establishing an electrical path to the electronic components on the cover substrate, thereby effectively increasing the available area for mounting such electronic components. The free-formed, self-supported interconnect pillars extend vertically between the base electronic components and the opposing cover electronic components to provide a straight electrical path that allows sufficient spacing between the opposing electronic components. Such a configuration may enable improved thermal performance and cooling between components, and also limits or eliminates the use of substrate area for the interconnect path. In addition, by providing a straight and/or direct electrical path between electronic components, the configuration of the free-formed, self-supported interconnect pillars may also enable improved operational efficiency of the electronic module by reducing transmission losses of the electrical signal along the electrical path. Furthermore, the cover substrate may provide an integrated thermal spreader, which may be combined with a heat exchanger or thermal mass, to enhance cooling to the cover electronic components, while also minimizing interference with electrical connections or operations of the electronic device, such as the radio frequency (RF) or direct current (DC) operations.

The free-formed, self-supported interconnect pillars are formed from an electrically conductive filament provided by a layer-wise additive manufacturing process. By depositing the electrically conductive filament, in situ, directly on the electronic components, the tailorability and flexibility in module design may be enhanced and the complexity of the interconnect structure may be reduced. For example, the free-formed, self-supported interconnect pillars may better accommodate for non-planarity between electronic components disposed on the substrates, and free-forming the self-supported interconnect pillars may improve the speed and cost to manufacture such electronic modules.

The present invention provides a method for assembling an electronic module comprising the steps: mounting a base electronic component on a base substrate; mounting a cover electronic component on a cover substrate; depositing an electrically conductive filament directly onto the base electronic component or directly onto the cover electronic component; free-forming a self-supported interconnect pillar with the deposited electrically conductive filament, the free-formed, self-supported interconnect pillar extending upright from the base electronic component or the cover electronic component; arranging the cover substrate over the opposing base substrate and aligning the base electronic component with the cover electronic component; and electrically connecting the base electronic component to the cover electronic component with the free-formed, self-supported interconnect pillar; attaching a compressible electrical interposer at a free-end of the free-formed, self-supported interconnect pillar; and electrically interposing the compressible electrical interposer in the electrical path between the respective free-formed, self-supported interconnect pillar and the base electronic component or the cover electronic component.

Embodiments of the invention may include one or more of the following additional features separately or in combination.

In some embodiments, the electrically conductive filament may be an electrically conductive paste.

The electrically conductive paste may be deposited to form the free-formed, self-supported interconnect pillar having a length to width aspect ratio of at least <NUM> to <NUM>.

The cover electronic component and the base electronic component may each include an externally addressable face having an electrical contact surface, where the externally addressable face of the cover electronic component may be aligned with and opposingly face the externally addressable face of the base electronic component.

The electrically conductive paste may be deposited on the electrical contact surface of the base electronic component or may be deposited on the electrical contact surface of the cover electronic component and may form the free-formed, self-supported interconnect pillar in a straight path for electrically connecting with the opposing electrical contact surface of the base electronic component or the cover electronic component.

A plurality of the base electronic components may be mounted on the base substrate and a plurality of the cover electronic components may be mounted on the cover substrate, where at least one of the externally addressable faces of the plurality of cover electronic components is non-planar with respect to at least one other of the externally addressable faces of the plurality of cover electronic components, and/or at least one of the externally addressable faces of the plurality of base electronic components is non-planar with respect to at least one other of the externally addressable faces of the plurality of base electronic components.

The electrically conductive paste may be deposited on one or more of the plurality of base electronic components and/or one or more of the plurality of cover electronic components to form a plurality of the free-formed, self-supported interconnect pillars having varying longitudinal lengths for electrically connecting the plurality of base electronic components to the plurality of cover electronic components and to accommodate for the non-planarity of the respective externally addressable faces of the plurality of base electronic components and/or the plurality of cover electronic components.

The electrically conductive paste may be deposited to form the free-formed, self-supported interconnect pillar having a substantially cylindrical shape.

The electrical conductivity of the free-formed, self-supported interconnect pillar may be uniform through both a transverse cross-section and along a longitudinal length of the free-formed, self-supported interconnect pillar.

The electrical conductivity of the free-formed, self-supported interconnect pillar may be about <NUM> × <NUM><NUM> siemens per meter or greater.

The electrically conductive paste may be deposited through a layer-wise additive manufacturing process to form the free-formed, self-supported interconnect pillar.

Optionally, the electrically conductive paste may be deposited in a single extrusion step to form the at least one free-formed, self-supported interconnect pillar extending upright from the base electronic component or the cover electronic component.

The method for assembling the electronic module may further include the step of solidifying the electrically conductive paste.

The cover electronic component mounted on the cover substrate may generate more heat than the base electronic component mounted on the base substrate.

The method for assembling the electronic module may further include the steps of attaching a cold plate to the cover substrate, and cooling the cover electronic component.

The electronic module may be an RF module, and the free-formed, self-supported interconnect pillar may be configured to transmit RF or DC signals or transport heat.

A plurality of cover electronic components may be provided, which may include one or more monolithic microwave integrated circuits.

A plurality of base electronic components may be provided, which may include one or more application specific integrated circuits.

For example, the free-formed, self-supported interconnect pillar may be formed from an electrically conductive paste.

The following description and the annexed drawings set forth certain illustrative embodiments of the invention. These embodiments are indicative, however, of but a few of the various ways in which the principles of the invention may be employed. Other objects, advantages and novel features according to aspects of the invention will become apparent from the following detailed description when considered in conjunction with the drawings.

An electronic module, and method for making same, includes free-formed, self-supported interconnect pillars that electrically connect cover electronic components disposed on a cover substrate with base electronic components disposed on a base substrate. The free-formed, self-supported interconnect pillars extend vertically in a straight path between the cover electronic components and the base electronic components. The free-formed, self-supported interconnect pillars are formed from an electrically conductive filament provided by an additive manufacturing process.

The principles of the present invention have particular application to radio frequency (RF) electronic modules for wireless electronic devices, and thus will be described below chiefly in this context. It is also understood that principles of this invention may be applicable to other electronic modules where it is desirable to provide a three-dimensional architecture using free-formed, self-supported interconnect pillars that enable enhanced compactness, improved thermal and operational performance, and increased flexibility in design and manufacturing, among other considerations.

<FIG> shows an exemplary electronic module <NUM> having a base substrate <NUM>, or base, and a cover substrate <NUM>, or lid, disposed over the base substrate <NUM>. The base substrate <NUM> includes one or more base electronic components <NUM> disposed on the base substrate <NUM>. The cover substrate <NUM> includes one or more cover electronic components <NUM> disposed on the cover substrate <NUM>, which may be spaced from and/or opposingly face the base electronic components <NUM> (as shown in <FIG>, for example). One or more free-formed, self-supported interconnect pillars <NUM> extend upright between the base electronic components <NUM> and the cover electronic components <NUM> to provide an electrical path there between.

<FIG> illustrate an exemplary process of assembling and/or forming an exemplary electronic module <NUM>. The electronic module <NUM> is substantially the same as, or similar to, the above-referenced electronic module <NUM>, and consequently the same reference numerals but indexed by <NUM> are used to denote structures corresponding to the same or similar structures in the electronic module <NUM>. In addition, the description relating to the electronic module <NUM> is equally applicable to the electronic module <NUM>, and vice versa, except as noted below.

As shown in <FIG>, one or more base electronic components <NUM> are mounted on a base substrate <NUM>. The base substrate <NUM> may include a metal base, semiconductor substrate, or may include conventional materials such as alumina, aluminum nitride, or similar ceramic according to conventional processes using conventional equipment, as is well known in the art. The base substrate <NUM> can include a single layer or multiple layers, including a dielectric layer and an insulating layer, formed using conventional processes and equipment.

The base electronic components <NUM> are attached to the base substrate <NUM> in a suitable manner, for example, using electrically conductive or electrically non-conductive adhesives or solder. The base electronic components <NUM> may include integrated circuits, semiconductor chips, microelectronic devices, and/or various other active and passive electrical structures, such as capacitors, transistors, resistors, inductors, diodes, input/output interfaces, etc., which may be provided according to conventional practice. The base substrate <NUM> may also include other electrically conductive circuitry provided by traditional techniques in a well-known manner, such as wire bonding or photolithographic techniques, and the like.

Also shown in <FIG>, one or more cover electronic components <NUM> are mounted on a cover substrate <NUM>, thereby effectively doubling the available area for mounting such components inside of the electronic module <NUM>. The cover substrate <NUM> and the cover electronic components <NUM> may be the same as or substantially similar to the base substrate <NUM> and the base electronic components <NUM>, respectively. As with the base substrate <NUM>, the cover substrate <NUM> may include various integrated circuits, semiconductor chips, microelectronic devices, and/or other electrical circuitry and components, which may be provided according to conventional practice well-known in the art. The cover substrate <NUM> may also be sufficiently rigid to support the cover electronic components without distortion.

Generally, any type or number of electronic components <NUM>, <NUM> can be attached to the cover substrate <NUM> and/or the base substrate <NUM>. In a preferred embodiment, the electronic components <NUM> that generate the most heat are mounted to the cover substrate <NUM>, which readily enables efficient transfer of the heat from the electronic components <NUM> to the exterior of electronic module <NUM>. The cover substrate <NUM> may be provided as a thermal spreader, which may be combined with cooling means, such as a heat exchanger, to enhance cooling of the cover electronic components <NUM>. The cover substrate <NUM> may also be configured to have a higher thermal conductivity than the base substrate <NUM> for more effectively cooling the high heat-generating components. For example, the cover substrate <NUM> may be made of, or include, an electrically non-conductive material having good thermal conductivity such as, for example, aluminum nitride; or the cover substrate <NUM> may be made of, or include, an electrically conductive material having good thermal conductivity, such as a molybdenum-copper alloy. Alternatively or additionally, the cover substrate <NUM> may be made of a material having relatively poor thermal conductivity, such as ceramic (e.g., alumina), and can incorporate a heat sink made of a thermally conductive material, such as metal, for example, copper-tungsten.

In the illustrated embodiment shown in <FIG>, the electronic module <NUM> is configured as an RF module <NUM> and may include application specific integrated circuits (ASICs) <NUM>, monolithic microwave integrated circuits (MIMICs) <NUM>, other electronic components (e.g., capacitors and/or other integrated circuits <NUM>), and/or other electronic circuitry (e.g., wires <NUM> and input/output interfaces <NUM>) for generating, transmitting, and receiving RF signals. In a preferred embodiment, the cover electronic components <NUM> include the MMICs <NUM> which are mounted to the underside of the cover substrate <NUM>, and the base electronic components <NUM> include the ASICs <NUM> and other components <NUM>. Such a configuration enables more efficient cooling of the MMIC components <NUM> by providing the cover substrate <NUM> as a thermal spreader, which may optionally include cooling means <NUM> (shown in <FIG>), for example a thermal mass or heat exchanger (e.g., cold plate), that is mounted to the exterior surface of the cover substrate <NUM> opposite the MMIC components <NUM>. Such a configuration may also reduce interference with RF operations by limiting obstructions with RF connections to the MMICs <NUM>, and also by providing the cooling means <NUM> outside of the direct path of RF energy transferred through the front of the phased array antenna (e.g., toward the base substrate <NUM>).

Turning to <FIG>, an exemplary process for producing one or more free-formed, self-supported interconnect pillars <NUM> (hereinafter also referred to as "interconnect pillars" <NUM>) is shown. The free-formed, self-supported interconnect pillars <NUM> electrically connect the base electronic components <NUM> and the cover electronic components <NUM> to provide an electrical path therebetween. The term "electrically connect" as used herein may include either direct or indirect electrical connection between components e.g., <NUM>, <NUM>. It is understood that individual free-formed, self-supported interconnect pillars <NUM> may electrically connect individual electronic components <NUM>, <NUM> at its opposite ends, and/or more than one interconnect pillar <NUM> may be disposed on a single electronic component <NUM>, <NUM> to connect one or more opposite electronic components <NUM>, <NUM>. Although the interconnect pillars <NUM> are shown in the illustrated embodiment as being straight, they may also include a branching-type structure that provides for electrical connection of a single interconnect pillar <NUM> with multiple electronic components <NUM>, <NUM> at one or more of the interconnect pillar ends. The interconnect pillars <NUM> may be perpendicular to the base electronic components <NUM> for electrically connecting with opposingly facing cover electronic components <NUM> that may be in direct alignment with the respective base electronic components <NUM>. Alternatively or additionally, the interconnect pillars <NUM> may be inclined with respect to the base electronic components <NUM> for electrically connecting with opposingly facing cover electronic components <NUM> that may be in an offset alignment with the respective base electronic components <NUM>.

The free-formed, self-supported interconnect pillars <NUM> may be configured to transmit a variety of electrical signals between the base electronic components <NUM> and cover electronic components <NUM>. For example, where the electronic module <NUM> is configured as an RF module, the interconnect pillars <NUM> may be configured to communicate RF signals by receiving an RF input toward the base substrate <NUM> and transmitting an RF output toward the cover substrate <NUM>, for example, to MMIC components <NUM>. The interconnect pillars <NUM> may also be configured to transmit direct current (DC) between components, for example, from the ASICs <NUM> or other electronic components <NUM> (e.g., capacitors) disposed on the base substrate <NUM> to provide power and control to the MMICs <NUM> mounted on the cover substrate <NUM>. In a preferred embodiment, the interconnect pillars <NUM> that are configured for RF operation (shown as RF pillars <NUM>' in <FIG>) are formed proximal the peripheral edges of the base substrate <NUM> and/or the cover substrate <NUM>. In addition, the interconnect pillars <NUM> configured for RF operation may have a larger cross-sectional area for carrying more DC current without overheating. The interconnect pillar <NUM> may be configured with a suitable cross-sectional area depending on the current or RF power requirements to ensure reliable operation.

In the illustrated embodiment, the free-formed, self-supported interconnect pillars <NUM> are formed by depositing an electrically conductive filament <NUM> through a nozzle <NUM>, or extrusion head, directly onto the base electronic components <NUM>, such as the ASICs <NUM> and/or other electronic components <NUM>, for example. The filament <NUM> may be deposited directly onto an electrical contact surface (not shown) provided on an externally addressable face (e.g., face <NUM>) of the one or more base electronic components <NUM>. Alternatively or additionally, the filament <NUM> may be deposited directly onto the cover electronic components <NUM> to form the interconnect pillars <NUM> in a similar manner, however, deposition and formation of the interconnect pillars <NUM> on the base electronic components <NUM> will primarily be shown and described for the purposes of simplicity.

In a preferred embodiment, the electrically conductive filament <NUM> is made of an electrically conductive paste, which may be deposited through a layer-wise additive manufacturing process to form the free-formed, self-supported interconnect pillar <NUM>, as exemplified in <FIG>. For example, the filament <NUM> may be deposited as a series of single layers <NUM>, or traces, as the nozzle <NUM> moves across the substrate <NUM>, such as from left to right as viewed in <FIG>. In this manner, the free-formed, self-supported interconnect pillar <NUM> may be formed layer <NUM> by layer <NUM>, extending upright and away from the base electronic components <NUM>, until the fully-formed interconnect pillar <NUM> reaches a desired dimension (shown in <FIG>, for example). The term "layer" as used herein means one or more levels, or of potentially patterned strata, and not necessarily a continuous phase. Optionally, the filament <NUM> may be solidified, such as through temperature treatment or air drying, before subsequent layers <NUM> are deposited. Alternatively or additionally, the filament <NUM> may be deposited in a single extrusion step to fully form the free-formed, self-supported interconnect pillar <NUM> extending upright from the base electronic component <NUM>. For example, the filament <NUM> may be deposited on the base electronic component <NUM>, and as the filament <NUM> continuously flows through the nozzle <NUM>, the nozzle <NUM> may move away from the base component <NUM> (i.e., upward, as viewed in <FIG>) to free-form a single (e.g., cylindrical) self-supported interconnect pillar, or other non-layered interconnect structure extending upright and having a length greater than its width.

The additive manufacturing process for free-forming the self-supported interconnect pillar <NUM> may include methods such as Selective Laser Sintering (SLS), Stereolithography (SLA), micro-stereolithography, Laminated Object Manufacturing (LOM), Fused Deposition Modeling (FDM), MultiJet Modeling (MJM), direct-write, inkjet fabrication, and micro-dispense. Areas of substantial overlap can exist between many of these methods, which can be chosen as needed based on the materials, tolerances, size, quantity, accuracy, cost structure, critical dimensions, and other parameters defined by the requirements of the object or objects to be made.

Advantageously, the interconnect pillars <NUM> may be free-formed by depositing the filament <NUM>, in situ, directly on the one or more electronic components <NUM>, <NUM>, and are therefore not formed in a mold or via path, nor subtractively machined or etched, nor preformed or prefabricated interconnect structures that must be subsequently attached to the electronic components <NUM>, <NUM>. Accordingly, the term "free-formed" as used herein includes formation of the interconnect pillars <NUM> in their unique intended position on the base electronic components <NUM> disposed on the base substrate <NUM> and/or the cover electronic components <NUM> disposed on the cover substrate <NUM>, and not preformed or prefabricated into a predefined shape, nor subtractively machined or etched.

In addition, the free-formed interconnect pillars <NUM> are deposited with the electrically conductive filament <NUM> such that the interconnect pillars <NUM> are self-supported structures capable of extending upright without the need for extraneous scaffolding that must subsequently be machined or etched away, and without the need for other support structures, such as via paths machined into the substrate, and the like. Accordingly, the term "self-supported" as used herein includes formation of the interconnect pillars <NUM> such that the interconnect pillar <NUM> may support itself independently along at least a majority of its longitudinal length, and preferably entirely unsupported along a length thereof.

Such a free-formed, self-supported interconnect pillar <NUM> may enhance tailorability in the electronic module <NUM> design and may also reduce the complexity of the interconnect structure. For example, as exemplified in <FIG>, by depositing the electrically conductive filament <NUM> in situ at unique intended positions on the base electronic components <NUM>, the free-formed, self-supported interconnect pillars <NUM> may be formed with varying lengths (L) to better accommodate for the non-planarity of the externally addressable faces (e.g., <NUM>) between electronic components <NUM>, <NUM> that are electrically connected on opposite ends of the interconnect pillar <NUM>. In this manner, the size and shape of each interconnect pillar <NUM> may be customized to match an individual topology not constrained by bulk manufacturing processes and tolerances. In addition, by depositing the electrically conductive filament <NUM> to free-form the self-supported interconnect pillars <NUM>, inessential subtractive machining or etching steps may be reduced or eliminated. As such, the flexibility in design of such electronic modules <NUM> may be enhanced and the speed, cost, and yield to manufacture such electronic modules <NUM> may be improved.

A further advantage to providing the free-formed, self-supported interconnect pillars <NUM> in the manner described above is that such a configuration may enable improved compactness of the electronic module <NUM> by establishing an electrical path to the cover electronic components <NUM> disposed on the increased substrate area provided by the cover substrate <NUM>. In addition, by providing the interconnect pillars <NUM> with sufficient length to adequately space the cover electronic components <NUM> from the base electronic components <NUM>, the thermal performance of the electronic module <NUM> may be improved as the higher heat generating components may be adequately separated from lower heat generating components.

The free-formed, self-supported interconnect pillars <NUM> may also improve operational efficiency and reduce transmission losses of the electrical signals in the electronic module <NUM> by providing straight and/or predominately direct electrical paths between the respective electronic components <NUM>, <NUM>. As shown in the embodiment of <FIG>, the externally addressable faces (e.g., <NUM>) of the base electronic components <NUM> are aligned with and opposingly face the externally addressable faces of the cover electronic components <NUM>, such that the free-formed, self-supported interconnect pillars <NUM> are formed perpendicularly and extend vertically with respect to the externally addressable faces (e.g., <NUM>) of the respective electronic components <NUM>, <NUM>. Moreover, providing a straight and vertical path for the interconnect pillars <NUM> may reduce complexity in electronic module design and may limit or eliminate the use of substrate area that would otherwise be required for the interconnect path.

In a preferred embodiment, the free-formed, self-supported interconnect pillar <NUM> has a longitudinal length (L) that is greater than its transverse width (W) (or diameter). In particular, the length to width aspect ratio of the free-formed, self-supported interconnect pillar <NUM> is at least <NUM>:<NUM>, preferably at least <NUM>:<NUM>, more preferably <NUM>:<NUM>, and optionally <NUM>:<NUM> or greater, including all ranges and subranges therebetween. Such a configuration of the free-formed, self-supported interconnect pillar <NUM> may provide adequate spacing for improved thermal performance and compactness, may improve operational efficiency and reduce transmission losses, and/or may enable the interconnect structure to be free-formed and self-supported for improved manufacturing efficiency. The higher aspect ratio may also enable a more dense interconnect structure, thereby requiring less MMIC <NUM> and/or ASIC <NUM> footprint.

Depending at least in part on the shape of the extrusion nozzle <NUM>, the extruded filament <NUM> and/or the corresponding interconnect pillar <NUM> may in some embodiments have a substantially cylindrical shape. Because the extruded and deposited filament <NUM> may undergo a settling process, or in some cases a solidification process (for example, air-drying or thermal treatment, such as sintering or curing) after being deposited in the one or more layers <NUM> on the electronic module <NUM>, the transverse cross-sectional shape of the interconnect pillar <NUM> may include some distortions from an exact circle. The interconnect pillar <NUM> may therefore be described as having a substantially cylindrical shape, which is defined herein as having a cylindrical shape or a distorted cylindrical shape. Alternatively or additionally, the filament <NUM> may be deposited from a nozzle <NUM> that does not have a circular cross-section; for example, the transverse cross-section of the nozzle may be rectangular, square, hexagonal, or other polygonal shape, in which case the transverse cross-sectional shape of the interconnect pillar <NUM> corresponds with the shape of the nozzle <NUM>.

The electrically conductive filament <NUM> and/or the corresponding structure of the interconnect pillar <NUM> may have a diameter (or width, W) of from about <NUM> mil (<NUM> microns) to about <NUM> mils (<NUM>), more preferably from about <NUM> mils (<NUM> microns) to <NUM> mils (<NUM> microns), most preferably <NUM> mils (<NUM> microns). The unsupported length (L) of the free-formed interconnect pillar <NUM>, as measured along its longitudinal axis, may be from about <NUM> mils (<NUM> microns) to about <NUM> mils (<NUM>), more preferably about <NUM> mils (<NUM> microns) to about <NUM> mils (<NUM>,<NUM> microns), and most preferably about <NUM> mils (<NUM> microns). As discussed above, the length (L) to width (W) (or diameter) aspect ratio of the free-formed, self-supported interconnect pillar <NUM> may be at least about <NUM>:<NUM>, and more preferably about <NUM>:<NUM>.

The electrically conductive filament <NUM>, such as that made of an electrically conductive paste, may be designed with an appropriate chemistry and viscosity to enable the free-formed extrusion through the nozzle <NUM> and to provide the self-supported interconnect pillar structure. Preferably, the electrically conductive paste has thixotropic shear thinning behavior that enables the paste to be extruded through the nozzle <NUM> and yet be able to retain a self-supported shape of the deposited layer <NUM>, or a self-supported shape of the entire interconnect pillar <NUM>, after exiting the nozzle <NUM>. In addition, it may be preferable that the electrically conductive paste has chemical compatibility and good wetting behavior with the electronic component <NUM>, <NUM> and/or the electrical contact surface on the externally addressable face of the electronic component <NUM> or <NUM>. Accordingly, the electrically conductive filament <NUM> and/or the free-formed interconnect pillar <NUM> may form a strong interface with the electronic component <NUM>, <NUM> or the electrical contact surface thereof in the as-deposited state, as well as after any post-processing, such as thermal treatment, without compromising the structural integrity of the free-formed self-supported interconnect structure <NUM>.

Due to the desired functionality of the free-formed, self-supported interconnect pillars <NUM>, it may be preferred that the electrically conductive filament <NUM> and/or the corresponding interconnect pillar <NUM> exhibits a sufficiently high electrical conductivity. For example, the electrical conductivity of the filament <NUM> may be on the order of about <NUM> × <NUM><NUM> siemens per meter, preferably at least about <NUM> × <NUM><NUM> siemens per meter, and more preferably greater than <NUM> × <NUM><NUM> siemens per meter at standard temperature and pressure. The electrically conductive filament <NUM> comprises an electrically conductive material, such as a transition metal, an alkali metal, an alkaline earth metal, a rare earth metal, or carbon. For example, the conductive material may include an electrically conductive material selected from the group consisting of: silver, copper, lead, tin, lithium, gold, platinum, titanium, tungsten, zirconium, iron, nickel, zinc, aluminum, magnesium, and carbon (e.g., graphite, graphene, carbon nanotubes).

In addition, due to the interconnect pillar <NUM> being engaged at its opposite ends between the base substrate <NUM> and the cover substrate <NUM>, and the electronic components <NUM>, <NUM> thereof (as shown in <FIG>), it may be preferable that the interconnect pillar have sufficient compressive strength. It may also be preferred that the interconnect pillar <NUM> has a coefficient of thermal expansion similar to the module housing itself to limit compressive stresses from accumulating in the interconnect pillar <NUM> as the interconnect pillar <NUM> heats and expands due to heat generated by the electronic components <NUM>, <NUM>.

The free-formed, self-supported interconnect pillar <NUM> may preferably have a substantially uniform transverse cross-sectional width (W) (or diameter) along the entire unsupported length of the interconnect pillar <NUM>, however, some distortions may occur due to settling or solidification of the deposited filament <NUM>. It may also preferable that the free-formed, self-supported interconnect pillar <NUM> has uniform material properties, such as electrical conductivity, through both its transverse cross-section and along its longitudinal length. Alternatively, the interconnect pillar <NUM> may be a functionally graded component having varying material properties for enabling modification or modulation of the electrical signal as required.

<FIG> shows a photograph of an exemplary free-formed, self-supported interconnect pillar <NUM> having a substantially cylindrical shape. The interconnect pillar <NUM> was made from a silver nanopaste that was deposited in a single vertical pass, or trace, extending away from the base. The height (or unsupported length, L) of the interconnect pillar <NUM> is about <NUM> mils (<NUM> microns) and the width (W) (or diameter) is about <NUM> mils (<NUM> microns), such that the length to width aspect ratio is about <NUM>:<NUM>. The free-formed, self-supported interconnect pillar <NUM> has a relatively high electrical conductivity of about <NUM>% that of the electrical conductivity of gold.

Turning now to <FIG>, after depositing the electrically conductive filament <NUM> and free-forming the self-supported interconnect pillars <NUM>, the exemplary process of assembling the electronic module <NUM> includes a step of attaching a compressible electrical interposer <NUM> at a free-end <NUM> of the free-formed, self-supported interconnect pillar <NUM>. Accordingly, when the interconnect pillars <NUM> electrically connect the base electronic components <NUM> to the cover electronic components <NUM> (as shown in <FIG>), the compressible interposers <NUM> are electrically interposed in the electrical path. In this manner, the interconnect pillars <NUM> provide an electrical connection between the respective electronic components <NUM> and <NUM> that is indirect, yet the electrical path may still be provided as a straight path.

The electrical interposer <NUM> have sufficient compliance or compressibility to accommodate for compressive engagement between the cover electronic component <NUM> and the free-end <NUM> of the interconnect pillar <NUM>, which reduces compressive stresses on the interconnect pillar <NUM>. The compressible electrical interposer <NUM> may also have sufficient spring back to accommodate for slight variations in the overall height of the respective interconnect pillars <NUM> as the cover substrate <NUM> is attached to the base substrate <NUM>, and as the cover electronic components <NUM> engage the compressible interposers <NUM> (as shown in <FIG>, for example). The compressible electrical interposer <NUM> may also provide for improved contact area between the interconnect pillar <NUM> and the cover electronic component <NUM>. In some embodiments, the compressible electrical interposer <NUM> may have approximately the same width (or diameter) as the interconnect pillar <NUM>. The compressible electrical interposer <NUM> may provide low signal losses or distortion of the electrical signal between electronic components <NUM> and <NUM>. In a preferred embodiment, the compressible electrical interposer <NUM> may constitute less than <NUM>% of the length of the electrical path between electronic components <NUM> and <NUM> for reducing transmission losses.

The compressible electrical interposer <NUM> may be made from an electrically conductive elastomeric material, such as a silicon-based rubber having electrically conductive particles or fibers dispersed therein. Alternatively, the compressible electrical interposer <NUM> may be made from one or more electrically conductive wires, or filaments, compacted into a compressible interposer configuration, for example, cylindrical. The conductive wire or filaments of the interposer <NUM> may be made from gold-plated beryllium copper alloy (Au/BeCu) or a gold-plated molybdenum alloy (Au/Mo), for example.

Referring now to <FIG>, an exemplary process step of attaching the cover substrate <NUM> to the base substrate <NUM> to electrically connect the cover electronic components <NUM> with the base electronic components <NUM> via the interconnect pillars <NUM>, and the compressible interposers <NUM>, is shown. In the illustrated embodiment, the cover substrate <NUM> is arranged over the base substrate <NUM>, and the respective cover electronic components <NUM> are directly aligned with, and opposingly face, the base electronic components <NUM> to electrically connect with the vertical and straight interconnect pillars <NUM>. As the cover substrate <NUM> is lowered to attach to the base substrate <NUM>, the interposers <NUM> are compressed and simultaneously the cover substrate <NUM> may engage a hermetic seal member (not shown) on the base substrate <NUM> (or upright sidewalls of the base substrate <NUM>) to form a hermetically sealed internal cavity <NUM> (shown in <FIG>) that prevents contaminants or moisture from entering the internal cavity <NUM>. In this manner, all of the electronic components <NUM>, <NUM> and electrical connections therebetween (e.g., interconnect pillars <NUM>), with the exception of the input/output interfaces <NUM>, for example, may be completely contained within the hermetically sealed internal cavity <NUM>. The cover substrate <NUM> may be fixedly attached to the base substrate <NUM> with a laser weld or adhesive, for example an epoxy resin or solder, in a suitable manner well-known in the art.

Claim 1:
A method for assembling an electronic module (<NUM>, <NUM>) comprising the steps:
mounting a base electronic component (<NUM>, <NUM>) on a base substrate (<NUM>, <NUM>);
mounting a cover electronic component (<NUM>, <NUM>) on a cover substrate (<NUM>, <NUM>);
depositing an electrically conductive filament (<NUM>) directly onto the base electronic component or directly onto the cover electronic component;
free-forming a self-supported interconnect pillar (<NUM>, <NUM>, <NUM>) with the deposited electrically conductive filament, the free-formed, self-supported interconnect pillar extending upright from the base electronic component or the cover electronic component;
arranging the cover substrate over the opposing base substrate and aligning the base electronic component with the cover electronic component;
electrically connecting the base electronic component to the cover electronic component with the free-formed, self-supported interconnect pillar;
attaching a compressible electrical interposer (<NUM>) at a free-end of the free-formed, self-supported interconnect pillar; and
electrically interposing the compressible electrical interposer in the electrical path between the respective free-formed, self-supported interconnect pillar and the base electronic component or the cover electronic component.