Patent Description:
The systems, methods and apparatuses described herein relate to the security of computer network-based commercial and other sensitive data transactions.

Internet shopping, online banking, and other network-based forms of transmitting sensitive data are highly popular, but may be susceptible to a variety of security breaches resulting from computer viruses, backdoors, keyloggers and other forms of attacks on the user's computer or other device. These attacks generally relate to vulnerabilities in the operating system of the device used to access the network. What is needed is a suitable hardware platform to implement security solutions which are not susceptible to software-based attacks.

<CIT> relates to application associating based on cryptographic identification. As each application is loaded for use by an operating system, a message handling application within the operating system associates the applications with relativity metrics for later use in handling interprocess messages. A cryptographic identifier associated with each application is verified and, based on the verifying, each application is associated with a relativity metric. The message handling application receives a message from an origin process. The message handling application then determines a destination process for the message, a relativity metric for the origin process, and a relativity metric for the destination process. Based on an analysis of the relativity metrics of the origin process and the destination process, the message handling application determines whether to pass the message to the destination process.

<CIT> relates to secure task management in a computer. A task management system in an operating system executes a plurality of tasks in parallel. The task management system includes an execution standby state changer configured to generate a verifier of a task from data stored in a task address space and to store the generated verifier in a verifier storage area, when the task is changed from an executed state to an execution standby state; and an executed state changer configured to generate a verifier of the task from the data stored in the task address space and to verify matching of the generated verifier with the verifier of the task stored in the verifier storage area, when the task is changed from the execution standby state to the executed state.

<CIT> discloses a system and a method of authorizing execution of software code based on accessible entitlements. Embodiments include systems and methods for authorizing software code to be executed or access capabilities in secure operating environments. Profiles may be issued by trusted entities to extend trust to other entities to allow those other entities to provide or control execution of applications in a secure operating environment such as on particular computing devices. A request in a first program may be received from a second program. A profile is then identified. The profile includes at least one entitlement associated with the second program. The profile is authenticated based on a first digest indicative of the profile and the second program is authenticated based on a second digest indicative of the second program. The request is then executed based on the entitlement.

<CIT> describes a transactor for use in connection with transactions involving secure and non-secure information which is configured to present notices on user interface screens associated with a non-secure operating mode so as to caution users not to enter secure information. When the transactor operates in a secure mode, no such notices are presented. In addition, when in the secure mode, the transactor may be configured to accept data inputs only from designated areas of a user interface, such as a touch screen.

The present invention relates to an apparatus according to independent claim <NUM>, and to a method according to independent claim <NUM>. Preferred embodiments are claimed in the respective dependent claims.

Certain illustrative aspects of the systems, apparatuses, and methods according to the present invention are described herein in connection with the following description and the accompanying figures. These aspects are indicative, however, of but a few of the various ways in which the principles of the invention may be employed and the present invention is intended to include all such aspects and their equivalents. Other advantages and novel features of the invention may become apparent from the following detailed description when considered in conjunction with the figures.

In other instances, well known structures, interfaces, and processes have not been shown in detail in order not to unnecessarily obscure the invention. However, it will be apparent to one of ordinary skill in the art that those specific details disclosed herein need not be used to practice the invention and do not represent a limitation on the scope of the invention, except as recited in the claims. It is intended that no part of this specification be construed to effect a disavowal of any part of the full scope of the invention. Although certain embodiments of the present disclosure are described, these embodiments likewise are not intended to limit the full scope of the invention.

The present disclosure provides systems, methods and apparatuses for securely performing computer-based actions or transactions. For example, it might be desirable to use a computer to establish a secure connection with a remote server, such as an SSL connection, for the purposes of viewing bank account transactions or to purchase certain products or services. In another example, it might be desirable for an appropriately-equipped television to receive encrypted media content from an Internet store. In each case, a skilled individual could intercept the data within an operating system running the computer -- e.g., a credit card number sent via the SSL connection, or a movie transferred from the Internet store-- by, for example, installing malware (such as a virus, a keylogger or a Trojan horse) into the operating system of the user's computer. The inventions described herein provide a way to transfer certain activities to a secure zone, which cannot be compromised even if the operating system is under complete control of the attacker, so as to ensure that these computer-based activities truly remain secure from attack. In addition, for additional security, the secure zone may be made tamper-resistant and/or may use tamper detection techniques, with, for example, erasure of one or more cryptographic keys upon tamper detection.

<FIG> shows one example by which a secure zone <NUM> according to the present disclosure may be implemented in a larger device <NUM>, such as a computer, laptop, smart phone, television set, personal music player, set-top box, etc..

A secure zone <NUM> according to the present disclosure may first comprise an interface <NUM> to one or more non-secure zones <NUM>. The term "non-secure zone," as used herein, refers to any device, processor, operating system, or other object, or combination thereof, which is capable of providing messages, codes, tasks or other information to a secure zone <NUM>. The interface <NUM> may be configured to receive these messages, codes or tasks from those non-secure zones <NUM>. For example, if a secure zone <NUM> is implemented in a laptop, the interface <NUM> may be implemented as some kind of bus (for example, a PCIe bus) and may be configured to receive messages, code, tasks or other information from the laptop's central processing unit. If the secure zone <NUM> were implemented in a television, the interface <NUM> again might be implemented, for example, as some kind of bus (for example, an I<NUM>C bus), and configured to receive information from a separate set-top box or from the microcontroller unit of the television.

A secure zone <NUM> may further comprise a supervisor <NUM> coupled to the interface <NUM>. The supervisor <NUM> may be used to control access to the components of the secure zone <NUM>, and may be used to enforce certain operational rules of the secure zone <NUM>, providing certain security guarantees to the end-user. For example, in one embodiment, the supervisor <NUM> may be able to: (<NUM>) receive executable code which can be run on one or more secure processors <NUM> within the secure zone <NUM> via the interface <NUM>; (<NUM>) check that certain requirements (as described in greater detail below) are fulfilled for this code; (<NUM>) if requirements are fulfilled, load this code into one or more instruction memories <NUM> located within the secure zone <NUM>; (<NUM>) clear and/or pre-fill one or more data memories <NUM> located within the secure zone <NUM>; (<NUM>) instruct the secure processor <NUM> to execute code loaded into the instruction memory <NUM>; (<NUM>) control one or more indicators <NUM>, which may be used to signal to a user certain security modes of the computing device <NUM>; (<NUM>) control one or more peripherals within the computing device <NUM>; (<NUM>) provide visual feedback to the end-user about the origin of the loaded code; and (<NUM>) clean up (to the extent required) after the code has been executed. Each of these functions are described in greater detail herein. In one embodiment, the supervisor <NUM> may further comprise a temporary storage <NUM> (for example, implemented as RAM or flash memory). In one embodiment, the supervisor <NUM> may be implemented in hardware within the secure zone <NUM>, such that the supervisor <NUM> cannot be affected or modified.

As noted previously, the secure zone <NUM> also may comprise a secure processor <NUM>, which may be configured to execute code loaded into the instruction memory <NUM> and to exchange data with the interface <NUM>. The secure processor <NUM> may be a general purpose processor or any suitable form of special purpose processor. In some embodiments, the secure processor <NUM> may be implemented as a hardware separate from the supervisor <NUM>; in some other embodiments, the supervisor <NUM> and the secure processor <NUM> could be implemented using the same hardware, as long as the functional requirements specified below are observed. In addition, it will be understood that while <FIG> shows the secure processor <NUM> as having a so-called "Harvard architecture" (with separate instruction memory <NUM> and data memory <NUM>), other architectures (like the ubiquitous von Neumann architecture) may be used as long as equivalent instruction and data restrictions are enforced by the supervisor <NUM> (for example, the XN bit may be used in ARM® processors to provide some separation of data memory from instruction memory, as long as the XN bit in appropriate memory areas is enforced by the supervisor <NUM> and cannot be altered by loadable code running on the secure processor <NUM>).

In certain embodiments, the secure zone <NUM> may further comprise one or more cryptographic engines <NUM>. These cryptographic engines <NUM> may be configured to implement one or more cryptographic algorithms, such as AES or RSA. The cryptographic engine <NUM> may receive data from the supervisor <NUM> for encryption or decryption, and may provide the resulting ciphertext (or plaintext, as appropriate) back to the supervisor <NUM>. In some embodiments, the cryptographic engine <NUM> also may be used by the secure processor <NUM>; in this case, it may be desirable to have a clear separation between any cryptography-related tasks coming from the supervisor <NUM> to the crypto engine <NUM> and any cryptography-related tasks coming from the secure processor <NUM> to the crypto engine <NUM>, so as to avoid any leaks of information associated with one component to the other. The secure zone <NUM> may also comprise a random number generator <NUM> to provide support to cryptographic processes.

In other embodiments, the supervisor <NUM> may be configured to perform some or all of the functionality of the cryptographic engine <NUM>, and a separate cryptographic engine <NUM> may not be required.

If the secure zone <NUM> is expected to perform image and/or video processing, it may further comprise a decoder <NUM>. For example, if the secure zone <NUM> receives encrypted media content from the non-secure zone <NUM> (such as from a video player application <NUM> running within the operating system <NUM>), the code running on secure processor <NUM> (with or without the help of the cryptographic engine <NUM>, depending on the embodiment) might be responsible for decrypting the content, and then the decoder <NUM> may be responsible for decoding the content. This decoder <NUM> may comprise, for example, implementations of algorithms such as H. <NUM>, VC-<NUM>, PNG, JPEG, etc. In some cases, the decoder <NUM> may also include certain text rendering capabilities.

In some embodiments, the decoder <NUM> may be implemented in hardware (for example, as a specialized DSP processor). As shown on <FIG>, the decoder <NUM> may be coupled to the secure processor <NUM>, such that decrypted data may pass from the cryptographic engine <NUM> to the decoder <NUM>.

In some other embodiments, the secure processor <NUM> may be configured to perform some or all of the functionality of the decoder <NUM>, and a separate decoder may not be required. In still other embodiments, the secure zone <NUM> may not provide native support for image and/or video decoding, but may be able to receive and execute code (on the secure processor <NUM>) designed to implement this type of media content processing.

As noted previously, the secure zone <NUM> may further comprise one or more instruction memories <NUM> and data memories <NUM>, which may be implemented as some kind of volatile memory, such as, for example, RAM. The absence of persistent writable storage for executable code may ensure that no viruses, back-doors, or other malicious code can be installed within the secure zone <NUM>. In addition, the secure zone <NUM> may contain one or more dedicated certificate storages <NUM>, which may be implemented as read-only non-volatile memory, and one or more dedicated key storages <NUM>, which may be implemented as non-volatile memory. Key storage <NUM> may be used, for example, for the storage of one or more private keys (which can be generated, for example, by supervisor <NUM> using RNG <NUM>), one or more corresponding public key(s) or associated digital certificates, and/or a unique device identifier. This information may be used to identify and/or authenticate the computer-based device <NUM> within which the secure zone <NUM> is located.

As noted previously, a secure zone <NUM> is meant to be used within the context of a larger computer-based device <NUM>, such as a television or a laptop. Thus, it will be understood that the computer-based device <NUM> may comprise a number of components which are outside the secure zone <NUM>, but may nonetheless assist in the operation of the secure zone <NUM>. For example, the device <NUM> may comprise traditional input/output devices such as a keyboard <NUM> or a screen <NUM>; in other embodiments, the device <NUM> may further comprise other I/O devices (such as a mouse, remote control transceivers, speakers, or cameras). These I/O devices may be beneficial to the operation of the secure zone <NUM> when, for example, a user desires to enter secure data (for example, a card PIN) without the risk of the operating system <NUM> eavesdropping or modifying it. The device <NUM> may further comprise a communications port <NUM>, enabling the device to communicate with other devices. In the foregoing example, the communications port <NUM> may be useful in creating a connection between the device <NUM> and a remote computer over a network connection. Also, such a computer-based device <NUM> may run an operating system <NUM> and one or more applications <NUM>.

Finally, as shown on <FIG>, the device <NUM> also may comprise a means for indicating when the device <NUM> is operating in a secure mode, shown on <FIG> as "indicator" <NUM>. Such an indicator <NUM> may be, for example, a green LED which is placed on an outside case of the device <NUM> and readily visible to a user. If the LED is on, the device <NUM> may be operating in a secure mode (more specifically, in "partial-screen secure mode" as described below).

As a result, a device <NUM> according to the present disclosure may further comprise additional hardware allowing it to take control of these peripheral components of the device <NUM> from, e.g., the operating system <NUM>. For example, the secure device <NUM> may comprise a mixer <NUM>, allowing the secure zone <NUM> to control the screen <NUM>. The device <NUM> might also comprise a keyboard switch <NUM>, allowing the secure zone <NUM> to control the keyboard <NUM>. In this manner, the same input/output devices (e.g., the keyboard <NUM> and screen <NUM>) may be used to support both non-secure and secure zones. It shall be understood that while <FIG> shows components like the mixer <NUM> and the keyboard switch <NUM> as implemented outside of the secure zone <NUM>, in some embodiments these components may be placed within the secure zone <NUM>.

Finally, the secure zone <NUM> may be optionally physically secured, such that it is tamper-resistant. The secure zone <NUM> may also (alternatively, or in addition to being tamper-resistant) incorporate one or more tamper detection techniques. For example, several tamper-resistant methods for protecting cryptographic processors are already known and have been described in the art; see http://www. uk/techreports/UCAM-CL-TR-<NUM>. In some embodiments, it may be desirable, for instance, to manufacture the secure zone <NUM> within a single chip. In another embodiment, the secure zone <NUM> might have a secure enclosure. In some of these embodiments, the secure zone <NUM> may be configured to execute one or more possible responses if it detects that the chip's integrity has been compromised, and/or if it detects penetration of the secure enclosure. These responses may vary from erasing any stored encryption key(s) within the key storage <NUM> to the physical destruction of all or part of the secure zone <NUM>.

<FIG> shows an exemplary method by which a secure zone <NUM> according to the present disclosure may accept a task for execution; organize the process of task execution; and cleanup after task execution.

At step <NUM>, the interface <NUM> may receive the code from the non-secure zone <NUM>, and may pass this code to the supervisor <NUM> for execution by the secure processor <NUM>. It should be understood that whenever code is transferred at step <NUM>, the code may additionally include related application data.

At step <NUM>, prior to executing any received code, the supervisor <NUM> may clear all data stored within the instruction memory <NUM> and data memory <NUM>. For example, the supervisor <NUM> might zero all of the instruction memory <NUM> and data memory <NUM>. This may be performed to prevent old code, data, or both, from affecting the code currently being loaded, and to avoid information leaks between different pieces of code.

In some embodiments, the code provider may have encrypted the code (and any related application data) before sending it to the secure zone <NUM>. For example, the code provider may have used a public key corresponding to a private key of the supervisor <NUM> (which may previously have been stored in the key storage <NUM>, and which may be used by the supervisor <NUM> to decrypt the code) to encrypt the code. Thus, at step <NUM>, if the code has been encrypted using a public key of the supervisor <NUM>, the supervisor <NUM> may extract a copy of the corresponding private key from key storage <NUM> and direct the cryptographic engine <NUM> to decrypt the code (and any associated data, if applicable) using this private key.

In addition, the code (and any related data) also may have been digitally signed using the code provider's private key, guaranteeing the authenticity of the code. To enable validation of the digital signature and the signed code, a digital certificate capable of authenticating the code provider may be provided with the code. For example, the code provider may have a private key and a corresponding digital certificate which has been signed by a "root certificate" of a certificate authority. In such an implementation, the root certificate previously may have been stored in the certificate storage <NUM>. In some embodiments, instead of a single certificate, whole "certificate chains" may be included with the code. In other embodiments, alternative ways of obtaining intermediate certificates (for example, issuing a request to a server (not shown) via the operating system OS <NUM> and communications port <NUM>) may be used.

At step <NUM>, the supervisor <NUM> may instruct the cryptographic engine <NUM> to validate the digital signature of the code provider. This validation of the digital signature will usually include validation of the certificate received with the code. For example, if the code provider's certificate were signed by a certificate authority such as VeriSign®, the supervisor <NUM> may take a copy of the appropriate VeriSign root certificate from the certificate storage <NUM> and verify that this root certificate was used to sign the code provider's certificate, performing a typical public key infrastructure (PKI) signature validation; in some cases, a more elaborate validation (for example, including "certificate chains") may be implemented.

In some embodiments, other signature validation schemas (for example, those used in the simple public key infrastructure (SPKI)/simple distributed security infrastructure (SDSI) or the "web of trust" used in pretty good privacy (PGP)) may be used.

In some embodiments, the supervisor <NUM> may additionally perform certificate revocation list (CRL) validation to ensure that all certificates involved in the signature validation are still valid. A CRL can be obtained, for example, by means of a request to a server which hosts CRLs. This request can be made, for example, via the operating system <NUM> and the communications port <NUM> of the non-secure zone <NUM>.

In some embodiments, the Online Certificate Status Protocol (OCSP) may be used to check certificate validity (instead of or in addition to CRL validation).

In certain embodiments, the code provider's digital certificate may differ slightly from a traditional certificate, such that it contains not only a text entry capable of identifying the certificate owner (usually the "CN" field of an X. <NUM> digital certificate), indicating the name of the code provider associated with the certificate, but may further contain an image (for example, PNG or JPEG) with a visual representation of the identity of the code provider. This image may be a part of the digital certificate in the sense that it may be covered by the signature of the certificate issuer in the same way that the other fields of the certificate should be covered; for example, in an X. <NUM> certificate such an "identity image" may be included as an extension in the "Extensions" field. As will be described in further detail below, in some embodiments, it may also be desirable to show this "identity image" on a predesignated portion of the screen <NUM> while the code is executed.

At step <NUM>, the supervisor <NUM> may take control of one or more peripherals of the computing device <NUM> that it needs in order to execute the received code. For example, the supervisor <NUM> may take control of the keyboard <NUM> and the screen <NUM> of the device <NUM>. In such a case, the supervisor <NUM> may instruct the keyboard switch <NUM> to effectively disconnect the keyboard <NUM> from the non-secure components (such as the operating system <NUM>) and to route all keyboard input to the secure zone <NUM>. The supervisor <NUM> may also instruct the mixer <NUM> to combine output from image processor <NUM> and decoder <NUM> to form image on screen <NUM>, effectively disconnecting the non-secure zone from the screen <NUM>.

In some embodiments, at step <NUM>, it may be determined whether the task should run in partial-screen mode. If it is determined that the task should run in partial-screen secure mode, it may be desirable to provide one or more affirmative confirmations to the user that the device <NUM> is now operating in the partial-screen secure mode. Thus, at step <NUM>, the supervisor <NUM> may provide the "identity image" from the code provider's certificate (which certificate has been validated in step <NUM>) to the image processor <NUM>, and may instruct the mixer <NUM> to show information from the image processor <NUM> on a designated area of the screen <NUM>. At step <NUM>, the supervisor <NUM> may turn on the indicator <NUM>.

In such embodiments, the user may confirm that the task is running in the secure zone <NUM> by checking that the indicator <NUM> is on, and may confirm that the task was received from a legitimate code provider by verifying that the information displayed in the designated area of the screen <NUM> (e.g., the code provider's certificate identity image) corresponds to the user's expectations for this task.

If, for example, the information displayed on the screen <NUM> does not match the user's expectations -- e.g., the code provider's name is incorrect, or the wrong identity image is displayed -- the user may take an appropriate action to halt the task. For example, the user could press a special key combination on the keyboard <NUM> to instruct the supervisor <NUM> to terminate the secure session. Alternatively, if the information displayed on the screen <NUM> does match the user's expectations but the indicator <NUM> is off (which may happen, for example, if the operating system <NUM> is compromised and an attacker controlling the operating system <NUM> simulates screen output without relegating control to the secure zone <NUM>), the user may similarly take any appropriate action to halt the task. Thus, in order for the user to be assured he is working in a completely secure environment, both (i) the identity image should be displayed in the designated area of screen <NUM> and (ii) the indicator <NUM> should be on.

In certain embodiments, the code provider may decide that the task does not require provision of a fully secure environment to the user, but rather requires access to the full area of the screen <NUM> (i.e., "full-screen secure mode"). This may be implemented, for example, by setting a boolean flag, indicating whether to use full-screen or partial-screen (i.e., displaying the identity image) mode; to ensure security, supervisor <NUM> may ensure that indicator <NUM> is on only in partial-screen secure mode (i.e., when the identity image is displayed) If, at step <NUM>, it is determined that the task should run in full-screen secure mode, the supervisor <NUM> may grant the secure processor <NUM> access to the whole screen <NUM> and proceed to step <NUM>. Full-screen mode might be useful, for example, if the user simply wishes to decrypt and display protected media content he already possesses -- the secure zone <NUM> provides useful technical capabilities (such as the crypto engine <NUM> and decoder <NUM>) -- but does not require the fully secure environment that he might use in situations such as secure communications.

At step <NUM>, the supervisor <NUM> may load the received code into the instruction memory <NUM>, may store any received application data into the data memory <NUM>, and may instruct the secure processor <NUM> to begin executing the received code.

At step <NUM>, the supervisor <NUM> may begin waiting for one or more events related to code execution. For example, at transition <NUM>, code running on the secure processor <NUM> may request the supervisor <NUM> to switch into full-screen secure mode and obtain access to the whole screen <NUM> (i.e., without having the "identity image" being shown). In such a case, as described above, at step <NUM>, the supervisor <NUM> may turn off the indicator <NUM> to demonstrate that supervisor <NUM> no longer controls the output to the screen <NUM> (and therefore that a designated portion of the screen cannot be used to identify the code provider). The supervisor <NUM> also may instruct the mixer <NUM> to show only information from the decoder <NUM> on the screen <NUM>, effectively granting the whole screen <NUM> to the code running on the secure processor <NUM>.

At transition <NUM>, code running on the secure processor <NUM> may request the supervisor <NUM> to switch back into a partial-screen secure mode and redisplay the identity image of the task provider. This may happen, for instance, if a user wished to confirm that the code of the same provider is still running. In this case, at step <NUM>, the supervisor <NUM> may instruct the mixer <NUM> to show information from the decoder <NUM> only on the designated portion of screen <NUM>, while on the other portion the supervisor <NUM> will begin redisplaying the identity image. The supervisor <NUM> also may turn on the indicator <NUM> to assure the user that the displayed is a legitimate identity image.

If, at transition <NUM>, the code execution has finished, the code running on the secure processor <NUM> may send a notification back to the supervisor <NUM> notifying it that code execution has finished, and the supervisor <NUM> may perform certain steps to transition control back to the non-secure zone <NUM>.

In some embodiments it may happen that, as shown at transition <NUM>, code running on the secure processor <NUM> terminates abnormally (for example, via a secure processor <NUM> exception).

In this case, at step <NUM>, the supervisor <NUM> may display a notification message to the user indicating that a secure task has been abnormally terminated and that the system is about to switch to non-secure mode of operation. The method may wait at step <NUM> until the user confirms that she has viewed this notification message (for example, by pressing a button on the keyboard). This confirmation may be desirable because, otherwise, the user may have the erroneous perception that the secure task is still running after it has actually abnormally terminated. In some embodiments, this notification message may be shown only if the task has changed its mode from partial-screen mode to full-screen mode at least once during task execution time.

At step <NUM>, the supervisor <NUM> may begin a "cleanup" routine and clear all the instruction and data memories <NUM> and <NUM> (for example, by zeroing them). At step <NUM>, the supervisor <NUM> may shut off the indicator <NUM>. Finally, at step <NUM>, the supervisor <NUM> may transfer control of any I/O devices back to the non-secure zone <NUM>; for example, it might instruct the keyboard switch <NUM> to process keyboard <NUM> input through the operating system <NUM> of the computing device <NUM>, as well as to instruct the mixer <NUM> to display information which comes from the operating system <NUM>, on screen <NUM>.

In certain embodiments it may be desirable for a task to include more than one piece of code. This may allow for secure processing in substantially more complicated environments, such as in the case of secure credit card processing.

<FIG> illustrates one exemplary data structure for implementing tasks with two pieces of executable code (and data associated with each piece of executable code). As shown on <FIG>, a "subtask" <NUM> may be formed by code2 <NUM>, data2 <NUM>, and an associated digital signature2 <NUM>. The task <NUM> may be formed by code1 <NUM> and data1 <NUM> together with the subtask <NUM>, all of which may be encompassed by signature1 <NUM>.

It is to be understood, however, that a task <NUM> may contain more than one subtask <NUM> (with each subtask potentially having its own set of digital certificates and permissions). This may be used, for example, such that the task may switch execution to one of its subtasks, wait for the subtask's termination and then switch to another subtask. It is further possible that one or more of the subtasks may contain further sub-subtask and so forth.

Both the task <NUM> and the subtask <NUM> may have certain permissions, which describe the access their respective code may have to various portions of the secure zone <NUM> and/or any peripheral devices (such as, the keyboard <NUM> and/or the screen <NUM>). For example, code2 <NUM> (within subtask <NUM>) may be permitted to access portions of the secure zone <NUM> as described in permissions2 <NUM>, while the permissions1 <NUM> may describe which portions of the secure zone <NUM> may be accessed by code1 <NUM>. These permissions may be stored within digital certificates signed by, for example, one or more certificate authorities. As shown on <FIG>, a first digital certificate <NUM> may contain permissions1 <NUM>, while a second digital certificate <NUM> may contain permissions2 <NUM>. These permissions may be implemented, for instance, within the "Extended Key Usage" field in an X. <NUM> certificate. In some embodiments, certificates may not be included in the task, but may be obtained separately without affecting security.

In some embodiments, it may be desirable for a code developer to be able to assign permissions to the code she develops. For example, for additional security, the code developer may wish to reduce the permissions associated with a particular task or subtask. In these embodiments, another set of permissions may be included within the task (or the subtask, as applicable). To the extent any such secondary permissions are included within a task or subtask, however, it may be desirable to have the supervisor <NUM> interpret these permissions in view of any existing permissions already signed by a certificate authority. For example, if the code developer wants to add an additional set of permissions to code1 <NUM>, then these additional permissions may only modify permissions1 <NUM>. It may further be desirable to require that any such secondary permissions cannot exceed their respective underlying permissions. For example, in the case of code1 <NUM>, the additional permissions may not be permitted to enlarge the scope of permissions1 <NUM> as provided by the certificate authority.

When the supervisor <NUM> receives a task (such as the task <NUM> containing the subtask <NUM> as shown in <FIG>), the supervisor <NUM> may load code1 <NUM> and data1 <NUM> into instruction memory <NUM> and data memory <NUM>, as appropriate, for subsequent execution (e.g., as described in greater detail above with respect to <FIG> at step <NUM>). During the execution of the code1, the supervisor <NUM> may enforce restrictions specified in permissions1 <NUM>. Upon receipt of the task, the supervisor <NUM> may also store permissions2 <NUM>, code2 <NUM>, and data2 <NUM> somewhere within the secure zone <NUM> (for example, code2 <NUM> may be stored in instruction memory <NUM> and data2 <NUM> may be stored in data memory <NUM> - potentially in encrypted form to prevent misuse). At this point, however, neither the code2 (nor its associated permissions2 <NUM> or data2 <NUM>) takes any active part in the execution of code1.

As described in greater detail previously, with respect to <FIG>, at step <NUM>, the supervisor <NUM> waits for one or more task-related events. Such events may include certain types of requests from the currently-running code to the supervisor <NUM>. In embodiments supporting complex tasks, for example, as described with respect to <FIG>, the supervisor <NUM> may support requests from currently-running code to execute one or more subtasks. For example, the supervisor <NUM> may support a request from code1 <NUM> to execute code2 <NUM>. Such a request may contain, for example, the start and end of a region within the data memory <NUM> which code2 <NUM> may be allowed to use for its own purposes, and the start and end of an area within the data memory <NUM> which will be accessible for both code1 <NUM> and code2 <NUM> for the purpose of exchanging data between code1 <NUM> and code2 <NUM>.

<FIG> is one exemplary logical division of data memory <NUM> into three areas, which can be used by two pieces of code, code1 <NUM> and code2 <NUM>. It will be understood, however, that the relative location and size of the three areas is merely exemplary and can depend on many factors, including the preferences of the developers of code1 and any guidelines for adding a subtask <NUM> to a task <NUM> (which may be created, for instance, by the developers of subtask <NUM>). As shown on <FIG>, data memory block <NUM> is "private" for code1; data memory block <NUM> is "private" for code2; and data block <NUM> is a shared area which may be accessible to both code1 and code2. For example, if the shared data block <NUM> is used, code1 may store some data within the shared memory area <NUM> that may be accessed by code2 when code1 is suspended and code2 is loaded for execution. Similarly, code2 may store data within the shared memory area <NUM> that may be accessed by code1 when code2 is terminated and code1 is resumed.

<FIG> illustrates one exemplary method by which the supervisor <NUM> may handle a request from a task <NUM> currently running on the secure processor <NUM> to call a subtask <NUM>.

At step <NUM>, the supervisor <NUM> may instruct the secure processor <NUM> to suspend execution of code1 <NUM>. At step <NUM>, the supervisor <NUM> may store the current state of the task <NUM>. For example, the supervisor <NUM> may store the current state of code1 <NUM>. In certain embodiments, this might call for the supervisor <NUM> to store a current value of a program counter register and/or any other registers of the secure processor <NUM> within temporary storage <NUM> of the supervisor <NUM>. The supervisor <NUM> also may preserve the current state of any data memory <NUM> associated with code1 <NUM>. This may include, for example, instructing the secure processor <NUM> (and/or the data memory <NUM>) to restrict access of the code running on secure processor <NUM> (i.e., code <NUM><NUM>) to the data memory areas <NUM> and <NUM>. In addition to, or instead of, such restriction, the supervisor <NUM> may encrypt the data memory area <NUM>, and/or calculate a secure hash (such as SHA-<NUM>) of the data memory area <NUM> and store the value of this hash within the temporary storage <NUM> of the supervisor <NUM>. The supervisor <NUM> further may store the current state of any peripherals (such as the screen <NUM>, and/or the keyboard <NUM>). For example, the supervisor <NUM> may read the current state of any LEDs on the keyboard <NUM> and store them within the temporary storage <NUM>. Similarly, the supervisor <NUM> may read the state of screen <NUM> and store it (for example, as an array of pixels) within the temporary storage <NUM>.

At step <NUM>, the supervisor <NUM> may switch control of any peripherals according to the permissions2 <NUM> of the subtask <NUM>. For example, in certain embodiments, the permissions1 <NUM> of task <NUM> may allow the code1 <NUM> to access certain peripherals (such as the keyboard <NUM>) but permissions2 <NUM> of subtask <NUM> may prohibit code2 <NUM> from accessing some of peripherals allowed in permissions1 <NUM>. In addition, the screen <NUM> also may be cleared at this step <NUM>.

At step <NUM>, the supervisor <NUM> may execute a cleanup routine to ensure that the subtask code2 <NUM> which is about to run is not affected by any data left in the data memory <NUM> by the execution of code1 <NUM>. For example, the supervisor <NUM> may zero data memory area <NUM>.

At step <NUM>, the supervisor <NUM> may instruct the secure processor <NUM> to begin executing code2 <NUM>. For example, the supervisor <NUM> may direct the secure processor <NUM> to start execution at a predefined point within code2. Alternatively, the starting point of code2 may be included in the task <NUM>. The supervisor <NUM> may also provide a reference to the secure processor <NUM> allowing it to locate and access data memory areas <NUM> and <NUM> intended for use by code2 <NUM>. For example, in certain embodiments, the supervisor <NUM> may pass a pointer to the secure processor <NUM> referencing these memory locations via one or more registers located within the supervisor <NUM>.

During the execution of code2 <NUM> (as shown at step <NUM>), the supervisor <NUM> may enforce any permissions2 <NUM> associated with the code2 <NUM>. For example, if at step <NUM>, the supervisor <NUM> receives a request from code2 <NUM> for full-screen control (e.g., corresponding to step <NUM>, as shown on <FIG>), the supervisor <NUM> may verify whether the permissions2 <NUM> allow the code2 <NUM> to assume such full-screen control and proceed with step <NUM> only if those permissions2 <NUM> permit full-screen control.

At step <NUM>, code2 <NUM> may have terminated its execution, i.e., the subtask <NUM> may be completed. At step <NUM>, the supervisor <NUM> may perform one or more cleanup activities in preparation for transitioning back to the execution of code1; for example, the supervisor <NUM> may zero the memory area <NUM>. At step <NUM>, the supervisor <NUM> may switch the control of any peripherals (such as screen <NUM> and/or keyboard <NUM>) back to the state they were in before execution of code2 started (or in accordance with the permissions1 <NUM>, if the peripherals' state was not stored at the time the subtask <NUM> began).

At step <NUM>, the supervisor <NUM> may restore the state of the task <NUM>, which was stored at step <NUM>. For example, the supervisor <NUM> may restore the state of code1, such that it begins executing where it left off at the time the subtask <NUM> was called. This may be accomplished by, for example, updating a program counter and/or any other registers of the secure processor <NUM> to the values stored in temporary storage <NUM>, for example, during step <NUM>. If the memory area <NUM> was encrypted at step <NUM>, the supervisor <NUM> may ensure that it is decrypted. If a secure hash was calculated at step <NUM>, the hash may be recalculated and compared to the original hash value. If the hash calculated at this step <NUM> does not match the hash value stored at step <NUM>, it may be deduced that code2 has managed to violate the integrity of codel's data memory block <NUM>, and the execution of code1 should not be resumed (possibly with an appropriate message to the user). Additionally, if at step <NUM>, the secure processor <NUM> and/or the data memory <NUM> were instructed to restrict access only to data blocks <NUM> and <NUM>, at this step <NUM> the supervisor <NUM> may lift this restriction, and code1 <NUM> (and the secure processor <NUM>) may receive access to the entire data memory <NUM>. Finally, the state of any peripherals (such as the keyboard <NUM>) stored, for example, in step <NUM>, may be restored. If the state of the screen <NUM> was stored, the state of screen <NUM> may be restored to the stored value; otherwise, the screen <NUM> may be blanked.

At step <NUM>, the supervisor <NUM> may instruct the secure processor <NUM> to resume the execution of code <NUM><NUM>.

The embodiments described thus far have detailed three modes of operation of the device <NUM>: "non-secure mode," "full-screen secure mode," and "partial-screen secure mode. " To indicate that the device <NUM> is operating in "partial-screen secure mode," as described above, the indicator <NUM> may be turned on. In another embodiment according to the present disclosure, the device <NUM> may run in a fourth "super-secure" or "extra-secure" mode of operation, as will be described in further detail below. In such an embodiment, the indicator <NUM> may have another "super-secure" state (in addition to the "off" and "on" states described above); this super-secure state of the indicator <NUM> may indicate that device <NUM> is currently operating in super-secure mode. In such an embodiment, for example, the indicator <NUM> may be implemented as two separate LEDs (each readily visible to the user). If one LED is on, it may indicate that the device <NUM> is operating in the partial-screen secure mode (described in greater detail previously); if two LEDs are on, the device <NUM> may be operating in a super-secure or extra-secure mode. Whether any piece of code (such as code1 <NUM> or code2 <NUM>) is allowed to switch to super-secure mode may be specified within its respective permissions fields (e.g., permissions1 <NUM> or permissions2 <NUM> respectively).

<FIG> is an exemplary embodiment demonstrating how a particular task, a secure credit card transaction, may be performed within the present disclosure. In addition to its applicability to the present disclosure, the method shown on <FIG> may be used to implement the functionality described in <CIT>, titled "Apparatuses, Methods And Systems For Computer-Based Secure Transactions," and naming Sergey Ignatchenko and Dmytro Ivanchykhin as inventors.

At step <NUM>, a user may browse the Internet using a web browser (running as an application <NUM> under operating system <NUM>) on her computer <NUM>. Using his browser, the user may visit an E-commerce site of the merchant, select some items to buy, and proceed to check out by selecting a correspondent web link.

At step <NUM>, the user's browser may make a request to the server defined in the web link, receive the response, and determine that the received data is a task to be performed in a secure mode. The browser may determine this, for example, by a special form of the URL in the web link, or by the structure of the received data.

At step <NUM>, the web browser may send the task to the interface <NUM> of a secure zone <NUM> running on the user's computing device <NUM>. This may be performed, for example, by a call to the operating system <NUM>, which in turn may pass the information to the interface <NUM>.

The task sent to the secure zone <NUM> may be structured as shown on <FIG>, wherein the overall task <NUM> (i.e., code1 <NUM> and data1 <NUM>) may be provided by the merchant (with signature1 <NUM> being the digital signature of the merchant on this code and data), and wherein the subtask <NUM> (i.e., code2 <NUM> and data2 <NUM>) may be provided, for example, by the merchant's bank (usually referred to as the acquiring bank), or any other entity which the merchant's bank trusts, with signature2 <NUM> as the digital signature of the trusted bank/entity.

For the purposes of the present example, it may be assumed that significant control may be exercised over banks or trusted entities, such that the probability that code2 or data2 contains malicious code or data is very low or eliminated. By contrast, it is assumed that merchants are not as secure, and that there is a possibility that code or data provided by a merchant may be malicious. Thus, in this example, it may be assumed that a certificate authority will not issue any certificate! <NUM> for a (merchant's) task <NUM> such that the task would have permissions1 <NUM> to run code1 <NUM> in the "super-secure" mode. However, certificate authorities may issue a certificate2 <NUM> with permissions2 <NUM> allowing a (bank's) subtask <NUM> to enter "super-secure" mode. This approach may be used to ensure that credit card data (including a PIN) cannot be accessed by a malicious merchant, and further may be used to provide a sufficient evidentiary record for future dispute resolution.

At step <NUM>, the supervisor <NUM> may receive the task <NUM>, verify its integrity and load it into the instruction memory <NUM> of the secure zone <NUM> (e.g., in accordance with steps <NUM> - <NUM>, as discussed in greater detail with respect to <FIG>). In particular, the supervisor <NUM> may display to the user an "identity image" of the certificate1 <NUM>, which will give an opportunity to the user to make sure that the task <NUM> has come from an expected source, i.e., the E-commerce vendor from whom she intends to purchase an item.

At step <NUM>, code1 <NUM> (which belongs to the merchant) can be executed, in a secure mode. This code may be executed with the supervisor <NUM> displaying the "identity image" of the certificate <NUM><NUM> in the designated area of screen <NUM>, and with the indicator <NUM> in a "secure" state. This code1 <NUM> may implement some (optional) interaction with the user, and/or secure communications with a remote server. For example, the user may be requested to select a product or product options (such as color, size, etc.). This interaction may continue until the user decides to quit (in which case the code1 may terminate), or until the user decides to go ahead with a purchase, specifying all the terms of the purchase (including total amount to be charged, product, delivery address, etc.).

In cases in which code1 initiates a secure connection with a merchant's server, code1 <NUM> may ensure that the operating system <NUM> cannot eavesdrop or modify the communication. To achieve this, in one embodiment, code1 <NUM> may contain an implementation of an entire TCP/IP stack, and the secure processor <NUM> may directly access the communications port <NUM> of the computing device <NUM>. In another embodiment, a TCP/IP stack (optionally including SSL support) may be implemented by the supervisor <NUM>. In yet another embodiment, code1 <NUM> running on the secure processor <NUM> may use the network transport capabilities (e.g., the TCP/IP stack) of the non-secure operating system <NUM>, so that the operating system <NUM> is used merely as an intermediary to transmit secure packets or messages (e.g., SSL messages) without the capability to determine and/or alter the content of the secure packets or messages. In the latter case, the secure processor <NUM> may communicate, through the interface <NUM>, with the non-secure operating system <NUM>. In particular, code <NUM> may send requests to perform TCP/IP operations and then send and receive SSL messages over a TCP/IP connection established on its behalf by operating system <NUM>. In this example, the operating system <NUM> provides only TCP/IP capabilities, with all SSL cryptography residing within secure zone <NUM>.

At step <NUM>, if all of the terms of the purchase are finalized and the user wants to go ahead with the purchase, code1 <NUM> may collect transaction completion data. This information may include transaction details (which may be in form of textual description or one or more images, which may include, for example, a description of the products involved and/or delivery address), and the transaction amount (which may include transaction currency).

At step <NUM>, code1 <NUM> may designate some area of the data memory <NUM> to be used as shared memory area <NUM> and some area for code2 <NUM> to use as its own data memory area <NUM>; store the transaction completion data (e.g., as generated at step <NUM>) in shared memory area <NUM>; and then request the supervisor <NUM> to start executing code2. The supervisor <NUM> may then transition control to code2 <NUM>, e.g., in accordance with steps <NUM>-<NUM> as described above with respect to <FIG>.

If permissions2 <NUM> indicate that code <NUM><NUM> may run in "super-secure" or "extra-secure" mode, then supervisor <NUM> may switch the indicator <NUM> to a "super-secure" state (e.g., by turning on two LED lights of the indicator <NUM>), which indicates to the user that the information that the user may enter will not be accessible to the merchant but only to the bank (or an equivalently trusted entity). Additionally, permissions2 may specify that the supervisor <NUM> may allow the secure processor <NUM> access to a credit card reader (not shown).

At step <NUM>, code2 <NUM> may display transaction completion data (collected in step <NUM> and passed to code2 via shared memory area <NUM> in step <NUM>), and ask the user (by, for example, displaying instructions on the screen <NUM>) to confirm that user is going to complete the transaction and/or to provide relevant information. For example, the user may be requested to insert a credit card into a card reader (not shown), enter a PIN number using the keyboard, and/or to confirm that she agrees with the specifics of the transaction (e.g., items, amounts, totals, etc.) as it is displayed on the screen <NUM>. Code2 <NUM> may process any available inputs (for example, code2 <NUM> may read the PIN as it is entered on keyboard <NUM>, and read credit card data from credit card reader).

In embodiments in which the user has entered a PIN, at step <NUM>, code2 may perform PIN verification. This PIN verification may be implemented as either "offline PIN" verification (i.e., using the card to validate the PIN), or "online PIN" verification (i.e., issuing a request to the payment network - via the server - to validate the PIN).

At step <NUM>, if the credit card is an ICC and the card reader has ICC reading capabilities, code2 <NUM> may digitally sign the transaction details displayed to the user by ICC (by, for example, using a MAC in a manner similar to which it is used in the EMV protocols, or by using public/private cryptography). The digital signature may encompass the transaction details as they were shown to the user, or alternatively, it may encompass hash values that were calculated for such transaction details. The digital signature may also take into account a PIN if it was used. Even if the PIN is taken into account in calculating the digital signature, it may be desirable to ensure that the PIN itself is not included in the message sent to the merchant so as to avoid revealing the PIN to the merchant.

At step <NUM>, code2 <NUM> may send a transaction request to a merchant server. This request may include transaction completion data (e.g., merchant identity, transaction details and transaction amount) as well as a digital signature if one was calculated (e.g., as in step <NUM>). The transaction request may be sent to the merchant server, for example, over a secure SSL channel. Such an SSL channel may be established either by code2 independently (in a manner similar to that of described in step <NUM>), or the SSL context of the SSL connection established by code1 can be used. In the latter case, in step <NUM>, code1 <NUM> may store the existing SSL context to the shared memory area <NUM> (wherein the SSL context is a data structure representing the context of the SSL connection), and code2 <NUM> may use this context to continue the existing SSL conversation.

At step <NUM>, code2 <NUM> may wait for a transaction result from the merchant's server. When code2 receives the transaction results from the merchant's server, it may display transaction results to the user, and wait for the user's confirmation that he has seen the transaction results. Then code2 <NUM> may write the results to the shared memory area <NUM> (for later use by code1 <NUM>) and terminate.

In some embodiments, instead of code2 <NUM> performing steps <NUM> and <NUM>, code2 <NUM> may prepare the transaction request (including the digital signature from step <NUM> if necessary) and then terminate, leaving the remaining steps of sending the transaction to the server and interpreting the response to code1 <NUM>.

After code2 <NUM> terminates, the supervisor <NUM> may perform any steps necessary to switch back to running code1 <NUM>. For example, the supervisor <NUM> may perform steps similar to those discussed with respect to steps <NUM>-<NUM> of <FIG>, and may further switch the indicator <NUM> back to the "secure" state from the "super-secure" state, disconnect the credit card reader from the secure processor <NUM>, and resume execution of code1 <NUM>.

At step <NUM>, the code1 may analyze the transaction results that were stored to the shared memory area <NUM> by code2 and, depending on the results of the analysis, either continue interaction with the user, or terminate.

<FIG> is a flow chart illustrating how a merchant may process a transaction request received from a computing device <NUM>. At step <NUM>, the merchant may receive a transaction request (e.g., formed by the computing device at step <NUM>) and may verify that the currency and the amount of the transaction, and the hash of the merchant ID and the transaction details (which, as discussed with respect to step <NUM>, may be the actual transaction details or respective hash values depending on the embodiment) conform with the merchant's expectations of what was displayed to and accepted by the user. If, at step <NUM>, the merchant determines that the received values are not the same as that expected by the merchant, the merchant may elect to decline the transaction at step <NUM> as potentially based on fraudulent or malicious information, and proceed to step <NUM>. If on the other hand at step <NUM> the received values are the same as that expected by the merchant, at step <NUM>, the merchant may save a copy of the message for its own records and for possible future dispute resolution purposes and transmit the message to the bank for further transaction processing.

It is to be understood that while the merchant may be able to verify whether the received transaction details conform to the merchant's expectations, the merchant may not have access to the user's sensitive information (such as, for example, the user's credit card number, PIN, or other information that is intended to be received by the bank and not the merchant). Similarly, the merchant may not be able to verify the signature of the message as signed by code2 whereas the bank may have that ability.

At step <NUM>, the bank may receive the message, verify its signature, and performs other approval procedures (for example, verifying whether the user has sufficient funds to perform the transaction). In particular, if signature verification fails, the bank may decline the transaction as based on inconsistent information.

At step <NUM>, the bank informs the merchant whether the transaction has been approved or denied. At step <NUM> the merchant may forward information regarding the transaction status (e.g., whether accepted or declined, estimated delivery date, etc.) to the to the computer <NUM>. Additionally, at step <NUM>, the merchant may store the confirmation from the bank and the information sent to the user for its own records and possible future dispute resolution purposes.

Separately, if the transaction has been accepted, the merchant may proceed at an appropriate time to ship or deliver the purchased goods to the user.

It is to be recognized that even if the merchant may not be able to verify the signature (which is the case if MAC-like signatures are used), transaction security and integrity is maintained by the fact that the bank has the ability to check the signature. Thus, even if the transaction data communicated by the device <NUM> to the merchant matches the merchant's expectation, the transaction may still be rejected by the bank if the bank cannot verify the signature. Accordingly, a transaction is approved after both the transaction data and the signature have been appropriately verified.

While specific embodiments and applications of the present invention have been illustrated and described, it is to be understood that the invention is not limited to the precise configuration and components disclosed herein. The terms, descriptions and figures used herein are set forth by way of illustration only and are not meant as limitations. Various modifications, changes, and variations which will be apparent to those skilled in the art may be made in the arrangement, operation, and details of the apparatuses, methods and systems of the present invention disclosed herein. By way of non-limiting example, it will be understood that the block diagrams included herein are intended to show a selected subset of the components of each apparatus and system, and each pictured apparatus and system may include other components which are not shown on the drawings. Additionally, those with ordinary skill in the art will recognize that certain steps and functionalities described herein may be omitted or re-ordered without detracting from the scope or performance of the embodiments described herein.

To illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. The described functionality can be implemented in varying ways for each particular application--such as by using any combination of microprocessors, microcontrollers, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), and/or System on a Chip (SoC)--but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.

Claim 1:
An apparatus (<NUM>), comprising:
a memory configured to store data;
a secure zone (<NUM>) comprising an interface (<NUM>) and configured to execute a task comprising a subtask that communicates one or more data packets over a network, wherein the memory is cleared of data related to the subtask after executing the subtask; and
a non-secure zone (<NUM>) coupled to the secure zone (<NUM>) via the interface (<NUM>), wherein the secure zone is configured to use network capabilities of the non-secure zone to communicate the one or more data packets over the network according to the subtask, and wherein the network capabilities of the non-secure zone receive the data packets communicated from the secure zone via the interface.