Patent Description:
Nanopore membrane devices having pore sizes on the order of one nanometer in internal diameter have shown promise in rapid nucleotide sequencing. When a voltage potential is applied across a nanopore immersed in a conducting fluid, a small ion current attributed to the conduction of ions across the nanopore can exist. The size of the current is sensitive to the pore size and which molecule is in the nanopore. The molecule can be a nucleotide itself (e.g., as part of a nucleic acid) or a particular tag attached to a particular nucleotide, thereby allowing detection of a nucleotide at a particular position of a nucleic acid. A voltage in a circuit including the nanopore can be measured (e.g., at an integrating capacitor) as a way of measuring the resistance of the molecule, thereby allowing detection of which molecule is in the nanopore.

Even though nanopore-based sequencing sensor chips have been successful in some applications, improvements are still desirable. For example, there is a need for improved nanopore well structures and methods. In some cases, it has been found that working electrodes of nanopore-based sequencing sensor chips are preferably made from porous electrode material to maximize capacitance and surface area. Because reliable porous working electrodes with desired characteristics (such as wettability and adequate capacitance) are critical for the operation of nanopore-based sequencing devices, methods of protecting the working electrode during manufacture are implemented. In particular, the working electrode must be protected while hydrophobic cladding is deposited and patterned to form the well of the nanopore cell. Some methods of protecting porous working electrodes include application of a protective layer (such as a dielectric layer) to be used as a buffer layer or sacrificial layer to protect a porous working electrode during subsequent steps. In many cases, it is desirable to easily remove the protective layer by chemical processes, thus exposing the porous working electrode for operation. However, the chemicals used to remove the protective layers can potentially attack other layers if not accounted for in the structure and process of forming the porous electrode and the nanopore cell.

<CIT> discloses a nanopore-based sequencing chip with a substrate having a conductive layer disposed in a top portion of the substrate and a dielectric layer surrounding the conductive layer, which can be connected to a circuit. <CIT> also discloses a process for producing such a chip where a sacrificial metal layer is used for protecting a porous working electrode during cell manufacturing. During this manufacture, the layer of dielectric is etched to create an opening to expose a top surface of conductive layer. The porous electrode layer is then formed on the conductive layer in this opening of a first dielectric layer. The porous electrode can be a porous TiN layer and can be grown in a manner to create rough, sparsely-spaced columnar structures or columns of crystals that provide a high specific surface area that can come in contact with an electrolyte.

Accordingly, nanopore cells and methods for forming nanopore cells are described in accordance with embodiments of the present disclosure. The nanopore cells and method for forming the nanopore cells ensure that the working electrodes are structurally sound so that the chemical removal of protective layers does not negatively affect other components of the nanopore cell. In particular, the nanopore cells and methods for forming the nanopore cells ensure that the working electrodes are formed with seamless columns of porous materials, which reduces the likelihood of chemicals seeping into and damaging other layers of the nanopore cell.

Embodiments are directed to a method for forming a nanopore cell. The method of the present invention includes providing a device structure comprising a conductive layer disposed on a top portion of a substrate and an interconnect dielectric layer overlying the conductive layer. The method includes removing a portion of the interconnect dielectric layer to form a planar electrode support surface. The planar electrode support surface includes an exposed island of the conductive layer surrounded by a remaining portion of the interconnect dielectric layer. The method further includes depositing a porous electrode material on the planar electrode support surface to form a seamless porous electrode layer. The seamless porous electrode layer includes columns of the porous electrode material. The method further includes depositing a protective layer on the seamless porous electrode layer, patterning the seamless porous electrode layer and the protective layer to a form a working electrode island, depositing and patterning a hydrophobic cladding on the working electrode island to form the sidewalls of a well of the nanopore cell, and removing at least a portion of the protective layer to expose the porous electrode layer. The exposed porous electrode layer forms at least a portion of a bottom wall of the well of the nanopore cell.

Some embodiments may include a nanopore cell. The nanopore cell of the present invention includes a substrate, an electrode support layer overlying a top portion of the substrate, and a well. The electrode support layer includes a conductive layer island surrounded by an interconnect dielectric layer and a planar top surface formed by the conductive layer island and the interconnect dielectric layer. The well includes a seamless porous working electrode island disposed on the planar top surface of the electrode support layer, hydrophobic cladding surrounding the seamless porous working electrode island and patterned to form sidewalls of the well, and a cavity formed by the hydrophobic cladding and the seamless porous working electrode island. The seamless porous working electrode island includes columns of a porous electrode material. In some embodiments, the seamless working electrode island further includes a protective layer disposed on the columns of porous electrode material, wherein the protective layer is configured to be selectably removable to expose the porous electrode material to the cavity.

A better understanding of the nature and advantages of embodiments of the present invention may be gained with reference to the following detailed description and the accompanying drawings.

A "nanopore" refers to a pore, channel or passage formed or otherwise provided in a membrane. A membrane can be an organic membrane, such as a lipid bilayer, or a synthetic membrane, such as a membrane formed of a polymeric material. The nanopore can be disposed adjacent or in proximity to a sensing circuit or an electrode coupled to a sensing circuit, such as, for example, a complementary metal oxide semiconductor (CMOS) or field effect transistor (FET) circuit. In some examples, a nanopore has a characteristic width or diameter on the order of <NUM> nanometers (nm) to about <NUM>. Some nanopores are proteins.

A "well" in a nanopore device refers to a structure formed by insulating walls and a working electrode into which an electrolyte may be contained. A "well profile" refers to a structural description of the well and can include measures of an angle and a sharpness of a well edge. A "cell" of a nanopore device can include at various stages of operation: a well, a nanopore (e.g., in a membrane across the well), and a working electrode, as well as other circuitry, e.g., data acquisition circuitry.

A "dielectric material" refers to an electrical insulator that can be polarized by an applied electric field. When a dielectric is placed in an electric field, electric charges do not flow through the material as they do in a conductor, but only slightly shift from their average equilibrium positions causing dielectric polarization. A "conductive layer" refers to a layer of material that allows the flow of an electrical current in one or more directions. A metal wire is a common electrical conductor.

A "porous material" refers to a material that contains pores or voids at a surface of the material. A "spongy material" refers to a material having an open, porous structure.

In a nanopore device, a membrane can be formed over a well in a dielectric layer. For example, the membrane can include a lipid monolayer formed on top of the dielectric layer. As the membrane reaches the opening of well, the lipid monolayer can transition to a lipid bilayer that spans across the opening of the well. The structure of the well and the materials that form the well can perform important roles in the formation of the membrane and the insertion of the nanopore in the membrane, and the interaction between the materials forming the well can also affect the operation of the nanopore device.

The description below includes an overview of a structure and operation of nanopore cells. The impact of the structure of the well, the materials that form the well, and the interaction thereof are also discussed. The problems caused by the interaction between chemicals used to remove protective layers and a porous working electrode are also described, along with proposed solutions.

This section includes an introduction to the operation of a nanopore cell, cell structure and usage, and circuitry for measuring signal. The capacitive effects at a working electrode (referred to as a double layer capacitance) are explained, and example processes of constructing a porous working electrode are described.

<FIG> illustrates an embodiment of a cell <NUM> in an array of cells that form a nanopore-based sequencing chip. A membrane <NUM> is formed over the surface of the cell. In some embodiments, membrane <NUM> is a lipid bilayer. The bulk electrolyte <NUM> containing protein nanopore transmembrane molecular complexes (PNTMC) and the analyte of interest (e.g., a single polymer molecule, such as DNA) can be placed directly onto the surface of the cell. A single PNTMC <NUM> can be inserted into membrane <NUM> by electroporation. The individual membranes in the array are neither chemically nor electrically connected to each other. Thus, each cell in the array is an independent sequencing machine, producing data unique to the single polymer molecule associated with the PNTMC. PNTMC <NUM> can modulate the ionic current through the otherwise impermeable bilayer.

Analog measurement circuitry <NUM> is connected to a working electrode <NUM> (e.g., made of metal) covered by a volume of electrolyte <NUM> inside a well formed in an oxide layer <NUM>. The volume of electrolyte <NUM> is isolated from the bulk electrolyte <NUM> by the ion-impermeable membrane <NUM>. PNTMC <NUM> crosses membrane <NUM> and provides the only path for ionic current to flow from the bulk liquid to working electrode <NUM>. The cell also includes a counter electrode (CE) <NUM>. The cell also includes a reference electrode <NUM>, which can act as an electrochemical potential sensor.

<FIG> illustrates an embodiment of a cell <NUM> performing nucleotide sequencing with the nanopore-based sequencing by a synthesis (Nano-SBS) technique. In the Nano-SBS technique, a template <NUM> to be sequenced and a primer are introduced to cell <NUM>. To this template-primer complex, four differently tagged nucleotides <NUM>, A, T, G, and C are added to the bulk aqueous phase. As the correctly tagged nucleotide is complexed with the polymerase <NUM>, the tail of the tag is positioned in the barrel of nanopore <NUM>. The tag held in the barrel of nanopore <NUM> generates a unique ionic blockade signal <NUM>, thereby electronically identifying the added base due to the tags' distinct chemical structures.

<FIG> illustrates an embodiment of electrochemical cell <NUM> of a nanopore-based sequencing chip that includes a working electrode (e.g., TiN, which has a high electrochemical capacitance). Cell <NUM> includes a conductive or metal layer <NUM>. Metal layer <NUM> connects cell <NUM> to the remaining portions of the nanopore-based sequencing chip. In some embodiments, metal layer <NUM> is the top metal of the CMOS chip (e.g., metal <NUM> layer M6 of the underlying circuitry). Cell <NUM> further includes a working electrode <NUM> and a dielectric layer <NUM> above metal layer <NUM>. In some embodiments, working electrode <NUM> can be circular or octagonal in shape, and dielectric layer <NUM> forms the walls surrounding working electrode <NUM>. Cell <NUM> further includes a dielectric layer <NUM> above working electrode <NUM> and dielectric layer <NUM>. Dielectric layer <NUM> forms the insulating walls surrounding a well <NUM>.

In some embodiments, dielectric layer <NUM> and dielectric layer <NUM> together form a single piece of dielectric. Dielectric layer <NUM> is the portion that is disposed horizontally adjacent to working electrode <NUM>, and dielectric layer <NUM> is the portion that is disposed above and covering a portion of the working electrode. In some embodiments, dielectric layer <NUM> and dielectric layer <NUM> are separate pieces of dielectric and they may be formed separately. Well <NUM> has an opening above an uncovered portion of the working electrode. In some embodiments, the opening above the uncovered portion of the working electrode can be circular or octagonal in shape.

Inside well <NUM>, a volume of salt solution/electrolyte <NUM> is disposed above working electrode <NUM>. Salt solution <NUM> may include one of the following: lithium chloride (LiCl), sodium chloride (NaCl), potassium chloride (KCl), lithium glutamate, sodium glutamate, potassium glutamate, lithium acetate, sodium acetate, potassium acetate, calcium chloride (CaClz), strontium chloride (SrClz), manganese chloride (MnClz), and magnesium chloride (MgClz). In some embodiments, salt solution <NUM> has a thickness of about three microns (µm). The thickness of salt solution <NUM> may range from <NUM> - <NUM> microns.

The dielectric material used to form dielectric layers <NUM> and <NUM> includes glass, oxide, silicon mononitride (SiN), and the like. The top surface of dielectric layer <NUM> may be silanized. Silanization forms a hydrophobic layer <NUM> above the top surface of dielectric layer <NUM>. In some embodiments, hydrophobic layer <NUM> has a thickness of about <NUM> nanometers (nm). Alternatively, dielectric material that is hydrophobic such as hafnium oxide may be used to form dielectric layer <NUM>.

As shown in <FIG>, a membrane is formed on top of dielectric layer <NUM> and spans across well <NUM>. For example, the membrane includes a lipid monolayer <NUM> formed on top of hydrophobic layer <NUM> and as the membrane reaches the opening of well <NUM>, the lipid monolayer transitions to a lipid bilayer <NUM> that spans across the opening of the well. Hydrophobic layer <NUM> facilitates the formation of lipid monolayer <NUM> above dielectric layer <NUM> and the transition from a lipid monolayer to a lipid bilayer. A bulk electrolyte <NUM> containing protein nanopore transmembrane molecular complexes (PNTMC) and the analyte of interest is placed directly above the well. A single PNTMC/nanopore <NUM> is inserted into lipid bilayer <NUM> by electroporation. Nanopore <NUM> crosses lipid bilayer <NUM> and provides the only path for ionic flow from bulk electrolyte <NUM> to working electrode <NUM>. Bulk electrolyte <NUM> may further include one of the following: lithium chloride (LiCl), sodium chloride (NaCl), potassium chloride (KCl), lithium glutamate, sodium glutamate, potassium glutamate, lithium acetate, sodium acetate, potassium acetate, calcium chloride (CaCb), strontium chloride (SrCb), manganese chloride (MnCb), and magnesium chloride (MgCb).

Cell <NUM> includes a counter electrode (CE) <NUM>. Cell <NUM> also includes a reference electrode <NUM>, which acts as an electrochemical potential sensor. In some embodiments, counter electrode <NUM> can be shared between a plurality of cells, and is therefore also referred to as a common electrode. The common electrode can be configured to apply a common potential to the bulk liquid in contact with the nanopores in the measurements cells. The common potential and the common electrode are common to all of the measurement cells.

Working electrode <NUM> is a titanium nitride (TiN) working electrode with increased electrochemical capacitance. The electrochemical capacitance associated with working electrode <NUM> may be increased by maximizing the specific surface area of the electrode. The specific surface area of working electrode <NUM> is the total surface area of the electrode per unit of mass (e. , m<NUM>/kg) or per unit of volume (e. , m<NUM>/m<NUM>, m<NUM>/m<NUM>, or m-<NUM> or per unit of base area (e. , m<NUM>/m<NUM>). As the surface area increases, the electrochemical capacitance of the working electrode increases, and a greater amount of ions can be displaced with the same applied potential before the capacitor becomes charged. The surface area of working electrode <NUM> may be increased by making the TiN electrode "spongy" or porous. The TiN sponge soaks up electrolyte and creates a large effective surface area in contact with the electrolyte. The techniques for making and using a TiN is described further in <CIT>.

Other materials that can be used to form the working electrode include ruthenium, as described further in International Patent Publication <CIT>.

The ratio of the capacitance associated with the membrane (Cmembrane) and the capacitance associated with the working electrode (Celectrochemical) may be adjusted to achieve optimal overall system performance. Increased system performance may be achieved by reducing Cmembrane while maximizing Celectrochemical. Cmembrane can be adjusted to create the required RC time constant without the need for additional on-chip capacitance, thereby allowing a significant reduction in cell size and chip size.

In cell <NUM>, the base surface area of the opening of well <NUM> (which is the same as the base surface area of lipid bilayer <NUM>) and the base surface area of working electrode <NUM> are determined by the dimensions of dielectric layer <NUM> and dielectric layer <NUM>, respectively. The base surface area of working electrode <NUM> is greater than or equal to the base surface area of the opening of well <NUM>. Therefore, the two base surface areas may be optimized independently to provide the desired ratio between Cmembrane and Celectrochemical. As shown in <FIG>, a portion of working electrode <NUM> is covered by dielectric <NUM> and therefore the covered portion does not have direct contact with salt solution/electrolyte <NUM>. By using a spongy and porous TiN working electrode, the electrolyte can diffuse through the spaces between the columnar TiN structures and vertically down the uncovered portion of the working electrode and then horizontally to the covered portion of working electrode <NUM> that is underneath dielectric layer <NUM>. As a result, the effective surface area of TiN that is in contact with the electrolyte is maximized and Celectrochemical is maximized.

<FIG> illustrates an embodiment of a circuitry <NUM> in a cell of a nanopore-based sequencing chip, wherein the voltage or current applied across the nanopore can be configured to vary over a time period during which the nanopore is in a particular detectable state. In <FIG>, instead of showing a nanopore inserted in a membrane and the liquid surrounding the nanopore, an electrical model <NUM> represents the electrical properties of the nanopore and the membrane, and an electrical model <NUM> represents the electrical properties of the working electrode are shown.

Electrical model <NUM> includes a capacitor <NUM> that models a capacitance associated with the membrane (Cmembrane) and a resistor <NUM> that models a resistance associated with the nanopore in different states (e. , the open-channel state or the states corresponding to having different types of tags or molecules inside the nanopore). Electrical model <NUM> includes a capacitor <NUM> that models a capacitance associated with the working electrode. The capacitance associated with the working electrode is also referred to as an electrochemical capacitance (Celectrochemical). The electrochemical capacitance Celectrochemical associated with the working electrode includes a double-layer capacitance and may further include a pseudo capacitance.

<FIG> also includes a switch <NUM> coupled to a voltage <NUM>, which can be switched on and off for the purpose of measuring resistance <NUM>. In some embodiments, voltage <NUM> is applied to electrical model <NUM> representing the nanopore. After capacitor <NUM> is fully charged (which may not be very long as it is desirable for the membrane to have a low capacitance), the switch <NUM> can be opened, and current can flow from one side of capacitor <NUM> to the other side via resistor <NUM> (i.e., the nanopore that includes the molecule being detected). Different values for resistor <NUM> will cause different current to flow, and thus different voltage decays. Capacitor <NUM> can be sufficiently large to not impact the circuit significantly.

After a specified amount of time, a voltage can be measured at an ADC (Analog-to-Digital Converter) <NUM>. This can measure the time constant in the circuit represented by RCmembrane, as the voltage changes after the specified amount of time will correlate to the resistance of the pore (and thus the molecule inside of it). Embodiments can also measure an amount of time to reach a specific voltage, e.g., by using a comparator, as is described in <CIT>.

It is desirable for the working electrode to have a high capacitance, thereby reducing its impedance effect on the circuit, which can cause voltage levels to move slightly as a result of charge build up after multiple measurements that involve switch <NUM> opening and closing.

<FIG> illustrates a double layer that is formed at an interface between a conductive electrode and an adjacent liquid electrolyte. An electrical model for the double layer is shown as electrical model <NUM> in <FIG> that models a capacitance associated with the working electrode. In the example shown, the electrode surface is negatively charged, resulting in the accumulation of positively charged species in the electrolyte. In another example, the polarity of all charges may be opposite to the example shown. The charge in the electrode is balanced by reorientation of dipoles and accumulation of ions of opposite charge in the electrolyte near the interface. The accumulation of charges on either side of the interface between electrode and electrolyte, separated by a small distance due to the finite size of charged species and solvent molecules in the electrolyte, acts like a dielectric in a conventional capacitor. The term "double layer" refers to the ensemble of electronic and ionic charge distribution in the vicinity of the interface between the electrode and electrolyte.

<FIG> illustrates a pseudocapacitance effect that can be formed, simultaneously with the formation of a double-layer as in <FIG>, at an interface between a conductive electrode and an adjacent liquid electrolyte. <FIG> shows a double-layer with the addition of pseudo capacitance from charge transfer resulting in adsorption, intercalation, or reduction-oxidation reactions limited by available surface area (represented by solid circles).

<FIG> and <FIG> (not of the present invention) illustrate examples of processes for constructing an electrochemical cell of a nanopore-based sequencing chip that includes a TiN working electrode. Similar processes are described, for example, in <CIT>, the contents of which are incorporated in its entirety herein. In particular, <FIG> illustrate an example of a process for constructing an electrochemical cell of a nanopore-based sequencing chip that includes a TiN working electrode using chemical mechanical planarization, and <FIG> illustrate an example of a process for constructing an electrochemical cell of a nanopore-based sequencing chip that includes a TiN working electrode using photolithography and dry etching. As will be described in more detail below, while the processes result in working electrodes with desired spongy and porous characteristics, both of these methods can result in the formation of seams in the working electrode layers, which act as weak points and cause performance issues.

With reference to <FIG>, incoming material <NUM> may be provided for constructing the electrochemical nanopore cell. Incoming material <NUM> may include substrate <NUM>, conductive layer <NUM>, and dielectric layer <NUM> disposed thereon. Substrate <NUM>, may be, for example, a CMOS substrate that includes circuitry for controlling the operation of the nanopore cell. Conductive layer <NUM> may be a part of the circuitries that deliver the signals from the cell to the rest of the chip. In some cases, conductive layer <NUM> can be the top metal layer of the circuitry, for example, the sixth metal layer. However, conductive layer <NUM> is not limited to being the sixth metal layer of the underlying circuitry. In some cases, conductive layer <NUM> can be an aluminum layer, for example, aluminum interconnect metal associated with the substrate. As shown in <FIG>, conductive layer <NUM> is enclosed in a layer of dielectric <NUM> (e.g., SiO<NUM>), which may be interconnect dielectric disposed between conductive components of the circuitries of the CMOS substrate as described above.

With reference to <FIG>, in a first step of the process, the layer of dielectric <NUM> may be etched to create via <NUM>. Via <NUM> provides a cavity for forming the spongy and porous electrode desired for a nanopore cell. As can be seen in <FIG>, via <NUM> includes sidewalls <NUM> formed by dielectric <NUM> which meet with a top surface <NUM> of conductive layer <NUM>.

In a next step, shown in <FIG>, spongy and porous electrode layer <NUM> is deposited to fill via <NUM> that was created in <FIG>. The spongy and porous electrode layer <NUM> may be a layer of TiN grown and deposited in a manner to create rough, sparsely-spaced TiN columnar structures or columns of TiN crystals that provide a high specific surface area that can come in contact with an electrolyte. The spongy and porous TiN layer <NUM> can be deposited using different deposition techniques, including atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD) sputtering deposition, and the like. It will be understood that although TiN is described herein as a preferable electrode material, other suitable porous electrode material may be used.

In a further step, with reference to <FIG>, an excess portion of TiN layer <NUM> may be removed. For example, the excess TiN layer may be removed using chemical mechanical planarization (CMP) techniques. The remaining TiN deposited in via <NUM> forms a spongy and porous working electrode <NUM>.

As described above, it may be desirable to protect porous working electrode <NUM> during further manufacturing steps. Specifically, as will be described below with reference to <FIG>, well formation eventually requires the forming of hydrophobic cladding over the porous electrode. However, if the hydrophobic cladding is formed directly on the porous electrode, residues of the hydrophobic cladding can be embedded in the gaps or cavities in the porous electrode. The organic residues can make the electrode surface less wettable and prevent fluid from contacting the surface of the electrode. As a result, the effective surface area can be reduced, causing a significant drop in the double layer capacitance at the electrolyte-electrode interface. To alleviate this problem, a thin buffer or sacrificial protective layer, such as an SiO<NUM> layer, can be formed on the electrode to protect the surface of the electrode prior to subsequent processing, such as the deposition of the polyimide layer. After the well is formed, the thin sacrificial layer can be removed from the top surface of the electrode. The thin buffer or sacrificial layer serves to protect the porous electrode layer from the hydrophobic layer during the well formation process. Accordingly, in a step prior to the well formation, with reference to <FIG>, a protective layer <NUM> may be deposited on top of working electrode <NUM>. As described above, the protective layer <NUM> may be used as a buffer layer or sacrificial layer to protect working electrode <NUM> during manufacture so that it retains the desired wettability and capacitance for operation. As described in previously incorporated <CIT>, protective layer <NUM> may be a dielectric material such as silicon oxide or a metal material such as titanium. In either case, the protective layer can be chosen so that it is selectably removable.

In a step shown in <FIG>, a hydrophobic cladding <NUM> may be formed and patterned to form a well <NUM> above working electrode <NUM> and protective layer <NUM>. As can be seen in <FIG>, the presence of protective layer <NUM> avoids forming of the hydrophobic cladding <NUM> directly on working electrode <NUM>. Once deposited and patterned, hydrophobic cladding <NUM> form the sidewalls of well <NUM>. The bottom of well <NUM> shown in <FIG> initially includes protective layer <NUM>.

As can be seen in <FIG>, once the hydrophobic cladding is formed and patterned and processing is otherwise finalized, protective layer <NUM> may be removed chemically to expose working electrode <NUM> to well <NUM>. In particular, protective layer <NUM> may be removed by applying removal reagents containing hydrofluoric acid (HF), nitric acid, or any other reagents that suitably remove protective layer <NUM>. As an example, the protective layer <NUM> may be removed by a wet etching process using hydrofluoric acid (HF). The resulting nanopore cell <NUM> has well <NUM> with exposed working electrode <NUM> and sidewalls formed by hydrophobic cladding <NUM>.

An alternative process for constructing an electrochemical cell of a nanopore-based sequencing chip is provided in <FIG>. The process illustrated in <FIG> is similar to that illustrated in <FIG>, except that the working electrode and protective layer are patterned together using photolithography and dry etching rather than chemical mechanical planarization techniques as described in <FIG>. Specifically, <FIG> illustrates the same incoming material <NUM> including substrate <NUM>, conductive layer <NUM>, and dielectric layer <NUM> disposed thereon as in <FIG>, and <FIG> illustrates the same etching of dielectric <NUM> to create via <NUM> for forming the spongy and porous TiN electrode. As with <FIG>, via <NUM> includes sidewalls <NUM> formed by dielectric <NUM> which meet with a top surface <NUM> of conductive layer <NUM>.

Next, as shown in <FIG>, spongy and porous TiN layer <NUM> is deposited to fill via <NUM> that was created in <FIG>, and protective layer <NUM> is deposited on porous TiN layer <NUM>. Then, as shown in <FIG>, the porous TiN layer <NUM> and the protective layer <NUM> are patterned together to create the working electrode <NUM> with the patterned protective layer <NUM>. As described above, pattern protective layer <NUM> serves to protect working electrode <NUM> during the subsequent well formation process described below with reference to <FIG>.

With reference to <FIG>, hydrophobic cladding <NUM> may be formed and patterned to form well <NUM> similar to the process shown in <FIG>. As described previously with reference to <FIG>, it can be seen in <FIG> that the presence of protective layer <NUM> avoids forming of the hydrophobic cladding <NUM> directly on working electrode <NUM>. Once deposited and patterned, hydrophobic cladding <NUM> form the sidewalls of well <NUM> and the bottom of well <NUM> initially includes protective layer <NUM>.

Although the processes described in <FIG> and <FIG> above generally provide for suitable electrochemical cells for nanopore-based sequencing, some drawbacks have been observed related to the growth of the porous electrode material. Specifically, it has been observed that while the deposition of porous electrode material results in the growth of columns of the electrode material with the desired porous characteristics, such growth not only occurs upwards from the top of the conductive surface (i.e. top surface <NUM> depicted in <FIG> and <FIG>) as intended, but also perpendicularly to this intended growth from the sidewalls (i.e. sidewalls <NUM> depicted in <FIG> and <FIG>) of the deposition vias. As a result, the columns growing upwards from the top of the conductive surface and the columns growing sideways from the sidewalls of the deposition vias collide with each other and form seams that continue to propagate until the deposition of the TiN is complete.

<FIG> illustrates seams that can form in working electrodes constructed using the processes illustrated in <FIG> and <FIG>. As can be seen in <FIG>, columns of TiN <NUM> grow both vertically from the top surface <NUM> of conductive layer <NUM> and horizontally from sidewalls <NUM> to form seams <NUM>. Similar seams have been observed in examples that have been manufactured using processes similar to <FIG> and <FIG>. For example, seams <NUM> can be seen in <FIG>, which is a micrograph illustrating a TiN electrode layer formed using the process illustrated in <FIG>, and seams <NUM> can be seen in <FIG>, which is a micrograph illustrating a TiN electrode layer formed using the process illustrated in <FIG>.

It will be understood (and can be seen in <FIG>) that the aforementioned seams that form in the non-planar vias ultimately result in unwanted voids which become weak points in the structure of the electrode layer. These voids and weak points may allow materials to seep through the electrode layer and interact with or attack other layers of the nanopore cell and drastically impact performance of the nanopore cell. In particular, removal reagents used for removing protective layers (such as HF or nitric acid containing reagents) as described in the processes above may seep through the voids created by the seams described. For example, these reagents may attack the interconnect dielectric layer (e.g., layer <NUM> described in <FIG> and <FIG>), which may be used to separate conductive interconnects for a device. Ultimately, damage to these layers can lead to misalignment of well structures, shorting of electrodes, and cross talk between electrodes, all of which can severely impact performance of the nanopore cell.

In order to avoid the aforementioned seams and drawbacks associated therewith, methods are described for constructing nanopore cells with seamless working electrodes. In particular, <FIG> illustrate an embodiment of a process for constructing an electrochemical cell of a nanopore-based sequencing chip that includes a seamless working electrode.

As can be seen in <FIG>, incoming material <NUM> may be similar to the incoming material <NUM> described previously with respect to <FIG> and <FIG>, including a substrate <NUM>, a conductive layer <NUM>, and interconnect dielectric layer <NUM> disposed thereon.

In a next step, as shown in <FIG>, planar electrode support layer <NUM> may be formed by removing at least a portion of interconnect dielectric layer <NUM>. Planar electrode support layer <NUM> includes both the conductive layer island <NUM> and the surrounding interconnect layer <NUM> that remains after removal of the portion thereof. Accordingly, planar electrode support layer <NUM> has a planar electrode support surface <NUM> that includes both the top surface of the conductive layer island <NUM> and the top surfaces of the surrounding interconnect layer <NUM> that remains after removal. The removal of dielectric layer <NUM> may be done by blanket etching dielectric layer <NUM> to expose the island of conductive layer <NUM>. In contrast with previously described processes, there are no vias with sidewalls in which electrode material is deposited. Rather, the electrode material will be deposited on a fully planar electrode support surface <NUM>.

In a next step, depicted in <FIG>, porous electrode material <NUM>, such as TiN, is deposited on planar electrode support surface <NUM>. As can be seen in <FIG>, there is no sidewall of a via for perpendicular columnar growth of the porous electrode material, so there are no seams created in the porous electrode material. Thus, the porous electrode material <NUM> that is deposited forms into uniform seamless columns of porous electrode material. These uniform seamless columns are further illustrated in <FIG>, which illustrates the seamless electrode layer constructed using the process illustrated in <FIG>. Once deposited, and as can also be seen in <FIG>, seamless porous electrode material 1is protected by depositing protective layer <NUM> thereon. As described above, protective layer <NUM> may be comprised of a dielectric material or a metal material. Examples of a protective dielectric that can be used include silicon oxide, titanium oxide, hafnium oxide, zirconium oxide. Other suitable dielectric materials for use in embodiments of the present invention (e. , protective layer <NUM>) include, without limitation, oxides, nitrides (e.g., silicon mononitride or SiN), silicon oxide, silicon oxynitride, metal oxides, metal nitrides, metal silicates, transition-metal oxides, transition-metal nitrides, transition metal-silicates, oxynitrides of metals, metal aluminates, zirconium oxide, zirconium silicate, zirconium aluminate, hafnium oxide, titanium oxide, or combinations thereof. Those of ordinary skill in the art will appreciate other dielectric materials that are suitable for use in the present invention. Examples of other materials that can be used as protective layers include titanium, aluminum, tantalum, tungsten, or nonporous titanium nitride. Those of ordinary skill in the art will appreciate other metal materials that are suitable for use in the present invention.

Next, as shown in <FIG>, the porous electrode layer <NUM> and the protective layer <NUM> are patterned together to create the patterned working electrode <NUM> and patterned protective layer <NUM>. The TiN and protective layers may be patterned together using photolithography and dry etching, or other suitable processes used to pattern such materials. The resulting working electrode is an island of uniform columns of TiN without the undesirable seams previously described, with a protective layer disposed thereon.

In a further step, with reference to <FIG>, hydrophobic cladding <NUM> is formed on electrode <NUM> and protective layer <NUM> and patterned to form well <NUM> similar to the process shown in <FIG> and <FIG>. As described previously with reference to <FIG> and <FIG>, the patterned hydrophobic cladding <NUM> form the sidewalls of well <NUM>, and the bottom of well <NUM> initially includes protective layer <NUM> so as not to expose working electrode <NUM>. Examples of hydrophobic material that can be used include polyimides, epoxies, polybenzoxazoles (PBOs), benzocyclobutene (BCB). Those of ordinary skill in the art will appreciate other hydrophobic materials that are suitable for use in the present invention.

Next, with reference to <FIG>, once the manufacturing process is otherwise finalized, protective layer <NUM> may be removed chemically using removal reagents, thus exposing working electrode <NUM> to well <NUM>. As described above, protective layer <NUM> may be removed chemically by removal reagents containing HF, nitric acid, other suitable reagents, and/or combinations thereof, depending on the material selected for protective layer <NUM>/<NUM>. For example, if protective layer <NUM>/<NUM> is comprised of silicon dioxide or the like, buffered oxide etch (BOE) in concentrations ranging from <NUM>:<NUM> to <NUM>:<NUM> (NH4F:HF) may be used for removal. On the other hand, if protective layer <NUM>/<NUM> is comprised of a metal material, a diluted HF/nitric acid mixture with concentrations ranging from <NUM>:<NUM>:<NUM> and <NUM>:<NUM>:<NUM> (H2O:HF:HNO3) may be used for removal. Those of ordinary skill in the art will appreciate other reagents that are suitable for use in the present invention. Depending on the protective material and removal reagent, different processes may be used to remove the protective material. In some embodiments, protective layer <NUM> may be removed by a wet etching process using any of the aforementioned reagents, but those of ordinary skill in the art will appreciate other processes that are suitable for removal in the present invention. In contrast with the previously described methods, since the electrode <NUM> is formed with uniform seamless columns of TiN, there is much less chance of any removal reagents seeping through to attack other layers such as dielectric <NUM>.

<FIG> is a flowchart illustrating a method for forming a nanopore cell with a seamless electrode. Method <NUM> includes, at step <NUM>, providing a device structure that includes a conductive layer disposed on a top portion of a substrate and an interconnect dielectric layer overlying the conductive layer. More details are provided in the description in connection with <FIG>. At step <NUM>, a portion of the interconnect dielectric is removed to form a planar electrode support surface including an exposed island of the conductive layer surrounded by the remaining portion of the interconnect dielectric layer. More details are provided in the description in connection with <FIG>. At step <NUM>, a porous electrode material is deposited on the planar electrode support surface to form a seamless porous electrode layer made of columns of the porous electrode material. More details are provided in the description in connection with <FIG> and <FIG>. At step <NUM>, a protective layer is deposited on the seamless porous electrode layer. More details are provided in the description in connection with <FIG>. At step <NUM>, the seamless porous electrode layer and protective layer are patterned to form a working electrode island. More details are provided in the description in connection with <FIG>. At step <NUM>, a hydrophobic cladding is deposited and patterned to form the sidewalls of a well of the nanopore cell. More details are provided in the description in connection with <FIG>. At step <NUM>, a portion of the protective layer is removed to expose the porous electrode layer to the well of the nanopore cell. More details are provided in the description in connection with <FIG>.

<FIG> illustrates a nanopore cell <NUM> that includes a substrate <NUM>, an electrode support layer <NUM> overlying a top portion of substrate <NUM>, and well <NUM>. Electrode support includes conductive layer island <NUM> which is surrounded by interconnect dielectric layer <NUM>, and a planar top surface <NUM> formed by the conductive layer island <NUM> and the interconnect dielectric layer <NUM>. Well <NUM> includes seamless porous working electrode island <NUM>, hydrophobic cladding <NUM> surrounding the seamless porous working electrode island <NUM> and patterned to form sidewalls of well <NUM> and a cavity formed by the hydrophobic cladding <NUM> and seamless porous working electrode island <NUM>. Seamless porous working electrode island <NUM> is disposed on planar top surface <NUM> of planar electrode support layer <NUM> and is made of columns of a porous electrode material.

<FIG> are top and perspective views micrographs, respectively, of an example of an array of seamless electrodes formed by the method of <FIG>, and <FIG> is a SEM (scanning electron microscope) image illustrating an example of a nanopore device with a seamless TiN electrode layer <NUM> formed by the method of <FIG>. As can be seen in each of these figures, the columns of electrode material have the desired porosity and uniformity, without any visible seams that may serve as voids or weak points allowing removal reagents to seep through. Thus, the electrode material as produced using the method of <FIG> may be better configured to prevent damage to other components of the nanopore well.

In the preceding description, for the purposes of explanation, numerous details have been set forth in order to provide an understanding of various embodiments of the present technology. It will be apparent to one skilled in the art, however, that certain embodiments may be practiced without some of these details, or with additional details.

Where a range of values is provided, it is understood that each intervening value, to the tenth of the unit of the lower limit unless the context clearly dictates otherwise, between the upper and lower limits of that range, is also specifically disclosed. Each smaller range between any stated value or intervening value in a stated range and any other stated or intervening value in that stated range is encompassed. The upper and lower limits of these smaller ranges may independently be included or excluded in the range, and each range where either, neither, or both limits are included in the smaller ranges is also encompassed within the invention, subject to any specifically excluded limit in the stated range. Where the stated range includes one or both of the limits, ranges excluding either or both of those included limits are also included.

As used herein and in the appended claims, the singular forms "a", "an", and "the" include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to "a method" includes a plurality of such methods.

Several embodiments of the invention are described above. For example, even though a polyimide layer is used as an example of a hydrophobic material for well formation in the above description, other organic material having hydrophobic surface properties, such as CYTOP, which is an amorphous fluoropolymer, may also be used in other embodiments. Moreover, besides silicon oxide, other dielectric materials having proper etch selectivity and process compatibility can also be used to form the sacrificial layer, for example, silicon nitride, zirconium oxide, and hafnium oxide, etc. Additionally, a number of well-known processes and elements have not been described in order to avoid unnecessarily obscuring the present invention. Additionally, details of any specific embodiment may not always be present in variations of that embodiment or may be added to other embodiments.

Claim 1:
A method for forming a nanopore cell (<NUM>), comprising:
providing a device structure comprising:
a conductive layer (<NUM>) disposed on a top portion of a substrate (<NUM>); and
an interconnect dielectric layer (<NUM>) overlying the conductive layer;
removing a portion of the interconnect dielectric layer to form a planar electrode support surface (<NUM>) comprising an exposed island of the conductive layer surrounded by a remaining portion of the interconnect dielectric layer;
depositing a porous electrode material (<NUM>) on the planar electrode support surface to form a seamless porous electrode layer comprising columns of the porous electrode material;
depositing a protective layer (<NUM>) on the seamless porous electrode layer;
patterning the seamless porous electrode layer and the protective layer to a form a working electrode island (<NUM>);
depositing and patterning a hydrophobic cladding (<NUM>) on the working electrode island to form the sidewalls of a well (<NUM>) of the nanopore cell; and
removing at least a portion of the protective layer to expose the porous electrode layer to the well, wherein the exposed porous electrode layer forms at least a portion of a bottom wall of the well of the nanopore cell.