Patent Description:
Typically, the transfer of power is a process where devices (known as power sourcing equipment (PSE)) provide a DC voltage over a standard <NUM>-pair Ethernet cable to another connected device (known as a powered device (PD)). This allows for the powering of the powered device without the need for a local power connection source at the device location or having to run a separate cable for power. The amount of DC power that is transmitted is generally defined by the IEEE <NUM>. 3af, <NUM>. 3at and <NUM>. 3bt standards. Two wire pairs are generally used for low power transmissions (less than <NUM> W), and four wire pairs are generally used for higher power transmissions (up to <NUM> W).

The capacity to deliver power over unshielded twisted pair (UTP) cabling is generally limited (in the milliamp ranges), and the primary considerations are typically knowing what the application electrical load, the loads aggregate on the system, and if the system is capable of delivering that degree of required power. As DC power is transferred on a traditional UTP cable, an associated amount of power loss occurs due to its material design that produces energy loss resistance. As the input power or input amperage is increased, the cabling losses also increase, resulting in less power received at the transmission end powered device. Such losses can occur in cabling lengths of both less than and greater than <NUM>. Although the powered device will generally work in most cases, the amount of power loss can be significant and is hidden, as it is typically taken out from the power sourcing equipment (PSE) power budget if it is available.

For Ethernet network systems, 10BASE-T, 100BASE-TX, and 1GBASE-T transmission is typically over <NUM>-pair unshielded twisted pair (UTP) cabling. Of such <NUM>-pair cabling, only two pairs are typically used for data transmission and two pairs are used for power (if it is an IEEE PoE <NUM>. 3at or a PoE <NUM>. 3af system). If the system is 10BASE-T or 100BASE-TX, then two pairs are used for data; and if the system is 1GBASE-T or higher, then all four pair are typically used for data transmission. If the system is an IEEE <NUM>. 3bt PoE system, then all four pairs are used for power transmission. In general, there are two ways PoE networks can be used to source DC power - by adding a PoE injector (e.g., a midspan device), or by using a PoE enabled network switch at the switch side (e.g., an endspan device) - to transfer power on an existing data line to the powered device.

<FIG> is diagrammatic view of a traditional two pair twisted Power-over-Ethernet cabling system <NUM> including power source equipment and a powered device. The system <NUM> includes a DC supply circuit <NUM> and a horizontal cabling circuit <NUM> electrically and communicatively connecting the DC supply circuit <NUM> to a DC load circuit <NUM>. The DC supply circuit <NUM> includes a power supply <NUM>, a first wire pair <NUM>, and a second wire pair <NUM>. Both wire pairs <NUM>, <NUM> extend through the horizontal cabling circuit <NUM>, with the wire pair <NUM> having a positive resistance (R2) and the wire pair <NUM> having a negative resistance (R3). The wire pairs <NUM>, <NUM> connect to a powered device <NUM> of the DC load circuit <NUM>.

If the power supply <NUM> is <NUM> VDC with <NUM> A of current, the positive wire pair <NUM> resistance R2 is <NUM> Ohms, and the negative wire pair <NUM> resistance R3 is <NUM> Ohms, then by Ohm's law (P = I<NUM> * R) the power loss is <NUM> W for the first wire pair <NUM> and <NUM> W for the second wire pair <NUM>, giving a total of <NUM> W cable power loss. In other words, the cable is giving off <NUM> W of heat due to the cable's resistance, with current being the primary enemy of power delivery.

In operation, a midspan device could be electrically connected to an Ethernet switch (e.g., the DC supply circuit <NUM>) by a data only cable, and the midspan device would further be communicatively and electrically connected to the powered device <NUM> by a data and DC power cable. The midspan device is typically powered by an AC power source (e.g., an electrical wall outlet), and converts that AC power to DC power using the IEEE <NUM> PoE protocols for proper power recognition and levels. The PoE midspan device can therefore be used to add power to the cabling system <NUM> midway between the Ethernet switch and the powered device <NUM>. Use of the midspan device generally necessitates location and data cabling management of tracking an extra device for the system, a nearby power outlet to provide power to the midspan device, structured cabling (e.g., with midspan devices generally accepting RJ45 plugs instead of direct UTP cables), and may affect data performance of the system (e.g., cabling performance may be degraded if the cabling category rating is not maintained by the midspan device interface ports).

<FIG> is a diagrammatic view of a traditional two pair cabling system <NUM> with one type of PoE arrangement of the wire pairs (e.g., an IEEE Type <NUM> system). In particular, the system <NUM> includes power source equipment (PSE) <NUM> electrically and communicatively connected to a powered device (PD) <NUM> via a horizontal cabling circuit <NUM>. The circuit <NUM> includes a first wire pair <NUM>, a second wire pair <NUM>, a third wire pair <NUM>, and a fourth wire pair <NUM>. The positive polarity is on the second wire pair <NUM> and the negative polarity is on the third wire pair <NUM>. Thus, only two wire pairs of the four wire pairs are used for transmitting power.

<FIG> is a diagrammatic view of a traditional two pair cabling system <NUM> with another type of PoE arrangement of the wire pairs (e.g., an IEEE Mode B system). The system <NUM> can be substantially similar to the system <NUM>, except for the distinctions noted herein. In particular, the system <NUM> also includes the PSE <NUM> electrically and communicatively connected to the PD <NUM> via the horizontal cabling circuit <NUM>. However, in the arrangement of <FIG>, the positive polarity is on the first wire pair <NUM> and the negative polarity is on the fourth wire pair <NUM>. Thus, only two wire pairs of the four wire pairs are used for transmitting power.

<FIG> is a diagrammatic view of a traditional four pair cabling system <NUM> with one type of PoE arrangement of the wire pairs (e.g., an IEEE Type <NUM> system). The system <NUM> can be substantially similar to the systems <NUM>, <NUM>, except for the distinctions noted herein. In particular, the system <NUM> also includes the PSE <NUM> electrically and communicatively connected to the PD <NUM> via the horizontal cabling circuit <NUM>. However, in the arrangement of <FIG>, the positive polarity is on the first and second wire pairs <NUM>, <NUM>, and the negative polarity is on the third and fourth wire pairs <NUM>, <NUM>. Thus, all wire pairs are used by the system <NUM> for power transmission, leaving no spare wire pairs for additional power transmission.

The traditional Power-over-Ethernet systems discussed herein could be arranged to include an endspan device (e.g., a power source equipment (PSE) device). The endspan device is typically an Ethernet protocol network switch device that has PoE capabilities built in which combines data signals and DC power onto the transfer cables for transmission to the powered device(s). For example, the system can include an endspan device built into the PoE Ethernet switch, which can be electrically connected to an AC power outlet. The switch can be communicatively and electrically connected to the powered device(s) via the data and DC power cables.

Using either midspan or endspan devices for transfer of DC power on UTP cabling produces predicted power loss due to the cabling resistivity properties. In both cases, the DC power for an IEEE <NUM>. 3af or <NUM>. 3at system is placed on two pairs out of the four pairs in a standard Telecommunication Industry Association (TIA) defined TIA <NUM> series <NUM>-pair cabling. In most cases, the power losses appear hidden to the end user since the powered device will still function if it receives its requested power.

<FIG> provides a chart of the allowed power losses and voltage requirements for PoE from the IEEE <NUM> standard for maximum cabling lengths of <NUM>. The <NUM> W column represents a Type <NUM> voltage requirements, the <NUM> W column represents a Type <NUM> voltage requirement, the <NUM> W column represents a Type <NUM> voltage requirement, and the <NUM> W column represents a Type <NUM> voltage requirement. If the endspan or midspan devices are expected to supply <NUM> W (Type <NUM>) power and the minimum cabling power loss allowed is <NUM> W, there is a direct cabling allowed loss of <NUM> Watts per port. The power loses are less dramatic (although still problematic) when using a <NUM> W endspan device as the minimum loss is <NUM> W per port (due to cabling loss of <NUM> W). For example, if using a <NUM> W endspan device for <NUM>,<NUM> powered devices at an average maximum distance, there is a potential for over <NUM>,<NUM> W per hour loss (a <NUM>-hour time period loss of <NUM>,<NUM> W per day). The power loss and data center Power Usage Effectiveness (PUE) over time (which provides a ratio to describe how efficiently a computer data center uses energy) can grow significantly as time is compounded, and the allowed power losses are higher as the input power is increased from <NUM> W to <NUM> W in endspan device systems.

Additional options exist for extending data beyond <NUM>. For example, adding PoE extenders (or repeaters) in the horizontal cabling. Such extenders or repeaters typically drain about <NUM> W of power each for the active signal regeneration, and the extension is for data only. As a further example, a switch with an extended data signal option may be used to enhance the power levels as well as the data signals. However, both options necessitate active components for operation.

Therefore, as PoE gains in market acceptance, more and more devices necessitate improved power delivery for expected performance. Improved energy savings thresholds have also been established in the industry by various organizations and environmental groups. Patent application <CIT> relates to a polarity correction circuit, a power unbalance mitigating polarity correction circuit, a Power over Ethernet compliant Powered Device, a Power over Ethernet power distribution system, a method for operating a controller in a power unbalance mitigating polarity correction circuit, a computer program product and a power unbalance mitigating polarity correction circuit controller. However, the above-mentioned issues are not solved.

The present invention relates to a system and a method as set out in the appended claims. Exemplary embodiments of the present disclosure are summarized in the following. Embodiments of the present disclosure provide an exemplary system for reducing power losses in a telecommunications cabling system and/or circuit. The system provides a cost-effective way to improve the power efficiency of cabling used for PoE network transmissions by use of replaceable and modified connectivity that can be installed within the network cabling system for channel or permanent link transmission configurations. The system includes corrective circuits that effectively double the twisted wire pairs, increasing the pathways for power and/or data to be transmitted, thereby reducing the overall resistance of the cabling system. The system can aid in power delivery to improve the cabling resistance capacities which, in turn, decreases the thermal footprint and reduces the cable power losses.

In accordance with embodiments of the present disclosure, an exemplary system for reducing power losses in telecommunications cabling is provided. The system includes a power supply, at least one powered device, and a cabling system electrically and communicatively connecting the power supply to the at least one powered device. The cabling system includes a first positive polarity wire pair and a first negative polarity wire pair. The system includes a corrective circuit module connected to the cabling system. The corrective circuit module includes a second positive polarity wire pair, a second negative polarity wire pair, wiring connecting the first positive polarity wire pair with the second positive polarity wire pair, and wiring connecting the first negative polarity wire pair with the second negative polarity wire pair.

In some embodiments, the power supply can be a power sourcing equipment providing a direct current (DC) to the cabling system. In some embodiments, the power supply can be a Power-over-Ethernet switch. The cabling system can be an Ethernet twisted pair cabling system. The cabling system can be a horizontal cable circuit. In some embodiments, the at least one powered device can be, e.g., a camera, a light, or the like.

The corrective circuit module includes a first correction circuit including the wiring connecting the first positive polarity wire pair with the second positive polarity wire pair. The wiring splits power signals for transmission along both the first and second positive polarity wire pairs. The first correction circuit splits the power signals at a proximal end of the cabling system for transmission of the power signals along both the first and second positive polarity wire pairs to a distal end of the cabling system. The first correction circuit blocks data signals from transmission along the second positive polarity wire pair. The corrective circuit module includes a second correction circuit with wiring merging the second positive polarity wire pair with the first positive polarity wire pair at the distal end of the cabling system to transmit the power signals to the at least one powered device only along the first positive polarity wire pair. The data signals continue to be transmitted along the first positive polarity wire pair.

The corrective circuit module includes a second correction circuit including the wiring connecting the first negative polarity wire pair with the second negative polarity wire pair. The wiring splits power signals for transmission along both the first and second negative polarity wire pairs. The second correction circuit splits the power signals at a distal end of the cabling system for transmission of the power signals along both the first and second negative polarity wire pairs to a proximal end of the cabling system. The second correction circuit blocks transmission of data signals along the second negative polarity wire pair. The corrective circuit module includes a first correction circuit with wiring merging the second negative polarity wire pair with the first negative polarity wire pair at the proximal end of the cabling system to transmit the power signals to the power supply only along the first negative polarity wire pair. The data signals continue to be transmitted along the first negative polarity wire pair.

In accordance with embodiments of the present disclosure, an exemplary power loss reduction device for a cabling system is provided. The cabling system includes a first positive polarity wire pair and a second positive polarity wire pair. The power loss reduction device includes a first correction circuit configured to be electrically and communicatively connected to a proximal end of the cabling system. The first correction circuit includes a second positive polarity wire pair and wiring connecting the first positive polarity wire pair with the second positive polarity wire pair. The power loss reduction device includes a second correction circuit configured to be electrically and communicatively connected to a distal end of the cabling system. The second correction circuit includes a second negative polarity wire pair and wiring connecting the first negative polarity wire pair with the second negative polarity wire pair.

The wiring of the first correction circuit splits power signals at the proximal end of the cabling system for transmission of the power signals along both the first and second positive polarity wire pairs to the distal end of the cabling system. The first correction circuit blocks data signals from transmission along the second positive polarity wire pair. The second correction circuit includes wiring merging the second positive polarity wire pair with the first positive polarity wire pair at the distal end of the cabling system to transmit the power signals to at least one powered device only along the first positive polarity wire pair.

The wiring of the second correction circuit splits power signals at the distal end of the cabling system for transmission of the power signals along both the first and second negative polarity wire pairs to the proximal end of the cabling system. The second correction circuit blocks transmission of data signals along the second negative polarity wire pairs. The first correction circuit includes wiring merging the second negative polarity wire pair with the first negative polarity wire pair at the proximal end of the cabling system to transmit the power signals to a power supply only along the first negative polarity wire pair.

In accordance with embodiments of the present disclosure, an exemplary method of reducing power loss in telecommunications cabling is provided. The method includes providing power from a power supply to a cabling system. The cabling system includes a first positive polarity wire pair and a first negative polarity wire pair. The method includes electrically and communicatively connecting the power supply to at least one powered device with the cabling system. The method includes connecting a corrective circuit module to the cabling system. The corrective circuit module includes a second positive polarity wire pair, a second negative polarity wire pair, wiring connecting the first positive polarity wire pair with the second positive polarity wire pair, and wiring connecting the first negative polarity wire pair with the second negative polarity wire pair.

The method includes splitting power signals at a proximal end of the cabling system with the wiring of the corrective circuit module connecting the first positive polarity wire pair with the second positive polarity wire pair for transmission of the power signals along both the first and second positive polarity wire pairs to a distal end of the cabling system. The method includes blocking transmission of data signals along the second positive polarity wire pair. The method includes merging the second positive polarity wire pair with the first positive polarity wire pair at the distal end of the cabling system to transmit the power signals to the at least one powered device only along the first positive polarity wire pair.

The method includes splitting power signals at a distal end of the cabling system with the wiring of the corrective circuit module connecting the first negative polarity wire pair with the second negative polarity wire pair for transmission of the power signals along both the first and second negative polarity wire pairs to a proximal end of the cabling system. The method includes blocking transmission of data signals along the second negative polarity wire pair. The method includes merging the second negative polarity wire pair with the first negative polarity wire pair at the proximal end of the cabling system to transmit the power signals to the power source only along the first negative polarity wire pair.

Any combination and/or permutation of embodiments is envisioned. Other objects and features will become apparent from the following detailed description considered in conjunction with the accompanying drawings. It is to be understood, however, that the drawings are designed as an illustration only and not as a definition of the limits of the present disclosure.

To assist those of skill in the art in making and using the system for reducing power losses in telecommunications cabling, reference is made to the accompanying figures, wherein:.

According to the IEEE <NUM> Ethernet 10BASE-T and 100BASE-TX system industry standards, only two cable pairs for data transmission are needed. According to the IEEE <NUM>. 3af/at system industry standards, only two cable pairs are needed for DC power transmission. The TIA and IEEE also include established industry standards for length requirements for UTP Ethernet data and power transmissions that have a maximum of <NUM> (about <NUM> ft). Operating in these standards and beyond, cabling maximum lengths produce significant power losses for IEEE <NUM> PoE systems which is mainly due to the size and resistance of the current carrying cabling wires (e.g., also known as horizontal cabling).

The exemplary system improves cabling power delivery by effectively increasing the cabling electrical transfer wire size which, in turn, reduces the cable's transmitting cabling resistance. This is achieved by using only passive components. The transfer current is reduced by splitting the power onto spare cable pairs without disruption of their data signal, which has the same effect as increasing the wire gauge size. Using the exemplary system or module (as compared to traditional cabling adapters) in effect provides long term, year-over-year (YOY) cost savings to the end user. Such cost savings may have an estimated return on investment (ROI) of under one year, depending on the required power usages. The exemplary system therefore provides for improved power efficiency that allows extending the length of cabling, while maintaining the minimum IEEE <NUM>. 3af through <NUM>. 3bt received power input to the power device(s). Such systems can be used in a variety of telecommunications settings, e.g., low data PoE devices (such as low power lighting, internet of things (IoT), industrial internet of things (IIoT), or the like), and higher power devices (such as pan-tilt-zoom (PTZ) cameras, monitors, high-power lighting, or the like).

The exemplary system includes a connector device that includes a signal compensation module that compensates for transmitted signals combined with targeted frequency blocking filtering. This results in power lines of the data pairs being divided onto the spare unused pairs for DC transmission. The original power that was transmitting on two pairs is therefore shared on four pairs (e.g., two pairs positive and two pairs negative). As such, the system essentially doubles the cross-sectional area size of the conducting material which, in turn, reduces the electrical resistance and reduces the pairs wire power losses. By reducing the current carrying capacity's resistivity per cabling pairs, the system directly improves the Power Sourcing Equipment power efficiency delivery which in effect supplies more power to the end connected power device(s).

The line sharing of power provided by the system uses a Quad Synchronize Power Diversion (QSPD) method. QSPD is the Quad equally and Synchronized Polarity Diversion of Direct Current (DC) power of a PoE source equipment from dual (two wires) to four wires for quad transmission on twisted pair cabling systems. By quadrupling the cable transmission wires, the new effective gauges become, e.g., <NUM> AWG becomes equivalent to <NUM> AWG, <NUM> AWG becomes equivalent to <NUM> AWG, and the like.

<FIG> is a diagrammatic view of splitting circuitry for an exemplary system <NUM> for power loss reduction incorporated into a two pair twisted cabling system. The system <NUM> includes a DC supply circuit <NUM> including a power supply <NUM>, a first wire pair <NUM> (e.g., a positive wire pair) connected to the power supply <NUM>, and a second wire pair <NUM> (e.g., a negative power pair) connected to the power supply <NUM>. The system <NUM> includes a horizontal cable circuit <NUM> disposed between the DC supply circuit <NUM> and a DC load circuit <NUM> having powered device(s) <NUM>. The system <NUM> includes a first positive correction circuit 116a associated with the first wire pair <NUM>, and a first negative correction circuit 116b associated with the second wire pair <NUM>. The first positive and negative correction circuits 116a are disposed between and electrically connected to the DC supply circuit <NUM> and the horizontal cable circuit <NUM>. The system <NUM> includes a second positive correction circuit 118a associated with the first wire pair <NUM>, and a second negative correction circuit 118b associated with the second wire pair <NUM>. The second positive and negative correction circuits 118a, 118b are disposed between and electrically connected to DC load circuit <NUM>. Although shown as separate circuits, in some embodiments, the first positive and negative correction circuits 116a, 116b can be formed as a single or joint correction circuit. Similarly, in some embodiments, the second positive and negative correction circuits 118a, 118b can be formed as a single or joint correction circuit.

As illustrated in <FIG>, the system <NUM> includes the traditional first and second wire pairs <NUM>, <NUM> extending between the DC supply circuit <NUM> and the DC load circuit <NUM>, one wire pair for each respective polarity. The system <NUM> further includes a third wire pair <NUM> for the positive polarity and a fourth wire pair <NUM> for the negative polarity. The correction circuit 116a receives as input the first wire pair <NUM> (e.g., at a proximal end of the horizontal cable circuit <NUM>), and includes wiring <NUM> which splits the first wire pair <NUM> to redirect a portion of the power (e.g., about <NUM>%) into the third wire pair <NUM>, effectively creating two wire pairs for the positive polarity side of the system <NUM>. Thus, the correction circuit 116a allows for any power traditionally transmitted only on the first wire pair <NUM> to be split onto the "spare" third wire pair <NUM> without disruption of the data signal being transmitted along the first wire pair <NUM>. The wiring <NUM> transfers the positive polarity power to the third wire pair <NUM>. The power is split equally or substantially equally (about <NUM>/<NUM>) between the wire pairs <NUM>, <NUM> during the positive polarity power transmission. The data signals can be electronically filtered out by wide band common mode chokes to maintain the data signal transmission along only the wire pair <NUM> (i.e., not along wire pair <NUM>).

Use of the "spare" third wire pair <NUM> in combination with the first wire pair <NUM> provides a similar effect as increasing the wire gauge size of the first wire pair <NUM>. The second positive correction circuit 218a (e.g., located at the distal end of the horizontal cable circuit <NUM>) receives as input both the first and third wire pairs <NUM>, <NUM>, and includes wiring <NUM> for merging the third wire pair <NUM> into the first wire pair <NUM>. The result is therefore a single wire pair (e.g., the first wire pair <NUM>) connected to the DC supply circuit <NUM> and the DC load circuit <NUM>, with two wire pairs (e.g., the first and third wire pairs <NUM>, <NUM>) extending along the horizontal cable circuit <NUM>.

On the negative polarity side, the second wire pair <NUM> extends as output from the DC load circuit <NUM>, and the second negative correction circuit 218b includes wiring <NUM> which splits the second wire pair <NUM> to redirect a portion of the power into the fourth wire pair <NUM> (e.g., about <NUM>%), effectively creating two wire pairs for the negative polarity side of the system <NUM>. Thus, the correction circuit 218a allows for any power traditionally transmitted only on the second wire pair <NUM> to be split onto the "spare" fourth wire pair <NUM> without disruption of the data signal being transmitted along the second wire pair <NUM>. The wiring <NUM> therefore transfer the negative polarity power to the fourth wire pair <NUM>. The power is split equally or substantially equally (about <NUM>/<NUM>) between the wire pairs <NUM>, <NUM> during the negative power transmission. The data signals can be electronically filtered out by wide band common mode chokes to maintain the data signal transmission along only the wire pair <NUM> (i.e., not along wire pair <NUM>).

Use of the "spare" fourth wire pair <NUM> in combination with the second wire pair <NUM> provides a similar effect as increasing the wire gauge size of the second wire pair <NUM>. The first negative correction circuit 216b receives as input both the second and fourth wire pairs <NUM>, <NUM>, and includes wiring <NUM> for merging the fourth wire pair <NUM> into the second wire pair <NUM>. The result is therefore a single wire pair (e.g., the second wire pair <NUM>) connected to the DC supply circuit <NUM> and the DC load circuit <NUM>, with two wires (e.g., the second and fourth wire pairs <NUM>, <NUM>) extending along the horizontal cable circuit <NUM>.

The system <NUM> therefore improves the cabling current capacity of the traditional two pair twisted cabling system. The current that was previously carried on two wires per polarity is now synchronized and equally (or substantially equally) carried on four wires (quad) per polarity due to incorporation of the correction circuits <NUM>, <NUM>. As an example (and using the same values discussed above with respect to traditional cabling systems), if the power supply is <NUM> VDC with <NUM> A of current, the positive first wire pair <NUM> resistance R1 and the positive third wire pair <NUM> resistance R2 is divided to <NUM> Ohms each. Similarly, the negative second wire pair <NUM> resistance R2 and the negative fourth wire pair <NUM> resistance R4 is divided to <NUM> Ohms each. By Ohm's law, the power loss is calculated to be <NUM> W for the first wire pair <NUM> and <NUM> W for the third wire pair <NUM>, which results in a total of <NUM> W cable power loss (i.e., half of the power loss of a traditional two wire twisted pair cabling system). The cable therefore gives off only <NUM> Watts of heat because of the reduced wire resistance for current power delivery, which also reduces the cable's thermal footprint due to the direct relationship of the thermal footprint to the lowered power losses.

In some embodiments, the system <NUM> (referred to herein as xLP for xLow Power and xHP for xHigh Power) can include pair noise reducing signal compensation, as described in <CIT> and <CIT>, which are incorporated herein by reference in their entirety. In some embodiments, the system <NUM> can include line signal blocking circuitry, as described in <CIT>, which is incorporated herein by reference in its entirety. The pair noise reducing signal compensation and/or line signal blocking circuitry allows the power to be split from two to four wires without degrading the frequency base-band of the originating Ethernet switch data signal. A direct open line of an electrical connection can be used to split the signals, power and data, and the splitting of data signals may produce unwanted signal reflections, as well as increase signal insertion losses. The pair noise reducing signal compensation maintains the data signal integrity to meet the Telecommunication Industry Association TIA568. <NUM>-D category <NUM>-<NUM> levels for the required data speed transmissions. Such compensation prevents errors from occurring for the transmission of the data signals.

<FIG> is a diagrammatic view of a system <NUM> for power loss reduction incorporated into a two pair cabling arrangement (e.g., the cabling arrangement of <FIG>). The system <NUM> includes an Ethernet switch or hub <NUM> (including power source equipment <NUM>) and a powered device circuit <NUM> (including a powered device <NUM>) electrically and communicatively connected to each other by a horizontal cable circuit <NUM>. The horizontal cable circuit <NUM> includes a first positive wire pair <NUM> (e.g., a first wire pair), a second positive wire pair <NUM> (e.g., a second wire pair), a first negative wire pair <NUM> (e.g., a third wire pair), and a second negative wire pair <NUM> (e.g., a fourth wire pair). The system <NUM> includes a power loss reduction device <NUM> (e.g., xLP) incorporated therein, the device <NUM> including correction circuitry <NUM>.

The correction circuitry <NUM> splits the positive polarity power transmission between the first and second positive wire pairs <NUM>, <NUM>, and similarly splits the negative polarity power transmission between the first and second negative wire pairs <NUM>, <NUM>. The powered device <NUM> internally merges the positive polarity power transmission signals into the first positive wire pair <NUM>. The correction circuitry <NUM> merges the negative polarity power transmission signals into the first negative wire pair <NUM> prior to entering the switch or hub <NUM>.

<FIG> is a diagrammatic view of a system <NUM> for power loss reduction incorporated into a four pair cabling arrangement (e.g., the cabling arrangement of <FIG>). For clarity, same reference numbers are used to same structures throughout the diagrams. Similar to the system <NUM> of <FIG>, the system <NUM> of <FIG> includes the Ethernet switch or hub <NUM> (including the power source equipment <NUM>) connected to the powered device circuit <NUM> (including the powered device <NUM>) by a horizontal cable circuit <NUM>. The horizontal cable circuit <NUM> includes the first and second positive wire pairs <NUM>, <NUM>, and the first and second negative wire pairs <NUM>, <NUM>.

The system <NUM> includes a power loss reduction device <NUM> incorporated therein (e.g., a high power reduction device xHP) including correction circuitry <NUM>. The correction circuitry <NUM> can be used to split each of the first and second positive polarity wire pairs <NUM>, <NUM> into their respective secondary positive polarity wire pairs <NUM>, <NUM>, which are part of a secondary wire pair circuit <NUM>. The system <NUM> includes another power loss reduction device <NUM> incorporated therein (e.g., a high power reduction device xHPC) including correction circuitry <NUM>. The correction circuitry <NUM> can be used to combine the power transmitted along the first positive polarity wire pair <NUM> and the secondary positive polarity wire pair <NUM> into only the first positive polarity wire pair <NUM>, and similarly combine the power transmitted along the second positive polarity wire pair <NUM> and the secondary positive polarity wire pair <NUM> into only the second positive polarity wire pair <NUM>, prior to entering the powered device circuit <NUM>.

The correction circuitry <NUM> can perform a similar splitting for the negative polarity power signals (e.g., splitting the power signal from the first negative polarity wire pair <NUM> into the first negative polarity wire pair <NUM> and a secondary negative polarity wire pair <NUM>, and splitting the power signal from the second negative polarity wire pair <NUM> into the second negative polarity wire pair <NUM> and a secondary negative polarity wire pair <NUM>). The correction circuitry <NUM> can combine the signals into their respective first and second negative polarity wire pairs <NUM>, <NUM> prior to entering the switch or hub <NUM>. Thus, rather than four wire pairs for transmission of the power signal, eight wire pairs can be used. The data signals remain on the "original" wire pairs <NUM>-<NUM>.

<FIG> is a diagrammatic view of a system <NUM> for power loss reduction incorporated into a two pair cabling arrangement. For clarity, same reference numbers are used to same structures throughout the diagrams. Similar to the system <NUM> of <FIG>, the system <NUM> of <FIG> includes the Ethernet switch or hub <NUM> (including the power source equipment <NUM>) connected to the powered device circuit <NUM> (including the powered device <NUM>) by a horizontal cable circuit <NUM>. The horizontal cable circuit <NUM> includes the first and second positive wire pairs <NUM>, <NUM>, and the first and second negative wire pairs <NUM>, <NUM>. The second positive wire pair <NUM> and the second negative wire pair <NUM> act as "spare" wire pairs. The system <NUM> includes the power loss reduction device <NUM> (e.g., xLP) and associated correction circuitry <NUM> incorporated therein to split the power transmission along spare wire pairs <NUM>, <NUM>, respectively.

The powered device <NUM> can include a PD controller <NUM> electrically and communicatively connected to a DC/DC converter <NUM>, and two switches <NUM>. <FIG> illustrates that when inserting the exemplary xLP device into the system <NUM>, the power is split on the primary and secondary wire pairs <NUM>, <NUM>. The PD circuitry <NUM> shows the capability of the electrical connections to recombine the previously split power signal from the xLP device. The power signal enters the PD <NUM> at the interfacing pair transformers, which are electrically connected to rectifying bridge diodes that combine the power positive and negative polarities to their originating levels.

The xLP system <NUM> is designed for four pair cabling systems <NUM> that utilize two wire pairs for data transmission and two wire pairs for power transfer, such as 10BASE-T and 100BASE-TX Ethernet switches. Only one xLP adapter is needed for compliance with IEEE <NUM>. 3af or <NUM>. 3at powered devices. Since powered devices are designed to accept PoE in either format (alternative A in <FIG> or alternative B in <FIG>), they can receive power regardless of which alternative is implemented in the power sourcing equipment. When operating in alternative A mode, the powered devices automatically adjust for polarity of the power supply voltage. This ensures that the powered device will operate even if a crossover cable is being used.

The exemplary system discussed herein can be used on single UTP two or four-pair cable, as well as dual UTP four-pair cabling systems, with the results being improved power efficiency for PoE delivery. The system provides the end user improved, extended user cabling lengths and cost-saving benefits to the data center energy usage output. In high power settings, the xHP system is designed for high power <NUM> W and <NUM> W PoE (i.e., IEEE <NUM>. 3bt) which uses four pairs for power and data delivery. The power splitting system and process is similar to the xLP system, but is duplicated on a second set of cables, such as Siamese cables. Siamese cables are readily available on the market as Category 5E and Category <NUM> rated products, and in multiple lengths from multiple vendors.

<FIG> is a diagrammatic view of a system <NUM> for power loss reduction incorporated into an insulation displacement block for a four pair Ethernet powered system (e.g., 1000BASE-T), and <FIG> is a diagrammatic view of a system <NUM> for power loss reduction incorporated into an insulation displacement block for a two pair Ethernet powered system (e.g., 10BASE-T). Each system <NUM>, <NUM> includes an input plug <NUM> (e.g., an RJ45 8P8C plug, or the like) configured to be inserted into an input jack <NUM> of the insulation displacement block (IDC) <NUM>. The opposing side of the IDC <NUM> includes an output cable <NUM> fixedly coupled to the IDC <NUM>.

In some embodiments, rather than the output cable <NUM>, the IDC <NUM> can include an output jack configured to receive an RJ <NUM> plug. The correction splitting circuitry within the IDC <NUM> of the system <NUM> is directed to four pairs of wires (e.g., similar to the system of <FIG>), and the correction splitting circuitry within the IDS <NUM> of the system <NUM> is directed to two pairs of wires (e.g., similar to the system of <FIG> and <FIG>). In the system <NUM> of <FIG>, four common mode (CM) chokes can be used to block the data signal, allowed the respective wire splitting for power diversion without affecting the data signal. In the system <NUM> of <FIG>, two CM chokes can be used to block the data signal.

<FIG> is a diagrammatic view of a system <NUM> for power loss reduction incorporated into an insulation displacement block for a four pair Ethernet dual cable powered system. The system <NUM> includes the input plug <NUM> (e.g., an RJ45 8P8C plug, or the like) configured to be inserted into the input jack <NUM> of the IDC <NUM>. The opposing side of the IDS <NUM> includes two output cables 228a, 228b fixedly coupled to the IDC <NUM>. In some embodiments, one or more of the output cables 228a, 228b can be replaced with a jack capable of receiving an RJ45 input plug. The system <NUM> can include eight CM chokes for power diversion along eight wire pairs.

<FIG> is diagrammatic view of a system <NUM> for power loss reduction incorporated between an input single pair Ethernet (SPE) connector (e.g., a one pair plug) and an output insulation displacement block (EDC) for a <NUM>-paired, dual cable powered system of <FIG>. The system <NUM> can be substantially similar to the system <NUM>, except the system <NUM> includes two CM chokes for power diversion along two wire pairs.

<FIG> is a diagrammatic view of a system <NUM> for power loss reduction incorporated between an input SPE connector (e.g., a one pair plug) and an output SPE connector (e.g., a one pair plug) for a <NUM>-paired, dual cable powered system of <FIG>. The system <NUM> can be substantially similar to the system <NUM>, except the system <NUM> includes two output cable plugs 262a, 262b.

Each of <FIG> show the usage of such connection in a one pair cable system using the disclosed internal common mode choke of <FIG> in which one line is positive and one pair is negative, as described in IEEE802.3cg and IEEE802.3da. Such connection could be similar to the xHP system, as it would necessitate two such connectors to recombine the DC voltage signal. All systems of <FIG> can also be used for power delivery, if improving DC voltage efficiency was not the objective, as the line taps to other powered devices. In such line tap application, the data signal is blocked off, and each added powered device will reduce the main line power approximately by its requirement.

<FIG> is a diagrammatic view of a common mode wide band choke <NUM> capable of being incorporated into the system <NUM> for power loss reduction of <FIG>. The choke <NUM> includes a first wire pair <NUM>, a second wire pair <NUM>, a third wire pair <NUM>, and a magnetic core <NUM>. Operation of the choke <NUM> relative to the wire pairs is described in U. Patent No. <NUM>,<NUM>,<NUM>, which is incorporated herein by reference. <FIG> is a diagrammatic circuit diagram of the common mode wide band choke <NUM> of <FIG>.

<FIG> is a diagrammatic view of a common mode wide band choke <NUM> capable of being incorporated into the system <NUM> for power loss reduction of <FIG>. The choke <NUM> includes a first wire pair <NUM>, a second wire pair <NUM>, a third wire pair <NUM>, a fourth wire pair <NUM>, and a magnetic core <NUM>. Operation of the choke <NUM> relative to the wire pairs is substantially similar to the operation described in <CIT>, except the second wire pair <NUM> and the fourth wire pair <NUM> are not electrically connected. Each wire input and output is therefore separate, but shares the same toroidal core for opposing electromagnetic flux to provide data signal reduction. <FIG> is a diagrammatic circuit diagram of the common mode wide band choke <NUM> of <FIG>.

<FIG> is a top view of a common mode wide band choke of <FIG> incorporated into an electrical configuration on a two layer printed circuit board (PCB) <NUM> , and <FIG> is a bottom view of the common mode wide band choke of <FIG> incorporated into the PCB <NUM>. In particular, section <NUM> represents the common mode wide band choke, section <NUM> represents the RJ45 connection, and section <NUM> represents the IDC(s). Circuitry <NUM> represents the mode or alternative A operation for the system (e.g., IEEE <NUM> at and <NUM> af (such as the system of <FIG>)), and circuitry <NUM> represents the mode A/B operation of the system (e.g., IEEE <NUM> at and <NUM> af (such as the system of <FIG>)). The configuration of the choke in <FIG> and <FIG> can be used as an insert capable of being incorporated into an existing system such that power splitting can be performed by the system. The PCB <NUM> includes therein the integrated pair-to-pair signal compensation sections which reduce the coupled noise from adjacent data signal noises. Details of the PCB <NUM> are described in <CIT>, which is incorporated herein by reference.

<FIG> is a diagrammatic front view of a connector module <NUM> for a patch panel unit that incorporates circuitry one of the systems for power loss reduction discussed herein. The front face of the module <NUM> includes a housing <NUM> with a protruding housing section <NUM>. The front face of the section <NUM> includes jacks <NUM> capable of receiving an Ethernet plug, and internal circuitry discussed herein splits the power transmission received at the Ethernet plug into respective wire pairs to improve power transmission. In some embodiments, the module <NUM> can include six jacks <NUM>, although a greater or smaller number of jacks <NUM> is also envisioned. The sides of the housing <NUM> include grooves <NUM> configured for receipt of a complementary locking flange of a patch panel unit.

<FIG> is a diagrammatic rear view of the connector module <NUM> coupled to a patch panel unit <NUM>. The unit <NUM> includes a front face plate <NUM> with an opening configured to at least partially receive therethrough the section <NUM> of the module <NUM>. The unit <NUM> includes latches <NUM> on opposing sides with locking flanges capable of snapping into and engaging with the grooves <NUM> of the module <NUM> to retain the module <NUM> assembled with the patch panel unit <NUM>. The unit <NUM> includes mounting holes <NUM> for mounting the unit <NUM> to rails of a rack.

<FIG> is a diagrammatic front view of connector modules <NUM> of <FIG> for assembly with a patch panel unit <NUM>, and <FIG> is a diagrammatic front view of connector modules <NUM> assembled with a patch panel unit <NUM> in an exemplary embodiment. In some embodiments, the patch panel unit <NUM> can be a standard metal patch panel arrangement holding unit configured to retain the modules <NUM>.

<FIG> illustrates an example application of the system using the xLP adapter in a standard Ethernet UTP cabling system <NUM>. As used in the diagrams herein, Pc1 and Pc2 can represent rj45 UTP patch cords, FTP1 can represent an RJ45 field termination plug, and Hc1 can represent a four pair UTP horizontal cable. The system <NUM> includes a PoE network switch <NUM> as the power sourcing equipment (PSE) electrically and communicatively connected to a patch panel <NUM> (e.g., an xLP 24P patch panel) by a UTP patch cord <NUM>. In some embodiments, the corrective circuits of the exemplary system (e.g., corrective circuits A and B of <FIG>) can be incorporated into the patch panel <NUM>. In some embodiments, the corrective circuits can be incorporated into other cabling device structure, e.g., stand-alone station jack modules (see, e.g., <FIG> xHP patch panel), additional adapter panels that can be patched to a structure cabling system (e.g., such as the patch panels <NUM>, <NUM> of <FIG>), combinations thereof, or the like. The patch panel <NUM> is electrically and communicatively connected to one or more powered devices <NUM>, <NUM> (e.g., a PoE LP lighting, an IP camera, or the like) via a horizontal cable <NUM> (e.g., a horizontal C6 UTP cable) at a distance of <NUM> or less. The powered devices <NUM>, <NUM> can be connected to a field termination plug <NUM> of the horizontal cable <NUM>.

The exemplary system may be used in telecommunications cabling applications having powered devices at distances less than, equal to, or greater than <NUM>. The distance of the powered devices at an end-point from the network switch is taken into account when incorporating the system to ensure the desired amount of power is provided efficiently. Based on testing, the DC power evaluations have illustrated improved power efficiency when traditional cabling system adapters are replaced with an exemplary xLP or xHP adapter. Use of the exemplary system can achieve significant long term savings in data center energy to the end user as compared to traditional systems.

<FIG> is a diagrammatic view of a system for power loss reduction incorporated into a standard Ethernet UTP cabling system <NUM> in an exemplary embodiment. The system <NUM> includes a PoE network switch <NUM> as the power sourcing equipment (PSE) electrically and communicatively connected to a high power patch panel <NUM> (e.g., an xHP 24P patch panel) by a UTP patch cord <NUM>. The corrective circuits can be incorporated into, e.g., the patch panel <NUM>, stand-alone station jack modules, additional adapter panels that can be patched to a structure cabling system, combinations thereof, or the like. The patch panel <NUM> is electrically and communicatively connected to one or more powered devices <NUM>, <NUM> (e.g., PoE high power light, a PTZ camera, or the like) via a horizontal cable <NUM> (e.g., a Siamese cable). The powered devices <NUM>, <NUM> can be connected to a field termination plug <NUM> of a patch cord <NUM>. The patch cord <NUM> can include a field termination plug <NUM> at an opposing end such that the plug <NUM> can be electrically coupled to a high power jack <NUM>.

<FIG> is a diagrammatic view of a system for power loss reduction incorporated into a standard Ethernet UTP cabling system <NUM> that is external to a structured cabling system in an exemplary embodiment. The system <NUM> includes a PoE network switch <NUM> as the power sourcing equipment (PSE) electrically and communicatively connected to a first patch panel <NUM> (e.g., an xLP 24P coupler patch panel) by a UTP patch cord <NUM>. The system <NUM> includes a secondary patch panel <NUM> (e.g., a C6 24P patch panel) connected to the patch panel <NUM> by a UTP patch cord <NUM>. The corrective circuits can be incorporated into, e.g., the patch panel <NUM>, the patch panel <NUM>, stand-alone station jack modules, additional adapter panels that can be patched to a structure cabling system, combinations thereof, or the like. The patch panel <NUM> is electrically and communicatively connected to one or more powered devices <NUM>, <NUM> (e.g., PoE low power light, an IP camera, or the like) via a horizontal cable <NUM>. The powered devices <NUM>, <NUM> can be connected to a field termination plug <NUM> of the horizontal cable <NUM>.

<FIG> and <FIG> show the power efficiency improvement when adding or switching out a standard connectivity (e.g., a patch panel) with an exemplary xLP patch panel or adding an xHP adapter panel, respectively. In particular, <FIG> shows the power efficiency improvement when using an xLP cabling system at various cabling lengths for <NUM> W/<NUM> mA power source equipment to a <NUM> W powered device. Power efficiencies improved by over <NUM>% on the average per cable distances when switched to the xLP adapters (as compared to traditional systems).

Claim 1:
A system (<NUM>) for reducing power loss in telecommunications cabling, the system (<NUM>) comprising:
a power supply (<NUM>);
at least one powered device (<NUM>);
a cabling system (<NUM>) electrically and communicatively connecting the power supply (<NUM>) to the at least one powered device (<NUM>), the cabling system (<NUM>) including a first positive polarity wire pair (<NUM>) and a first negative polarity wire pair (<NUM>); and
a corrective circuit module (116a, 116b, 118a, 118b) connected to the cabling system (<NUM>), the corrective circuit module (116a, 116b, 118a, 118b) including (i) a second positive polarity wire pair (<NUM>), (ii) a second negative polarity wire pair (<NUM>), (iii) wiring (<NUM>, <NUM>) connecting the first positive polarity wire pair (<NUM>) with the second positive polarity wire pair (<NUM>), and (iv) wiring (<NUM>, <NUM>) connecting the first negative polarity wire pair (<NUM>) with the second negative polarity wire pair (<NUM>);
characterized in that
the corrective circuit module (116a, 116b, 118a, 118b) includes a first correction circuit (116a) that is adapted to split a power signal of the first positive polarity wire pair (<NUM>) for transmission along both the first and second positive polarity wire pairs (<NUM>, <NUM>); and
wherein the corrective circuit module (116a, 116b, 118a, 118b) includes a second correction circuit (118b) that is adapted to split a power signal of the first negative polarity wire pair (<NUM>) for transmission along both the first and second negative polarity wire pairs (<NUM>, <NUM>).