Patent Description:
The disclosure relates to a display panel manufacturing technical field, and more particularly to an array substrate, a manufacturing method of an array substrate, and a liquid crystal display panel.

Due to its small size, low power consumption and no radiation, a liquid crystal display panel (LCD) has drawn great attention in a field of a flat panel display and has been widely applied to all walks of life. The liquid crystal display panel is usually made of a color film substrate and an array substrate. Wherein the array substrate generally comprises a source-drain layer, an interval layer disposed on the source-drain layer, and a pixel electrode layer disposed on the interval layer. Wherein a via hole needs to be disposed on the interval layer so that the pixel electrode layer is electrically connected to the source-drain layer through the via hole so as to drive and display the liquid crystal display panel. When the pixel electrode is electrically connected to the source-drain through the via hole, a groove is formed on the pixel electrode layer corresponding to a position of the via hole. Wherein since an area of the via hole is smaller so that an alignment film is subsequently disposed on the pixel electrode layer, bubbles are likely to be generated in a groove, so that an alignment liquid for forming the alignment film does not easily enter the groove of the pixel electrode layer and is evenly dispersed in the groove; therefore, an alignment film is lacking in the area, so that a display abnormality occurs in the liquid crystal display panel. <CIT> and <CIT> (<CIT>) are relevant prior arts and relate to the field of the liquid crystal display panel. <CIT> more relates to a liquid crystal display panel and a via hole used for electrical connection. The via hole is provided on an insulating substrate with a first metal layer and a second metal layer provided on an upper surface and a lower surface of the insulating substrate. <CIT> defines a structure of array substrate provided with contact holes passing through the color resist layer and in contact with the metal layer. The contact holes are arranged so that the alignment film droplets can be distributed when the alignment film droplets drop right onto the contact holes.

The present invention is directed to an array substrate as recited in appended independent claim <NUM> and to a manufacturing method as recited in appended independent claim <NUM>. Other aspects of the invention are recited in the appended dependent claims. The claimed invention ensures that each position of a pixel electrode layer of the array substrate can be covered with an alignment film to ensure normal display of the liquid crystal display panel formed by the array substrate.

The array substrate comprises a substrate, a source-drain layer stacked on the substrate, the pixel electrode layer disposed on the source-drain layer, and an interval layer stacked between the source-drain layer and the pixel electrode layer; wherein the interval layer comprises a via hole structure, the via hole structure comprises a via hole and a plurality of drainage grooves provided at intervals on an edge of the via hole, the drainage groove is recessed in a direction from an inner wall of the via hole away from the inner portion of the via hole, the via hole has a first hole and a second hole opposite to the first hole, and the drainage groove extends from the first hole to the second hole; the pixel electrode layer is electrically connected to the source-drain layer through the via hole structure.

Wherein an angle between an extending direction of the drainage groove and an axial direction of the via hole is the same as the angle between the inner wall of the via hole and the axial direction.

Wherein the pixel electrode layer forms a groove corresponding to a position of the via hole, and the pixel electrode layer forms a sub-drainage groove corresponding to the position of each drainage groove.

Wherein the array substrate further comprises an alignment layer, and the alignment layer covers the pixel electrode layer.

The manufacturing method of the array substrate comprises steps of:.

Wherein "forming the via hole structure on the interval layer by the patterning process" comprises the steps of:.

Wherein the angle between the extending direction of the drainage groove and the axial direction of the via hole is the same as the angle between the inner wall of the via hole and the axial direction, the photomask comprises a light-shielding area, a light-transmissive area and a plurality of semi-light-transmissive areas, the plurality of semi-light-transmissive areas surround the light-transmissive area and are arranged at intervals, the semi-transmissive areas are connected to the light-transmissive area, and a light transmittance of the semi-light-transmissive area gradually increases from a direction away from the light-transmissive area towards the direction of the light-transmissive area; the via hole is formed corresponding to the position of the light-transmissive area on the interval layer, and the drainage groove is formed corresponding to the position of the semi-light-transmissive area.

Wherein when the angle between the extending direction of the drainage groove and the axial direction of the via hole is different from the angle between the inner wall of the via hole and the axial direction, the photomask comprises the light-shielding area, a first light-transmissive area and a plurality of second light-transmissive areas, the plurality of second light-transmissive areas surround the first light-transmissive area and are arranged at intervals, and the second light-transmissive areas are connected to the first light-transmissive area; the via hole is formed corresponding to the position of the first light-transmissive area on the interval layer, and the drainage groove is formed corresponding to the position of the second light-transmissive area.

Wherein the step of "forming the alignment layer covering the pixel electrode layer on the pixel electrode layer, covering the pixel electrode layer, the inner wall of the groove and the inner wall of the sub-drainage groove of the pixel electrode layer" comprises the steps:.

The liquid crystal display panel includes the array substrate, a color film substrate facing the array substrate, and a liquid crystal layer sandwiched between the array substrate and the color film substrate, the pixel electrode layer of the array substrate facing the liquid crystal layer.

The present disclosure provides the array substrate, the manufacturing method of the array substrate and the liquid crystal display panel, the plurality of drainage grooves provided at intervals on the edge of the via hole, when the pixel electrode layer stacked on the interval layer, forming the groove of same size of the via hole corresponding to the position of the via hole by the pixel electrode layers, and forming the sub-drainage groove of same size of the drainage groove corresponding to the position of each drainage groove.

Furthermore, when the alignment layer is disposed on the pixel electrode, the alignment liquid for forming the alignment layer can flow into the groove on the pixel electrode through the sub-drainage groove, so that the position of the groove on the pixel electrode layer can also cover the alignment film, so as to ensure the normal display of the liquid crystal display panel formed by the array substrate.

To describe the technical solutions in the embodiments of the present disclosure or in the prior art more clearly, the following briefly introduces the accompanying figures required for describing the embodiments or the prior art, apparently, the accompanying figures in the following description show merely some embodiments of the present disclosure, and a person of ordinary skill in the art may still derive other drawings from these accompanying figures without creative efforts.

The technical solutions in the embodiments of the present disclosure will be described clearly and completely hereinafter with reference to the accompanying figures in the embodiments of the present disclosure, apparently, the described embodiments are merely some but not all embodiments of the present disclosure. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present disclosure without creative efforts shall fall within the protection scope of the present disclosure.

See <FIG>, the present disclosure provides an array substrate <NUM>. The array substrate <NUM> comprises a substrate <NUM>, a source-drain layer <NUM> stacked on the substrate <NUM>, a pixel electrode layer <NUM> disposed on the source-drain layer <NUM>, and an interval layer <NUM> stacked between the source-drain layer <NUM> and the pixel electrode layer <NUM>; wherein the interval layer <NUM> comprises a via hole structure <NUM>, the pixel electrode layer <NUM> is electrically connected to the source-drain layer <NUM> through the via hole structure <NUM>. In this embodiment, the interval layer <NUM> comprises an insulating layer and a planarization layer. It may be understood that the interval layer <NUM> may further comprise other layer structures according to a design requirement of the array substrate <NUM>.

See <FIG> and <FIG>, the via structure <NUM> comprises the via hole <NUM> and a plurality of drainage grooves <NUM> provided at intervals on an edge of the via hole <NUM>, a liquid can flow smoothly into the via hole <NUM> through the plurality of drainage grooves <NUM>. Wherein a flowing direction of the liquid is an extending direction of the drainage groove <NUM>. The drainage groove <NUM> is recessed from in a direction an inner wall <NUM> of the via hole <NUM> away from the inner portion of the via hole <NUM>. And the via hole <NUM> has a first hole <NUM> and a second hole <NUM> opposite to the first hole <NUM>. The drainage groove <NUM> extends from the first hole <NUM> to the second hole <NUM>, that is, the liquid can flow from one end of the first hole <NUM> to the second hole <NUM> through the drainage groove <NUM>, so that the liquid can smoothly flow into the hole. In this embodiment, an angle between an extending direction of the drainage groove <NUM> and an axial direction of the via hole is the same as the angle between the inner wall <NUM> of the via hole and the axial direction, and the drainage groove <NUM> extends from an end of the first hole <NUM> to the end of the second hole <NUM>. See <FIG>, in the other embodiment of the present disclosure, the angle between the axial direction of the liquid guiding groove <NUM> and the inner wall <NUM> of the via hole is different from the angle of the axial direction. In addition, it can be understood that the drainage groove <NUM> may not extend to one end of the second hole <NUM>, and the drainage groove <NUM> can still achieve an effect of guiding the liquid into the via hole <NUM>. In addition, the drainage groove <NUM> may have any shape, for example, the drainage groove <NUM> may be V-shaped, semicircular, parabolic and so on.

The pixel electrode layer <NUM> is stacked on the interval layer <NUM>, and the groove <NUM> is formed at the position corresponding to the via hole <NUM>, the inner wall of the groove <NUM> has the same size as the inner wall of the via hole <NUM>. The sub-drainage groove <NUM> is formed at the position corresponding to each drainage grooves <NUM>, and the inner wall of the sub-drainage groove <NUM> has the same size as the inner wall of the drainage groove <NUM>.

Further, the array substrate <NUM> comprises an alignment layer <NUM>, and the alignment layer <NUM> covers the pixel electrode layer <NUM>, that is the alignment layer <NUM> can cover the inner wall of the groove <NUM> and the sub-drainage groove <NUM>. Specifically, an alignment liquid for forming the alignment layer <NUM> can flow into the groove <NUM> through the sub-drainage groove <NUM>, and bubbles are not easily generated in the groove <NUM> due to a surface of the alignment liquid, so that the alignment layer <NUM> can be covered and evenly dispersed in the groove <NUM> and the alignment layer <NUM> can cover any position of the pixel electrode layer <NUM>.

See <FIG>, the present disclosure further provides a manufacturing method of array substrate, comprising:.

See <FIG>, the step <NUM> further comprises:
An interval material layer is formed on the source-drain layer. The interval material layer is formed on the source-drain layer <NUM> by a vapor deposition and a coating and so on. In this embodiment, the interval layer <NUM> comprises an insulating layer and a planarization layer stacked on the insulating layer. The insulating layer is stacked and covered on the source-drain layer <NUM> by the vapor deposition; and the planarization layer is formed on the insulating layer by coating. Afterwards, a photoresist material layer is formed on the interval material layer by the coating process.

Step <NUM>, the photoresist material layer is exposed and developed through a photomask <NUM> to transfer the via hole pattern on the photomask <NUM> on the photoresist material layer. The via hole pattern on the photomask <NUM> is the same size as the via hole structure. Specifically, a pattern on the photomask is also different according to different via hole structure.

See <FIG> and <FIG>, in this embodiment, the drainage groove <NUM> is parallel to the axial direction of the via hole. The photomask comprises the light-shielding area <NUM>, a first light-transmissive area <NUM> and a plurality of second light-transmissive areas <NUM>, the plurality of second light-transmissive areas <NUM> surround the first light-transmissive area <NUM> and are arranged at intervals, and the second transmissive areas <NUM> are connected to the first light-transmissive area <NUM>. A portion of the photomask <NUM> other than the first light-transmissive area <NUM> and the second light-transmissive area <NUM> is the light-shielding area <NUM>. Wherein forming the via hole <NUM> corresponding to the position of the first light-transmissive area <NUM> on the interval layer <NUM>, and forming the drainage groove <NUM> corresponding to the position of the second light-transmissive area <NUM>.

Alternatively, see <FIG> and <FIG>, in other embodiments of the present disclosure, when the angle is formed between the drainage groove <NUM> of the via structure <NUM> and the inner wall of the via hole <NUM>, the photomask <NUM> comprises the light-shielding area <NUM>, a light-transmissive area <NUM> and a plurality of semi-light-transmissive areas <NUM>. The semi-light-transmissive area <NUM> surround the light-transmissive area <NUM> and are arranged at intervals, and the semi-transmissive area <NUM> is connected to the light-transmissive area <NUM>, and a light transmittance of the semi-light-transmissive area <NUM> gradually increases from a direction away from the light-transmissive area <NUM> towards the direction of the light-transmissive area <NUM>. The portion of the photomask <NUM> other than the light-transmissive area <NUM> and the semi-light-transmissive area <NUM> is the light-shielding area <NUM>. Wherein the via hole <NUM> is formed on the interval layer <NUM> corresponding to the position of the light-transmissive area <NUM>, and the drainage groove <NUM> is formed corresponding to the position of the light-transmissive area <NUM>. In addition, since the light transmittance of the semi-light-transmissive area <NUM> gradually increases from the direction away from the light-transmissive area <NUM> toward the light-transmissive area <NUM>, an etching depth corresponding to the semi-transmissive area <NUM> is gradually changed, so that the angle is formed between the drainage groove <NUM> and the inner wall of the via hole <NUM>. Transferring the via pattern on the photomask <NUM> to the photoresist material layer specifically comprises providing the photomask <NUM> on the photoresist material layer, the photoresist material layer is exposed and developed by the photomask <NUM> to transfer the via pattern on the photomask <NUM> to the photoresist material layer.

Step <NUM>, etching the interval material layer, and transferring the via pattern formed on the photoresist material layer to the interval material layer to acquire the interval layer <NUM> with the via structure <NUM>.

Step <NUM>, peeling off the photoresist material layer. After etching the interval material layer is completed and the interval layer <NUM> with the via hole structure <NUM> is formed, the photoresist material layer can be peeled off.

Step <NUM>, forming the pixel electrode layer <NUM> on the interval layer <NUM>, and electrically connecting the pixel electrode layer <NUM> to the source-drain layer <NUM> through the via hole structure <NUM>, forming the groove <NUM> of same size of the via hole corresponding to the position of the via hole <NUM> by the pixel electrode layers <NUM>, and forming the sub-drainage groove <NUM> of same size of the drainage groove <NUM> corresponding to the position of each drainage groove <NUM>. In this embodiment, the pixel electrode layer <NUM> is formed on the interval layer <NUM> by the vapor deposition.

Step <NUM>, covering an alignment layer <NUM> on the pixel electrode layer <NUM>, the alignment layer <NUM> covering the pixel electrode layer <NUM>, the inner wall of the groove <NUM> and the inner wall of the sub-drainage groove <NUM> of the pixel electrode layer <NUM>.

Specifically, see <FIG>, step <NUM> further comprises:.

See <FIG>, the present disclosure further provides a liquid crystal display panel <NUM>, the liquid crystal display panel <NUM> comprises the array substrate <NUM>, a color film substrate <NUM> facing the array substrate <NUM>, and a liquid crystal layer <NUM> provided between the array substrate <NUM> and the color film substrate <NUM>. The alignment layer <NUM> of the array substrate <NUM> contacts with the liquid crystal layer <NUM>, and liquid crystal molecules in the liquid crystal layer <NUM> are pre-aligned by the alignment layer <NUM>.

Claim 1:
An array substrate (<NUM>), comprising a substrate (<NUM>), a source-drain layer (<NUM>) stacked on the substrate (<NUM>), a pixel electrode layer (<NUM>) disposed on the source-drain layer (<NUM>), and an interval layer (<NUM>) disposed between the source-drain layer (<NUM>) and the pixel electrode layer (<NUM>); wherein the interval layer (<NUM>) comprises a via hole structure (<NUM>), the via hole structure (<NUM>) comprises a via hole (<NUM>) and a plurality of drainage grooves (<NUM>) provided at intervals along a circumference of the via hole (<NUM>), the via hole (<NUM>) has a circular shape, the drainage grooves (<NUM>) are recessed in from an inner wall of the via hole (<NUM>), the via hole (<NUM>) comprises a first hole (<NUM>) and a second hole (<NUM>) opposite to the first hole (<NUM>), and the drainage grooves (<NUM>) extend from the first hole (<NUM>) to the second hole (<NUM>),wherein the pixel electrode layer (<NUM>) is electrically connected to the source-drain layer (<NUM>) through the via hole structure (<NUM>); and
wherein the pixel electrode layer (<NUM>) forms a groove (<NUM>) in a position of the via hole (<NUM>), the pixel electrode layer (<NUM>) forms a plurality of sub-drainage grooves (<NUM>) in the plurality of drainage grooves (<NUM>), respectively; the sub-drainage grooves (<NUM>) are evenly distributed along the entire circumference of the via hole (<NUM>); and an alignment layer (<NUM>) covers the pixel electrode layer (<NUM>) uninterruptedly, extending within the via hole structure (<NUM>) and beyond the via hole structure (<NUM>), along an inner wall of the groove (<NUM>), and an inner wall of each of the sub-drainage grooves (<NUM>) of the pixel electrode layer (<NUM>).