Patent Description:
Recently, display panels have been used for various purposes. Also, as display panels have become thinner and lighter, their range of uses has widened.

As an area occupied by a display area in a display panel expands, various functions combined or associated with a display panel may be added. As a way of adding various functions while expanding the area, research has been conducted on the use of a portion of the display area for functions other than a function of displaying images.

<CIT> discloses a display device provided with: a base substrate; a light emitting element constituting a display region that is provided on the base substrate via a TFT layer; a sealing film, which is provided so as to cover the light emitting element, and in which a first inorganic film and a second inorganic film are laminated in this order; and a non-display region that is provided in an island shape in the display region. In the non-display region, a frame-shaped inner peripheral wall protruding in the thickness direction of the base substrate is provided along the boundary to the display region, and on the surface of the inner peripheral wall, an organic buffer layer is provided such that the organic buffer layer is sandwiched between the first inorganic film and the second inorganic film. <CIT> discloses a display device including: a light-emitting substrate including a base substrate having a non-display area and a display area that surrounds the non-display area; an input sensing unit disposed on the light-emitting substrate; and a hole penetrating front and rear surfaces of each of the light-emitting substrate and the input sensing unit, wherein the light-emitting substrate includes a plurality of recesses, the non-display area includes a hole area which overlaps with the hole, a recess area in which the plurality of recesses are disposed and surrounds the hole area, and a peripheral area which surrounds the recess area, and the input sensing unit includes a plurality of first sensor members overlapping the display area and a first connector connecting the first sensor members and overlapping the groove area. <CIT> discloses a display device with a through-hole that can prevent external moisture or oxygen from permeating into a light emitting element. The display device with a through-hole includes a substrate including a display area in which pixels are disposed and a non-display area surrounding the display area, and further including a through-hole in the display area, a first dam surrounding the through-hole, a first conductive line provided along the first dam between the first dam and the pixels, and a second conductive line provided along the first dam between the first dam and the through-hole.

<CIT> discloses a display device including: a substrate; an insulating layer arranged above the substrate; a through portion configured to pass through the substrate and the insulating layer; a pixel array located above the insulating layer and including pixels each including a light-emitting element including a pixel electrode, an opposite electrode facing the pixel electrode, and an emission layer arranged between the pixel electrode and the opposite electrode, the pixels at least partially surrounding the through portion; and a pattern portion arranged between the through portion and the pixel array, wherein the pattern portion includes: a recess that is concave along a thickness direction of the insulating layer; and a cladding layer arranged above the insulating layer, configured to cover the recess, and including a material different from the insulating layer.

Aspects of one or more embodiments include a display panel including at least one opening arranged inside a display area and an electronic apparatus including the display panel.

According to some embodiments, the at least one organic material layer may include at least one of a hole transport layer, a hole injection layer, an electron transport layer, or an electron injection layer.

According to some embodiments, the burr may include silver (Ag), magnesium (Mg), aluminium (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or an alloy thereof.

According to some embodiments, the display panel may further include a first partition arranged between the display area and the opening, wherein an edge of the opposite electrode and an edge of the at least one organic material layer may be closer to the display area than the first partition.

According to some embodiments, the display panel may further include a second partition arranged closer to the opening than the first partition, wherein a height of the second partition may be different from a height of the first partition.

According to some embodiments, the display panel may further include a third partition closer to the opening than the second partition, wherein a height of the third partition is smaller than the height of the first partition and the height of the second partition.

According to some embodiments, the display panel may further include a structure arranged on the organic insulating layer and including a plurality of protrusions and a concave valley between the plurality of protrusions, wherein a portion of the organic encapsulation layer may be in the concave valley.

According to some embodiments, the display panel may further include signal lines arranged on the substrate, wherein at least one of the signal lines may include a bypass portion bypassing around the opening, wherein the bypass portion may overlap the plurality of protrusions or the concave valley.

According to some embodiments, the at least one inorganic encapsulation layer may include a first inorganic encapsulation layer arranged under the organic encapsulation layer and a second inorganic encapsulation layer arranged on the organic encapsulation layer, wherein the first inorganic encapsulation layer and the second inorganic encapsulation layer may directly contact each other in an area between the first partition and the opening.

According to some embodiments, the display panel may further include a planarization insulating layer arranged on the second inorganic encapsulation layer to overlap a portion of the organic encapsulation layer and the first partition and including an organic insulating material.

According to some embodiments, the planarization insulating layer may have a closed-loop shape covering the periphery of the opening.

According to some embodiments, the planarization insulating layer may cover the display area and the periphery of the opening.

According to one or more embodiments, an electronic apparatus includes a display panel as defined in claim <NUM>.

According to some embodiments, the display panel may further include a plurality of protrusions located on the organic insulating layer and closer to the display area than the first partition and a concave valley between the plurality of protrusions, wherein a portion of the organic encapsulation layer may be in the concave valley.

According to some embodiments, the opposite electrode and the at least one organic material layer may extend beyond the plurality of protrusions and the concave valley.

According to some embodiments, an edge of the opposite electrode facing the opening and an edge of the at least one organic material layer may be located between the display area and the first partition, wherein the edge of the at least one organic material layer may be closer to the display area than the edge of the opposite electrode.

According to some embodiments, the display panel may further include a second partition arranged closer to the opening than the first partition, wherein a height of the second partition may be greater than a height of the first partition.

According to some embodiments, the display panel may further include a third partition arranged closer to the opening than the second partition, wherein a height of the third partition may be smaller than the height of the first partition and the height of the second partition.

According to some embodiments, the display panel may further include an input sensing layer arranged on the thin film encapsulation layer and including at least one conductive layer and at least one insulating layer.

According to some embodiments, the display panel may further include a planarization insulating layer arranged on the thin film encapsulation layer, overlapping a portion of the organic encapsulation layer and the first partition, and including an organic insulating material.

According to some embodiments, the at least one insulating layer of the input sensing layer may include the planarization insulating layer and cover the periphery of the opening and the display area.

According to some embodiments, the component may include a sensor or a camera.

According to the claimed invention, a portion of the opposite electrode protrudes further toward the opening than the at least one organic material layer and includes a burr, which according to some embodiments may include silver (Ag), magnesium (Mg), aluminium (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or an alloy thereof.

At least some of the above and other aspects of the invention are set out in the claims.

Other aspects, features, and characteristics of some embodiments other than those described above will become more apparent from the accompanying drawings, the appended claims and their equivalents, and the detailed description of the disclosure.

The above and other aspects, features, and characteristics of certain embodiments will be more apparent from the following description taken in conjunction with the accompanying drawings, in which:.

Reference will now be made in more detail to aspects of some embodiments, which are illustrated in the accompanying drawings, wherein like reference numerals refer to like elements throughout.

Because the disclosure may have diverse modified embodiments, particular embodiments are illustrated in the drawings and are described in the detailed description. An effect and a characteristic of the disclosure, and a method of accomplishing these will be apparent when referring to embodiments described with reference to the drawings. The disclosure may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein.

Aspects of one or more embodiments of the disclosure will be described below in more detail with reference to the accompanying drawings. Those components that are the same or are in correspondence with each other are rendered the same reference numeral regardless of the figure number, and redundant descriptions are omitted.

It will be understood that although terms such as "first" and "second" may be used herein to describe various components, these components should not be limited by these terms and these terms are only used to distinguish one component from another component.

It will be further understood that the terms "comprises" and/or "comprising" used herein specify the presence of stated features or elements, but do not preclude the presence or addition of one or more other features or elements.

It will be understood that when a layer, region, or element is referred to as being "formed on" another layer, area, or element, it may be directly or indirectly formed on the other layer, region, or element. That is, for example, intervening layers, regions, or elements may be present.

Sizes of elements in the drawings may be exaggerated for convenience of description. In other words, because sizes and thicknesses of components in the drawings are arbitrarily illustrated for convenience of description, the following embodiments are not limited thereto.

When a certain embodiment may be implemented differently, a particular process order may be performed differently from the described order.

It will be understood that when a layer, region, or component is referred to as being connected to another layer, region, or component, it may be directly or indirectly connected to the other layer, region, or component. That is, for example, intervening layers, regions, or components may be present. For example, it will be understood that when a layer, region, or component is referred to as being "electrically connected to" another layer, region, or component, it may be "directly electrically connected to" the other layer, region, or component or may be "indirectly electrically connected to" the other layer, region, or component with one or more intervening layers, regions, or components therebetween.

As used herein, "A and/or B" represents the case of A, B, or A and B. Also, "at least one of A or B" represents the case of A, B, or A and B.

<FIG> is a perspective view schematically illustrating an electronic apparatus according to some embodiments.

Referring to <FIG>, an electronic apparatus <NUM> may be an apparatus for displaying moving images (e.g., video images) or still images (e.g., static images) and may be used as a display screen of various products such as televisions, notebook computers, monitors, billboards, and Internet of Things (IoT) as well as portable electronic apparatuses such as mobile phones, smart phones, tablet personal computers (PCs), mobile communication terminals, electronic notebooks, electronic books, portable multimedia players (PMPs), navigation, and Ultra Mobile PCs (UMPCs). Also, the electronic apparatus <NUM> according to some embodiments may be used in wearable devices such as smart watches, watch phones, glasses-type displays, and head-mounted displays (HMDs). Also, the electronic apparatus <NUM> according to some embodiments may be used as a center information display (CID) located at a vehicle's instrument panel or a vehicle's center fascia or dashboard, a room mirror display replacing a vehicle's side mirror, or a display located at a rear side of a vehicle's front seat as an entertainment for a vehicle's rear seat. For convenience of description, <FIG> illustrates that the electronic apparatus <NUM> according to some embodiments is used as a smart phone.

The electronic apparatus <NUM> may be formed in a rectangular shape in a plan view. For example, the electronic apparatus <NUM> may have a rectangular planar shape having a short side in the x direction and a long side in the y direction as illustrated in <FIG>. An edge where the short side in the x direction and the long side in the y direction meet each other may be formed in a round shape having a certain curvature or may be formed in a right-angle shape. The planar shape of the electronic apparatus <NUM> is not limited to a rectangular shape and may be any other polygonal shape, an elliptical shape, or an irregular shape.

The electronic apparatus <NUM> may include an opening area OA (or a first area) and a display area DA (or a second area) at least partially surrounding the opening area OA. The electronic apparatus <NUM> may include an intermediate area MA as a third area located between the opening area OA and the display area DA, and a peripheral area PA (or a fourth area) outside the display area DA, for example, around the display area DA.

The opening area OA may be located inside the display area DA. According to some embodiments, the opening area OA may be arranged at the upper center of the display area DA as illustrated in <FIG>. Alternatively, the opening area OA may be variously arranged such as arranged at the center of the display area DA or arranged at the upper left or upper right of the display area DA. In the plan view of the specification, "left," "right," "top," and "bottom" may refer to the directions when the electronic apparatus <NUM> is viewed in the vertical direction. For example, "left" may refer to the -x direction, "right" may refer to the +x direction, "top" may refer to the +y direction, and "bottom" may refer to the -y direction. <FIG> illustrates that one opening area OA is arranged; however, in other embodiments, a plurality of opening areas OA may be provided.

<FIG> is a simplified cross-sectional view of a display panel according to some embodiments, taken along the line I-I' of <FIG>.

Referring to <FIG>, the electronic apparatus <NUM> may include a display panel <NUM> and a component <NUM> arranged to overlap an opening <NUM> of the display panel <NUM>. The display panel <NUM> and the component <NUM> may be accommodated in a housing HS.

The display panel <NUM> may include a display element layer <NUM>, an input sensing layer <NUM>, an optical functional layer <NUM>, and a cover window <NUM>.

The display element layer <NUM> may include display elements that emit light to display images. The display elements may each include a light emitting diode, for example, an organic light emitting diode including an organic emission layer. According to some embodiments, the light emitting diode may be an inorganic light emitting diode including an inorganic material. The inorganic light emitting diode may include a PN diode including inorganic semiconductor-based materials. When a voltage is applied to a PN junction diode in a forward direction, holes and electrons may be injected thereinto and energy generated by recombination of the holes and electrons may be converted into light energy to emit light of a certain color. The inorganic light emitting diode described above may have a width of several to several hundred micrometers or a width of several to several hundred nanometers, and according to some embodiments, the inorganic light emitting diode may be referred to as a micro LED or nano LED.

The input sensing layer <NUM> may be configured to acquire coordinate information according to an external input signal, for example, a touch event (e.g., from a user's finger, a stylus, etc.). The input sensing layer <NUM> may include a sensing electrode (or a touch electrode) and signal lines (trace lines) connected to the sensing electrode. The input sensing layer <NUM> may be arranged on the display element layer <NUM>. The input sensing layer <NUM> may be configured to sense an external input by a mutual capacitance method and/or a self capacitance method, or any other suitable touch input sensing technique.

The input sensing layer <NUM> may be directly formed on the display element layer <NUM> or may be separately formed and then coupled thereto through an adhesive layer such as an optical clear adhesive. For example, the input sensing layer <NUM> may be continuously formed after the process of forming the display element layer <NUM>, and in this case, an adhesive layer may not be located between the input sensing layer <NUM> and the display element layer <NUM>. <FIG> illustrates that the input sensing layer <NUM> is arranged between the display element layer <NUM> and the optical functional layer <NUM>; however, according to some embodiments, the input sensing layer <NUM> may be arranged on the optical functional layer <NUM>.

The optical functional layer <NUM> may include an anti-reflection layer. The anti-reflection layer may be configured to reduce the reflectance of light (external light) incident from the outside through the cover window <NUM> toward the display panel <NUM>. The anti-reflection layer may include a phase retarder and a polarizer.

According to some embodiments, the anti-reflection layer may include a black matrix and color filters. The color filters may be arranged considering the color of light emitted from each of the light emitting diodes of the display element layer <NUM>. According to some embodiments, the anti-reflection layer may include a destructive interference structure. The destructive interference structure may include a first reflection layer and a second reflection layer arranged on different layers. First reflected light and second reflected light respectively reflected by the first reflection layer and the second reflection layer may destructively interfere with each other, and thus the reflectance of external light may be reduced.

The optical functional layer <NUM> may include a lens layer. The lens layer may be configured to improve the light emission efficiency of light emitted from the display element layer <NUM> or may be configured to reduce a color deviation. The lens layer may include a layer having a concave or convex lens shape and/or may include a plurality of layers having different refractive indexes. The optical functional layer <NUM> may include both the anti-reflection layer and the lens layer described above or may include any one of them.

The display panel <NUM> may include an opening <NUM> corresponding to the opening area OA of the electronic apparatus <NUM>. In this regard, <FIG> illustrates that the display element layer <NUM>, the input sensing layer <NUM>, and the optical functional layer <NUM> respectively include first to third openings <NUM>, <NUM>, and <NUM> and the first to third openings <NUM>, <NUM>, and <NUM> overlapping each other form the opening <NUM> of the display panel <NUM>.

The first opening <NUM> may penetrate the bottom surface from the top surface of the display element layer <NUM>, the second opening <NUM> may penetrate the bottom surface from the top surface of the input sensing layer <NUM>, and the third opening <NUM> may penetrate the bottom surface from the top surface of the optical functional layer <NUM>.

The opening <NUM> of the display panel <NUM>, for example, the first to third openings <NUM>, <NUM>, and <NUM>, may be located to overlap each other in the opening area OA. The sizes (or diameters) of the first to third openings <NUM>, <NUM> and <NUM> may be equal to or different from each other.

According to some embodiments, at least one of the display element layer <NUM>, the input sensing layer <NUM>, or the optical functional layer <NUM> may not include an opening. For example, any one or two of the display element layer <NUM>, the input sensing layer <NUM>, and the optical functional layer <NUM> may not include an opening.

The cover window <NUM> may be arranged on the optical functional layer <NUM>. The cover window <NUM> may be coupled to the optical functional layer <NUM> through an adhesive layer such as an optical clear adhesive OCA therebetween. The cover window <NUM> may include a glass material.

The opening area OA may be a type of component area (e.g., sensor area, camera area, or speaker area) in which the component <NUM> for adding various functions to the electronic apparatus <NUM> is located.

The component <NUM> may include an electronic element. For example, the component <NUM> may include an electronic element configured to transmit or receive a signal using light or sound. For example, the electronic element may include a sensor such as an infrared sensor using light, a camera for receiving light to acquire an image, a sensor for outputting and sensing light or sound to measure a distance or recognize a fingerprint or the like, a miniature lamp for outputting light, or a speaker for outputting sound. In the case of an electronic element using light, the electronic element may use light of various wavelength bands such as visible light, infrared light, and ultraviolet light. The opening area OA may correspond to a transmission area through which light and/or sound output from the component <NUM> to the outside or propagating from the outside toward the electronic element may be transmitted.

Unlike the display element layer <NUM>, the input sensing layer <NUM>, and the optical function layer <NUM>, as illustrated in <FIG>, the cover window <NUM> and the adhesive layer including the optical clear adhesive OCA thereunder may not include an opening.

According to some embodiments, when the electronic apparatus <NUM> is used as a smart watch or a vehicle instrument panel, the component <NUM> may be a member including a clock hand or a needle indicating certain information (e.g., vehicle speed). In this case, the cover window <NUM> may include an opening located in the opening area OA unlike the illustration of <FIG> such that the component <NUM> such as a needle may be exposed to the outside. Alternatively, even when the electronic apparatus <NUM> includes the component <NUM> such as a speaker, the cover window <NUM> may include an opening corresponding to the opening area OA.

<FIG> is a plan view schematically illustrating a display panel according to some embodiments, and <FIG> illustrates an equivalent circuit connected to any one light emitting diode of a display panel according to some embodiments.

Referring to <FIG>, the display panel <NUM> may include an opening area OA, a display area DA, an intermediate area MA, and a peripheral area PA. The display panel <NUM> may include a plurality of pixels P arranged in the display area DA, and the display panel <NUM> may display an image by using light emitted from the light emitting diode of each pixel P, for example, red, green, and blue light.

As illustrated in <FIG>, the light emitting diode of each pixel P may include an organic light emitting diode OLED, and each organic light emitting diode OLED may be electrically connected to a pixel circuit PC. <FIG> illustrates that the light emitting diode includes the organic light emitting diode OLED; however, according to some embodiments, the display panel <NUM> may include the inorganic light emitting diode instead of the organic light emitting diode OLED as described above.

The pixel circuit PC may include a first thin film transistor T1, a second thin film transistor T2, and a storage capacitor Cst.

As a switching thin film transistor, the second thin film transistor T2 may be connected to a scan line SL and a data line DL and may be configured to transmit a data voltage input from the data line DL to the first thin film transistor T1 according to a switching voltage input from the scan line SL. The storage capacitor Cst may be connected to the second thin film transistor T2 and a driving voltage line PL and may be configured to store a voltage corresponding to the difference between a voltage received from the second thin film transistor T2 and a first power voltage ELVDD supplied to the driving voltage line PL.

As a driving thin film transistor, the first thin film transistor T1 may be connected to the driving voltage line PL and the storage capacitor Cst and may be configured to control a driving current flowing from the driving voltage line PL through the organic light emitting diode OLED in response to a voltage value stored in the storage capacitor Cst. The organic light emitting diode OLED may emit light with a certain brightness according to the driving current. An opposite electrode (e.g., a cathode) of the organic light emitting diode OLED may be supplied with a second power voltage ELVSS.

Although <FIG> illustrates that the pixel circuit PC includes two thin film transistors and one storage capacitor, embodiments according to the present disclosure are not limited thereto. The number of thin film transistors and the number of storage capacitors may be variously modified according to the design of the pixel circuit PC.

Referring back to <FIG>, the intermediate area MA may surround the opening area OA. The intermediate area MA may be an area in which a display element such as an organic light emitting diode emitting light is not arranged, and signal lines for providing signals to pixels P arranged around the opening area OA may pass through the intermediate area MA. For example, as illustrated in <FIG>, data lines DL and/or scan lines SL may intersect the display area DA along the y direction and/or the x direction, while some of the data lines DL and/or the scan lines SL may bypass in the intermediate area MA along the edge of the opening <NUM> of the display panel <NUM>.

A scan driver <NUM> providing a scan signal to each pixel P, a data driver <NUM> providing a data signal to each pixel P, and a first main power line and a second main power line for providing a first power voltage ELVDD (see <FIG>) and a second power voltage ELVSS (see <FIG>) may be arranged in the peripheral area PA. <FIG> illustrates that the data driver <NUM> is arranged adjacent to one side of a substrate <NUM>; however, according to some embodiments, the data driver <NUM> may be arranged on a flexible printed circuit board electrically connected to a pad arranged at one side of the display panel <NUM>. The flexible printed circuit board may have flexibility, and a portion of the flexible printed circuit board may be bent to be located under the rear surface of the substrate <NUM>.

<FIG> is a plan view illustrating a portion of a display panel according to some embodiments.

Referring to <FIG>, pixels P may be arranged in the display area DA, and the intermediate area MA may be arranged between the opening area OA and the display area DA. The pixels P adjacent to the opening area OA may be arranged spaced apart from each other with respect to the opening area OA in the plan view. As illustrated in the plan view of <FIG>, the pixels P may be arranged vertically spaced apart from each other with the opening area OA therebetween. The pixels P may be arranged horizontally spaced apart from each other a with the opening area OA therebetween. As described above with reference to <FIG> and <FIG>, each pixel P may use red, green, or blue light emitted from a light emitting diode, and the positions of pixels P illustrated in <FIG> may respectively correspond to the positions of light emitting diodes. Thus, the fact that the pixels P are arranged spaced apart from each other around the opening area OA in the plan view may represent that the light emitting diodes are arranged spaced apart from each other around the opening area OA in the plan view. For example, in the plan view, the light emitting diodes may be arranged vertically spaced apart from each other with the opening area OA therebetween or may be arranged horizontally spaced apart from each other with the opening area OA therebetween.

Among the signal lines supplying signals to the pixel circuit connected to the light emitting diode of each pixel P, signal lines adjacent to the opening area OA may bypass the opening area OA. Among the data lines passing through the display area DA, some data lines DL may extend in the ±y direction to provide data signals to the pixels P respectively arranged on and under the opening area OA and may bypass along the edge of the opening <NUM> and/or the opening area OA in the intermediate area MA. Among the scan lines passing through the display area DA, some scan lines SL may extend in the ±x direction to provide scan signals to the pixels P respectively arranged on the left and right sides with the opening area OA therebetween and may bypass along the edge of the opening <NUM> and/or the opening area OA in the intermediate area MA.

Although <FIG> illustrates that the scan line SL bypasses the opening area OA in the intermediate area MA, embodiments according to the present disclosure are not limited thereto. According to some embodiments, the scan line SL may be separated or disconnected around the opening area OA, the scan line SL arranged on the left side around the opening area OA may receive a signal from the scan driver <NUM> arranged on the left side around the display area DA as illustrated in <FIG> and, according to some embodiments, the scan line SL arranged on the right side around the opening area OA may receive a signal from an additional scan driver arranged opposite the scan driver <NUM> around the display area DA.

At least one partition arranged closer to the opening area OA than the bypass portion of the signal lines described above may be located in the intermediate area MA. In this regard, <FIG> illustrates a first partition PW1 and a second partition PW2. In the plan view, the first partition PW1 and the second partition PW2 may be arranged spaced apart from each other in a closed-loop shape surrounding the opening area OA.

<FIG> is a cross-sectional view schematically illustrating a display panel according to some embodiments, corresponding to a cross-section thereof taken along the line V-V' of <FIG>, <FIG> is an enlarged cross-sectional view of region VII of <FIG>, <FIG> is a plan view illustrating the relative positions of partitions, protrusions, and valleys of the display panel of <FIG>, and <FIG> are enlarged cross-sectional views of region VIII of <FIG>. In <FIG>, the optical functional layer <NUM> (see <FIG>) and the cover window <NUM> (see <FIG>) of the display panel <NUM> are omitted for convenience of description.

Referring to <FIG>, the display panel <NUM> may include a display element layer <NUM> including light emitting diodes arranged on a substrate <NUM>, and an input sensing layer <NUM> on the display element layer <NUM>. The display panel <NUM> may include an opening <NUM> located in the opening area OA. The opening <NUM> may have the shape of a through hole penetrating the upper and lower surfaces of the display panel <NUM>. A plurality of components included in the display panel <NUM>, for example, the substrate <NUM>, may include an opening <NUM> that is located in the opening area OA and has the shape of a through hole penetrating the upper and lower surfaces of the substrate <NUM>. Like the substrate <NUM>, the components formed on the substrate <NUM>, for example, a plurality of layers included in the display element layer <NUM> and the input sensing layer <NUM>, may respectively include through hole-shaped openings <NUM> and <NUM> located in the opening area OA.

First, as for the display area DA of <FIG>, a pixel circuit PC may be arranged on a substrate <NUM>, and an organic light emitting diode OLED may be arranged on the pixel circuit PC.

The substrate <NUM> may include glass material or polymer resin. For example, the polymer resin may include polyether sulfone, polyacrylate, polyether imide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, and/or cellulose acetate propionate. The substrate <NUM> including the polymer resin may be flexible, rollable, or bendable. The substrate <NUM> may have a multilayer structure including an inorganic insulating layer and a layer including the above polymer resin.

A buffer layer <NUM> may be arranged on the upper surface of the substrate <NUM>. The buffer layer <NUM> may prevent or reduce instances of impurities or contaminants penetrating into a semiconductor layer Act of a thin film transistor TFT. The buffer layer <NUM> may include an inorganic insulating material such as silicon nitride, silicon oxynitride, and silicon oxide and may be a single layer or a multiple layer including the inorganic insulating material.

A pixel circuit PC may be arranged on the buffer layer <NUM>. The pixel circuit PC may include a thin film transistor TFT and a storage capacitor Cst. The thin film transistor TFT may include a semiconductor layer Act, a gate electrode GE, a source electrode SE, and a drain electrode DE. <FIG> illustrates a top gate type in which a gate electrode GE is arranged on a semiconductor layer Act with a gate insulating layer <NUM> therebetween; however, according to some embodiments, the thin film transistor TFT may be a bottom gate type.

The semiconductor layer Act may include polysilicon. Alternatively, the semiconductor layer Act may include amorphous silicon, may include an oxide semiconductor, or may include an organic semiconductor or the like. The gate electrode GE may include a low-resistance metal material. The gate electrode GE may include a conductive material including molybdenum (Mo), aluminium (Al), copper (Cu), titanium (Ti), or the like and may include a single layer or a multiple layer including the above material.

The gate insulating layer <NUM> between the semiconductor layer Act and the gate electrode GE may include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, aluminium oxide, titanium oxide, tantalum oxide, and hafnium oxide. The gate insulating layer <NUM> may include a single layer or a multiple layer including the above material.

The source electrode SE and the drain electrode DE may include a material having high conductivity. The source electrode SE and the drain electrode DE may include a conductive material including molybdenum (Mo), aluminium (Al), copper (Cu), titanium (Ti), or the like and may include a single layer or a multiple layer including the above material. According to some embodiments, the source electrode SE and the drain electrode DE may include a multilayer structure of titanium layer, aluminium layer, and titanium layer (Ti/Al/Ti).

The storage capacitor Cst may include a lower electrode CE1 and an upper electrode CE2 overlapping each other with a first interlayer insulating layer <NUM> therebetween. The storage capacitor Cst may overlap the thin film transistor TFT. In this regard, <FIG> illustrates that the gate electrode GE of the thin film transistor TFT is the lower electrode CE1 of the storage capacitor Cst. According to some embodiments, the storage capacitor Cst may not overlap the thin film transistor TFT, and the gate electrode GE of the thin film transistor TFT and the lower electrode CE1 of the storage capacitor Cst may be separately formed. The storage capacitor Cst may be covered by a second interlayer insulating layer <NUM>.

The lower electrode CE1 and/or the upper electrode CE2 of the storage capacitor Cst may include a conductive material including molybdenum (Mo), aluminium (Al), copper (Cu), titanium (Ti), or the like and may include a single layer or a multiple layer including the above material.

The first interlayer insulating layer <NUM> and the second interlayer insulating layer <NUM> may include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, aluminium oxide, titanium oxide, tantalum oxide, or hafnium oxide. The first interlayer insulating layer <NUM> and the second interlayer insulating layer <NUM> may include a single layer or a multiple layer including the above material.

The pixel circuit PC including the thin film transistor TFT and the storage capacitor Cst may be covered by a first organic insulating layer <NUM>.

A pixel electrode <NUM> may be arranged on the pixel circuit PC, and the pixel electrode <NUM> may be electrically connected to the pixel circuit PC. For example, as illustrated in <FIG>, a contact metal layer CM may be located between the thin film transistor TFT and the pixel electrode <NUM>. The contact metal layer CM may be connected to the thin film transistor TFT through a contact hole formed in the first organic insulating layer <NUM>, and the pixel electrode <NUM> may be arranged on a second organic insulating layer <NUM> and connected to the contact metal layer CM through a contact hole formed in the second organic insulating layer <NUM>. The contact metal layer CM may include a conductive material including molybdenum (Mo), aluminium (Al), copper (Cu), titanium (Ti), or the like and may include a single layer or a multiple layer including the above material. According to some embodiments, the contact metal layer CM may include a multiple layer of Ti/Al/Ti.

The first organic insulating layer <NUM> and the second organic insulating layer <NUM> may include an organic insulating material such as a general-purpose polymer such as polymethylmethacrylate (PMMA) or polystyrene (PS), a polymer derivative having a phenolic group, an acrylic polymer, an imide-based polymer, an arylether-based polymer, an amide-based polymer, a fluorine-based polymer, a p-xylene-based polymer, a vinyl alcohol-based polymer, or any blend thereof. According to some embodiments, the first organic insulating layer <NUM> and the second organic insulating layer <NUM> may include polyimide.

The pixel electrode <NUM> may be formed on the second organic insulating layer <NUM>. The pixel electrode <NUM> may include a conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In<NUM>O<NUM>), indium gallium oxide (IGO), or aluminium zinc oxide (AZO). According to some embodiments, the pixel electrode <NUM> may include a reflective layer including silver (Ag), magnesium (Mg), aluminium (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or any compound thereof. According to some embodiments, the pixel electrode <NUM> may further include a layer formed of ITO, IZO, ZnO, or In<NUM>O<NUM> over/under the reflective layer. According to some embodiments, the pixel electrode <NUM> may include a three-layer structure of ITO/Ag/ITO.

An upper insulating layer <NUM> may be formed on the pixel electrode <NUM>. The upper insulating layer <NUM> may include an opening 215OP exposing the upper surface of the pixel electrode <NUM> and may cover the edge of the pixel electrode <NUM>. The upper insulating layer <NUM> may be a pixel definition layer defining a pixel. For example, the width of the opening 215OP exposing the upper surface of the pixel electrode <NUM> may correspond to the width of an emission area from which light is emitted, that is, the width of a pixel.

The upper insulating layer <NUM> may include an organic insulating material. For example, the upper insulating layer <NUM> may include an organic insulating material such as a general-purpose polymer such as polymethylmethacrylate (PMMA) or polystyrene (PS), a polymer derivative having a phenolic group, an acrylic polymer, an imide-based polymer, an arylether-based polymer, an amide-based polymer, a fluorine-based polymer, a p-xylene-based polymer, a vinyl alcohol-based polymer, or any blend thereof.

A spacer <NUM> may be formed on the upper insulating layer <NUM>. The spacer <NUM> may include an organic insulating material. The spacer <NUM> may include the same material as the upper insulating layer <NUM> and may be formed together in the same mask process as the upper insulating layer <NUM>.

An intermediate layer <NUM> may include an emission layer 222b. The emission layer 222b may include a high-molecular or low-molecular weight organic material for emitting light of a certain color. The intermediate layer <NUM> may include at least one functional layer. The at least one functional layer may include an organic material. As illustrated in <FIG>, the intermediate layer <NUM> may include a first functional layer 222a arranged under the emission layer 222b and/or a second functional layer 222c arranged on the emission layer 222b.

The first functional layer 222a may include a single layer or a multiple layer. For example, when the first functional layer 222a is formed of a high-molecular weight material, the first functional layer 222a may include a hole transport layer (HTL) having a single-layer structure. When the first functional layer 222a is formed of a low-molecular weight material, the first functional layer 222a may include a hole injection layer (HIL) and a hole transport layer (HTL).

The second functional layer 222c may include a single layer or a multiple layer. The second functional layer 222c may include an electron transport layer (ETL) and/or an electron injection layer (EIL).

The emission layer 222b of the intermediate layer <NUM> may be arranged for each pixel electrode <NUM> in the display area DA, while the first functional layer 222a and/or the second functional layer 222c may be formed to entirely cover the display area DA. Each of the first functional layer 222a and the second functional layer 222c may be a common layer and may cover a plurality of pixel electrodes <NUM>.

An opposite electrode <NUM> may include a conductive material having a low work function. For example, the opposite electrode <NUM> may include a semi-transparent layer including Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, lithium (Li), calcium (Ca), or an alloy thereof. Alternatively, the opposite electrode <NUM> may further include a layer such as ITO, IZO, ZnO, or In<NUM>O<NUM> on the semi-transparent layer including the above-mentioned material. According to some embodiments, the opposite electrode <NUM> may include silver (Ag) and magnesium (Mg). The opposite electrode <NUM> may be formed to entirely cover the display area DA. The opposite electrode <NUM> may be a common layer and may cover a plurality of pixel electrodes <NUM>.

An organic light emitting diode OLED including the pixel electrode <NUM>, the intermediate layer <NUM>, and the opposite electrode <NUM> may be covered by a thin film encapsulation layer <NUM>. The thin film encapsulation layer <NUM> may include at least one organic encapsulation layer and at least one inorganic encapsulation layer, and according to some embodiments, as illustrated in <FIG>, the thin film encapsulation layer <NUM> may include first and second inorganic encapsulation layers <NUM> and <NUM> and an organic encapsulation layer <NUM> therebetween. According to some embodiments, the number of organic encapsulation layers, the number of inorganic encapsulation layers, and the stacking order thereof may be changed.

The first inorganic encapsulation layer <NUM> and the second inorganic encapsulation layer <NUM> may include one or more inorganic materials among aluminium oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and silicon oxynitride. The first inorganic encapsulation layer <NUM> and the second inorganic encapsulation layer <NUM> may include a single layer or a multiple layer including the above material. The organic encapsulation layer <NUM> may include a polymer-based material. The polymer-based material may include polymethyl methacrylate, acrylic resin such as polyacrylic acid, epoxy resin, polyimide, polyethylene, or the like. According to some embodiments, the organic encapsulation layer <NUM> may include an acrylate polymer.

The first inorganic encapsulation layer <NUM> and the second inorganic encapsulation layer <NUM> may have different materials. For example, the first inorganic encapsulation layer <NUM> may include silicon oxynitride, and the second inorganic encapsulation layer <NUM> may include silicon nitride. The first inorganic encapsulation layer <NUM> and the second inorganic encapsulation layer <NUM> may have different thicknesses. The thickness of the first inorganic encapsulation layer <NUM> may be greater than the thickness of the second inorganic encapsulation layer <NUM>. Alternatively, the thickness of the second inorganic encapsulation layer <NUM> may be greater than the thickness of the first inorganic encapsulation layer <NUM>, or the first inorganic encapsulation layer <NUM> and the second inorganic encapsulation layer <NUM> may have the same thickness.

An input sensing layer <NUM> may be arranged on the thin film encapsulation layer <NUM>. The input sensing layer <NUM> may include first insulating layers 41a and 41b, a first conductive layer CML1, a second insulating layer <NUM>, a second conductive layer CML2, and a third insulating layer <NUM>.

The first insulating layers 41a and 41b may include a first sub insulating layer 41a and a second sub insulating layer 41b. The first sub insulating layer 41a and the second sub insulating layer 41b may include an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.

The first conductive layer CML1 and the second conductive layer CML2 may each include a conductive material, for example, metal. For example, the first conductive layer CML1 and the second conductive layer CML2 may include molybdenum (Mo), aluminium (Al), copper (Cu), titanium (Ti), or the like and may be formed as a single layer or a multiple layer including the above material. According to some embodiments, each of the first conductive layer CML1 and the second conductive layer CML2 may have a structure in which a titanium layer, an aluminium layer, and a titanium layer are sequentially stacked (Ti/Al/Ti).

The first conductive layer CML1 and/or the second conductive layer CML2 may include a plurality of touch electrodes for sensing a touch input. According to some embodiments, the input sensing layer <NUM> may include touch electrodes extending in the x direction and touch electrodes extending in the y direction in the plan view, and the touch electrodes may be configured to sense an input by a mutual capacitance method and may be provided in the first conductive layer CML1 and/or the second conductive layer CML2. According to some embodiments, the touch electrode may be configured to sense an input by a self capacitance method and may be provided in the first conductive layer CML1 or the second conductive layer CML2.

A second insulating layer <NUM> may be arranged between the first conductive layer CML1 and the second conductive layer CML2. The second insulating layer <NUM> may include an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.

A third insulating layer <NUM> may be a type of planarization insulating layer and may include an organic insulating material. For example, the third insulating layer <NUM> may include a polymer-based material. The polymer-based material may be transparent. For example, the third insulating layer <NUM> may include silicon-based resin, acryl-based resin, epoxy-based resin, polyimide, and/or polyethylene.

<FIG> illustrates that the input sensing layer <NUM> includes the first conductive layer CML1 and the second conductive layer CML2; however, according to some embodiments, the input sensing layer <NUM> may include any one of the first conductive layer CML1 and the second conductive layer CML2.

Next, as for the intermediate area MA of <FIG>, the first organic insulating layer <NUM> and the second organic insulating layer <NUM> may extend to the intermediate area MA and may be spaced apart from the first partition PW1 described below. Like the first organic insulating layer <NUM> and the second organic insulating layer <NUM>, the inorganic insulating layer(s) on the display area DA, for example, the gate insulating layer <NUM>, the first interlayer insulating layer <NUM>, and the second interlayer insulating layer <NUM>, may also extend to the intermediate area MA. The gate insulating layer <NUM>, the first interlayer insulating layer <NUM>, and the second interlayer insulating layer <NUM> may be spaced apart from the first partition PW1.

As illustrated in <FIG> and <FIG>, edges 203e, 205e, and 207e of the gate insulating layer <NUM>, the first interlayer insulating layer <NUM>, and the second interlayer insulating layer <NUM> may be covered by the first organic insulating layer <NUM>, and an edge 209e of the first organic insulating layer <NUM> may be covered by the second organic insulating layer <NUM>.

A portion (hereinafter referred to as a bypass portion) of the data line DL located in the intermediate area MA, which has been described above with reference to <FIG>, may be located on the second interlayer insulating layer <NUM> or the first organic insulating layer <NUM>. For example, as illustrated in <FIG> and <FIG>, bypass portions DL-C of the data line may be alternately arranged on the second interlayer insulating layer <NUM> or the first organic insulating layer <NUM>. One of the bypass portions DL-C of two adjacent data lines may be arranged on the first organic insulating layer <NUM> and the other one may be arranged on the second interlayer insulating layer <NUM>. According to some embodiments, the bypass portions DL-C of the data lines may be arranged on the same layer. For example, the bypass portions DL-C of all data lines may be arranged on the first organic insulating layer <NUM> or on the second interlayer insulating layer <NUM>.

A structure including a protrusion PS and a relatively concave valley VY may be arranged on the first and second organic insulating layers <NUM> and <NUM>. The structure including the protrusion PS and the valley VY may overlap the bypass portions DL-C of the data lines. For example, at least one of the bypass portions DL-C of the data lines may overlap the protrusion PS or the valley VY.

The protrusion PS and the valley VY may be alternately arranged as illustrated in <FIG>. For example, a valley VY may be arranged between adjacent protrusions PS, and a protrusion PS may be arranged between adjacent valleys VY. The structure including the protrusion PS and the valley VY may be formed on at least one insulating layer ISL on the second organic insulating layer <NUM>, for example, a layer <NUM> including the upper insulating layer <NUM> and the spacer <NUM>.

A portion of the organic encapsulation layer <NUM> may be in a concave space corresponding to the valley VY, and the volume of the organic encapsulation layer <NUM> may be sufficiently secured through the structure of the valley VY. As a comparative example of the disclosure, when there is no valley (VY) structure, it may be difficult to sufficiently secure the thickness of the organic encapsulation layer <NUM> covering the area where the bypass portions DL-C of the data lines are arranged, due to the flowability of the monomer injected by an inkjet method. However, in the present embodiments, by forming a structure including the valley VY described above, the volume of the monomer accommodated in the valley VY may be improved and thus the thickness of the organic encapsulation layer <NUM> may be sufficiently secured.

The valley VY and the protrusion PS may have a closed-loop shape surrounding the opening <NUM> of the display panel <NUM> in the plan view as illustrated in <FIG>. As illustrated in <FIG>, because the opening <NUM> is also formed in the substrate <NUM> corresponding to the opening <NUM> of the display panel <NUM>, "the opening area OA," "the opening <NUM> of the display panel <NUM>," and "the opening <NUM> of the substrate <NUM>" may be interchangeably used in the specification. For example, "surrounding the opening <NUM> of the display panel <NUM>" may represent surrounding the opening <NUM> of the substrate <NUM>.

One or more partitions may be arranged in the intermediate area MA and may be arranged closer to the opening <NUM> of the display panel <NUM> than the valley VY and the protrusion PS described above. In this regard, <FIG> and <FIG> illustrate that the first partition PW1 and the second partition PW2 are arranged closer to the opening <NUM> than the valley VY and the protrusion PS.

The first partition PW1 and the second partition PW2 may be arranged to be spaced apart from each other. The first partition PW1 may be relatively adjacent to the display area DA, and the second partition PW2 may be relatively adjacent to the opening area OA. Each of the first partition PW1 and the second partition PW2 may have a closed-loop shape surrounding the opening area OA as illustrated in <FIG>.

The first partition PW1 and the second partition PW2 may include an insulating material. For example, the first partition PW1 and the second partition PW2 may include an organic insulating material, may be formed together in the process of forming a plurality of insulating material layers arranged in the display area DA, and may include the same material as the plurality of insulating material layers.

The first partition PW1 may include a plurality of first sub partition layers <NUM>, <NUM>, and <NUM>. The plurality of first sub partition layers <NUM>, <NUM>, and <NUM> may include a (<NUM>-<NUM>)th sub partition layer <NUM>, a (<NUM>-<NUM>)th sub partition layer <NUM>, and a (<NUM>-<NUM>)th sub partition layer <NUM> that are sequentially stacked. The (<NUM>-<NUM>)th sub partition layer <NUM> may include the same material as the second organic insulating layer <NUM>, and the (<NUM>-<NUM>)th sub partition layer <NUM> may include the same material as the upper insulating layer <NUM>, and the (<NUM>-<NUM>)th sub partition layer <NUM> may include the same material as the spacer <NUM>.

The second partition PW2 may include a plurality of second sub partition layers <NUM>, <NUM>, <NUM>, and <NUM>. The plurality of second sub partition layers <NUM>, <NUM>, <NUM>, and <NUM> may include a (<NUM>-<NUM>)th sub partition layer <NUM>, a (<NUM>-<NUM>)th sub partition layer <NUM>, a (<NUM>-<NUM>)th sub partition layer <NUM>, and a (<NUM>-<NUM>)th sub partition layer <NUM> that are sequentially stacked.

The (<NUM>-<NUM>)th sub partition layer <NUM> may include the same material as the gate insulating layer <NUM> and the first and second interlayer insulating layers <NUM> and <NUM> or may include the same material as the first organic insulating layer <NUM>. The (<NUM>-<NUM>)th sub partition layer <NUM> may include the same material as the second organic insulating layer <NUM>, and the (<NUM>-<NUM>)th sub partition layer <NUM> may include the same material as the upper insulating layer <NUM>, and the (<NUM>-<NUM>)th sub partition layer <NUM> may include the same material as the spacer <NUM>.

The first partition PW1 and the second partition PW2 may be located on an inorganic insulating material, for example, the buffer layer <NUM>. The first partition PW1 and the second partition PW2 may have a shape in which the lower width is greater than the upper width thereof.

The first partition PW1 and the second partition PW2 may have different heights. For example, as illustrated in <FIG>, a height H2 of the second partition PW2 may be greater than a height H1 of the first partition PW1. In other words, the vertical distance from the upper surface of the substrate <NUM> to the upper surface of the second partition PW2 may be greater than the vertical distance from the upper surface of the substrate <NUM> to the upper surface of the first partition PW1.

<FIG> illustrates that the first partition PW1 and the second partition PW2 have different heights; however, according to some embodiments, the first second partition PW1 and the second partition PW2 may have substantially the same height. In other words, the vertical distance from the upper surface of the substrate <NUM> to the upper surface of the first partition PW1 and the vertical distance from the upper surface of the substrate <NUM> to the upper surface of the second partition PW2 may be substantially equal.

At least one partition described above, for example, the first partitions PW1 and the second partitions PW2, may control the flow of the material of the organic encapsulation layer <NUM> in the process of forming the thin film encapsulation layer <NUM>. For example, the organic encapsulation layer <NUM> may be formed by applying a monomer through an inkjet process or the like and then curing the monomer. In this case, the partition may sufficiently secure the thickness of the organic encapsulation layer <NUM> by controlling the flow of the monomer. According to some embodiments, as illustrated in <FIG>, an edge 320e of the organic encapsulation layer <NUM> may be located on one side of the first partition PW1.

The first partition PW1 and the second partition PW2 may be formed before the formation of the first inorganic encapsulation layer <NUM>, and thus, the first partition PW1 and the second partition PW2 may be covered by the first inorganic encapsulation layer <NUM>. Because the edge 320e of the organic encapsulation layer <NUM> is located on one side of any one partition, for example, the first partition PW1, the second inorganic encapsulation layer <NUM> may directly contact the first inorganic encapsulation layer <NUM> in the intermediate area MA.

For example, the first inorganic encapsulation layer <NUM> and the second inorganic encapsulation layer <NUM> may directly contact each other in an area between the first partition PW1 and the opening <NUM> of the display panel <NUM>. For example, the first inorganic encapsulation layer <NUM> and the second inorganic encapsulation layer <NUM> may directly contact each other on the first partition PW1, may directly contact each other on the second partition PW2, may directly contact each other between the first partition PW1 and the second partition PW2, and may directly contact each other between the second partition PW2 and the opening area OA (or the opening <NUM>).

The insulating layers of the input sensing layer <NUM>, for example, the first insulating layers 41a and 41b, the second insulating layer <NUM>, and the third insulating layer <NUM>, may also extend to cover the intermediate area MA. The first sub insulating layer 41a and the second sub insulating layer 41b among the first insulating layers 41a and 41b may directly contact each other in the display area DA; however, in the intermediate area MA, the first sub insulating layer 41a and the second sub insulating layer 41b may be spaced apart from each other in the thickness direction (z direction) by a planarization insulating layer <NUM> located between the first sub insulating layer 41a and the second sub insulating layer 41b.

The planarization insulating layer <NUM> may be arranged to cover the intermediate area MA. The planarization insulating layer <NUM> may be located only in the intermediate area MA. The planarization insulating layer <NUM> may have a width ranging from a first edge 47E1 to a second edge 47E2, and the planarization insulating layer <NUM> may have a closed-loop shape entirely surrounding the opening <NUM> of the display panel <NUM> as illustrated in <FIG>. The first edge 47E1 of the planarization insulating layer <NUM> may face the opening <NUM> of the display panel <NUM>, and the second edge 47E2 of the planarization insulating layer <NUM> may be adjacent to the display area DA. A portion of the planarization insulating layer <NUM> adjacent to the display area DA may overlap a portion of the organic encapsulation layer <NUM> while covering the edge 320e of the organic encapsulation layer <NUM>. The second inorganic encapsulation layer <NUM> and the first sub insulating layer 41a may be located between the above portion of the planarization insulating layer <NUM> and the organic encapsulation layer <NUM> overlapping therewith.

The planarization insulating layer <NUM> may include an organic insulating material. For example, the planarization insulating layer <NUM> may include a polymer-based material. The polymer-based material may be transparent. For example, the planarization insulating layer <NUM> may include silicon-based resin, acryl-based resin, epoxy-based resin, polyimide, and/or polyethylene. According to some embodiments, the planarization insulating layer <NUM> may include the same material as the third insulating layer <NUM> of the input sensing layer <NUM>.

At least one organic material layer included in the intermediate layer <NUM>, for example, the first functional layer 222a and/or the second functional layer 222c, may be formed to entirely cover the display area DA and may extend to the intermediate area MA. Likewise, the opposite electrode <NUM> formed to entirely cover the display area DA may extend to the intermediate area MA.

The first functional layer 222a, the second functional layer 222c, and the opposite electrode <NUM> may extend to the intermediate area MA and may be spaced apart from the opening area OA by a certain distance. For example, the first functional layer 222a, the second functional layer 222c, and the opposite electrode <NUM> may extend beyond an edge 211e of the second organic insulating layer <NUM>, and each of an edge 222ae of the first functional layer 222a, an edge 222ce of the second functional layer 222c, and an edge 223e of the opposite electrode <NUM> may be located between the display area DA and the first partition PW1. For example, the edge 222ae of the first functional layer 222a, the edge 222ce of the second functional layer 222c, and the edge 223e of the opposite electrode <NUM> may be located between the edge 211e of the second organic insulating layer <NUM> and the first partition PW1. The edge 222ae of the first functional layer 222a, the edge 222ce of the second functional layer 222c, and the edge 223e of the opposite electrode <NUM> may be covered by an organic insulating material layer, for example, the organic encapsulation layer <NUM>.

As a comparative example of the disclosure, when the first functional layer 222a, the second functional layer 222c, and the opposite electrode <NUM> entirely cover the intermediate area MA, the respective edges 222ae, 222ce, and 223e of the first functional layer 222a, the second functional layer 222c, and the opposite electrode <NUM> may be exposed toward the opening <NUM> of the display panel <NUM>. In the case of having the same structure as in the comparative example, moisture may flow into the display area DA through the first functional layer 222a, the second functional layer 222c, and the opposite electrode <NUM> themselves exposed toward the opening <NUM> of the display panel <NUM> or the interface therebetween and thus the organic light emitting diode OLED may be damaged.

However, according to embodiments, by removing a portion adjacent to the opening area OA among a stack of the first functional layer 222a, the second functional layer 222c, and the opposite electrode <NUM> deposited in the intermediate area MA, the edges 222ae, 222ce, and 223e of the first functional layer 222a, the second functional layer 222c, and the opposite electrode <NUM> may be spaced apart from the opening area OA, that is, the opening <NUM> of the display panel <NUM>, thereby preventing or reducing the inflow of the moisture or other contaminants described above. The stack of the first functional layer 222a, the second functional layer 222c, and the opposite electrode <NUM> adjacent to the opening area OA may be removed by a laser lift-off process. By the laser lift-off process, the layer corresponding to the first functional layer 222a and the second functional layer 222c may not be in the area between the edges 222ae and 222ce of the first functional layer 222a and the second functional layer 222c and the opening <NUM>, and likewise, the layer corresponding to the opposite electrode <NUM> may not be in the area between the edge 223e of the opposite electrode <NUM> and the opening <NUM>.

The edges 222ae, 222ce, and 223e of the first functional layer 222a, the second functional layer 222c, and the opposite electrode <NUM> may have different positions. For example, the edge 223e of the opposite electrode <NUM> may be closer to the opening area OA than the edges 222ae and 222ce of the first functional layer 222a and the second functional layer 222c. Alternatively, the edges 222ae and/or 222ce of the first functional layer 222a and/or the second functional layer 222c may be closer to the opening area OA than the edge 223e of the opposite electrode <NUM>. The edge 223e of the opposite electrode <NUM> has an irregular shape.

Referring to <FIG> and <FIG>, a portion 223ep of the opposite electrode <NUM> facing the opening <NUM> of the display panel <NUM> and/or the opening <NUM> of the substrate <NUM> may protrude further than the edges 222ae and 222ce of the first functional layer 222a and the second functional layer 222c. For example, the portion 223ep of the opposite electrode <NUM> facing the opening <NUM> of the display panel <NUM> and/or the opening <NUM> of the substrate <NUM> may be closer to the opening <NUM> of the display panel <NUM> and/or the opening <NUM> of the substrate <NUM> than the edges 222ae and 222ce of the first functional layer 222a and the second functional layer 222c.

The edge 223e facing the opening <NUM> of the display panel <NUM> corresponds to an end of the portion 223ep of the opposite electrode <NUM> described above. The portion 223ep of the opposite electrode <NUM> includes a burr formed by a laser lift-off process and may have various shapes as illustrated in <FIG>.

According to some embodiments, as illustrated in <FIG>, the portion 223ep of the opposite electrode <NUM> may extend in an oblique direction away from the upper surface of the substrate <NUM>, and the cross-sectional shape thereof may have a locally irregular bump. According to some embodiments, as illustrated in <FIG>, the portion 223ep of the opposite electrode <NUM> may extend beyond the edges 222ae and 222ce of the first functional layer 222a and the second functional layer 222c, and the cross-section thereof may have an irregular bump. Alternatively, the portion 223ep of the opposite electrode <NUM> may have various shapes such as having a shape bent toward the top surface of the substrate <NUM> as illustrated in <FIG>.

As illustrated in <FIG>, the thickness of the first inorganic encapsulation layer <NUM> formed on the opposite electrode <NUM> may not be uniform due to the irregular shape of the portion 223ep of the opposite electrode <NUM>. In this case, there may be a problem in that a crack may occur in the first inorganic encapsulation layer <NUM> and the crack may be transmitted to the display area DA; however, according to embodiments, because the edge 223e of the opposite electrode <NUM> (in the claimed invention, including a burr) are covered by the organic encapsulation layer <NUM>, the above problem may be prevented or reduced. According to some embodiments, as described in <FIG>, <FIG>, and <FIG>, the edge 222ae of the first functional layer 222a, the edge 222ce of the second functional layer 222c, and the edge 223e of the opposite electrode <NUM> may be covered by the organic encapsulation layer <NUM>.

<FIG> are cross-sectional views illustrating a display panel manufacturing process according to some embodiments.

First, referring to <FIG>, a pixel circuit PC, a pixel electrode <NUM> on the pixel circuit PC, and at least one partition may be formed on a substrate <NUM>. Before the forming of the pixel circuit PC, a buffer layer <NUM> may be formed to entirely cover the upper surface of the substrate <NUM>. Thereafter, a semiconductor layer of a thin film transistor, a gate insulating layer <NUM>, a gate electrode of the thin film transistor and a lower electrode of a storage capacitor, a first interlayer insulating layer <NUM>, an upper electrode of the storage capacitor, and a second interlayer insulating layer <NUM>, a source electrode and a drain electrode, a first organic insulating layer <NUM>, a contact metal layer, and a second organic insulating layer <NUM> may be sequentially formed.

While the buffer layer <NUM> may entirely cover the substrate <NUM>, portions corresponding to one area of the intermediate area MA among the insulating layers on the buffer layer <NUM> may be removed. For example, a portion of each of the gate insulating layer <NUM>, the first interlayer insulating layer <NUM>, the second interlayer insulating layer <NUM>, the first organic insulating layer <NUM>, and/or the second organic insulating layer <NUM> located in the opening area OA and some area of the intermediate area MA adjacent to the opening area OA may be removed. Thus, as illustrated in <FIG>, the edges 203e, 205e, and 207e of the gate insulating layer <NUM>, the first interlayer insulating layer <NUM>, and/or the second interlayer insulating layer <NUM> facing the opening area OA and/or adjacent to the opening area OA may be spaced apart from the first partition PW1 and may be covered by the first organic insulating layer <NUM>. Similarly, the edges 209e and 211e of the first organic insulating layer <NUM> and the second organic insulating layer <NUM> facing the opening area OA and/or adjacent to the opening area OA may also be spaced apart from the first partition PW1, and the edge 209e of the first organic insulating layer <NUM> may be covered by the second organic insulating layer <NUM>.

A pixel electrode <NUM> may be formed on the second organic insulating layer <NUM>, and an upper insulating layer <NUM> and a spacer <NUM> may be formed on the pixel electrode <NUM>. During the process of forming the upper insulating layer <NUM> and the spacer <NUM>, portions of the layer including the upper insulating layer <NUM> and the spacer <NUM> may be removed and thus a structure including a valley VY and a protrusion PS may be formed in the intermediate area MA.

At least one partition located in the intermediate area MA may be formed together when insulating material layers including an organic insulating material are formed in the display area DA. At least one partition, for example, the first and second partitions PW1 and PW2 may have a cross-sectional shape in which the lower width is greater than the upper width thereof. Each of the first and second partitions PW1 and PW2 may include a plurality of sublayers, and each sublayer may be formed together in the process of forming the first organic insulating layer <NUM>, the second organic insulating layer <NUM>, the upper insulating layer <NUM>, and/or the spacer <NUM>. Particular materials of the sublayers of the first and second partitions PW1 and PW2 may be the same as those described above with reference to <FIG>.

A sacrificial layer <NUM> may be arranged in the intermediate area MA. According to some embodiments, the sacrificial layer <NUM> may be arranged between the display area DA and the first partition PW1. In this regard, <FIG> illustrates that the sacrificial layer <NUM> is arranged between the edge 211e of the second organic insulating layer <NUM> and the first partition PW1. <FIG> illustrates one sacrificial layer <NUM>; however, according to some embodiments, a plurality of sacrificial layers <NUM> may be arranged in the intermediate area MA to be spaced apart from each other.

The sacrificial layer <NUM> may be formed in the intermediate area MA in the same process as the pixel electrode <NUM>. The sacrificial layer <NUM> may include the same material as the pixel electrode <NUM>. For example, the sacrificial layer <NUM> may include a metal and a transparent conductive oxide such as ITO/Ag/ITO.

Thereafter, as illustrated in <FIG>, a first functional layer 222a, an emission layer 222b, a second functional layer 222c, and an opposite electrode <NUM> may be formed on the pixel electrode <NUM>. The emission layer 222b may be formed to correspond to the pixel electrodes <NUM> arranged to be spaced apart from each other in the display area DA, while the first functional layer 222a, the second functional layer 222c, and the opposite electrode <NUM> may be entirely formed on the upper surface of the substrate <NUM> as illustrated in <FIG>.

When the first functional layer 222a, the second functional layer 222c, and the opposite electrode <NUM>, which are common layers, entirely cover the upper surface of the substrate <NUM>, because moisture may flow into the light emitting diode as described above, portions of the first functional layer 222a, the second functional layer 222c, and the opposite electrode <NUM> located in the opening area OA and some area of the intermediate area MA adjacent to the opening area OA may be removed by using a laser lift-off process.

In this case, the sacrificial layer <NUM> including a material having thermal conductivity like a metal may be heated to a certain temperature by absorbing a laser, and the first functional layer 222a, the second functional layer 222c, and/or the opposite electrode <NUM> on the sacrificial layer <NUM> may be more effectively removed than the first functional layer 222a, the second functional layer 222c, and/or the opposite electrode <NUM> on another area where the sacrificial layer <NUM> is not formed. Portions of the first functional layer 222a, the second functional layer 222c, and the opposite electrode <NUM> on another area where the sacrificial layer <NUM> is not formed (e.g., a portion of the intermediate area and the opening area) may be removed by adjusting the irradiation time and output of the laser in a laser lift-off process. <FIG> illustrates one sacrificial layer <NUM> on the substrate <NUM>, however, embodiments according to the present disclosure are not limited thereto. According to some embodiments, a plurality of sacrificial layers <NUM> are formed between the display area DA and the opening area OA on the substrate <NUM>. Alternatively, a width of the sacrificial layer <NUM> is greater than that of the sacrificial layer <NUM> illustrated in <FIG>. Also, the sacrificial layer <NUM> may also be removed. <FIG> illustrates that portions of the sacrificial layer <NUM>, the first functional layer 222a, the second functional layer 222c, and the opposite electrode <NUM> are removed by the above laser lift-off process. The edges 222ae, 222ce, and 223e of the first functional layer 222a, the second functional layer 222c, and the opposite electrode <NUM> may be located spaced apart from the opening area OA. The edges 222ae, 222ce, and 223e of the first functional layer 222a, the second functional layer 222c, and the opposite electrode <NUM> may be located between the edge 211e of the second organic insulating layer <NUM> and the first partition PW1.

As a comparative example of the disclosure, when the sacrificial layer <NUM> is arranged only on the right side of a third partition PW3 (see <FIG>), the edge 222ae of the first functional layer 222a, the edge 222ce of the second functional layer 222c, and the edge 223e of the opposite electrode <NUM> may be arranged between the third partition PW3 and the opening area OA. In this case, particles generated in the laser lift-off process may remain on a portion of the opposite electrode <NUM> between the display area DA and the third partition PW3, and the particles may be a type of foreign substances and thus may degrade the quality of the first inorganic encapsulation layer <NUM> formed on the opposite electrode <NUM>. However, as illustrated in <FIG>, the above problem may be minimized by performing a process by arranging the sacrificial layer <NUM> between the display area DA and the first partition PW1 and covering the edge 223e of the opposite electrode <NUM> with the organic encapsulation layer <NUM>. According to some embodiments, <FIG> illustrates that the edge 222ae of the first functional layer 222a, the edge 222ce of the second functional layer 222c, and the edge 223e of the opposite electrode <NUM> are covered by the organic encapsulation layer <NUM>. Because the materials of the first and second functional layers 222a and 222c and the opposite electrode <NUM> are different from each other, even when the same laser is irradiated, the edges 222ae and 222ce of the first and second functional layers 222a and 222c and the edge 223e of the opposite electrode <NUM> may be located at different positions. For example, the edge 223e of the opposite electrode <NUM> may more extend toward the first partition PW1 than the edges 222ae and 222ce of the first and second functional layers 222a and 222c.

According to the laser lift-off process, an edge portion of the opposite electrode <NUM>, that is, a portion 223ep of the opposite electrode <NUM> facing the opening area OA, includes a burr, and a particular shape thereof may be the same as that described above with reference to <FIG>.

Referring to <FIG>, a thin film encapsulation layer <NUM> and an input sensing layer <NUM> may be formed on the substrate <NUM> where the structure described with reference to <FIG> is formed.

A first inorganic encapsulation layer <NUM> of the thin film encapsulation layer <NUM> may be formed to entirely cover the substrate <NUM>. The first inorganic encapsulation layer <NUM> may be formed by chemical vapor deposition or the like. In the structure described above with reference to <FIG>, because the sacrificial layer <NUM> between adjacent partitions is removed, the first inorganic encapsulation layer <NUM> may directly contact the inorganic insulating layer thereunder, for example, the buffer layer <NUM>.

The first inorganic encapsulation layer <NUM> may cover a portion 223ep of the opposite electrode <NUM> because it has relatively excellent step coverage. However, because the shape thereof is irregular, even when the first inorganic encapsulation layer <NUM> covers a portion 223ep of the opposite electrode <NUM>, there may be a portion formed with a small thickness as illustrated in <FIG> and a crack may occur relatively easily in the corresponding portion; however, because a portion 223ep of the opposite electrode <NUM> is covered by the organic encapsulation layer <NUM>, the above problem may be minimized or prevented or reduced as described above.

The organic encapsulation layer <NUM> may be formed by applying a monomer through an inkjet method and then curing the monomer, and the organic encapsulation layer <NUM> may include a resin formed as the monomer is cured. A particular material of the organic encapsulation layer <NUM> may be the same as that described above.

The second inorganic encapsulation layer <NUM> may be formed on the organic encapsulation layer <NUM> and may be formed by chemical vapor deposition or the like, like the first inorganic encapsulation layer <NUM>. The second inorganic encapsulation layer <NUM> may directly contact the first inorganic encapsulation layer <NUM> on the intermediate area MA and the opening area OA and may form a contact area between the inorganic materials to further reduce the possibility of moisture penetration.

Thereafter, a first sub insulating layer 41a may be formed and a planarization insulating layer <NUM> may be formed on the first sub insulating layer 41a. The planarization insulating layer <NUM> may be formed in the intermediate area MA and the opening area OA. While the organic encapsulation layer <NUM> may be arranged to cover the display area DA, the planarization insulating layer <NUM> may not cover the display area DA. During the manufacturing process illustrated in <FIG>, the planarization insulating layer <NUM> may be only in the intermediate area MA and the opening area OA.

Next, a second sub insulating layer 41b may be formed, and a first conductive layer CML1, a second insulating layer <NUM>, a second conductive layer CML2, and a third insulating layer <NUM> may be sequentially formed.

Thereafter, when the opening area OA is cut along a cutting line SCL by using a method such as laser cutting, an opening <NUM> penetrating the display panel <NUM> may be formed in opening area OA as illustrated in <FIG>.

<FIG> is a cross-sectional view schematically illustrating a display panel according to some embodiments, which may correspond to a cross-section taken along the line V-V' of <FIG>.

According to the embodiments described above with reference to <FIG>, the edge 211e of the second organic insulating layer <NUM> is spaced apart from the first partition PW1; however, according to some embodiments, the second organic insulating layer <NUM> may extend under the first partition PW1 and may form a portion of the first partition PW1. Other features other than the above structure may be the same as those described above with reference to <FIG>, and thus, the difference therebetween will be mainly described below.

Referring to <FIG>, the second organic insulating layer <NUM> may extend toward the opening area OA while covering the edge 209e of the first organic insulating layer <NUM>. The second organic insulating layer <NUM> may extend toward the second partition PW2 to pass through a portion of the first partition PW1. In this case, the edge 211e of the second organic insulating layer <NUM> and the second partition PW2 may be spaced apart from each other. The edge 211e of the second organic insulating layer <NUM> may be closer to the second partition PW2 than the edge 320e of the organic encapsulation layer <NUM>.

A portion 211ep of the second organic insulating layer <NUM> may form a portion of the first partition PW1. A portion 211ep of the second organic insulating layer <NUM> may be a portion adjacent to the edge 211e of the second organic insulating layer <NUM> and may correspond to one of a plurality of sublayers forming the first partition PW1. Another sublayer <NUM> among the plurality of sublayers forming the first partition PW1 may be located on a portion 211ep of the second organic insulating layer <NUM> and may include the same material as the upper insulating layer <NUM> and/or the spacer <NUM>.

The functional layers including the organic material arranged in the display area DA, for example, the first and second functional layers 222a and 222c, may extend toward the intermediate area MA and may be arranged closer to the display area DA than the first partition PW1 as described above with reference to <FIG>. Likewise, the opposite electrode <NUM> may also extend toward the intermediate area MA and may be arranged closer to the display area DA than the first partition PW1. Also, the positions of the edges 223e of the opposite electrode <NUM> and the edges 222ae and 222ce of the first and second functional layers 222a and 222c, the feature of the opposite electrode <NUM> including a burr, and the like may be the same as those described above with reference to <FIG>.

However, because the second organic insulating layer <NUM> extends toward the opening <NUM> to form a portion of the first partition PW1, the edges 222ae and 222ce of the first and second functional layers 222a and 222c and the edge 223e of the opposite electrode <NUM> may be located on the second organic insulating layer <NUM>.

<FIG> are cross-sectional views schematically illustrating an intermediate area of a display panel according to some embodiments.

According to the embodiments described above with reference to <FIG>, the first inorganic encapsulation layer <NUM> and the second inorganic encapsulation layer <NUM> directly contact each other without an organic material therebetween in the area between the first partition PW1 and the second partition PW2; however, according to some embodiments, a residual organic material may be in the area between the first partition PW1 and the second partition PW2.

According to some embodiments, as illustrated in <FIG>, the edge 320e of the organic encapsulation layer <NUM> may be located on one side of the first partition PW1 (e.g., the other side of the first partition PW1 facing the second partition PW2) as in the embodiments described above.

In the area between the first partition PW1 and the second partition PW2, an organic residue 320r may be arranged on the other side of the first partition PW1. The organic residue 320r may be formed as some monomer moves between the first partition PW1 and the second partition PW2 according to the flow of the injected monomer when the organic encapsulation layer <NUM> is formed. The organic residue 320r may include the same material as the organic encapsulation layer <NUM>.

According to some embodiments, the edge 320e of the organic encapsulation layer <NUM> illustrated in <FIG> may be located on the upper surface of the first partition PW1 unlike the illustration of <FIG>. In the area between the first partition PW1 and the second partition PW2, the organic residues 320r may be arranged spaced apart from each other. One organic residue 320r may be arranged adjacent to the first partition PW1, the other organic residue 320r may be arranged adjacent to the second partition PW2, and the organic residues 320r may be spaced apart from each other.

The first inorganic encapsulation layer <NUM> and the second inorganic encapsulation layer <NUM> may locally directly contact each other between the organic residues 320r spaced apart from each other in the area between the first partition PW1 and the second partition PW2. For example, the first portions of the first inorganic encapsulation layer <NUM> and the second inorganic encapsulation layer <NUM> may not directly contact each other by the locally-arranged organic residue 320r, but the second portions thereof may directly contact each other between the organic residue 320r adjacent to the first partition PW1 and the organic residue 320r adjacent to the second partition PW2.

According to the embodiments described above with reference to <FIG>, the display panel <NUM> includes two partitions; however, as illustrated in <FIG>, the display panel <NUM> may include three or more partitions.

Referring to <FIG>, the third partition PW3 may be arranged closer to the opening area, that is, the opening <NUM> of the display panel <NUM> (see <FIG>), than the first partition PW1 and the second partition PW2. The first to third partitions PW1, PW2, and PW3 may have different heights. For example, a height H2 of the second partition PW2 may be greater than a height H1 of the first partition PW1 and a height H3 of the third partition PW3, and the height H1 of the first partition PW1 may be greater than the height H3 of the third partition PW3. A plurality of partitions may be used to monitor the position of the organic encapsulation layer <NUM>.

According to the embodiments illustrated in <FIG>, the planarization insulating layer <NUM> covers the intermediate area MA not covered by the organic encapsulation layer <NUM>; however, embodiments according to the present disclosure are not limited thereto.

According to some embodiments, as illustrated in <FIG>, among the insulating layers included in the input sensing layer <NUM>, the third insulating layer <NUM> including an organic insulating material may cover the intermediate area MA not covered by the organic encapsulation layer <NUM>. In this case, the planarization insulating layer <NUM> (see <FIG> or the like) described above may be omitted. In the case of having the structure illustrated in <FIG>, a portion of the third insulating layer <NUM> may be in the space between the partitions, for example, the space between the first partition PW1 and the second partition PW2.

Claim 1:
A display panel (<NUM>) comprising:
a substrate (<NUM>) including an opening (<NUM>) penetrating from an upper surface to a lower surface of the substrate (<NUM>);
a light emitting diode (OLED) in a display area (DA) around the opening (<NUM>) and including:
a pixel electrode (<NUM>);
an opposite electrode (<NUM>);
an intermediate layer (<NUM>) between the pixel electrode (<NUM>) and the opposite electrode (<NUM>), the intermediate layer (<NUM>) comprising an emission layer (222b), and at least one organic material layer (222a, 222c);
a thin film encapsulation layer (<NUM>) on the light emitting diode (OLED) and including an organic encapsulation layer (<NUM>) and at least one inorganic encapsulation layer (<NUM>, <NUM>); and
a transistor (TFT) electrically connected to the light emitting diode (OLED); and
an organic insulating layer (<NUM>) between the transistor (TFT) and the light emitting diode (OLED),
wherein the opposite electrode (<NUM>) and at least one organic material layer (222a, 222c) of the intermediate layer (<NUM>) extend toward the opening (<NUM>), wherein an edge portion of the opposite electrode (<NUM>) facing the opening (<NUM>) protrudes further toward the opening (<NUM>) than the at least one organic material layer (222a, 222c) and includes a burr covered by the organic encapsulation layer (<NUM>), and
wherein the at least one organic material layer (222a, 222c) and the opposite electrode (<NUM>) each extends beyond an edge (211e) of the organic insulating layer (<NUM>) toward the opening (<NUM>).