Patent Description:
In the market of consumer electronic devices (e.g., cameras), adding modular accessory devices to the core product may provide more functionality and increase options for customization. With an expanding ecosystem of accessory devices for a given core product, interface mechanisms must be developed and supported in order to allow the core device to detect and communicate with the different types of accessory devices in the ecosystem. Such mechanisms may add hardware requirements, thereby increasing cost and adding inefficiencies in the modular design. <CIT> relates to a power supply detecting circuit detecting feeding of power to a power supply terminal from the outside. A control unit identifies an accessory device connected to a connector based on a detection result acquired by an identification terminal voltage detecting circuit and a detection result acquired by the power supply detecting circuit. The identification terminal voltage detecting circuit can narrow down accessory device candidates based on whether or not there is a feeding of power detected by the power supply detecting circuit. <CIT> describes a method and an apparatus for recognizing an accessory of a portable terminal. The apparatus includes an interface unit in which the accessory is mounted, a power supply for supplying microphone bias power for recognizing the accessory in the interface unit, a current detector for determining an output current of the power supply, and a controller for determining whether the output current of the power supply exceeds a preset reference current when mounting of the accessory is sensed and for recognizing a type of the accessory according to the output current of the power supply when the output current of the power supply exceeds the preset reference current. <CIT> relates to a mobile terminal for connecting external devices to the mobile terminal. The mobile terminal includes a battery, a connector including a pin for data communication and first and second power pins for charging the battery, a memory for storing a reference voltage indicating a dedicated adapter of the battery, and a controller for receiving a voltage input from the first and second power pins, for recognizing an external device connected with the connector as the dedicated adapter when a voltage input from the pin for data communication is the reference voltage, and for charging the battery with the power input to the first and second power pins. <CIT> describes logic circuitry packages for association with replaceable print apparatus components. The logic circuitry package includes a timer and a serial data bus interphase, including a data contact and a clock contact, the serial data bus interface to interface with a serial data bus of a printer. <CIT>, <CIT>, <CIT>, <CIT>, and <CIT> are further documents belonging to the prior art.

This disclosure describes an interface configured to support accessory device detection, identification, and communication with minimum added cost and optimized efficiency. The interface leverages the physical connections of a digital communication bus (e.g., I<NUM>C) for accessory detection/identification, which requires no additional hardware connections and is thus more cost effective. A core device implementing such an interface does not require separate signals for purposes of detecting and identifying accessory devices. As such, a core device implementing such an interface can recognize and communicate with different types of accessories using the communication bus. Further, a core device implementing such an interface may detect and identify an accessory device before the accessory device powers on, which increases efficiency.

In one aspect, an electronic host device comprises the features of claim <NUM>, and a method of interfacing an electronic host device comprises the features of claim <NUM>.

The detected analog voltage levels may include (i) a first analog voltage level across a first of the plurality of communication lines and (ii) a second analog voltage level across a second of the plurality of communication lines. The detection circuitry may determine the device type of the electronic accessory device based on a mapping of the first analog voltage level and the second analog voltage level to the device type in a lookup table stored in memory of the detection circuitry. The first analog voltage level may be set by a first resistor divider circuit including (i) a first pull-up resistor included in the electronic host device and (ii) a first pull-down resistor included in the electronic accessory device. The second analog voltage level may be set by a second resistor divider circuit including (i) a second pull-up resistor included in the electronic host device and (ii) a second pull-down resistor included in the electronic accessory device. The first and second pull-up resistors may have fixed resistance values that are independent of the device type of the electronic accessory device, and the first and second pull-down resistors may have resistance values corresponding to the device type of the electronic accessory device.

For a better understanding of the various described implementations, reference should be made to the Detailed Description below, in conjunction with the following drawings in which like reference numerals refer to corresponding parts throughout the figures.

<FIG> is a system <NUM> including an electronic host device <NUM> and an electronic accessory device <NUM> in accordance with some implementations.

The host device <NUM> is an electronic device, also referred to as a core device, master device, or main device. In general, the host device <NUM> may be any consumer or non-consumer electronic device having one or more functions that may be enhanced or supplemented by the addition of an accessory device <NUM> designed to interface with the host device <NUM>. For example, the host device <NUM> may be a battery-powered or wired indoor or outdoor camera.

The accessory device <NUM> is an electronic device, also referred to as an accessory, a slave device, or a secondary device. In general, the accessory device <NUM> may be any consumer or non-consumer electronic device having a function that may enhance or supplement a corresponding function of a host device <NUM>, or perform a function that the host device <NUM> cannot perform on its own. For the example in which the host device <NUM> is a camera, the accessory device <NUM> may be a camera stand (e.g., including camera control functionality), a supplemental power supply (e.g., an external battery or a solar panel), a floodlight (e.g., having motion sensing functionality), or any other accessory including electronics that enhance or supplement any of the functionality of the main camera device. The accessory device <NUM> has the ability to handle commands received from the host device <NUM>. For example, if the host device <NUM> is a camera and the accessory device <NUM> is a floodlight, the floodlight may implement functions such as lighting schedules, sensitivity to motion, and brightness of illumination by executing commands received from the camera.

The host device <NUM> and accessory device <NUM> are physically coupled to each other via an accessory interface comprising a communication bus <NUM>, which includes a plurality of communication lines <NUM> and <NUM>. The communication lines are physical connections through which digital communications may be passed between a host processor <NUM> of the host device and an accessory processor <NUM> of the accessory device. The communication bus <NUM> may pass data signals using a digital communication protocol such as inter-integrated circuit (I<NUM>C) or serial peripheral interface (SPI). While the communication bus <NUM> in the system <NUM> includes two communication lines <NUM> and <NUM> (e.g., a serial clock line (SCL) and a serial data line (SDA) for I<NUM>C communications), the communication bus <NUM> in other implementations may use any number of communication lines, depending on the underlying communication protocol being used by the host processor <NUM> and the accessory processor <NUM>.

The host device <NUM> includes a host processor <NUM>. The host processor <NUM> is the main processing unit of the host device <NUM>. For example, the host processor <NUM> is a microcontroller or a system on a chip (SOC). The host processor <NUM> controls the functionality of the host device <NUM> and the accessory device <NUM> by executing one or more programs stored in memory of the host device <NUM> (not shown). Specifically, the host processor directly controls the accessory device <NUM> after detection circuitry <NUM> of the host device <NUM> detects and identifies the accessory device <NUM> and establishes a communication channel via the communication bus <NUM> (discussed in more detail below). In some implementations, the host processor <NUM> is powered off or kept in a low power state (e.g., a sleep mode) while it is not being used in order to save power.

The host device <NUM> includes detection circuitry <NUM>, The detection circuitry <NUM> may be a co-processor or microcontroller that monitors the status of the communication lines <NUM>/<NUM>, identifies the device type of the accessory device <NUM>, and routes (or causes to be routed) communications passed via the communication lines <NUM>/<NUM> (e.g., control traffic) to the host processor <NUM> (discussed in more detail below). In some implementations, the detection circuitry <NUM> may be always powered on since it is more energy efficient than the host processor <NUM> and is required for detecting accessory devices <NUM>. The detection circuitry includes an analog-to-digital converter (ADC) configured to detect respective analog voltage levels of the communication lines <NUM>/<NUM> and convert them to digital values for use in identifying the device type of the accessory device <NUM> (described in more detail below).

The host device <NUM> includes a multiplexer <NUM>. The multiplexer <NUM> is a signal switch controlled by the detection circuitry <NUM> (via a control signal <NUM>). The multiplexer <NUM> routes traffic received via the communication lines <NUM>/<NUM> either to the host processor <NUM> or to the detection circuitry <NUM>. The multiplexer <NUM> is defaulted to directing traffic to the detection circuitry <NUM>. If the detection circuitry <NUM> does not detect an accessory device <NUM>, the detection circuitry <NUM> does not switch the multiplexer <NUM>.

The host device <NUM> includes two pull-up resistors R3 and R4, each coupled to a respective communication line <NUM>/<NUM>. As such, when there is no accessory device <NUM> coupled to the host device <NUM>, the voltage levels of the communication lines <NUM>/<NUM> are pulled up to logic high (VDD). The resistance values of R3 and R4 are fixed. More details regarding resistance values are discussed below.

Before an accessory device <NUM> is attached, the multiplexer <NUM> directs traffic received via the communication lines <NUM>/<NUM> to the detection circuitry <NUM>, which monitors the state of the communication lines <NUM>/<NUM> (if nothing is asserted, both lines remain high). When an accessory device <NUM> gets connected to the host device <NUM>, two pull-down resistors R1 and R2 in the accessory device <NUM> form respective voltage paths between VDD and ground. The detection circuitry <NUM> detects the voltage levels of the communication lines <NUM>/<NUM> via lines 131a/132a in order to determine the device type of the accessory device <NUM> (discussed in more detail below). After detecting the device type of the accessory device <NUM>, the detection circuitry <NUM> toggles the multiplexer <NUM> to couple the communication lines <NUM>/<NUM> to the host processor <NUM> via lines 131b/132b.

The accessory device <NUM> includes an accessory processor <NUM>. The accessory processor <NUM> may be the main processing unit of the accessory device <NUM>, and it may be a processor, microcontroller, or system on a chip (SOC). The accessory processor <NUM> receives commands via the communication lines <NUM>/<NUM> from the host processor <NUM> of the host device <NUM>, and executes the commands locally at the accessory device <NUM>.

The accessory device <NUM> includes two pull-down resistors R1 and R2, each coupled to a respective communication line <NUM>/<NUM>. As such, when the accessory device <NUM> gets connected to the host device <NUM>, the pull-down resistors R1 and R2 in the accessory device <NUM> form respective voltage paths between VDD and ground. The resistance values of R1 and R2 are unique to the device type of the accessory device <NUM> (also referred to as the accessory type, accessory identifier, or accessory ID). Different combinations of resistance values of R1 and R2 correspond to different device types for accessory devices <NUM>. The resistance values of R1 and R2 form respective resistor dividers with the pull-up resistors R3 and R4 when the accessory device <NUM> gets connected to the host device <NUM>. As such, the resistance values of R1 and R2 directly influence the respective voltage levels measured by the detection circuitry <NUM> of each respective communication line <NUM>/<NUM>, therefore providing a basis for identifying the device type of the accessory device <NUM> (described in more detail below).

The host device <NUM> works in two major states: (i) an accessory detection/identification state as depicted in <FIG>, and (ii) an accessory communication state as depicted in <FIG>. In each figure, thicker lines depict active signals and blocks, and thinner lines depict inactive signals and blocks.

<FIG> depicts the accessory detection/identification state, which is the starting state for the host device <NUM>. In this state, the detection circuitry <NUM> routes signals received via the communication lines <NUM>/<NUM> to its ADC through the multiplexer <NUM>.

Before an accessory device <NUM> is attached to the host device <NUM>, respective voltage levels on the communication lines <NUM>/<NUM> are pulled up to logic high (VDD). The detection circuitry <NUM> monitors the voltage levels on these two lines regularly to determine whether an accessory device <NUM> is attached to the host device <NUM>.

After an accessory device <NUM> is attached to the host device <NUM>, the pull-down resistors R1 and R2 in the accessory device <NUM> pull down the respective voltage levels on the communication lines <NUM>/<NUM> by forming respective resistor dividers with the pull-up resistors R3 and R4 in the host device <NUM>. Specifically, the voltage level of communication line <NUM> is equal to R1/(R1+R3)*VDD, and the voltage level of communication line <NUM> is equal to R2/(R2+R4)*VDD. Depending on the resistance values of the pull-down resistors R1 and R2, the detection circuitry <NUM> will measure different voltage levels on the communication lines <NUM>/<NUM>.

The detection circuitry <NUM> looks up the voltage levels in a predefined table (e.g., table <NUM>, <FIG>) stored in memory of the detection circuitry (not shown) and determines the device type (accessory ID) of the accessory device <NUM> by matching the voltage levels to the accessory ID. The detection circuitry <NUM> then communicates the determined accessory ID to the host processor <NUM> (via inter-processor signal <NUM>). The host processor <NUM> may keep a table of valid accessories and various settings and protocols corresponding to each accessory ID.

In some implementations, communicating the determined accessory ID to the host processor <NUM> includes waking the host processor <NUM> from a low power state. Upon waking, the host processor <NUM> receives the accessory ID from the detection circuitry <NUM>,.

Upon detecting the accessory device <NUM> and determining its device type (accessory ID), the detection circuitry <NUM> toggles the multiplexer <NUM> (via control signal <NUM>) to route the accessory communication traffic (conveyed via the communication lines <NUM>/<NUM>) to the host processor <NUM> via lines 131b/132b. The toggling of the multiplexer <NUM> in this manner facilitates switching of the host device <NUM> to the accessory communication state as shown in <FIG>.

<FIG> depicts the accessory communication state. In this state, the host processor <NUM> communicates with the accessory processor <NUM> via the communication lines <NUM>/<NUM> (and coupled through liens 131b/132b) using a communication protocol (e.g., I<NUM>C).

Communications between the host processor <NUM> and the accessory processor <NUM> may include the transmission of commands and/or data from the host processor <NUM> to the accessory processor <NUM> in accordance with the device type of the accessory device <NUM> (e.g., by transmitting a command or data that is specific to the device type of the accessory device <NUM>, such as an illumination brightness setting for a floodlight accessory or a pan/tilt setting for a camera stand accessory).

The underlying communications protocol between the host processor <NUM> and the accessory processor <NUM> may optionally be determined by the device type of the accessory device <NUM>. For example, depending on the requirements associated with a particular Accessory ID, the host processor <NUM> may indirectly control the multiplexer <NUM> (through the detection circuitry <NUM>) to route signals on communications on lines <NUM>/<NUM> from a first plurality of communication pins of the host processor <NUM> (e.g., pins supporting I<NUM>C communications) to a second plurality of communication pins of the host processor <NUM> (e.g., pins supporting SPI or UART communications).

Upon disconnection of the accessory device <NUM> from the host device <NUM>, the host processor <NUM> may send an inter-processor control signal <NUM> to the detection circuitry <NUM> to indirectly control the multiplexer <NUM> to switch back to lines 131a/132a, which couples the communication lines <NUM>/<NUM> to the detection circuitry, thereby switching the host device <NUM> back to the accessory detection state (<FIG>). The host processor <NUM> may transition back to the low power state upon causing the multiplexer <NUM> to toggle the communication lines <NUM>/<NUM> back to the detection circuitry <NUM>.

Optionally, while in the accessory communication state (<FIG>), the host processor may transition to the low power state, or perform a duty cycle, according to a power-saving protocol. While in the low-power state, the host processor <NUM> may send a request to the detection circuitry <NUM> to check that the accessory device <NUM> is still attached to the host device <NUM>. As a result, the detection circuitry <NUM> switches the multiplexer <NUM> to couple the communication liens <NUM>/<NUM> to the detection circuitry <NUM> via lines 131a/132a. If the detection circuitry <NUM> determines there is no accessory device <NUM> attached (e.g., the voltage levels for the communication lines <NUM>/<NUM> are VDD), then the host processor may be prevented from fully powering on, which saves battery life in battery-powered host devices <NUM>.

<FIG> is a table <NUM> depicting example resistor values for the pull-down resistors R1/R2 of the accessory device <NUM>, the pull-up resistors R3/R4 of the host device <NUM>, and an example mapping of the different pull-down resistor values to different accessory IDs. The values of R1 and R2 may be chosen so that they pull down the voltage levels of lines <NUM>/<NUM> by a large enough amount for the detection circuitry <NUM> (e.g., the ADC) to differentiate between the various voltage levels, while keeping the voltage levels higher than the minimum voltage threshold of both the accessory processor <NUM> and the host processor <NUM> communication interfaces.

The resistance values in table <NUM> are examples, and other resistance values and combinations of resistance values may be chosen as long as they (i) cause the voltage levels for lines <NUM>/<NUM> to meet minimum voltage thresholds for digital communications over the communication lines <NUM>/<NUM> as discussed above, and (ii) cause a difference between successive voltage levels to satisfy a minimum resolution requirement of the ADC of the detection circuitry as discussed above. For example, if the underlying communication protocol is I<NUM>C, VDD is <NUM>. 8V, and the voltage for lines <NUM>/<NUM> at the accessory device <NUM> may go down to <NUM>. 2V and still satisfy the I<NUM>C specification. As such, there is a <NUM>. 6V margin (from <NUM>*VDD to <NUM>,<NUM>*VDD) through which various voltage levels may span.

As described above, the number of different accessory IDs that can be mapped to different voltage combinations may be limited by (i) minimum voltage thresholds for digital communications, and (ii) ADC resolution. In some implementations, additional steps may be taken in order to increase the number of different accessory IDs. For instance, in order to support additional accessory device types, each accessory ID in the table <NUM> may be assigned to a group of accessories (e.g., a camera type). Following the transition to the communication state (<FIG>), the host processor <NUM> may communicate with the accessory device <NUM> via the communication lines <NUM>/<NUM> in order to determine a more specific device type (e.g., a specific model of the camera type). For example, in communicating with the accessory device <NUM> to determine a more specific device type, the host processor <NUM> may poll or interrogate a memory (e.g., an electrically erasable programmable read-only memory (EEPROM), not shown) of the accessory device <NUM> to obtain additional information about the specific type of accessory device <NUM> (additional device type information corresponding to the more general accessory ID in the table <NUM>).

<FIG> is a table <NUM> depicting a mapping of the various combinations of voltage levels for the communication lines <NUM>/<NUM> to different accessory IDS. The values in table <NUM> correspond to the values in table <NUM>. Table <NUM> may be stored in memory included in or otherwise associated with the detection circuitry <NUM> and/or the host processor <NUM>.

The system <NUM> as described above allows for live insertion of an accessory device <NUM> into a host device <NUM>. With the automatic detection features of the detection circuitry <NUM> and live insertion, the host device <NUM> may not require additional security overhead, because all of the commands may be driven by the host device <NUM> (e.g., the camera). Live insertion with a standard interface (e.g., I<NUM>C) allows for the use of accessory attachments after-the-fact from a security point of view. In addition, quick configuration changes may be implemented with live insertion. For example, as soon as a floodlight (accessory device <NUM>) is plugged into a camera (host device <NUM>), the camera may detect/identify the flood light and change the camera's configuration (e.g., turn off power-intensive on-board illumination circuitry).

<FIG> is a flow diagram illustrating an example method <NUM> of interfacing an electronic host device (e.g., <NUM>) with an electronic accessory device (e.g., <NUM>) in accordance with some implementations. Method <NUM> is, optionally, governed by instructions that are stored in a computer memory or non-transitory computer readable storage medium included in or associated with the host device and/or the accessory device, and that are executed by one or more processors of the host device (e.g., host processor <NUM> and detection circuitry <NUM>) and/or the accessory device (e.g., accessory processor <NUM>). The computer readable storage medium may include a magnetic or optical disk storage device, solid state storage devices such as Flash memory, or other non-volatile memory device or devices. The instructions stored on the computer readable storage medium may include one or more of: source code, assembly language code, object code, or other instruction format that is interpreted by the one or more processors. Some operations in method <NUM> may be combined and/or the order of some operations may be changed. Reference numbers in the description below may refer to features described above with reference to <FIG> to illustrate example features of the various operations recited with reference to method <NUM>.

At detection circuitry <NUM> selectively coupled, via a multiplexer <NUM>, to a plurality of communication lines <NUM>/<NUM> of a digital communication bus <NUM> configured to pass data between the electronic host device <NUM> and the electronic accessory device <NUM>, the detection circuitry <NUM> detects (operation <NUM>) analog voltage levels across the plurality of communication lines <NUM>/<NUM>. The detection circuitry <NUM> determines (operation <NUM>) a device type of the electronic accessory device based on the detected analog voltage levels (e.g., by looking up the device type in a table <NUM> indexed by the analog voltage levels). The detection circuitry <NUM> transitions (operation <NUM>) to a communication mode of the host device <NUM> by (i) controlling the multiplexer <NUM> to couple the plurality of communication lines <NUM>/<NUM> to the host processor <NUM> of the electronic host device <NUM> upon determining the device type of the electronic accessory device <NUM> and (ii) transmitting the device type to the host processor <NUM> (and optionally waking the host processor <NUM> from a low power state). Upon receiving the device type of the electronic accessory device <NUM> from the detection circuitry <NUM>, the host processor <NUM> transmits (operation <NUM>) data and/or commands via the plurality of communication lines <NUM>/<NUM> to the electronic accessory device <NUM> in accordance with the device type of the electronic accessory device (e.g., transmitting a command that is specific to the device type of the electronic accessory device <NUM>).

In some implementations, the detected analog voltage levels may include (i) a first analog voltage level across a first of the plurality of communication lines and (ii) a second analog voltage level across a second of the plurality of communication lines, and the detection circuitry <NUM> determines the device type of the electronic accessory device <NUM> by matching the first analog voltage level and the second analog voltage level (the left and center columns of table <NUM>) to the device type (the right column of table <NUM>) in a lookup table stored in memory of the detection circuitry (table <NUM>).

In some implementations, the first analog voltage level is set by a first resistor divider circuit including (i) a first pull-up resistor R3 included in the electronic host device <NUM> and (ii) a first pull-down resistor R1 included in the electronic accessory device <NUM>; and the second analog voltage level is set by a second resistor divider circuit including (i) a second pull-up resistor R4 included in the electronic host device <NUM> and (ii) a second pull-down resistor R2 included in the electronic accessory device <NUM>. The first and second pull-up resistors R3/R4 may have fixed resistance values that are independent of the device type of the electronic accessory device; and the first and second pull-down resistors R1/R2 may have resistance values corresponding to the device type of the electronic accessory device <NUM>.

In some implementations, the detection circuitry <NUM> includes an ADC configured to detect the first and second analog voltage levels; and the first and second pull-down resistors R1/R2 have resistance values that (i) cause the first and second analog voltage levels to be greater than or equal to a minimum voltage threshold for digital communications over the plurality of communication lines, and (ii) cause a difference between the first and second analog voltage levels to satisfy a minimum resolution requirement of the ADC.

In some implementations, upon receiving the device type of the electronic accessory device from the detection circuitry, the host processor polls a memory of the accessory device to determine additional device type information of the electronic accessory device, and transmits the data via the plurality of communication lines to the electronic accessory device in accordance with the additional device type information of the electronic accessory device.

In some implementations, upon disconnection of the electronic accessory device <NUM> from the electronic host device <NUM>, the host processor (i) sends a command to the detection circuitry <NUM> to control the multiplexer <NUM> to couple the plurality of communication lines <NUM>/<NUM> to the detection circuitry <NUM>, and (ii) transitions to a low power state.

The foregoing description has been described with reference to specific implementations. However, the illustrative discussions above are not intended to be exhaustive or to limit the claims to the precise forms disclosed. Many variations are possible in view of the above teachings. The implementations were chosen and described to best explain principles of operation and practical applications, to thereby enable others skilled in the art.

The various drawings illustrate a number of elements in a particular order. However, elements that are not order dependent may be reordered and other elements may be combined or separated. While some reordering or other groupings are specifically mentioned, others will be obvious to those of ordinary skill in the art, so the ordering and groupings presented herein are not an exhaustive list of alternatives.

Claim 1:
An electronic host device (<NUM>) comprising at least one host processor (<NUM>), detection circuitry (<NUM>), a multiplexer (<NUM>), and an accessory interface,
the accessory interface comprising a digital communication bus (<NUM>) including a plurality of communication lines (<NUM>, <NUM>) configured to pass data between the electronic host device (<NUM>) and an electronic accessory device (<NUM>);
the detection circuitry (<NUM>) being selectively coupled to the plurality of communication lines (<NUM>, <NUM>) via a multiplexer (<NUM>), the multiplexer (<NUM>) configured to function as a signal switch controlled by the detection circuitry (<NUM>) and route traffic received via the plurality of communication lines (<NUM>, <NUM>) either, when the electronic host device (<NUM>) is in a detection/identification state, to the detection circuitry (<NUM>) or, when the electronic host device (<NUM>) is in a communication state, to the host processor (<NUM>) of the electronic host device (<NUM>),
wherein the detection circuitry (<NUM>) is configured to:
detect, when in the detection/identification state, analog voltage levels across the plurality of communication lines (<NUM>, <NUM>) using an analog-to-digital converter (ADC) included in the detection circuitry (<NUM>);
determine a device type of the electronic accessory device (<NUM>) based on the detected analog voltage levels; and
control the multiplexer (<NUM>) to couple the plurality of communication lines (<NUM>, <NUM>) to the host processor (<NUM>) upon determining the device type of the electronic accessory device (<NUM>), and
wherein the host processor (<NUM>) is configured to:
receive the device type of the electronic accessory device (<NUM>) from the detection circuitry (<NUM>); and
transmit, when in the communication state, data via the plurality of communication lines (<NUM>, <NUM>) to the electronic accessory device (<NUM>) in accordance with the device type of the electronic accessory device (<NUM>).