Patent Description:
A Doherty amplifier generally includes two amplifiers, a <NUM>-degree line, and a combining circuit. One of the two amplifiers is a carrier amplifier that amplifies a first analog signal which is an amplification target signal, regardless of the signal level of the first analog signal. The other amplifier is a peaking amplifier that amplifies a second analog signal which is an amplification target signal, when the signal level of the second analog signal is greater than or equal to a predetermined signal level.

Doherty amplifiers include not only a Doherty amplifier in which one amplifier operates as a carrier amplifier and the other amplifier operates as a peaking amplifier, but also a Doherty amplifier in which the carrier amplifier and the peaking amplifier are switched, for example, depending on the magnitudes of power of amplification target signals, and the one amplifier operates as a peaking amplifier and the other amplifier operates as a carrier amplifier (such a Doherty amplifier is hereinafter referred to as "conventional Doherty amplifier").

The conventional Doherty amplifier can implement high efficiency operations if the signal levels of amplification target signals are in a range in which load modulation occurs in the Doherty amplifier. Occurrence of load modulation indicates that output impedance of the combining circuit changes along with a change in power of an output signal from the combining circuit.

Meanwhile, there is a Doherty amplifier including a power supply modulating unit that detects an envelope of an amplification target signal, and controls a power supply voltage of a carrier amplifier on the basis of the envelope (see, for example, Patent Literature <NUM>).

The conventional Doherty amplifier cannot detect whether or not there is load modulation. Hence, the conventional Doherty amplifier has a problem that it cannot implement an operation of suppressing decrease in efficiency at a time when the signal levels of amplification target signals are low levels at which load modulation does not occur.

Even if the power supply modulating unit in the Doherty amplifier described in Patent Literature <NUM> is applied to the conventional Doherty amplifier, when the carrier amplifier and the peaking amplifier are switched, a back-off level is not detected depending on whether or not there is load modulation. Hence, the power supply modulating unit cannot perform power supply modulation at the right back-off level, and thus, efficiency at the back-off level or lower cannot be improved.

The present disclosure is made to solve the problem described above, and an object of the present disclosure is to obtain a power supply modulation device, a power supply modulation method, and a power supply modulation-type amplifier that can suppress decrease in efficiency even when load modulation does not occur.

A power supply modulation device according to the present disclosure includes: a detecting unit to detect a first amplitude from a first digital signal and detect a second amplitude from a second digital signal, the first amplitude being an amplitude of a first analog signal provided to a first amplifier, and the second amplitude being an amplitude of a second analog signal provided to a second amplifier; a load modulation determining unit configured to calculate a time differential value of a ratio of the first amplitude detected by the detecting unit to a sum of the first amplitude and the second amplitude detected by the detecting unit, and perform determination of, on a basis of the time differential value of the ratio, whether or not output impedance of a combining circuit changes along with a change in power of the combined signal obtained by the combining circuit, wherein the combining circuit is configured to obtain a combined signal by combining together the first analog signal amplified by the first amplifier and the second analog signal amplified by the second amplifier, wherein if a time differential value of the ratio is <NUM> the load modulation determining unit determines that the output impedance of the combining circuit does not change and that load modulation does not occur, and if a time differential value of the ratio is not <NUM> the load modulation determining unit determines that the output impedance of the combining circuit changes and that load modulation occurs; and a power supply voltage control unit to control a power supply voltage supplied to each of the first amplifier and the second amplifier, on a basis of a result of the determination by the load modulation determining unit. When the load modulation determining unit (<NUM>) determines that the output impedance changes, the power supply voltage control unit (<NUM>) fixes the power supply voltage supplied to each of the first amplifier (<NUM>) and the second amplifier (<NUM>), and when the load modulation determining unit (<NUM>) determines that the output impedance does not change, the power supply voltage control unit (<NUM>) controls the power supply voltage supplied to each of the first amplifier (<NUM>) and the second amplifier (<NUM>), in accordance with a greater one of the first amplitude and the second amplitude.

According to the present disclosure, even when load modulation does not occur, decrease in efficiency can be suppressed.

To describe the present disclosure in more detail, embodiments for carrying out the present disclosure will be described below with reference to the accompanying drawings.

<FIG> is a configuration diagram showing a power supply modulation-type amplifier including a power supply modulation device <NUM> according to a first embodiment.

<FIG> is a hardware configuration diagram showing hardware of the power supply modulation device <NUM> according to the first embodiment.

The power supply modulation-type amplifier shown in <FIG> includes the power supply modulation device <NUM>, a first digital-to-analog converter (hereinafter, referred to as "first DAC") <NUM>, a second digital-to-analog converter (hereinafter, referred to as "second DAC") <NUM>, a first amplifier <NUM>, a second amplifier <NUM>, a combining circuit <NUM>, an output terminal <NUM>, and a variable power supply <NUM>.

The power supply modulation device <NUM> includes a first analog signal input terminal <NUM>, a second analog signal input terminal <NUM>, a detecting unit <NUM>, a load modulation determining unit <NUM>, a power supply voltage control unit <NUM>, and a fixed-voltage power supply <NUM>.

The power supply modulation device <NUM> determines whether or not there is load modulation in the power supply modulation-type amplifier shown in <FIG>, and controls a power supply voltage supplied from the variable power supply <NUM> to each of the first amplifier <NUM> and the second amplifier <NUM>, on the basis of whether or not there is load modulation.

Since the power supply modulation device <NUM> controls a power supply voltage supplied to each of the first amplifier <NUM> and the second amplifier <NUM>, on the basis of whether or not there is load modulation, not only when the signal levels of amplification target signals are high levels at which load modulation occurs, but also when the signal levels are low levels at which load modulation does not occur, decrease in efficiency can be suppressed.

In the power supply modulation-type amplifier shown in <FIG>, not only the first amplifier <NUM> operates as a carrier amplifier and the second amplifier <NUM> operates as a peaking amplifier, but also the carrier amplifier and the peaking amplifier are switched, for example, depending on the magnitudes of power of amplification target signals. Namely, in the power supply modulation-type amplifier shown in <FIG>, the first amplifier <NUM> may operate as a peaking amplifier and the second amplifier <NUM> may operate as a carrier amplifier.

The first DAC <NUM> converts a first digital signal which is an amplification target signal to a first analog signal, and outputs the first analog signal to the first amplifier <NUM>.

The second DAC <NUM> converts a second digital signal which is an amplification target signal to a second analog signal, and outputs the second analog signal to the second amplifier <NUM>.

The first amplifier <NUM> is implemented by, for example, a field effect transistor (FET), a heterojunction bipolar transistor (HBT), or a high electron mobility transistor (HEMT).

The first amplifier <NUM> amplifies the first analog signal outputted from the first DAC <NUM>, and outputs the amplified first analog signal to the combining circuit <NUM>.

The second amplifier <NUM> is implemented by, for example, a FET, an HBT, or a HEMT.

The second amplifier <NUM> amplifies the second analog signal outputted from the second DAC <NUM>, and outputs the amplified second analog signal to the combining circuit <NUM>.

For example, if the power of the first analog signal is greater than or equal to the power of the second analog signal, then the first amplifier <NUM> operates as a carrier amplifier and the second amplifier <NUM> operates as a peaking amplifier. If the power of the first analog signal is smaller than the power of the second analog signal, then the first amplifier <NUM> operates as a peaking amplifier and the second amplifier <NUM> operates as a carrier amplifier.

The combining circuit <NUM> combines together the first analog signal amplified by the first amplifier <NUM> and the second analog signal amplified by the second amplifier <NUM>, and outputs the combined signal to the output terminal <NUM>.

The output terminal <NUM> is a terminal for outputting the signal combined by the combining circuit <NUM> to an external source.

The variable power supply <NUM> supplies a power supply voltage to each of the first amplifier <NUM> and the second amplifier <NUM>.

The first analog signal input terminal <NUM> is a terminal to which the first digital signal which is an amplification target signal is provided.

The second analog signal input terminal <NUM> is a terminal to which the second digital signal which is an amplification target signal is provided.

The detecting unit <NUM> is implemented by, for example, a detection circuit <NUM> shown in <FIG>.

The detecting unit <NUM> includes a first amplitude detecting unit <NUM> and a second amplitude detecting unit <NUM>.

The detecting unit <NUM> detects a first amplitude which is the amplitude of the first analog signal provided to the first amplifier <NUM>, from the first digital signal provided to the first analog signal input terminal <NUM>.

The detecting unit <NUM> detects a second amplitude which is the amplitude of the second analog signal provided to the second amplifier <NUM>, from the second digital signal provided to the second analog signal input terminal <NUM>.

The first amplitude detecting unit <NUM> detects a first amplitude on the basis of the first digital signal provided to the first analog signal input terminal <NUM>, and outputs a first amplitude signal indicating the first amplitude to each of a first time differential calculating unit <NUM> which will be described later and an amplitude comparing unit <NUM> which will be described later.

The second amplitude detecting unit <NUM> detects a second amplitude on the basis of the second digital signal provided to the second analog signal input terminal <NUM>, and outputs a second amplitude signal indicating the second amplitude to each of the first time differential calculating unit <NUM> and the amplitude comparing unit <NUM>.

The load modulation determining unit <NUM> is implemented by, for example, a load modulation determining circuit <NUM> shown in <FIG>.

The load modulation determining unit <NUM> includes the first time differential calculating unit <NUM> and a load modulation determination processing unit <NUM>.

The load modulation determining unit <NUM> determines whether or not load modulation occurs in the power supply modulation-type amplifier shown in <FIG>.

Namely, the load modulation determining unit <NUM> calculates a time differential value of a ratio of the first amplitude detected by the detecting unit <NUM> to a sum of the first amplitude and the second amplitude detected by the detecting unit <NUM>.

The load modulation determining unit <NUM> determines, on the basis of the time differential value of the ratio, whether or not the output impedance of the combining circuit <NUM> changes along with a change in power of the signal combined by the combining circuit <NUM>.

The load modulation determining unit <NUM> outputs a result of the determination indicating whether or not the output impedance of the combining circuit <NUM> changes, to the power supply voltage control unit <NUM> which will be described later.

The first time differential calculating unit <NUM> calculates a sum of the first amplitude indicated by the first amplitude signal outputted from the first amplitude detecting unit <NUM> and the second amplitude indicated by the second amplitude signal outputted from the second amplitude detecting unit <NUM> (hereinafter, referred to as "amplitude sum").

The first time differential calculating unit <NUM> calculates a ratio of the first amplitude to the amplitude sum and calculates a time differential value of the ratio.

The first time differential calculating unit <NUM> outputs the time differential value of the ratio to the load modulation determination processing unit <NUM>.

If the time differential value calculated by the first time differential calculating unit <NUM> is <NUM>, then the load modulation determination processing unit <NUM> determines that load modulation does not occur. That is, it is determined that the output impedance of the combining circuit <NUM> does not change.

If the time differential value calculated by the first time differential calculating unit <NUM> is not <NUM>, then the load modulation determination processing unit <NUM> determines that load modulation occurs. That is, it is determined that the output impedance of the combining circuit <NUM> changes.

The load modulation determination processing unit <NUM> outputs a result of the determination indicating whether or not the output impedance of the combining circuit <NUM> changes, to a voltage setting unit <NUM> which will be described later.

The power supply voltage control unit <NUM> is implemented by, for example, a power supply voltage control circuit <NUM> shown in <FIG>.

The power supply voltage control unit <NUM> includes the amplitude comparing unit <NUM> and the voltage setting unit <NUM>.

The power supply voltage control unit <NUM> controls a power supply voltage supplied to each of the first amplifier <NUM> and the second amplifier <NUM>, on the basis of the result of the determination by the load modulation determining unit <NUM>.

Namely, when the load modulation determining unit <NUM> determines that the output impedance changes, the power supply voltage control unit <NUM> fixes a power supply voltage supplied from the variable power supply <NUM>.

When the load modulation determining unit <NUM> determines that the output impedance does not change, the power supply voltage control unit <NUM> controls a power supply voltage supplied from the variable power supply <NUM>, in accordance with a greater one of the first amplitude and the second amplitude.

The amplitude comparing unit <NUM> compares the first amplitude indicated by the first amplitude signal outputted from the first amplitude detecting unit <NUM> with the second amplitude indicated by the second amplitude signal outputted from the second amplitude detecting unit <NUM>.

If the first amplitude is greater than or equal to the second amplitude, then the amplitude comparing unit <NUM> outputs the first amplitude signal to the voltage setting unit <NUM>.

If the first amplitude is smaller than the second amplitude, then the amplitude comparing unit <NUM> outputs the second amplitude signal to the voltage setting unit <NUM>.

If the result of the determination outputted from the load modulation determination processing unit <NUM> indicates that the output impedance changes, then the voltage setting unit <NUM> fixes a power supply voltage supplied from the variable power supply <NUM> to a voltage outputted from the fixed-voltage power supply <NUM>.

If the result of the determination outputted from the load modulation determination processing unit <NUM> indicates that the output impedance does not change, then the voltage setting unit <NUM> controls a power supply voltage supplied from the variable power supply <NUM>, in accordance with the first amplitude indicated by the first amplitude signal or the second amplitude indicated by the second amplitude signal that is outputted from the amplitude comparing unit <NUM>.

The fixed-voltage power supply <NUM> outputs a fixed voltage to the voltage setting unit <NUM>.

In <FIG>, it is assumed that each of the detecting unit <NUM>, the load modulation determining unit <NUM>, the power supply voltage control unit <NUM>, and the fixed-voltage power supply <NUM> which are components of the power supply modulation device <NUM> is implemented by dedicated hardware such as that shown in <FIG>. Namely, it is assumed that the power supply modulation device <NUM> is implemented by the detection circuit <NUM>, the load modulation determining circuit <NUM>, the power supply voltage control circuit <NUM>, and the fixed-voltage power supply <NUM>.

Each of the detection circuit <NUM>, the load modulation determining circuit <NUM>, and the power supply voltage control circuit <NUM> corresponds, for example, to a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or a combination thereof.

The components of the power supply modulation device <NUM> are not limited to being implemented by dedicated hardware, and may be implemented by software, firmware, or a combination of software and firmware.

The software or firmware is stored as a program in a memory of a computer. The computer refers to hardware that executes the program, and corresponds, for example, to a central processing unit (CPU), a central processor, a processing unit, an arithmetic unit, a microprocessor, a microcomputer, a processor, or a digital signal processor (DSP).

<FIG> is a hardware configuration diagram of a computer for a case in which a part of the power supply modulation device <NUM> is implemented by software, firmware, or the like.

When a part of the power supply modulation device <NUM> is implemented by software, firmware, or the like, a program for causing a computer to perform a processing procedure performed by each of the detecting unit <NUM>, the load modulation determining unit <NUM>, and the power supply voltage control unit <NUM> is stored in a memory <NUM>. Then, a processor <NUM> of the computer executes the program stored in the memory <NUM>.

In addition, <FIG> shows an example in which each of the components of the power supply modulation device <NUM> is implemented by dedicated hardware, and <FIG> shows an example in which a part of the power supply modulation device <NUM> is implemented by software, firmware, or the like. However, they are merely examples, and some of the detecting unit <NUM>, the load modulation determining unit <NUM>, and the power supply voltage control unit <NUM> which are components of the power supply modulation device <NUM> may be implemented by dedicated hardware and the other components may be implemented by software, firmware, or the like.

<FIG> is a configuration diagram showing the inside of the first time differential calculating unit <NUM>.

The first time differential calculating unit <NUM> includes an adding unit 16a, a dividing unit 16b, and a differential calculation processing unit 16c.

The adding unit 16a adds up a first amplitude Magi indicated by a first amplitude signal outputted from the first amplitude detecting unit <NUM> and a second amplitude Mag<NUM> indicated by a second amplitude signal outputted from the second amplitude detecting unit <NUM>, thereby calculating an amplitude sum ΣMag.

The adding unit 16a outputs the amplitude sum ΣMag to the dividing unit 16b.

The dividing unit 16b calculates a ratio Pratio of the first amplitude Magi to the amplitude sum ΣMag outputted from the adding unit 16a.

The dividing unit 16b outputs the ratio Pratio to the differential calculation processing unit 16c.

The differential calculation processing unit 16c calculates a time differential value Deli of the ratio Pratio outputted from the dividing unit 16b.

The differential calculation processing unit 16c outputs the time differential value Deli to the load modulation determination processing unit <NUM>.

Next, operations of the power supply modulation-type amplifier shown in <FIG> will be described.

<FIG> is an explanatory diagram showing operating modes of the power supply modulation-type amplifier.

<FIG> shows that the power supply modulation-type amplifier performs a Doherty operation in a range in which a frequency f of each of a first analog signal and a second analog signal is greater than or equal to a fundamental frequency f<NUM> and is less than or equal to a double frequency 2f<NUM>.

In addition, <FIG> shows that the power supply modulation-type amplifier performs an out-phasing operation in a range in which the frequency f is greater than the double frequency 2f<NUM> and is less than or equal to a triple frequency 3f<NUM>.

The power supply modulation device <NUM> shown in <FIG> can suppress decrease in efficiency at a time when a Doherty operation is performed.

<FIG> is a flowchart showing a power supply modulation method which is a processing procedure performed by the power supply modulation device <NUM> shown in <FIG>.

The first amplitude detecting unit <NUM> obtains a first digital signal provided to the first analog signal input terminal <NUM>.

The first amplitude detecting unit <NUM> detects a first amplitude Magi which is the amplitude of a first analog signal outputted from the first DAC <NUM> to the first amplifier <NUM>, on the basis of the first digital signal (step ST1 of <FIG>). A process itself of detecting the first amplitude from the first digital signal is a known technique and thus a detailed description thereof is omitted.

The first amplitude detecting unit <NUM> outputs a first amplitude signal indicating the first amplitude Magi to each of the first time differential calculating unit <NUM> and the amplitude comparing unit <NUM>.

The second amplitude detecting unit <NUM> obtains a second digital signal provided to the second analog signal input terminal <NUM>.

The second amplitude detecting unit <NUM> detects a second amplitude Mag<NUM> which is the amplitude of a second analog signal outputted from the second DAC <NUM> to the second amplifier <NUM>, on the basis of the second digital signal (step ST2 of <FIG>).

The second amplitude detecting unit <NUM> outputs a second amplitude signal indicating the second amplitude Mag<NUM> to each of the first time differential calculating unit <NUM> and the amplitude comparing unit <NUM>.

The load modulation determining unit <NUM> determines whether or not load modulation occurs in the power supply modulation-type amplifier shown in <FIG>. That is, it is determined whether or not the output impedance of the combining circuit <NUM> changes along with a change in power of an output signal from the combining circuit <NUM> (step ST3 of <FIG>).

A determination process performed by the load modulation determining unit <NUM> will be specifically described below.

First, the adding unit 16a obtains the first amplitude signal from the first amplitude detecting unit <NUM> and obtains the second amplitude signal from the second amplitude detecting unit <NUM>.

As shown in the following equation (<NUM>), the adding unit 16a adds up the first amplitude Magi indicated by the first amplitude signal and the second amplitude Mag<NUM> indicated by the second amplitude signal, thereby calculating an amplitude sum ΣMag: <MAT>.

The dividing unit 16b obtains the first amplitude signal from the first amplitude detecting unit <NUM> and obtains the amplitude sum ΣMag from the adding unit 16a.

The dividing unit 16b calculates a ratio Pratio of the first amplitude Magi to the amplitude sum ΣMag outputted from the adding unit 16a as shown in the following equation (<NUM>): <MAT>.

The differential calculation processing unit 16c obtains the ratio Pratio from the dividing unit 16b.

The differential calculation processing unit 16c calculates a time differential value Deli of the ratio Pratio. A process itself of calculating the time differential value Deli is a known technique and thus a detailed description thereof is omitted.

If the time differential value Deli calculated by the first time differential calculating unit <NUM> is <NUM>, then the load modulation determination processing unit <NUM> determines that load modulation does not occur. That is, it is determined that the output impedance of the combining circuit <NUM> does not change.

If the time differential value Deli calculated by the first time differential calculating unit <NUM> is not <NUM>, then the load modulation determination processing unit <NUM> determines that load modulation occurs. That is, it is determined that the output impedance of the combining circuit <NUM> changes.

The load modulation determination processing unit <NUM> outputs a result of the determination J indicating whether or not the output impedance of the combining circuit <NUM> changes, to the voltage setting unit <NUM>.

The amplitude comparing unit <NUM> obtains the first amplitude signal from the first amplitude detecting unit <NUM> and obtains the second amplitude signal from the second amplitude detecting unit <NUM>.

The amplitude comparing unit <NUM> compares the first amplitude Magi indicated by the first amplitude signal with the second amplitude Mag<NUM> indicated by the second amplitude signal.

If the first amplitude Magi is greater than or equal to the second amplitude Mag<NUM>, then the amplitude comparing unit <NUM> outputs the first amplitude signal to the voltage setting unit <NUM>.

If the first amplitude Magi is smaller than the second amplitude Mag<NUM>, then the amplitude comparing unit <NUM> outputs the second amplitude signal to the voltage setting unit <NUM>.

The voltage setting unit <NUM> obtains the result of the determination J from the load modulation determination processing unit <NUM>.

The voltage setting unit <NUM> obtains the first amplitude signal or the second amplitude signal from the amplitude comparing unit <NUM>.

When the result of the determination J indicates that the output impedance does not change (when NO at step ST4 of <FIG>), if the obtained amplitude signal is the first amplitude signal (when YES at step ST5 of <FIG>), then the voltage setting unit <NUM> controls a power supply voltage V supplied from the variable power supply <NUM> to each of the first amplifier <NUM> and the second amplifier <NUM>, in accordance with the first amplitude Magi indicated by the first amplitude signal (step ST6 of <FIG>).

Namely, as shown in <FIG>, the voltage setting unit <NUM> controls the power supply voltage V supplied from the variable power supply <NUM> to each of the first amplifier <NUM> and the second amplifier <NUM> in such a manner that the amplitude of the power supply voltage V is the first amplitude Magi.

When the result of the determination J indicates that the output impedance does not change (when NO at step ST4 of <FIG>), if the obtained amplitude signal is the second amplitude signal (when NO at step ST5 of <FIG>), then the voltage setting unit <NUM> controls a power supply voltage V supplied from the variable power supply <NUM> to each of the first amplifier <NUM> and the second amplifier <NUM>, in accordance with the second amplitude Mag<NUM> indicated by the second amplitude signal (step ST7 of <FIG>).

Namely, as shown in <FIG>, the voltage setting unit <NUM> controls the power supply voltage V supplied from the variable power supply <NUM> to each of the first amplifier <NUM> and the second amplifier <NUM> in such a manner that the amplitude of the power supply voltage V is the second amplitude Mag<NUM>.

<FIG> is an explanatory diagram showing exemplary control of the power supply voltage V by the voltage setting unit <NUM>. In <FIG>, a broken line indicates that the amplitude of the power supply voltage V is the first amplitude Magi or the second amplitude Mag<NUM>.

If the result of the determination J indicates that the output impedance changes (when YES at step ST4 of <FIG>), then the voltage setting unit <NUM> fixes a power supply voltage V supplied from the variable power supply <NUM> to each of the first amplifier <NUM> and the second amplifier <NUM>, to a voltage outputted from the fixed-voltage power supply <NUM> (step ST8 of <FIG>).

Namely, as shown in <FIG>, the voltage setting unit <NUM> controls the power supply voltage V supplied from the variable power supply <NUM> to each of the first amplifier <NUM> and the second amplifier <NUM> in such a manner that the power supply voltage V is a voltage outputted from the fixed-voltage power supply <NUM>.

The amplitude of the voltage outputted from the fixed-voltage power supply <NUM> is greater than each of the first amplitude Magi and the second amplitude Mag<NUM>. In <FIG>, a solid line indicates that the power supply voltage V is a voltage outputted from the fixed-voltage power supply <NUM>.

The first DAC <NUM> converts the first digital signal provided to the first analog signal input terminal <NUM> to a first analog signal, and outputs the first analog signal to the first amplifier <NUM>.

The second DAC <NUM> converts the second digital signal provided to the second analog signal input terminal <NUM> to a second analog signal, and outputs the second analog signal to the second amplifier <NUM>.

The power supply voltage V outputted from the variable power supply <NUM> is applied as a bias voltage to a drain terminal of the first amplifier <NUM>.

With the power supply voltage V being applied to the drain terminal, the first amplifier <NUM> amplifies the first analog signal outputted from the first DAC <NUM> and outputs the amplified first analog signal to the combining circuit <NUM>.

The power supply voltage V outputted from the variable power supply <NUM> is applied as a bias voltage to a drain terminal of the second amplifier <NUM>.

With the power supply voltage V being applied to the drain terminal, the second amplifier <NUM> amplifies the second analog signal outputted from the second DAC <NUM> and outputs the amplified second analog signal to the combining circuit <NUM>.

<FIG> is an explanatory diagram showing relationships between output power obtained when the power supply modulation-type amplifier shown in <FIG> performs a Doherty operation, and the amplitude, phase, and the like, of each of a first analog signal and a second analog signal.

In <FIG>, the output power is standardized and changes in a range of <NUM> to <NUM>. When the output power is <NUM>, a back-off point is reached.

<FIG> shows a relationship between the output power of the power supply modulation-type amplifier and a first amplitude Magi of the first analog signal and a second amplitude Mag<NUM> of the second analog signal.

At the time of low power with the output power being lower than the back-off point, as shown in <FIG>, a power supply voltage V whose amplitude is identical to the first amplitude Magi or the second amplitude Mag<NUM> is applied to the drain terminal of each of the first amplifier <NUM> and the second amplifier <NUM>. In addition, at the time of high power with the output power being higher than the back-off point, as shown in <FIG>, a power supply voltage V identical to a voltage outputted from the fixed-voltage power supply <NUM> is applied to the drain terminal of each of the first amplifier <NUM> and the second amplifier <NUM>.

The first amplifier <NUM> amplifies the first analog signal at the time of both low power and high power.

The second amplifier <NUM> amplifies the second analog signal only at the time of high power, and does not amplifies the second analog signal at the time of low power.

<FIG> shows a relationship between the output power of the power supply modulation-type amplifier and a ratio Pratio of the first amplitude Magi to an amplitude sum ΣMag.

At the time of low power with the output power being lower than the back-off point, as shown in <FIG>, the ratio Pratio is constant.

At the time of high power with the output power being higher than the back-off point, as shown in <FIG>, the ratio Pratio changes.

<FIG> shows a relationship between the output power of the power supply modulation-type amplifier and a time differential value Deli of the ratio Pratio.

At the time of low power with the output power being lower than the back-off point, as shown in <FIG>, the time differential value Deli is <NUM> and load modulation does not occur.

At the time of high power with the output power being higher than the back-off point, as shown in <FIG>, the time differential value Deli is not <NUM> and load modulation occurs.

<FIG> shows a relationship between the output power of the power supply modulation-type amplifier and a first phase θ<NUM> of the first analog signal and a second phase θ<NUM> of the second analog signal.

Even if the output power of the power supply modulation-type amplifier changes, as shown in <FIG>, each of the first phase θ<NUM> and the second phase θ<NUM> is constant.

<FIG> shows a relationship between the output power of the power supply modulation-type amplifier and a phase difference Δθ.

Even if the output power of the power supply modulation-type amplifier changes, as shown in <FIG>, the phase difference Δθ between the first phase θ<NUM> and the second phase θ<NUM> is constant.

<FIG> shows a relationship between the output power of the power supply modulation-type amplifier and a time differential value Del<NUM> of the phase difference Δθ.

Even if the output power of the power supply modulation-type amplifier changes, as shown in <FIG>, the time differential value Del<NUM> of the phase difference Δθ is <NUM>.

<FIG> is an explanatory diagram showing a relationship between output power obtained when the power supply modulation-type amplifier shown in <FIG> performs a Doherty operation, and the efficiency of the power supply modulation-type amplifier shown in <FIG>.

<FIG> also shows the efficiency of the conventional Doherty amplifier described in the background art section, in addition to the efficiency of the power supply modulation-type amplifier shown in <FIG>.

At the time of high power with the output power being higher than the back-off point, the power supply modulation-type amplifier shown in <FIG> and the conventional Doherty amplifier have substantially the same high efficiency.

At the time of low power with the output power being lower than the back-off point, the efficiency of the conventional Doherty amplifier is greatly reduced compared with that at the time of high power with the output power being higher than the back-off point. In the power supply modulation-type amplifier shown in <FIG>, the power supply voltage V is controlled in accordance with a greater one of the first amplitude Magi and the second amplitude Mag<NUM>, and thus, decrease in efficiency at the time of low power is suppressed compared with the conventional Doherty amplifier.

In the first embodiment described above, the power supply modulation device <NUM> is configured to include the detecting unit <NUM> that detects, from a first digital signal, a first amplitude which is the amplitude of a first analog signal provided to the first amplifier <NUM> and detects, from a second digital signal, a second amplitude which is the amplitude of a second analog signal provided to the second amplifier <NUM>; the load modulation determining unit <NUM> that calculates a time differential value of a ratio of the first amplitude detected by the detecting unit <NUM> to a sum of the first amplitude and the second amplitude detected by the detecting unit <NUM>, and determines, on the basis of the time differential value of the ratio, whether or not output impedance of the combining circuit <NUM> that combines together the first analog signal amplified by the first amplifier <NUM> and the second analog signal amplified by the second amplifier <NUM> changes along with a change in power of the signal combined by the combining circuit <NUM>; and the power supply voltage control unit <NUM> that controls a power supply voltage supplied to each of the first amplifier <NUM> and the second amplifier <NUM>, on the basis of a result of the determination by the load modulation determining unit <NUM>. Thus, the power supply modulation device <NUM> can suppress decrease in efficiency even when load modulation does not occur.

In the power supply modulation device <NUM> shown in <FIG>, by the load modulation determining unit <NUM> and the power supply voltage control unit <NUM> performing digital signal processing, a power supply voltage supplied to each of the first amplifier <NUM> and the second amplifier <NUM> is controlled. However, this is merely an example, and a power supply voltage supplied to each of the first amplifier <NUM> and the second amplifier <NUM> may be controlled by the load modulation determining unit <NUM> and the power supply voltage control unit <NUM> performing analog signal processing.

In a second embodiment, a power supply modulation-type amplifier will be described in which a power supply modulation device <NUM> includes a load modulation determining unit <NUM> that determines, from a phase of each of a first analog signal and a second analog signal, whether or not output impedance of the combining circuit <NUM> changes along with a change in power of a signal combined by the combining circuit <NUM>.

<FIG> is a configuration diagram showing the power supply modulation-type amplifier including the power supply modulation device <NUM> according to the second embodiment. In <FIG>, the same reference signs as those of <FIG> indicate the same or corresponding portions and thus description thereof is omitted.

<FIG> is a hardware configuration diagram showing hardware of the power supply modulation device <NUM> according to the second embodiment. In <FIG>, the same reference signs as those of <FIG> indicate the same or corresponding portions and thus description thereof is omitted.

A detecting unit <NUM> is implemented by, for example, a detection circuit <NUM> shown in <FIG>.

The detecting unit <NUM> includes a first amplitude and phase detecting unit <NUM> and a second amplitude and phase detecting unit <NUM>.

The detecting unit <NUM> detects, from a first digital signal provided to the first analog signal input terminal <NUM>, a first phase which is the phase of a first analog signal, in addition to detecting a first amplitude.

The detecting unit <NUM> detects, from a second digital signal provided to the second analog signal input terminal <NUM>, a second phase which is the phase of a second analog signal, in addition to detecting a second amplitude.

The first amplitude and phase detecting unit <NUM> detects each of the amplitude and phase of the first analog signal, on the basis of the first digital signal provided to the first analog signal input terminal <NUM>.

The first amplitude and phase detecting unit <NUM> outputs a first amplitude signal indicating the first amplitude to the amplitude comparing unit <NUM>, and outputs a first phase signal indicating the first phase to a second time differential calculating unit <NUM>.

The second amplitude and phase detecting unit <NUM> detects each of the amplitude and phase of the second analog signal, on the basis of the second digital signal provided to the second analog signal input terminal <NUM>.

The second amplitude and phase detecting unit <NUM> outputs a second amplitude signal indicating the second amplitude to the amplitude comparing unit <NUM>, and outputs a second phase signal indicating the second phase to the second time differential calculating unit <NUM>.

The load modulation determining unit <NUM> is implemented by a load modulation determining circuit <NUM> shown in <FIG>.

The load modulation determining unit <NUM> includes the second time differential calculating unit <NUM> and a load modulation determination processing unit <NUM>.

Namely, the load modulation determining unit <NUM> calculates a time differential value of a phase difference between the first phase detected by the detecting unit <NUM> and the second phase detected by the detecting unit <NUM>.

The load modulation determining unit <NUM> determines, on the basis of the time differential value of the phase difference, whether or not the output impedance of the combining circuit <NUM> changes along with a change in power of a signal combined by the combining circuit <NUM>.

The load modulation determining unit <NUM> outputs a result of the determination indicating whether or not the output impedance of the combining circuit <NUM> changes, to the power supply voltage control unit <NUM>.

The second time differential calculating unit <NUM> calculates a phase difference between the first phase indicated by the first phase signal outputted from the first amplitude and phase detecting unit <NUM> and the second phase indicated by the second phase signal outputted from the second amplitude and phase detecting unit <NUM>.

The second time differential calculating unit <NUM> calculates a time differential value of the calculated phase difference.

The second time differential calculating unit <NUM> outputs the time differential value of the phase difference to the load modulation determination processing unit <NUM>.

If the time differential value calculated by the second time differential calculating unit <NUM> is <NUM>, then the load modulation determination processing unit <NUM> determines that load modulation does not occur. That is, it is determined that the output impedance of the combining circuit <NUM> does not change.

If the time differential value calculated by the second time differential calculating unit <NUM> is not <NUM>, then the load modulation determination processing unit <NUM> determines that load modulation occurs. That is, it is determined that the output impedance of the combining circuit <NUM> changes.

The load modulation determination processing unit <NUM> outputs a result of the determination indicating whether or not the output impedance of the combining circuit <NUM> changes, to the voltage setting unit <NUM>.

Each of the detection circuit <NUM>, the load modulation determining circuit <NUM>, and the power supply voltage control circuit <NUM> corresponds, for example, to a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC, an FPGA, or a combination thereof.

The components of the power supply modulation device <NUM> are not limited to being implemented by dedicated hardware, and a part of the power supply modulation device <NUM> may be implemented by software, firmware, or a combination of software and firmware.

When a part of the power supply modulation device <NUM> is implemented by software, firmware, or the like, a program for causing a computer to perform a processing procedure performed by each of the detecting unit <NUM>, the load modulation determining unit <NUM>, and the power supply voltage control unit <NUM> is stored in the memory <NUM> shown in <FIG>. Then, the processor <NUM> shown in <FIG> executes the program stored in the memory <NUM>.

<FIG> is a configuration diagram showing the inside of the second time differential calculating unit <NUM>.

The second time differential calculating unit <NUM> includes a subtracting unit 54a and a differential calculation processing unit 54b.

The subtracting unit 54a calculates a phase difference Δθ between a first phase θ<NUM> indicated by a first phase signal outputted from the first amplitude and phase detecting unit <NUM> and a second phase θ<NUM> indicated by a second phase signal outputted from the second amplitude and phase detecting unit <NUM>.

The subtracting unit 54a outputs the phase difference Δθ to the differential calculation processing unit 54b.

The differential calculation processing unit 54b calculates a time differential value Del<NUM> of the phase difference Δθ outputted from the subtracting unit 54a.

The differential calculation processing unit 54b outputs the time differential value Del<NUM> to the load modulation determination processing unit <NUM>.

The power supply modulation-type amplifier shown in <FIG> is the same as the power supply modulation-type amplifier shown in <FIG> except for the detecting unit <NUM> and the load modulation determining unit <NUM>, and thus, here, only operations of the detecting unit <NUM> and the load modulation determining unit <NUM> will be described.

The power supply modulation device <NUM> shown in <FIG> can suppress decrease in efficiency at a time when an out-phasing operation shown in <FIG> is performed.

The first amplitude and phase detecting unit <NUM> obtains a first digital signal provided to the first analog signal input terminal <NUM>.

As with the first amplitude detecting unit <NUM> shown in <FIG>, the first amplitude and phase detecting unit <NUM> detects a first amplitude Magi which is the amplitude of a first analog signal outputted from the first DAC <NUM> to the first amplifier <NUM>, on the basis of the first digital signal.

In addition, the first amplitude and phase detecting unit <NUM> detects a first phase θ<NUM> which is the phase of the first analog signal, on the basis of the first digital signal. A process itself of detecting the first phase θ<NUM> from the first digital signal is a known technique and thus a detailed description thereof is omitted.

The first amplitude and phase detecting unit <NUM> outputs a first amplitude signal indicating the first amplitude Magi to the amplitude comparing unit <NUM>, and outputs a first phase signal indicating the first phase θ<NUM> to the second time differential calculating unit <NUM>.

The second amplitude and phase detecting unit <NUM> obtains a second digital signal provided to the second analog signal input terminal <NUM>.

As with the second amplitude detecting unit <NUM> shown in <FIG>, the second amplitude and phase detecting unit <NUM> detects a second amplitude Mag<NUM> which is the amplitude of a second analog signal outputted from the second DAC <NUM> to the second amplifier <NUM>, on the basis of the second digital signal.

In addition, the second amplitude and phase detecting unit <NUM> detects a second phase θ<NUM> which is the phase of the second analog signal, on the basis of the second digital signal.

The second amplitude and phase detecting unit <NUM> outputs a second amplitude signal indicating the second amplitude Mag<NUM> to the amplitude comparing unit <NUM>, and outputs a second phase signal indicating the second phase θ<NUM> to the second time differential calculating unit <NUM>.

The subtracting unit 54a obtains the first phase signal from the first amplitude and phase detecting unit <NUM> and obtains the second phase signal from the second amplitude and phase detecting unit <NUM>.

As shown in the following equation (<NUM>), the subtracting unit 54a subtracts the first phase θ<NUM> indicated by the first phase signal from the second phase θ<NUM> indicated by the second phase signal, thereby calculating a phase difference Δθ between the phase θ<NUM> and the phase θ<NUM>: <MAT>.

The differential calculation processing unit 54b obtains the phase difference Δθ outputted from the subtracting unit 54a.

The differential calculation processing unit 54b calculates a time differential value Del<NUM> of the phase difference Δθ. A process itself of calculating the time differential value Del<NUM> is a known technique and thus a detailed description thereof is omitted.

If the time differential value Del<NUM> calculated by the second time differential calculating unit <NUM> is <NUM>, then the load modulation determination processing unit <NUM> determines that load modulation does not occur. That is, it is determined that the output impedance of the combining circuit <NUM> does not change.

If the time differential value Del<NUM> calculated by the second time differential calculating unit <NUM> is not <NUM>, then the load modulation determination processing unit <NUM> determines that load modulation occurs. That is, it is determined that the output impedance of the combining circuit <NUM> changes.

<FIG> is an explanatory diagram showing relationships between output power obtained when the power supply modulation-type amplifier shown in <FIG> performs an out-phasing operation, and the amplitude, phase, and the like, of each of a first analog signal and a second analog signal.

Even if the output power of the power supply modulation-type amplifier changes, as shown in <FIG>, the first amplitude Magi and the second amplitude Mag<NUM> are identical.

Even if the output power of the power supply modulation-type amplifier changes, as shown in <FIG>, the ratio Pratio is constant.

Even if the output power of the power supply modulation-type amplifier changes, as shown in <FIG>, the time differential value Deli of the ratio Pratio is <NUM>.

At the time of low power with the output power being lower than the back-off point, as shown in <FIG>, the first phase θ<NUM> and the second phase θ<NUM> are constant.

At the time of high power with the output power being higher than the back-off point, as shown in <FIG>, the first phase θ<NUM> increases and the second phase θ<NUM> decreases.

At the time of low power with the output power being lower than the back-off point, as shown in <FIG>, the phase difference Δθ between the first phase θ<NUM> and the second phase θ<NUM> is constant.

At the time of high power with the output power being higher than the back-off point, as shown in <FIG>, the phase difference Δθ between the first phase θ<NUM> and the second phase θ<NUM> changes.

At the time of low power with the output power being lower than the back-off point, as shown in <FIG>, the time differential value Del<NUM> of the phase difference Δθ is <NUM> and load modulation does not occur.

At the time of high power with the output power being higher than the back-off point, as shown in <FIG>, the time differential value Del<NUM> of the phase difference Δθ is not <NUM> and load modulation occurs.

In the second embodiment described above, the power supply modulation device <NUM> is configured to include the detecting unit <NUM> that detects, from a first digital signal, a first phase which is the phase of a first analog signal, in addition to detecting a first amplitude, and detects, from a second digital signal, a second phase which is the phase of a second analog signal, in addition to detecting a second amplitude; the load modulation determining unit <NUM> that calculates a time differential value of a phase difference between the first phase detected by the detecting unit <NUM> and the second phase detected by the detecting unit <NUM>, and determines, on the basis of the time differential value of the phase difference, whether or not output impedance of the combining circuit <NUM> changes along with a change in power of a signal combined by the combining circuit <NUM>; and the power supply voltage control unit <NUM> that controls a power supply voltage supplied to each of the first amplifier <NUM> and the second amplifier <NUM>, on the basis of a result of the determination by the load modulation determining unit <NUM>. Thus, the power supply modulation device <NUM> can suppress decrease in efficiency even when load modulation does not occur.

In a third embodiment, a power supply modulation device <NUM> will be described in which a load modulation determining unit <NUM> includes both the first time differential calculating unit <NUM> and the second time differential calculating unit <NUM>.

<FIG> is a configuration diagram showing a power supply modulation-type amplifier including the power supply modulation device <NUM> according to the third embodiment. In <FIG>, the same reference signs as those of <FIG> and <FIG> indicate the same or corresponding portions and thus description thereof is omitted.

<FIG> is a hardware configuration diagram showing hardware of the power supply modulation device <NUM> according to the third embodiment. In <FIG>, the same reference signs as those of <FIG> and <FIG> indicate the same or corresponding portions and thus description thereof is omitted.

The load modulation determining unit <NUM> includes the first time differential calculating unit <NUM>, the second time differential calculating unit <NUM>, and a load modulation determination processing unit <NUM>.

Namely, the load modulation determining unit <NUM> determines, from a first amplitude Magi and a second amplitude Mag<NUM> or a first phase θ<NUM> and a second phase θ<NUM>, whether or not output impedance of the combining circuit <NUM> changes with a change in power of a signal combined by the combining circuit <NUM>.

When a frequency f of each of a first analog signal and a second analog signal is a frequency at which the first amplifier <NUM> and the second amplifier <NUM> perform a Doherty operation, if a time differential value Deli calculated by the first time differential calculating unit <NUM> is <NUM>, then the load modulation determination processing unit <NUM> determines that load modulation does not occur. That is, it is determined that the output impedance of the combining circuit <NUM> does not change. The frequency f at which a Doherty operation is performed is in a range between the fundamental frequency f<NUM> and the double frequency 2f<NUM>, inclusive. If the time differential value Deli calculated by the first time differential calculating unit <NUM> is not <NUM>, then the load modulation determination processing unit <NUM> determines that load modulation occurs. That is, it is determined that the output impedance of the combining circuit <NUM> changes.

When the frequency f of each of the first analog signal and the second analog signal is a frequency at which the first amplifier <NUM> and the second amplifier <NUM> perform an out-phasing operation, if a time differential value Del<NUM> calculated by the second time differential calculating unit <NUM> is <NUM>, then the load modulation determination processing unit <NUM> determines that load modulation does not occur. That is, it is determined that the output impedance of the combining circuit <NUM> does not change. The frequency f at which an out-phasing operation is performed is in a range greater than the double frequency 2f<NUM> and less than or equal to the triple frequency 3f<NUM>. If the time differential value Del<NUM> calculated by the second time differential calculating unit <NUM> is not <NUM>, then the load modulation determination processing unit <NUM> determines that load modulation occurs. That is, it is determined that the output impedance of the combining circuit <NUM> changes.

When the power supply modulation device <NUM> shown in <FIG> performs a Doherty operation shown in <FIG>, the load modulation determination processing unit <NUM> determines whether or not load modulation occurs, on the basis of a time differential value Deli calculated by the first time differential calculating unit <NUM>.

When the power supply modulation device <NUM> shown in <FIG> performs an out-phasing operation shown in <FIG>, the load modulation determination processing unit <NUM> determines whether or not load modulation occurs, on the basis of a time differential value Del<NUM> calculated by the second time differential calculating unit <NUM>.

The load modulation determination processing unit <NUM> obtains information indicating a frequency f of each of a first analog signal and a second analog signal from an external source.

If the frequency f is in a range of the fundamental frequency f<NUM> to the double frequency 2f<NUM>, then the load modulation determination processing unit <NUM> obtains a time differential value Deli of a ratio Pratio from the first time differential calculating unit <NUM>.

If the frequency f is in a range of the double frequency 2f<NUM> to the triple frequency 3f<NUM>, then the load modulation determination processing unit <NUM> obtains a time differential value Del<NUM> of a phase difference Δθ from the second time differential calculating unit <NUM>.

In the power supply modulation-type amplifier shown in <FIG>, the load modulation determination processing unit <NUM> obtains information indicating the frequency f from an external source. However, this is merely an example and the load modulation determination processing unit <NUM> may detect a frequency f of the first analog signal or a frequency f of the second analog signal.

When the frequency f is in a range between the fundamental frequency f<NUM> and the double frequency 2f<NUM>, inclusive, if the time differential value Deli calculated by the first time differential calculating unit <NUM> is <NUM>, then the load modulation determination processing unit <NUM> determines that load modulation does not occur. That is, it is determined that the output impedance of the combining circuit <NUM> does not change.

When the frequency f is in a range between the fundamental frequency f<NUM> and the double frequency 2f<NUM>, inclusive, if the time differential value Deli calculated by the first time differential calculating unit <NUM> is not <NUM>, then the load modulation determination processing unit <NUM> determines that load modulation occurs. That is, it is determined that the output impedance of the combining circuit <NUM> changes.

When the frequency f is in a range greater than the double frequency 2f<NUM> and less than or equal to the triple frequency 3f<NUM>, if the time differential value Del<NUM> calculated by the second time differential calculating unit <NUM> is <NUM>, then the load modulation determination processing unit <NUM> determines that load modulation does not occur. That is, it is determined that the output impedance of the combining circuit <NUM> does not change.

When the frequency f is in a range greater than the double frequency 2f<NUM> and less than or equal to the triple frequency 3f<NUM>, if the time differential value Del<NUM> calculated by the second time differential calculating unit <NUM> is not <NUM>, then the load modulation determination processing unit <NUM> determines that load modulation occurs. That is, it is determined that the output impedance of the combining circuit <NUM> changes.

In the third embodiment described above, the power supply modulation device <NUM> is configured to include the load modulation determining unit <NUM> that determines, from a first amplitude and a second amplitude or a first phase and a second phase, whether or not output impedance of the combining circuit <NUM> changes along with a change in power of a signal combined by the combining circuit <NUM>; and the power supply voltage control unit <NUM> that controls a power supply voltage supplied to each of the first amplifier <NUM> and the second amplifier <NUM>, on the basis of a result of the determination by the load modulation determining unit <NUM>. Thus, the power supply modulation device <NUM> can suppress decrease in efficiency even when load modulation does not occur at the time of a Doherty operation, and can suppress decrease in efficiency even when load modulation does not occur at the time of an out-phasing operation.

The present disclosure is suitable for power supply modulation devices, power supply modulation methods, and power supply modulation-type amplifiers.

Claim 1:
A power supply modulation device (<NUM>) comprising:
a detecting unit (<NUM>, <NUM>) to detect a first amplitude from a first digital signal and detect a second amplitude from a second digital signal, the first amplitude being an amplitude of a first analog signal provided to a first amplifier (<NUM>), and the second amplitude being an amplitude of a second analog signal provided to a second amplifier (<NUM>);
a load modulation determining unit (<NUM>) configured to calculate a time differential value of a ratio of the first amplitude detected by the detecting unit to a sum of the first amplitude and the second amplitude detected by the detecting unit, and perform determination of, on a basis of the time differential value of the ratio, whether or not output impedance of a combining circuit (<NUM>) changes along with a change in power of the combined signal obtained by the combining circuit, wherein the combining circuit is configured to obtain a combined signal by combining together the first analog signal amplified by the first amplifier and the second analog signal amplified by the second amplifier, wherein if a time differential value of the ratio is <NUM> the load modulation determining unit determines that the output impedance of the combining circuit does not change and that load modulation does not occur, and if a time differential value of the ratio is not <NUM> the load modulation determining unit determines that the output impedance of the combining circuit changes and that load modulation occurs; and
a power supply voltage control unit (<NUM>) to control a power supply voltage supplied to each of the first amplifier and the second amplifier, on a basis of a result of the determination by the load modulation determining unit;
wherein when the load modulation determining unit (<NUM>) determines that the output impedance changes, the power supply voltage control unit (<NUM>) fixes the power supply voltage supplied to each of the first amplifier (<NUM>) and the second amplifier (<NUM>), and when the load modulation determining unit (<NUM>) determines that the output impedance does not change, the power supply voltage control unit (<NUM>) controls the power supply voltage supplied to each of the first amplifier (<NUM>) and the second amplifier (<NUM>), in accordance with a greater one of the first amplitude and the second amplitude.