Patent Description:
<CIT> discloses a power management system comprising a power management module configured to determine a power draw limit for operating an electronic device by a power source, the power management module configured to control use of power-consuming elements of the electronic device based on a prioritization of the power-consuming elements to limit a power draw by the electronic device from the power source to the power draw limit.

<CIT> discloses a method including: obtaining a first value indicative of an amount of power available to a device from a power source, obtaining a second value indicative of an amount of power consumed by the device, and selecting, based on the first value and second value, one or more power consuming functions of the device in order to manage power consumption of the device.

The accompanying figures, where like reference numerals refer to identical or functionally similar components throughout the separate views, together with the detailed description below, are incorporated in and form part of the specification, and serve to further illustrate embodiments of concepts that include the claimed invention, and explain various principles and advantages of those embodiments.

For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help improve understanding of embodiments of the present disclosure.

The system, apparatus, and method components have been represented where appropriate by conventional symbols in the drawings, showing only those specific details that are pertinent to understanding the embodiments of the present disclosure so as not to obscure the disclosure with details that will be readily apparent to those of ordinary skill in the art having the benefit of the description herein.

Batteries, and/or other power sources, of intrinsically safe devices, such as mobile devices, and the like, may include a safety circuit which is tripped when a current and/or power drawn from the battery and/or power source reaches a threshold value. Such devices include various peripherals which draw current and/or power from a power source thereof. Such peripherals may include, but are not limited to, various transceivers, such as cell phone and/or broadband transceivers (e.g. Long Term Evolution (LTE) transceivers, and the like), narrowband transceivers, WiFi transceivers, and the like. Other peripherals may include a camera, a flash for the camera, which may be used as a flashlight, and the like. A particular peripheral may, for a time period, be a most active and/or prioritized peripheral which may lead to a high draw of current and/or power from the power source for the time period. As such, when another peripheral draws current and/or current from the power source, the total current and/or power drawn from the power source, for example in combination with transient currents, and the like, at the device, may cause power and/or current drawn from the battery and/or power source to reach the threshold value, causing the safety circuit to trip and/or reset. Complicating the situation, safety circuits may react within a very small amount of time, such on the order of <NUM>. Hence, software based solutions alone may be challenging to implement as they may not respond fast enough (e.g. within <NUM>) to prevent tripping of such safety circuits. Alternatively, current drawn from the battery and/or power source may cause a voltage slump at the battery and/or power source. Thus, there exists a need for an improved technical device, system and method for throttling current and/or power to peripherals.

As such, provided herein is a device that throttles current and/or power to peripherals. The device includes a throttling circuit configured to: in response to receiving a given interrupt (described below), cause throttling of respective currents to a given subset of the peripherals, for example when another prioritized peripheral is drawing power and/or current from a power source of the device that may include a safety circuit. In particular, the device further includes a sensing circuit configured to: in response to determining that a sensed current from the power source exceeds a threshold current, provide the given interrupt to the throttling circuit. Both the throttling circuit and the sensing circuit may comprise ultra-fast electronic switching components which typically respond in less than <NUM> (e.g. faster than the safety circuit). As such, when one particular peripheral is a presently prioritized peripheral, power and/or current may be throttled to one or more of the other peripherals via an interrupt provided to the throttling circuit by the sensing circuit to prevent the one or more other peripherals from drawing sufficient power and/or current to trip the safety circuit.

The threshold current may be based on predetermined maximum current of a presently prioritized peripheral (e.g. for example minus a given factor such as <NUM>% and the like). Selection of which peripherals to throttle may be based on an available current overhead, which may be a difference between the threshold current and a given maximum current. The given maximum current may comprise a smaller of a safety-related maximum current that trips the safety circuit of the power source; and a voltage slump-related maximum current that causes a voltage slump at terminals of the power source. The voltage slump-related maximum current may change as inductance at the power source varies over time due to changes in which peripherals, and/or other components of the device, are drawing power at any given time. Hence, the voltage slump-related maximum current may be determined periodically based on sensed current by the sensing circuit. The selection of which peripherals to throttle may occur by selecting peripherals which have predetermined maximum currents which sum to a value that is less than the available current overhead, and the remaining peripherals are selected as a given subset of the peripherals for which current is throttled.

An aspect of the present specification provides a device comprising: peripherals powered by a power source; a throttling circuit configured to: in response to receiving a given interrupt, cause throttling of respective currents to a given subset of the peripherals; a sensing circuit configured to: in response to determining that a sensed current from the power source exceeds a threshold current, provide the given interrupt to the throttling circuit via a hardware data line therebetween; a primary processor configured to: determine the threshold current based at least on a predetermined maximum current of a presently prioritized peripheral; and provide the threshold current to the sensing circuit; and a secondary processor configured to: determine the given subset of the peripherals based on an available current overhead.

Another aspect of the present specification provides a method comprising: determining, at one or more processors of a device, a presently prioritized peripheral of the device; determining, at the one or more processors, a threshold current of the device; providing, via the one or more processors, the threshold current to a sensing circuit of the device, the sensing circuit configured to sense when a sensed current of a power source of the device exceeds the threshold current; determining, at the one or more processors, an available current overhead of the device; determining, at the one or more processors, based on the available current overhead, a given subset of peripherals of the device to current throttle when the sensed current exceeds the threshold current; providing, at the one or more processors, an indication of the given subset of peripherals to a throttling circuit; in response to the sensing circuit sensing that the sensed current of the power source exceeds the threshold current, providing a given interrupt from the sensing circuit to the throttling circuit, via a hardware data line therebetween; and in response to the throttling circuit receiving the given interrupt on the hardware data line, causing throttling, via the throttling circuit, based on the indication of the given subset, throttling of current at the given subset of the peripherals.

Each of the above-mentioned examples will be discussed in more detail below, starting with example system and device architectures of the system in which the embodiments may be practiced, followed by an illustration of processing blocks for achieving an improved technical method, device, and system for throttling current and/or power to peripherals.

Example embodiments are herein described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to example embodiments. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions unless otherwise indicated. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a special purpose and unique machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. The methods and processes set forth herein need not, in some embodiments, be performed in the exact sequence as shown and likewise various blocks may be performed in parallel rather than in sequence. Accordingly, the elements of methods and processes are referred to herein as "blocks" rather than "steps.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instructions which implement the function/act specified in the flowchart and/or block diagram block or blocks.

The computer program instructions may also be loaded onto a computer or other programmable data processing apparatus that may be on or off-premises, or may be accessed via the cloud in any of a software as a service (SaaS), platform as a service (PaaS), or infrastructure as a service (IaaS) architecture so as to cause a series of operational blocks to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide blocks for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. It is contemplated that any part of any aspect or embodiment discussed in this specification can be implemented or combined with any part of any other aspect or embodiment discussed in this specification.

Further advantages and features consistent with this disclosure will be set forth in the following detailed description, with reference to the drawings.

Attention is directed to <FIG>, which depicts a perspective view of an example system <NUM> that includes a device <NUM> for throttling current and/or power to peripherals thereof for example from a power source <NUM>. While as depicted the power source <NUM> and the device <NUM> are separate from one another, the power source <NUM> and the device <NUM> are generally configured to mate such that the power source <NUM> powers the device <NUM>. However, the device <NUM> may be provided and/or sold separate from the power source <NUM>.

As depicted, the device <NUM> may comprise a hazardous location (HAZLOC) mobile device, and the power source <NUM> may comprise a HAZLOC battery, each for use in mines and/or other hazardous locations where sparks and the like may cause explosions and the like. As such, the power source <NUM> may include a safety circuit (described below) which causes voltage and/or power and/or current to be reduced at terminals of the power source <NUM> when a safety-related maximum current, and the like, is reached at the power source <NUM>, for example to prevent sparking, and the like, at the terminals However, in other examples, the device <NUM> and/or the power source <NUM> may be adapted for use in non-hazardous locations, and/or may not include a safety circuit and/or the device <NUM> may not be a mobile device and/or the power source <NUM> may be a power source other than a battery. Furthermore, while as depicted the power source <NUM> is removable from the device <NUM>, in other examples, the power source <NUM> may not be removable from the device <NUM>.

In general, however, the device <NUM> is configured to throttle current and/or power to peripherals thereof, for example to prevent tripping the safety circuit and/or more generally to prevent voltage slumps at terminals of the power source <NUM>. Hereafter, reference will be made to throttling current, though it is understood that such throttling leads to concurrent throttling of power.

Attention is next directed to <FIG> which depicts a schematic block diagram of components of the device <NUM>, including the power source <NUM> provided therein with a safety circuit <NUM> at the power source <NUM>. As mentioned above, the safety circuit <NUM>, which may be optional, may "trip" and/or reset when a given safety-related maximum current occurs at the power source <NUM> leading to at least a temporary reduction in power to the components of the device <NUM>. In some examples, the given safety-related maximum current may be a current that causes a voltage at terminals of the power source <NUM> at which sparking occurs. Such a voltage may be predetermined and stored at a memory of the device <NUM>, described in more detail below.

As will become apparent, in <FIG>, some components are described as being connected via power lines to the power source <NUM> and/or each other, while other components are described as being connected via data lines therebetween and, more specifically, hardware data lines therebetween. Regardless, if a component is not described as having a power line connected thereto, it is nonetheless understood that the power source <NUM> generally powers such components (e.g. regardless of whether a power line is depicted or not depicted).

As depicted, the device <NUM> comprises various peripherals <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>. <NUM>-M (e.g. an "N" number of peripherals of a given type of peripheral, which may be transceivers, as described hereafter, with a total "M" number of peripherals). The peripherals <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>. <NUM>-M are interchangeably referred to hereafter, collectively, as the peripherals <NUM> and, generically, as a peripheral <NUM>. This convention will be used elsewhere in the present specification.

As depicted, the peripherals <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>. <NUM>-N comprise "N" number of transceivers and/or radios and/or modems, which may comprise any include, but is not limited to, any suitable combination of a cell phone transceiver, a digital mobile radio (DMR) transceiver, Project <NUM> (P25) transceiver, a terrestrial trunked radio (TETRA) transceiver, a <NUM>rd Generation Partnership Project (3GPP) transceiver, a Long-Term Evolution (LTE) transceiver, a Global System for Mobile communications (GSM) transceiver, a <NUM> transceiver, a <NUM> transceiver (e.g., a transceiver for use with network architecture compliant with, for example, the 3GPP Technical Specification (TS) <NUM> specification series and/or a new radio (NR) air interface compliant with the 3GPP TS <NUM> specification series) a Bluetooth transceiver, a Wi-Fi transceiver (e.g., operating in accordance with an IEEE <NUM> standard (e.g., <NUM>. 11a, <NUM>. 11b, <NUM>), a Worldwide Interoperability for Microwave Access (WiMAX) transceiver, and/or another similar type of wireless transceiver configurable to communicate via a wireless radio network.

As depicted, a peripheral <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>. <NUM>-N (e.g. transceivers) comprises a respective power amplifier <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>. <NUM>-N (e.g. power amplifiers <NUM> and/or a power amplifier <NUM>, indicated as "P/A" in <FIG>) which amplify power from the power source to power the peripherals <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>. <NUM>-N (e.g. transceivers). Hence, in general, the power source <NUM> powers the power amplifiers <NUM>, as described in more detail below. Furthermore, it is understood that the peripherals <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>. <NUM>-N (e.g. transceivers) may operate in a transmit mode or a receive mode, for example to respectively transmit or receive signals and/or data.

As depicted, the device <NUM> further comprises at least one connectivity subsystem <NUM> which may include other hardware for the transceivers of the peripherals <NUM>-<NUM>. <NUM>-N including, but not limited to, wireless input/output (I/O) interfaces, modulators/demodulators and the like. As depicted, there is a power line from the power source <NUM> to the at least one connectivity subsystem <NUM> which may distribute and/or otherwise control power to the power amplifiers <NUM>, for example via a throttling circuit <NUM>. Put another way, while the transceivers of the peripherals <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>. <NUM>-N and the power amplifiers <NUM> are depicted as separate from at least one connectivity subsystem <NUM>, the transceivers of the peripherals <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>, <NUM>-<NUM>. <NUM>-N may be components of the at least one connectivity subsystem <NUM> which, for example, may control a respective transceiver between a transmit mode or a receive mode, and the like.

Hence, while one connectivity subsystem <NUM> is depicted, the connectivity subsystem <NUM> may include any suitable number of connectivity subsystems <NUM>, for example one connectivity subsystem <NUM> per transceiver type, to control wireless communications at the device <NUM>. In a particular example the device <NUM> may include a transceiver, and associated input devices, used to push-to-talk (PTT) wireless communications. When a PTT input device is actuated (e.g. a PTT button), an associated PTT connectivity subsystem <NUM> may control a respective transceiver into a transmit mode, with an associated power amplifier <NUM> controlled by the associated PTT connectivity subsystem <NUM> to provide sufficient power to transmit in the transmit mode; otherwise, when the PTT input device is unactuated, the associated PTT connectivity subsystem <NUM> may control the respective transceiver into a receive mode, with the associated power amplifier <NUM> controlled by the associated PTT connectivity subsystem <NUM> to provide sufficient power to receive in the receive mode, which may be a different amount of power than in the transmit mode. In yet further examples, the associated PTT connectivity subsystem <NUM> may control the respective transceiver into a standby mode in which wireless metadata is received to schedule PTT transmit and receive time slots, and the like, with the associated power amplifier <NUM> controlled by the associated PTT connectivity subsystem <NUM> to provide sufficient power to receive such wireless metadata in the standby mode.

However, a transceiver and/or an associated power amplifier <NUM> may be controlled in different ways and/or into other modes, which may depend on a type of data being transmitted or received. For example, video data being transmitted or received may use more power than audio data, among other possibilities, with an associated power amplifier <NUM> controlled accordingly.

Hence, to control the power amplifiers <NUM>, the least one connectivity subsystem <NUM> is depicted has including an "N" (e.g. "/N") number of connections to the power amplifiers <NUM>, via a throttling circuit <NUM> described below) over which power to the power amplifiers <NUM> may be provided. In some examples, power provided to the power amplifiers <NUM> may depend on a mode in which a respective transceiver is to be used.

As depicted, other peripherals <NUM> (e.g. the peripherals labelled as "<NUM>-M" and which will hence be referred to hereafter as the peripherals <NUM>-M) may comprise peripherals other than transceivers for example, as depicted, a camera, a camera flash, a flashlight among other possibilities. Hence, the device <NUM> is understood to include any suitable number of peripherals <NUM> of any suitable types; in particular, a peripheral <NUM> may be understood to include any type of device and/or auxiliary device that may be provided at the device <NUM> to provide and/or expand functionality thereof. While the other peripherals <NUM>-M are depicted without power amplifiers <NUM>, such peripherals <NUM>-M may include power amplifiers.

Furthermore, while connectivity (e.g. communication functionality) of the device <NUM> is described with respect to wireless communications, in some examples, the device <NUM> may include functionality for wired communication and/or may include only components for wired communication and/or may not be configured for communication. In these last examples, the device <NUM> may include the peripherals <NUM>-M, and not the peripherals <NUM>-<NUM>.

As depicted, the device <NUM> further comprises the throttling circuit <NUM> configured to: in response to receiving a given interrupt (described below), cause throttling of respective currents to a given subset of the peripherals <NUM>. For example, as depicted, there are respective hardware connections between the throttling circuit <NUM> and the peripherals <NUM> which may be used to turn off respective power, from the at least one connectivity subsystem <NUM>, to the peripherals <NUM> based on interrupts.

In particular, the throttling circuit <NUM> may comprise switches, such as ultra-fast switches, and the like, which may switch a respective hardware power connection, between the at least one connectivity subsystem <NUM> and a respective power amplifier <NUM>, on or off, to throttle current usage, and the like, at a respective power amplifier <NUM>. Put another way, the throttling circuit <NUM> may comprises respective hardware switches to cause throttling of the respective currents to the given subset of the peripherals <NUM> as described below (e.g. a hardware switch per data line to the peripherals <NUM>) and such hardware switches may comprise ultra-fast switches, and the like.

However, the throttling circuit <NUM> may further comprise switches (e.g. ultra-fast switches) to turn power to the other types of peripheral <NUM>-M on or off and/or otherwise cause throttling of respective currents to the other types of peripherals <NUM>-M.

While present examples are described with respect to power to a peripheral <NUM> being turned on or off, to throttle current used by a peripheral, in other examples the hardware switches of the throttling circuit <NUM> may limit power and/or current to a peripheral <NUM> to a non-zero, but non-maximum value. For example, the hardware switches of the throttling circuit <NUM> may reduce power and/or current to a peripheral <NUM> by <NUM>%, <NUM>%, <NUM>%, among other possibilities. In yet further examples, the throttling circuit <NUM> may be configured to throttle current to a peripheral <NUM> may transmitting a data command to a peripheral <NUM> to cause the peripheral <NUM> to throttle current thereto; in these examples the connections between the connectivity subsystem and the throttling circuit <NUM>, as well as the connections between the throttling circuit <NUM> and the peripherals, may comprise data lines, with power being provided to the peripherals <NUM> via other power connections to the power source <NUM>.

In the depicted example, at least a portion of the peripherals <NUM> (e.g. four peripherals <NUM>) comprise transceivers, with the at least one connectivity subsystem <NUM> including hardware for the transceivers (e.g. and which may include the power amplifiers <NUM>). In these examples, the throttling circuit <NUM> be configured to cause throttling of respective currents to a given subset of the peripherals <NUM> by causing throttling the respective currents to the power amplifiers <NUM>.

The interrupts used to control the throttling circuit <NUM>, along with which peripherals <NUM> to throttle, are described below, however, different interrupts may be provided to the throttling circuit <NUM> to cause the throttling circuit <NUM> to throttle different subset of the peripherals <NUM> which may depend, for example, on a mode in which a peripheral <NUM> is currently being used (e.g. a transmit mode or a receive mode). Such different interrupts are also described below.

As depicted, the device <NUM> further comprises a sensing circuit <NUM> configured to: in response to determining that a sensed current from the power source <NUM> exceeds a threshold current, provide a given interrupt to the throttling circuit <NUM>, for example via the depicted hardware data line <NUM> therebetween, which may be dedicated to the sensing circuit <NUM> transmitting interrupts to the throttling circuit <NUM>. As such, the sensing circuit <NUM> may comprise any suitable comparator circuit, and/or comparator circuits, for comparing sensed current to a threshold current.

As depicted, the sensing circuit <NUM> is tapped into a power line from the power source <NUM>, and the sensing circuit <NUM> is understood to include any suitable combination of hardware components for sensing current on the power line from the power source <NUM>. In particular, the sensing circuit <NUM> may be connected "close" to the terminals of the power source <NUM> and be configured to sense current from the power source <NUM> and/or changes to current being drawn from the power source (e.g. by the peripherals <NUM>) as quickly as possible.

In general, the circuits <NUM>, <NUM> may include ultra-fast electronic switching components that may provide functionality as described herein within <NUM>, and the like. Such ultra-fast electronic switching components may include commercial off-the-shelf components, but assembled in a manner that provides the functionality as described herein. Such ultra-fast electronic switching components may, for example include, but is not limited to, pico-switches, silicon carbide (SiC) MOSFETs (e.g. metal oxide silicon field effect transistors and/or metal oxide semiconductor field effect transistors); however, any suitable ultra-fast electronic switching components are within the scope of the present specification.

As depicted, the device <NUM> further comprises a first processor <NUM> (interchangeably referred to hereafter as a primary processor <NUM>) and a second processor <NUM> (interchangeably referred to hereafter as a secondary processor <NUM>).

In general, the processors <NUM>, <NUM> may include one or more logic circuits, one or more processors, one or more microprocessors, and/or the processors <NUM>, <NUM> may include one or more ASIC (application-specific integrated circuits) and one or more FPGA (field-programmable gate arrays), and/or another electronic device which provide the functionality described herein. While the device <NUM> is described with respect to two processors <NUM>, <NUM>, in other examples, the processors <NUM>, <NUM> may be replaced with one (e.g. primary) processor and/or more than two processors.

In particular, the primary processor <NUM> may comprise a processor for the device <NUM> which implements general functionality therefor, such as an operating system, and the like, as well as the functionality described herein, as well as operating the peripherals <NUM>-M that are not transceivers.

In contrast, the secondary processor <NUM> may comprise a processor that implements general functionality associated with the at least one connectivity subsystem <NUM> and the peripherals <NUM>-N that are transceivers and/or which may be at least partially dedicated to implementing functionality on behalf of the least one connectivity subsystem <NUM>, as well as the functionality described herein. However, input for operating the transceivers may be received via the primary processor <NUM> (e.g. via input devices <NUM> described below) and the processors <NUM>, <NUM> may hence communicate to implement connectivity functionality of the device <NUM> with the secondary processor <NUM> performing connectivity processing functionality on behalf of the primary processor <NUM>; hence, the second processor <NUM> may be "secondary" to the first processor <NUM>.

As depicted, the processors <NUM>, <NUM> are in communication with the sensing circuit <NUM> for example on the hardware data line <NUM> between the circuits <NUM>, <NUM> which may be dedicated to the sensing circuit <NUM> transmitting interrupts to the throttling circuits. As such, when the sensing circuit <NUM> transmits an interrupt to the throttling circuit <NUM>, the processors <NUM>, <NUM> may also receive such an interrupt, for example to be notified that the throttling circuit <NUM> is causing (and/or is about to cause) throttling of respective currents to a given subset of the peripherals <NUM>.

However, as depicted, the primary processor <NUM> is in communication with the sensing circuit <NUM> and the secondary processor <NUM> via respective data lines (e.g. depicted as double-ended arrows therebetween), which may comprise data lines of a common data and address bus, and the like, of the device <NUM>. Such a common data and address bus may be used to exchange data between components of the device <NUM>. The hardware data line <NUM> may be separate from a common data and address bus of the device <NUM>.

Furthermore, as depicted, there are data lines (e.g. also depicted as double-ended arrows therebetween) between the secondary processor <NUM> and the at least one connectivity subsystem <NUM>, and the secondary processor <NUM> and the throttling circuit <NUM>, which may also comprise data lines of the common data and address bus, and the like, of the device <NUM>.

The primary processor <NUM> may be generally configured to determine a threshold current (e.g. at which the sensing circuit <NUM> provides a given interrupt) based at least on a predetermined maximum current of a presently prioritized peripheral <NUM>; and provide the threshold current to the sensing circuit <NUM> (e.g. on a data line therebetween). A presently prioritized peripheral <NUM> and a predetermined maximum current is described in more detail below however, in general, the threshold current may comprise one or more of: the predetermined maximum current of the presently prioritized peripheral <NUM>; and the predetermined maximum current of the presently prioritized peripheral adjusted by a given amount; for example, the predetermined maximum current of the presently prioritized peripheral <NUM> may be reduced by <NUM>%, <NUM>%, <NUM>%, among other possibilities.

The secondary processor <NUM> is generally configured to determine the given subset of the peripherals <NUM> (e.g. for which respective currents are caused to throttle by the throttling circuit <NUM>) based on an available current overhead which is determined by the primary processor <NUM> and provided to the secondary processor <NUM> on a data line therebetween.

As will be described in more detail below, a given maximum current of the power source <NUM> may be determined by the primary processor <NUM>, and the given maximum current may comprise: a smaller of a safety-related maximum current that trips the safety circuit <NUM>; and a voltage slump-related maximum current that causes a voltage slump at terminals of the power source <NUM>.

As will be further described below, the available current overhead may comprises a difference between the threshold current and the given maximum current, and the secondary processor <NUM> may be further configured to determine the given subset of the peripherals <NUM> (e.g. for which throttling of current is to occur by the throttling circuit <NUM>) based on the available current overhead and respective predetermined maximum currents used by the peripherals, other than the presently prioritized peripheral. Furthermore, the secondary processor <NUM> may provide an indication, and the like, of the given subset of the peripherals <NUM>, to which current is to be throttled, to the throttling circuit <NUM>, which responds accordingly when an interrupt is received from the sensing circuit <NUM>.

As depicted, the device <NUM> further comprises a memory <NUM> which stores a lookup table <NUM>, and the like, storing respective maximum currents of the peripherals <NUM>. For example, as depicted a first peripheral (e.g. "Periph1" such as the peripheral <NUM>-<NUM>) may have a maximum current of <NUM> Amps, a second peripheral (e.g. "Periph2" such as the peripheral <NUM>-<NUM>) may have a maximum current of <NUM> A, etc. As depicted, the lookup table stores a respective maximum current for each peripheral <NUM> for which the throttling circuit <NUM> may cause throttling of current thereto. Such maximum currents may be provisioned at the memory <NUM> at a factory and the like. Furthermore, such maximum currents may be stored in any suitable format other than a lookup table. Hence, generally, the device <NUM> is understood to comprise the memory <NUM> storing respective predetermined maximum currents used by the peripherals <NUM>, including a predetermined maximum current of a presently prioritized peripheral <NUM>. In other words, one of the peripherals <NUM>, for which the memory <NUM> stores predetermined maximum currents, may be selected as a presently prioritized peripheral <NUM>, described in more detail below. In particular, the predetermined maximum currents stored at the memory <NUM> may comprise maximum root mean square (RMS) currents of the peripherals <NUM>, but may comprise the predetermined maximum currents in any suitable format.

As depicted, the memory <NUM> further stores parameters associated with the device <NUM> and/or the power source <NUM> which may be measured at the device <NUM> (e.g. via the sensing circuit <NUM>) and/or read from the power source <NUM> (e.g. by the processor <NUM>, and the like, presuming there is a data line between the processor <NUM> and the power source <NUM>) and/or provisioned at the memory <NUM> (e.g. at a factory, and the like). Such parameters may include, but are not limited to: an estimated resistance <NUM> (e.g. a measured inductance) of the power source <NUM>, which is measured periodically, as described below: a shutdown threshold voltage <NUM>, which may be provisioned at the memory <NUM>; a maximum voltage <NUM> that may be read from the power source <NUM> (e.g. from a memory thereof, not depicted); and a maximum current <NUM> of the power source <NUM>, which may also be read from the power source <NUM>. The maximum current <NUM> may comprise a safety-related maximum current at which the safety circuit <NUM> trips, and the like.

In general, the estimated resistance <NUM> may be determined by the primary processor <NUM> controlling the device <NUM> into an idle mode in which current from drawn from the power source <NUM> is primarily transient currents, which is measured by the sensing circuit <NUM> (e.g. the sensing circuit <NUM> may measure RMS currents at the terminals of the power source <NUM>). Using Kirchoff's Law (e.g. V=IR, where "V" is voltage, "I" is current" and "R" is resistance) the resistance <NUM> may be estimated from the known power source maximum voltage <NUM> and the measured current. In general, the estimated resistance <NUM> represents a resistance and/or inductance estimated at the terminals of the power source <NUM> due to active peripherals <NUM> and/or other components, connected to the power source <NUM> at any given time though, in the idle mode, such active peripherals <NUM> may be controlled into a state where minimum power is drawn from the power source <NUM>. As will be explained in more detail below, once the resistance <NUM> is estimated (e.g. which may change over time), a voltage slump-related maximum current may be estimated using the shutdown threshold voltage <NUM> and Kirchoff's Law. In particular, the shutdown threshold voltage <NUM> may be a value that has been predetermined and stored at the memory <NUM> at a factory and/or in a provisioning mode of the device <NUM>.

Furthermore, the estimated resistance <NUM> may be determined periodically, for example every few minutes, and the like, and/or during periods of minimal activity at the device <NUM> and/or at the peripherals <NUM> (e.g. when the transceivers of the peripherals <NUM> are "connected" to a respective network, but not transmitting or receiving data other than metadata, which may also be the conditions into which such transceivers are controlled in an idle mode).

Alternatively, or in addition, the sensing circuit <NUM> may be configured to measure one or more of resistance and voltage at the terminals of the power source <NUM> in addition to, or alternatively to, current, with associated currents (e.g. such as a voltage slump-related maximum current) determined from measured resistance and voltage using Kirchoff's Law.

Regardless, it is hence understood that the sensing circuit <NUM> may include an analog-to-digital converter (ADC) configured to convert measured currents (e.g. and/or resistance and/or voltage) to digital indications of same, which may be provided to the primary processor <NUM> via a data line to implement functionality as described herein. The sensing circuit <NUM> may include a digital-to-analog converter (DAC) configured to convert received digital values (e.g. such as a threshold current received from the primary processor <NUM> via a data line) to analog indications of same, which may be used by comparators of the sensing circuit <NUM> to determine when a sensed current exceeds the received threshold current.

As depicted, the memory <NUM> is understood to include any suitable non-transitory machine readable medium that stores machine readable instructions to implement one or more programs or applications such as the applications <NUM>, <NUM>. Example machine readable media include a non-volatile storage unit (e.g., Erasable Electronic Programmable Read Only Memory ("EEPROM"), Flash Memory) and/or a volatile storage unit (e.g., random-access memory ("RAM")). In the example of <FIG>, programming instructions (e.g., machine readable instructions) that implement the functional teachings of the device <NUM> as described herein are maintained, persistently, at the memory <NUM> and used by the processors <NUM>, <NUM>, which make appropriate utilization of volatile storage during the execution of such programming instructions.

For example, the memory <NUM> may further store a first application <NUM> which may comprise instructions which, when implemented by the primary processor <NUM>, causes the primary processor <NUM> to: determine the threshold current based at least on a predetermined maximum current of a presently prioritized peripheral <NUM>; and provide the threshold current to the sensing circuit <NUM>, described in more detail herein.

Similarly, as depicted, the memory <NUM> may further store a second application <NUM> which may comprise instructions which, when implemented by the secondary processor <NUM>, causes the secondary processor <NUM> to: determine the given subset of the peripherals <NUM> based on an available current overhead, described in more detail herein.

In some examples, the memory <NUM> further stores rules <NUM> which may be used by the secondary processor <NUM>, in conjunction with the second application <NUM>, to determine the given subset of the peripherals <NUM>. In particular, the rules <NUM> may be user-configured and/or preconfigured, and indicate which peripherals <NUM> are to be preferentially current throttled when another peripheral <NUM> is a presently prioritized peripheral <NUM>. However, the rules <NUM> may further indicate which of the peripherals <NUM> may be selected as a presently prioritized peripheral <NUM>, for example when more than one of the peripherals <NUM> is presently active, and the like.

The term "presently prioritized peripheral" as used herein may include a peripheral <NUM> that is presently most active, such as a transceiver transmitting or receiving the most data and/or using the most power, which may be determined by the secondary processor <NUM> monitoring activity at the at least one connectivity subsystem <NUM>. However, a peripheral <NUM> that is presently most active may include any of the peripherals <NUM> that are currently being operated to perform an associated function and/or using the most power.

However, term "presently prioritized peripheral" as used herein may additionally, and/or alternatively, include a peripheral <NUM> selected on the basis of other conditions which may include, but is not limited to input from one or more input devices <NUM> at the device <NUM>. For example, such input devices <NUM> may include, but are not limited to the aforementioned PTT button and/or any other combination of touch screens, buttons (e.g. which may be physical or electronic as provided at a touch screen), knobs, and the like. User input from such input devices <NUM> may be used to select a given peripheral <NUM> to perform an associated function at the device <NUM>; such a given peripheral <NUM> may hence be selected as the presently prioritized peripheral <NUM>.

However, in some examples, a selected peripheral <NUM> (e.g. as selected via user input) may consume less power and/or be less presently active than another peripheral; in such examples, the rules <NUM> may be used to resolve such conflicts as to which peripheral <NUM> to select as a presently prioritized peripheral <NUM>. For example, a camera being currently operated may use less power and/or be less active than a transceiver, as a transceiver may "constantly" be transmitting or receiving metadata while the camera may only receive input intermittently; however, in this example, as the camera is presently being used (e.g. an associated application thereof is being processed by the primary processor <NUM>), and as the transceiver is only transmitting or receiving metadata, the camera may be selected as the presently prioritized peripheral <NUM>. In other examples, an LTE and/or <NUM> transceiver may be presently being used to transmit or receive video while a WiFi transceiver is operational but being used to browse via an associated browser application processed by the primary processor <NUM>; in such examples, the peripheral <NUM> that includes the LTE and/or <NUM> transceiver may be selected as the presently prioritized peripheral <NUM> by virtue of transmitting or receiving video. However, the rules <NUM> may be configured in any particular manner to select the presently prioritized peripheral <NUM>, and which may be user configured and/or provisioned at the memory <NUM>, for example at a factory and/or installed by an entity managing the device <NUM>.

In some examples, the primary processor <NUM> may determine which of the peripherals <NUM> is presently prioritized, at least based on activity of the at least one connectivity subsystem <NUM>, determined by the processors <NUM>, <NUM> communicating, and the like. Put another way, the at least one connectivity subsystem <NUM> may be in communication with the secondary processor <NUM> and the primary processor <NUM> via one or more data lines (e.g. as depicted the primary processor <NUM> may be in communication with at least one connectivity subsystem <NUM> via the secondary processor <NUM>), and the primary processor <NUM> may be further configured to determine which of the peripherals <NUM> is the presently prioritized peripheral <NUM> by communicating with the at least one connectivity subsystem <NUM> over one or more of the data lines and the secondary processor <NUM>. Indeed, the primary processor <NUM> may receive any suitable data from the secondary processor <NUM> and/or the at least one communication subsystem <NUM> to determine activity, and the like, at the transceivers of the peripherals <NUM>-N, and may further monitor activity of the other peripherals <NUM>-M and select a presently prioritized peripheral <NUM> accordingly.

Hence, the primary processor <NUM> is understood to determine a presently prioritized peripheral <NUM> and further determine a predetermined maximum current of the presently prioritized peripheral <NUM> by retrieving the predetermined maximum current of the presently prioritized peripheral <NUM> from the lookup table <NUM>, and the like. For example, the primary processor <NUM> may determine that the transceiver of the peripheral <NUM>-<NUM> is the presently prioritized peripheral <NUM> and retrieve the value "<NUM> A" from the lookup table <NUM>.

The primary processor <NUM> is generally configured to determine a threshold current using, for example, the predetermined maximum current of the presently prioritized peripheral <NUM> as retrieved from the memory <NUM>. In some examples, the threshold current may be set to the predetermined maximum current of the presently prioritized peripheral <NUM>. In other examples, the threshold current may be set to the predetermined maximum current of the presently prioritized peripheral adjusted by a given amount, such as reduced by <NUM>%, <NUM>%, <NUM>% among other possibilities. In general, the threshold current is selected as a value of current at which throttling of current is to occur for a given subset of the peripherals <NUM> to prevent the peripherals <NUM> from drawing a current that might exceed a given maximum current (e.g. in the event that the given subset of the peripherals <NUM> draw their respective maximum currents). In some examples, the threshold current may comprise the predetermined maximum current of the presently prioritized peripheral <NUM> (e.g. adjusted or not adjusted) with predetermined transient currents of the device <NUM> added thereto (e.g. transient currents of the device <NUM> measured in an idle mode); hence the threshold current may comprise the predetermined maximum current of the presently prioritized peripheral 204adjusted based on such transient currents.

Furthermore, the threshold current may be determined periodically by the primary processor <NUM> and/or for example as a presently prioritized peripheral <NUM> changes (e.g. as different peripherals <NUM> become more active or less active relative to other peripherals <NUM>). As the threshold current changes, the primary processor <NUM> may provide the threshold current to the sensing circuit <NUM>.

In some examples, the given maximum current may comprise the maximum current <NUM> of the power source <NUM> retrieved from the memory <NUM>.

Alternatively, the given maximum current may comprise a voltage slump-related maximum current that causes a voltage slump at terminals of the power source. For example, the primary processor <NUM> may use the periodically determined estimated resistance <NUM>, the predetermined shutdown threshold voltage <NUM> and Kirchoff's law, to determine such a voltage slump-related maximum current which may be less than the maximum current <NUM> of the power source <NUM>. In particular, the shutdown threshold voltage <NUM> may represent a given slump voltage of the power source <NUM> (e.g. a voltage to which the power source <NUM> may slump without generally adversely affecting the operation of the device <NUM>, though it is generally preferred to operate the device <NUM> without a voltage slump) below which the device <NUM> may shut down. Furthermore, in some examples, the sensing circuit <NUM> may be correspondingly configured to determine when voltage of the power source <NUM> reaches such a shutdown threshold voltage <NUM>.

In particular, when a plurality of peripherals <NUM> of the device <NUM> are drawing current simultaneously, there is a possibility that all such operational peripherals <NUM> may draw their respective maximum currents simultaneously, which may cause current output by the power source <NUM> to reach the maximum current <NUM>, causing the safety circuit <NUM> to trip and/or which may cause current output by the power source <NUM> to reach the shutdown threshold voltage <NUM>.

In general, the primary processor <NUM> may select, as the given maximum current, the smaller of the safety-related maximum current <NUM> that trips the safety circuit <NUM> and the voltage slump-related maximum current that causes a voltage slump at terminals of the power source <NUM> (e.g. as determined periodically using the periodically determined estimated resistance <NUM> and the preconfigured shutdown threshold voltage <NUM>). Put another way, both of the safety-related maximum current <NUM> and the voltage slump-related maximum current may cause brownouts, and the like, at the device <NUM> and the primary processor <NUM> determines a threshold current from the smaller of the two currents selected as the given maximum current, which is used to prevent the peripherals <NUM> from drawing the safety-related maximum current <NUM> that trips the safety circuit <NUM> and/or the voltage slump-related maximum current from the power source <NUM>, as described hereafter.

However, in some examples, the given maximum current may comprise the selected safety-related maximum current <NUM> or the voltage slump-related maximum current reduced, for example by <NUM>% or <NUM>% or another factor, for example to prevent the peripherals <NUM> from drawing the safety-related maximum current <NUM>, reduced by such a factor, and/or the voltage slump-related maximum current from the power source <NUM>, reduced by such a factor. However, such a reduction may be optional.

Hence, in general, the primary processor <NUM> may further determine the available current overhead in the device <NUM>, which may be determined periodically and/or as the threshold current changes and/or as a presently prioritized peripheral <NUM> changes.

For example, the primary processor <NUM> may periodically determine the threshold current and correspondingly determine the given maximum current as described above. However, such determination may also be decoupled, as, for example, the estimated resistance <NUM> may change at a slower rate than does activity of the peripherals <NUM>.

In particular, while a presently prioritized peripheral <NUM> may not be drawing the predetermined maximum current, there is a possibility that the presently prioritized peripheral <NUM> may draw the predetermined maximum current, and a value of the threshold current reflects this situation, while the given maximum current represents either the power source maximum current <NUM> (e.g. which may not change) or a voltage slump-related maximum current which may change slowly compared to activity of the peripherals <NUM>.

Regardless, the available current overhead in the device <NUM> may comprise a value of the given maximum current minus the value for the threshold current. In other words, the available current overhead represents an amount of additional current that may be available to operate other peripherals <NUM> without exceeding the given maximum current, assuming that the presently prioritized peripheral <NUM> may draw its predetermined maximum current.

As such, a given subset of the peripherals <NUM> is selected, by the secondary processor <NUM>, the given subset of the peripherals <NUM> comprising a subset of the peripherals <NUM> that, when operated at their respective maximum currents, might cause the current drawn from the power source <NUM> to exceed the given maximum current. For example, a sum of their respective maximum currents may exceed the available current overhead. Alternatively, the given subset of the peripherals <NUM> may be selected by first selecting another subset of the peripherals <NUM> that, when operated at their respective maximum currents, will not cause the current drawn from the power source <NUM> to exceed the given maximum current; the remaining peripherals <NUM> may comprise the given subset of the peripherals <NUM>.

As such, current to the given subset of the peripherals <NUM> is throttled via the throttling circuit <NUM> when the sensed current measured by the sensing circuit <NUM> reaches the threshold current and the sensing circuit <NUM> provides an interrupt to the throttling circuit <NUM>. Such throttling of current to the given subset of the peripherals <NUM> may ensure that the given subset of the peripherals <NUM> do not draw current and/or their respective maximum currents. In some of these examples, throttling of current of the given subset of the peripherals <NUM> may comprising turning off the given subset of the peripherals <NUM> and/or turning off associated power amplifiers <NUM>. In other examples, throttling of current of the given subset of the peripherals <NUM> may comprise controlling the given subset of the peripherals <NUM>, and/or associated power amplifiers <NUM>, to reduce current usage and/or draw a minimum current. Regardless, the remaining peripherals <NUM> (e.g. other than given subset of the peripherals <NUM> and the presently prioritized peripheral <NUM>) may be allowed to operate "normally" and/or not have current throttled thereto, as a sum of their respective maximum currents is within, and/or is less than, the available current overhead.

In some examples, the secondary processor <NUM> may determine the given subset of the peripherals <NUM> for which current is to be throttled by determining combinations of the peripherals <NUM> which, when their respective maximum currents are added together, exceed the available current overhead. Alternatively, such combinations of the peripherals <NUM> may have been predetermined and stored at the rules <NUM>. Regardless, the secondary processor <NUM> may provide an indication of the given subset of the peripherals <NUM> for which current is to be throttled, to the throttling circuit <NUM>.

When an interrupt is received from the sensing circuit <NUM>, for example when a sensed current exceeds the threshold current, the throttling circuit <NUM> may cause throttling of current to the given subset of the peripherals <NUM> accordingly.

Put another way, the available current overhead may comprise a difference between the given maximum current and the threshold current. Furthermore, the secondary processor <NUM> may be further configured to determine the given subset of the peripherals <NUM> to throttle based on the available current overhead and respective predetermined maximum currents used by the peripherals, other than the presently prioritized peripheral <NUM>.

Furthermore, the sensing circuit <NUM> may be configured to transmit different types of interrupts, and/or the given subset of the peripherals <NUM>, for which current may be throttled, may depend on a mode of the presently prioritized peripheral <NUM>. For example, when the presently prioritized peripheral <NUM> comprises a transceiver, a given interrupt provided the sensing circuit <NUM> may be one of a first given interrupt associated with the transceiver in a transmit mode or a second given interrupt associated with the transceiver in a receive mode; in these examples, the given subset of the peripherals <NUM> for which throttling of current may occur may be dependent on whether the given interrupt is the first given interrupt or the second given interrupt.

For example, while as depicted the memory <NUM> stores one respective maximum current for each of the peripherals <NUM>, in other examples the memory <NUM> may store two maximum currents for each of the peripherals <NUM> which are transceivers: a transmit maximum current for a transmit mode and a receive maximum current for a receive mode. In other words, a maximum current for a transceiver may differ depending on an operational mode thereof.

However, in other examples, a transceiver may have one maximum current but the given set of peripherals <NUM> for which throttling of current may occur may depend on whether a transceiver of the presently prioritized peripheral <NUM> is in a transmit mode or a receive mode. For example, when a transceiver of the presently prioritized peripheral <NUM> is in a transmit mode one set of the peripherals <NUM> may be selected as the given set of peripherals <NUM> for which throttling of current may occur, while, when a transceiver of the presently prioritized peripheral <NUM> is in a receive mode, another set of the peripherals <NUM> may be selected as the given set of peripherals <NUM> for which throttling of current may occur. For example, when the presently prioritized peripheral <NUM> is an LTE receiver in a transmit mode, the given set of peripherals <NUM> may exclude a WiFi transceiver, but when the presently prioritized peripheral <NUM> is the LTE receiver in a receive mode, the given set of peripherals <NUM> may include the WiFi transceiver, among other possibilities. Such conditions may be provided in the rules <NUM>.

Hence, in some examples, the primary processor <NUM> may be further configured to indicate to the sensing circuit <NUM> to provide the first given interrupt or the second given interrupt to the throttling circuit <NUM> in response to determining that the sensed current from the power source <NUM> exceeds the threshold current. For example, when the primary processor <NUM> selects the presently prioritized peripheral <NUM> and determines the threshold current, the primary processor <NUM> may provide an indication of the threshold current to the sensing circuit <NUM> along with an indication of a type of interrupt to provide to the throttling circuit <NUM> depending on a mode of the presently prioritized peripheral <NUM>. Furthermore, when the mode of the presently prioritized peripheral <NUM> changes, the primary processor <NUM> may again indicate to the sensing circuit <NUM> a type of associated interrupt to provide to the throttling circuit <NUM>.

Put another way, the primary processor <NUM> may be further configured to indicate to the sensing circuit <NUM> to provide the first given interrupt or the second given interrupt to the throttling circuit <NUM> in response to determining that the sensed current from the power source <NUM> exceeds the threshold current.

Furthermore, the secondary processor <NUM> may provide two indications of given subsets of the peripherals <NUM> which may be throttled to the throttling circuit <NUM>, and/or one for each type of interrupt. Continuing with the example above, when the presently prioritized peripheral <NUM> comprises a transceiver a first given set of peripherals <NUM>, for which throttling of current may occur, may be selected for the transmit mode, and a second given set of peripherals <NUM>, for which throttling of current may occur, may be selected for the receive mode. The two given sets of peripherals <NUM> may include different or similar peripherals <NUM>. Indications of both given sets of the peripherals <NUM> may be provided to the throttling circuit <NUM> which may cause throttling to one of the two given sets of peripherals <NUM> depending on a type of interrupt received from the sensing circuit <NUM>.

It is understood that the device <NUM> may include any other suitable components including, but not limited to, a display screen, a location positioning device (e.g. a Global Positioning System device) and the like.

Operation of the device <NUM> is next described with respect to <FIG>, <FIG>, <FIG>, <FIG> and <FIG>, which are substantially similar to <FIG>, with like components having like numbers.

Attention is first directed to <FIG> which depicts the primary processor <NUM> determining that the peripheral <NUM>-<NUM> is a presently prioritized peripheral <NUM>-<NUM>, as describe above; for example, the transceiver of the presently prioritized peripheral <NUM>-<NUM> may be transmitting or receiving video and the other peripherals <NUM> may not be in use (e.g. other than the other transceivers transmitting or receiving metadata). As such, the primary processor <NUM>, determines that a predetermined maximum current of the presently prioritized peripheral <NUM>-<NUM> is <NUM> A, as retrieved from the lookup table <NUM> (e.g. the maximum current of "Periph1").

Attention is next directed to <FIG> which depicts the primary processor <NUM> determining a voltage slump-related maximum current (e.g. a "Slump Current") of <NUM>. 9A, as described above, and furthermore determining a safety-related maximum current ("P/S Max Current") of <NUM> A retrieved from the memory <NUM> (e.g. the power source maximum current <NUM>). As such, the primary processor <NUM> selects the smaller of the voltage slump-related maximum current and the safety-related maximum current as a given maximum current <NUM> (e.g. <NUM> A of the slump-related maximum current is selected).

Attention is next directed to <FIG> which depicts the primary processor <NUM> determining a threshold current <NUM> of <NUM> A by adding a predetermined transient current (e.g. of <NUM> A) to the predetermined maximum current of <NUM> A of the presently prioritized peripheral <NUM>-<NUM>. The primary processor <NUM> further determines an available current overhead <NUM> of <NUM>. 7A by subtracting the threshold current <NUM> from the given maximum current <NUM> (e.g. <NUM>.

The primary processor <NUM> provides the threshold current <NUM> to the sensing circuit <NUM> and further provides the available current overhead <NUM> to the secondary processor <NUM>.

As also depicted in <FIG>, the secondary processor <NUM> determines a given subset <NUM> of the peripherals <NUM> for which throttling of current may occur by comparing the available current overhead <NUM> with sums of maximum currents of the peripherals <NUM>, such maximum currents retrieved being from the lookup table <NUM>. For example, as depicted, the secondary processor <NUM> determines that a sum of maximum currents of the peripherals <NUM>-<NUM>, <NUM>-<NUM> is greater than the available current overhead <NUM>. As depicted, the maximum currents <NUM> A and <NUM> A of the peripherals <NUM>-<NUM>, <NUM>-<NUM> sum to <NUM> A which is greater than the <NUM> A of the available current overhead <NUM>. The maximum currents <NUM> A and <NUM> A of the remaining peripherals <NUM>-<NUM> and <NUM>-M sum to <NUM>. 6A which is less than the <NUM> A of the available current overhead <NUM>.

As such, the secondary processor <NUM> selects the peripherals <NUM>-<NUM>, <NUM>-<NUM> as the given subset <NUM> of the peripherals <NUM> for which throttling of current may occur and provides an indication <NUM> of the given subset <NUM> (e.g. as depicted, "<NUM>" and "<NUM>" respectively indicating peripherals <NUM>-<NUM>, <NUM>-<NUM>) to the throttling circuit <NUM> which prepares to throttle the peripherals <NUM>-<NUM>, <NUM>-<NUM> of the given subset <NUM> when an interrupt is received. For example, a circuit of the throttling circuit <NUM> may prepare to control ultra-fast switches to turn off power to the peripherals <NUM>-<NUM>, <NUM>-<NUM> (e.g. and/or power amplifiers <NUM>-<NUM>, <NUM>-<NUM> thereof) in response to receiving an interrupt on the hardware data line <NUM>. Such preparation may include controlling a plurality of other switches to states where the ultra-fast switches on the power lines to the peripherals <NUM>-<NUM>, <NUM>-<NUM> are controlled to turn power off to the peripherals <NUM>-<NUM>, <NUM>-<NUM>, in response to receiving an interrupt on the hardware data line <NUM>, and the like. In a particular example, ultra-fast switches on the power lines to the peripherals <NUM>-<NUM>, <NUM>-<NUM> may include FETs with gates that may be open or closed, and the indication <NUM> may close switches between the hardware data line <NUM> and gates of FETs of ultra-fast switches on the power lines to the peripherals <NUM>-<NUM>, <NUM>-<NUM>, which are normally closed, so that an interrupt on the hardware data line <NUM> may cause such gates to open, disconnecting power between the connectivity subsystem <NUM> and the peripherals <NUM>-<NUM>, <NUM>-<NUM> (e.g. with gates of FETs of ultra-fast switches on the power lines to the other peripherals <NUM> remaining closed, and corresponding switches between the hardware data line <NUM> and gates of such FETs remaining open). However, the throttling circuit <NUM> may cause power to the peripherals <NUM>-<NUM>, <NUM>-<NUM> to be turned off in any suitable manner and/or cause current at the peripherals <NUM>-<NUM>, <NUM>-<NUM> to be throttled in any suitable manner.

Attention is next directed to <FIG> which depicts the sensing circuit <NUM> determining that a sensed current <NUM> (e.g. of <NUM>. 3A) is greater than the threshold current <NUM>. In response, the sensing circuit <NUM> provides an interrupt <NUM> on the hardware data line <NUM> to the throttling circuit <NUM>. The throttling circuit <NUM> responds to the interrupt <NUM> by turning off power to the power amplifiers <NUM>-<NUM>, <NUM>-<NUM> of the peripherals <NUM>-<NUM>, <NUM>-<NUM>, represented by indications <NUM> (e.g. "X") indicating power is off on a power line to the peripherals <NUM>-<NUM>, <NUM>-<NUM>. Hence, the peripherals <NUM>-<NUM>, <NUM>-<NUM> are turned "OFF" and current of the peripherals <NUM>-<NUM>, <NUM>-<NUM> is throttled. However, the other peripherals <NUM> remain on.

However, other examples of throttling current at the peripherals <NUM>-<NUM>, <NUM>-<NUM> are within the scope of the present specification including, but not limited to, throttling maximum current of the peripherals <NUM>-<NUM>, <NUM>-<NUM> of the given subset <NUM>, in combination with the unthrottled current of the other peripherals <NUM>, such that a sum of the maximum currents of the unthrottled peripherals <NUM>, and the throttled maximum current of the peripherals <NUM>-<NUM>, <NUM>-<NUM> of the given subset <NUM>, does not exceed the available current overhead <NUM>. Similarly, throttling current at the peripherals <NUM>-<NUM>, <NUM>-<NUM> may include the throttling circuit <NUM> transmitting data commands to the peripherals <NUM>-<NUM>, <NUM>-<NUM> to cause the peripherals <NUM>-<NUM>, <NUM>-<NUM> to reduce current usage.

Attention is next directed to <FIG> which depicts the sensing circuit <NUM> determining that the sensed current <NUM> (e.g. of <NUM>. 0A) has now dropped to less than the threshold current <NUM> and, in response, provides an indication <NUM> of same on the hardware data line <NUM> to the throttling circuit <NUM>. The throttling circuit <NUM> responds to indication <NUM> by turning power back on to the power amplifiers <NUM>-<NUM>, <NUM>-<NUM> of the peripherals <NUM>-<NUM>, <NUM>-<NUM>, which turn on power to the peripherals <NUM>-<NUM>, <NUM>-<NUM> accordingly and hence stops throttling of current at the peripherals <NUM>-<NUM>, <NUM>-<NUM>.

Hence, the sensing circuit <NUM> is further configured to: in response to determining that the sensed current <NUM> at the power source <NUM> has fallen back below the threshold current <NUM>, provide a given indication to the throttling circuit <NUM> to cause the throttling circuit <NUM> to stop throttling the respective currents to the given subset of the peripherals <NUM>.

In some examples, the interrupt <NUM> may comprise a "high" voltage and/or signal on the hardware data line <NUM> (e.g. which opens gates of FETs of ultra-fast switches on the data lines to the peripherals <NUM>-<NUM>, <NUM>-<NUM>), and which is turned off in response to determining that the sensed current <NUM> at the power source <NUM> has fallen back below the threshold current <NUM>. Hence, for example, the indication <NUM> may comprise the interrupt <NUM> being turned off.

Hence, the interrupt <NUM> may be understood to include a voltage on the hardware data line <NUM> that may cause switches in the throttling circuit <NUM> to the power amplifiers <NUM>-<NUM>, <NUM>-<NUM>, to open (or close) and/or otherwise indicate to the power amplifiers <NUM>-<NUM>, <NUM>-<NUM> that current thereto is to be throttled.

Furthermore, the interrupt <NUM> may be received at the processors <NUM>, <NUM> to indicate to the processors <NUM>, <NUM> that the peripherals <NUM>-<NUM>, <NUM>-<NUM> (and/or the given subset <NUM> of the peripherals <NUM>) are being throttled with respect to current and may not be available for usage. In some of these examples, one or more of the processors <NUM>, <NUM> may provide an indication of same at a notification device of the device <NUM>, such as at a display screen thereof to notify a user of the device <NUM> that the peripherals <NUM>-<NUM>, <NUM>-<NUM> may be temporarily unavailable for use. Similarly, when current to the peripherals <NUM>-<NUM>, <NUM>-<NUM> is unthrottled, one or more of the processors <NUM>, <NUM> may also provide an indication of same at a notification device. However, the interrupt <NUM> received at the processors <NUM>, <NUM> may have other effects, including, for example, preventing the processor <NUM> and/or the at least one connectivity subsystem <NUM> from attempting to use the peripherals <NUM>-<NUM>, <NUM>-<NUM> to transmit associated metadata, and the like.

Other examples are within the scope of the present specification. For example, the sensing circuit <NUM> may provide the interrupt <NUM> only when the sensed current <NUM> is greater than the threshold current <NUM> for a given time period, which may be on the order of a few microseconds, and the like.

Attention is now directed to <FIG> which depicts a flowchart representative of a process <NUM> for throttling current and/or power to peripherals. The operations of the process <NUM> of <FIG> may correspond at least in part, to machine readable instructions that are executed by the device <NUM>, and specifically the processors <NUM>, <NUM> of the device <NUM> implementing the respective applications <NUM>, <NUM>. However, some operations of the process <NUM> of <FIG> may correspond to hardware configurations of the circuits <NUM>, <NUM>. The process <NUM> is one way in which the device <NUM> may be configured.

The process <NUM> of <FIG> need not be performed in the exact sequence as shown and likewise various blocks may be performed in parallel rather than in sequence. Accordingly, the components of process <NUM> are referred to herein as "blocks" rather than "steps. The process <NUM> of <FIG> may be implemented on variations of the device <NUM>, as well. For example, while the process <NUM> is described with respect to specific processors <NUM>, <NUM> performing certain blocks, such blocks may be understood to be performed by one or more of the processors <NUM>, <NUM>.

At a block <NUM>, the device <NUM>, for example the primary processor <NUM>, determines a presently prioritized peripheral <NUM> for example as described with respect to <FIG>.

At a block <NUM>, the device <NUM>, and specifically the primary processor <NUM>, determines a threshold current, for example as described with respect to <FIG>. For example, as has already been described, the threshold current may comprise one or more of: a predetermined maximum current of the presently prioritized peripheral <NUM>; and the predetermined maximum current of the presently prioritized peripheral <NUM> adjusted by a given amount.

At a block <NUM>, the device <NUM>, specifically the primary processor <NUM>, provides the threshold current (e.g. an indication of a value thereof) to the sensing circuit <NUM>, for example as described with respect to <FIG>. In particular, as has already been described, the sensing circuit <NUM> is configured to sense when a sensed current of the power source <NUM> of the device <NUM> exceeds a threshold current.

At a block <NUM>, the device <NUM>, for example the primary processor <NUM>, determines an available current overhead, for example as described with respect to <FIG>.

At a block <NUM>, the device <NUM>, and specifically the secondary processor <NUM>, determines a given subset of the peripherals <NUM> for which throttling of current is to occur based, on the available current overhead, as described with respect to <FIG>. For example, as has already been described, the available current overhead may comprises a difference between the threshold current and a given maximum current, such that the process <NUM> may further comprise determining the given subset of the peripherals <NUM> to throttle based on the available current overhead and respective predetermined maximum currents (e.g. as stored at the memory <NUM>) used by the peripherals <NUM>, other than the presently prioritized peripheral <NUM>-<NUM>. Similarly, the given maximum current may comprise a smaller of a safety-related maximum current (e.g. the current <NUM>) that trips the safety circuit <NUM>; and a voltage slump-related maximum current that causes a voltage slump at terminals of the power source <NUM>.

At a block <NUM>, the device <NUM>, for example the secondary processor <NUM>, provides an indication of the given subset of the peripherals <NUM>, for which throttling of current is to occur, to the throttling circuit <NUM>, as described with respect to <FIG>.

While the blocks <NUM>, <NUM>, <NUM>, <NUM>, <NUM> and <NUM> may be implemented at least partially via software implemented by one or more of the processors <NUM>, <NUM>, the following blocks of the process <NUM> are understood to be implemented in hardware of the circuits <NUM>, <NUM> and, in particular, ultra-fast switching components.

At a block <NUM>, the device <NUM>, and specifically the sensing circuit <NUM>, determines whether a sensed current exceed the threshold current. In response to the sensing circuit <NUM> determining that the sensed current exceeds the threshold current (e.g. a "YES" decision at the block <NUM>), at a block <NUM>, the device <NUM>, and specifically the sensing circuit <NUM>, provides the interrupt <NUM> to the throttling circuit <NUM> via the hardware data line <NUM> therebetween; which, at a block <NUM> causes throttling of current to the given subset of the peripherals <NUM> (e.g. based on the indication <NUM> of the given subset <NUM>), as described above with respect to <FIG>.

For example, as has already been described, the presently prioritized peripheral <NUM>-<NUM> may comprise a transceiver, and the given interrupt may be one of a first given interrupt associated with the transceiver in a transmit mode or a second given interrupt associated with the transceiver in a receive mode, and the given subset of the peripherals <NUM> which for which current is throttled may be dependent on whether the given interrupt is the first given interrupt or the second given interrupt. Furthermore, the process <NUM> may further comprise indicating, at the device <NUM>, for example from the first processor <NUM>, to the sensing circuit <NUM>, to provide the first given interrupt or the second given interrupt to the throttling circuit <NUM> in response to determining that the sensed current from the power source <NUM> exceeds the threshold current.

Furthermore, as has already been described, at least a portion of the peripherals <NUM> may comprise transceivers, and the throttling circuit <NUM> causing throttling of the respective currents to the given subset <NUM> of the peripherals <NUM> may comprise the throttling circuit <NUM> causing throttling of the respective currents to power amplifiers <NUM> of the transceivers. Similarly, determining (e.g. at the block <NUM>) which of the peripherals is the presently prioritized peripheral <NUM>-<NUM> may comprises communicating with the at least one connectivity subsystem <NUM> of the device <NUM> over one or more of the data lines, the at least one connectivity subsystem <NUM> including hardware for the transceivers, and at least a portion of the peripherals <NUM> may comprise the transceivers.

Returning to the block <NUM>, the device <NUM>, and specifically the sensing circuit <NUM>, continues to determine whether the sensed current exceed the threshold current and, in response to the sensing circuit <NUM> determining that the sensed current from the power source <NUM> has fallen back below the threshold current(e.g. a "NO" decision at the block <NUM>), at a block <NUM>, the device <NUM>, and specifically the sensing circuit <NUM>, provides, from the sensing circuit <NUM> to the throttling circuit <NUM>, on the hardware data line <NUM>, therebetween, the given indication <NUM> which, at a block <NUM> causes throttling of current to the given subset of the peripherals <NUM> to stop, as described above with respect to <FIG>.

Furthermore the process <NUM> may be repeated after the block <NUM> and/or as the presently prioritized peripheral <NUM> changes, for example as peripherals <NUM> are used, or not, at the device <NUM>, and/or as the associated threshold current and available current overhead changes, with suitable blocks of the process <NUM> being reimplemented accordingly.

As has previously been mentioned, in some examples, the sensing circuit <NUM> may be correspondingly configured to determine when voltage of the power source <NUM> reaches such a shutdown threshold voltage <NUM> (e.g. which, in some examples, may occur prior to a sensed current from the power source exceeding the threshold current. In these examples, the sensing circuit <NUM> may provide the given interrupt to the throttling circuit <NUM> via the hardware data line <NUM> therebetween. Hence, in such examples, the voltage of the power source <NUM> reaching (e.g. falling below) such a shutdown threshold voltage <NUM> (or, rising back above such a shutdown threshold voltage <NUM>) may be another condition under which the device <NUM> implements the blocks <NUM>, <NUM>, <NUM>), presuming that the processors <NUM>, <NUM> have previously determined peripherals <NUM> for which to throttle current, etc., at the blocks <NUM> to <NUM>.

As should be apparent from this detailed description above, the operations and functions of the electronic computing device are sufficiently complex as to require their implementation on a computer system, and cannot be performed, as a practical matter, in the human mind. Electronic computing devices such as set forth herein are understood as requiring and providing speed and accuracy and complexity management that are not obtainable by human mental steps, in addition to the inherently digital nature of such operations (e.g., a human mind cannot interface directly with RAM or other digital storage, to sense current, and the like).

The invention is defined solely by the appended claims.

Moreover in this document, relational terms such as first and second, top and bottom, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. The terms "comprises," "comprising," "has", "having," "includes", "including," "contains", "containing" or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises, has, includes, contains a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by "comprises. a", "includes. a", "contains. a" does not, without more constraints, preclude the existence of additional identical elements in the process, method, article, or apparatus that comprises, has, includes, contains the element. The terms "a" and "an" are defined as one or more unless explicitly stated otherwise herein. The terms "substantially", "essentially", "approximately", "about" or any other version thereof, are defined as being close to as understood by one of ordinary skill in the art, and in one non-limiting embodiment the term is defined to be within <NUM>%, in another embodiment within <NUM>%, in another embodiment within <NUM>% and in another embodiment within <NUM>%. The term "one of", without a more limiting modifier such as "only one of", and when applied herein to two or more subsequently defined options such as "one of A and B" should be construed to mean an existence of any one of the options in the list alone (e.g., A alone or B alone) or any combination of two or more of the options in the list (e.g., A and B together).

A device or structure that is "configured" in a certain way is configured in at least that way, but may also be configured in ways that are not listed.

The terms "coupled", "coupling" or "connected" as used herein can have several different meanings depending on the context in which these terms are used. For example, the terms coupled, coupling, or connected can have a mechanical or electrical connotation. For example, as used herein, the terms coupled, coupling, or connected can indicate that two elements or devices are directly connected to one another or connected to one another through intermediate elements or devices via an electrical element, electrical signal or a mechanical element depending on the particular context.

Moreover, an embodiment can be implemented as a computer-readable storage medium having computer readable code stored thereon for programming a computer (e.g., comprising a processor) to perform a method as described and claimed herein. Any suitable computer-usable or computer readable medium may be utilized. Examples of such computer-readable storage mediums include, but are not limited to, a hard disk, a CD-ROM, an optical storage device, a magnetic storage device, a ROM (Read Only Memory), a PROM (Programmable Read Only Memory), an EPROM (Erasable Programmable Read Only Memory), an EEPROM (Electrically Erasable Programmable Read Only Memory) and a Flash memory. In the context of this document, a computer-usable or computer-readable medium may be any medium that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device.

Further, it is expected that one of ordinary skill, notwithstanding possibly significant effort and many design choices motivated by, for example, available time, current technology, and economic considerations, when guided by the concepts and principles disclosed herein will be readily capable of generating such software instructions and programs and ICs with minimal experimentation. For example, computer program code for carrying out operations of various example embodiments may be written in an object oriented programming language such as Java, Smalltalk, C++, Python, or the like. However, the computer program code for carrying out operations of various example embodiments may also be written in conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on a computer, partly on the computer, as a stand-alone software package, partly on the computer and partly on a remote computer or server or entirely on the remote computer or server. In the latter scenario, the remote computer or server may be connected to the computer through a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider).

Claim 1:
A device (<NUM>) comprising:
peripherals (<NUM>) powered by a power source (<NUM>);
a throttling circuit (<NUM>) configured to: in response to receiving a given interrupt, cause throttling of respective currents to a given subset of the peripherals (<NUM>);
a sensing circuit (<NUM>) configured to: in response to determining that a sensed current from the power source (<NUM>) exceeds a threshold current, provide the given interrupt to the throttling circuit (<NUM>) via a hardware data line (<NUM>) therebetween;
a primary processor (<NUM>) configured to: determine the threshold current based at least on a predetermined maximum current of a presently prioritized peripheral; and provide the threshold current to the sensing circuit; and
a secondary processor (<NUM>) configured to: determine the given subset of the peripherals (<NUM>) based on an available current overhead.