Patent Description:
It is typically desirable to minimise any flow of current between the gate to the semiconductor material. Any such current is referred to as leakage current. To this end, the gate is separated from the semiconductor material by a dielectric. The dielectric may include an air gap, or a layer of material.

Charge in the gate is separated from charge in the semiconductor material by the dielectric. This means that the gate structure has a capacitance, which is referred to as a gate capacitance. Measurements of gate capacitance may provide useful information about the electronic behaviour of the device, the properties of the semiconductor material, the properties of the dielectric material, etc..

An existing method for determining gate capacitance is referred to as the capacitance-voltage, or C-V, method. This method involves applying AC currents directly to the semiconductor component. A limitation of this method is that the signal obtained can be noisy.

One class of semiconductor device which is of particular research interest is semiconductor-superconductor hybrid devices. These devices are useful for quantum computing. In a hybrid device, energy level hybridisation, also referred to as coupling, between a semiconductor and a superconductor may occur under certain conditions. Excitations which are useful for quantum computing, for example Majorana zero modes, may be induced in such a device. Inducing such excitations may involve applying a magnetic field to the device, as well as electrostatically gating one or more portions of the device. The structure and fabrication of one example hybrid device are disclosed in <CIT>.

<CIT> discloses a circuit for checking the function of a power transistor having an insulated gate. The circuit includes a capacitance measuring device for measuring a gate terminal capacitance between a gate terminal contact and a power electrode terminal contact of the power transistor.

<NPL>) discloses an experimental characterization of a single-electron transistor at an excitation frequency comparable to the electron tunnel rate.

<CIT> discloses an apparatus for detecting defects in a semiconductor device such as a thin film transistor used for driving a liquid crystal panel.

<CIT> discloses a resonance device for measuring a parasitic capacitance of a semiconductor device.

<CIT> discloses an apparatus for measuring a capacitance or inductance, which apparatus employs a variable frequency oscillator producing a sinusoidal output which is fed through a resonant circuit comprising a reactive circuit element of known value selected to attain resonance with the capacitance or inductance to be measured within the oscillator frequency range.

<NPL>) discloses a method for determining gate capacitance under forward bias.

<NPL>) discloses an evaluation of the gate capacitance of a field-effect transistor having a channel length and width of tens of nanometers.

Colless et al discloses a sensor for the readout of double quantum dots.

In one aspect, the present invention provides a method of determining a gate capacitance of a semiconductor device according to claim <NUM>. The semiconductor device has a source, a drain, a gate, and a channel. The semiconductor device is arranged in a circuit further comprising an electrical resonator, wherein one of the source and the drain is connected to the electrical resonator, and the other of the source and the drain is connected to a high-impedance contact, the high-impedance contact being selected from a tunnel junction, a resistor having a resistance greater than or equal to <NUM> MΩ, and a transistor in an off state; the method comprising: measuring a resonance frequency of the circuit; and calculating, based on the resonance frequency, the gate capacitance.

Another aspect of the invention provides an apparatus for determining a gate capacitance of a semiconductor device, according to claim <NUM>. The semiconductor device having a having a source, a drain, a gate, and a channel. The apparatus comprises: the semiconductor device; an electrical resonator connected to one of the source and the drain of the semiconductor device; a high impedance contact connected to the other of the source and the drain of the semiconductor device, the high-impedance contact being selected from a tunnel junction, a resistor having a resistance greater than or equal to <NUM> MΩ, and a transistor in an off state;
a signal generator capable of providing a probe signal to an electrical resonator; a sensor capable of sensing at least one of the amplitude and the phase of a response signal from the electrical resonator; a processing unit operably linked to the signal generator and the sensor; and a memory unit operably linked to the processing unit, wherein the memory unit stores computer program code, the computer program code being executable by the processing unit; wherein the computer program code comprises: a control module for causing the processing unit to control the signal generator; an identification module for causing the processing unit to identify, based on an input from the sensor, a resonance frequency of a circuit comprising the electrical resonator; a calculation module for causing the processing unit to calculate, based on the resonance frequency, the gate capacitance of the semiconductor device; and an output generation module for generating an output identifying the gate capacitance.

Certain more specific aspects of the invention are set out in the dependent claims.

As used herein, the verb 'to comprise' is used as shorthand for 'to include or to consist of'. In other words, although the verb 'to comprise' is intended to be an open term, the replacement of this term with the closed term 'to consist of' is explicitly contemplated.

In the context of the present disclosure, a signal is an electrical signal having a frequency, a phase, and an amplitude.

Described herein is a method of determining a gate capacitance of a semiconductor device, such as a semiconductor-superconductor hybrid device. The method makes use of an electrical resonator. The resonator is connected to the device under investigation. This causes a change in the resonance frequency of the resonator. The gate capacitance of the device may be calculated from the resonance frequency of the device-resonator system. The method may, for example, allow measurements of gate capacitance with a better signal-to-noise ratio than existing methods.

The principles of the method will now be explained with reference to <FIG> is a diagram of an example circuit useful for practising the method, and <FIG> is a flowchart outlining the method.

The illustrated circuit <NUM> allows for measurement of the resonance frequency of a system made up of an electrical resonator unit <NUM> and a semiconductor device <NUM>. Semiconductor device <NUM> in this example is a transistor. A transistor has a source terminal which is connected to a drain terminal by a portion of semiconductor material. The portion of semiconductor material is referred to as a channel. The transistor further includes a gate electrode for applying an electrostatic field to the channel in order to modify the number of available charge carriers in the channel.

Although the illustrated example shows a transistor, the method provided herein may be applied to any type of semiconductor device which includes a source, a drain, a channel, and a gate. For example, a semiconductor-superconductor hybrid device may include a semiconductor component in the form of a nanowire; an electrical contact at each end of the nanowire; one or more gate electrodes for applying an electrostatic field to one or more portions of the nanowire; and a superconductor component configured to be capable of undergoing energy level hybridisation with the semiconductor. In such a structure, the electrical contacts represent a source and a drain, and the one or more portions of the nanowire represent a channel.

Semiconductor device <NUM> is depicted as an N-type MOSFET. This is one illustrative example of a semiconductor device in which the density of charge carriers in the channel can be varied by applying a gate voltage. Any other gated semiconductor device may be investigated using the present methods.

The source of semiconductor device <NUM> is connected to one end of an electrical resonator unit <NUM> via a low impedance contact <NUM>. The drain of semiconductor device <NUM> is connected to a high impedance contact <NUM>. The gate of semiconductor device <NUM> is connected to a voltage source <NUM> for applying an electrostatic field to the gate electrode.

In this example, electrical resonator unit <NUM> is an LC circuit. An LC circuit comprises an inductor <NUM>, coupled to a capacitance, represented by capacitor component <NUM>. An LC circuit is one example of an electrical resonator.

Although <FIG> shows a capacitor component <NUM>, the capacitance may be parasitic. Parasitic capacitance, also referred to as stray capacitance, is a capacitance that unavoidably arises from the physical proximity of components of a circuit.

In most implementations, an LC circuit includes an inductor component such as a coil. Although any conductor through which a current flows will give rise to a parasitic inductance, in practice parasitic inductances are usually very small.

In implementations when an LC circuit is used, the LC circuit may have a natural resonance frequency in the range <NUM> to <NUM>, optionally <NUM> to <NUM>. By "natural resonance frequency" is meant the frequency of the LC circuit alone, when not connected to a gate capacitance. As will be explained in more detail below, the resonance frequency of an LC circuit may be varied by selecting the magnitudes of the inductance and the capacitance.

For example, the inductor may have an inductance in the range <NUM> nH to <NUM>µH. The capacitance may have a magnitude in the range <NUM> pF to <NUM> pF. One example implementation, which provides a resonance frequency of approximately <NUM>, uses an inductance of <NUM> nH and a capacitance of <NUM> pF. Another example implementation, which provides a resonance frequency of approximately <NUM>, uses an inductance of <NUM>µH and a capacitance of <NUM> pF.

In implementations where the capacitance is a parasitic capacitance, the magnitude of the inductance may be selected to provide a desired resonance frequency.

The properties of the electrical resonator may be selected to optimize the sensitivity of the measurement. For example, the impedance of the electrical resonator may be matched with the impedance of a transmission line between the IO unit and the electrical resonator may allow for improved sensitivity. Another possibility is to select the quality factor of the resonant circuit based on the resistivity of the semiconductor device.

In implementations where a capacitor component is present, the capacitor may be a varactor. The capacitance of a varactor may be varied by applying an electrostatic field to the varactor. Varying the capacitance varies the natural resonance frequency of the LC circuit. A resonator which has a variable resonance frequency is referred to as tuneable.

Alternatively, a tuneable LC circuit may in principle be implemented using a variable inductor and a fixed capacitance. A still further possible implementation comprises a variable inductor and a variable capacitor.

The connection between the electrical resonator unit <NUM> and the source of semiconductor device <NUM> is a low impedance contact <NUM>. In <FIG>, the low impedance contact <NUM> is illustrated by resistor <NUM> and capacitor <NUM>. Any connector or transmission line will have an intrinsic impedance, and resistor <NUM> and capacitor <NUM> represent this intrinsic impedance. The impedance of low impedance contact <NUM> is desirably as low as possible. The low impedance contact typically does not comprise a resistor component or a capacitor component.

High impedance contact <NUM>, which is connected to the drain of the semiconductor device <NUM>, is illustrated by a resistor <NUM> and capacitor <NUM>. It is desirable for current flow through the semiconductor device from the source to the drain to be as low as possible, ideally <NUM>. It is also desirable for any capacitance at the drain contact to be minimised.

The high impedance contact is selected to have an impedance which is large compared to the impedance of the gate capacitance. The high impedance contact <NUM> may comprise a tunnel junction. Alternatively, the high impedance contact <NUM> may comprise a resistor, for example a resistor having a resistance of at least <NUM> MΩ, optionally at least <NUM> MΩ. Capacitor <NUM> represents a parasitic capacitance. The parasitic capacitance of the high impedance contact is desirably as low as possible. Alternatively, the drain of the semiconductor device <NUM> may be connected to a transistor, for example a field effect transistor. In an "off" state, the transistor may behave as a high impedance contact to allow for measurement of gate capacitance. In an "on" state, the transistor may allow current to flow from the source to the drain of the semiconductor device <NUM>, allowing for measurement of conductance of the channel of the semiconductor device.

Electrical resonator unit <NUM> and semiconductor device <NUM> may be connected permanently. For example, the electrical resonator unit and the semiconductor device may be fabricated on the same chip or may be soldered into the same circuit. Alternatively, the electrical resonator unit and semiconductor device <NUM> may be removably connected. Electrical resonator unit <NUM> may be implemented as a needle probe, temporarily touched on a terminal of the semiconductor device, as explained in more detail below with reference to <FIG>. The terminal may be one of the source, the gate (not covered by the claimed invention), and the drain.

The circuit <NUM> further comprises an input-output, IO, unit <NUM>. IO unit <NUM> is connected to the electrical resonator unit <NUM>. IO unit <NUM> is configured to send a probe signal, in the form of an AC current having a frequency and a phase, to the electrical resonator unit <NUM>. The probe signal generated by the IO unit may have a frequency in the range <NUM> to <NUM>, for example.

The IO unit <NUM> may be configured to allow the frequency of the probe signal to be varied. This may allow the input frequency to be scanned to facilitate detection of the resonance frequency of the electrical resonator unit <NUM>.

In implementations where the circuit includes a tuneable electrical resonator unit, an IO unit <NUM> which provides a probe signal having a fixed frequency may be used. In such implementations, the tuning of the electrical resonator unit may be varied to obtain resonance, and Cgate may be inferred based on the variation of the tuning.

In implementations where the phase of the response signal relative to the probe signal is measured, the IO unit <NUM> may provide a probe signal having a fixed frequency.

IO unit <NUM> is further configured to detect a response signal from the electrical resonator unit <NUM>. More specifically, the IO unit <NUM> is configured to detect the amplitude of the response signal and/or phase of the response signal. In particular, the IO unit may be configured to detect a phase difference between the response signal and the response signal. An example of a detector useful for detecting the response signal is a vector network analyser. Vector network analysers are commercially available, one example being the R&S® ZNB Vector Network Analyzer commercialized by Rohde & Schwarz. A vector network analyser may detect both phase and amplitude. Measuring both phase and amplitude may allow for more accurate determination of the resonance frequency.

In the example circuit, electrical resonator unit <NUM> is connected to the source of the semiconductor device <NUM>. The electrical resonator unit <NUM> may alternatively be connected to either the drain or the gate (not covered by the claimed invention) of the semiconductor device <NUM>. In other words, the electrical resonator unit connects to the IO unit and any one of the source, the drain, and the gate (not covered by the claimed invention).

In variants where the electrical resonator unit <NUM> is connected to the drain, the source may be connected to the high impedance contact.

In variants where the electrical resonator unit <NUM> is connected to the gate (variants not covered by the claimed invention), a gate voltage may be applied via the resonator or via a further gate. Semiconductor devices are typically configured to prevent flow of current from the gate electrode to the source and drain, e.g., with a gate dielectric between the gate and the channel. In other words, the direct connection between the gate and the source and drain is usually highly resistive. The gate dielectric may act as the high impedance contact.

The operation of circuit <NUM> will now be described with reference to <FIG>.

At block <NUM>, the resonance frequency of the electrical resonator is measured. Various approaches to the measurement of resonance frequency are possible.

When the frequency of the probe signal generated by the IO unit <NUM> is close to the resonance frequency of electrical resonator unit <NUM>, the amplitude and phase of the response signal received from the electrical resonator unit <NUM> change. The change in amplitude of the response signal and/or the change in phase of the response signal are detected by the IO unit <NUM>.

The resonance frequency may be identified by monitoring the response signal received by the IO unit <NUM> whilst varying the frequency of the probe signal generated by the IO unit. Alternatively or additionally, in implementations where the electrical resonator unit <NUM> is tuneable, the tuning of the electrical resonator unit may be varied. Measurements which include varying frequency of the probe signal and/or the tuning of the electrical resonator unit may allow for accurate determination of the resonance frequency.

Another approach to measuring resonance frequency is to measure a difference in phase between the response signal and the probe signal, and to calculate the resonance frequency based on the difference in phase. The difference in phase is related to the difference between the frequency of the probe signal and the resonance frequency of the electrical resonator (see e.g. <NPL>). Resonance frequency may therefore be calculated from the phase difference. This approach may allow the use of a probe signal having a fixed frequency and an electrical resonator unit having a fixed tuning. This may in turn allow for the resonance frequency to be determined rapidly.

In some implementations, these two approaches may be combined. A first measurement of resonance frequency may be performed by measuring a difference in phase between the response signal and the probe signal, the probe signal having a fixed frequency. A first estimate of the resonance frequency may be calculated based on the difference in phase. A second measurement of resonance frequency may then be performed by scanning a range of probe signal frequencies whilst measuring the amplitude and/or phase of the response signal, to obtain the second measurement.

The width of the range and/or a starting frequency for the scanning may be selected based on the first measurement. This may allow for a narrower range to be scanned.

At block <NUM>, the gate capacitance is calculated based on the resonance frequency. The calculation may be performed by executing computer program code as described herein below using a processing unit. The processing unit may cause the calculated resonance frequency value to be stored in working memory, written to data storage, and/or displayed to a user. Example calculations will be explained with reference to an LC circuit.

An LC circuit has a resonance frequency which depends upon the magnitude of the capacitance and the inductance in the circuit. The resonance frequency may be calculated using Formula <NUM>: <MAT> where f is the resonance frequency in Hz, L is the inductance in Henry (kg. A-<NUM>), and C is the capacitance in Farad (s<NUM>.

As may be understood from the above formula, electrical resonator unit <NUM> has a resonance frequency determined by the magnitudes of the inductance <NUM> and capacitance <NUM>.

In the circuit <NUM>, electrical resonator unit <NUM> is coupled to the semiconductor device <NUM> via low impedance contact <NUM>. The semiconductor device <NUM> has a gate capacitance. The gate capacitance influences the resonance frequency of the LC circuit. The resonance frequency of this coupled system is described by Formula <NUM>: <MAT> where f is the resonance frequency of the system in Hz, L is the inductance in Henry, Cres is represents the capacitance of the LC circuit in Farad, and Cgate is the gate capacitance of the semiconductor device in Farad.

The gate capacitance of the semiconductor device may thus be calculated based on the resonance frequency of the circuit <NUM>.

Any contribution of the semiconductor device to the inductance is assumed to be <NUM>. Current through the semiconductor component <NUM>, and thus any contribution to the inductance of the system, is negligible because semiconductor component <NUM> is coupled to high-impedance contact <NUM>.

The resistance and inductance of the low impedance contact <NUM> are desirably as small as possible. Preferably, the resistance of the low impedance contact obeys the relationship: <MAT> where Rcontact is the resistance of the low impedance contact, f is the resonance frequency of the electrical resonator, and Cgate is the gate capacitance.

The capacitance of the low impedance contact, Ccontact, may obey the relationship: <MAT>.

This may contribute to providing a small impedance, Zcontact, since the impedance may be described by: <MAT> where i is <MAT>.

The low impedance contact may comprise a transmission line. The low impedance contact may include a capacitor. Alternatively, the capacitance of the low impedance contact may be a parasitic capacitance.

Any effect of the low impedance contact on the resonance frequency of the system may be taken into account by calibration, as discussed below.

One technique for calibrating the circuit <NUM> is to perform measurements at different applied gate voltages. The gate capacitance of a semiconductor device varies depending upon the gate voltage.

Relative gate capacitances may be determined by measuring the resonance frequency at two or more different gate voltages.

To allow for calculation of absolute gate capacitance, a measurement may be performed at a gate voltage selected such that the channel of the semiconductor component is fully depleted. When the channel is fully depleted, Cgate may be assumed to be zero.

The gate voltage which fully depletes the channel may be determined based on conductance measurements. Alternatively, resonance frequency may be measured as a function of gate voltage. The maximum resonance frequency will correspond to the minimum total capacitance, coinciding with Cgate = <NUM>.

In implementations where the electrical resonator unit <NUM> is removably connected to the semiconductor device <NUM>, a still further possibility is to calibrate the circuit by measuring the resonance frequency of the electrical resonator unit <NUM> before connecting the electrical resonator unit <NUM> to the semiconductor device <NUM>. This may introduce a systematic error, because any parasitic capacitance of the connection between the resonator unit <NUM> and semiconductor device <NUM> is not taken into account.

A useful property of LC circuits is that the resonance frequency of the system responds linearly to changes in gate capacitance to a first approximation. This may be understood from a Taylor expansion of Formula <NUM> about point C = Cres, shown below as Formula <NUM>: <MAT>.

L and Cres are constants, therefore this formula is of the form: <MAT>.

A linear response to changes in a value of interest is a desirable property of a measurement system.

Measuring the gate capacitance may provide insights into the performance of the device and/or the materials used to construct the device. For example, measurements of gate capacitances at a plurality of different gate voltages may allow the response of the device to changes in gate voltage to be characterised.

Gate capacitance measurements may be used in combination with conductance measurements to investigate charge mobility, in particular, field effect mobility, in a device. This may be of particular interest for devices for use in quantum computing, such as semiconductor-superconductor hybrid devices. The method may include measuring gate capacitance at a predetermined gate voltage, and measuring conductance at the predetermined gate voltage.

The performance of a gate dielectric may be investigated by applying a varying gate voltage and measuring gate capacitance as a function of time. Charge trapping by the gate dielectric, for example, may cause the response to the gate voltage to vary.

The example of <FIG> uses an LC circuit as the electrical resonator. However, other types of electrical resonator may be used. An example circuit <NUM> which uses a transmission line resonator as the electrical resonator unit is shown in <FIG>.

The circuit <NUM> of <FIG> differs from circuit <NUM> of <FIG> in that the electrical resonator unit <NUM> is a transmission line resonator. The circuit <NUM> further differs from circuit <NUM> in that high impedance contact <NUM> is replaced by a switchable contact <NUM>. In addition, <FIG> shows further details of an illustrative IO unit <NUM>. Circuit <NUM> is otherwise the same as circuit <NUM>. The low impedance contact <NUM>, semiconductor device and associated gate <NUM> are shown in simplified form.

The transmission line resonator <NUM> of this example comprises a transmission line <NUM> which extends between two capacitors <NUM> and <NUM>. The capacitors <NUM>, <NUM> may be implemented in the form of breaks in a transmission line. Each break may have a width in the range <NUM> to <NUM>. An electrical signal supplied to the transmission line resonator is partially reflected by the capacitors <NUM>, <NUM>. At resonance, a standing wave is formed along the transmission line <NUM>. The length of the transmission line <NUM> determine the resonance frequency of the resonator <NUM>.

The transmission line resonator may have a resonance frequency in the range <NUM> to <NUM>, for example.

The switchable contact <NUM> of circuit <NUM> comprises a transistor and a bias source for gating the transistor. The source of the transistor is connected to the drain of semiconductor device <NUM> under investigation. The drain of the transistor is connected to ground. Gating the transistor off (or 'closed') causes the transistor to act as a high impedance contact similar to high impedance contact <NUM> of circuit <NUM>, allowing for measurement of gate capacitance. Gating the transistor on (or 'open') allows current to flow through the transistor. This may be useful in, for example, the measurement of conductance. Providing a switchable contact may allow a single circuit to be used in measurements of both gate capacitance and conductance.

A switchable contact may be paired with any type of resonator. For example, circuit <NUM> could be modified by replacing high impedance contact <NUM> with a switchable contact.

Measurement of gate capacitance using circuit <NUM> uses the principles explained with reference to circuit <NUM>. As with circuit <NUM>, connecting the resonator <NUM> to a semiconductor component <NUM> having a gate capacitance causes a shift in the resonance frequency of the resonant circuit <NUM> which varies depending on the applied gate voltage. One of skill in the art will be able to adapt the equations described with reference to the LC circuit of <FIG> to other types of electrical resonator, such as transmission line resonator <NUM>.

Measuring conductance comprises switching the switchable contact to a low impedance state, applying a voltage to the semiconductor device, and measuring current through the circuit. In examples where the electrical resonator unit is connected to the source of the semiconductor device as illustrated in <FIG>, the voltage may be applied through the electrical resonator <NUM>, since electrical resonators typically have very little impact on conductance.

In a variant not covered by the claimed invention, the IO unit and electrical resonator unit may be connected to the gate. In such a variant, switchable contact(s) may be connected to the source and/or the drain of the semiconductor device. IO unit <NUM> of this example comprises a signal generator <NUM>, a detector <NUM>, and a circulator <NUM>. The signal generator <NUM> may be, for example, a microwave generator. The signal generator <NUM> communicates with a first terminal of the circulator <NUM>. The electrical resonator unit <NUM> communicates with a second terminal of the circulator <NUM>. The detector <NUM> communicates with a third terminal of the circulator <NUM>.

Various alternative implementations of IO units are possible. The form of the IO unit is not particularly limited, provided that a probe signal can be sent to the electrical resonator unit, and a response signal can be received from the electrical resonator unit.

In implementations where the resonator is an LC resonator, a coupling capacitor may be included between the IO unit and the electrical resonator unit. A coupling capacitor may be useful for combining a DC signal with a radio-frequency excitation, or to adjust the strength of electrical coupling between the resonator and IO unit. In implementations which use a transmission line resonator, capacitor <NUM> may act as a coupling capacitor.

In use, a probe signal from the signal generator <NUM> is sent to the resonator unit <NUM> via the circulator <NUM>, and a response signal received from the resonator unit <NUM> is passed to the detector <NUM> via the circulator <NUM>.

An example of an apparatus <NUM> according to the present disclosure will now be described with reference to <FIG>.

The apparatus <NUM> includes an IO unit <NUM> and a computer <NUM> for controlling the IO unit <NUM>. The computer <NUM> is operably linked to an optional user terminal <NUM>. The apparatus <NUM> may be in the form of a mechanical probe station, for example.

The IO unit <NUM> comprises a signal generator <NUM>, a sensor <NUM>, a circulator <NUM>, and a connector <NUM>.

The signal generator <NUM> may comprise a microwave generator. In use, the signal generator generates a probe signal which is sent to an electrical resonator via connector <NUM>.

The control may include activating and deactivating the signal generator. The control may include varying the frequency of the signal generated by the signal generator. The signal generator may be, for example, a microwave generator.

IO unit <NUM> further includes a sensor <NUM>. Sensor <NUM> is for receiving a response signal from a resonator. Sensor <NUM> may be configured to measure amplitude and/or phase of the response signal. Sensor <NUM> may comprise, for example, a vector network analyser. Sensor <NUM> may be configured to send computer-readable data representing the response signal to the computer <NUM>, for example via analogue-to-digital convertor circuitry.

Circulator <NUM> allows signal generator <NUM> and sensor <NUM> to be connected to a single terminal of an electrical resonator via connector <NUM>. Connector <NUM> may take any appropriate form. For example, connector <NUM> may comprise a needle probe, such as needle probe <NUM> discussed below with reference to <FIG>.

The apparatus <NUM> may further comprise the electrical resonator. Alternatively, the apparatus may be connectable to an external resonator.

The computer <NUM> includes a processing unit <NUM> which is operably linked to a data storage <NUM>. The data storage <NUM> stores a computer program <NUM> for execution by the processing unit.

The user terminal <NUM> may include user input equipment and a display device.

The user input equipment may comprise any one or more suitable input devices for known in the art for receiving inputs from a user. Examples of input devices include a pointing device, such as a mouse, stylus, touchscreen, trackpad and/or trackball. Other examples of input devices include a keyboard, a microphone when used with voice recognition algorithm, and/or a video camera when used with a gesture recognition algorithm.

Where reference is made herein to receiving an input from the user through the user input equipment, this may mean through any one or more user input devices making up the user input equipment.

The user input equipment may be useful for allowing a user to initiate execution of the computer program <NUM>, and/or for allowing the user to define operating parameters for the apparatus <NUM>. For example, the user input equipment may allow the user to input a desired frequency range to be scanned by the signal generator <NUM>. In implementations where the apparatus <NUM> is configured to control the gate voltage of the semiconductor device, the user input equipment may allow the user to specify one or more gate voltages. In implementations where the apparatus is connectable to an external resonator, the user input apparatus may allow the user to input descriptors of the external resonator such as the type of resonator, electrical parameters of the resonator, etc..

The display device may take any suitable form for outputting images, such as a light emitting diode (LED) screen, liquid crystal display (LCD), plasma screen, or cathode ray tube (CRT). The display device may comprise a touchscreen, and thus also form at least part of the user input equipment. A touchscreen may enable inputs by via being touched by the user's finger and/or using a stylus.

The inclusion of a display device is optional. A display device is useful in implementations where it is desired to provide a graphical output to a human user, such as a graph or text. As described below, the computer program used in the present context may generate other forms of output, such as storing data in data storage <NUM>.

The processing unit <NUM> may include one or more processors implemented in one or more dies, IC (integrated circuit) packages and/or housings at one or more geographic sites.

Each of the one or more processors may take any suitable form known in the art, e.g. a general-purpose central processing unit (CPU), or a dedicated form of co-processor or accelerator processor such as a graphics processing unit (GPU), digital signal processor (DSP), etc. Each of the one or more processors may comprise one or more cores.

Where it is said that a computer program is executed by the processing unit, this may mean execution by any one or more processors making up the processing unit <NUM>.

The processing unit <NUM> typically further comprises working memory, such as random-access memory and/or one or more memory caches within the one or more processors.

The data storage <NUM> comprises one or more memory units implemented in one or more memory media in one or more housings at one or more geographic sites.

Each of the one or more memory units may employ any suitable storage medium known in the art, e.g. a magnetic storage medium such as a hard disk drive (HDD), magnetic tape drive etc.; or an electronic storage medium such as a solid state drive (SSD), flash memory or electrically erasable programmable read-only memory (EEPROM), etc.; or an optical storage medium such as an optical disk drive or glass or memory crystal based storage, etc..

Where it is said herein that some item of data is stored in data storage <NUM> or a region thereof, this may mean stored in any part of any one or more memory units making up the data storage <NUM>.

The processing unit <NUM> and data storage <NUM> are operably linked. The processing unit and data storage are configured such that processing apparatus <NUM> is capable of reading data from at least a portion of data storage <NUM>, and writing data to at least a portion of the data storage <NUM>. The processing unit <NUM> may communicate with the data storage <NUM> over a local connection, e.g. a physical data bus and/or via a network such as a local area network or the Internet. In the latter case the network connections may be wired or wireless.

The data storage <NUM> stores computer program code <NUM>, i.e. software, which is executable by the processing unit <NUM>. Executing the computer program code <NUM> may cause the apparatus <NUM> to perform steps of a method of measuring a gate capacitance as provided herein.

Functionality of the computer program code <NUM> will be described with reference to various modules. As used herein, the term "module" is used for convenience of description to refer to any portion of computer program code configured to perform the described operation. The computer program code may be implemented in any appropriate manner. The operations of one or more modules may be combined as appropriate.

Computer program code <NUM> includes a control module <NUM> for causing the processing unit to control the signal generator; an identification module <NUM> for causing the processing unit to identify, based on an input from the sensor, a value of the resonance frequency of the electrical resonator; a calculation module <NUM> for causing the processing unit to determine, based on the resonance frequency, a value of the gate capacitance of the semiconductor device; and an output generation module <NUM> for generating an output identifying the value of the gate capacitance.

The control module <NUM> may cause the processing unit <NUM> to activate the signal generator and to identify the frequency of the signal generated by the signal generator.

In implementations where the signal generator is capable of variable frequency signal generation, the control module may cause the signal generator to perform a scan of a frequency range. The frequency range may be a range specified by a user, e.g., input via user input equipment of the user terminal <NUM>; a predetermined frequency range; or a programmatically-determined frequency range.

A predetermined frequency range may be the full dynamic range of the signal generator.

The frequency range may be selected programmatically based on one or more descriptors of the resonator and/or semiconductor device. The descriptors may include one or more of an estimated inductance of the resonator, an estimated capacitance of the resonator, and a predicted gate capacitance for the semiconductor device. The computer program code may include a simulation module for predicting the gate capacitance of the semiconductor device based on e.g. the dimensions and/or materials of the device. Limiting the range of the scan based on such descriptors may allow the resonance frequency to be identified more quickly.

The frequency range may be selected programmatically by calculating an estimated resonance frequency based on a difference in phase between the probe signal and the response signal at a predetermined probe signal frequency; and selecting a range spanning intervals on either side of the estimated resonance frequency. For example, a range spanning the estimated resonance frequency ± a defined tolerance may be selected.

In implementations where the electrical resonator is a tuneable electrical resonator, such as an LC circuit including a varactor, control module <NUM> may cause the signal generator to operate at a fixed frequency. Control module <NUM> may tune the electrical resonator, e.g. by controlling the output of a variable voltage source operably linked to a varactor component of the electrical resonator.

Control module <NUM> may record the value of the frequency. Recording may comprise writing data to the data storage and/or holding data in the working memory of the data processing unit, as appropriate.

The computer program code <NUM> further comprises an identification module <NUM> for causing the processing unit to identify, based on an input from the sensor <NUM>, a resonance frequency of the electrical resonator. As previously described with reference to <FIG>, the strength of the response signal from the electrical resonator increases when the frequency of the probe signal matches the resonance frequency of the electrical resonator. By monitoring the response using the sensor <NUM>, it is thus possible to identify when the electrical resonator is resonating.

Control module <NUM> and identification module <NUM> may operate in conjunction to cause the apparatus to measure the resonance frequency of an electrical resonator-semiconductor device system, as described with reference to block <NUM> of <FIG>.

Calculation module <NUM> determines a gate capacitance value for the semiconductor device based on the resonance frequency identified by module <NUM>. As previously explained with reference to block <NUM> of <FIG>, gate capacitance may be calculated from the resonance frequency.

Computer program code <NUM> may cause the apparatus to perform the method described with reference to <FIG>.

The computer program code <NUM> further includes output generation module <NUM> for causing the processor to generate an output identifying the gate capacitance determined by module <NUM> is also provided.

Generating the output may comprise storing the gate capacitance value in the data storage <NUM>, e.g. writing the gate capacitance value to a file. Generating the output may comprise displaying the gate capacitance on the display device of the user terminal. Generating the output may comprise piping the output to another process, e.g. in implementations where further values such as a measure of charge mobility are to be determined based on the gate capacitance.

The apparatus <NUM> may further comprise one or more additional components. The computer program code <NUM> may include additional modules for controlling the operation of such components.

For example, the apparatus <NUM> may be configured to measure the gate voltage which is applied to the semiconductor device. The apparatus may include a voltmeter, which is configured to be connectable to a gate electrode to measure the applied voltage e.g. via a pair of needle probes. The computer program code may include a gate voltage monitoring module, for monitoring the applied voltage based on an input from the voltmeter.

Alternatively or additionally, the apparatus <NUM> may be configured to control the gate voltage which is applied to the semiconductor device. The apparatus may comprise a variable voltage source for applying a gate voltage to the semiconductor device. The computer program code may comprise a gate voltage control module, for causing the processing unit to control the variable voltage source. The computer program code may be configured to cause the apparatus to measure gate capacitance at two or more different gate voltages. The computer program code may be configured to cause the gate voltage to vary and to monitor the response of the gate capacitance to variations in gate voltage.

Apparatus <NUM> may further include a unit for measuring conductance of the semiconductor device. This unit may be controlled by an appropriate computer program code module. The computer program code module may further comprise a module for determining, based on the conductance value and the gate capacitance value, charge mobility in the device.

One example of a unit for measuring conductance is a source measurement unit connectable to the source of the semiconductor device. In use, when measuring conductance using such a unit, the drain of the semiconductor device is connected to ground.

Another example of a unit for measuring conductance comprises current meter and either a voltage source or digital-to-analogue converter, DAC. The current meter is connectable to the drain of the semiconductor device. The voltage source or DAC is connectable to the source of the semiconductor device.

A still further example of a unit for measuring conductance comprises a lock-in amplifier and a current-to-voltage converter. The lock-in amplifier has an output connectable to the source of the semiconductor device, and an input connected to an output of the current-to-voltage converter. The current-to-voltage converter has an input which is connectable to the drain of the semiconductor device.

The computer program code may include a calculation module configured to calculate charge mobility, e.g. field effect mobility, based on the gate capacitance and conductance.

An example of a probe that may be used in combination with apparatus <NUM> will now be explained with reference to <FIG> shows a schematic diagram of a resonator probe <NUM>.

Resonator probe <NUM> includes a needle probe <NUM>. A needle probe, also referred to as a mechanical probe, RF probe, or probe tip, is a conductive pin or shaft that may be brought into contact with an electrical component. In use, needle probe <NUM> acts as a low impedance contact <NUM> as described with reference to <FIG>. Needle probe <NUM> thus desirably has as low an impedance as possible. Suitable probe tips are commercially available.

Resonator probe <NUM> further includes an inductor <NUM> and a capacitor <NUM> connected to the needle probe <NUM>. Resonator probe <NUM> thus includes an LC circuit as described with reference to electrical resonator unit <NUM> of <FIG>.

In this example, capacitor <NUM> is a variable capacitor, more specifically, a varactor. Varactors may also be referred to in the art as varicap diodes, variable capacitance diodes, variable reactance diodes, or tuning diodes. Varactor <NUM> is connected to a variable DC bias source, Vt. Although such a variable DC bias source is shown in <FIG>, the variable voltage source does not necessarily form part of the probe, and the varactor <NUM> may be removably connected to the DC bias source Vt by appropriate wiring or transmission lines. Varying the DC bias source voltage causes the capacitance of varactor <NUM> to change, thereby changing the resonance frequency of the LC circuit. The LC circuit included in this example is thus a tuneable LC circuit.

The resonator probe <NUM> may be connectable to an IO unit, as previously described. In the illustrated example, the connection is via a coaxial cable <NUM>. Coaxial cable <NUM> allows electrical signals to be sent to and from the needle probe <NUM>. Any type of connection may be used.

In use, resonator probe <NUM> is used in conjunction with a passive needle probe. The passive needle probe may comprise, or be connected to, a resistor. The passive needle probe may act as a high impedance contact <NUM> as described with reference to <FIG>. The resonator probe <NUM> is brought into electrical contact with one of the source, the gate, and the drain of the semiconductor device, e.g. touched on a source terminal of the semiconductor device, or an associated transmission line e.g. PCB trace. At the same time, the passive needle probe is brought into electrical contact with another terminal, which may be the source if the resonator probe connects to the drain or the gate, or may be the drain if the resonator probe connects to the source or the gate. This forms a circuit as illustrated in <FIG>.

The resonator probe may be configured to allow a gate voltage to be applied via the resonator probe. Alternatively, the resonator probe may be used in conjunction with one or more further probe(s) for applying a voltage to the gate of the semiconductor device.

More generally, according to one aspect disclosed herein, there is provided a method of determining a gate capacitance of a semiconductor device having a source, a drain, a gate, and a channel, the semiconductor device being arranged in a circuit further comprising an electrical resonator, wherein one of the source, the drain, and the gate (this case not covered by the claimed invention) is connected to the electrical resonator; the method comprising: measuring a resonance frequency of the circuit; and calculating, based on the resonance frequency, the gate capacitance. Since the electrical resonator is in electrical communication with the source of the semiconductor device, the gate capacitance of the electrical resonator changes the resonance frequency of the electrical resonator. The gate capacitance may therefore be calculated based on the resonance frequency of the system.

The source, the drain, or the gate (this case not covered by the claimed invention) are connected directly to the electrical resonator. In other words, there may be no components other than a connector such as a transmission line or probe between the electrical resonator and the source, drain or gate. The electrical resonator connects to exactly one of the source, the drain, and the gate (this case not covered by the claimed invention).

Measuring the resonance frequency may comprise sending a probe signal having a frequency to the circuit, monitoring the amplitude and/or the phase of a response signal from the circuit, and identifying the resonance frequency based on a change of the amplitude and/or phase. A difference in phase between the response signal and the probe signal may be measured. In some circumstances, resonance may produce a small amplitude change but a large phase change or vice versa, therefore monitoring both amplitude and phase may be preferred.

Measuring the resonance frequency may include varying the frequency of the probe signal. Alternatively or additionally, the electrical resonator may be a tuneable electrical resonator, and measuring the resonance frequency may include tuning the electrical resonator.

The frequency of the probe signal and/or the tuning of the electrical resonator may be varied during the measuring. Varying both the tuning of the electrical resonator and the frequency of the probe signal may allow for greater dynamic range than varying only one of the tuning and the frequency.

Still another example step for measuring the resonance frequency comprises may comprise sending a probe signal having a frequency to the circuit; measuring a difference in phase between the probe signal and a response signal received from the circuit; and calculating the resonance frequency based on the difference in phase. In such examples, the probe signal may have a fixed frequency and the electrical resonator may have a fixed tuning. This may allow for rapid determination of the resonance frequency.

The probe signal may have a frequency in the range <NUM> to <NUM>, for example, <NUM> to <NUM>. The probe signal frequency may be selected as desired based, for example, on the nature of the electrical resonator.

In implementations where the electrical resonator is an LC resonator, the probe signal typically has a frequency in the range <NUM> to <NUM>. For an LC resonator, probe signal frequencies in the range <NUM> to <NUM>, optionally <NUM> to <NUM>, further optionally <NUM> to <NUM>, may allow for improved performance in comparison with resonance frequencies above <NUM>.

In implementations where the resonator is a transmission line resonator, the probe signal may have a frequency in the range <NUM> to <NUM>, for example.

Varying the frequency of the probe signal may comprise performing a scan. The scan may comprise varying the frequency of the probe signal in increments having a size in the range <NUM> and <NUM>. The span of the scan, i.e., the width of the frequency range scanned, may be in the range <NUM> to <NUM>. Calibrating the circuit may comprise scanning a frequency range with a larger span.

The nature of the semiconductor device is not particularly limited. The semiconductor device may, for example, comprise a semiconductor-superconductor hybrid device. Example <NUM> shows that the present method is applicable to such devices are presented herein. Other examples of semiconductor devices which may be investigated include field-effect transistors, such as MOSFETs.

Typically, the semiconductor device is not a quantum dot device. Gate capacitance is a type of 'classical', or geometrical, capacitance, and not a quantum capacitance. Measuring gate capacitance typically does not comprise measuring a readout of the state of a quantum bit.

According to the invention the electrical resonator is connected to one of the source and the drain of the semiconductor device, and the other of the source and the drain is connected to a high impedance contact. In examples where the electrical resonator is connected to the gate of the semiconductor device (examples not covered by the claimed invention), one or both of the source and drain may be connected to a respective high-impedance contact. The high-impedance contact(s) may minimise the flow of current from the source to the drain of the semiconductor device, thereby allowing for more precise measurement of the gate capacitance.

A high-impedance contact may be selected from a tunnel junction; a resistor having a resistance greater than or equal to <NUM> MΩ, optionally <NUM> MΩ; and a transistor, optionally a field-effect transistor, in an off state. In implementations where the high impedance contact comprises a transistor, the method comprises gating the transistor such that the transistor is in an off state during the measuring.

The use of a transistor as the high-impedance contact may allow for easier measurement of the conductance of the channel of the semiconductor device.

The method may include applying a gate voltage to the gate, and identifying the resonance frequency of the circuit while applying the gate voltage. The method may comprise measuring two or more gate capacitances at two or more different gate voltages.

The method may include calibrating the circuit by applying a gate voltage selected such that the channel of the semiconductor device is non-conductive, and identifying the resonance frequency of the circuit while applying the gate voltage. Gate capacitance may be assumed to be zero when the channel is non-conductive.

The gate voltage for calibrating the circuit may be identified from conductance measurements. Alternatively, resonance frequency may be measured at a plurality of different gate voltages to identify a maximum resonance frequency. Gate capacitance may be assumed to be <NUM> when the resonance frequency is at a maximum.

The gate voltage may be varied as a function of time during the identifying. For example, the gate voltage may be cyclically varied. Providing a gate voltage which changes with time may allow the performance of a gate dielectric arranged between the gate and the channel to be investigated. Charge trapping by the gate dielectric may cause the gate capacitance to vary.

The calculating may be performed by a computer comprising a processing unit operably linked to a data storage, the data storage containing computer program code instructions configured to cause the processor to calculate a value of the gate capacitance based on the resonance frequency.

The method may further comprise measuring a conductance of the semiconductor device. In such implementations, the method may further comprise calculating, based on the gate capacitance and the conductance, charge mobility in the semiconductor device. The charge mobility may be a field-effect charge mobility.

Measuring conductance generally comprises applying a DC voltage across the source and drain of the semiconductor device, and measuring current through the channel of the semiconductor device.

Electrical resonators typically have a low resistance, and conductance may be measured when the semiconductor device is in series with the electrical resonator.

In implementations where the high impedance contact is a transistor in an off state, conductance may be measured when the transistor is in an on state.

The method may further comprise performing a further measurement of gate capacitance of the semiconductor device, wherein the further measurement is selected from a capacitance bridge measurement, a coulomb blockade measurement, and a capacitance-voltage measurement. The further measurement may be performed before measuring the gate capacitance using the method of the present disclosure, in order to obtain an estimate of the gate capacitance. This may allow for, for example, optimization of the range of probe signal frequencies to allow for faster measurement of gate capacitance using the more precise method provided herein.

The electrical resonator may be removably connected to the semiconductor device. The method may include, after identifying the resonance frequency, disconnecting the electrical resonator from the semiconductor device.

In implementations where the electrical resonator is removably connected to the semiconductor device, the method may further comprise identifying the resonance frequency of the electrical resonator before arranging the electrical resonator in the circuit.

The electrical resonator may be permanently connected to the semiconductor device. For example, the electrical resonator may be integrated onto the same chip as the semiconductor device, or connected to the semiconductor device by wire bonding.

The nature of the electrical resonator is not particularly limited and may be selected as appropriate. The electrical resonator may be a superconductor resonator. More generally, the circuit may comprise superconductor components, normal-conductor components, or any combination of superconductors and normal conductors.

The electrical resonator may be an LC circuit comprising an inductor and a capacitance. For an LC circuit, resonance frequency may vary approximately linearly with gate capacitance.

The capacitance of the LC circuit may be a parasitic capacitance. Alternatively, the capacitance may be provided by a capacitor. The capacitor may be a variable capacitor, such as a varactor.

The electrical resonator may be a tuneable electrical resonator. An LC circuit which includes a variable capacitor is one example of a tuneable electrical resonator.

Another illustrative type of electrical resonator is a transmission line resonator. The principles explained herein are also applicable to transmission line resonators.

In another aspect, there is provided an apparatus for measuring a gate capacitance of a semiconductor device, the semiconductor device having a having a source, a drain, a gate, and a channel; which apparatus comprises: a signal generator capable of providing a probe signal to an electrical resonator; a sensor capable of sensing the amplitude and/or phase of a response signal from the electrical resonator; a processing unit operably linked to the signal generator and the sensor; and a memory unit operably linked to the processing unit, wherein the memory unit stores computer program code, the computer program code being executable by the processing unit; wherein the computer program code comprises: a control module for causing the processing unit to control the signal generator; an identification module for causing the processing unit to identify, based on an input from the sensor, a resonance frequency of a circuit comprising the electrical resonator; a calculation module for causing the processing unit to calculate, based on the resonance frequency, the gate capacitance of the semiconductor device; and an output generation module for generating an output identifying the gate capacitance. The apparatus may be useful for practising the method described herein.

The circuit comprises the electrical resonator connected to one of the source, the (cae not covered by the claimed invention), and the drain of the semiconductor device.

The apparatus includes the electrical resonator. In such implementations, the electrical resonator may be connectable to a semiconductor device. Alternatively, the apparatus may be removably connectable to the electrical resonator. For example, the apparatus may be configured to connect to an electrical resonator which is permanently connected to the semiconductor device.

The electrical resonator may be as described above with reference to the method aspect. The electrical resonator may be a superconductor resonator.

The electrical resonator may be an LC circuit. The capacitance of the LC circuit may be a parasitic capacitance, or may be provided by a capacitor such as a variable capacitor.

The control module and identification module may be configured to cause the apparatus to identify the resonance frequency of the electrical resonator, by sending a probe signal to the resonator using the signal generator, monitoring the amplitude of a response signal from the electrical resonator using the sensor, and identifying when the amplitude is a maximum amplitude. One or more of the frequency of the probe signal, the tuning of the electrical resonator, and the gate voltage may be varied in order to obtain the maximum amplitude, as previously described with reference to the method aspect.

The calculation module may calculate the gate capacitance based on the identified resonance frequency, e.g. using the principles explained with reference to <FIG>.

The output generation module may be configured to generate any appropriate form of output. The output may comprise storing data encoding the gate capacitance in the data storage, generating a graphical representation (e.g., text or a graph) for display to a human user, and/or piping the gate capacitance value to a further computer program.

A module may be any portion computer program code configured to cause the processing unit to perform the relevant function.

The apparatus may include a DC bias source for applying a gate voltage to the gate of the semiconductor device. The DC bias source may be a variable DC source. In implementations where the apparatus includes a DC bias source, the computer program code may further comprise a gate voltage control module for causing the processing unit to control the DC bias source to apply a gate voltage to the gate. The computer program code may be configured to cause the apparatus to measure gate capacitance at two or more different gate voltages, or to vary gate voltage during measurements, as previously described with reference to the method aspect.

Alternatively or additionally, the apparatus may include a voltage sensor for sensing a gate voltage. The computer program code may include a voltage sensor monitoring module, for causing the processing unit to identify a gate voltage using the voltage sensor.

In implementations where the apparatus includes, or is configured to connect to, a tuneable electrical resonator, the apparatus may further comprise hardware for tuning the electrical resonator along with computer program code for controlling operation of that hardware. For example, if the tuneable electrical resonator comprises a varactor, the apparatus may include a DC bias source for applying a bias voltage to the varactor.

The apparatus may further comprise a unit for measuring conductance of the semiconductor device.

The unit for measuring conductance unit may be controlled by an appropriate computer program code module. The computer program code may further comprise a module for determining, based on the conductance value and the gate capacitance value, charge mobility in the device.

The apparatus may comprise a mechanical probe station, further comprising first and second needle probes. The first needle probe may be a resonator probe, and the second needle probe may be a passive needle probe. Alternatively, both the first needle probe and the second needle probe may be passive needle probes.

A related aspect provides a probe for measuring a gate capacitance. The probe is configured to be connectable to an apparatus, such as the apparatus as described with reference to the previous aspect, to receive a probe signal from the apparatus and to provide a response signal from the LC circuit to the apparatus.

The probe may comprise a needle probe, an inductor, and a capacitor. The needle probe, inductor, and capacitor are configured as an LC circuit. A probe comprising an LC circuit is referred to herein as a resonator probe.

The capacitor may be a varactor. In implementations where a varactor is used, the LC circuit is tuneable by applying a DC bias to the varactor thereby varying its capacitance and hence, the resonance frequency of the LC circuit.

The resonator probe may be used in combination with a high-impedance probe. The high-impedance probe may comprise a needle probe and a resistor having a resistance of greater than or equal to <NUM> MΩ, e.g. greater than or equal to <NUM> MΩ.

Alternatively, the resonator probe may be used in combination with a variable-impedance probe comprising a needle probe and a transistor. In use, the transistor is gated to an "off" state during measurement of gate capacitance. The variable impedance probe may also be used to measure conductance, by gating the transistor to an "on" state.

A further related aspect provides a use of the above-described probe in the measurement of a gate capacitance of a semiconductor device, the semiconductor device having a having a source, a drain, a gate, and a channel.

Another aspect provides a computer program product comprising computer program code which, when executed by a processor, causes the processor to: process an input to identify a resonance frequency of a circuit comprising an electrical resonator; calculate, based on the resonance frequency, a gate capacitance; and generate an output identifying the gate capacitance. The computer program product may be embodied on a non-transitory computer readable medium. A related aspect provides a computer readable storage medium having stored thereon the computer program product.

The circuit may comprise the electrical resonator connected to one of the source, the gate, and the drain of the semiconductor device.

The input may be received from a sensor, read from a data storage, received over a network, received from another computer program, or entered by a user.

Calculating the gate capacitance from the resonance frequency may comprise applying the principles described hereinabove.

The output may comprise storing data encoding the gate capacitance in the data storage, generating a graphical representation (e.g., text or a graph) for display to a human user, and/or piping the gate capacitance value to a further computer program.

The computer program may comprise the computer program code described with reference to the apparatus aspect.

In order to demonstrate that the gate capacitance of a semiconductor hybrid device may be measured using the method of the present disclosure, measurements were performed on an illustrative device. A scanning electron microscopy, SEM, micrograph of the device is shown in <FIG>.

The illustrative device includes a nanowire <NUM> of semiconductor material which is gated by a set of finger gates 602a to 602e. Gate capacitance is formed in the region <NUM> when an electrostatic field is applied to the nanowire <NUM> using one or more of the finger gates 602a to 602e. The area of the nanowire <NUM> which was in contact with each of the finger gates 602a to 602e had dimensions of approximately <NUM> x <NUM>.

In order to measure the gate capacitance, a contact pad of the device was connected to an LC resonator. The resonance frequency of the LC resonator was measured with a varying number of active finger gates. The results of this investigation are shown in a <FIG>.

As may be seen from <FIG>, changes in gate capacitance as a result of opening the finger gates were detected as changes in the resonance frequency of the LC circuit. As is shown in <FIG>, changes in the capacitance were of the order of <NUM> attofarads, and differences of this size were easily measurable. The inventors believe that a sensitivity of <NUM> attofarad is achievable using the present method.

Simulations were performed to estimate the accuracy of the method provided herein. The simulated system is illustrated in <FIG>. Capacitance, resistance and inductance values used for the simulation were based on the test device discussed in Example <NUM> and are thus believed to reflect real-world conditions.

Capacitance values were calculated on the basis of resonance frequency, and plotted against the true gate capacitance of the simulated system. The result of this are shown in <FIG>.

As may be seen from the figure, very good agreement between the reconstructed capacitance and the true capacitance was obtained. Systematic errors were estimated to be less than <NUM>%.

A corresponding plot of relative error between the reconstructed and true values against the true capacitance is provided in <FIG>. For values in the femtofarad range or smaller, relative errors were very small. Gate capacitances in the devices of interest generally fall within this range.

Claim 1:
A method of determining a gate capacitance of a semiconductor device (<NUM>) having a source, a drain, a gate, and a channel,
the semiconductor device (<NUM>) being arranged in a circuit (<NUM>) further comprising an electrical resonator (<NUM>), wherein one of the source and the drain is connected to the electrical resonator (<NUM>), and the other of the source and the drain is connected to a high-impedance contact (<NUM>), the high-impedance contact (<NUM>) being selected from a tunnel junction, a resistor having a resistance greater than or equal to <NUM> MΩ, and a transistor in an off state;
the method comprising:
measuring (<NUM>) a resonance frequency of the circuit; and
calculating (<NUM>), based on the resonance frequency, the gate capacitance.