Patent Description:
Video coding (video encoding and decoding) is used in a wide range of digital video applications, for example broadcast digital TV, video transmission over internet and mobile networks, real-time conversational applications such as video chat, video conferencing, DVD and Blu-ray discs, video content acquisition and editing systems, and camcorders of security applications.

Since the development of the block-based hybrid video coding approach in the H. <NUM> standard in <NUM>, new video coding techniques and tools were developed and formed the basis for new video coding standards. Further video coding standards comprise MPEG-<NUM> video, MPEG-<NUM> video, ITU-T H. <NUM>/MPEG-<NUM>, ITU-T H. <NUM>, ITU-T H. <NUM>/High Efficiency Video Coding (HEVC), ITU-T H. <NUM>/Versatile video coding (WC) and extensions, e.g. scalability and/or three-dimensional (3D) extensions, of these standards. As the video creation and use have become more and more ubiquitous, video traffic is the biggest load on communication networks and data storage, accordingly, one of the goals of most of the video coding standards was to achieve a bitrate reduction compared to its predecessor without sacrificing picture quality. Even the latest High Efficiency video coding (HEVC) can compress video about twice as much as AVC without sacrificing quality. and there is a need to further compress videos compared with HEVC. Document JVET-K0104 discloses a history-based motion vector prediction method for inter coding. US patent application <CIT> relates to a method and apparatus of video coding for a block of depth data or texture data coded in SSM (Single Sample Mode). Embodiments according to the invention construct a sample candidate list comprising one or more single color candidates corresponding to one or more representative samples of one or more previous SSM-coded blocks, or one or more palette color candidates corresponding to one or more previously used colors in one or more previous palettes associated with one or more palette-coded blocks, or both. A selected sample candidate is then determined from the sample candidate list and the selected sample candidate is used to encode or decode the current block by representing the whole current block by this selected sample candidate. Spatial and/or temporal candidates from previously S SM-coded blocks can also be included in the sample candidate list.

Embodiments of the present application provide a video processing method and a corresponding apparatus, so as to improve coding efficiency.

A first aspect of the present invention provides a video processing method, comprising: at the beginning of processing each coding tree unit, CTU, row of a picture area that consists of a plurality of CTU rows, initializing a history-based Motion Vector Prediction, HMVP, list for each of the plurality of CTU rows, wherein the initialized HMVP lists are empty, wherein every CTU row is maintained with a different HMVP list; processing the plurality of CTU rows based on the HMVP lists, wherein a current CTU row of the plurality of CTU rows is processed based on a HMVP list initialized for the current CTU row.

It can be seen that the HMVP list for the current CTU row is initialized at the beginning for processing the current CTU row, the process of the current CTU row does not need to base on an HMVP list of a previous CTU row, and thus can improve the encoding efficiency and the decoding efficiency.

With reference to the first aspect, in a first possible implementation manner of the first aspect, the quantity of the candidate motion vectors in the initialized HMVP list is zero.

With reference to the first aspect of or any one of the afore mentioned implementation manners of the first aspect, in a second possible implementation manner of the first aspect, the current CTU row belongs to a picture area that consists of a plurality of CTU rows, and the current CTU row is any one of the plurality of CTU rows, e.g. the first (e.g. top) CTU row, the second CTU row,. and the last (e.g. bottom) CTU row of the picture area.

With reference to the first aspect of or any one of the afore mentioned implementation manners of the first aspect, in a third possible implementation manner of the first aspect, the method further comprises: initializing a HMVP list for each of the plurality of CTU rows except the current CTU row, wherein HMVP lists for the plurality of CTU rows are identical or different. In other words, embodiments may additionally initialize HMVP lists for all other CTU rows of the picture area, i.e. may initialize HMVP lists for all CTU rows of the picture area.

With reference to the first aspect of or any one of the afore mentioned implementation manners of the first aspect, in a fourth possible implementation manner of the first aspect, the processing the current CTU row based on the HMVP list comprises: processing the current CTU of the current CTU row; updating the initialized HMVP list based on the processed current CTU; and processing the second CTU of the current CTU row based on the updated HMVP list.

With reference to the first aspect of or any one of the afore mentioned implementation manners of the first aspect, in a fifth possible implementation manner of the first aspect, the HMVP list is updated according to a processed CTU of the current CTU row.

With reference to the first aspect of or any one of the afore mentioned implementation manners of the first aspect, in a sixth possible implementation manner of the first aspect, the HMVP list for the current CTU row is initialized as follows: emptying the HMVP list for the current CTU row.

With reference to the first aspect of or any one of the afore mentioned implementation manners of the first aspect, in a seventh possible implementation manner of the first aspect, the processing the current CTU row based on the HMVP list comprises: processing the current CTU row based on the HMVP list from the second CTU of the current CTU row, wherein the second CTU is adjacent to the beginning CTU.

With reference to the first aspect of or any one of the afore mentioned implementation manners of the first aspect, in an eighth possible implementation manner of the first aspect, the plurality of CTU rows are processed in wavefront parallel processing (WPP) mode.

It can be seen that, as the HMVP list for the current CTU row is initialized at the beginning for processing the current CTU row, when combining with WPP mode, the CTU rows of a picture frame or a picture area can be processed in parallel, and thus can further improve encoding efficiency and decoding efficiency.

With reference to the first aspect of or any one of the afore mentioned implementation manners of the first aspect, in a ninth possible implementation manner of the first aspect, current CTU row is begin to be processed (or the processing of the current CTU row begins) when a particular CTU of a previous CTU row is processed.

With reference to the first aspect of or any one of the afore mentioned implementation manners of the first aspect, in a tenth possible implementation manner of the first aspect, the previous CTU row is the CTU row immediately adjacent to the current CTU row and on top of or above the current CTU row.

With reference to the ninth implementation manner of the first aspect of or the tenth implementation manner of the first aspect, in a eleventh possible implementation manner of the first aspect, the particular CTU of the previous CTU row is the second CTU of the previous CTU row; or the particular CTU of the previous CTU row is the first CTU of the previous CTU row.

A second aspect of the present invention provides a computer-readable storage medium storing computer instructions, that when executed by one or more processors, cause the one or more processors to perform the method according to the first aspect or any one of the implementation manners of the first aspect.

A third aspect of the present invention provides a decoder, comprising: one or more processors; and a non-transitory computer-readable storage medium coupled to the processors and storing programming for execution by the processors, wherein the programming, when executed by the processors, configures the decoder to carry out the method according to the first aspect or any one of the implementation manners of the first aspect.

A fourth aspect of the present invention provides an encoder, comprising: one or more processors; and a non-transitory computer-readable storage medium coupled to the processors and storing programming for execution by the processors, wherein the programming, when executed by the processors, configures the encoder to carry out the method according to the first aspect or any one of the implementation manners of the first aspect,.

In the following identical reference signs refer to identical or at least functionally equivalent features if there is no specific note regarding to the difference of those identical reference signs.

In the following description, reference is made to the accompanying figures, which form part of the disclosure, and which show, by way of illustration, specific aspects of embodiments of the invention or specific aspects in which embodiments of the present invention may be used. It is understood that embodiments of the invention may be used in other aspects and comprise structural or logical changes not depicted in the figures. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims.

Video coding typically refers to the processing of a sequence of pictures, which form the video or video sequence. Instead of the term "picture" the term "frame" or "image" may be used as synonyms in the field of video coding. Video coding used in the present application (or present disclosure) indicates either video encoding or video decoding. Video encoding is performed at the source side, typically comprising processing (e.g. by compression) the original video pictures to reduce the amount of data required for representing the video pictures (for more efficient storage and/or transmission). Video decoding is performed at the destination side and typically comprises the inverse processing compared to the encoder to reconstruct the video pictures. Embodiments referring to "coding" of video pictures (or pictures in general, as will be explained later) shall be understood to relate to either "encoding" or "decoding" for video sequence. The combination of the encoding part and the decoding part is also referred to as CODEC (Coding and Decoding).

In case of lossless video coding, the original video pictures can be reconstructed, i.e. the reconstructed video pictures have the same quality as the original video pictures (assuming no transmission loss or other data loss during storage or transmission). In case of lossy video coding, further compression, e.g. by quantization, is performed, to reduce the amount of data representing the video pictures, which cannot be completely reconstructed at the decoder, i.e. the quality of the reconstructed video pictures is lower or worse compared to the quality of the original video pictures.

Several video coding standards since H. <NUM> belong to the group of "lossy hybrid video codecs" (i.e. combine spatial and temporal prediction in the sample domain and 2D transform coding for applying quantization in the transform domain). Each picture of a video sequence is typically partitioned into a set of non-overlapping blocks and the coding is typically performed on a block level. In other words, at the encoder the video is typically processed, i.e. encoded, on a block (video block) level, e.g. by using spatial (intra picture) prediction and temporal (inter picture) prediction to generate a prediction block, subtracting the prediction block from the current block (block currently processed/to be processed) to obtain a residual block, transforming the residual block and quantizing the residual block in the transform domain to reduce the amount of data to be transmitted (compression), whereas at the decoder the inverse processing compared to the encoder is partially applied to the encoded or compressed block to reconstruct the current block for representation. Furthermore, the encoder duplicates the decoder processing loop such that both will generate identical predictions (e.g. intra- and inter predictions) and/or re-constructions for processing, i.e. coding, the subsequent blocks.

As used herein, the term "block" may a portion of a picture or a frame. For convenience of description, embodiments of the invention are described herein in reference to High-Efficiency Video Coding (HEVC) or the reference software of Versatile video coding (WC), developed by the Joint Collaboration Team on Video Coding (JCT-VC) of ITU-T Video Coding Experts Group (VCEG) and ISO/IEC Motion Picture Experts Group (MPEG). One of ordinary skill in the art will understand that embodiments of the invention are not limited to HEVC or VVC. It may refer to a CU, PU, and TU. In HEVC, a CTU is split into CUs by using a quad-tree structure denoted as coding tree. The decision whether to code a picture area using inter-picture (temporal) or intra-picture (spatial) prediction is made at the CU level. Each CU can be further split into one, two or four PUs according to the PU splitting type. Inside one PU, the same prediction process is applied and the relevant information is transmitted to the decoder on a PU basis. After obtaining the residual block by applying the prediction process based on the PU splitting type, a CU can be partitioned into transform units (TUs) according to another quadtree structure similar to the coding tree for the CU. In the newest development of the video compression technical, Quadtree and binary tree (QTBT) partitioning frame is used to partition a coding block. In the QTBT block structure, a CU can have either a square or rectangular shape. For example, a coding tree unit (CTU) is first partitioned by a quadtree structure. The quadtree leaf nodes are further partitioned by a binary tree structure. The binary tree leaf nodes are called coding units (CUs), and that segmentation is used for prediction and transform processing without any further partitioning. This means that the CU, PU and TU have the same block size in the QTBT coding block structure. In parallel, multiply partition, for example, triple tree partition was also proposed to be used together with the QTBT block structure.

In the following embodiments of an encoder <NUM>, a decoder <NUM> and a coding system <NUM> are described based on <FIG>.

<FIG> is a conceptional or schematic block diagram illustrating an example coding system <NUM>, e.g. a video coding system <NUM> that may utilize techniques of this present application (present disclosure). Encoder <NUM>(e.g. Video encoder <NUM>) and decoder <NUM>(e.g. video decoder <NUM>) of video coding system <NUM> represent examples of devices that may be configured to perform techniques in accordance with various examples described in the present application. As shown in <FIG>, the coding system <NUM> comprises a source device <NUM> configured to provide encoded data <NUM>, e.g. an encoded picture <NUM>, e.g. to a destination device <NUM> for decoding the encoded data <NUM>.

The source device <NUM> comprises an encoder <NUM>, and may additionally, i.e. optionally, comprise a picture source <NUM>, a pre-processing unit <NUM>, e.g. a picture pre-processing unit <NUM>, and a communication interface or communication unit <NUM>.

The picture source <NUM> may comprise or be any kind of picture capturing device, for example for capturing a real-world picture, and/or any kind of a picture or comment (for screen content coding, some texts on the screen is also considered a part of a picture or image to be encoded) generating device, for example a computer-graphics processor for generating a computer animated picture, or any kind of device for obtaining and/or providing a real-world picture, a computer animated picture (e.g. a screen content, a virtual reality (VR) picture) and/or any combination thereof (e.g. an augmented reality (AR) picture).

A (digital) picture is or can be regarded as a two-dimensional array or matrix of samples with intensity values. A sample in the array may also be referred to as pixel (short form of picture element) or a pel. The number of samples in horizontal and vertical direction (or axis) of the array or picture define the size and/or resolution of the picture. For representation of color, typically three color components are employed, i.e. the picture may be represented or include three sample arrays. In RBG format or color space a picture comprises a corresponding red, green and blue sample array. However, in video coding each pixel is typically represented in a luminance/chrominance format or color space, e.g. YCbCr, which comprises a luminance component indicated by Y (sometimes also L is used instead) and two chrominance components indicated by Cb and Cr. The luminance (or short luma) component Y represents the brightness or grey level intensity (e.g. like in a grey-scale picture), while the two chrominance (or short chroma) components Cb and Cr represent the chromaticity or color information components. Accordingly, a picture in YCbCr format comprises a luminance sample array of luminance sample values (Y), and two chrominance sample arrays of chrominance values (Cb and Cr). Pictures in RGB format may be converted or transformed into YCbCr format and vice versa, the process is also known as color transformation or conversion. If a picture is monochrome, the picture may comprise only a luminance sample array.

In monochrome sampling there is only one sample array, which is nominally considered the luma array.

In <NUM>:<NUM>:<NUM> sampling, each of the two chroma arrays has half the height and half the width of the luma array.

In <NUM>:<NUM>:<NUM> sampling, each of the two chroma arrays has the same height and half the width of the luma array.

In <NUM>:<NUM>:<NUM> sampling, depending on the value of separate_colour_plane_flag, the following applies:.

The picture source <NUM>(e.g. video source <NUM>) may be, for example a camera for capturing a picture, a memory, e.g. a picture memory, comprising or storing a previously captured or generated picture, and/or any kind of interface (internal or external) to obtain or receive a picture. The camera may be, for example, a local or integrated camera integrated in the source device, the memory may be a local or integrated memory, e.g. integrated in the source device. The interface may be, for example, an external interface to receive a picture from an external video source, for example an external picture capturing device like a camera, an external memory, or an external picture generating device, for example an external computer-graphics processor, computer or server. The interface can be any kind of interface, e.g. a wired or wireless interface, an optical interface, according to any proprietary or standardized interface protocol. The interface for obtaining the picture data <NUM> may be the same interface as or a part of the communication interface <NUM>.

In distinction to the pre-processing unit <NUM> and the processing performed by the pre-processing unit <NUM>, the picture or picture data <NUM>(e.g. video data <NUM>) may also be referred to as raw picture or raw picture data <NUM>.

Pre-processing unit <NUM> is configured to receive the (raw) picture data <NUM> and to perform pre-processing on the picture data <NUM> to obtain a pre-processed picture <NUM> or pre-processed picture data <NUM>. Pre-processing performed by the pre-processing unit <NUM> may, e.g., comprise trimming, color format conversion (e.g. from RGB to YCbCr), color correction, or de-noising. It can be understood that the pre-processing unit <NUM> may be optional component.

The encoder <NUM> (e.g. video encoder <NUM>) is configured to receive the pre-processed picture data <NUM> and provide encoded picture data <NUM> (further details will be described below, e.g., based on <FIG> or <FIG>).

Communication interface <NUM> of the source device <NUM> may be configured to receive the encoded picture data <NUM> and to transmit it to another device, e.g. the destination device <NUM> or any other device, for storage or direct reconstruction, or to process the encoded picture data <NUM> for respectively before storing the encoded data <NUM> and/or transmitting the encoded data <NUM> to another device, e.g. the destination device <NUM> or any other device for decoding or storing.

The destination device <NUM> comprises a decoder <NUM> (e.g. a video decoder <NUM>), and may additionally, i.e. optionally, comprise a communication interface or communication unit <NUM>, a post-processing unit <NUM> and a display device <NUM>.

The communication interface <NUM> of the destination device <NUM> is configured receive the encoded picture data <NUM> or the encoded data <NUM>, e.g. directly from the source device <NUM> or from any other source, e.g. a storage device, e.g. an encoded picture data storage device.

The communication interface <NUM> and the communication interface <NUM> may be configured to transmit or receive the encoded picture data <NUM> or encoded data <NUM> via a direct communication link between the source device <NUM> and the destination device <NUM>, e.g. a direct wired or wireless connection, or via any kind of network, e.g. a wired or wireless network or any combination thereof, or any kind of private and public network, or any kind of combination thereof.

The communication interface <NUM> may be, e.g., configured to package the encoded picture data <NUM> into an appropriate format, e.g. packets, for transmission over a communication link or communication network.

The communication interface <NUM>, forming the counterpart of the communication interface <NUM>, may be, e.g., configured to de-package the encoded data <NUM> to obtain the encoded picture data <NUM>.

Both, communication interface <NUM> and communication interface <NUM> may be configured as unidirectional communication interfaces as indicated by the arrow for the encoded picture data <NUM> in <FIG> pointing from the source device <NUM> to the destination device <NUM>, or bi-directional communication interfaces, and may be configured, e.g. to send and receive messages, e.g. to set up a connection, to acknowledge and exchange any other information related to the communication link and/or data transmission, e.g. encoded picture data transmission.

The decoder <NUM> is configured to receive the encoded picture data <NUM> and provide decoded picture data <NUM> or a decoded picture <NUM> (further details will be described below, e.g., based on <FIG> or <FIG>).

The post-processor <NUM> of destination device <NUM> is configured to post-process the decoded picture data <NUM> (also called reconstructed picture data), e.g. the decoded picture <NUM>, to obtain post-processed picture data <NUM>, e.g. a post-processed picture <NUM>. The post-processing performed by the post-processing unit <NUM> may comprise, e.g. color format conversion (e.g. from YCbCr to RGB), color correction, trimming, or re-sampling, or any other processing, e.g. for preparing the decoded picture data <NUM> for display, e.g. by display device <NUM>.

The display device <NUM> of the destination device <NUM> is configured to receive the post-processed picture data <NUM> for displaying the picture, e.g. to a user or viewer. The display device <NUM> may be or comprise any kind of display for representing the reconstructed picture, e.g. an integrated or external display or monitor. The displays may, e.g. comprise liquid crystal displays (LCD), organic light emitting diodes (OLED) displays, plasma displays, projectors , micro LED displays, liquid crystal on silicon (LCoS), digital light processor (DLP) or any kind of other display.

Although <FIG> depicts the source device <NUM> and the destination device <NUM> as separate devices, embodiments of devices may also comprise both or both functionalities, the source device <NUM> or corresponding functionality and the destination device <NUM> or corresponding functionality. In such embodiments the source device <NUM> or corresponding functionality and the destination device <NUM> or corresponding functionality may be implemented using the same hardware and/or software or by separate hardware and/or software or any combination thereof.

The encoder <NUM> (e.g. a video encoder <NUM>) and the decoder <NUM> (e.g. a video decoder <NUM>) each may be implemented as any of a variety of suitable circuitry, such as one or more microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), discrete logic, hardware, or any combinations thereof. If the techniques are implemented partially in software, a device may store instructions for the software in a suitable, non-transitory computer-readable storage medium and may execute the instructions in hardware using one or more processors to perform the techniques of this disclosure. Any of the foregoing (including hardware, software, a combination of hardware and software, etc.) may be considered to be one or more processors.

Source device <NUM> may be referred to as a video encoding device or a video encoding apparatus. Destination device <NUM> may be referred to as a video decoding device or a video decoding apparatus. Source device <NUM> and destination device <NUM> may be examples of video coding devices or video coding apparatuses.

Source device <NUM> and destination device <NUM> may comprise any of a wide range of devices, including any kind of handheld or stationary devices, e.g. notebook or laptop computers, mobile phones, smart phones, tablets or tablet computers, cameras, desktop computers, set-top boxes, televisions, display devices, digital media players, video gaming consoles, video streaming devices(such as content services servers or content delivery servers), broadcast receiver device, broadcast transmitter device, or the like and may use no or any kind of operating system.

In some cases, the source device <NUM> and the destination device <NUM> may be equipped for wireless communication. Thus, the source device <NUM> and the destination device <NUM> may be wireless communication devices.

In some cases, video coding system <NUM> illustrated in <FIG> is merely an example and the techniques of the present application may apply to video coding settings (e.g., video encoding or video decoding) that do not necessarily include any data communication between the encoding and decoding devices. In other examples, data is retrieved from a local memory, streamed over a network, or the like. A video encoding device may encode and store data to memory, and/or a video decoding device may retrieve and decode data from memory. In some examples, the encoding and decoding is performed by devices that do not communicate with one another, but simply encode data to memory and/or retrieve and decode data from memory.

It should be understood that, for each of the above examples described with reference to video encoder <NUM>, video decoder <NUM> may be configured to perform a reciprocal process. With regard to signaling syntax elements, video decoder <NUM> may be configured to receive and parse such syntax element and decode the associated video data accordingly. In some examples, video encoder <NUM> may entropy encode one or more syntax elements into the encoded video bitstream. In such examples, video decoder <NUM> may parse such syntax element and decode the associated video data accordingly.

<FIG> is an illustrative diagram of another example video coding system <NUM> including encoder <NUM> of <FIG> and/or decoder <NUM> of <FIG> according to an exemplary embodiment. The system <NUM> can implement techniques in accordance with various examples described in the present application. In the illustrated implementation, video coding system <NUM> may include imaging device(s) <NUM>, video encoder <NUM>, video decoder <NUM> (and/or a video coder implemented via logic circuitry <NUM> of processing unit(s) <NUM>), an antenna <NUM>, one or more processor(s) <NUM>, one or more memory store(s) <NUM>, and/or a display device <NUM>.

As illustrated, imaging device(s) <NUM>, antenna <NUM>, processing unit(s) <NUM>, logic circuitry <NUM>, video encoder <NUM>, video decoder <NUM>, processor(s) <NUM>, memory store(s) <NUM>, and/or display device <NUM> may be capable of communication with one another. As discussed, although illustrated with both video encoder <NUM> and video decoder <NUM>, video coding system <NUM> may include only video encoder <NUM> or only video decoder <NUM> in various examples.

As shown, in some examples, video coding system <NUM> may include antenna <NUM>. Antenna <NUM> may be configured to transmit or receive an encoded bitstream of video data, for example. Further, in some examples, video coding system <NUM> may include display device <NUM>. Display device <NUM> may be configured to present video data. As shown, in some examples, logic circuitry <NUM> may be implemented via processing unit(s) <NUM>. Processing unit(s) <NUM> may include application-specific integrated circuit (ASIC) logic, graphics processor(s), general purpose processor(s), or the like. Video coding system <NUM> also may include optional processor(s) <NUM>, which may similarly include application-specific integrated circuit (ASIC) logic, graphics processor(s), general purpose processor(s), or the like. In some examples, logic circuitry <NUM> may be implemented via hardware, video coding dedicated hardware, or the like, and processor(s) <NUM> may implemented general purpose software, operating systems, or the like. In addition, memory store(s) <NUM> may be any type of memory such as volatile memory (e.g., Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), etc.) or non-volatile memory (e.g., flash memory, etc.), and so forth. In a non-limiting example, memory store(s) <NUM> may be implemented by cache memory. In some examples, logic circuitry <NUM> may access memory store(s) <NUM> (for implementation of an image buffer for example). In other examples, logic circuitry <NUM> and/or processing unit(s) <NUM> may include memory stores (e.g., cache or the like) for the implementation of an image buffer or the like.

In some examples, video encoder <NUM> implemented via logic circuitry may include an image buffer (e.g., via either processing unit(s) <NUM> or memory store(s) <NUM>)) and a graphics processing unit (e.g., via processing unit(s) <NUM>). The graphics processing unit may be communicatively coupled to the image buffer. The graphics processing unit may include video encoder <NUM> as implemented via logic circuitry <NUM> to embody the various modules as discussed with respect to <FIG> and/or any other encoder system or subsystem described herein. The logic circuitry may be configured to perform the various operations as discussed herein.

Video decoder <NUM> may be implemented in a similar manner as implemented via logic circuitry <NUM> to embody the various modules as discussed with respect to decoder <NUM> of <FIG> and/or any other decoder system or subsystem described herein. In some examples, video decoder <NUM> may be implemented via logic circuitry may include an image buffer (e.g., via either processing unit(s) <NUM> or memory store(s) <NUM>)) and a graphics processing unit (e.g., via processing unit(s) <NUM>). The graphics processing unit may be communicatively coupled to the image buffer. The graphics processing unit may include video decoder <NUM> as implemented via logic circuitry <NUM> to embody the various modules as discussed with respect to <FIG> and/or any other decoder system or subsystem described herein.

In some examples, antenna <NUM> of video coding system <NUM> may be configured to receive an encoded bitstream of video data. As discussed, the encoded bitstream may include data, indicators, index values, mode selection data, or the like associated with encoding a video frame as discussed herein, such as data associated with the coding partition (e.g., transform coefficients or quantized transform coefficients, optional indicators (as discussed), and/or data defining the coding partition). Video coding system <NUM> may also include video decoder <NUM> coupled to antenna <NUM> and configured to decode the encoded bitstream. The display device <NUM> configured to present video frames.

<FIG> shows a schematic/conceptual block diagram of an example video encoder <NUM> that is configured to implement the techniques of the present application. In the example of <FIG>, the video encoder <NUM> comprises a residual calculation unit <NUM>, a transform processing unit <NUM>, a quantization unit <NUM>, an inverse quantization unit <NUM>, and inverse transform processing unit <NUM>, a reconstruction unit <NUM>, a buffer <NUM>, a loop filter unit <NUM>, a decoded picture buffer (DPB) <NUM>, a prediction processing unit <NUM> and an entropy encoding unit <NUM>. The prediction processing unit <NUM> may include an inter prediction unit <NUM>, an intra prediction unit <NUM> and a mode selection unit <NUM>. Inter prediction unit <NUM> may include a motion estimation unit and a motion compensation unit (not shown). A video encoder <NUM> as shown in <FIG> may also be referred to as hybrid video encoder or a video encoder according to a hybrid video codec.

For example, the residual calculation unit <NUM>, the transform processing unit <NUM>, the quantization unit <NUM>, the prediction processing unit <NUM> and the entropy encoding unit <NUM> form a forward signal path of the encoder <NUM>, whereas, for example, the inverse quantization unit <NUM>, the inverse transform processing unit <NUM>, the reconstruction unit <NUM>, the buffer <NUM>, the loop filter <NUM>, the decoded picture buffer (DPB) <NUM>, prediction processing unit <NUM> form a backward signal path of the encoder, wherein the backward signal path of the encoder corresponds to the signal path of the decoder (see decoder <NUM> in <FIG>).

The encoder <NUM> is configured to receive, e.g. by input <NUM>, a picture <NUM> or a block <NUM> of the picture <NUM>, e.g. picture of a sequence of pictures forming a video or video sequence. The picture block <NUM> may also be referred to as current picture block or picture block to be coded, and the picture <NUM> as current picture or picture to be coded (in particular in video coding to distinguish the current picture from other pictures, e.g. previously encoded and/or decoded pictures of the same video sequence, i.e. the video sequence which also comprises the current picture).

Embodiments of the encoder <NUM> may comprise a partitioning unit (not depicted in <FIG>) configured to partition the picture <NUM> into a plurality of blocks, e.g. blocks like block <NUM>, typically into a plurality of non-overlapping blocks. The partitioning unit may be configured to use the same block size for all pictures of a video sequence and the corresponding grid defining the block size, or to change the block size between pictures or subsets or groups of pictures, and partition each picture into the corresponding blocks.

In one example, the prediction processing unit <NUM> of video encoder <NUM> may be configured to perform any combination of the partitioning techniques described above.

Like the picture <NUM>, the block <NUM> again is or can be regarded as a two-dimensional array or matrix of samples with intensity values (sample values), although of smaller dimension than the picture <NUM>. In other words, the block <NUM> may comprise, e.g., one sample array (e.g. a luma array in case of a monochrome picture <NUM>) or three sample arrays (e.g. a luma and two chroma arrays in case of a color picture <NUM>) or any other number and/or kind of arrays depending on the color format applied. The number of samples in horizontal and vertical direction (or axis) of the block <NUM> define the size of block <NUM>.

Encoder <NUM> as shown in <FIG> is configured encode the picture <NUM> block by block, e.g. the encoding and prediction is performed per block <NUM>.

The residual calculation unit <NUM> is configured to calculate a residual block <NUM> based on the picture block <NUM> and a prediction block <NUM> (further details about the prediction block <NUM> are provided later), e.g. by subtracting sample values of the prediction block <NUM> from sample values of the picture block <NUM>, sample by sample (pixel by pixel) to obtain the residual block <NUM> in the sample domain.

The transform processing unit <NUM> is configured to apply a transform, e.g. a discrete cosine transform (DCT) or discrete sine transform (DST), on the sample values of the residual block <NUM> to obtain transform coefficients <NUM> in a transform domain. The transform coefficients <NUM> may also be referred to as transform residual coefficients and represent the residual block <NUM> in the transform domain.

The transform processing unit <NUM> may be configured to apply integer approximations of DCT/DST, such as the transforms specified for HEVC/H. Compared to an orthogonal DCT transform, such integer approximations are typically scaled by a certain factor. In order to preserve the norm of the residual block which is processed by forward and inverse transforms, additional scaling factors are applied as part of the transform process. The scaling factors are typically chosen based on certain constraints like scaling factors being a power of two for shift operation, bit depth of the transform coefficients, tradeoff between accuracy and implementation costs, etc. Specific scaling factors are, for example, specified for the inverse transform, e.g. by inverse transform processing unit <NUM>, at a decoder <NUM> (and the corresponding inverse transform, e.g. by inverse transform processing unit <NUM> at an encoder <NUM>) and corresponding scaling factors for the forward transform, e.g. by transform processing unit <NUM>, at an encoder <NUM> may be specified accordingly.

The quantization unit <NUM> is configured to quantize the transform coefficients <NUM> to obtain quantized transform coefficients <NUM>, e.g. by applying scalar quantization or vector quantization. The quantized transform coefficients <NUM> may also be referred to as quantized residual coefficients <NUM>. The quantization process may reduce the bit depth associated with some or all of the transform coefficients <NUM>. For example, an n-bit Transform coefficient may be rounded down to an m-bit Transform coefficient during quantization, where n is greater than m. The degree of quantization may be modified by adjusting a quantization parameter (QP). For example for scalar quantization, different scaling may be applied to achieve finer or coarser quantization. Smaller quantization step sizes correspond to finer quantization, whereas larger quantization step sizes correspond to coarser quantization. The applicable quantization step size may be indicated by a quantization parameter (QP). The quantization parameter may for example be an index to a predefined set of applicable quantization step sizes. For example, small quantization parameters may correspond to fine quantization (small quantization step sizes) and large quantization parameters may correspond to coarse quantization (large quantization step sizes) or vice versa. The quantization may include division by a quantization step size and corresponding or inverse dequantization, e.g. by inverse quantization <NUM>, may include multiplication by the quantization step size. Embodiments according to some standards, e.g. HEVC, may be configured to use a quantization parameter to determine the quantization step size. Generally, the quantization step size may be calculated based on a quantization parameter using a fixed point approximation of an equation including division. Additional scaling factors may be introduced for quantization and dequantization to restore the norm of the residual block, which might get modified because of the scaling used in the fixed point approximation of the equation for quantization step size and quantization parameter. In one example implementation, the scaling of the inverse transform and dequantization might be combined. Alternatively, customized quantization tables may be used and signaled from an encoder to a decoder, e.g. in a bitstream. The quantization is a lossy operation, wherein the loss increases with increasing quantization step sizes.

The inverse quantization unit <NUM> is configured to apply the inverse quantization of the quantization unit <NUM> on the quantized coefficients to obtain dequantized coefficients <NUM>, e.g. by applying the inverse of the quantization scheme applied by the quantization unit <NUM> based on or using the same quantization step size as the quantization unit <NUM>. The dequantized coefficients <NUM> may also be referred to as dequantized residual coefficients <NUM> and correspond - although typically not identical to the transform coefficients due to the loss by quantization - to the transform coefficients <NUM>.

The inverse transform processing unit <NUM> is configured to apply the inverse transform of the transform applied by the transform processing unit <NUM>, e.g. an inverse discrete cosine transform (DCT) or inverse discrete sine transform (DST), to obtain an inverse transform block <NUM> in the sample domain. The inverse transform block <NUM> may also be referred to as inverse transform dequantized block <NUM> or inverse transform residual block <NUM>.

The reconstruction unit <NUM>(e.g. Summer <NUM>) is configured to add the inverse transform block <NUM>(i.e. reconstructed residual block <NUM>) to the prediction block <NUM> to obtain a reconstructed block <NUM> in the sample domain, e.g. by adding the sample values of the reconstructed residual block <NUM> and the sample values of the prediction block <NUM>.

Optional, the buffer unit <NUM> (or short "buffer" <NUM>), e.g. a line buffer <NUM>, is configured to buffer or store the reconstructed block <NUM> and the respective sample values, for example for intra prediction. In further embodiments, the encoder may be configured to use unfiltered reconstructed blocks and/or the respective sample values stored in buffer unit <NUM> for any kind of estimation and/or prediction, e.g. intra prediction.

Embodiments of the encoder <NUM> may be configured such that, e.g. the buffer unit <NUM> is not only used for storing the reconstructed blocks <NUM> for intra prediction <NUM> but also for the loop filter unit <NUM> (not shown in <FIG>), and/or such that, e.g. the buffer unit <NUM> and the decoded picture buffer unit <NUM> form one buffer. Further embodiments may be configured to use filtered blocks <NUM> and/or blocks or samples from the decoded picture buffer <NUM> (both not shown in <FIG>) as input or basis for intra prediction <NUM>.

The loop filter unit <NUM> (or short "loop filter" <NUM>), is configured to filter the reconstructed block <NUM> to obtain a filtered block <NUM>, e.g. to smooth pixel transitions, or otherwise improve the video quality. The loop filter unit <NUM> is intended to represent one or more loop filters such as a de-blocking filter, a sample-adaptive offset (SAO) filter or other filters, e.g. a bilateral filter or an adaptive loop filter (ALF) or a sharpening or smoothing filters or collaborative filters. Although the loop filter unit <NUM> is shown in <FIG> as being an in loop filter, in other configurations, the loop filter unit <NUM> may be implemented as a post loop filter. The filtered block <NUM> may also be referred to as filtered reconstructed block <NUM>. Decoded picture buffer <NUM> may store the reconstructed coding blocks after the loop filter unit <NUM> performs the filtering operations on the reconstructed coding blocks.

Embodiments of the encoder <NUM> (respectively loop filter unit <NUM>) may be configured to output loop filter parameters (such as sample adaptive offset information), e.g. directly or entropy encoded via the entropy encoding unit <NUM> or any other entropy coding unit, so that, e.g., a decoder <NUM> may receive and apply the same loop filter parameters for decoding.

The decoded picture buffer (DPB) <NUM> may be a reference picture memory that stores reference picture data for use in encoding video data by video encoder <NUM>. The DPB <NUM> may be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM), including synchronous DRAM (SDRAM), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. The DPB <NUM> and the buffer <NUM> may be provided by the same memory device or separate memory devices. In some example, the decoded picture buffer (DPB) <NUM> is configured to store the filtered block <NUM>. The decoded picture buffer <NUM> may be further configured to store other previously filtered blocks, e.g. previously reconstructed and filtered blocks <NUM>, of the same current picture or of different pictures, e.g. previously reconstructed pictures, and may provide complete previously reconstructed, i.e. decoded, pictures (and corresponding reference blocks and samples) and/or a partially reconstructed current picture (and corresponding reference blocks and samples), for example for inter prediction. In some example, if the reconstructed block <NUM> is reconstructed but without in-loop filtering, the decoded picture buffer (DPB) <NUM> is configured to store the reconstructed block <NUM>.

The prediction processing unit <NUM>, also referred to as block prediction processing unit <NUM>, is configured to receive or obtain the block <NUM> (current block <NUM> of the current picture <NUM>) and reconstructed picture data, e.g. reference samples of the same (current) picture from buffer <NUM> and/or reference picture data <NUM> from one or a plurality of previously decoded pictures from decoded picture buffer <NUM>, and to process such data for prediction, i.e. to provide a prediction block <NUM>, which may be an inter-predicted block <NUM> or an intra-predicted block <NUM>.

Mode selection unit <NUM> may be configured to select a prediction mode (e.g. an intra or inter prediction mode) and/or a corresponding prediction block <NUM> or <NUM> to be used as prediction block <NUM> for the calculation of the residual block <NUM> and for the reconstruction of the reconstructed block <NUM>.

Embodiments of the mode selection unit <NUM> may be configured to select the prediction mode (e.g. from those supported by prediction processing unit <NUM>), which provides the best match or in other words the minimum residual (minimum residual means better compression for transmission or storage), or a minimum signaling overhead (minimum signaling overhead means better compression for transmission or storage), or which considers or balances both. The mode selection unit <NUM> may be configured to determine the prediction mode based on rate distortion optimization (RDO), i.e. select the prediction mode which provides a minimum rate distortion optimization or which associated rate distortion at least a fulfills a prediction mode selection criterion.

In the following the prediction processing (e.g. prediction processing unit <NUM> and mode selection (e.g. by mode selection unit <NUM>) performed by an example encoder <NUM> will be explained in more detail.

As described above, the encoder <NUM> is configured to determine or select the best or an optimum prediction mode from a set of (pre-determined) prediction modes. The set of prediction modes may comprise, e.g., intra-prediction modes and/or inter-prediction modes.

The set of intra-prediction modes may comprise <NUM> different intra-prediction modes, e.g. non-directional modes like DC (or mean) mode and planar mode, or directional modes, e.g. as defined in H. <NUM>, or may comprise <NUM> different intra-prediction modes, e.g. non-directional modes like DC (or mean) mode and planar mode, or directional modes, e.g. as defined in H. <NUM> under developing.

The set of (or possible) inter-prediction modes depend on the available reference pictures (i.e. previous at least partially decoded pictures, e.g. stored in DBP <NUM>) and other inter-prediction parameters, e.g. whether the whole reference picture or only a part, e.g. a search window area around the area of the current block, of the reference picture is used for searching for a best matching reference block, and/or e.g. whether pixel interpolation is applied, e.g. half/semi-pel and/or quarter-pel interpolation, or not.

Additional to the above prediction modes, skip mode and/or direct mode may be applied.

The prediction processing unit <NUM> may be further configured to partition the block <NUM> into smaller block partitions or sub-blocks, e.g. iteratively using quad-tree-partitioning (QT), binary partitioning (BT) or triple-tree-partitioning (TT) or any combination thereof, and to perform, e.g. the prediction for each of the block partitions or sub-blocks, wherein the mode selection comprises the selection of the tree-structure of the partitioned block <NUM> and the prediction modes applied to each of the block partitions or sub-blocks.

The inter prediction unit <NUM> may include motion estimation (ME) unit (not shown in <FIG>) and motion compensation (MC) unit (not shown in <FIG>). The motion estimation unit is configured to receive or obtain the picture block <NUM> (current picture block <NUM> of the current picture <NUM>) and a decoded picture <NUM>, or at least one or a plurality of previously reconstructed blocks, e.g. reconstructed blocks of one or a plurality of other/different previously decoded pictures <NUM>, for motion estimation. a video sequence may comprise the current picture and the previously decoded pictures <NUM>, or in other words, the current picture and the previously decoded pictures <NUM> may be part of or form a sequence of pictures forming a video sequence.

The encoder <NUM> may, e.g., be configured to select a reference block from a plurality of reference blocks of the same or different pictures of the plurality of other pictures and provide a reference picture (or reference picture index,. ) and/or an offset (spatial offset) between the position (x, y coordinates) of the reference block and the position of the current block as inter prediction parameters to the motion estimation unit (not shown in <FIG>). This offset is also called motion vector (MV).

The motion compensation unit is configured to obtain, e.g. receive, an inter prediction parameter and to perform inter prediction based on or using the inter prediction parameter to obtain an inter prediction block <NUM>. Motion compensation, performed by motion compensation unit (not shown in <FIG>), may involve fetching or generating the prediction block based on the motion/block vector determined by motion estimation, possibly performing interpolations to sub-pixel precision. Interpolation filtering may generate additional pixel samples from known pixel samples, thus potentially increasing the number of candidate prediction blocks that may be used to code a picture block. Upon receiving the motion vector for the PU of the current picture block, the motion compensation unit <NUM> may locate the prediction block to which the motion vector points in one of the reference picture lists. Motion compensation unit <NUM> may also generate syntax elements associated with the blocks and the video slice for use by video decoder <NUM> in decoding the picture blocks of the video slice.

The intra prediction unit <NUM> is configured to obtain, e.g. receive, the picture block <NUM> (current picture block) and one or a plurality of previously reconstructed blocks, e.g. reconstructed neighbor blocks, of the same picture for intra estimation. The encoder <NUM> may, e.g., be configured to select an intra prediction mode from a plurality of (predetermined) intra prediction modes.

Embodiments of the encoder <NUM> may be configured to select the intra-prediction mode based on an optimization criterion, e.g. minimum residual (e.g. the intra-prediction mode providing the prediction block <NUM> most similar to the current picture block <NUM>) or minimum rate distortion.

The intra prediction unit <NUM> is further configured to determine based on intra prediction parameter, e.g. the selected intra prediction mode, the intra prediction block <NUM>. In any case, after selecting an intra prediction mode for a block, the intra prediction unit <NUM> is also configured to provide intra prediction parameter, i.e. information indicative of the selected intra prediction mode for the block to the entropy encoding unit <NUM>. In one example, the intra prediction unit <NUM> may be configured to perform any combination of the intra prediction techniques described later.

The entropy encoding unit <NUM> is configured to apply an entropy encoding algorithm or scheme (e.g. a variable length coding (VLC) scheme, an context adaptive VLC scheme (CALVC), an arithmetic coding scheme, a context adaptive binary arithmetic coding (CABAC), syntax-based context-adaptive binary arithmetic coding (SBAC), probability interval partitioning entropy (PIPE) coding or another entropy encoding methodology or technique) on the quantized residual coefficients <NUM>, inter prediction parameters, intra prediction parameter, and/or loop filter parameters, individually or jointly (or not at all) to obtain encoded picture data <NUM> which can be output by the output <NUM>, e.g. in the form of an encoded bitstream <NUM>. The encoded bitstream <NUM> may be transmitted to video decoder <NUM>, or archived for later transmission or retrieval by video decoder <NUM>. The entropy encoding unit <NUM> can be further configured to entropy encode the other syntax elements for the current video slice being coded.

Other structural variations of the video encoder <NUM> can be used to encode the video stream. For example, a non-transform based encoder <NUM> can quantize the residual signal directly without the transform processing unit <NUM> for certain blocks or frames. In another implementation, an encoder <NUM> can have the quantization unit <NUM> and the inverse quantization unit <NUM> combined into a single unit.

<FIG> shows an exemplary video decoder <NUM> that is configured to implement the techniques of this present application. The video decoder <NUM> configured to receive encoded picture data (e.g. encoded bitstream) <NUM>, e.g. encoded by encoder <NUM>, to obtain a decoded picture <NUM>. During the decoding process, video decoder <NUM> receives video data, e.g. an encoded video bitstream that represents picture blocks of an encoded video slice and associated syntax elements, from video encoder <NUM>.

In the example of <FIG>, the decoder <NUM> comprises an entropy decoding unit <NUM>, an inverse quantization unit <NUM>, an inverse transform processing unit <NUM>, a reconstruction unit <NUM>(e.g. a summer <NUM>), a buffer <NUM>, a loop filter <NUM>, a decoded picture buffer <NUM> and a prediction processing unit <NUM>. The prediction processing unit <NUM> may include an inter prediction unit <NUM>, an intra prediction unit <NUM>, and a mode selection unit <NUM>. Video decoder <NUM> may, in some examples, perform a decoding pass generally reciprocal to the encoding pass described with respect to video encoder <NUM> from <FIG>.

The entropy decoding unit <NUM> is configured to perform entropy decoding to the encoded picture data <NUM> to obtain, e.g., quantized coefficients <NUM> and/or decoded coding parameters (not shown in <FIG>), e.g. (decoded) any or all of inter prediction parameters, intra prediction parameter, loop filter parameters, and/or other syntax elements. Entropy decoding unit <NUM> is further configured to forward inter prediction parameters, intra prediction parameter and/or other syntax elements to the prediction processing unit <NUM>. Video decoder <NUM> may receive the syntax elements at the video slice level and/or the video block level.

The inverse quantization unit <NUM> may be identical in function to the inverse quantization unit <NUM>, the inverse transform processing unit <NUM> may be identical in function to the inverse transform processing unit <NUM>, the reconstruction unit <NUM> may be identical in function reconstruction unit <NUM>, the buffer <NUM> may be identical in function to the buffer <NUM>, the loop filter <NUM> may be identical in function to the loop filter <NUM> , and the decoded picture buffer <NUM> may be identical in function to the decoded picture buffer <NUM>.

The prediction processing unit <NUM> may comprise an inter prediction unit <NUM> and an intra prediction unit <NUM>, wherein the inter prediction unit <NUM> may resemble the inter prediction unit <NUM> in function, and the intra prediction unit <NUM> may resemble the intra prediction unit <NUM> in function. The prediction processing unit <NUM> are typically configured to perform the block prediction and/or obtain the prediction block <NUM> from the encoded data <NUM> and to receive or obtain (explicitly or implicitly) the prediction related parameters and/or the information about the selected prediction mode, e.g. from the entropy decoding unit <NUM>.

When the video slice is coded as an intra coded (I) slice, intra prediction unit <NUM> of prediction processing unit <NUM> is configured to generate prediction block <NUM> for a picture block of the current video slice based on a signaled intra prediction mode and data from previously decoded blocks of the current frame or picture. When the video frame is coded as an inter coded (i.e., B, or P) slice, inter prediction unit <NUM>(e.g. motion compensation unit) of prediction processing unit <NUM> is configured to produce prediction blocks <NUM> for a video block of the current video slice based on the motion vectors and other syntax elements received from entropy decoding unit <NUM>. For inter prediction, the prediction blocks may be produced from one of the reference pictures within one of the reference picture lists. Video decoder <NUM> may construct the reference frame lists, List <NUM> and List <NUM>, using default construction techniques based on reference pictures stored in DPB <NUM>.

Prediction processing unit <NUM> is configured to determine prediction information for a video block of the current video slice by parsing the motion vectors and other syntax elements, and uses the prediction information to produce the prediction blocks for the current video block being decoded. For example, the prediction processing unit <NUM> uses some of the received syntax elements to determine a prediction mode (e.g., intra or inter prediction) used to code the video blocks of the video slice, an inter prediction slice type (e.g., B slice, P slice, or GPB slice), construction information for one or more of the reference picture lists for the slice, motion vectors for each inter encoded video block of the slice, inter prediction status for each inter coded video block of the slice, and other information to decode the video blocks in the current video slice.

Inverse quantization unit <NUM> is configured to inverse quantize, i.e., de-quantize, the quantized transform coefficients provided in the bitstream and decoded by entropy decoding unit <NUM>. The inverse quantization process may include use of a quantization parameter calculated by video encoder <NUM> for each video block in the video slice to determine a degree of quantization and, likewise, a degree of inverse quantization that should be applied.

Inverse transform processing unit <NUM> is configured to apply an inverse transform, e.g., an inverse DCT, an inverse integer transform, or a conceptually similar inverse transform process, to the transform coefficients in order to produce residual blocks in the pixel domain.

The loop filter unit <NUM> (either in the coding loop or after the coding loop) is configured to filter the reconstructed block <NUM> to obtain a filtered block <NUM>, e.g. to smooth pixel transitions, or otherwise improve the video quality. In one example, the loop filter unit <NUM> may be configured to perform any combination of the filtering techniques described later. The loop filter unit <NUM> is intended to represent one or more loop filters such as a de-blocking filter, a sample-adaptive offset (SAO) filter or other filters, e.g. a bilateral filter or an adaptive loop filter (ALF) or a sharpening or smoothing filters or collaborative filters. Although the loop filter unit <NUM> is shown in <FIG> as being an in loop filter, in other configurations, the loop filter unit <NUM> may be implemented as a post loop filter.

The decoded video blocks <NUM> in a given frame or picture are then stored in decoded picture buffer <NUM>, which stores reference pictures used for subsequent motion compensation.

The decoder <NUM> is configured to output the decoded picture <NUM>, e.g. via output <NUM>, for presentation or viewing to a user.

Other variations of the video decoder <NUM> can be used to decode the compressed bitstream. For example, the decoder <NUM> can produce the output video stream without the loop filtering unit <NUM>. For example, a non-transform based decoder <NUM> can inverse-quantize the residual signal directly without the inverse-transform processing unit <NUM> for certain blocks or frames. In another implementation, the video decoder <NUM> can have the inverse-quantization unit <NUM> and the inverse-transform processing unit <NUM> combined into a single unit.

<FIG> is a schematic diagram of a video coding device <NUM> according to an embodiment of the disclosure. The video coding device <NUM> is suitable for implementing the disclosed embodiments as described herein. In an embodiment, the video coding device <NUM> may be a decoder such as video decoder <NUM> of <FIG> or an encoder such as video encoder <NUM> of <FIG>. In an embodiment, the video coding device <NUM> may be one or more components of the video decoder <NUM> of <FIG> or the video encoder <NUM> of <FIG> as described above.

The video coding device <NUM> comprises ingress ports <NUM> and receiver units (Rx) <NUM> for receiving data; a processor, logic unit, or central processing unit (CPU) <NUM> to process the data; transmitter units (Tx) <NUM> and egress ports <NUM> for transmitting the data; and a memory <NUM> for storing the data. The video coding device <NUM> may also comprise optical-to-electrical (OE) components and electrical-to-optical (EO) components coupled to the ingress ports <NUM>, the receiver units <NUM>, the transmitter units <NUM>, and the egress ports <NUM> for egress or ingress of optical or electrical signals.

The processor <NUM> is implemented by hardware and software. The processor <NUM> may be implemented as one or more CPU chips, cores (e.g., as a multi-core processor), FPGAs, ASICs, and DSPs. The processor <NUM> is in communication with the ingress ports <NUM>, receiver units <NUM>, transmitter units <NUM>, egress ports <NUM>, and memory <NUM>. The processor <NUM> comprises a coding module <NUM>. The coding module <NUM> implements the disclosed embodiments described above. For instance, the coding module <NUM> implements, processes, prepares, or provides the various coding operations. The inclusion of the coding module <NUM> therefore provides a substantial improvement to the functionality of the video coding device <NUM> and effects a transformation of the video coding device <NUM> to a different state. Alternatively, the coding module <NUM> is implemented as instructions stored in the memory <NUM> and executed by the processor <NUM>.

The memory <NUM> comprises one or more disks, tape drives, and solid-state drives and may be used as an over-flow data storage device, to store programs when such programs are selected for execution, and to store instructions and data that are read during program execution. The memory <NUM> may be volatile and/or non-volatile and may be read-only memory (ROM), random access memory (RAM), ternary content-addressable memory (TCAM), and/or static random-access memory (SRAM).

<FIG> is a simplified block diagram of an apparatus <NUM> that may be used as either or both of the source device <NUM> and the destination device <NUM> from <FIG> according to an exemplary embodiment. The apparatus <NUM> can implement techniques of this present application described above. The apparatus <NUM> can be in the form of a computing system including multiple computing devices, or in the form of a single computing device, for example, a mobile phone, a tablet computer, a laptop computer, a notebook computer, a desktop computer, and the like.

A processor <NUM> in the apparatus <NUM> can be a central processing unit. Alternatively, the processor <NUM> can be any other type of device, or multiple devices, capable of manipulating or processing information now-existing or hereafter developed. Although the disclosed implementations can be practiced with a single processor as shown, e.g., the processor <NUM>, advantages in speed and efficiency can be achieved using more than one processor.

A memory <NUM> in the apparatus <NUM> can be a read only memory (ROM) device or a random access memory (RAM) device in an implementation. Any other suitable type of storage device can be used as the memory <NUM>. The memory <NUM> can include code and data <NUM> that is accessed by the processor <NUM> using a bus <NUM>. The memory <NUM> can further include an operating system <NUM> and application programs <NUM>, the application programs <NUM> including at least one program that permits the processor <NUM> to perform the methods described here. For example, the application programs <NUM> can include applications <NUM> through N, which further include a video coding application that performs the methods described here. The apparatus <NUM> can also include additional memory in the form of a secondary storage <NUM>, which can, for example, be a memory card used with a mobile computing device. Because the video communication sessions may contain a significant amount of information, they can be stored in whole or in part in the secondary storage <NUM> and loaded into the memory <NUM> as needed for processing.

The apparatus <NUM> can also include one or more output devices, such as a display <NUM>. The display <NUM> may be, in one example, a touch sensitive display that combines a display with a touch sensitive element that is operable to sense touch inputs. The display <NUM> can be coupled to the processor <NUM> via the bus <NUM>. Other output devices that permit a user to program or otherwise use the apparatus <NUM> can be provided in addition to or as an alternative to the display <NUM>. When the output device is or includes a display, the display can be implemented in various ways, including by a liquid crystal display (LCD), a cathode-ray tube (CRT) display, a plasma display or light emitting diode (LED) display, such as an organic LED (OLED) display.

The apparatus <NUM> can also include or be in communication with an image-sensing device <NUM>, for example a camera, or any other image-sensing device <NUM> now existing or hereafter developed that can sense an image such as the image of a user operating the apparatus <NUM>. The image-sensing device <NUM> can be positioned such that it is directed toward the user operating the apparatus <NUM>. In an example, the position and optical axis of the image-sensing device <NUM> can be configured such that the field of vision includes an area that is directly adjacent to the display <NUM> and from which the display <NUM> is visible.

The apparatus <NUM> can also include or be in communication with a sound-sensing device <NUM>, for example a microphone, or any other sound-sensing device now existing or hereafter developed that can sense sounds near the apparatus <NUM>. The sound-sensing device <NUM> can be positioned such that it is directed toward the user operating the apparatus <NUM> and can be configured to receive sounds, for example, speech or other utterances, made by the user while the user operates the apparatus <NUM>.

Although <FIG> depicts the processor <NUM> and the memory <NUM> of the apparatus <NUM> as being integrated into a single unit, other configurations can be utilized. The operations of the processor <NUM> can be distributed across multiple machines (each machine having one or more of processors) that can be coupled directly or across a local area or other network. The memory <NUM> can be distributed across multiple machines such as a network-based memory or memory in multiple machines performing the operations of the apparatus <NUM>. Although depicted here as a single bus, the bus 512of the apparatus <NUM> can be composed of multiple buses. Further, the secondary storage <NUM> can be directly coupled to the other components of the apparatus <NUM> or can be accessed via a network and can comprise a single integrated unit such as a memory card or multiple units such as multiple memory cards. The apparatus <NUM> can thus be implemented in a wide variety of configurations.

In VVC, motion vectors of inter-coded blocks can be signaled in two ways: Advanced motion vector prediction (AMVP) mode or merge mode. With AVMP mode, a difference between the real motion vector and a motion vector prediction (MVP), a reference index and a MVP index referring to an AMVP candidate list are signaled, where the reference index points to the reference picture where the reference block is copied from for the motion compensation. For the merge mode, a merge index referring to a merge candidate list is signaled and all the motion information associated with the merge candidate is inherited.

For both the AMVP candidate list and the merge candidate list, they are derived from temporally or spatially neighboring coded blocks. More specifically, the merge candidate list is constructed by checking the following four types of merge MVP candidates in order:.

Once the number of available merge candidates reaches the signaled maximally allowed merge candidates (e.g., <NUM> in common test conditions), the merge candidate list construction process is terminated. It should be noted that, the maximally allowed merge candidates may be different in different conditions.

Similarly, for the AMVP candidate list, three types of MVP candidates are checked in order:.

A history-based Motion Vector Prediction (HMVP) method is introduced by JVET-K0104, which is an input document to Joint Video Experts Team (JVET) of ITU-T SG <NUM> WP <NUM> and ISO/IEC JTC <NUM>/SC <NUM>/WG <NUM> (Accessible at http://phenix. it-sudparis. eu/jvet/), where a HMVP candidate is defined as the motion information of a previously coded block. A table with multiple HMVP candidates is maintained during the encoding/decoding process. The table is emptied when a new slice is encountered. Whenever there is an inter-coded block, the associated motion information is added to the last entry of the table as a new HMVP candidate. The overall coding flow is depicted in <FIG>, which includes:.

HMVP candidates could be used in the merge candidate list construction process. All HMVP candidates from the last entry to the first entry in the table are inserted after the TMVP candidate. Pruning may be applied on the HMVP candidates. Once the total number of available merge candidates reaches the signaled maximally allowed merge candidates, the merge candidate list construction process is terminated.

The operation of pruning stands for identifying identical motion predictor candidates in a list and removing one of the identical candidates from the list.

Similarly, HMVP candidates could also be used in the AMVP candidate list construction process. The motion vectors of the last K HMVP candidates in the table are inserted after the TMVP candidate. In some implementation manners, only HMVP candidates with the same reference picture as the AMVP target reference picture are used to construct the AMVP candidate list. Pruning may be applied on the HMVP candidates.

In order to improve the processing efficiency, a processing called wavefront parallel processing (WPP) is introduced, where WPP mode allows rows of CTUs to be processed in parallel. In WPP mode each CTU row is processed relative to its preceding (immediately adjacent) CTU row by using a delay of two consecutive CTUs. For example, see <FIG>, a picture frame or picture area is consist of a plurality CTU rows, each thread (row) includes <NUM> CTUs, i.e., thread <NUM> includes CTU0 to CTU10, thread <NUM> includes CTU11 to CTU <NUM>, thread <NUM> includes CTU22 to CTU32, thread <NUM> includes CTU33 TO <NUM>. Therefore, in WPP mode, when the encoding/decoding process of CTU1 in thread <NUM> is finished, the encoding/decoding process of CTU11 in thread <NUM> can start, similarly, when the encoding/decoding process of CTU12 in thread <NUM> is finished, the encoding/decoding process of CTU22 in thread <NUM> can start, when the encoding/decoding process of CTU23 in thread <NUM> is finished, the encoding/decoding process of CTU33 in thread <NUM> can start, when the encoding/decoding process of CTU34 in thread <NUM> is finished, the encoding/decoding process of CTU44 in thread <NUM> can start.

However, when combining WPP with HMVP, as stated above, an HMVP list is maintained and updated after processing of each coding block, thus one HMVP list is maintained that keeps getting updated till the last CTU of a CTU row, therefore the wavefront parallel processing cannot be performed since the Thread-N needs to wait for the processing of the last CTU in the above CTU row to finish.

<FIG> is a flowchart illustrating an example operation of a video decoder, such as video decoder <NUM> of <FIG> in accordance with an embodiment of the present application. One or more structural elements of video decoder <NUM>, including inter prediction unit <NUM>, may be configured to perform the techniques of <FIG>. In the example of <FIG>, the video decoder <NUM> may performing the following steps:.

At the beginning of processing of a CTU row, constructing/initializing a HMVP list for the CTU row is performed.

When a to be processed CTU is the first CTU (beginning CTU) of a CTU row, the HMVP list for the CTU row is constructed or initialized, thus the first CTU of the CTU row can be processed based on the HMVP list for the CTU row.

The HMVP list for the CTU row may be constructed or initialized by the inter prediction unit <NUM> of <FIG> when the method is an encoding method. Alternatively, the HMVP list for the CTU row may be constructed or initialized by the inter prediction unit <NUM> of <FIG> when the method is a decoding method.

In an implementation manner, for a picture frame, every CTU row may be maintained with a different HMVP list. In another implementation manner, for a picture area, every CTU row may be maintained with a different HMVP list, where the picture area is consisted by a plurality of CTU rows, where the picture may be a slice, a tile, or a brick of VVC.

Where the brick is a rectangular region of CTU rows within a particular tile in a picture, a tile may be partitioned into multiple bricks, each of which consisting of one or more CTU rows within the tile. A tile that is not partitioned into multiple bricks is also referred to as a brick. However, a brick that is a true subset of a tile is not referred to as a tile.

It should be noted that, maintaining a different HMVP list for every CTU row only means that a specific HMVP list may be maintained for a CTU row, but the candidates in different HMVP lists may be the same, e.g., all the candidates in one HMVP list are the same with the candidates in another HMVP list, it should be noted that, candidates in one HMVP list may not have redundancy; or the candidates in different HMVP lists may be have overlap, e.g., some of the candidates in one HMVP list are the same with the some of the candidates in another HMVP list, and some of the candidates in the one HMVP list are not have identical ones in the another HMVP list; or the candidates in different HMVP lists may be totally different, e.g., none of the candidates in one HMVP list have an identical one in another HMVP list. It should be noted that, when all the CTUs in a CTU row have been processed, the maintained HMVP list for the CTU row can be released thus can reduce the storage requirement.

The present disclosure provided the following manners to construct/initialize the HMVP list:.

Manner <NUM>: At the beginning of processing of a CTU row, the corresponding HMVP list is emptied or set to default values. The default values are predetermined candidate that are known to both encoder and the decoder.

For example, the corresponding HMVP list is populated with default MVs such as:.

Manner <NUM>: At the beginning of processing of a current CTU row, the corresponding HMVP list is constructed/initialized based on the HMVP list of second CTU of the previous CTU row, where the previous CTU row is the CTU row immediately adjacent to the current CTU row and on the top of the current CTU row.

Take <FIG> as an example, where when the current CTU row is the CTU row of thread <NUM>, the previous CTU row is the CTU row of thread <NUM>, and the second CTU of the previous row is CTU1; when the current CTU row is the CTU row of thread <NUM>, the previous CTU row is the CTU row of thread <NUM>, and the second CTU of the previous row is CTU12; when the current CTU row is the CTU row of thread <NUM>, the previous CTU row is the CTU row of thread <NUM>, and the second CTU of the previous row is CTU23; when the current CTU row is the CTU row of thread <NUM>, the previous CTU row is the CTU row of thread <NUM>, and the second CTU of the previous row is CTU34; when the current CTU row is the CTU row of thread <NUM>, the previous CTU row is the CTU row of thread <NUM>, and the second CTU of the previous row is CTU45.

Manner <NUM>: At the beginning of processing of a current CTU row, the corresponding HMVP list is constructed/initialized based on the HMVP list of first CTU of the previous CTU row, where the previous CTU row is the CTU row immediately adjacent to the current CTU row and on the top of the current CTU row.

Take <FIG> as an example, where when the current CTU row is the CTU row of thread <NUM>, the previous CTU row is the CTU row of thread <NUM>, and the first CTU of the previous row is CTU0; when the current CTU row is the CTU row of thread <NUM>, the previous CTU row is the CTU row of thread <NUM>, and the first CTU of the previous row is CTU <NUM>; when the current CTU row is the CTU row of thread <NUM>, the previous CTU row is the CTU row of thread <NUM>, and the first CTU of the previous row is CTU22; when the current CTU row is the CTU row of thread <NUM>, the previous CTU row is the CTU row of thread <NUM>, and the first CTU of the previous row is CTU33; when the current CTU row is the CTU row of thread <NUM>, the previous CTU row is the CTU row of thread <NUM>, and the first CTU of the previous row is CTU44.

According to manners <NUM> to <NUM>, the processing of the current CTU row do not need to wait the processing of a previous CTU row of the current CTU row being finished, thus can improve the processing efficiency of the current picture frame.

Processing a CTU in the CTU row based on the constructed/initialized HMVP list.

The processing of the CTU may be an inter-prediction processing which performed during decoding process, that is, the processing of the CTU may be implemented by the inter prediction unit <NUM> of <FIG>. Alternatively, The processing of the CTU may be an inter-prediction processing which performed during encoding process, that is, the processing of the CTU may be implemented by the inter prediction unit <NUM> of <FIG>.

It should be noted that, the above manners for constructing/initializing the HMVP list may also be used for normal HMVP processing without wave fronts, e.g., HMVP processing without WPP. As a result HMVP processing is identical irrespective of the application of WPP, which reduces necessity of additional logic implementation.

It should be noted that, the processing of <FIG> may be also an encoding process implemented by an encoder, such as the video encoder <NUM> of <FIG> in accordance with an embodiment of the present application.

Further, it is should be noted that, the above mentioned methods concerning the combination of wavefronts and HMVP based prediction may also be used for intra prediction. That is, historical intra modes can be used, and the historical table for each CTU row is initialized to default values.

For example, the initialization of the HMVP list for each CTU row in intra prediction can be done with default intra modes like, Planar, DC, Vertical, Horizontal, Mode <NUM>, VDIA and DIA modes.

<FIG> is a flowchart illustrating an example operation of a video decoder or a video encoder, such as video decoder <NUM> of <FIG> in accordance with an embodiment of the present application and video encoder <NUM> of <FIG> in accordance with an embodiment of the present application. One or more structural elements of video decoder <NUM>/encoder <NUM>, including inter prediction unit <NUM>/inter prediction unit <NUM>, may be configured to perform the techniques of <FIG>. In the example of <FIG>, the video decoder <NUM>/video encoder <NUM> may performing the following steps:
Step <NUM>, initializing a HMVP list for a current CTU row when the current CTU is the beginning CTU of a current CTU row.

It should be noted that, the current CTU row may be any CTU row of a picture frame consists of a plurality of CTU rows or a picture area (may be a part of a picture frame) consists of a plurality of CTU rows. And the current CTU row can be any one of the plurality of CTU rows.

Whether the current CTU is the beginning CTU (or the first CTU) of the current CTU row may be determined based on the index of the current CTU. For example, as disclosed in <FIG>, each CTU has a unique index, thus can determine whether the current CTU is the first CTU of the current CTU row based on the index of the current CTU. For example, the CTUs with the index of <NUM>, <NUM>, <NUM>, <NUM>, <NUM>, or <NUM>. are the first CTU of CTU rows respectively. Alternatively, take <FIG> as an example, each CTU row includes <NUM> CTUs, that is, the width of each CTU row is <NUM>, thus can use the width of the CTU row to divide the index of a CTU to determine whether the remainder is <NUM> or not, if the remainder is <NUM>, the corresponding CTU is the first CTU of a CTU row; otherwise, if the remainder is not <NUM>, the corresponding CTU is not the first CTU of a CTU row. That is, if the index of a CTU % the width of a CTU row = <NUM>, the CTU is the first CTU of the CTU row; otherwise, if the index of a CTU % the width of a CTU row ≠ <NUM>, the CTU is not the first CTU of the CTU row. It should be noted that, when the process of a CTU row is from right to left, whether a CTU is the beginning CTU of a CTU row may be determined in similar way.

After the initializing of the HMVP list, the quantity of the candidate motion vectors in the initialized HMVP list is zero.

The initializing may be performed as emptying the HMVP list for the current CTU row, that is, make the HMVP list for the current CTU row empty, in other words, the number of candidates in the HMVP list for the current CTU row is zero.

In another implementation manner, the method may further includes the following step: initializing a HMVP list for each of the plurality of CTU rows except the current CTU row, wherein HMVP lists for the plurality of CTU rows are identical or different.

The initializing may be performed as setting default values for the HMVP list for the current CTU row, or initializing the HMVP list for the current CTU row based on a HMVP list of a CTU of a previous CTU row as described above.

Step <NUM>, processing the current CTU row based on the HMVP list.

The processing may be an inter prediction process, thus a prediction block can be obtained. A reconstruction can be performed based on the prediction block to obtain a reconstructed block, finally a decoded picture can be obtained based on the reconstructed block. The details of these processes are described above.

As shown in <FIG>, the current picture frame comprises a plurality of CTU rows, in order to improve the coding/decoding efficiency, the plurality of CTU rows can be processed in wavefront parallel processing (WPP) mode. That is, the current CTU row begins to be processed (or the processing of the current CTU row begins) when a particular CTU of a previous CTU row is processed, where the previous CTU row is the CTU row immediately adjacent to the current CTU row and on the top of the current CTU row, where the particular CTU of the previous CTU row is the second CTU of the previous CTU row; or the particular CTU of the previous CTU row is the first CTU of the previous CTU row. Take <FIG> for an example, when the current CTU row is thread <NUM>, the previous CTU row is thread <NUM>, the particular CTU of the previous CTU row may be CTU <NUM>, that is, when the CTU <NUM> is processed, the decoder/encoder begins to process the CTU row of thread <NUM>, i.e., the decoder/encoder begins to process CTU <NUM>. Take <FIG> for another example, when the current CTU row is thread <NUM>, the previous CTU row is thread <NUM>, the particular CTU of the previous CTU row may be CTU <NUM>, that is, when the CTU <NUM> is processed, the decoder/encoder begins to process the CTU row of thread <NUM>, i.e., the decoder/encoder begins to process CTU <NUM>.

In one implementation manner, the processing the current CTU row based on the HMVP list may include: processing the current CTU of the current CTU row; updating the initialized HMVP list based on the processed current CTU; and processing the second CTU of the current CTU row based on the updated HMVP list.

<FIG> is a block diagram showing an example of a video processing apparatus <NUM> configured to implement embodiments of the invention, the video processing apparatus <NUM> may be the encoder <NUM> or the decoder <NUM>, as shown in <FIG>, the apparatus includes:
An initializing unit <NUM>, configured to initialize a HMVP list for a current CTU row when the current CTU is the beginning CTU (the first CTU) of a current CTU row.

The detail of the initialization performed by the initializing unit <NUM> can reference to step <NUM>.

A processing unit <NUM>, configured to process the current CTU row based on the HMVP list.

The detail of the processing performed by the processing unit <NUM> can reference to step <NUM>.

As shown in <FIG>, the current picture frame comprises a plurality of CTU rows, in order to improve the coding/decoding efficiency, the plurality of CTU rows can be processed in WPP mode. That is, the current CTU row begins to be processed when a particular CTU of a previous CTU row is processed, where the previous CTU row is the CTU row immediately adjacent to the current CTU row and on the top of the current CTU row, where the particular CTU of the previous CTU row is the second CTU of the previous CTU row; or the particular CTU of the previous CTU row is the first CTU of the previous CTU row. Take <FIG> for an example, when the current CTU row is thread <NUM>, the previous CTU row is thread <NUM>, the particular CTU of the previous CTU row may be CTU <NUM>, that is, when the CTU <NUM> is processed, the decoder/encoder begins to process the CTU row of thread <NUM>, i.e., the decoder/encoder begins to process CTU <NUM>. Take <FIG> for another example, when the current CTU row is thread <NUM>, the previous CTU row is thread <NUM>, the particular CTU of the previous CTU row may be CTU <NUM>, that is, when the CTU <NUM> is processed, the decoder/encoder begins to process the CTU row of thread <NUM>, i.e., the decoder/encoder begins to process CTU <NUM>.

The present disclosure further discloses an encoder, which includes processing circuitry for carrying out the video processing method or the method of coding of the present disclosure.

The present disclosure further discloses a decoder, which includes processing circuitry for carrying out the video processing method or the method of coding of the present disclosure.

The present disclosure further discloses computer program product which comprising a program code for performing the video processing method or the method of coding of the present disclosure.

The present disclosure further discloses a computer-readable storage medium storing computer instructions, that when executed by one or more processors, cause the one or more processors to perform the video processing method or the method of coding of the present disclosure. The computer-readable storage medium is non-transitory or transitory.

The present disclosure further discloses a decoder, comprising one or more processors; and a non-transitory computer-readable storage medium coupled to the processors and storing programming for execution by the processors, wherein the programming, when executed by the processors, configures the decoder to carry out the video processing method or the method of coding of the present disclosure.

The present disclosure further discloses an encoder, comprising one or more processors; and a non-transitory computer-readable storage medium coupled to the processors and storing programming for execution by the processors, wherein the programming, when executed by the processors, configures the encoder to carry out the video processing method or the method of coding of the present disclosure.

The initializing process for the HMVP list is described in general slice data syntax of VVC (Joint Video Experts Team (JVET) of ITU-T SG <NUM> WP <NUM> and ISO/IEC JTC <NUM>/SC <NUM>/WG <NUM>, Versatile Video Coding (Draft <NUM>)), section <NUM>. <NUM> of VVC recites:.

Where j % BrickWidth[ SliceBrickIdx[ i ] ] ) = = <NUM> means that the CTU with the index j is the beginning CTU of a CTU row, and NumHmvpCand = <NUM> means that the quantity of candidates in the HMVP list is set to <NUM>, in other words, the HMVP list is emptied.

The updating process for the HMVP list is described in section <NUM>. <NUM> of VVC (Joint Video Experts Team (JVET) of ITU-T SG <NUM> WP <NUM> and ISO/IEC JTC <NUM>/SC <NUM>/WG <NUM>, Versatile Video Coding (Draft <NUM>)), which recites:
Inputs to this process are:.

The MVP candidate hMvpCand consists of the luma motion vectors mvL0 and mvL1, the reference indices refldxLO and refIdxL1, the prediction list utilization flags predFlagL0 and predFlagL1, and the bi-prediction weight index bcwIdx.

The candidate list HmvpCandList is modified using the candidate hMvpCand by the following ordered steps:
The variable identicalCandExist is set equal to FALSE and the variable removeIdx is set equal to <NUM>.

When NumHmvpCand is greater than <NUM>, for each index hMvpIdx with hMvpIdx = <NUM>. NumHmvpCand - <NUM>, the following steps apply until identicalCandExist is equal to TRUE:
When hMvpCand is equal to HmvpCandList[ hMvpIdx ], identicalCandExist is set equal to TRUE and removeIdx is set equal to hMvpIdx.

The candidate list HmvpCandList is updated as follows:
If identicalCandExist is equal to TRUE or NumHmvpCand is equal to <NUM>, the following applies:
For each index i with i = ( removeIdx + <NUM> ). ( NumHmvpCand - <NUM>), HmvpCandList[ i - <NUM>] is set equal to HmvpCandList[ i ].

HmvpCandList[ NumHmvpCand - <NUM> ] is set equal to mvCand.

Otherwise (identicalCandExist is equal to FALSE and NumHmvpCand is less than <NUM>), the following applies:
HmvpCandList[ NumHmvpCand++ ] is set equal to mvCand.

Claim 1:
A video processing method, characterized in that it comprises:
at the beginning of processing each coding tree unit, CTU, row of a picture area that consists of a plurality of CTU rows, initializing a history-based Motion Vector Prediction, HMVP, list for each of the plurality of CTU rows, wherein the initialized HMVP lists are empty, wherein every CTU row is maintained with a different HMVP list;
processing the plurality of CTU rows based on the HMVP lists, wherein a current CTU row of the plurality of CTU rows is processed based on a HMVP list initialized for the current CTU row.