Patent Description:
For NPN-type devices, the collector-emitter region on each side of the semiconductor substrate can be considered to form a PN junction with the bulk region. One manufacturing performance test is to determine the reverse-bias breakdown voltage of the PN junction on each side of the semiconductor substrate. If the reverse breakdown voltage of the PN junction is too low, the overall performance of the B-TRAN may be degraded.

<CIT> describes methods, systems, circuits, and devices for power-packet-switching power converters using bidirectional bipolar transistors (B-TRANs) for switching.

<CIT> describes apparatus and associated methods relating to varying the base width around a non-circular emitter of a lateral bipolar transistor to vary a device parameter so as to compensate for variations in the device parameter caused by curvature variations along a periphery of the non-circular emitter.

<CIT> describes a transistor. The transistor comprises a doped semiconductor substrate and a drain-extended well having a curved region and a straight region surrounded by the doped semiconductor substrate. The drain-extended well has an opposite dopant type as the doped semiconductor substrate. The transistor further includes a centered source/drain surrounded by the drain-extended well and separated from an outer perimeter of the drain-extended well. A separation in the curved region is greater than a separation in the straight region.

One example is a semiconductor device, as defined in independent claim <NUM>, comprising: an emitter region defining an inner boundary in the shape of an obround with parallel sides, and the obround having a first hemispherical end and a second hemispherical end each having a radius; a base region having a first end, a second end opposite the first end, and base length, the base region disposed within the obround with the base length parallel to and centered between the parallel sides, the first end spaced apart from the first hemispherical end by a first gap greater than the radius by more than a manufacturing tolerance, and the second end spaced apart from the second hemispherical end by a second gap greater than the radius by more than the manufacturing tolerance.

In the example semiconductor device, the first gap may be at least fifty percent (<NUM>%) longer than the radius. In the example semiconductor device, the first gap may be is at least one hundred percent (<NUM>%) longer than the radius.

The example semiconductor device may further comprise: a base contact electrically coupled to the base region through a base window through a dielectric, the base contact defines a length parallel to the base length, and a first terminus being a closest terminus to the first end, the first terminus spaced apart from the first end by a setback distance being at least equal to the radius. The setback distance may be at least fifty percent (<NUM>%) longer than the radius. The setback distance may be at least one hundred percent (<NUM>%) longer than the radius.

The example semiconductor device may further comprise a lower side comprising an emitter region and a base region, and the semiconductor device may define a bidirectional double-base bipolar junction transistor.

In the example semiconductor device the base region may be P-type, and the emitter region may be N-type.

The example semiconductor device may further comprise a trench of dielectric material surrounding the base region. The trench may have a depth of <NUM> microns to <NUM> microns, inclusive, and a width of <NUM> microns to <NUM> microns, inclusive.

A second example semiconductor device, as defined in independent claim <NUM>, comprising: an emitter region defining an inner boundary in the shape of an obround with parallel sides, and the obround having first and second hemispherical ends each having a radius; a base region having a first end, a second end opposite the first end, and base length, the base region disposed within the obround with the base length parallel to and centered between the parallel sides, the first end spaced apart from the first hemispherical end by a first gap, and the second end spaced apart from the second hemispherical end by a second gap; a base contact electrically coupled to the base region, the base contact defines a length parallel to the base length, and a first terminus being a closest terminus to the first end, the first terminus spaced apart from the first end by a setback distance being at least equal to the radius.

In the second example semiconductor device, the setback distance may be at least fifty percent (<NUM>%) longer than the radius. In the second example semiconductor device, the setback distance may be is at least one hundred percent (<NUM>%) longer than the radius.

In the second example semiconductor device, the first gap may be greater than the radius by more than a manufacturing tolerance, and the second gap greater than the radius by more than a manufacturing tolerance. The first gap may be at least fifty percent (<NUM>%) longer than the radius. Alternatively, the first gap may be at least one hundred percent (<NUM>%) longer than the radius.

The second example semiconductor device may further comprise a lower comprising an emitter region and a base region, and the semiconductor device may define a bidirectional double-base bipolar junction transistor.

In the second example semiconductor device, the base region may be P-type, and the emitter region may be N-type.

The second example semiconductor device may further comprise a trench of dielectric material surrounding the base region. The trench may have a depth of <NUM> microns to <NUM> microns, inclusive, and a width of <NUM> microns to <NUM> microns, inclusive.

For a detailed description of example embodiments, reference will now be made to the accompanying drawings in which:.

Various terms are used to refer to particular system components. Different companies may refer to a component by different names - this document does not intend to distinguish between components that differ in name but not function. In the following discussion and in the claims, the terms "including" and "comprising" are used in an openended fashion, and thus should be interpreted to mean "including, but not limited to. " Also, the term "couple" or "couples" is intended to mean either an indirect or direct connection. Thus, if a first device couples to a second device, that connection may be through a direct connection or through an indirect connection via other devices and connections.

"About" in reference to a recited parameter shall mean the recited parameter plus or minus ten percent (+/- <NUM>%) of the recited parameter.

"Bidirectional double-base bipolar junction transistor" shall mean a junction transistor having a base and a collector-emitter on a first face or first side of a bulk region, and having a base and a collector-emitter on a second face or second side of the bulk region. The base and the collector-emitter on the first side are distinct from the base and the collector-emitter on the second side. An outward pointing vector normal to the first side points an opposite direction to an outward pointing vector normal to the second side.

"Upper base" shall mean a base of a bidirectional double-base bipolar junction transistor on a first side of a bulk region of the transistor, and shall not be read to imply a location of the base with respect to gravity.

"Lower base" shall mean a base of a bidirectional double-base bipolar junction transistor on a second side of a bulk region of the transistor opposite a first side, and shall not be read to imply a location of the base with respect to gravity.

"Upper collector-emitter" shall mean a collector-emitter of a bidirectional double-base bipolar junction transistor on a first side of a bulk region of the transistor, and shall not be read to imply a location of the collector-emitter with respect to gravity.

"Lower collector-emitter" shall mean a collector-emitter of a bidirectional double-base bipolar junction transistor on a second side of a bulk region of the transistor opposite a first side, and shall not be read to imply a location of the collector-emitter with respect to gravity.

The following discussion is directed to various embodiments of the invention.

Various examples are directed to a layout to reduce current crowding at endpoints of structures within semiconductor device, such as bidirectional double-base bipolar junction transistors (B-TRANs). In particular, in example systems each emitter region defines an emitter area with an inner boundary in the shape of an obround having straight sides and hemispherical ends. A base region is disposed within the obround, the base region having a base length and on opposite ends. In example systems, the ends of the base region each have an offset or gap from the respective hemispherical ends by a distance greater than the radius of the hemispherical ends. The gap reduces current crowding at the ends of the base region, which reduced current crowding results lower electric fields at the ends of the base region and thus greater reverse-bias breakdown voltage of the junction formed between the base and the emitter. The specification first turns to an example B-TRAN device to orient the reader.

<FIG> shows a partial cross-sectional, elevation view of an example B-TRAN. In particular, <FIG> shows a B-TRAN <NUM> having an upper face or upper side <NUM> and a lower face or lower side <NUM>. The designations "upper" and "lower" are arbitrary and used merely for convenience of the discussion. The upper side <NUM> faces a direction opposite the lower side <NUM>. Stated differently, an outward pointing vector normal to the average elevation of the upper side <NUM> (the vector not specifically shown) points an opposite direction with respect to an outward pointing vector normal to the average elevation of the lower side <NUM> (the vector not specifically shown).

The upper side <NUM> includes collector-emitter regions <NUM> which form a junction with the drift region or bulk substrate <NUM>. The upper side <NUM> further defines a base region <NUM> disposed between the collector-emitter regions <NUM>. The collector-emitter regions <NUM> are electrically coupled to collector-emitter contacts <NUM>, such as a metallic material applied through windows in an insulation material (not specifically shown) covering the upper side <NUM>. Similarly, the base region <NUM> is electrically coupled to a base contact <NUM>, such as a metallic material applied through a window in the insulation material (not specifically shown) covering the upper side <NUM>. In the view of <FIG>, only two collector-emitter contacts <NUM> are shown, and only one base contact <NUM> is shown; however, and as discussed in greater detail below, in example systems two or more collector-emitter contacts <NUM> may be implemented, and two or more base contacts <NUM> may be implemented. In example systems, the collector-emitter contacts <NUM> are coupled together to form an upper collector-emitter <NUM>. The base contacts <NUM> are coupled together to form an upper base <NUM>.

Similarly, the lower side <NUM> includes collector-emitter regions <NUM> which form a junction with the bulk substrate <NUM>, and collector-emitter contacts <NUM> that electrically couple to the collector-emitter regions <NUM>. The collector-emitter contacts <NUM> are coupled together to form the lower collector-emitter <NUM>. The lower side <NUM> includes the base region <NUM> and a base contact <NUM> that electrically couples to the base region <NUM>. The base contacts <NUM> are coupled together to form a lower base <NUM>.

The example B-TRAN <NUM> is an NPN structure, which means the collector-emitter regions <NUM> and <NUM> are N-type, the base regions <NUM> and <NUM> are P-type, and the bulk substrate <NUM> is P-type. Note that PNP-type B-TRAN devices are also contemplated; however, so as not to unduly lengthen the discussion a PNP-type B-TRAN device is not specifically shown.

In example cases, the various structures and doping associated with the upper side <NUM> are meant to be mirror images of the various structures and doping associated with the lower side <NUM>. However, in some cases the various structures and doping associated with the upper side <NUM> are constructed at different times than the various structures and doping on the lower side <NUM>, and thus there may be slight differences in the structures and doping as between the two sides. It follows that the differences may be attributable to variation within manufacturing tolerances, but such does not adversely affect the operation of the device as a bidirectional double-base bipolar junction transistor.

<FIG> shows an overhead view of the upper side of a semiconductor substrate during an intermediate stage of the construction of related-art devices. In particular, visible in <FIG> is an emitter region <NUM>. The emitter region <NUM> defines several internal regions that are not doped as emitter regions, such as internal region <NUM>. Defined within the example internal region <NUM> is a base region <NUM>. In related-art devices, the separation S between the base region <NUM> and the surrounding emitter region <NUM> is uniform as shown. Stated otherwise, the separation S between the ends of the base regions <NUM> is the same as the separation S along the long dimension of the base region <NUM>.

It turns out, however, that devices constructed with the layout as shown in <FIG> have lower than expected reverse-bias breakdown voltage and higher than expected reversed-bias leakage current. Consider, as an example, that the base region <NUM> is a P-type region, and the emitter region <NUM> is an N-type region. Thus, though part of a larger overall structure, the base region <NUM> to the emitter region <NUM> may be considered to form a PN junction (e.g., a diode). During intermediate stages of manufacturing, various properties of a device may be tested, such as the forward voltage drop and reverse-bias breakdown voltage of the PN junction formed by the base region <NUM> and the emitter region <NUM>. Testing of a related-art structure with the layout as shown in <FIG> indicated lower than expected reverse-bias breakdown voltage and corresponding increase reverse-bias leakage current.

The inventors of the current specification found that the lower than expected reverse-bias breakdown voltage and corresponding increase reverse-bias leakage current is attributable, at least in part, to the layout as between the emitter region <NUM> and the base region <NUM>. In particular, the inventors of the current specification found that implementing the same separation S at the ends of the base regions <NUM> (such as at location <NUM>) as implemented along the long dimension of the base region <NUM> results in increased electrical field strength compared to the straight areas, such as at location <NUM>. Stated otherwise, the uniform spacing S between base region <NUM> and the emitter region <NUM> causes current bunching at the ends, such as location <NUM>. The increased electric field strength attributable to the layout results in breakdown at lower than expected reverse-bias voltages. That is, for a particular applied voltage on the base region <NUM>, the electric field strength at the location <NUM> will be higher than the electrical field strength along the straight portions, such as at location <NUM>. The result is a reverse-bias breakdown voltage lower than desired (e.g., breakdown at <NUM>-40V rather than a designed <NUM>-90V).

<FIG> shows an overhead view of the upper side <NUM> of a semiconductor substrate during an intermediate stage of the construction, and in accordance with at least some embodiments. Again, showing the upper side <NUM> is arbitrary, as in symmetrical devices the upper side <NUM> and lower side <NUM> (<FIG>) appear identical. For context, the cross-sectional view of <FIG> may be considered to have been taken along line <NUM>-<NUM> of <FIG>; however, note that <FIG> shows the upper side <NUM> of the semiconductor substrate prior to metal deposition that creates the collector-emitter contacts <NUM> (<FIG>) and base contact <NUM> (<FIG>).

In particular, visible in <FIG> is the collector-emitter region <NUM>. The collector-emitter region <NUM> defines several internal regions that are not doped as collector-emitter regions, such as internal region <NUM>. Each internal region <NUM> is defined by an inner boundary of the collector-emitter region <NUM>, such as inner boundary <NUM>. The inner-boundary <NUM> is an internal boundary of the doped region that forms the collector-emitter region <NUM>. As shown, the inner boundary <NUM> defines a racetrack pattern or obround comprising a first straight side <NUM> that is parallel to and offset from a second straight side <NUM>. The straight sides <NUM> and <NUM> each define a length Ls along their straight portions, as shown in the figure. The inner boundary <NUM> further defines a first hemispherical end <NUM> and a second hemispherical end <NUM> opposite the first hemispherical end <NUM>. Referring to hemispherical end <NUM> as representative, the hemispherical end <NUM> defines a center of curvature <NUM> and a radius of curvature <NUM>. That is to say, the radius of curvature <NUM> sweeps out and defines the outer boundary of the obround of the hemispherical end <NUM>. It follows that the total distance D between straight sides <NUM> and <NUM> (measured perpendicular to the sides) is twice the radius of curvature <NUM>. Again, hemispherical end <NUM> is representative of all the hemispherical ends.

<FIG> further shows a respective base region disposed within each internal region. Referring to internal region <NUM> as representative, the base region <NUM> is disposed within the internal region <NUM>. The base region <NUM> comprises a first end <NUM> associated with the hemispherical end <NUM>, a second end <NUM> opposite the first end <NUM> and associated with the hemispherical end <NUM>, and base length LB measured parallel to the straight sides <NUM> and <NUM>. As shown, the base region <NUM> is disposed within the obround with the base length LB parallel to and centered between the straight sides <NUM> and <NUM>. In some cases, the outer-boundary <NUM> of the base region <NUM> is an outer boundary of the doped region that forms the base region <NUM>. In the example shown, the outer boundary <NUM> of the base region <NUM> itself defines an obround with straight sides running parallel to each other, and with the ends <NUM> and <NUM> being rounded or hemispherical.

The first end <NUM> is spaced apart from the hemispherical end <NUM> by a first gap G1 greater than the radius of curvature <NUM>. Similarly, the second end <NUM> is spaced apart from the hemispherical end <NUM> by a second gap G2 greater than the radius of curvature <NUM>. In some cases, the gaps G1 and G2 are about the same. Stated otherwise, the layout of the base region <NUM> is designed and constructed such that the ends <NUM> and <NUM> each have an interstice or gap greater than the radius of curvature that defines the hemispherical ends <NUM> and <NUM>, respectively, and that gap is greater than the radius of curvature by more than a manufacturing tolerance for the device (e.g., greater than <NUM> micron). Assuming all the radii of curvature are the same length (not strictly required), and further assuming all the gaps are the same length (not strictly required), the gap may be at least <NUM>% longer than the radius of curvature (e.g., gap = radius x <NUM>), in some cases <NUM>% longer than the radius of curvature (e.g., gap = radius x <NUM>).

By using a gap greater than the radius of curvature of an associated hemispherical end, the electric field strength may be lower compared to having the gap being about equal to the radius of curvature. Moreover, lower electric field strength at the ends of the base region <NUM> (e.g., one micron beyond the boundary of the base region <NUM>) may make the electric field strength about the same as the electric field strength along the straight sides of the outer boundary <NUM> of the base region <NUM>. Lower electric field strength reduces the chances of breakdown starting at the ends of the base region <NUM>, and reduces leakage current.

In some examples, addressing reverse-bias breakdown voltage using gaps alone may be sufficient. However, the inventors of the specification believe further factors may also contribute to less than expected reverse-bias breakdown - such as placement of the metallic contact associated with the example base region <NUM>.

<FIG> shows an overhead view of the upper side of a semiconductor substrate during an intermediate stage of the construction of related-art devices. In particular, visible in <FIG> is the emitter region <NUM>, along with several internal regions that are not doped as emitter regions, such as the internal region <NUM>. Defined within the example internal region <NUM> is the base region <NUM>; however, the base region <NUM> is only partially visible in <FIG>, as the base contacts <NUM> partially obscure the base region <NUM>. Similarly, visible in <FIG> are several emitter contacts <NUM>. In related-art devices, the separation S between the base region <NUM> and the surrounding emitter region <NUM> is uniform as shown. Moreover, the end of the base contact <NUM> closest to the hemispherical portion of the emitter region <NUM> has about the same separation S relative to the hemispherical portion of the emitter region <NUM>. Stated otherwise, the separation S between the end of the base contact <NUM> and the associated hemispherical portion of the emitter region <NUM> is about the same as the separation S along the long dimension of the base contact <NUM> and the base region <NUM>.

The inventors of the current specification believe that having the end of the base contact <NUM> being very close, if not coextensive, with the end of the base region <NUM> may contribute to the less than expected reverse-bias breakdown voltage. In particular, with the base contact <NUM> electrically coupled to the base region <NUM>, charge carriers (e.g., electrons) injected into the base region <NUM> experience no appreciable voltage drop as the charge carriers propagate to the ends of the base region <NUM>. The higher the voltage at the ends of the base region <NUM>, the greater the electric field associated with current crowding at the ends of the base region. Moreover, the charge carriers in the metallic base contact <NUM> also create electric field with respect to the hemispherical portion of the emitter region <NUM>, and while those charge carriers may not directly traverse the depletion region around the base region <NUM>, the additional electric field may hasten the breakdown within the depletion region between the base region <NUM> and the emitter region <NUM>.

<FIG> shows an overhead view of the upper side <NUM> of a semiconductor substrate during an intermediate stage of the construction, and in accordance with at least some embodiments. Again, showing the upper side <NUM> is arbitrary, as in symmetrical devices the upper side <NUM> and lower side <NUM> (<FIG>) appear identical. For context, the cross-sectional view of <FIG> may be considered to have been taken along line <NUM>-<NUM> of <FIG>, including the base and collector-emitter contacts.

In particular, visible in <FIG> is the collector-emitter region <NUM>. The collector-emitter region <NUM> defines several internal regions that are not doped as collector-emitter regions, such as the example internal region <NUM>. Each internal region <NUM> is defined by the inner boundary <NUM> of the collector-emitter region <NUM>. As before, the inner-boundary <NUM> may be an internal boundary of the doped region that forms the collector-emitter region <NUM>. And as before, the inner boundary <NUM> defines the shape of an obround, including the straight sides <NUM> and <NUM> and an hemispherical end <NUM>. Referring to hemispherical end <NUM> as representative, the hemispherical end <NUM> defines the center of curvature <NUM> and the radius of curvature <NUM>. That is to say, the radius of curvature <NUM> sweeps out and defines the outer boundary of the obround at the hemispherical end <NUM>. As in the prior examples, the first end <NUM> is spaced apart from the hemispherical end <NUM> by a first gap G1 greater than the radius of curvature <NUM>. Stated otherwise, in example cases the layout of the base region <NUM> is designed and constructed such that the example end <NUM> has a gap G1 greater than the radius of curvature that defines the example hemispherical end <NUM>.

Further visible in <FIG> are a plurality of base contacts, such as base contact <NUM>. The base contact <NUM> is disposed over and electrically coupled to the underlying base region <NUM>. In particular, during manufacturing the collector-emitter region <NUM> and the base regions <NUM> may be constructed, and then a dielectric layer (e.g., oxide layer) may be grown or deposited over the entire upper side <NUM>, though the dielectric layer is not specifically shown in <FIG> so as not to obscure the underlying regions. Using various photolithography and etching techniques, windows may be opened through the dielectric layer to expose the underlying collector-emitter region <NUM> and base regions <NUM>. Then a metal layer may be sputtered or deposited over the upper side <NUM>, and the metal thus electrically contacts the underlying regions. Again using various photolithography and etching techniques, much of the metal may be removed, leaving just the collector-emitter contacts <NUM> and the base contact <NUM> as shown in <FIG> (and the others not specifically numbered). The base contact <NUM> defines a length parallel to the base length LB (<FIG>), and a first terminus <NUM>. The first terminus <NUM> is associated with the first end <NUM> of the base region <NUM>, and thus is associated with the hemispherical end <NUM>. More specifically the first terminus <NUM> is the closest terminus to the first end <NUM> of any base contact <NUM> coupled to a particular underlying base region <NUM>. In the example shown, the base contact <NUM> and the related base contacts along the shared base region <NUM> are separated periodically, such as to reduce stresses associated with temperature-based differential expansion as between the metal layers and the semiconductor layers. However, in other cases the base contact may be a continuous structure along and over each respective base region <NUM>.

In the layout, the first terminus <NUM> is spaced apart from the first end <NUM> by a setback distance SD measured along the long dimension of the base region <NUM>, and the setback distance SD is at least equal to the radius of curvature <NUM>. Assuming all the radii of curvature are the same length (not strictly required), and further assuming all the setback distances are the same length (not strictly required), the setback distance SD for each base contact <NUM> may be at least fifty percent (<NUM>%) longer than the radius of curvature (e.g., setback = radius x <NUM>), in some cases one hundred percent (<NUM>%) longer than the radius of curvature (e.g., setback = radius x <NUM>). Stated differently, measured parallel the long dimension of the base region, the sum of the gap G1 and setback distance SD may be at least <NUM> times the length of the radius of curvature <NUM>.

By using a setback distance SD greater than the radius of curvature of an associated hemispherical end, the electric field strength may be lower compared to having base contact <NUM> being coextensive with base region <NUM>. One possible explanation, and other explanations are possible, is that by having the base contact <NUM> with the setback distance So as shown, the charge carriers (e.g., electrons) injected into the base region <NUM> by way of the base contact <NUM> experience a non-trivial voltage drop when propagating through the base region <NUM> toward the first end <NUM>. The non-trivial voltage drop thus lowers the voltage at the first end <NUM>, and consequently lowers the electrical field strength at the example first end <NUM> of the base region <NUM> (e.g., one micro-meter beyond the boundary of the base region <NUM>). Moreover, the setback distance SD lowers any electric field contribution from charge carriers in the base contact <NUM> itself. Lower electric field strength reduces the chances of breakdown starting at the ends of the base region <NUM>, and also reduced leakage current.

<FIG> shows an example cross-sectional view taken substantially along line <NUM>-<NUM> of <FIG>. In particular, <FIG> shows a portion of the collector-emitter region <NUM> on the upper side <NUM>, along with a portion of the collector-emitter region <NUM> on the lower side <NUM>. <FIG> further shows the inner boundary <NUM> associated with a hemispherical end <NUM>. For purposes of discussion, assume that the center of curvature <NUM> is as marked, and thus the radius of curvature R extends between the center of curvature <NUM> and the inner boundary <NUM>.

<FIG> further shows a portion the base region <NUM> and base contact <NUM> on the upper side <NUM>, along with a portion of the base region <NUM> and base contact <NUM> on the lower side <NUM>. <FIG> shows that in various examples the base regions, such as base region <NUM>, may have a gap G greater than the radius of curvature R, and in the example shown the gap G is about twice the radius of curvature R. Moreover, <FIG> shows that the base contacts, such as base contact <NUM>, have a setback distance So is at least equal to the radius of curvature R.

The various embodiments discussed to this point have assumed that, on each side of the device, the volume between the base regions and the collector-emitter regions comprises solely the P-type bulk substrate. However, in other cases additional structures may be present.

<FIG> shows a partial cross-sectional, elevation view of an example B-TRAN. In particular, <FIG> shows a B-TRAN <NUM> having the upper side <NUM> and the lower side <NUM>. The upper side <NUM> includes the collector-emitter regions <NUM> which form a junction with the drift region or bulk substrate <NUM>. The upper side <NUM> further defines the base region <NUM> disposed between the collector-emitter regions <NUM>. As before, the collector-emitter regions <NUM> are electrically coupled to the collector-emitter contacts <NUM>. Similarly, the base region <NUM> is electrically coupled to the base contact <NUM>. In the view of <FIG>, only two collector-emitter contacts <NUM> are shown, and only one base contact <NUM> is shown; however, in example systems two or more collector-emitter contacts <NUM> may be implemented, and two or more base contacts <NUM> may be implemented. The collector-emitter contacts <NUM> are coupled together to form an upper collector-emitter <NUM>. The base contacts <NUM> are coupled together to form an upper base <NUM>.

Similarly, the lower side <NUM> includes collector-emitter regions <NUM> which form a junction with the bulk substrate <NUM>, and collector-emitter contacts <NUM> that electrically couple to the collector-emitter regions <NUM>. The collector-emitter contacts <NUM> are coupled together to form the lower collector-emitter <NUM>. The lower side <NUM> includes the base region <NUM> and the base contact <NUM> that electrically couples to the base region <NUM>. The base contacts <NUM> are coupled together to form a lower base <NUM>. As with <FIG>, in <FIG> the example B-TRAN <NUM> is an NPN structure, so the collector-emitter regions <NUM> and <NUM> are N-type, the base regions <NUM> and <NUM> are P-type, and the bulk substrate <NUM> is P-type. Note that PNP-type B-TRAN devices are also contemplated; however, so as not to unduly lengthen the discussion a PNP-type B-TRAN device is not specifically shown.

Still referring to <FIG>, the example B-TRAN <NUM> further comprises additional structures between the base regions and the collector-emitter regions. Referring initially to the upper side <NUM>, trenches <NUM> reside between the base region <NUM> and the surrounding collector-emitter regions <NUM>. In example cases, the trenches may have a depth of between and including <NUM> microns and <NUM> microns, though other trench depths are contemplated having sufficient depth to be "below" the bottoms of the respective regions. Further in example cases, the trenches <NUM> have a width of between and including <NUM> microns and <NUM> microns, though again larger and smaller widths are contemplated. In example cases, the trenches comprise a dielectric material (e.g., oxide) which electrically insulates the base regions <NUM> from the collector-emitter regions <NUM>. The trenches <NUM> may be used together with the gaps and setbacks discussed above to improve or increase the reverse-bias breakdown voltage of the example B-TRAN <NUM> and reduces leakage current.

Similarly for the lower side <NUM>, the example B-TRAN <NUM> comprises the additional structures between the base regions and the collector-emitter regions. In the example, trenches <NUM> reside between the base region <NUM> and the surrounding collector-emitter regions <NUM>. As with upper side <NUM>, the trenches <NUM> may have a depth of between and including <NUM> microns and <NUM> microns, and a width of between and including <NUM> microns and <NUM> microns. The example trenches are filled with a dielectric material (e.g., oxide) which electrically insulates the base regions <NUM> from the collector-emitter regions <NUM>. The trenches <NUM> may be used together with the gaps and setbacks discussed above to improve or increase the reverse-bias breakdown voltage of the example B-TRAN <NUM> and reduces leakage current.

In the example cross-sectional view of <FIG>, the trenches <NUM> and <NUM> span the volume between each base region and a surrounding collector-emitter region on the same side. However, in other cases the trenches <NUM> and <NUM> may span only a portion of the volume. In one example case, the trenches circumscribe and abut or closely abut the base regions, and thus additional depletion region may extend from an outside surface of each trench to the surrounding collector-emitter regions.

Claim 1:
A semiconductor device (<NUM>) comprising:
an emitter region (<NUM>) defining an inner boundary (<NUM>) in the shape of an obround with parallel sides (<NUM>, <NUM>), and the obround having a first hemispherical end (<NUM>) and a second hemispherical end (<NUM>) each having a radius (<NUM>);
a base region (<NUM>) having a first end (<NUM>), a second end (<NUM>) opposite the first end, and base length (LB), the base region disposed within the obround with the base length parallel to and centered between the parallel sides, the first end spaced apart from the first hemispherical end by a first gap (G1) greater than the radius by more than a manufacturing tolerance, and the second end spaced apart from the second hemispherical end by a second gap (G2) greater than the radius by more than the manufacturing tolerance.