Patent Description:
Typically, an ultracapacitor module connected to a voltage supply bus has no ability to control the current sourced from or provided to the ultracapacitor. An example of this may be found in an ultracapacitor module in a voltage stabilization system that increases the voltage of the voltage supply bus of a vehicle while the starter system of an internal combustion engine is engaged and includes a parallel DC/DC converter to recharge the capacitors in the ultracapacitor module. Another example is a backup power supply module which increases the voltage of the voltage supply bus of a vehicle when the bus voltage sags. This module also includes a parallel DC/DC converter to recharge the capacitors in the ultracapacitor module. These examples have no need for adaptive voltage control because they have no method of controlling a response of the ultracapacitor module to voltage transients on the voltage supply bus. In these examples, the capacitor voltage and the working range of the voltage supply bus are the same. There is no control of the bus voltage other than the natural control provided by the capacitor(s).

The documents <CIT>, <CIT> and <CIT> refer to known ultracapacitor arrangements. The invention is directed to an ultracapacitor module according to claim <NUM>, and a corresponding method of operating an ultracapacitor module according to claim <NUM>.

In some examples, the techniques described herein relate to a computer readable medium containing program instructions for operating an ultracapacitor module connected to a voltage bus of a vehicle, the ultracapacitor module having an ultracapacitor cell stack containing one or more ultracapacitor cells, a bidirectional boost/buck DC/DC converter, wherein the ultracapacitor cell stack and the DC/DC converter are connected in series with the voltage bus, one or more voltage sensors configured to determine an operating voltage Vo of the voltage bus, and an electronic controller in electrical communication with the DC/DC converter and the one or more voltage sensors, wherein execution of the program instructions by one or more processors of a computer system causes the electronic controller to carry out: controlling the DC/DC converter using a first set of control parameters when an operating voltage Vo is greater than a target bus voltage value Vt; and controlling the DC/DC converter using a second set of control parameters different from the first set of control parameters when the operating voltage Vo is less than the target bus voltage value Vt.

The ultracapacitor module will now be described, by way of example with reference to the accompanying drawings, in which:.

The present disclosure describes an ultracapacitor module shown in <FIG>, hereafter referred to as the UCM <NUM>. The UCM <NUM> addresses many of the deficiencies of the prior art described above. The UCM <NUM> in this example protects the voltage supply bus in a vehicle, e.g., an internal combustion engine vehicle, a hybrid electric vehicle, or an electric vehicle, from voltage sags or flyback voltage spikes caused by the switching of high current draw loads on and off on the voltage supply bus, e.g., electric antilock brakes, electric power steering, etc., thereby providing protection from voltage sags and flyback voltage spikes having a duration of <NUM> microseconds to <NUM> milliseconds to other electronic modules on the voltage supply bus. The UCM <NUM> may also or alternatively be configured provide emergency back-up power to satisfy safety critical systems, such as brake-by-wire or power door locks, for <NUM> to <NUM> seconds, in case of a loss of the primary electrical power supply in order to meet the necessary automotive safety integrity level (ASIL) of these systems, such as defined by the International Standards Organization (ISO) <NUM>-<NUM>:<NUM> Road Vehicle Functions Safety Standard.

<FIG> is a block diagram of vehicle electrical system <NUM> utilizing ultracapacitor module <NUM> according to some embodiments. In some embodiments, vehicle electrical system <NUM> includes one or more power sources <NUM> (e.g., battery, alternator, etc.), one or more vehicle loads <NUM>, a voltage supply bus <NUM>, and the UCM <NUM>. UCM <NUM> is connected to the voltage supply bus <NUM> and is configured to selectively provide power to the voltage supply bus <NUM> (boost mode) or receive power from the voltage supply bus <NUM> (buck mode). The voltage on the voltage supply bus <NUM> is designated as operating voltage Vo and may also be referred to as bus voltage.

As shown in <FIG>, the UCM <NUM> includes an ultracapacitor cell stack <NUM> that has several ultracapacitor cells <NUM>. As used herein, an ultracapacitor cell is a capacitive storage device having a capacitance of at least <NUM> farads. In this example three <NUM> farad, <NUM> volt ultracapacitor cells <NUM> are connected in series, thereby providing the ultracapacitor cell stack <NUM> with an equivalent capacitance of <NUM> farads and a working range of <NUM> to <NUM> volts. The configuration of the ultracapacitor cell stack <NUM> could be 3S1P (<NUM> cells in series and <NUM> parallel string with 108F and <NUM>. 4V max) as in this example, or it could be 3S2P (<NUM> cells in series and <NUM> parallel strings with 217F and <NUM>. 4V max), or in general xSyP. The ultracapacitor cell stack <NUM> is configured to operate at currents up to <NUM> amperes. The UCM <NUM> also includes an electronic controller <NUM> which controls the voltage of each ultracapacitor cell <NUM> and thereby controls the voltage of the ultracapacitor cell stack <NUM>. The electronic controller <NUM> has one or more processors and memory. The processors may be microprocessors, application specific integrated circuits (ASIC), or built from discrete logic and timing circuits (not shown). Software instructions that program the processors may be stored in a non-volatile memory device (not shown). The memory device may be contained within the microprocessor or ASIC. Alternatively, the memory device may be a separate device. Non-limiting examples of the types of memory device that may be used include electrically erasable programmable read only memory (EEPROM), masked read only memory (ROM), and flash memory devices.

The UCM <NUM> further includes a bidirectional boost/buck DC/DC converter <NUM> that is capable of conducting at least the same current as the ultracapacitor cell stack <NUM> as the current flows in to or out of the ultracapacitor cell stack <NUM>. Under the control of the electronic controller <NUM>, the DC/DC converter <NUM> quickly switches between boost and buck modes. The time period for this transition is preferably in the order of <NUM> to <NUM> microseconds. Other electronic modules connected to the voltage supply bus <NUM> may also include capacitors that are appropriately sized to provide electrical power to these electronic modules during voltage transients on the voltage supply bus <NUM> while the DC/DC converter <NUM> is transitioning between boost and buck modes. The electronic controller <NUM> also controls the direction and the magnitude of electrical power flowing through the DC/DC converter <NUM>. The electronic controller <NUM> additionally monitors the voltage of the voltage supply bus <NUM> and adaptively determines its nominal value, its rate of change, and, optionally, its frequency spectrum content. The UCM <NUM> may optionally include a switch <NUM> to protect against reverse polarity voltage.

In some embodiments, UCM <NUM> includes a plurality of ultracapacitor cells <NUM> connected in series with one another to form an ultracapacitor cell stack <NUM>, a DC/DC converter <NUM>, a switch <NUM> and an electronic controller <NUM>. As shown in <FIG>, DC/DC converter <NUM> is connected in series between the plurality of ultracapacitor cells <NUM> and the voltage supply bus <NUM>. In general, UCM <NUM> operates by monitoring the operating voltage Vo on the voltage supply bus <NUM> and selectively operating DC/DC converter <NUM> to supply power to the voltage supply bus <NUM> when the operating voltage Vo falls below a threshold or target bus voltage value Vt (boost mode) and to receive power from the voltage supply bus <NUM> when the operating voltage Vo is above the threshold or target bus voltage value Vt (buck mode). To prevent the DC/DC converter <NUM> from oscillating between boost and buck modes, a dead band is set around the target bus voltage value Vt. The DC/DC converter <NUM> does not operate in boost mode until the operating voltage Vo is at or less than a lower dead band limit and the DC/DC converter <NUM> will continue to operate in boost mode until the operating voltage Vo is raised/boosted back to the target bus voltage value Vt (or within an acceptable tolerance of the target bus voltage value Vt). Similarly, the DC/DC converter <NUM> does not operate in buck mode until the operating voltage Vo is at or above an upper dead band limit and the DC/DC converter <NUM> will continue to operate in buck mode until the operating voltage Vo is lowered/bucked back to the target bus voltage value Vt (or within an acceptable tolerance of the target bus voltage value Vt). The dead band is typically selected to accommodate variations in the operating voltage Vo, which may be affected by wire and connector resistance, ambient temperature, vehicle-to-vehicle variances, component tolerances, system life stage, and electrical noise. In some embodiments, the UCM <NUM> accounts for variations in the operating voltage Vo that allows for utilization of a smaller dead band voltage range, as described in more detail below. In particular, in some embodiments the UCM <NUM> uses a table of voltage values (initial voltage value Vi) and corresponding temperatures. At vehicle start-up, a temperature is measured corresponding to an ambient temperature or a temperature of the UCM <NUM> is measured and the initial voltage value Vi for the corresponding temperature is selected from the table and is used to determine the target bus voltage value Vt. The voltage values in the table may be selectively updated over time in order to account for variances that are measured in the system. In this way, the UCM <NUM> is able to utilize learned voltage values to minimize the dead band voltage range that may otherwise be required. In some embodiments, the target bus voltage value Vt may also be adjusted during operation of the UCM <NUM> based on additional inputs received from the vehicle regarding actual or expected loads, events, etc..

As shown in <FIG>, electronic controller <NUM> is configured to monitor the operation of DC/DC converter <NUM> and includes a direction and current control block <NUM> to provide commands for controlling the operation of DC/DC converter <NUM>. Monitoring may include utilizing one or more sensors <NUM> to monitor the operating voltage Vo of the voltage supply bus <NUM>. Monitoring may further include monitoring ultracapacitor cell stack temperature. Electronic controller <NUM> provides as a command the direction of power flow (buck/boost) and a target voltage/current for the DC/DC converter <NUM>. As described in more detail below, the electronic controller <NUM> may further modify the target bus voltage Vt based on additional inputs received from the vehicle regarding actual or expected loads, events, etc. By controlling the target bus voltage Vt and controlling the direction of power (buck/boost), the dead band voltage range may be significantly narrowed. Electronic controller <NUM> is also configured to monitor and control the operation of the ultracapacitor cell stack <NUM>, including monitoring the balance, state of health (SOH), state of charge (SOC), diagnostics, safety, temperature, etc. associated with the ultracapacitor cell stack <NUM>.

As shown in <FIG>, UCM <NUM> may also include an electromagnetic interference/ electromagnetic compliance (EMI/EMC) filter <NUM> and passive capacitance <NUM> between the voltage supply bus <NUM> and the voltage sensing input of the electronic controller <NUM> which then passes through an anti-aliasing filter <NUM> within the electronic controller <NUM>. The UCM <NUM> may also include one or more current sensors <NUM> to monitor the current flowing to/from the ultracapacitor cells <NUM>, a first temperature sensor <NUM> to measure the temperature of the ultracapacitor cells <NUM>, a second temperature sensor <NUM> to measure the temperature of the DC/DC converter <NUM>, and one or more voltage sensors <NUM> configured to measure the operating voltage Vo of the voltage supply bus <NUM>.

As further shown in <FIG>, the electronic controller <NUM> may also include a digital anti-aliasing filter <NUM> to filter the operating voltage Vo input from the voltage supply bus <NUM>, thereby providing a filtered operating voltage Vo*. The filtered operating voltage Vo* is filtered to remove noise, such as that produced by the switching of the DC/DC converter <NUM> or other electrical devices connected to the voltage supply bus <NUM>. The electronic controller <NUM> is also configured to compare the operating voltage Vo to the upper and lower dead band limits and determine a buck gain if the operating voltage Vo is at or greater than the upper dead band limit and determine a boost gain if the operating voltage Vo is at or below the lower dead band limit. The buck/boost gain is sent to a direction and current control block <NUM> in the controller <NUM> to provide the commands for controlling the DC/DC converter <NUM>. A first set of control parameters includes the buck gain. A second set of control parameters includes the boost gain.

As shown in <FIG>, the buck/boost DC/DC converter <NUM> is connected in series between the ultracapacitor cell stack <NUM> in the ultracapacitor module <NUM> and the voltage supply bus <NUM> and is operated under the direction of the electronic controller <NUM>. The electronic controller <NUM> provides the DC/DC converter <NUM> with the ability to map the ultracapacitor cell stack <NUM> voltage to the operating voltage Vo. Actively controlling a programmable float voltage Vf is the means of mapping the ultracapacitor cell stack <NUM> voltage to the operating voltage Vo.

The operating voltage Vo has a relatively large variance range due to temperature, operational tolerances of other components, vehicle-to-vehicle variance, ultracapacitor module life stage, and electrical noise on the voltage supply bus <NUM>. Dual dead bands shown in the electronic controller <NUM> in <FIG> are established to avoid oscillation of the DC/DC converter <NUM> between boost and buck modes due to small variations of the operating voltage Vo. The dual dead bands between boost and buck modes are as large as, or larger than, the variances and tolerances described above to avoid undesirable switching between boost and buck modes. With large dead bands, the electronic controller <NUM> cannot minimize a disturbance on the voltage supply bus <NUM> because control of the voltage supply bus <NUM> does not begin until the operating voltage Vo is outside the limits of the dead bands. The electronic controller <NUM> may independently control an upper dead band with an upper dead band limit greater than the target bus voltage value Vt and a lower dead band with a lower dead band limit below the target bus voltage value Vt. The DC/DC converter <NUM> does not operate in boost mode until the operating voltage Vo is at or below the lower dead band limit and the DC/DC converter <NUM> will continue to operate in boost mode until the operating voltage Vo is raised/boosted back to the target bus voltage value Vt (or within an acceptable tolerance of the target bus voltage value Vt). Similarly, the DC/DC converter <NUM> does not operate in buck mode until the operating voltage Vo is at or greater than the upper dead band limit and the DC/DC converter <NUM> will continue to operate in buck mode until the operating voltage Vo is lowered/bucked back to the target bus voltage value Vt (or within an acceptable tolerance of the target bus voltage value Vt).

The UCM <NUM> mitigates several types of voltage fluctuations or transients on the voltage supply bus <NUM> as shown in <FIG>. Voltage sags may be caused by turning on high power loads connected to the voltage supply bus <NUM>. Voltage spikes may be caused by turning off high power loads connected to the voltage supply bus <NUM>, most significantly primarily inductive loads. The voltage sags are relatively low power but have longer duration and higher energy while the voltage spikes are of much shorter duration, lower energy, and higher power than the voltage sags. The UCM <NUM> has different control mechanisms for each type of voltage fluctuation.

To control the two different voltage disturbances on the voltage supply bus <NUM>, the electronic controller <NUM> has two individual control loops with different gain characteristics for voltage sags and voltage spikes. Each control loop has a dead band so that the DC/DC converter <NUM> avoids transitioning from boost mode to buck mode during the same transient.

An upper or positive dead band <NUM>, shown in <FIG>, prevents undesired transitions to buck mode and a lower or negative dead band <NUM>, shown in <FIG>, prevents undesired transitions to boost mode. In <FIG>, the upper and lower dead bands are centered around the target bus voltage value Vt which is determined by the electronic controller <NUM>. In particular the lower dead band <NUM> shown in <FIG> applies to the case of a voltage sag <NUM>. When the operating voltage Vo of the voltage supply bus <NUM> is at or below a lower dead band limit of the lower dead band <NUM>, the DC/DC converter <NUM> will boost the operating voltage Vo with current drawn from the ultracapacitor cell stack <NUM>. The upper dead band <NUM> that is shown in <FIG> applies to a voltage spike <NUM>, e.g., caused by a current flyback from an inductive load on the voltage supply bus <NUM>. When the operating voltage Vo of the voltage supply bus <NUM> is at or greater than an upper dead band limit of the upper dead band <NUM>, the DC/DC converter <NUM> will buck current from the voltage supply bus <NUM> to the ultracapacitor cell stack <NUM>, thereby decreasing the operating voltage Vo.

<FIG> shows an example where small periodic voltage spikes <NUM> are present on the voltage supply bus <NUM>. To address this issue, the upper dead band limit of the upper dead band <NUM> may be raised so that the upper dead band <NUM> is wider than the lower dead band <NUM>.

<FIG> shows an example where small periodic voltage sags <NUM> are present on the voltage supply bus <NUM>. To address this issue, the lower dead band limit of the lower dead band <NUM> may be lowered so that the lower dead band <NUM> is wider than the upper dead band <NUM>.

<FIG> shows an example where a sinusoidal noise <NUM>, e.g., produced by an alternator, is present on the voltage supply bus <NUM>. To address this issue, the upper dead band limit of the upper dead band <NUM> may be raised and the lower dead band limit of the lower dead band <NUM> may be lowered so that respective upper and lower dead band limits of the respective upper and lower dead bands <NUM>, <NUM> exceed the limits of the sinusoidal noise.

<FIG> shows the reduction of the voltage spike <NUM> by bucking current from the voltage supply bus <NUM> to the ultracapacitor cell stack <NUM> of the UCM <NUM> and <FIG> shows the shows the reduction of the voltage sag <NUM> by boosting the operating voltage Vo with current drawn from the ultracapacitor cell stack <NUM> of the UCM <NUM>.

To control different types of voltage disturbances (e.g., sags, spikes) on the voltage supply bus <NUM>, the electronic controller <NUM> has two individual control loops with different gain characteristics. Each control loop has a dead band so that the DC/DC converter <NUM> avoids transitioning from boost mode to buck mode during the same transient. An upper dead band <NUM>, shown in <FIG>, prevents undesired transitions to buck mode and a lower dead band <NUM>, shown in <FIG>, prevents undesired transitions to boost mode. Each of the upper and lower dead bands may have different widths and are disposed on opposite sides of the target bus voltage value Vt, which is controlled by the electronic controller <NUM>. In particular the lower dead band <NUM> shown in <FIG> is disposed below the target bus voltage value Vt and addresses the case of a voltage sag. When the operating voltage Vo of the voltage supply bus <NUM> is less than a lower dead band limit of the lower dead band <NUM>, the DC/DC converter <NUM> will boost the operating voltage Vo with current drawn from the ultracapacitor cell stack <NUM>. The upper dead band <NUM> that is shown in <FIG> is disposed above the target bus voltage value Vt and addresses the case of a voltage spike. When the operating voltage Vo of the voltage supply bus <NUM> exceeds an upper dead band limit of the upper dead band <NUM>, the DC/DC converter <NUM> will buck current from the voltage supply bus <NUM> to the ultracapacitor cell stack <NUM>.

Additionally, the electronic controller <NUM> may measure the direction and frequency content of disturbances on the voltage supply bus <NUM> and use this information to modify the dead bands. Some examples of this feature are shown in <FIG>. The dual control loops are shown in <FIG>. The separate control loops allow for different gains for positive and negative voltage transients. For example, when using proportional-integral-derivative (PID) controllers, the proportional gain, integral gain, and/or derivative gain of the first control loop which controls the DC/DC converter <NUM> when the operating voltage Vo of the voltage supply bus <NUM> is greater than the target bus voltage value Vt, i.e., during a voltage spike, may be different than the proportional gain, integral gain, and/or derivative gain of the second control loop which controls the DC/DC converter <NUM> when the operating voltage Vo of the voltage supply bus <NUM> is less than the target bus voltage value Vt, i.e., during a voltage sag. Because the UCM <NUM> has different control loop gains for two different ranges of bus transients, the UCM <NUM> provides independent compensation for both voltage spikes and voltage sags in the operating voltage Vo of the voltage supply bus <NUM>.

In some embodiments, the target bus voltage value Vt, the upper dead band limit and the lower dead band limit may be set by an external module over a LIN/CAN communication bus so that the UCM <NUM> operates in a primary/secondary relationship with a vehicle DC/DC converter (not shown). In other embodiments, the target bus voltage value Vt, the upper dead band limit and the lower dead band limit may be set to the same value by an external module over a LIN/CAN communication bus to provide filtering of a sinusoidal noise voltage on the voltage supply bus <NUM>, e.g., caused by an alternator.

<FIG> shows the operating voltage range of the ultracapacitor cell stack <NUM> between an upper voltage limit (designated as "ULTRACAPACITOR SURGE LIMIT" in <FIG>) and a lower voltage limit (designated as "DCDC CONVERTER LOW VOLTAGE BROWNOUT" in <FIG>). The upper voltage limit is set to protect the ultracapacitor cell stack <NUM> from absorbing excess voltage from the voltage supply bus <NUM> that would damage the ultracapacitor cell stack <NUM>. The lower voltage limit is set at a level below which the ultracapacitor cell stack <NUM> is not able to supply enough power to the DC/DC converter <NUM> to raise the voltage on the voltage supply bus <NUM>. The programmable float voltage value Vf is set between the upper and lower voltage limits and can be controlled by the electronic controller <NUM>. The float voltage value Vf can be shifted down to increase charging headroom between the float voltage value Vf and the upper voltage limit, which decreases the discharging headroom between the float voltage value Vf and the lower voltage limit. Alternatively, the float voltage value Vf can be shifted up to increase discharging headroom between the float voltage value Vf and the lower voltage limit, which decreases the charging headroom between the float voltage value Vf and the upper voltage limit. The ultracapacitor cell stack <NUM> is charged to absorb excess voltage on the voltage supply bus <NUM> and the ultracapacitor cell stack <NUM> is discharged to provide electrical power to raise the voltage on the voltage supply bus <NUM>.

Claim 1:
An ultracapacitor module (<NUM>), comprising:
an ultracapacitor cell stack (<NUM>) containing one or more ultracapacitor cells;
a bidirectional boost/buck DC/DC converter (<NUM>), wherein the ultracapacitor cell stack (<NUM>) and the DC/DC converter (<NUM>) are configured to be connected in series with a voltage supply bus (<NUM>) of a vehicle;
one or more voltage sensors (<NUM>) configured to determine an operating voltage Vo of the voltage supply bus (<NUM>); and
an electronic controller (<NUM>) in electrical communication with the DC/DC converter (<NUM>) and the one or more voltage sensors (<NUM>),
characterised in that
the electronic controller (<NUM>) is configured to:
control the DC/DC converter (<NUM>) using a first set of control parameters when the operating voltage Vo is greater than a target bus voltage value Vt, and
control the DC/DC converter (<NUM>) using a second set of control parameters different from the first set of control parameters when the operating voltage Vo is less than the target bus voltage value Vt.