Patent Description:
Continued growth in virtual machines and cloud computing will continue to increase the demand for high-quality, serviceable, computing devices that include multichip packages (MCP).

<NPL> discloses a first probe substrate comprising vertically compliant probes for contacting electrical I/Os and grating- in-waveguide I/Os for optical probing. The second MEMS probe module uses microsockets and through-substrate interconnects to contact pillar-shaped electrical and optical I/Os and to redistribute signals, respectively.

Embodiments described herein may be related to apparatuses, processes, systems, and techniques related to using micro socket arrays with fine pitch contacts to electrically couple dies, in particular PIC dies, within MCP photonics packages. In embodiments, micro socket arrays may be used in conjunction with multichip module packaging that include silicon photonic engines and optical fiber modules on the same package. In embodiments, these packages may also use a system on chip (SOC), as well as fine pitch die to die connections, for example an EMIB, that may be used to connect a PIC with an SOC.

In embodiments, the PIC may have a plurality of copper pillars that may be attached substantially orthogonally to a surface of the PIC, and maybe electrically coupled with photonic integrated circuitry within the PIC. In embodiments, the pitch of the copper pillars may be very fine, for example less than <NUM> micrometers (µm), that may electrically and physically couple with a micro socket array.

Legacy implementations for coupling PICs, or other dies, use permanent attach solutions, for example thermal compression bonding or hybrid bonding. These legacy approaches have some disadvantages. First, there is significant yield and cost impact. This may be due to current and future generation packages involving multiple numbers of modules to be integrated into a package. For example, if the yield associated with one module attached through a permanent connection is Y (less than <NUM>), then the total yield of attaching N such modules is YN, which is very much less than Y.

Second, with legacy implementations, there is increased package assembly and testing complexity. With the growing complexity of modules, such as photonics engines with fine alignment optical fibers, the cost and complexity of package assembly may increase many times with the legacy approach of permanently bonding the module to the package. In implementations, significant process and material investments need to be made to ensure robust thermal-mechanical and reliable MCPs created with these legacy approaches. Also, in implementations, text complexity increases to ensure all modules, post attach process, meet quality assurance thresholds.

Embodiments described herein may use an architecture that uses a micro socket array with fine pitch contacts. This micro socket array can be assembled to an SOC package through existing assembly methods, such as thermal compression bonding to the main SOC package. Different modules, such as silicon based PICs with optical fibers, can then be assembled to the micro socket array to form the electrical connection between the module in the package. In embodiments, the PICs with optical fibers also have the flexibility to detach from the package by uncoupling and from the micro socket array. Thus, separable interface connections may be created between the module and the main SOC package.

Embodiments may increase MCP yield because individual PICs that fail quality thresholds after assembly may be removed and replaced using the micro socket array architecture. In this way, it is easier to replace a PIC module, and in particular easier to attach a "known good" PIC module. Embodiments also decouple complexity associated with the PIC die and warpage from die to die because fibers may attach on individual dies. For example, in legacy implementations, there will be warpage driven by coefficient of thermal expansion (CTE) difference between package substrate and PIC that needs to be accounted for during fiber assembly which makes it complex (impacts overall assembly yield). In embodiments, a micro socket architecture alleviates this complexity. In addition, embodiments may address field serviceability, with customers able to plug and unplug PIC, rather modules, that use a micro socket array architecture as needed.

In addition, embodiments may provide new options for package thermal architecture, for example a PIC that has a different heat spreader thermally coupled to it as opposed to SOC thermal architectures that include one heat spreader. For example, a PIC may have a separate heat spreader, such as a copper integrated heat spreader (IHS), a micro channel IHS, heat fins, or may even be a bare die. As a result, this may allow reduced thermal cross talk between components, and increase performance.

It should be appreciated that embodiments described herein may be discussed with respect to tonics MCP architectures, but may apply to other MCP architectures as well, including other devices such as high-bandwidth memory (HBM). Other embodiments may apply to using micro socket arrays to electrically and/or physically couple any two devices, such as a die to another die, a die to a substrate, or any two components.

In the following detailed description, reference is made to the accompanying drawings which form a part hereof, wherein like numerals designate like parts throughout, and in which is shown by way of illustration embodiments in which the subject matter of the present disclosure may be practiced.

The description may use perspective-based descriptions such as top/bottom, in/out, over/under, and the like. Such descriptions are merely used to facilitate the discussion and are not intended to restrict the application of embodiments described herein to any particular orientation.

The term "coupled with," along with its derivatives, may be used herein. "Coupled" may mean one or more of the following. "Coupled" may mean that two or more elements are in direct physical or electrical contact. However, "coupled" may also mean that two or more elements indirectly contact each other, but yet still cooperate or interact with each other, and may mean that one or more other elements are coupled or connected between the elements that are said to be coupled with each other. The term "directly coupled" may mean that two or more elements are in direct contact.

Various operations may be described as multiple discrete operations in turn, in a manner that is most helpful in understanding the claimed subject matter. However, the order of description should not be construed as to imply that these operations are necessarily order dependent.

As used herein, the term "module" may refer to, be part of, or include an ASIC, an electronic circuit, a processor (shared, dedicated, or group) and/or memory (shared, dedicated, or group) that execute one or more software or firmware programs, a combinational logic circuit, and/or other suitable components that provide the described functionality.

Various Figures herein may depict one or more layers of one or more package assemblies. The layers depicted herein are depicted as examples of relative positions of the layers of the different package assemblies. The layers are depicted for the purposes of explanation, and are not drawn to scale. Therefore, comparative sizes of layers should not be assumed from the Figures, and sizes, thicknesses, or dimensions may be assumed for some embodiments only where specifically indicated or discussed.

<FIG> illustrates a side view of an example legacy multichip package (MCP) with a photonics integrated circuit die (PIC) coupled with an embedded multi-die interconnect bridge (EMIB) and a substrate. Legacy package <NUM> may include a PIC <NUM>, that is physically and electrically coupled to a substrate <NUM> and to an EMIB <NUM> that may be within the substrate <NUM>. The EMIB <NUM> may be electrically coupled to a SOC <NUM>, which may also be electrically and/or physically coupled with the substrate <NUM>.

In legacy implementations, electrical routing <NUM> on the PIC <NUM> die may be coupled with electrical connectors <NUM> that electrically couple the PIC <NUM> die with the substrate <NUM>. In other legacy implementations, the electrical connectors <NUM> may electrically couple with a redistribution layer (RDL) or organic routing on the substrate <NUM>. In legacy implementations, fine pitched electrical connectors <NUM> may couple with the EMIB <NUM>. In legacy implementations, the EMIB <NUM> may be electrically coupled with the SOC <NUM>, or with other dies (not shown) that may be coupled with substrate <NUM>.

PIC <NUM> may include one or more waveguides <NUM>, and may also include V-grooves (not shown) to accept one or more optical fibers <NUM> to optically couple with the PIC <NUM>. In legacy implementations, a support mechanism <NUM> may be physically coupled with the PIC <NUM>, or physically coupled with an IHS <NUM>. The support mechanism <NUM> may be used to provide support for the one or more optical fibers <NUM> that are optically coupled to the PIC <NUM>. In embodiments, the IHS <NUM> may be thermally coupled with both the SOC <NUM> and the PIC <NUM>. In embodiments a thermal interface material (TIM) <NUM> may be disposed between the SOC <NUM> and the IHS <NUM> facilitate thermal conductivity to draw heat away from the SOC <NUM> and the PIC <NUM>.

Note that the physical and electrical coupling between the PIC <NUM> and the EMIB <NUM>/substrate <NUM> is a permanent connection such as through reflow soldering, thermal compression bonding, and/or epoxy flow. To disassemble the PIC from the legacy package <NUM> includes removing the IHS <NUM> and decoupling the PIC <NUM> from the EMIB <NUM>/substrate <NUM> which will likely damage the surfaces of the PIC <NUM>, the EMIB <NUM>, and the substrate <NUM>.

<FIG> illustrates a side view of a MCP that includes a PIC coupled with an EMIB and a substrate using copper pillars of the PIC inserted into a micro socket array, in accordance with various embodiments. Package <NUM> may be a MCP that includes a PIC <NUM> that is electrically coupled to substrate <NUM> and to EMIB <NUM>. In embodiments, EMIB <NUM> may be an omni-directional interconnect (ODI). In embodiments, the EMIB <NUM> (or ODI) may be either passive or active. In embodiments, active bridges may have a PIC controller/PHY under the micro socket array to enable fast and narrow signaling and/or allow increased socket pitch to <NUM> to <NUM> micrometers. In embodiments, the EMIB <NUM> may be electrically coupled with the SOC <NUM>. In embodiments, the PIC <NUM>, substrate <NUM>, SOC <NUM>, and EMIB <NUM> may be similar to PIC <NUM>, substrate <NUM>, SOC <NUM>, or EMIB <NUM> of <FIG>.

In embodiments, electrical routing <NUM> of PIC <NUM> maybe electrically and physically coupled with an array of copper pillars <NUM>. These copper pillars <NUM> may insert into a micro socket array <NUM>. In embodiments, at least some of the micro sockets within micro socket array <NUM> have a pitch "P" <NUM> between electrodes <NUM>. In embodiments, the pitch P may be <NUM> or less. In embodiments discussed below, the micro socket array <NUM> may be a two-dimensional array, with a pitch P between micro sockets in various directions at <NUM> or less. Thus, a pitch of the copper pillars <NUM> may also be <NUM> or less.

In embodiments, one or more optical fibers <NUM> may optically couple with the PIC <NUM> using a plurality of V-grooves (not shown), and may optically couple with the one or more optical fibers <NUM> using waveguide <NUM>. In embodiments, support <NUM> may be coupled with a heat spreader <NUM> to provide physical support for the one or more optical fibers <NUM>. Note that in package <NUM>, the heat spreader <NUM> that is thermally coupled with the SOC <NUM>, which may be thermally coupled using a TIM <NUM>, is a different heat spreader that heat spreader <NUM> that is thermally coupled to the PIC <NUM>, which may be thermally coupled using TIM <NUM>. By using two distinct heat spreaders <NUM>, <NUM>, the PIC <NUM> may be removed from the micro socket array <NUM> for either cleaning, inspection, debugging or replacement.

<FIG> shows various stages in a manufacturing process for a PIC to couple with a micro socket array, in accordance with various embodiments. Partial package <NUM> shows a PIC <NUM> optically coupled with a waveguide <NUM>, which may be similar to PIC <NUM> and waveguide <NUM> of <FIG>. In addition, the PIC <NUM> may include V-grooves <NUM>, into which one or more optical fibers may be inserted. Copper pillars <NUM>, which may be similar to copper pillars <NUM> of <FIG>, may be formed on a lower side of the PIC <NUM>, proximate to an electronic layer <NUM> on the PIC <NUM>. In embodiments, the copper pillars <NUM> may include nickel/gold/palladium surface finish. In embodiments the copper pillars <NUM> may have a <NUM>-<NUM> pitch. In embodiments, the copper pillars <NUM> may be manufactured using wafer level plating.

Partial package <NUM> includes the partial package <NUM>, with additional elements added. In embodiments, a TIM <NUM>, which may be similar to TIM <NUM> of <FIG>, may be applied to a top surface of the PIC <NUM>. In embodiments, a heat spreader <NUM>, which may be similar to heat spreader <NUM> of <FIG>, may be applied and thermally coupled with the PIC <NUM> and/or the TIM <NUM>. In embodiments, the heat spreader <NUM> may be made of copper, some other metal, or some other metal alloy. In embodiments, the design of the heat spreader <NUM> may include a microchannel, a heat fin, a vapor chamber or the like.

Partial package <NUM> may include the elements of partial package <NUM>, with additional components added. In particular, a support <NUM> may be adhesively physically coupled, or coupled in some other way, to heat spreader <NUM>. Support <NUM> may be similar to support <NUM> of <FIG>, which may be used to provide physical support for one or more optical fibers <NUM> into the V-groove <NUM>. In embodiments, other support mechanisms may be used such as epoxy, adhesive or the like.

<FIG> shows various stages in a manufacturing process for a micro socket array to be coupled with an EMIB and a substrate, in accordance with various embodiments. Partial package <NUM> may include substrate <NUM> that includes an EMIB <NUM> that may be electrically coupled to an SOC <NUM>. The SOC <NUM> may be thermally coupled to a heat spreader <NUM>, and may have a TIM <NUM> thermally coupling the heat spreader <NUM> and the SOC <NUM>. The substrate <NUM>, EMIB <NUM>, SOC <NUM>, heat spreader <NUM>, and TIM <NUM> may be similar to the substrate <NUM>, EMIB <NUM>, SOC <NUM>, heat spreader <NUM>, and TIM <NUM> of <FIG>.

Micro socket array <NUM>, which may be similar to micro socket array <NUM> of <FIG>, is shown as a separate component, ready to be physically and/or electrically coupled onto the substrate <NUM> and/or EMIB <NUM>. Micro socket array <NUM> includes individual micro sockets <NUM> with openings <NUM> to receive a copper pin such as copper pin <NUM> of <FIG>. In embodiments, electrical pin connectors <NUM> may come into physical and electrical contact with the copper pin after insertion. A connector, such as connector <NUM> is electrically coupled with an electrical pin connector <NUM> for electrical couplings that may be with the EMIB <NUM>.

In embodiments, a different connector, such as connector <NUM> may electrically and/or physically couple with the substrate <NUM>. In embodiments, the connectors <NUM>, <NUM> may be associated with different groups of micro sockets <NUM> within micro socket array <NUM> that may have a different type of connector or may have a different pitch. In addition, there may be a number of different type of supports for the individual micro sockets <NUM> within the micro socket array <NUM>. For example, a dielectric <NUM> may be used to provide structure, support electrical connections, and maintain pitch between the individual micro sockets <NUM>.

Partial package <NUM> shows the micro socket array <NUM> physically and electrically coupled to the substrate <NUM> and to the EMIB <NUM>. In embodiments, thermal compression bonding may be used to provide this coupling.

<FIG> shows a perspective view of a micro socket array on a substrate, in accordance with various embodiments. Micro socket array <NUM> shows a perspective view of a plurality of micro sockets <NUM>, each having an opening <NUM>, that are arranged in rows <NUM> and columns <NUM>, with each micro socket <NUM> supported in a dielectric <NUM>. In embodiments, these may be similar to micro socket <NUM>, opening <NUM>, and dielectric <NUM> of <FIG>. In embodiments, the dielectric <NUM> may be some other micro socket array <NUM> supporting mechanism. In embodiments, each pitch of the micro sockets <NUM> may be less than <NUM>.

Although the micro sockets <NUM> are shown in a grid array, in embodiments micro sockets <NUM> may form some other pattern. In other embodiments, the micro sockets <NUM> may be arranged in groups of micro sockets <NUM>, each having a different pitch. In embodiments, there may be one group of micro sockets <NUM>, and another group of wider-spaced sockets (not shown) that have a pitch greater than <NUM>. In this way, the micro socket array <NUM> may couple with different electrical features that may be on the substrate, such as EMIB <NUM> that has a micro pitch and a substrate <NUM> of <FIG> with connectors on the substrate having a larger pitch.

<FIG> shows various stages in coupling a PIC to a micro socket array, in accordance with various embodiments. Partial package <NUM> includes a photonics assembly <NUM>, which may be similar to photonics assembly <NUM> of <FIG>, prior to assembly. Photonics assembly <NUM> already has the one or more optical fibers <NUM> optically coupled with the PIC <NUM>, which may be similar to one or more optical fibers <NUM> and PIC <NUM> of <FIG>. As shown, the copper pillars <NUM>, which may be similar to copper pillars <NUM> of <FIG>, are ready to be inserted into micro socket array <NUM>, which may be similar to micro socket array <NUM> of <FIG>. Partial package <NUM> shows the final assembly, with copper pillars <NUM> inserted into the micro socket array <NUM> to form an electrical and physical coupling region <NUM>.

<FIG> shows various examples of micro sockets and how they couple with copper pillars, in accordance with the various embodiments. Coupling region <NUM>, which may be similar to coupling region <NUM> of <FIG>, shows an implementation of a split ring interconnect. The socket <NUM>, which may be similar to socket <NUM> of <FIG>, includes top electrical connectors <NUM> into which copper pillars <NUM> coupled with PIC <NUM> are inserted. According to the claimed invention, the multiple electrical connectors <NUM> bend to allow the copper pillars <NUM> to enter the socket <NUM>, and then provide a physical resistance if there is an attempt to extract the copper pillars <NUM> from the socket <NUM> by increasing force against the side of the copper pillars <NUM>.

In embodiments, there may be an electrical connection <NUM> between the top electrical connectors <NUM> and the base <NUM> of the socket <NUM>. In embodiments, there may be a solder connection <NUM>, or some other electrical and/or physical coupling, that may electrically and physically couple with an EMIB <NUM>. Other micro sockets may have a similar structure, but couple with electrical pad <NUM> that may be part of the substrate <NUM>. In embodiments, the electrical pad <NUM> may be part of an RDL layer or organic routing at the surface of substrate <NUM>.

Coupling region <NUM>, which may be similar to coupling region <NUM> of <FIG>, shows another example of a socket mechanism with a dielectric layer <NUM>, which may be similar to dielectric layer <NUM> of <FIG>, that provides physical support for a main electrical connector <NUM> within the dielectric layer <NUM>. The main electrical connector <NUM> may be coupled with a top electrical connector <NUM>, that in embodiments may be unibody with main electrical connector <NUM>. The copper pillars <NUM>, when seated, may come into physical and electrical contact with top electrical connector <NUM>.

In embodiments, the top electrical connector <NUM> may bend to increase the quality of the physical and electrical contact with the copper pillars <NUM>. In embodiments, the main electrical connector <NUM> may be electrically coupled with a solder region <NUM>. In embodiments, the solder region <NUM> may be some other conductive alloy or metal. In embodiments, solder region <NUM> may electrically couple with an EMIB <NUM>, which may be similar to EMIB <NUM> of <FIG>. In other embodiments, solder region <NUM> may come in contact with the substrate <NUM>, which may be similar to substrate <NUM> of <FIG>. In embodiments, the electrical contact may be with an RDL (not shown) or with organic routing (not shown) on the surface of the substrate <NUM>.

Coupling region <NUM>, which may be similar to coupling region <NUM> of <FIG>, shows another example of a socket mechanism with a dielectric layer <NUM>, which may be similar to dielectric layer <NUM> of <FIG>, that provides physical support for a main electrical connector <NUM> within the dielectric layer <NUM>. In embodiments, the main electrical connector <NUM> may be electrically and physically coupled with a top electrical connector <NUM> and a bottom electrical connector <NUM>.

In embodiments, the top electrical connector <NUM>, bottom electrical connector <NUM>, and main electrical connector <NUM> may be a unibody structure. Within coupling region <NUM>, the bottom electrical connector <NUM> may couple with a copper pillars <NUM> that may be physically and electrically couple with an EMIB <NUM>. In embodiments, the bottom electrical coupler <NUM> may flex as it comes into contact with the copper pillars <NUM> as the PIC <NUM> applies force to the top electrical connector <NUM>. Note that in embodiments, copper pillars <NUM> may also be electrically and/or physically coupled to the substrate <NUM>. In embodiments, the copper pillars <NUM> may be coupled with an RDL (not shown) or organic routing (not shown) on the surface of the substrate <NUM>.

<FIG> shows an example of an integrated heat spreader (IHS) clip to provide physical and/or thermal coupling to a PIC, in accordance with various embodiments. Partial package <NUM>, which may be similar to package <NUM> of <FIG>, includes a PIC <NUM> that is about to be electrically and physically coupled with a micro socket array <NUM>. In embodiments, PIC <NUM> and micro socket array <NUM> may be similar to PIC <NUM> and micro socket array <NUM> of <FIG>. In addition, micro socket array <NUM> may be electrically and physically coupled with substrate <NUM>, EMIB <NUM>, and SOC <NUM>, which may be similar to substrate <NUM>, EMIB <NUM>, and SOC <NUM> of <FIG>.

In embodiments, heat spreader <NUM>, which may be similar to heat spreader <NUM> of <FIG>, may be thermally coupled with the SOC <NUM>. In embodiments, heat spreader <NUM>, which may be similar to heat spreader <NUM> of <FIG>, may be thermally coupled with the substrate <NUM>. As shown with respect to <FIG>, heat spreader <NUM> is not physically or thermally coupled with heat spreader <NUM>. In embodiments shown with respect to partial package <NUM>, a heat spreader clip <NUM> may be inserted between heat spreader <NUM> and heat spreader <NUM>. In embodiments, not only would heat spreader clip <NUM> thermally couple heat spreader <NUM> and <NUM>, but heat spreader clip <NUM> may also serve to provide a downward force on the PIC <NUM> to physically and electrically couple the PIC <NUM> with the micro socket array <NUM>.

As shown in partial package <NUM>, portions of the heat spreader <NUM> may be bent at locations <NUM> to allow movement in toggle portion <NUM> to allow the locations <NUM> and the toggle portion <NUM> to enter an internal region of the partial package <NUM>. As shown with respect to package <NUM>, the heat spreader clip <NUM> is completely inserted into the package, providing a continual heat spreader as well as to provide a downward force on the PIC <NUM> to secure it to the micro socket array <NUM>. In other embodiments, different designs may be used to insert the heat clip <NUM> into the package <NUM> and have it retained therein. Some embodiments may include a spring (not shown) or other mechanism to provide thermal contact and sustained physical pressure on the PIC <NUM>. In embodiments, the heat spreader clip <NUM> may have mechanisms that allow its removal as well as secure the heat spreader clip <NUM> into position.

<FIG> illustrates an example process for adding copper pillars to a PIC, in accordance with various embodiments. Process <NUM> may be implemented by techniques, processes, apparatus, or systems as described or related to embodiments described herein, and particularly with respect to <FIG>.

At block <NUM>, the process may include identifying a die having a first side and the second side opposite the first side. In embodiments the die may at least be PIC <NUM> of <FIG>, <NUM> of <FIG>, <NUM> of <FIG>, <NUM> of <FIG>, or <NUM> of <FIG>. In embodiments, the second side of the die may be thermally coupled to a heat sink that may at least include heatsink <NUM> of <FIG>, <NUM> of <FIG>, <NUM> of <FIG>, or <NUM> of <FIG>.

At block <NUM>, the process may further include coupling a plurality of pillars to the first side of the die, the plurality of pillars being electrically conductive and substantially orthogonal to the first side of the die, wherein a pitch of the plurality of pillars is less than <NUM>. In embodiments, the pillars may at least be pillars <NUM> of <FIG>, <NUM> of <FIG>, <NUM> of <FIG>, or <NUM> of <FIG>.

<FIG> schematically illustrates a computing device, in accordance with embodiments. The computer system <NUM> (also referred to as the electronic system <NUM>) as depicted can embody all or part of micro socket electrical couplings for dies, according to any of the several disclosed embodiments and their equivalents as set forth in this disclosure. The computer system <NUM> may be a mobile device such as a netbook computer. The computer system <NUM> may be a mobile device such as a wireless smart phone. The computer system <NUM> may be a desktop computer. The computer system <NUM> may be a hand-held reader. The computer system <NUM> may be a server system. The computer system <NUM> may be a supercomputer or high-performance computing system.

In an embodiment, the electronic system <NUM> is a computer system that includes a system bus <NUM> to electrically couple the various components of the electronic system <NUM>. The system bus <NUM> is a single bus or any combination of busses according to various embodiments. The electronic system <NUM> includes a voltage source <NUM> that provides power to the integrated circuit <NUM>. In some embodiments, the voltage source <NUM> supplies current to the integrated circuit <NUM> through the system bus <NUM>.

The integrated circuit <NUM> is electrically coupled to the system bus <NUM> and includes any circuit, or combination of circuits according to an embodiment. In an embodiment, the integrated circuit <NUM> includes a processor <NUM> that can be of any type. As used herein, the processor <NUM> may mean any type of circuit such as, but not limited to, a microprocessor, a microcontroller, a graphics processor, a digital signal processor, or another processor. In an embodiment, the processor <NUM> includes, or is coupled with, all or part of an optical multichip package with multiple SOC dies, as disclosed herein. In an embodiment, SRAM embodiments are found in memory caches of the processor. Other types of circuits that can be included in the integrated circuit <NUM> are a custom circuit or an application-specific integrated circuit (ASIC), such as a communications circuit <NUM> for use in wireless devices such as cellular telephones, smart phones, pagers, portable computers, two-way radios, and similar electronic systems, or a communications circuit for servers. In an embodiment, the integrated circuit <NUM> includes on-die memory <NUM> such as static random-access memory (SRAM). In an embodiment, the integrated circuit <NUM> includes embedded on-die memory <NUM> such as embedded dynamic random-access memory (eDRAM).

In an embodiment, the integrated circuit <NUM> is complemented with a subsequent integrated circuit <NUM>. Useful embodiments include a dual processor <NUM> and a dual communications circuit <NUM> and dual on-die memory <NUM> such as SRAM. In an embodiment, the dual integrated circuit <NUM> includes embedded on-die memory <NUM> such as eDRAM.

In an embodiment, the electronic system <NUM> also includes an external memory <NUM> that in turn may include one or more memory elements suitable to the particular application, such as a main memory <NUM> in the form of RAM, one or more hard drives <NUM>, and/or one or more drives that handle removable media <NUM>, such as diskettes, compact disks (CDs), digital variable disks (DVDs), flash memory drives, and other removable media known in the art. The external memory <NUM> may also be embedded memory <NUM> such as the first die in a die stack, according to an embodiment.

In an embodiment, the electronic system <NUM> also includes a display device <NUM>, an audio output <NUM>. In an embodiment, the electronic system <NUM> includes an input device such as a controller <NUM> that may be a keyboard, mouse, trackball, game controller, microphone, voice-recognition device, or any other input device that inputs information into the electronic system <NUM>. In an embodiment, an input device <NUM> is a camera. In an embodiment, an input device <NUM> is a digital sound recorder. In an embodiment, an input device <NUM> is a camera and a digital sound recorder.

As shown herein, the integrated circuit <NUM> can be implemented in a number of different embodiments, including all or part of micro socket electrical couplings for dies, according to any of the several disclosed embodiments and their equivalents, an electronic system, a computer system, one or more methods of fabricating an integrated circuit, and one or more methods of fabricating an electronic assembly that includes a package substrate implementing all or part of micro socket electrical couplings for dies, according to any of the several disclosed embodiments as set forth herein in the various embodiments and their art-recognized equivalents. The elements, materials, geometries, dimensions, and sequence of operations can all be varied to suit particular I/O coupling requirements including array contact count, array contact configuration for a microelectronic die embedded in a processor mounting substrate according to any of the several disclosed processes used for micro socket electrical couplings for dies and their equivalents. A foundation substrate may be included, as represented by the dashed line of <FIG>. Passive devices may also be included, as is also depicted in <FIG>.

Claim 1:
An apparatus comprising:
a die (<NUM>) with a first side and a second side opposite the first side;
a plurality of pillars (<NUM>) that are electrically conductive and disposed on the first side of the die (<NUM>), each of the plurality of pillars (<NUM>) orthogonal to the first side of the die (<NUM>);
wherein a pitch of the plurality of pillars (<NUM>) is less than <NUM>;
an embedded multi-die interconnect bridge (<NUM>), EMIB; and
one or more sockets (<NUM>) coupled to the EMIB (<NUM>) via a solder connection (<NUM>);
wherein each socket (<NUM>) comprises electrical connectors (<NUM>), a base (<NUM>), and an electrical connection (<NUM>) between the electrical connectors (<NUM>) and the base (<NUM>), said electrical connectors (<NUM>) configured to receive one of said pillars (<NUM>) and to bend to allow the pillar (<NUM>) to enter the socket (<NUM>),
characterised in that said electrical connectors (<NUM>) are configured to provide a physical resistance if there is an attempt to extract the pillar (<NUM>) from the socket (<NUM>) by increasing force against the side of the pillar (<NUM>).