Patent Description:
In many applications, multiple resistive temperature measurement devices (RTD's) can be used in a given environment to sense temperature for system operation. Traditionally, this requires a separate pair of dedicated wires to measure the differential resistance across each RTD. This can quickly increase the overall system weight, as well as connector and wiring complexity. A traditional system having N RTD's, would then require at least N+<NUM> wires to measure each resistive element separately.

Such conventional methods and systems have generally been considered satisfactory for their intended purpose. However, there is still a need in the art for improved resistive temperature measurement systems. The present disclosure provides a solution for this need.

<CIT> discloses an architecture for the connection and communication of a plurality of passive sensors to a measurement and control system that employs an analog communication bus made of two physical wires only.

<CIT> discloses a device for measuring the internal resistance of a linear lambda probe.

In accordance with the first aspect of the present invention there is provided
a resistance measurement system as claimed in claim <NUM>.

The control module can be configured to determine a temperature at each resistor based on the resistance of each resistor, for example. Any other suitable use of the resistance values is contemplated herein.

The control module can be configured to determine the resistance of a respective resistor of a last-to-steady-state-voltage RC pair first, and to successively determine each resistance of each successive resistor in order of decreasing time-to-steady-state-voltage until all resistances of all resistors have been determined. The control module can be configured to determine the resistance of the last-to-steady-state-voltage resistor by sampling total voltage at two times, both of the two times being after all other RC pairs have reached steady state voltage such that a voltage component associated with only the last-to-steady-state-voltage RC pair is determined as a function of the difference of total voltage (ΔVtot) and total steady state voltage (Vss) at the two times.

The control module can be configured to determine a last RC time constant of the last-to-steady-state-voltage RC pair using the determined resistance of the last-to-steady-state-voltage resistor and a determined capacitance of a last-to-steady-state-voltage capacitor. The control module can be configured to determine the next resistance of the next slowest resistor using the last RC time constant to eliminate the voltage component associated with only the last-to-steady-state-voltage RC pair from the total steady state voltage. The control module can be configured to determine the resistance of the next slowest resistor by sampling total voltage at a different two times, both of the different two times being after all other faster RC pairs have reached steady state voltage, but before the next slowest resistor reaches steady state voltage, such that a voltage component associated with only the next slowest resistor is determined as a function of the difference of total voltage (ΔVtot) and total steady state voltage (Vss) at the different two times.

In certain embodiments, a first-to-steady-state-voltage resistor does not have an associated capacitor such that there are N-<NUM> capacitors for N resistors. Thus, the first to steady-state-voltage resistor can have a zero time constant.

In certain embodiments, the time constants of each RC pair are separated by a multiple of at least <NUM>. In certain embodiments, each capacitor can include the same dielectric material, and a capacitance of each capacitor can be selected to provide time constants separated by a multiple of at least <NUM>. In certain embodiments, the current is a step current.

A non-transitory computer readable medium can include computer executable instructions configured to cause a computer to perform a method. The method can include sensing a total voltage across a single line, and successively determining resistance of each of a plurality of resistors on the single line from the total voltage based on a current and a known time-to-steady-state-voltages of at least one resistor-capacitor (RC) pair having at least one resistor of the plurality of resistors.

The method can include determining a temperature at each resistor based on the resistance of each resistor. The method can include determining the resistance of a respective resistor of a last-to-steady-state-voltage RC pair first, and successively determining each resistance of each successive resistor in order of decreasing time-to-steady-state-voltage until all resistances of all resistors have been determined. The method can include determining the resistance of the last-to-steady-state-voltage resistor by sampling total voltage at two times, both of the two times being after all other RC pairs have reached steady state voltage such that a voltage component associated with only the last-to-steady-state-voltage RC pair is determined as a function of the difference of total voltage (ΔVtot) and total steady state voltage (Vss) at the two times.

The method can include any other suitable functions performed by any suitable control module disclosed herein, e.g., described above. The method can include any other suitable method(s) and/or portion(s) thereof.

Reference will now be made to the drawings wherein like reference numerals identify similar structural features or aspects of the subject disclosure. For purposes of explanation and illustration, and not limitation, an illustrative view of an embodiment of a system in accordance with the disclosure is shown in <FIG> and is designated generally by reference character <NUM>. Other embodiments and/or aspects of this disclosure are shown in <FIG> and <FIG>. Certain embodiments described herein can be used to sense resistance on a plurality of resistors without dedicated voltage lines for each resistor.

Referring to <FIG>, a resistance measurement system <NUM> includes a plurality of resistors 101a, 101b, 101c, 101d, 101e, 101N connected in series along a single line <NUM>. The plurality of resistors 101a-101N includes N resistors, e.g., as shown, for example. N can be any suitable number greater than <NUM>.

The system <NUM> includes a plurality of capacitors 105b, 105c, 105d, 105e, 105N for at least N-<NUM> of the resistors (e.g., resistors 101b, c, d, e, N each include a respective capacitor in parallel). Each capacitor 105b-105N is connected in parallel to the single line <NUM> with a respective resistor 101b-101N to form a respective resistor-capacitor (RC) pair 107b, 107c, 107d, 107e, 107N, e.g., as shown. Each RC pair 107b-107N includes a different time constant such that each RC pair 107b-107N reaches a steady state voltage at a different time (e.g., after application of a step current). The system <NUM> includes a current supply <NUM> connected to the single line <NUM> to supply a current to the line <NUM>.

The system <NUM> includes a control module <NUM> configured to sense a total voltage across the single line <NUM> and to successively determine resistance (e.g., R<NUM>, R<NUM>, R<NUM>, R<NUM>, RN) of each resistor 101a-101N from the total voltage based on the current, a known total steady state voltage, and known time-to-steady-state-voltages of each RC pair 107b-107N and/or resistors 101a-101N.

The control module <NUM> can be configured to determine a temperature at each resistor 101a-101N based on the resistance of each resistor 101a-101N, for example. Any suitable correlation between resistance values and temperature is contemplated herein (e.g., as appreciated by those having ordinary skill in the art). Any other suitable use of the resistance values is contemplated herein.

The control module <NUM> can be configured to determine the resistance of a respective resistor (e.g., 101N) of a last-to-steady-state-voltage RC pair (e.g., 107N) first, and to successively determine each resistance of each successive resistor (e.g., 101e, then 101d, then 101c, then 101b, then 101a) in order of decreasing time-to-steady-state-voltage until all resistances of all resistors 101a-101N have been determined. For example, the resistors 101a-101N can be positioned such that the last resistor in the line <NUM> has the largest time constant, and the resistors have declining time constant in order toward to the first resistor 101a. However, any other suitable physical order is contemplated herein.

Referring to the embodiment of <FIG> and <FIG>, the control module <NUM> can be configured to determine the resistance of the last-to-steady-state-voltage resistor (e.g., resistor 101d) by sampling total voltage (Vtotal) at two times (e.g., t<NUM> and t<NUM> as shown in <FIG>). As shown in <FIG>, hypothetical voltage test points are shown to depict voltage components shown in <FIG>. Both of the two times can be after all other RC pairs 107b, 107c and/or resistors without capacitors (e.g., resistor 101a) have reached steady state voltage (e.g., where V1, V2, and V3 are at steady state as shown in <FIG>) such that a voltage component (e.g., V4) associated with only the last-to-steady-state-voltage RC pair (e.g., 107d) is determined as a function of the difference of total voltage (Vtotal) and total steady state voltage (e.g., Vtotal at t<NUM>=tss) at the two times (e.g., t<NUM> and t<NUM>). The control module <NUM> can include any suitable hardware and/or software configured to perform any suitable function (e.g., a disclosed herein).

The control module <NUM> can be configured to determine a last RC time constant (e.g., resistance times capacitance) of the last-to-steady-state-voltage RC pair (e.g., pair 107d) using the determined resistance (e.g., R<NUM>) of the last-to-steady-state-voltage resistor (e.g., resistor 101d) and a determined capacitance (e.g., C<NUM>) of a last-to-steady-state-voltage capacitor (e.g., capacitor 105d). The control module <NUM> can be configured to determine the next resistance (e.g., R<NUM> as shown in <FIG>) of the next slowest resistor (e.g., resistor 101c as shown in <FIG>) using the last RC time constant to eliminate the voltage component (e.g., V4 as shown in <FIG>) associated with only the last-to-steady-state-voltage RC pair (e.g., pair 107d) from the total steady state voltage (e.g., Vtotal). The control module <NUM> can be configured to determine the resistance (e.g., R<NUM> as shown in <FIG>) of the next slowest resistor (e.g., resistor 101c in <FIG>) by sampling total voltage at a different two times (e.g., t<NUM> and t<NUM> as shown in <FIG>). Both of the different two times (e.g., t<NUM> and t<NUM> as shown in <FIG>) can be after all other faster RC pairs (e.g., 107b, 107c, 107d as shown in <FIG>, or 107b, 107c in <FIG>) have reached steady state voltage (e.g., such that V1 and V2 have reached steady state as shown in <FIG>), but before the next slowest resistor (e.g., resistor 101c) reaches steady state voltage, such that a voltage component (e.g., V3 as shown in <FIG>) associated with only the next slowest resistor (resistor 101c) is determined as a function of the difference of total voltage (ΔVtot) and total steady state voltage (Vss) at the different two times.

This process can be repeated for any suitable number of resistors until the resistance R<NUM> of the first resistor 101a (the fastest to steady state) is determined. The voltage components, and thus the resistance of a particular resistor, can be directly or indirectly determined using any suitable relationships (e.g., described below). For example, knowing the current applied, the total voltage, and the proper times to sample total voltage (e.g., as shown in <FIG>) allows resistances of all resistors to be determined sequentially in reverse order of speed to steady state.

In certain embodiments, a first-to-steady-state-voltage resistor 101a does not have an associated capacitor such that there are N-<NUM> capacitors for N resistors. Thus, the first to steady-state-voltage resistor 101a can have a zero time constant as shown in <FIG>. Any other suitable arrangement or additional capacitor(s) where each resistor is associated with a different time-to-steady-state is contemplated herein. The separation of the steady state of each resistors as a function of time (e.g., using a capacitor to change the time constant) allows the reduction of variables to be able to solve for each resistance successively from the last-to-steady-state to the first-to-steady-state. Any other suitable electrical component to change the time constant is contemplated herein.

In certain embodiments, the time constants of each RC pair 107b-107N are separated by a multiple of at least <NUM>. In certain embodiments, each capacitor 105a-N can include the same dielectric material, and a capacitance C<NUM>-CN of each capacitor 105a-N can be selected to provide time constants separated by a multiple of at least <NUM>. For example, CN ≥ <NUM>*CN-<NUM>. C<NUM> ≥ <NUM>*C<NUM>, C<NUM> ≥ <NUM>*C<NUM>, and C<NUM> ≥ <NUM>*C<NUM>. For example, in certain embodiments, as shown in <FIG>, the first resistor 101a can have a time constant of zero (a step jump to steady state voltage with the step current), the next fastest RC pair 107b can have any suitable time constant longer than zero, and each sequential RC pair thereafter can have a time constant that is <NUM> times or more as long as the previous RC pair.

In certain embodiments, the current is a step current. Any suitable current supply is contemplated herein (e.g., controlled by the control module <NUM>).

A control module (e.g., module <NUM>) is configured to sense a total voltage across a single line and to successively determine resistance of each of a plurality of resistors on the single line from the total voltage based on a current and a known time-to-steady-state-voltage of at least one resistor-capacitor (RC) pair having at least one resistor of the plurality of resistors. The control module (e.g., module <NUM>) can be or include any suitable embodiment of a control module (e.g., module <NUM>) disclosed herein, e.g., as described above. The control module can include any suitable hardware and/or software configured to perform any suitable function (e.g., a disclosed herein).

The method can include any other suitable functions performed by any suitable embodiment of a control module disclosed herein, e.g., described above. The method can include any other suitable method(s) and/or portion(s) thereof.

Embodiments can include and N element RC ladder network. Embodiments can utilize knowledge of when all previous resistors are at steady state at certain times (e.g., as shown in <FIG> at t<NUM>-t<NUM>). Embodiments can start at the steady state time (e.g., t<NUM>), and work backwards to successively determine the resistance of each resistor in reverse time-to-steady-state order (e.g., R<NUM>,, then R<NUM>, then R<NUM>, then R<NUM>). Such a process allows reducing variables in calculating resistances to a single variable that can be determined, and each time a resistance is determined, this value can be used to reduce the next calculation to a single variable (e.g., by using calculated R and C values).

<FIG> and <FIG> show an embodiment of a <NUM>-node RC ladder network showing individual differential voltage across each parallel RC and total voltage for a step input current. Sample times were chosen such that the all the shorter duration RC networks previous to the one under calculation have settled to greater than <NUM> time constants (or 5τ = 5RC). Each successive RC can be solved starting with the RC network with the largest time constant and working down progressively to the last R at the top of the ladder that does not have a parallel capacitor.

Embodiments of a methodology are described below for a <NUM> node resistive RC ladder, but the technique described can be expanded to include any number (N) of series RC networks as long as each successive node is separated by a suitable time constant differential (e.g., greater than or equal to <NUM> times).

Referring to <FIG>, the total voltage measured across the <NUM> node RC ladder at times t<NUM> to t<NUM> for a step input current of magnitude = I @ t=<NUM>, can be written as shown below in Table <NUM>.

Each RC node can be calculated successively by starting with the RC network with the largest time constant and sampling the exponential total voltage in the region where the other <NUM> or (N-<NUM>) networks have reached steady state.

In this region samples are taken at t<NUM> & t<NUM> and have the respective values as shown in table <NUM> which are then subtracted from the steady state value at t<NUM>. This results in equations (<NUM>) & (<NUM>) shown below: <MAT> <MAT> Equations <NUM> & <NUM> can be re-written as; <MAT> <MAT> Where, <MAT> <MAT> Rewrite Eqns (<NUM>) & (<NUM>) and take ln(x) of both sides: <MAT> <MAT> Then divide Eqn(3a) by Eqn(4a) leaving only R<NUM>: <MAT> Using Ln(x/y) = Ln(x) - Ln(y); <MAT> Solving Equation (<NUM>) for R<NUM> yields: <MAT> Where: <MAT> Once R<NUM> is calculated using Equation (<NUM>), C<NUM> can be calculated by plugging R<NUM> into Eqn(3a): <MAT> With R<NUM>C<NUM> calculated, R<NUM>C<NUM> can now be found using the same process as section <NUM>.

In this region, samples are taken at t<NUM> & t<NUM> and have the respective values as shown in Table <NUM> which are then subtracted from the steady state value at t<NUM>. This results in equations (<NUM>) & (<NUM>) shown below: <MAT> <MAT> Since R<NUM> & C<NUM> are known along with the sample times, the last term in Eqn(<NUM>) and Eqn(<NUM>) can be written as a known constant as below:<MAT><MAT> This allows rewriting both equations (<NUM>) &(<NUM>) in simplified format; <MAT> <MAT>.

Letting; <MAT> <MAT> Equations (9a) & (10a) can now be written in the same format as section <NUM>; <MAT> <MAT> Now Setting: <MAT> Yields the solution for R<NUM>: <MAT> Once R<NUM> is calculated using Equation (<NUM>), C<NUM> can be calculated by plugging R<NUM> & t<NUM> into Eqn(9b): <MAT>.

The calculation of R<NUM>C<NUM> follows the same procedure as used in sections <NUM> & <NUM>. In this region samples are taken at t<NUM> & t<NUM> and have the respective values as shown in table <NUM> which are then subtracted from the steady state value at t<NUM>. This results in equations (<NUM>) & (<NUM>) shown below: <MAT> <MAT> Since R<NUM>, R<NUM> & C<NUM>, C<NUM> are now known along with the sample times, the last <NUM> terms in Eqn(<NUM>) and Eqn(<NUM>) can be expressed as a known constants ; <MAT> <MAT> This allows the rewriting of both equations (<NUM>) & (<NUM>) in simplified format; <MAT> <MAT> Letting; <MAT> <MAT> Equations (13a) & (14a) can now be written in the same format as section <NUM>: <MAT> <MAT> Now Setting: <MAT> Yields the solution for R<NUM>: <MAT> Once R<NUM> is calculated using Equation (<NUM>), C<NUM> can be calculated by plugging R<NUM> & t<NUM> into Eqn(13b): <MAT>.

The final R to be calculated in the ladder network is R<NUM> and is found simply by using the values calculated for R<NUM>, R<NUM> & R<NUM> and the steady state total voltage calculated at t<NUM> as per Table <NUM>: <MAT>.

Embodiments include a multi-node resistive ladder using a <NUM>-wire excitation interface to measure multiple series resistive elements. The method and systems described in this disclosure reduces the (N+<NUM>) wire interface requirement to only <NUM> -wires when measuring a total of (N) resistive devices, e.g., resistive temperature devices RTDs.

Embodiments can include placing all the RTD's in a single series network. A parallel capacitive element can then be added across each RTD forming series "ladder" network of N parallel RC elements, e.g., as shown in <FIG> and <FIG>. The unique RC time constant of each parallel RC network node when subjected to a step current input can then be utilized to calculate the value of each resistive element in succession.

Embodiments of a method can begin by sampling the voltage of the RC node with the longest time constant in the time domain region where all the faster RC nodes have settled to greater than <NUM> RC time constants (e.g., steady state) and can then calculating the RC value of this element. Once calculated, the network with the 2nd longest RC time constant can be calculated. This technique can continue in succession down to last node that can consists of only an RTD with no parallel capacitor.

Choosing an RC time constant of greater than or equal to <NUM> times between nodes can desensitize the ladder to variations in the capacitive element, e.g., provided that each capacitor is constructed of the same dielectric material, nominal values of capacitance are chosen to create the desired ≥5X time constant spread in the temperature region of operation, and the initial tolerance < ±<NUM>%.

<FIG> depicts the methodology for a <NUM> node resistive RC ladder, showing the time domain response of each node and the total voltage, but the technique described can be expanded to include any number (N) of series RC networks as long as each successive node is separated by a suitable time constant differential (e.g., ≥5X).

Traditionally, a system with a multiple of N RTD's requires N+<NUM> wires to measure each resistive element separately. Embodiments can reduce the N+<NUM> wire interface requirement to only two wires (for measuring total voltage on the single line) while still allowing measuring a total of (N) RTD resistive devices individually. This in turn decreases the overall system weight, as well as connector and wiring complexity.

Aspects of this disclosure may be described above with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of this disclosure. It will be understood that each block of any flowchart illustrations and/or block diagrams, and combinations of blocks in any flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in any flowchart and/or block diagram block or blocks.

Claim 1:
A resistance measurement system (<NUM>), comprising:
a plurality of resistors (<NUM>) connected in series along a single line (<NUM>), wherein the plurality of resistors (<NUM>) include N resistors;
a plurality of capacitors (<NUM>) for at least N-<NUM> of the resistors (<NUM>), wherein each capacitor (<NUM>) is connected in parallel to the single line (<NUM>) with a respective resistor (<NUM>) to form a respective resistor-capacitor (RC) pair (<NUM>), wherein each RC pair (<NUM>) includes a different time constant such that each RC pair (<NUM>) reaches a steady state voltage at a different time;
a current supply (<NUM>) connected to the single line (<NUM>) to supply a current to the line; and
a control module (<NUM>) configured to sense a total voltage across the single line and to successively determine resistance of each resistor from the total voltage based on the current, a known total steady state voltage, and known time-to-steady-state-voltages of each RC pair and/or resistors.