Patent Description:
A transmission line shunted plasma oscillation qubit (transmon qubit) may be fabricated with one or two Jacobsen junctions and a capacitor connected in parallel with one or both Jacobsen junctions. In such a system, performance may be enhanced if the capacitor has relatively low loss. A capacitor design in which the electric field lines pass through (i) a substrate to air interface, (ii) a metal to air interface, or (iii) a substrate to metal interface may however exhibit significant loss as a result of imperfections or impurities at the interfaces.

It is with respect to this general technical environment that aspects of the present disclosure are related.

<CIT> discloses a superconducting qubit device with hexagonal boron nitride Josephson junctions.

<NPL>, disclose quantum coherent control of a hybrid superconducting circuit made with graphene-based van der Waals heterostrucutres.

According to an embodiment of the present disclosure, there is provided a capacitor, including: a first conductive layer; an insulating layer, on the first conductive layer; and a second conductive layer on the insulating layer, the first conductive layer being composed of one or more layers of a first van der Waals material, the insulating layer being composed of one or more layers of a second van der Waals material, and the second conductive layer being composed of one or more layers of a third van der Waals material.

In some embodiments, the capacitor further includes: an insulating lower layer, under the first conductive layer; and an insulating upper layer, on the second conductive layer, wherein: the insulating lower layer being composed of one or more layers of a first van der Waals material, and the insulating upper layer being composed of one or more layers of a first van der Waals material.

In some embodiments, the capacitor further includes: a first layer of graphene, between the first conductive layer and the insulating layer; and a second layer of graphene, between the insulating layer and the second conductive layer.

In some embodiments, the first conductive layer is a superconducting layer and the second conductive layer is a superconducting layer.

In some embodiments, the first van der Waals material is a material selected from the group consisting of NbSe<NUM>, MoTe<NUM>, WTe<NUM>, TaS<NUM>, BSCCO, graphene, and combinations thereof.

In some embodiments, the third van der Waals material is the same material as the first van der Waals material.

In some embodiments, the second van der Waals material is a material selected from the group consisting of BN, WSe<NUM>, MoS<NUM>, MoSe<NUM>, WS<NUM>, MoTe<NUM>, PtS<NUM>, PtSe<NUM>, PtTe<NUM>, HfS<NUM>, HfSe<NUM>, ReS<NUM>, ReSe<NUM>, SnS<NUM>, SnSe<NUM>, ZrS<NUM>, ZrSe<NUM>, silicene, germanene, black phosphorus, and combinations thereof.

In some embodiments, the capacitor further includes: a first electrode, in contact with the first conductive layer, and a second electrode, in contact with the second conductive layer.

In some embodiments, the first electrode is composed of a superconducting material.

In some embodiments, the first electrode is composed of a material selected from the group consisting of aluminum, niobium, niobium nitride, niobium titanium nitride, titanium nitride, and molybdenum rhenium.

According to an embodiment of the present disclosure, there is provided a quantum bit, including: a capacitor according to claim <NUM>, and a Josephson junction, connected to the capacitor.

In some embodiments, the quantum bit further includes: an insulating lower layer, under the first conductive layer; and an insulating upper layer, on the second conductive layer, wherein: the insulating lower layer being composed of one or more layers of a first van der Waals material, and the insulating upper layer being composed of one or more layers of a first van der Waals material.

In some embodiments, the quantum bit further includes: a first layer of graphene, between the first conductive layer and the insulating layer; and a second layer of graphene, between the insulating layer and the second conductive layer.

In some embodiments, the quantum bit further includes: a first electrode, in contact with the first conductive layer, and a second electrode, in contact with the second conductive layer.

Features, aspects, and embodiments are described in conjunction with the attached drawings, in which:.

The detailed description set forth below in connection with the appended drawings is intended as a description of exemplary embodiments of a van der Waals capacitor and a qubit constructed with such a capacitor provided in accordance with the present disclosure and is not intended to represent the only forms in which some embodiments may be constructed or utilized. The description sets forth the features of the present disclosure in connection with the illustrated embodiments. It is to be understood, however, that the same or equivalent functions and structures may be accomplished by different embodiments that are also intended to be encompassed within the scope of the disclosure. As denoted elsewhere herein, like element numbers are intended to indicate like elements or features.

<FIG> shows a quantum bit, or "qubit", in some embodiments. The quantum bit may be characterized by two quantum mechanical states, separated by an energy difference. A Josephson junction <NUM> is connected between a first metal (e.g. superconducting metal) pad <NUM> and a second metal (e.g. superconducting metal) pad <NUM>. In operation, the first metal pad <NUM> and the second metal pad <NUM> form a capacitor connected in parallel with the Josephson junction <NUM>. The structure may be fabricated on a substrate <NUM>. Exemplary electric field lines <NUM>, between a first charge on the first metal pad <NUM> and a second charge on the second metal pad <NUM>, are shown. These field lines may cross (i) a substrate to air interface, (ii) a metal to air interface, and (iii) a substrate to metal interface, at one or more points. At these interfaces, impurities or other imperfections may give rise to two-level systems having respective energy differences similar to that of the qubit; these two-level systems may interact with the qubit, resulting in loss and a degradation in performance.

In some embodiments, a capacitor is instead formed as a stack of layers of van der Waals materials, as illustrated in <FIG>. The capacitor includes a first conductive layer <NUM> on a substrate <NUM>, an insulating layer <NUM>, on the first conductive layer <NUM>, and a second conductive layer <NUM> on the insulating layer <NUM>. The first conductive layer <NUM> may be composed of one or more layers of a first van der Waals material, the insulating layer <NUM> may be composed of one or more layers of a second van der Waals material, and the second conductive layer <NUM> may be composed of one or more layers of a third van der Waals material. The third van der Waals material may be the same material as the first van der Waals material. Exemplary electric field lines <NUM> are shown. Except for fringing fields (not shown) each line of electric field extends directly from the second conductive layer <NUM> to the first conductive layer <NUM>, passing through (i) a first interface between the second conductive layer <NUM> and the insulating layer <NUM> and (ii) a second interface between the first conductive layer <NUM> and the insulating layer <NUM>. These interfaces may be significantly cleaner than the substrate to air interface, the metal to air interface, and the substrate to metal interface of the embodiment of <FIG>. Although other interfaces (e.g., an air to substrate interface) are present in the embodiment of <FIG>, the coupling of the capacitor to these interfaces may be relatively weak because only fringing fields may interact with these interfaces. Moreover, the capacitor of the embodiment of <FIG> may be significantly smaller (e.g., up to a factor of <NUM> smaller) than the structure of <FIG>.

The first conductive layer <NUM> and the second conductive layer <NUM> may be superconducting layers, e.g., at sufficiently low temperature, current density, and magnetic field, each of the first conductive layer <NUM> and the second conductive layer <NUM> may be in a superconducting state.

<FIG> shows a capacitor, in some embodiments. As in the embodiment of <FIG>, the capacitor includes a first conductive layer <NUM>, an insulating layer <NUM> on the first conductive layer <NUM>, and a second conductive layer <NUM> on the insulating layer <NUM>. The capacitor of the embodiment of <FIG> further includes an insulating lower layer <NUM> between the substrate (not shown) and the first conductive layer <NUM>, and an insulating upper layer <NUM> on the second conductive layer <NUM>. The substrate may be a wafer of high-purity silicon (e.g., flow-zone silicon). In the embodiment of <FIG>, the capacitor further includes a first electrode <NUM> and a second electrode <NUM>, each of which may be a superconducting (e.g. aluminum) electrode. As used herein, a material or structure may be said to be "superconducting" if, at sufficiently low temperature, current density, and magnetic field it will be in, or it will transition to, a superconducting state. As used herein, this term ("superconducting") also applies to the structure or material when it is not in a superconducting state. As such, aluminum, or an aluminum electrode, may be referred to as "superconducting", even when it is at room temperature (and not in a superconducting state).

In some embodiments, the capacitor further includes a lower layer of graphene <NUM>, between the first conductive layer <NUM> and the insulating layer <NUM>, and an upper layer of graphene <NUM> between the insulating layer <NUM> and the second conductive layer <NUM>. The lower layer of graphene <NUM> and the upper layer of graphene <NUM> may be superconducting layers as a result of being proximitized to the first conductive layer <NUM> and to the second conductive layer <NUM> respectively. In some embodiments, the lower layer of graphene <NUM> and the upper layer of graphene <NUM> are absent.

As in the embodiment of <FIG>, each of (i) the first conductive layer <NUM>, the insulating layer <NUM>, and the second conductive layer <NUM> may be composed of a van der Waals material. For example, each of the first conductive layer <NUM> and the second conductive layer <NUM> may be composed of niobium selenide (NbSe<NUM>), molybdenum telluride (MoTe<NUM>), tungsten telluride (WTe<NUM>), tantalum sulfide (TaS<NUM>), bismuth strontium calcium copper oxide (BSCCO), combinations (e.g., alloys) of these materials, or one of various thicknesses and twist angles of graphene. The insulating layer <NUM> may be composed of boron nitride (BN), tungsten selenide (WSe<NUM>), molybdenum sulfide (MoS<NUM>), MoSe<NUM>, WS<NUM>, MoTe<NUM>, PtS<NUM>, PtSe<NUM>, PtTe<NUM>, HfS<NUM>, HfSe<NUM>, ReS<NUM>, ReSe<NUM>, SnS<NUM>, SnSe<NUM>, ZrS<NUM>, ZrSe<NUM>, silicene, germanene, or black phosphorus. In other embodiments, other suitable conducting (e.g., superconducting) or insulating materials may be used, respectively. In some embodiments, the insulating layer <NUM> includes fewer than <NUM> monolayers; the low thickness of this layer may result in a high capacitance per unit area of the capacitor. In some embodiments the insulating layer <NUM> includes fewer than <NUM> (e.g., as few as one or two) monolayers; the thickness may be selected to be the smallest thickness for which the tunneling effect is negligible or acceptably small. In some embodiments, the insulating lower layer <NUM> and the insulating upper layer <NUM> may also be composed of a van der Waals material (e.g., BN, WSe2, MoSe2, or MoS2).

<FIG> show a portion of a process for fabricating electrodes in contact with a conducting layer. <FIG> show, for ease of illustration, the process of forming electrodes <NUM> on a layer of niobium selenide <NUM> on a test coupon which initially includes only the layer of niobium selenide <NUM> on the substrate <NUM>; in some embodiments an analogous process may be used to form electrodes that are in contact with the first conductive layer <NUM> and with the second conductive layer <NUM> of a capacitor (e.g., the capacitor of <FIG> or the capacitor of <FIG> (discussed in further detail below)). A layer of niobium selenide <NUM> (e.g., niobium diselenide, NbSe2) is deposited (e.g., on a substrate <NUM>, as shown in <FIG>). The test coupon is then moved to an evaporating chamber for the forming of electrodes; during the process of moving the test coupon, the outer surface of the layer of niobium selenide <NUM> may (as shown in <FIG>) become oxidized (e.g. covered with an oxide coating <NUM>, shown in <FIG> as a stippled surface) result of exposure to atmospheric oxygen. Ion milling may then be used, as shown in <FIG>, to remove a portion of the layer of niobium selenide <NUM>, exposing unoxidized niobium selenide <NUM>, and electrodes <NUM> may be formed on the exposed unoxidized niobium selenide <NUM> as shown in <FIG> is a cutaway view showing the unoxidized niobium selenide below the layer of oxide, and in contact with the electrodes <NUM>.

<FIG> shows a tunable frequency transmon qubit, which includes (i) a superconducting quantum interference device (SQUID) <NUM> including two Josephson junctions <NUM> connected in a loop, and (ii) a capacitor <NUM> (e.g., the capacitor of <FIG> or the capacitor of <FIG> (discussed in further detail below)), connected in parallel with the SQUID <NUM>. In some embodiments, a fixed frequency transmon qubit (having, instead of the SQUID <NUM>, a single Josephson junction <NUM>, connected in parallel with the capacitor <NUM>) may be constructed in an analogous manner.

<FIG> is a schematic drawing of a capacitor <NUM>, in some embodiments. The capacitor <NUM> includes (like the capacitor of the embodiment of <FIG>) a first conductive layer <NUM>, an insulating layer <NUM>, on the first conductive layer <NUM>, and a second conductive layer <NUM> on the insulating layer <NUM>. The capacitor further includes a first electrode <NUM> and a second electrode <NUM>, in contact with the first conductive layer <NUM> and the second conductive layer <NUM>, respectively. The capacitor of the embodiment of <FIG> lacks the insulating lower layer <NUM>, the insulating upper layer <NUM>, the lower layer of graphene <NUM>, and the upper layer of graphene <NUM> that are shown for the capacitor of the embodiment of <FIG>.

<FIG> is a photograph of a reduction to practice, in one embodiment, of a qubit including a capacitor according to embodiments described herein. <FIG> is an enlarged view of a portion (labeled "7B") of <FIG>. The circuit may be fabricated on a silicon (e.g., float-zone silicon) substrate, or wafer. <FIG> shows three external connections to the qubit, which is illustrated in <FIG>. A first wire bond pad <NUM> is terminated to ground at a point adjacent to the qubit. A bias current supplied through the first wire bond pad <NUM> may be employed to produce a magnetic field at the qubit, to control the critical current of the SQUID loop of the qubit, and to control the frequency of the qubit. A second wire bond pad <NUM> may be capacitively coupled to the SQUID. Control pulses may be sent to the qubit via the second wire bond pad <NUM> to control the state of the qubit (e.g., to rotate the state of the qubit in the Bloch sphere). The third connection illustrated in <FIG> is a microwave resonator <NUM>, which may be employed to read out the qubit. The microwave resonator <NUM> and the connections to the first wire bond pad <NUM> and to the second wire bond pad <NUM> may each be constructed as a coplanar microwave waveguide.

<FIG> shows, as mentioned above, an enlarged view of the qubit of <FIG>. The capacitor <NUM> includes a first conductive layer <NUM> (e.g., a layer of niobium diselenide), an insulating layer <NUM> (e.g., a layer of boron nitride (e.g., of hexagonal boron nitride)), and a second conductive layer <NUM> (e.g., a layer of niobium diselenide). The capacitance of the capacitor is largely determined by an area of overlap <NUM>, within which each of the first conductive layer <NUM>, the insulating layer <NUM>, and the second conductive layer <NUM> is present. The capacitor is connected to a SQUID <NUM>, the magnetic field in which may be controlled by adjusting the current flowing in a conductive segment <NUM> (which may be connected to the first wire bond pad <NUM> through a coplanar microwave waveguide).

The capacitor <NUM> of <FIG> and <FIG> may be fabricated as follows. The first conductive layer <NUM> may be exfoliated from a niobium diselenide bulk crystal using a suitable adhesive exfoliating tool, and transferred to the bare silicon substrate. The insulating layer <NUM> may then be exfoliated from a boron nitride bulk crystal, and placed in a position partially overlapping the first conductive layer <NUM> (and leaving a portion of the first conductive layer <NUM> exposed), and the second conductive layer <NUM> may then be exfoliated from a niobium diselenide bulk crystal and placed on the substrate, such that a portion of the second conductive layer <NUM> overlaps the region in which the insulating layer <NUM> overlaps the first conductive layer <NUM>. Electrodes (e.g., aluminum electrodes) may then be fabricated to contact the first conductive layer <NUM> (e.g., the exposed portion of the first conductive layer <NUM>) and the second conductive layer <NUM>.

The fabrication of the electrodes may include (i) forming a layer of photoresist over the wafer, (ii) patterning the photoresist (e.g., using e-beam lithography) to remove the photoresist in areas in which metal (e.g., aluminum) is to be deposited, (iii) depositing a layer of metal (e.g., aluminum) over the wafer, and (iv) removing the photoresist and the portions of the metal layer that are on photoresist, using a lift-off process. The conductors forming the external connections (e.g., the first wire bond pad <NUM>, the second wire bond pad <NUM>, the coplanar waveguides connected to them, and the microwave resonator <NUM>) may be formed at the same time. Because the shapes of the exfoliated layers may be unpredictable (e.g., they may vary from one exfoliation operation to another), the shape of the metal (e.g., aluminum) layer to be formed may be designed after the first conductive layer <NUM>, the insulating layer <NUM>, and the second conductive layer <NUM> have been placed on the substrate. The SQUID <NUM> may be fabricated before or after the capacitor.

As used herein, "a portion of" something means "at least some of" the thing, and as such may mean less than all of, or all of, the thing. As such, "a portion of" a thing includes the entire thing as a special case, i.e., the entire thing is an example of a portion of the thing. As used herein, the word "or" is inclusive, so that, for example, "A or B" means any one of (i) A, (ii) B, and (iii) A and B.

It will be understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present.

As used herein, the term "major component" refers to a component that is present in a composition, polymer, or product in an amount greater than an amount of any other single component in the composition or product. In contrast, the term "primary component" refers to a component that makes up at least <NUM>% by weight or more of the composition, polymer, or product. As used herein, the term "major portion", when applied to a plurality of items, means at least half of the items. As used herein, any structure or layer that is described as being "made of" or "composed of" a substance should be understood (i) in some embodiments, to contain that substance as the primary component or (ii) in some embodiments, to contain that substance as the major component.

It will be understood that when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no intervening elements present. As used herein, "generally connected" means connected by an electrical path that may contain arbitrary intervening elements, including intervening elements the presence of which qualitatively changes the behavior of the circuit. As used herein, "connected" means (i) "directly connected" or (ii) connected with intervening elements, the intervening elements being ones (e.g., low-value resistors or inductors, or short sections of transmission line) that do not qualitatively affect the behavior of the circuit.

Claim 1:
A capacitor (<NUM>, <NUM>), comprising:
a first conductive layer (<NUM>, <NUM>);
an insulating layer (<NUM>, <NUM>), on the first conductive layer (<NUM>, <NUM>); and
a second conductive layer (<NUM>, <NUM>) on the insulating layer (<NUM>, <NUM>),
the first conductive layer (<NUM>, <NUM>) being composed of one or more layers of a first van der Waals material,
the insulating layer (<NUM>, <NUM>) being composed of one or more layers of a second van der Waals material, and
the second conductive layer (<NUM>, <NUM>) being composed of one or more layers of a third van der Waals material.