Patent Description:
Near field communication (NFC) refers to a set of communication protocols that enable two electronic devices to establish communication by bringing them within proximity of each other. The communication range of NFC is typically in the order of centimeters (e.g., <NUM> centimeters or less). NFC technology can be used to carry out various transactions, such as transactions for accessing buildings, transactions for accessing public transportation sites or vehicles, and payment transactions. Near field communication is often realized by means of modulation techniques. In that case, a near field device modulates a carrier signal received from a reader and transmits the modulated carrier signal back to the reader.

<CIT> describes a circuit for driving an antenna of near field communication (NFC) device, which includes: a first variable resistor coupled to a first terminal of the antenna via a first capacitor; a second variable resistor coupled to a second terminal of the antenna via a second capacitor; and a control circuit configured to cause the first variable resistor and the second variable resistor to each have a selected one of a first resistance level, a second resistance level, and a third resistance level based on an operating phase of the circuit.

Advantageous embodiments are described in the dependent claims. The invention is defined in particular by the essential features prominently marked by the words "according to an essential aspect of the present invention".

In accordance with a first aspect of the present disclosure, a near field communication (NFC) device is provided, as defined in claim <NUM>.

In one or more embodiments, the controller is further configured to select different resistances during the non-modulation phase.

In one or more embodiments, the controller is further configured to remove one or more transmission pulses at a beginning of one or more modulation phases of the NFC device.

In one or more embodiments, the NFC device further comprises a receiver for receiving the carrier signal, wherein the controller is further configured to control a reception of the carrier signal and to change, during the modulation phase of the NFC device, a variable resistance of an HF attenuator comprised in said receiver.

In one or more embodiments, the controller is configured to change said variable resistance of the HF attenuator by selecting a resistance from a plurality of different resistances.

In one or more embodiments, the controller is configured to select different resistances for consecutive transmission pulses during the modulation phase.

In one or more embodiments, a mobile device comprises an NFC device of the kind set forth.

In accordance with a second aspect of the present disclosure, a method of operating a near field communication (NFC) device is conceived, as defined in claim <NUM>.

In one or more embodiments, the controller further controls a reception of the carrier signal by a receiver and changes, during the modulation phase of the NFC device, a variable resistance of an HF attenuator comprised in said receiver.

In accordance with a third aspect of the present disclosure, a non-transitory machine-readable medium is provided, comprising instructions which, when executed by a computer, cause the computer to carry out a method of the kind set forth.

<FIG> shows an example of an NFC device <NUM>, as described in <CIT>. The NFC device <NUM> includes an NFC controller <NUM>, electromagnetic compatibility (EMC) network <NUM>, matching network <NUM>, and antenna <NUM>. The NFC controller <NUM> may be formed on an integrated circuit (IC) separate from EMC network <NUM>, matching network <NUM>, and antenna <NUM>. For example, NFC device <NUM> may have EMC network <NUM>, matching network <NUM>, and antenna <NUM> formed on a printed circuit board (PCB) while NFC controller <NUM> may be mounted on the PCB as a separately packaged IC. NFC controller <NUM> includes central processing unit (CPU) <NUM>, memory <NUM>, and radio frequency (RF) transceiver <NUM>. NFC controller <NUM> may include other functional blocks and circuits.

Processor <NUM> may be any type of processor, including circuits for processing, computing, etc., such as a microprocessor (MPU), microcontroller (MCU), digital signal processor (DSP), finite state machine (FSM), and the like. Processor <NUM> may be configured to execute instructions in order to carry out designated tasks. Memory <NUM> may include any suitable type of memory array, such as a non-volatile memory (NVM), static random-access memory (SRAM), or others. Memory <NUM> may be coupled to processor <NUM> by way of a system bus (not shown). Memory <NUM> may also be coupled directly or tightly to processor <NUM>. NFC controller <NUM> may include multiple memories like memory <NUM> or a combination of different memory types. For example, memory <NUM> may include a flash memory array in addition to a separate SRAM array.

RF transceiver <NUM> includes transmitter (TX) driver circuit <NUM>, clock generation circuit <NUM>, phase adjustment circuit <NUM>, and a receiver (RX) circuit <NUM> that includes a high frequency (HF) attenuator, among other circuits (not shown). An output signal line <NUM> couples the TX driver circuit <NUM> with the EMC network <NUM>. The EMC network <NUM> is coupled with the RX circuit by way of a receive signal line <NUM>. Matching network <NUM> is coupled between the EMC network <NUM> and antenna <NUM>. In operation, a transmit signal is output from the TX driver circuit <NUM> based on the phase and clock frequency provided by way of the clock generation circuit <NUM> and phase adjustment circuit <NUM>. The transmit signal is propagated through the EMC network <NUM> and matching network <NUM> and transmitted at antenna <NUM>. The TX driver circuit <NUM> is typically a push/pull driver stage with the possibility to program the output RON resistance. In operation, the RX circuit <NUM> serves to maintain a constant signal level by way of adjusting impedance.

<FIG> shows an example of a transceiver simulation model <NUM>, as described in <CIT>. In particular, an example simulation model <NUM> is shown, which includes an example EMC network model <NUM>, an example matching network model <NUM>, and example antenna model <NUM>. Simulation model <NUM> depicts a differential transmit signaling path having terminals labeled TX1 and TX2. Likewise, differential receive signaling path is depicted having terminals RX1 and RX2. Single-ended signaling paths may be employed for transmit and/or receive signals. Here, the EMC network model <NUM> corresponds to the EMC network <NUM> of <FIG> where terminals TX1 and TX2 are coupled to the TX driver circuit <NUM> and terminals RX1 and RX2 are coupled to the RX circuit <NUM>. Accordingly, matching network model <NUM> corresponds to matching network <NUM> and antenna model <NUM> corresponds to antenna <NUM>.

The EMC network model <NUM> includes inductors <NUM>, <NUM> and capacitors <NUM>, <NUM>. A first terminal of inductor <NUM> is coupled at input terminal TX1 and a second terminal of inductor <NUM> is coupled to a first terminal of capacitor <NUM> at a first node. A second terminal of capacitor <NUM> is coupled to ground voltage supply terminal labeled GND. A first terminal of inductor <NUM> is coupled at input terminal TX2 and a second terminal of inductor <NUM> is coupled to a first terminal of capacitor <NUM> at a second node. A second terminal of capacitor <NUM> is coupled to the GND supply terminal. The EMC network model <NUM> may include other components. Furthermore, the EMC network model <NUM> may be formed in a single-ended configuration.

Receive signaling path includes capacitors <NUM>, <NUM> and resistors <NUM>, <NUM>. A first terminal of capacitor <NUM> is coupled at terminal RX1 and a second terminal of capacitor <NUM> is coupled to a first terminal of resistor <NUM>. A second terminal of resistor <NUM> is coupled at the first node. A first terminal of capacitor <NUM> is coupled at terminal RX2 and a second terminal of capacitor <NUM> is coupled to a first terminal of resistor <NUM>. A second terminal of resistor <NUM> is coupled at the second node. The receive signaling path may be formed in a single-ended configuration (e.g., capacitor <NUM>, resistor <NUM> path).

The matching network model <NUM> includes capacitors <NUM>-<NUM> and resistors <NUM>, <NUM>. A first terminal of capacitor <NUM> is coupled to the EMC network model <NUM> at the first node and a second terminal of capacitor <NUM> is coupled to a first terminal of capacitor <NUM> at a third node. A second terminal of capacitor <NUM> is coupled to GND supply terminal. A first terminal of capacitor <NUM> is coupled to the EMC network model <NUM> at the second node and a second terminal of capacitor <NUM> is coupled to a first terminal of capacitor <NUM> at a fourth node. A second terminal of capacitor <NUM> is coupled to the GND supply terminal. A first terminal of resistor <NUM> is coupled at the third node and a second terminal of resistor <NUM> is coupled to the antenna model at a fifth node. A first terminal of resistor <NUM> is coupled at the fourth node and a second terminal of resistor <NUM> is coupled to the antenna model at a sixth node. The matching network model <NUM> may include other components as well.

The antenna model <NUM> includes capacitor <NUM>, resistor <NUM>, and inductor <NUM>. A first terminal of capacitor <NUM> is coupled at the fifth node and a second terminal of capacitor <NUM> is coupled at the sixth node. A first terminal of resistor <NUM> is coupled at the fifth node and a second terminal of resistor <NUM> is coupled to a first terminal of inductor <NUM>. A second terminal of inductor <NUM> is coupled at the sixth node. The antenna model <NUM> may include other components as well.

<FIG> shows examples of different modulation schemes <NUM>. In the examples shown in <FIG>, the clock can only be synchronized between carrier pauses. Depending on the quality factor of the antenna and/or matching network the synchronization window may only be wide enough for low active load modulation (ALM) strengths (left-hand side of <FIG>). However, in case of high active load modulation strengths the synchronization window may become too small for a proper clock synchronization (right-hand side of <FIG>). It is noted that clock synchronization refers to the process of bringing or keeping the internally generated clock in a synchronized state with the clock used by the reader.

In particular, three examples are shown of implementations that extend the synchronization window. Unfortunately, however, at high active ALM strengths the system is limited, and a proper clock synchronization is not possible. In the first implementation, the synchronization window is extended by removing one carrier and inverting the shape to improve the dumping of the signal at the antenna. In the second implementation, the synchronization window is extended by removing one carrier (or more) to improve the dumping of the signal at the antenna. In the third implementation, the synchronization window is extended by changing the duty cycle to improve the dumping of the signal at the antenna.

<FIG> shows an illustrative embodiment of an NFC device <NUM>. The NFC device <NUM> comprises a modulator <NUM>, a transmission driver <NUM> and a controller <NUM>. The modulator <NUM> is configured to modulate an unmodulated carrier signal received from an external reader (not shown), which results in a modulated carrier signal. The controller <NUM> is configured to control a transmission of the modulated carrier signal to the external reader. Furthermore, the transmitter driver <NUM> is configured to drive said transmission (i.e., to transmit the modulated carrier signal to the external reader). The transmitter driver <NUM> has a variable resistance. For instance, the transmission driver may have a variable on-state resistance RON. In accordance with the present disclosure, the controller <NUM> is configured to change the variable resistance during a modulation phase of the NFC device <NUM>. In this way, the damping of the transmitted signal can be improved, such that the synchronization window is widened also at high active ALM strengths. Thus, a proper clock synchronization is also possible at high active ALM strengths. It is noted that, although the modulator <NUM>, transmission driver and controller <NUM> are shown as separate components, the skilled person will appreciate that one or more these components may be integrated into a single component. Furthermore, one or more these components may be embedded in another component. For example, the transmission driver <NUM> may be embedded in the controller <NUM>. Furthermore, the NFC device <NUM> comprises a receiver <NUM> which is configured to receive the carrier signal from the external reader. The receiver <NUM> includes a clock recovery unit configured to recover a clock.

<FIG> shows an illustrative embodiment of a method <NUM> of operating an NFC device. The method <NUM> includes the following steps. At <NUM>, the modulator modulates a carrier signal received from an external reader, which results in a modulated carrier signal. At <NUM>, the controller controls a transmission of the modulated carrier signal to the external reader. Furthermore, at <NUM>, the transmission driver transmits said modulated carrier signal, the transmission driver having a variable resistance. Furthermore, at <NUM>, the controller changes the variable resistance during a modulation phase of the NFC device. The steps of method <NUM> may be carried out simultaneously. By changing the variable resistance during the modulation phase, the damping of the transmitted signal can be improved, such that the synchronization window is widened also at high active ALM strengths. Consequently, a proper clock synchronization is also possible at high active ALM strengths.

<FIG> shows another illustrative embodiment of a method <NUM> of operating an NFC device. The method <NUM> comprises the following steps. At <NUM>, the controller controls a reception of a carrier signal by the receiver of the NFC device, wherein said receiver includes an HF attenuator. Furthermore, at <NUM>, the controller changes a variable resistance of the HF attenuator during the modulation phase of the NFC device. The steps of method <NUM> may be carried out simultaneously. Furthermore, the steps of method <NUM> may be carried out simultaneously with the steps of method <NUM>. Accordingly, in one or more embodiments, the controller is further configured to control a reception of the carrier signal and to change, during the modulation phase of the NFC device, a variable resistance of an HF attenuator comprised in the receiver. In this way, the signal at the clock recovery can be optimized during the period of damping the transmitted signal.

<FIG> shows another illustrative embodiment of an NFC device <NUM>. In the NFC device shown in <FIG>, the clock can be generated by an externally provided system clock or a crystal oscillator (XTAL). The clock can also be generated by internal clock recovery circuitry, which extracts the clock signal from a reader field over the antenna <NUM>. In certain modulation schemes, such as binary phase shift keying (BPSK) modulation schemes, the system transmits a subcarrier (i.e., without pauses). Examples of BPSK modulation schemes are schemes defined by the standard ISO/IEC <NUM> Type B or by the de facto standard FeliCa. In contrast, according to modulation schemes defined by the standard ISO/IEC <NUM> Type A the system transmits a subcarrier with pauses.

<FIG> shows an illustrative embodiment of an RF transceiver <NUM>. The RF transceiver <NUM> comprises a clock recovery unit <NUM>, a clock <NUM> (i.e., a phase-locked loop), a phase initialization unit <NUM>, a transmitter driver resistance (RON) switch control unit <NUM>, a transmission shaping unit <NUM>, and an HF attenuator control unit <NUM>. Using a phase-locked loop (PLL), the clock is provided to the phase initialization unit <NUM>, RON switch control unit <NUM>, transmission shaping unit <NUM>, and HF attenuator control unit <NUM>. In accordance with the present disclosure, the RON switch control unit <NUM> controls the variable resistance of the transmitter driver <NUM>, in particular by switching between different resistance values RON<NUM>, RON<NUM>,. , RONx during a modulation phase of the NFC device. Furthermore, in accordance with an embodiment, the HF attenuator control unit <NUM> controls the variable resistance of the HF attenuator comprised in the receiver <NUM>, in particular by switching between different resistance values RHF<NUM>, RHF<NUM>,. , RHFx during a modulation phase of the NFC device. Furthermore, the phase initialization unit <NUM> may set the initial transmitter phase, and the transmission shaping unit <NUM> may apply a dedicated number of active clocks, a predefined duty cycle, and a predefined amplitude and phase inversion.

<FIG> shows an illustrative embodiment of a transceiver simulation model <NUM>. The transmission driver of the transceiver has a variable on-state resistance RON. The resistance of the transmitter driver <NUM> during a modulation phase of the NFC device is different from the resistance of the transmitter driver <NUM> during a non-modulation phase. The resistance of the transmitter driver <NUM> can for example be selected from a plurality of different values RON<NUM>, RON<NUM>,. , RONX, which are typically between <NUM> and <NUM> ohms. In accordance with the present disclosure, the resistance of the transmitter driver <NUM> is also varied or switched during the modulation phase of the NFC device. Furthermore, in accordance with an embodiment, the resistance of the HF attenuator is varied or switched during the modulation phase of the NFC device. In particular, the resistance of the HF attenuator can be selected from a plurality of different values RHF<NUM>, RHF<NUM>,.

According to an essential aspect of the present invention, the controller is configured to change the variable resistance by selecting a resistance from a plurality of different resistances. In this way, changing the variable resistance is facilitated. Such a selection may for example be implemented as follows. Several resistances may be realized in silicon and provided in parallel. Then, a subset of these resistances may be activated, to define a final RON value. In that case, the plurality of resistances corresponds to the different possible final RON values, and the selection corresponds to activating a specific subset of the parallel resistances to arrive at a specific one of said possible final RON values. The skilled person will appreciate that other implementations are possible too. According to an essential aspect of the present invention, the controller is configured to select different resistances for consecutive transmission pulses during the modulation phase. This further improves the damping of the transmitted signal, which in turn further facilitates widening the synchronization window also at high active ALM strengths. For instance, a different resistance may be selected for each transmission pulse.

In one or more embodiments, the controller is further configured to remove one or more transmission pulses at a beginning of one or more modulation phases of the NFC device. This further facilitates widening the synchronization window, such that a proper clock synchronization is also possible at high active ALM strengths. The removal of one or more transmission pulses may be implemented in the digital part of the NFC controller.

<FIG> shows illustrative embodiments of different modulation schemes <NUM>. In particular, three embodiments are shown in which the synchronization window is extended by varying the driver resistance during the modulation phase. For instance, in the first embodiment (example <NUM>), the driver resistance is changed from value RON<NUM> to RON<NUM> during the modulation phase. As a result, the antenna signal is dampened quickly when the non-modulation phase of the NFC device has started. This, in turn, widens the synchronization window also in case of high active load modulation strengths (right-hand side of <FIG>). Similarly, in the second embodiment (example <NUM>), the driver resistance is changed from value RON<NUM> to RON<NUM>, from value RON<NUM> to RON<NUM>, from value RON<NUM> to RON<NUM> during the modulation phase, and from value RON<NUM> to RON<NUM> during the non-modulation phase. Thus, the value of RON can also be changed during the non-modulation phase. Again, the antenna signal is dampened quickly when the non-modulation phase of the NFC device has started, which widens the synchronization window. In the third embodiment (example <NUM>), the driver resistance is changed from value RON<NUM> to RON<NUM> and from value RON<NUM> to RON<NUM> during the modulation phase. Again, the antenna signal is dampened quickly when the non-modulation phase of the NFC device has started, which widens the synchronization window. In addition, some transmission pulses are omitted at the beginning of the modulation phases of the NFC device. Thereby, the synchronization window is further widened.

<FIG> shows further illustrative embodiments of different modulation schemes <NUM>. In these embodiments, the resistance of the HF attenuator is varied or switched during the modulation phase of the NFC device. For instance, in the first embodiment (example <NUM>), the HF attenuator resistance is changed from value RHF<NUM> to RHF<NUM> during the modulation phase. Similarly, in the second embodiment (example <NUM>), the HF attenuator resistance is changed from value RHF<NUM> to RHF<NUM>, from value RHF<NUM> to RHF<NUM>, from value RHF<NUM> to RHF<NUM> during the modulation phase, and from value RHF<NUM> to RHF<NUM> during the non-modulation phase. Thus, the value of RHF can also be changed during the non-modulation phase. In the third embodiment (example <NUM>), the HF attenuator resistance is changed from value RHF<NUM> to RHF<NUM> and from value RHF<NUM> to RHF<NUM> during the modulation phase. These embodiments may result in a more accurate control of the damping of the transmitted signal.

Claim 1:
A near field communication, NFC, device (<NUM>), comprising:
a modulator (<NUM>) configured to modulate a carrier signal received from an external reader, resulting in a modulated carrier signal;
a controller (<NUM>) configured to control a transmission of the modulated carrier signal to the external reader;
a transmitter driver (<NUM>) configured to transmit said modulated carrier signal, said transmitter driver (<NUM>) having a variable resistance;
wherein the controller (<NUM>) is further configured to change said variable resistance during a modulation phase of the NFC device (<NUM>) such that a clock synchronization window is widened;
wherein the controller (<NUM>) is configured to change said variable resistance by selecting a resistance from a plurality of different resistances;
characterized in that the controller (<NUM>) is configured to select different resistances for consecutive transmission pulses during the modulation phase.