Patent Description:
Quantum circuits including a Josephson junction having a self-capacitance and an external shunt capacitance connected thereacross are generally known. In particular, transmon qubits that are currently widely used are generally implemented using a dominant direct capacitor in parallel with either a single Josephson junction for fixed-frequency qubits, or two Josephson junctions in a superconducting quantum interference device (SQUID) geometry. These qubits are straight forward to build, however, they suffer from a lack of coherence.

To remedy the coherence problem, it has been a conventional approach to use extended, large capacitors directly connected across the superconductors of the Josephson junction. In this case, the electric fields are low so that individual coupling to defects in the capacitive area is minimised. This can, however, induce parasitic couplings in large systems. Moreover, using such large capacitors complicates implementing coupling schemes between qubits, resonators, and other elements, due to the size needed for coupling capacitors.

An article entitled "<NPL>)) proposes to implement the circuit structure by engineering the Josephson junction self-capacitance to be large enough to act as its own shunt capacitor, thereby eliminating the need for the external direct capacitor.

Further arrangements of the prior art are described in <CIT>, <CIT>, <CIT> and <NPL>).

It is an object of the present invention to propose an alternative implementation of a qubit circuit structure of the above referenced type.

In order to attain this object, a circuit structure of the above referenced type is implemented with the series capacitance of said first and second electrode regions to said ground electrode region being greater than the self-capacitance of said Josephson junction region.

In the planar circuit structure of the invention, the first and second electrode regions are mutually galvanically isolated and each of them is also galvanically isolated from the coplanar ground electrode. In particular, the isolation is effected by an isolation zone that is free from electrode material and is located between the ground electrode region and the first and second electrode regions so as to physically separate them from each other. This is preferably realised by a thin metallisation layer formed on the plain surface of an underlying substrate and having cut-outs formed therein that spatially separate the ground electrode region and the first and second electrode regions from each other. In particular, these cut-outs are in the shape of thin strips that are free of metallisation material.

In this configuration, capacitances between the ground electrode region and the first and second electrode regions, respectively, form a series capacitance that shunts the self-capacitance of the Josephson junction region. The capacitance value of this arrangement may be calculated in accordance with a method disclosed in arXiv:<NUM> entitled "Calculation of Coupling Capacitance in Planar Electrodes".

The circuit structure according to the invention is configured so as to result in a value of the series capacitance that is greater than the value of the self-capacitance of the Josephson junction region. In practice, the proportion of the self-capacitance in the total capacitance may be not more than <NUM> %, preferably not more than <NUM> %, or <NUM> % or even <NUM> %.

As compared to prior art using a dominant direct capacitor in parallel with a Josephson junction, the circuit structure according to the invention results in better coherence. There is less coupling to individual dipole defects (as for instance described in an article by <NPL>"), as it requires more ground capacitance and hence less electrical field strength. It is easier to implement coupling to drivelines, qubits or other elements, as the implementation has longer traces. In addition, parasitic crosstalk to other qubits is reduced. Larger distance between the qubits means that qubits are farther away from the other qubits "centre of mass". Further, parasitic coupling and related loss to other grounds and metals on other planes for 3D-integrating systems is reduced thanks to the direct capacitance to ground. The circuit structure according to the invention can be straight forwardly implemented using waveguides, and the parasitic inductance is small.

The invention is not limited to qubit circuit structures comprising a single Josephson junction for fixed-frequency qubits but in particular also applies to circuit structures having two Josephson junctions in a superconducting quantum interference device (SQUID) geometry.

In particular, the surface area of the Josephson junction region is less than the surface area of each of the first and second electrode regions. Preferably, each of the first and second electrode regions is bonded by two curve segments that extend between a first point that is nearest to the Josephson junction region and a second point that is remotest from the Josephson junction region, and for each point on a bisector curve that extends between the two curve segments from the first to the second point, a distance between the two curve segments measured along a transversal straight line orthogonally intersecting the bisector curve in that point is not substantially increased when the distance of that intersection point from the Josephson junction region is decreased. This is very different from standard qubit designs which feature large electrode pads in the centre of the circuit structure.

In preferred embodiments, the geometrical arrangement of said first and second electrode regions is centrally symmetric with respect to the centroid of the surface area of said Josephson junction region. This point symmetric geometry maintains the electrical "centre of mass" and minimises parasitics from asymmetry.

In other expedient designs, each of said first and second electrode regions is in the shape of a continuous strip of essentially uniform width that extends between a connecting portion thereof, that is located adjacent to said Josephson junction region for galvanic connection thereto and at least one free end portion thereof, that is located remote from said Josephson junction region. In these designs, the before-mentioned bisector curve may in particular be a straight line, a line composed of straight line sections, a meandering line and/or combinations thereof. The longitudinal edges of the strip extend along the bisector curve on both sides thereof at a uniform distance. From these edges of the strip, neighbouring edges of the ground electrode region are preferably equidistantly spaced at a small distance. The transverse edge that connects the longitudinal edges of the strip at an end portion thereof is preferably at the same distance away from the corresponding neighbouring edge of the ground plain.

In a preferred embodiment, said strip has first and second free end portions with said connecting portion of said strip located half-way therebetween. Especially preferably, the directions of extension of said strip from its connecting portion to its first and second free end portions are essentially mutually orthogonal. In the latter case, the connecting portion of the strip is expediently formed as a short strip section whose bisector curve extends in a direction that is orthogonal to the angular bisector of the two orthogonal directions of strip extension. Specifically, as already stated earlier, the connecting portion may have one, two or even more Josephson junctions connected thereto. One of the benefits of this design is its increased compactness.

In any of the above realisations of the first and second electrode regions that may be described as having the connecting portion located between legs extending therefrom, it is to be understood that instead of two open-ended legs as described above, in principle more legs can be added, depending on the need for coupling to other elements or drivelines.

In particular, said direction of extension of said strip is a mean linear direction, said strip meandering about said linear direction between said connecting portion thereof and each one of said free end portions thereof.

According to another aspect of the invention, said ground electrode region and each of said first and second electrode regions is arranged so as to form a microstrip waveguide, or as an alternative, said ground electrode region and each of said first and second electrode regions is arranged so as to form a coplanar waveguide. Other waveguide geometries that include direct capacitance to ground are possible.

The qubit circuit structure according to the invention may in particular be implemented as a fixed-frequency transmon, specifically including one single Josephson junction, or as a tuneable transmon, specifically including two Josephson junctions.

In a further aspect, a circuit structure according to the invention is combined with a tuneable coupler and another circuit structure according to the invention so that at least one of said first and second electrode regions of the one of said circuit structures is capacitively coupled to the tuneable coupler that is capacitively coupled to one of said first and second electrode regions of the other one of said circuit structures.

In the following, exemplary embodiments of the invention will be described with reference to the drawings, in which:.

In the circuit diagrams of <FIG>, a cross symbol stands for a Josephson junction region <NUM> including first and second weakly coupled superconductors. The Josephson junction <NUM> of <FIG> or a SQUID-loop <NUM> composed of the two Josephson junctions <NUM> in <FIG> are each galvanically coupled to first and second electrode regions <NUM>, <NUM>' that are symbolised by each one of the capacitor plates of two capacitors. The opposite ones <NUM> of the two capacitor plates <NUM>, <NUM>' are to symbolise a common ground electrode region <NUM>. The first and second electrode regions <NUM>, <NUM>' thereby imply a series capacitance to the ground electrode region <NUM>. The first and second electrode regions <NUM>, <NUM>' and the ground electrode region <NUM> are in a coplanar configuration that is arranged and dimensioned so as to have a series capacitance greater than the self-capacitance of the Josephson junction region <NUM> or SQUID-loop <NUM>, respectively.

<FIG> illustrate various types of geometric shapes of the first and second electrode regions <NUM>, <NUM>' that may expediently be used to implement the invention. The coplanar ground electrode region is not indicated in this illustration but may be imagined to fill the remaining area of each of the implementations so as to leave some gap to the first and second electrode regions <NUM>, <NUM>' as well as the Josephson junction region <NUM>. A more detailed illustration of this situation will be discussed later with reference to <FIG>.

In the embodiment illustrated in <FIG> each of the first and second electrode regions <NUM>, <NUM>' is in the shape of a rectilinear strip of identical width and length having one end thereof galvanically connected to the Josephson junction region <NUM> and the opposite end being open. <FIG> illustrates a similar geometry and is only different from <FIG> in that the connection is to a SQUID-loop <NUM> instead of a single Josephson junction <NUM>. The embodiments of <FIG> correspond to the ones of <FIG>, respectively, however, with the difference that the strips <NUM>, <NUM>' are not rectilinear but each include an intermediate section <NUM>, <NUM>' of a sine wave-like shape. The embodiments of <FIG> are similar to the ones of <FIG>, respectively, however, with the difference that the sine wave-like intermediate sections <NUM>, <NUM>' are replaced by intermediate sections <NUM>, <NUM>', each of which meanders over a length of two periods of a waveform composed of essentially transverse rectilinear sections intermittently connected by rounded arcs at their ends. As can be seen from the drawings, each of the embodiments of <FIG> have a centrally symmetric design with respect to the centroid of the surface area of the Josephson junction region <NUM> or SQUID-loop region <NUM>, respectively.

As may be taken from <FIG>, each of the above-described embodiments illustrated in <FIG> may generally be described to have a Josephson junction <NUM> or a SQUID-loop <NUM> in the centre thereof and two rectilinear or meandering legs <NUM>, <NUM>' extending from the centre in opposite directions. In contrast, in each of the embodiments illustrated in <FIG> each of the first and second electrode regions <NUM>, <NUM>' comprises a pair of legs <NUM>, <NUM> and a connecting portion <NUM> linking the legs <NUM>, <NUM> in the neighbourhood of the Josephson junction region <NUM> or SQUID-loop area <NUM>. The legs <NUM>, <NUM> of each pair extend in mutually orthogonal directions. Otherwise, the shape of the legs <NUM>, <NUM> in <FIG> is similar to the shape of the first and second electrode regions <NUM>, <NUM>' illustrated in <FIG>. Thereby, each of the embodiments of <FIG> is again centrally symmetric with respect to the centroid of the surface area of the Josephson junction region <NUM> or the SQUID-loop region <NUM>, respectively.

<FIG> shows an embodiment according to <FIG> in more detail, with <FIG> schematically illustrating the geometry, <FIG> illustrating the equivalent circuit diagram and <FIG> illustrating the circuit layout in an enlarged scale. As may be seen from <FIG>, the legs <NUM>, <NUM> and the connection portion (<NUM>) of the first and second electrode regions <NUM>, <NUM>' extend at an essentially constant transverse width along a bisector curve <NUM> that is marked as a dotted line in the first electrode region <NUM> that extends in the lower left portion of <FIG>, while the same, although not explicitly drawn-in, also applies to the second electrode region <NUM>' extending in the upper right portion of <FIG>. This bisector curve <NUM> extends from a left outermost point 13a towards a central portion that is indicated by circle <NUM> and then again towards a lower outermost point 13b. The Josephson junction region <NUM> is located centrally within circle <NUM> and covers a surface area that is much smaller than the surface area covered by the first and second electrode regions <NUM>, <NUM>'. The first and second electrode regions <NUM>, <NUM>' are centrally symmetric with respect to the centroid of the surface area of the Josephson junction <NUM> so that the foregoing description of the first electrode region <NUM> applies accordingly.

As may be further seen from <FIG>, the Josephson junction region <NUM> is galvanically connected to the first and second electrode regions <NUM>, <NUM>' where the respective connecting portions <NUM> are closest thereto. While the portions of the bisector curve <NUM> that extend from the outermost points 13a, 13b towards the central portion <NUM> are mutually orthogonal, the section of the bisector curve <NUM> within the connecting portion <NUM> is orthogonal to the angular bisecting line between the two orthogonal sections of bisector curve <NUM>.

The above described first and second electrode regions <NUM>, <NUM>' are illustrated in <FIG> as hatched areas of metallisation. The remaining hatched area of <FIG> indicates the metallised ground electrode region <NUM>. It is separated from the first and second electrode regions <NUM>, <NUM>' by a small transverse gap <NUM> that extends into the area limited between the facing edges of the connecting portions <NUM> of the first and second electrode regions <NUM>, <NUM>' and is free from any metallisation. Because of the centrally symmetric configuration, capacitances defined between the ground electrode region <NUM> and the first and second electrode regions <NUM>, <NUM>', respectively, are identical and are indicated as "C" in <FIG>.

<FIG> is to exemplarily illustrate circuit parameters of an implementation in accordance with the invention as shown in <FIG> as compared to the ones of a conventional transmon circuit comprising a large capacitor to directly shunt the Josephson junction <NUM> as shown in <FIG>. Standard parameters of the conventional circuit are C = <NUM> fF, effective Josephson induction is <NUM> nH, and operating frequency is <NUM>.

Claim 1:
Planar electrically floating qubit circuit structure comprising:
a Josephson junction region (<NUM>) including first and second weakly coupled superconductors;
first and second electrode regions (<NUM>, <NUM>') galvanically coupled to said first and second superconductors, respectively; and
a ground electrode region (<NUM>);
characterised in that
the series capacitance of said first and second electrode regions (<NUM>, <NUM>') to said ground electrode region (<NUM>) is greater than the self-capacitance of said Josephson junction region (<NUM>).