Patent Description:
A phased array may comprise a plurality of transceiver (TRX) elements, wherein each transceiver element typically may be connected to a respective antenna in an antenna array, wherein the antennas of the array have a predetermined spacing. The phased array may generate an RF beam in a desired direction though applying a phase difference between the respective antennas. The phase difference may be programmable for adjusting the direction of propagation.

A typical phased array transceiver element may comprise a mixer block for up-converting one or more baseband (BB) signals to radio frequency (RF), wherein the baseband signal is mixed with one or more high-frequency local oscillator (LO) signals. Typically, in-phase and quadrature local oscillator signals are input to the mixer, having a nominal phase difference of <NUM> degrees. In the mixer, the in-phase local oscillator signal is mixed with an in-phase baseband signal and the quadrature local oscillator signal mixed with a quadrature baseband signal, for forming the modulated radio frequency signal output to the antenna.

To achieve the required phase difference, a respective phase shift is generated at each transceiver element. Several techniques for generating such a phase shift are known in the prior art. One such technique comprises generating the phase shift at the local oscillator before mixing with the baseband signal in the mixer.

Given the complex modulation schemes currently in use, generally, there is a need for providing a transceiver element than can generate ever more accurate in-phase and quadrature signals.

The document "<NPL>, discloses a phased array transceiver wherein the local oscillator is followed by a phase shifter and a multiplier for generating the carrier signal with different phases.

To this end, according to a first aspect, there is provided a phased array transceiver element comprising a local oscillator stage for generating beamformed in-phase and quadrature local oscillator signals, said local oscillator stage comprising a phase shifter connectable to a reference frequency source and applying a first phase shift; a primary frequency multiplier input from said phase shifter and applying a primary frequency multiplication factor; a phase-splitting arrangement input from said primary frequency multiplier and having a first output and a second output, said phase-splitting arrangement applying a second phase shift at said first output and a third phase shift at said second output; a first secondary frequency multiplier input from said first output of said phase-splitting arrangement, having an output for the in-phase local oscillator signal, and applying a secondary frequency multiplication factor; and a second secondary frequency multiplier input from said second output of said phase-splitting arrangement, having an output for the quadrature local oscillator signal, and applying said secondary frequency multiplication factor.

Throughout this disclosure, a "local oscillator stage" should be understood as a stage, module, component, or the like, configured for generating one or more signals suitable for mixing with the one or more baseband signals at the mixer stage. As such, a local oscillator stage according to this disclosure may comprise a local oscillator (LO), or some alternative means for generating the one or more local oscillator signals, such one or more frequency converters, frequency multipliers, or the like. Specifically, a local oscillator stage as understood according to this disclose may be configured to input a reference signal and generate one or more signals suitable for mixing, i.e., local oscillator signal, through frequency multiplication, frequency conversion, phase-shifting, or the like, of the reference signal, in one or more steps.

Further, throughout this disclosure, the terms transceiver and transceiver element should be understood as encompassing a device arranged for at least generating a signal to be transmit a signal, i.e., including the case of a device arranged for both transmitting and receiving as well as the case of a device arranged only for transmitting, i.e., a transmitter.

Through the present inventive concept, the first phase shift, which may correspond to a beamforming phase shift, may be performed before the primary frequency multiplier and the secondary frequency multipliers. Further, phase-splitting for the in-phase signal and the quadrature signal may be performed before the secondary frequency multipliers. Thus, the beamforming phase shift and the phase splitting may be performed at lower frequencies than the local oscillator frequency, usually corresponding to the frequency of the transmitted radio frequency signal. Since the frequency multipliers also function as phase multipliers, the respective phase shifts may be performed at a reduced phase range as compared to a phase shift performed at the local oscillator frequency. This reduces the difficulty of design, especially at high frequencies.

Further again, the placing of the first frequency multiplier between the first phase shifter and the phase splitter allows for the first phase shift to be performed at a different frequency than the phase splitting, decorrelating adjustment of the first phase shift from the phase splitting, better allowing for independent adjusting of the two, since, the phase splitting will remain the same when the first phase shift is changed, typically during beamforming. This reduces design complexity since a change of the first phase shift (beamforming operation) will not require a re-calibration of the phase splitter for generating a proper phase difference between the quadrature local oscillator signal and the in-phase local oscillator signal.

Thus, synergistically, the features of the phased array transceiver element according to the present inventive concept allows for improved accuracy in the adjustment of the beamforming phase shift, at low design complexity.

The present scheme is particularly well suited when the radio frequency of operation approached the maximal achievable frequency of operation for the employed circuit.

According to one embodiment said first phase shift is adjustable for controlling a local oscillator beamforming phase shift of the in-phase local oscillator signal and/or of the quadrature local oscillator signal. This is a typical application of the first phase shift.

According to one embodiment said first phase shift equals said local oscillator beamforming phase shift divided by the product of said primary frequency multiplication factor and said secondary frequency multiplication factor. This accounts for the phase multiplication of the primary frequency multiplier and the secondary frequency multipliers so that the local oscillator beamforming phase shift may be accurately adjusted at the first phase shifter.

According to one embodiment the difference between said third phase shift and said second phase shift, multiplied by said second frequency multiplication factor, generates the phase difference between said quadrature local oscillator signal and said in-phase local oscillator signal. This allows for setting the second phase shift and the third phase shift so that a proper phase difference, nominally <NUM> degrees, between the quadrature local oscillator signal and the in-phase local oscillator signal is achieved.

According to one embodiment, said second phase shift and said third phase shift are equal with opposite signs. This is a particularly simple way of achieving the proper phase difference between the quadrature local oscillator signal and the in-phase local oscillator signal.

According to one embodiment, said phase splitter is further configured to apply a calibration phase shift at said first output and said second output. Such a calibration phase shift should be understood as an additional phase shift, as compared to a nominal one, applied at the phase shifter for achieving a proper phase difference between the quadrature local oscillator signal and the in-phase local oscillator signal, for example due to imperfections in the circuit.

According to one embodiment, said calibration phase shift is applied with opposite sign at, respectively, said first output and said second output. This is a particularly simple way of applying a calibration phase shift.

According to one embodiment, said phased array transceiver element further comprises a mixer stage, wherein said in-phase local oscillator signal and said quadrature local oscillator signal are input to said mixer stage.

According to one embodiment, said mixer stage further is input from an in-phase baseband signal and a quadrature baseband signal.

According to a second aspect, there is provided a phased array transceiver comprising a plurality of transceiver elements according to the first aspect. This aspect may generally present the same or corresponding advantages as the former aspect.

According to a third aspect, there is provided a method of generating a beamforming phase-shifted local oscillator signal, comprising applying a first phase shift to a reference frequency signal, generating a phase-shifted signal; multiplying the phase shifted signal by a first frequency multiplication factor, generating a multiplied signal; applying a second phase shift to said multiplied signal, generating a first intermediate signal; applying a third phase shift to said multiplied signal, generating a second intermediate signal; and multiplying each of the first intermediate signal and the second intermediate signal by a second frequency multiplication factor, generating, respectively, an in-phase local oscillator signal and a quadrature local oscillator signal.

This aspect may generally present the same or corresponding advantages as the former aspect.

<FIG> schematically shows a phased array transceiver <NUM>, comprising a plurality of phased array transceiver elements <NUM>.

Each phased array transceiver element <NUM> is connectable to a respective antenna <NUM>, each of the antennas <NUM> being comprised in a phased antenna array, as known per se in the art.

As shown, each phased array transceiver element <NUM> comprises a local oscillator (LO) stage <NUM>, a baseband (BB) stage <NUM>, and a mixer and power amplifier stage <NUM>.

The shown implementation is a so-called zero-intermediate-frequency (ZIF), wherein the local oscillator signal frequency is equal to the frequency of the radio frequency signal. However, the present inventive concept is equally applicable to architectures employing one of more intermediate frequencies (IF).

For digital modulation, as known per se in the art, the baseband stage may be input from an in-phase digital-to-analog converter DAC I <NUM> and from a quadrature in-phase digital-to analog converter DAC Q <NUM>, respectively providing an in-phase baseband signal I BB and a quadrature baseband signal Q BB. The baseband stage <NUM> may comprise processing circuitry <NUM>. The baseband stage <NUM> outputs the in-phase baseband signal and the quadrature baseband signal, optionally as processed by the processing circuitry <NUM> to the mixer <NUM> of the mixer stage.

The mixer stage <NUM> may comprise a mixer <NUM>, and, optionally, a power amplifier PA <NUM>. The mixer stage is connectable to and may output to the respective antenna <NUM>.

The local oscillator stage <NUM> is configured to generate beamformed in-phase LO I and quadrature LO Q local oscillator signals, as will be elaborated upon in the following. Thus, a method of generating a beamforming phase-shifted local oscillator signal may be implemented in the phased array transceiver element <NUM>.

The local oscillator stage <NUM> is connectable to a reference frequency source <NUM>. The reference current source may be configured to provide a reference signal having a frequency FREF corresponding to a fraction <NUM>/K = <NUM>/(LM) of a central and/or carrier frequency of the radio frequency signal generated at the phased array transceiver element <NUM>. The reference signal, having a given phase, may be provided to all transceiver elements <NUM> of the phased array transceiver <NUM>.

The local oscillator stage <NUM> comprises a phase shifter <NUM> connectable to and input from the reference frequency source <NUM>. The phase shifter <NUM> is configured to apply a first phase shift ΔφREF to reference frequency signal, i.e., in the present phased array transceiver element <NUM>, to the signal input from the reference frequency source <NUM>. Hereby, the phase shifter <NUM> will generate and output a phase shifted signal.

Further, the local oscillator stage <NUM> comprises a primary frequency multiplier <NUM> input from the primary phase shifter and applying a primary frequency multiplication factor L, generating a multiplied signal output from the primary frequency multiplier. Thus, the multiplied signal will have frequency L fREF.

Further again, the local oscillator stage <NUM> comprises a phase-splitting arrangement <NUM> input from the primary frequency multiplier <NUM>. The phase-splitting arrangement has a first output <NUM> and a second output <NUM>.

The phase-splitting arrangement <NUM> is configured for applying a second phase shift Δφ<NUM> to the multiplied signal at the first output <NUM>, generating a first intermediate signal.

Further, the phase-splitting arrangement <NUM> is configured for applying a third phase shift Δφ<NUM> to the multiplied signal at the second output <NUM>, generating a second intermediate signal.

Further again, the local oscillator stage <NUM> comprises a first secondary frequency multiplier <NUM> input from the first output <NUM> of the phase-splitting arrangement <NUM>. The first secondary frequency multiplier <NUM> is configured to apply a secondary frequency multiplication factor M, thus multiplying the frequency of the first intermediate signal by the first frequency multiplication factor M. The first secondary frequency multiplier <NUM> has an output <NUM> for the in-phase local oscillator signal I LO. Thus, the first intermediate signal will have frequency K L fREF.

Further again, the local oscillator stage <NUM> comprises a second secondary frequency multiplier <NUM> input from the second output <NUM> of the phase-splitting arrangement <NUM>. The second secondary frequency multiplier <NUM> is configured to apply the secondary frequency multiplication factor M, thus multiplying the frequency of the second intermediate signal by the secondary frequency multiplication factor M. The second secondary frequency multiplier <NUM> has an output <NUM> for the quadrature local oscillator signal Q LO. Thus, the second intermediate signal will have frequency K L fREF.

The first phase shift ΔφREF may be adjustable for controlling a local-oscillator beamforming phase shift of the in-phase local oscillator signal and of the quadrature local oscillator signal. Through the effect of the primary frequency multiplier <NUM> and each of the secondary frequency multipliers <NUM>, <NUM>, the first phase shift will be multiplied by the primary frequency multiplication factor L and the secondary frequency multiplication factor M. In consequence, the first phase shift ΔφREF may be applied so that the first phase shift equals the desired local oscillator beamforming phase shift ΔφLO divided by the product of the primary frequency multiplication factor L and the secondary frequency multiplication factor M, i.e., ΔφLO = ΔφREF * (LM).

The nominal phase difference between the quadrature local oscillator signal and the in-phase local oscillator signal is, a generally known in the art, <NUM> degrees. The phase splitting arrangement <NUM> may be configured to generate such a phase shift through the application of the second phase shift Δφ<NUM> at the first output <NUM> and the third phase shift Δφ<NUM> at the second output <NUM>. Through the effect of, respectively, the first secondary frequency multiplier <NUM> and the second secondary frequency multiplier <NUM>, the second phase shift Δφ<NUM> and the third phase shift Δφ<NUM> will be multiplied by the secondary frequency multiplication factor M.

In consequence, each of the second phase shift Δφ<NUM> and the third phase shift Δφ<NUM> may be applied so that the difference between the third phase shift Δφ<NUM> and the second phase shift Δφ<NUM>, multiplied by the secondary frequency multiplication factor M, equals the phase difference of <NUM> degrees between the quadrature local oscillator signal and the in-phase local oscillator signal, i.e., (Δφ<NUM> - Δφ<NUM>) M = <NUM>°, or, equivalently, (Δφ<NUM> - Δφ<NUM>) = <NUM>°/M, thereby generating this phase difference. This may, for example, be achieved by setting Δφ<NUM> = +<NUM>°/M and Δφ<NUM> = -<NUM>°/M, i.e., second phase shift Δφ<NUM> and the third phase shift Δφ<NUM> being equal with opposite signs.

Further a calibration phase shift ΔφIM may be applied each of the second phase, shift Δφ<NUM> and the third phase shift ΔφIM, for example, for correcting for circuit imperfections, for example, so that the <NUM>-degree phase difference between the quadrature local oscillator signal and the in-phase local oscillator signal is maintained. Such a calibration phase shift may, for example, be applied as Δφ<NUM> = (+<NUM>° + <NUM>. 5ΔφIM)/M and Δφ<NUM> = (+<NUM>° - <NUM>. 5ΔφIM)/M, this being applied with opposite sign to the first output and the second output.

<FIG> is a schematic of a phase shifter <NUM> (cf. <FIG>) of the local oscillator stage <NUM>. The configuration of <FIG> should merely be considered an example, and the present disclosure is by no means limited to the specific circuitry presented in <FIG>.

The phase shifter <NUM> of <FIG> is configured as a voltage buffer comprising a tunable passive load <NUM>. In such implementation, the phase shifting, and voltage buffering are merged, which may reduce design complexity and power consumption.

As shown in <FIG>, the tunable passive load <NUM> may comprise one or more inductors Lout and one or more capacitors Ct(<NUM>). Further, the phase shifter may comprise a pair of input transistors <NUM>. The tunable passive load <NUM> and the input transistors <NUM> may be connected in series, between a supply voltage Vdd and ground.

Thus, the voltage buffer may be used to buffer and amplify the signal differentially input at inputs VIN+, VIN- at the respective gate terminals of the input transistors <NUM>, using the two input transistors <NUM> which are connected to the passive tunable load <NUM>.

The one or more inductors Lout and one or more capacitors Ct(<NUM>). Ct(n) may be configured to resonate at the operating frequency of the local oscillator stage <NUM> (cf.

A phase shifted signal may be differentially output at outputs VOUT+, VOUT- <NUM>.

The phase shift may be realized by changing the total capacitance Ct of the one or more capacitors Ct(<NUM>). Ct(n), by through the phase shifter <NUM> being configured for individually connecting or disconnecting individual capacitors Ct(<NUM>). Ct(n) according to the desired phase shift.

The phase shifter <NUM> of <FIG> is equally applicable, mutatis mutandis, for implementing the phase splitting arrangement <NUM> (cf. In particular, two phase shifters <NUM> according to <FIG> may be used, wherein the one or more capacitors Ct(i) are connected/disconnected in an inverted way for each of the two phase shifters. As an example, the first intermediate phase shift can be derived by disconnecting a Ct(i) element from the Ct capacitance array (so generating a positive phase shift with respect to the signal input at the gate terminals of the input transistors <NUM>) while the second intermediate signal can be generated by connecting an element Ct(i) (so generating a negative phase shift with respect to the signal input at the gate terminals of the input transistors <NUM>).

<FIG> is a schematic of a frequency multiplier <NUM>, which may serve, e.g., as the primary frequency multiplier <NUM>, the first secondary frequency multiplier <NUM>, or the second secondary frequency multiplier <NUM> of the local oscillator stage <NUM> (cf. The configuration of <FIG> should merely be considered an example, and the present disclosure is by no means limited to the specific circuitry presented in <FIG>.

The example frequency multiplier <NUM> of <FIG> is configured for a frequency multiplication factor of <NUM>. Naturally other multiplication factors are equally possible.

As shown in <FIG>, the frequency multiplier <NUM> may comprise a doubler stage <NUM>, an amplifier stage <NUM>, and a mixer stage <NUM>.

The doubler stage <NUM> may comprise a load <NUM>, for example in the form of one or more inductors L2FA. Further, the doubler stage <NUM> may comprise a pair of input transistors <NUM>. The load <NUM> and the input transistors <NUM> may be connected in series between a supply voltage Vdd and ground.

Through the doubler stage <NUM>, using the pair of input transistors <NUM> and the load <NUM>, the frequency multiplier <NUM> may generate a signal at twice the frequency of a signal differentially input at the pair of input transistors <NUM>. Through a capacitor <NUM>, the signal at twice the input frequency may be input to the amplifier stage <NUM>.

The amplifier stage <NUM> may comprise an amplifier transistor <NUM> and an amplifier load L2FB <NUM> connected in series between the supply voltage VDD and ground. The capacitor <NUM> is connected to a gate terminal of the transistor <NUM>. Hereby, the signal at twice the input frequency generated at the doubler stage <NUM> may be amplified by the amplifier transistor <NUM> and the amplifier load <NUM> of the amplifier stage <NUM>. The thus amplified signal may be input to the mixer stage <NUM> from a point between the amplifier transistor <NUM> and the amplifier load <NUM>.

The mixer stage <NUM>, may comprise a pair of mixer transistors <NUM>, a mixer load <NUM> in the form of one or more capacitors C3F and one or more inductors L3F. The pair of mixer transistors <NUM> and the mixer load <NUM> may be connected in series between the supply voltage VDD and the point between the amplifier transistor <NUM> and the amplifier load <NUM>. The input signal input at the pair of input transistors <NUM> of the doubler stage <NUM> may be differentially input at the pair of input transistors <NUM> of the mixer stage <NUM>.

Hereby, the signal output from the amplifier stage <NUM>, that is at twice the frequency of the signal differentially input at the pair of the transistor <NUM> of the doubler stage <NUM>, may be mixed with the signal differentially input at the pair of input transistors <NUM> of the mixer stage <NUM> to generate a signal at a frequency three times of the frequency of the signal differentially input at the pair of input transistors <NUM> of the doubler stage <NUM>.

The mixer load <NUM> may be configured to resonate at a frequency three times of that of the signal differentially input at the pair of input transistors <NUM> of the doubler stage <NUM> to reduce signals at any frequency different than the one at three times the operating frequency of the signal differentially input at the pair, so to improve the spectral purity of the generated frequency.

Claim 1:
A phased array transceiver element (<NUM>) comprising a local oscillator stage (<NUM>) for generating beamformed in-phase and quadrature local oscillator signals, said local oscillator stage (<NUM>) comprising:
a phase shifter (<NUM>) connectable to a reference frequency source and applying a first phase shift;
a primary frequency multiplier (<NUM>) input from said phase shifter and applying a primary frequency multiplication factor;
a phase-splitting arrangement (<NUM>) input from said primary frequency multiplier (<NUM>) and having a first output (<NUM>) and a second output (<NUM>), said phase-splitting arrangement (<NUM>) applying a second phase shift at said first output (<NUM>) and a third phase shift at said second output (<NUM>);
a first secondary frequency multiplier (<NUM>) input from said first output (<NUM>) of said phase-splitting arrangement (<NUM>), having an output (<NUM>) for the in-phase local oscillator signal, and applying a secondary frequency multiplication factor; and
a second secondary frequency multiplier (<NUM>) input from said second output (<NUM>) of said phase-splitting arrangement (<NUM>), having an output (<NUM>) for the quadrature local oscillator signal, and applying said secondary frequency multiplication factor.