Company: AIP
Filing Date: 2025-11-04
Form Type: 10-Q
Source: 0001628280-25-048977
Chunk: 264

Company: Arteris, Inc.
Filing Date: 2025-11-04
Form: 10-Q
Item: Part I, Item 8
Chunk 264
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 in these forward-looking statements as a result of several factors, including those set forth under the heading “Risk Factors” in this Quarterly Report on Form 10-Q. You should carefully read the “Risk Factors” section of this Quarterly Report on Form 10-Q to gain an understanding of the important factors that could cause actual results to differ materially from forward-looking statements. Please also see the section under the heading “Cautionary Note Regarding Forward-Looking Statements” in the 2024 Form 10-K.

Unless the context otherwise requires, all references in this report to “we,” “us,” “our,” the “Company,” and “Arteris” refer to Arteris, Inc. and its subsidiaries.

Overview

We are a leading provider of semiconductor system IP, including interconnect and other intellectual property (collectively, System IP) technology. Our System IP technology manages the on-chip communications and IP block deployments in System-on-Chip (SoC) semiconductors and systems of chiplets. Our leading proprietary System IP products achieve this by connecting client IP blocks such as processors, memories, artificial intelligence/machine learning (AI/ML) accelerators, graphics subsystems, safety and security, and other input/output subsystems (I/Os) via multiple Networks-on-Chips (NoCs) in order for our customers to experience faster SoC targeting, as well as, more efficient, and lower cost solutions. Growth for our solutions is being driven by growing SoC sophistication and associated complexity, now extending into disaggregation of SoCs into systems which implement the communication protocol aspects and partner with industry leading providers like Synopsys, Cadence, Alphawave and others to connect to their die-to-die interfaces. The addition of more processors, channels of memory access, machine learning sections, additional I/Os interface standards, and other subsystems within SoCs is driving the need for more advanced System IP, including NoC interconnect IP’s. The growth in the numbers of these connected on-chip subsystems places an increasing premium on the interconnect IP capability to move data inside complex SoCs. We believe this increase in SoC complexity has created a significant opportunity for sophisticated System IP products that incorporate NoC interconnect IP, SoC Integration Automation software (formerly IP deployment software) and NoC interface IP (consisting of peripheral data transport IP and control plane networks connected to NoC interconnect IPs). Moreover, our technology can also provide more cost-effective solutions and reduce the risks of building