Company: SNPS
Filing Date: 2025-05-28
Form Type: 10-Q
Source: 0000883241-25-000017
Chunk: 141

Company: SYNOPSYS INC
Filing Date: 2025-05-28
Form: 10-Q
Item: Item 8
Chunk 141
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SYNOPSYS, INC.

NOTES TO CONDENSED CONSOLIDATED FINANCIAL STATEMENTS

(Unaudited)

Note 1. Description of Business

Synopsys, Inc. (Synopsys, we, our or us) delivers trusted and comprehensive silicon to systems design solutions, from electronic design automation (EDA), including system verification and validation solutions, to silicon intellectual property (IP). We partner closely with semiconductor and systems customers across a wide range of industries to maximize their engineering and research and development capacity. We are catalyzing the era of pervasive intelligence, powering innovation today that ignites the ingenuity of tomorrow.We are a global leader in supplying the mission-critical EDA software that engineers use to design and test integrated circuits (ICs), also known as chips or silicon, and we are pioneering artificial intelligence (AI) driven chip design across the full-stack EDA suite to improve efficiency and accelerate the design, verification testing and manufacturing of advanced digital and analog chips. We provide software and hardware used to validate the electronic systems that incorporate chips and the software that runs on them, including cloud-based digital design flow to boost chip-design development productivity. We also provide technical services and support to help our customers develop advanced chips and electronic systems. These products and services are part of our Design Automation segment.We also offer a broad and comprehensive portfolio of semiconductor IP solutions, which are pre-designed circuits that engineers use as components of larger chip designs to reduce integration risk and speed time to market. Our high quality, silicon-proven semiconductor IP includes logic libraries, embedded memories, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate IP integration and silicon bring-up, our IP Accelerated initiative provides architecture design expertise, hardening, and signal and power integrity analysis. These products and services are part of our Design IP segment.

Note 2. Summary of Significant Accounting Policies and Basis of Presentation

We have prepared the accompanying condensed consolidated financial statements pursuant to the rules and regulations of the Securities and Exchange Commission (SEC). Pursuant to these rules and regulations, we have condensed or omitted certain information and footnote disclosures we normally include in our annual consolidated financial statements prepared in accordance with U.S. generally accepted accounting principles (U.S. GAAP). The condensed consolidated financial statements are unaudited but, in management’s opinion, we have made all adjustments (consisting only of normal, recurring adjustments, except as otherwise indicated) necessary for a fair presentation of our quarterly results. Our interim period operating