Company: SNPS
Filing Date: 2025-02-14
Form Type: DEF 14A
Source: 0000883241-25-000008
Chunk: 63

Company: SYNOPSYS INC
Filing Date: 2025-02-14
Form: DEF 14A
Chunk 63
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 digital twin solutions and saw adoption of our virtualization technology by nine of the top ten automotive OEMs.                                                                                                                                                                                                                                                                                                                                                        
 •We debuted the ZeBu EP2 unified emulation and prototyping system, providing the fastest emulation and prototyping platform for AI workloads, and the HAPS-100 12 system, our highest capacity and density FPGA-based prototyping system, for prototyping large  designs that require many FPGAs, such as multi-die systems and large SoCs.                                                                                                                                                          |     |                   |
|                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                      |     | Design IP         |
| Our Design IP segment offers a broad and comprehensive portfolio of semiconductor IP solutions that engineers use as components of larger chip designs to reduce integration risk and speed time to market. We also provide architecture design expertise, including signal and power integrity analysis and IP hardening, to accelerate IP integration and silicon bring-up.                                                                                                                        
 •Design IP achieved fiscal 2024 revenue of $1.91 billion, up 23.6% year-over-year, with an adjusted operating margin of 38.3%.                                                                                                                                                                                                                                                                                                                                                                       
 •We have the #2 market share in Design IP, and our market-leading IP portfolio, by far the broadest in the industry with prominent positions in key blocks, continues to grow in AI accelerators (NPUs) and DSPs.                                                                                                                                                                                                                                                                                    
 •Our Design IP is enabled on advanced technology processes at the world's top semiconductor foundries.                                                                                                                                                                                                                                                                                                                                                                                               
 •We achieved certification of Synopsys IP on Samsung Foundry's advanced SF2 GAA process.                                                                                                                                                                                                                                                                                                                                                                                                             
 •We announced the industry's first complete UCIe IP solution operating at up to 40 Gbps per pin to address the increased compute performance requirements of the world's fastest AI data centers.                                                                                                                                                                                                                                                                                                    
 •We achieved the industry's first PCIe 7.0 IP solution for hyperscale AI data center infrastructure.                                                                                                                                                                                                                                                                                                                                                                                                 |     |                   |

(1) Adjusted operating margin for each segment was determined consistent with ASC 280, Segment Reporting. Appendix C includes a reconciliation of items that apply for a particular segment.

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| PROPOSAL 4 — Advisory Vote to Approve Executive Compensation |

Our Compensation Philosophy

We have designed our executive compensation program to attract, motivate and retain a team of highly qualified executives who will drive our success. To motivate and reward our NEOs to focus on our long-term business performance and increase long-term stockholder value, we have set out the following objectives:

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