Company: AMKR
Filing Date: 2025-02-21
Form Type: 10-K
Source: 0001047127-25-000030
Chunk: 10

Company: AMKOR TECHNOLOGY, INC.
Filing Date: 2025-02-21
Form: 10-K
Item: Item 1
Chunk 10
---
 the circuit board.  We offer a wide range of lead counts and body sizes to satisfy variations in the size of customers’ semiconductor devices.

Through a process of continuous engineering and customization, we have designed several leadframe package types that are thinner and smaller than traditional leadframe packages and can accommodate more leads on the perimeter of the package.  These leadframe packages typically have superior thermal and electrical characteristics, which allow them to dissipate heat generated by high-powered semiconductor devices while providing enhanced electrical connectivity.  We are developing increasingly smaller versions of these packages to keep pace with continually shrinking semiconductor device sizes and demand for miniaturization of portable electronic products.  One of our more successful leadframe package offerings is the MicroLeadFrame family of quad flat no lead packages.  These packages offer cost effective, miniaturized solutions for multiple analog power and signal chain applications. 

9

Power discrete devices use a leadframe as the package carrier and primarily use wirebond interconnect technology.  However, power applications that require improved thermal and electrical performance will use packaging with copper clip interconnect technology that creates multi die power modules with wafers from silicon carbide and other wide band gap materials.

Substrate-based Wirebond Packages:  Substrate-based wirebond packages use wirebond technology to connect a die to a substrate.  Some of our packages in this category include stacked CSP, wirebond ball grid array packages and plastic ball grid array (“PBGA”) packages.

Stacked CSP technology enables the stacking of a wide range of different semiconductor devices to deliver high levels of silicon integration and area efficiency.  Stacked CSP utilizes high density thin core substrates and advanced materials, along with leading-edge wafer thinning, die attach and molding capabilities, to stack multiple die on a substrate.  Stacked CSP is ideal for memory and mixed signal applications.

Wirebond ball grid array packages offer a broad selection of ball array pitches, ball counts and body sizes, single and multi-die layouts, stacked die and passive component integration together with thermal management solutions.  They are applicable for a wide range of semiconductors requiring a smaller package size than conventional PBGAs or leadframe packages.

PBGA packages are used in applications requiring higher pin count than leadframe packages, but typically have lower pin counts than flip chip.  PBGA packages are designed for low inductance, improved thermal operation and enhanced surface-mount technology ability.  Custom performance enhancements, like ground and power planes, are also available.

Micro-Electro-Mechanical Systems Packages:  MEM