Company: TSEM
Filing Date: 2025-04-30
Form Type: 20-F
Source: 0001178913-25-001537
Chunk: 69

Company: TOWER SEMICONDUCTOR LTD
Filing Date: 2025-04-30
Form: 20-F
Item: Item 3
Chunk 69
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 DEVELOPMENT, PATENTS AND LICENSES,
ETC.

Our research and development activities are related primarily to
our foundry process by way of improvements, upgrades and development, and have been sponsored and funded by us, with some participation
by the Israeli government through the IIA pursuant to the Innovation Law. Our research and development expenses for the years ended December
31, 2024, 2023 and 2022 were $79.4 million, $79.8 million and $83.9 million, respectively, net of government participation of $0.3 million,
$0.5 million and $0.3 million, respectively.

For a description of our research and development policies and
our patents and licenses, see “ Item 4. Information on the Company - B. Business Overview.”

D. TREND INFORMATION

We operate as a specialty foundry in the semiconductor industry.
The semiconductor industry is historically characterized as highly cyclical, both seasonally and over the long term. Over time, the market
fluctuates, cycling through periods of weak demand, production excess capacity, excess inventory and price pressure, and periods of strong
demand, full capacity utilization, and product shortages, commanding higher selling prices.

There is a trend within the semiconductor industry toward ever-smaller
features and growing wafer sizes. State-of-the-art digital fabs are currently supporting process geometries of down to 3-7 nanometers
on 300mm wafers. As demand for smaller geometries increases, there is downward pressure on the pricing of larger geometry products, and
potential underutilization of fabs that are limited to these larger geometry products, which may result in reduced profitability of those
associated fabs. However, our strategy to focus on differentiated specialty analog technologies, along with our deep applications knowledge,
design enablement tools and customer technical support, enable a portion of our wafers to be charged at higher wafer selling prices as
compared to “commoditized” standard products. We currently offer process geometries of (i) 0.18, 0.16, and 0.13 -micron on
200-mm wafers; and (ii) 65 nanometer on 300-mm wafers. We continue to invest in our portfolio of specialty process technologies and intellectual
property (IP) to address the key product and system requirements of our customers, enabling them to compete in their respective markets.

Another key element of our strategy is to target multiple large,
growing and