Semantic-FPN (ONNX) – Renesas X5H

Introduction

This repository hosts Semantic FPN (Panoptic-FPN's segmentation branch) with a ResNet50 backbone, targeting the Renesas R-Car X5H platform for semantic segmentation inference on the NPX6 NPU.

Note: This is an FPN-decode-head segmentation model, distinct from the FCN-decode-head Cityscapes repos already in this catalog (FCN-R50-Cityscapes-ONNX, FCN-R18-Cityscapes-ONNX, etc.) — same dataset/resolution family (Cityscapes, 512×1024), but a different decode-head architecture (FPN vs. FCN).

Model Architecture: Semantic FPN — Panoptic-FPN's segmentation branch, ResNet50 backbone with an FPN decode head
Source Model: OpenMMLab config family configs/sem_fpn (Cityscapes 512×1024 ResNet50 config) (no HuggingFace mirror; see model.source in .metadata.yaml)
Task: Semantic Segmentation (Cityscapes, 19 classes)
Input Resolution: 512 × 1024
Parameters: not published — count them from the ONNX graph (sum(numpy_helper.to_array(t).size for t in model.graph.initializer))

Deployment Flow

The FP32 ONNX model is auto-cast to INT8 by the Renesas MWMX toolchain at compile time — no separate quantization step is required.

semantic_fpn_r50_optimized.onnx (FP32)
        │
        └─▶  MWMX Runtime  ──▶  INT8 auto-cast  ──▶  NPX6 NPU

Provided Artifacts

Artifact	Status	Notes
FP32 (ONNX)	✅	`fp32/fpn_r50_4xb2-80k_cityscapes-512x1024.onnx` — FP32 ONNX export

Performance

Measured on Renesas R-Car X5H via the MWMX runtime (APM50 ship-performance CI pipeline).

Benchmark configuration: Single NPU · Batch size: 1 · Input: 3 × 512 × 1024

The 12-AI-core slice was not measured in this run (source CSV slice 12 = Skipped).

Runtime	Precision	Device	Latency (ms)	Type
MWMX Runtime	INT8 (auto)	X5H · 1× NPU · 1 Core · 850 MHz	57.754332	Measured

Accuracy

TBD — not yet measured/published for this repo.

Runtime Details

MWMX Runtime

Engine: Renesas MWMX (Middleware MX) native inference runtime
Input format: FP32 ONNX (compiled by the MWMX toolchain)
NPU execution precision: INT8 (auto-cast by MWMX toolchain)
Execution target: NPX6-48K NPU on R-Car X5H

Prerequisites

To run inference on Renesas R-Car X5H, you need:

Renesas R-Car X5H board with NPX6 NPU
Renesas MWMX Runtime
Hugging Face CLI to download the model

Download

hf download Renesas/Semantic-FPN-ONNX --repo-type=model --include "fp32/*"

Benchmark Methodology

HIL runs: Hardware-in-the-loop — measured on physical R-Car X5H silicon via the MWMX runtime (metawaremx_runtime CI pipeline, "APM50" ship-performance target)
Precision: FP32 ONNX input; INT8 execution (auto-cast by MWMX)
Slices: only the 1 AI-core slice is available; the 12-core slice was Skipped in the source APM50 CI run for this model

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