DDRNet-23-Slim INT8
DDRNet-23-Slim semantic segmentation optimized using static INT8 post-training quantization (PTQ) with symmetric per-channel weight and per-tensor activation quantization, then exported as an ExecuTorch .pte model for Arm-based Edge Linux systems.
Summary
This repository contains an Arm-optimized version of DDRNet-23-Slim for semantic segmentation. The model is provided in ExecuTorch .pte (ExecuTorch runtime), targeting Edge Linux systems.
This version demonstrates efficient inference on Arm-based platforms while preserving the original model's intended behavior. Arm evaluated this model on CamVid and measured performance on a representative evaluation target.
Key results
| Area | Result |
|---|---|
| Model format | ExecuTorch .pte |
| Target device class | Edge Linux |
| Reference device | Raspberry Pi 5 (Cortex-A76, Linux, Raspberry Pi OS 64-bit, based on Debian 13 "Trixie") |
| Primary performance result | 222.53 ms p50 latency (4.49 FPS, 1 thread) |
| Accuracy result | mIoU 74.52% |
| Size / memory result | 5.64 MB (.pte), 3.86x smaller than FP32 |
Original model
| Field | Value |
|---|---|
| Original model | ddrnet23_slim |
| Original source | GitHub |
| Original developer | DDRNet (Yuhui Hong et al.) |
| Original model card | DDRNet GitHub repository |
| Original license | MIT |
Model files
| File | Description |
|---|---|
ddrnet23_slim_raspberry_executorch_optimized.pte |
Arm-optimized INT8 model for deployment |
example.py |
Minimal inference example |
pyproject.toml |
Pinned runtime dependencies and deployment metadata |
uv.lock |
Locked dependency versions, sources, and hashes for uv sync --frozen |
config.yaml |
Model I/O contract used by the example |
benchmarks/ |
FP32 baseline and Arm-optimized benchmark records |
Performance
Performance was measured on the reference configuration below. Results are intended to make the optimization reproducible but do not guarantee identical performance on every Arm-based system.
Reference configuration
| Field | Value |
|---|---|
| Device / platform | Raspberry Pi 5 |
| CPU / accelerator | Cortex-A76 (4 cores @ 2.4 GHz), CPU |
| OS | Linux — Raspberry Pi OS 64-bit, based on Debian 13 "Trixie" |
| Runtime | ExecuTorch 1.1.0 |
| Backend / delegate | XNNPACK + KleidiAI |
| Batch size | 1 |
| Precision | INT8 (PTQ-static, symmetric, per-channel weights, per-tensor activations) |
| Runs | 1 thread, 10 warmup + 100 measured |
Performance results
| Metric | Original / baseline | Arm-optimized | Improvement |
|---|---|---|---|
| p50 latency | 742.92 ms | 222.53 ms | 3.34x |
| p90 latency | 743.45 ms | 222.71 ms | 3.34x |
| p99 latency | 757.60 ms | 226.12 ms | 3.35x |
| Throughput (FPS) | 1.35 | 4.49 | 3.33x |
| Model size | 21.80 MB | 5.64 MB | 3.86x smaller |
| Peak memory | 196.33 MB | 93.05 MB | 2.11x less |
Accuracy
Accuracy was evaluated using the same preprocessing, input resolution, and evaluation protocol described below. Where possible, the optimized model is compared against the original model under the same evaluation conditions.
Evaluation setup
| Field | Value |
|---|---|
| Dataset | CamVid |
| Split | Test |
| Number of samples | 233 |
| Metric(s) | mean Intersection-over-Union (mIoU) |
| Evaluation runtime | ExecuTorch |
Accuracy results
| Metric | Original / baseline | Arm-optimized | Change |
|---|---|---|---|
| mIoU | 74.68% | 74.52% | -0.16 pp |
Accuracy was measured using the evaluation setup described above. Users should re-evaluate the model on their own data before production use.
Arm optimization approach
Arm optimized this model for efficient inference on Arm-based platforms using a hardware-aware conversion and validation flow.
For this release, Arm used:
| Optimization area | Applied? | Notes |
|---|---|---|
| Model conversion | Yes | Converted to ExecuTorch .pte |
| Quantization | Yes | Static INT8 PTQ for weights and activations, symmetric, with per-channel weights and per-tensor activations (XNNPACKQuantizer); calibrated on all 468 CamVid train+val images |
| Runtime/backend selection | Yes | XNNPACK + KleidiAI delegate |
| Graph/runtime compatibility updates | No | Full-model INT8 quantization; no layers are excluded from quantization or require graph surgery |
| Accuracy validation | Yes | Compared against the FP32 baseline |
| Performance validation | Yes | Measured on Raspberry Pi 5 |
The goal of this process is to improve deployment characteristics such as latency, memory use, model size, and runtime compatibility while preserving the model's intended behavior. Detailed conversion scripts, calibration configuration, or backend-specific implementation details may be provided separately where appropriate.
Using this model
Install dependencies
uv python install
uv sync --frozen
Run the example
uv run example.py
This writes sample_output.png next to example.py. Pass --output to use a
different path and --json to also write the per-class statistics:
uv run example.py --output result.png --json result.json
The example preserves the aspect ratio of non-960x720 images by resizing and
center-cropping them. Use --resize-mode strict with an already prepared
960x720 image to reproduce the evaluation input contract exactly. Horizontal-
flip test-time augmentation is enabled by default and averages two inference
passes. Disable it to reproduce single-pass behavior and latency:
uv run example.py --no-flip-tta --output result-single-pass.png
Expected input
| Property | Value |
|---|---|
| Input shape | [1, 3, 720, 960] |
| Input type | float32 |
| Input range | Approximately [-128, 127] after preprocessing |
| Preprocessing | The evaluated pipeline requires RGB images already at 960x720 (WxH); convert to float32 in [0.0, 1.0] (divide by 255), rescale to [0, 255], subtract 128 from every channel, and arrange as contiguous NCHW [1, 3, 720, 960]. The bundled example resizes and center-crops other inputs as a convenience, preserving their aspect ratio. |
Expected output
| Property | Value |
|---|---|
| Output shape | [1, 11, 90, 120] raw logits; [1, 11, 720, 960] after upsampling |
| Output type | Per-pixel class logits (NCHW) at 1/8 input resolution, bilinearly upsampled with align_corners=False to input resolution |
| Postprocessing | Bilinearly interpolate logits to (720, 960) if not already at that resolution; argmax over the class dimension (dim=1) to obtain a predicted class map of shape [1, 720, 960]; 11 classes: Sky, Building, Pole, Road, Sidewalk, Tree, SignSymbol, Fence, Car, Pedestrian, Bicyclist |
Intended use
This model is intended for developers evaluating image-segmentation workloads on Arm-based platforms. It is suitable as a reference implementation for benchmarking, prototyping, and integration exploration.
Limitations
- Performance depends on the target device, runtime version, backend/delegate support, memory configuration, and system load.
- Accuracy was evaluated on CamVid (233 samples) and may not generalize to all domains.
- This release preserves the original model's intended task and behavior, but users should validate it for their own application, data, and deployment environment.
- This repository is not a replacement for the original model documentation.
Additional notes
- Sample input:
sample_input.jpgis derived from Richmond Skyline by JuxtaposedJacob, via Wikimedia Commons (CC0 1.0).
About this version
Original Model: ddrnet23_slim by DDRNet (Yuhui Hong et al.) - Repository
Optimization/conversion: Arm-Optimized version for execution on Arm-based platforms.
Converted/optimized by: Arm
License: The Original Model and the Optimized Model are subject to MIT.
This repository contains a converted or optimized version of the Original Model (the “Optimized Model”). The Original Model has been converted or optimized as described above for execution on Arm-based platforms.
No retraining or fine-tuning of the Original Model was performed as part of the conversion or optimization. The conversion or optimization was not intended to change the Original Model’s behavior or intended use.
Original Model and Documentation
For information about the Original Model, including its development, training data, intended uses, limitations and other relevant information, please refer to the Original Model repository. Information in that repository was provided by the original developer or other third parties and, unless expressly stated otherwise, has not been independently verified by Arm.
Licenses and Third-Party Terms
Use of the Original Model and the Optimized Model is subject to the applicable licenses, usage restrictions and other terms identified above and in the relevant repositories. Publication of the Optimized Model does not grant any rights beyond those provided under the applicable license terms.
You are responsible for reviewing those terms and ensuring that your use of the Original Model and the Optimized Model is permitted.
Purpose of this Release
The Optimized Model is provided as a reference implementation to demonstrate and evaluate execution and performance on Arm-based systems. It is not a production-ready or supported solution.
Arm’s publication of the Optimized Model does not constitute an endorsement or certification of the Original Model or a representation that the Optimized Model is suitable for production use or any particular purpose.
To the fullest extent permitted by applicable law (i) the Optimized Model is provided “as is.” Arm makes no representations or warranties that the Original Model, the Optimized Model or their outputs are accurate, safe, secure, non-infringing, legally compliant, suitable for production use or fit for any particular purpose; and (ii) Arm will not be liable for any loss or damage arising from or in connection with the Optimized Model, its use or its outputs.
You are responsible for independently evaluating the Optimized Model, its outputs and its suitability for your intended use, including compliance with applicable legal, regulatory, safety and security requirements.
Arm does not commit to provide ongoing support, maintenance or updates for the Optimized Model. Any use of or reliance on the Optimized Model or its outputs is at your own risk.
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