Document ID: chunk:federal_register_of_legislation:F2024L01024:front:0:p153
Version: federal_register_of_legislation:F2024L01024
Segment Type: other
Provision Reference: 
Character Range: 446088–448991

kV; and
          b. Inductance of less than 20 nH.
3. A. 901 Complementary Metal Oxide Semiconductor (CMOS) integrated circuits, not specified by 3A001.a.2., designed to operate at an ambient temperature equal to or less (better) than 4.5 K (-268.65 °C).
Technical Note:
           1. For the purposes of 3A901., CMOS integrated circuits are also referred to as cryogenic CMOS or cryoCMOS integrated circuits.
3. B.  Test, Inspection and Production Equipment
3. B. 001. Equipment for the manufacturing of semiconductor devices or materials, as follows and specially designed components and accessories therefor:
3. B. 001. a. Equipment designed for epitaxial growth as follows:
1. Equipment designed or modified to produce a layer of any material other than silicon with a thickness uniform to less than ± 2.5% across a distance of 75 mm or more;
Note: 3B001.a.1. includes Atomic Layer Epitaxy (ALE) equipment.
2. Metal Organic Chemical Vapour Deposition (MOCVD) reactors designed for compound semiconductor epitaxial growth of material having two or more of the following elements: aluminium, gallium, indium, arsenic, phosphorus, antimony, or nitrogen;
3. Molecular beam epitaxial growth equipment using gas or solid sources;
3. B. 001. b. Equipment designed for ion implantation and having any of the following:
1. Not used;
2. Being designed and optimised to operate at a beam energy of 20 keV or more and a beam current of 10 mA or more for hydrogen, deuterium or helium implant;
3. Direct write capability;
4. A beam energy of 65 keV or more and a beam current of 45 mA or more for high energy oxygen implant into a heated semiconductor material "substrate"; or
5. Being designed and optimized to operate at a beam energy of 20 keV or more and a beam current of 10 mA or more for silicon implant into a semiconductor material "substrate" heated to 600°C or greater;
3. B. 001. c. Not used;
3. B. 001. d. Not used;
3. B. 001. e. Automatic loading multi‑chamber central wafer handling systems having all of the following:
1. Interfaces for wafer input and output, to which more than two functionally different 'semiconductor process tools' specified by 3B001.a.1., 3B001.a.2., 3B001.a.3. or 3B001.b. are designed to be connected; and
2. Designed to form an integrated system in a vacuum environment for 'sequential multiple wafer processing';
Note: 3B001.e. does not apply to automatic robotic wafer handling systems specially designed for parallel wafer processing.
Technical Notes:
              1. For the purposes of 3B001.e.1., 'semiconductor process tools' refers to modular tools that provide physical processes for semiconductor production that are functionally different, such as deposition, implant or thermal processing.
              2. For the purposes of 3B001.e.2., 'sequential multiple wafer processing' means the capability to process each wafer in different 'semiconductor process