bitserial-modmul-v7 (tier 9, L=1024)

Submission for the SAIR Modular Arithmetic Challenge. One shared, p-conditioned recurrent cell in a fixed bit-serial Horner loop computes (a * b) mod p; the cell learns the per-step transition s' = (2s + dx) mod p and the loop only sequences bits. entry_class model.BitSerialReducer, output_base 2, ~471K params, L=1024 (warm-started from the L=512 cell).

Local evaluation (official open-source scorer, run locally; not the organizers' leaderboard)

• modchallenge evaluate (full 1100, public/default seed, A100-class hardware): tiers 1-9 = 1.00, highest tier 9, overall 0.902, wall-clock 139s (inside the 300s budget on this hardware; the organizers' sandbox may be slower).
• Randomising the weights collapses every solved tier to 0.00 (capability is in the trained parameters).

Limitation (honest)

Not exact. The per-step map is exact on random states and exhaustively on primes < 64, but a sparse set of structured-trajectory inputs (powers-of-two-times-random) still fails at large primes, reproducing the Neural GPU limitation (Price, Zaremba, Sutskever 2016). The benchmark tiers reflect average-case accuracy on the official scorer's random-operand distribution, not worst-case exactness. Not organizer-verified; compliance ruling on the loop scaffold pending.