Patent Number: 046613102
Section: claims

1. A protection system for process apparatus comprising: a plurality of sensor means for generating signals representative of the state of a plurality of selected process parameters;  clock means for generating a repetitive pulse signal;  logic means having core means of rectangular hysteresis loop magnetic material and having input winding means, output winding means and control winding means all wound on the core means, said logic means including means for applying pulses from the clock means to the input winding means and having means connecting said sensor means to the control winding means such that with each of the parameters monitored by said sensors in a selected range, the pulses applied to the input winding means appear at the output winding means and no pulses appear at the output winding means when one of the parameters monitored is outside its selected range;  output means connected to the output winding means of the logic means and operative to generate a first output in response to receipt of a pulse signal and to generate a second output indicative of a monitored parameter being out of its selected range when no pulse signal is received by the output means; and  global bypass means connected between the output winding means of the logic means and the output means and to said clock means and operative in a bypass condition to apply pulses received from the clock means to the output means while blocking pulses from the output winding means of the logic means to the output means and operative in an unbypassed condition to block the application of pulses received from the clock means to the output means while permitting the passage of pulses from the output winding means of the logic means to the output means.  a plurality of logic units each comprising a single core of a rectangular hysteresis loop magnetic material having a single magnetic flux path, an input winding, and an output winding only in addition to a control winding all wound on said core such that with a d-c current applied to the control winding of sufficient magnitude to saturate the core in one direction, pulses applied to the input winding which are of sufficient magnitude to saturate the core in the opposite direction, generate pulses on the output winding while the absence of current thorugh the control winding results in the core remaining saturated in said opposite direction to block pulses applied to the input winding from appearing on the output winding, said logic unit including means for applying a d-c power source to one side of the control winding;  means connecting said plurality of logic units in series to form a train of logic units with the input winding of each successive logic unit connected to the output winding of the preceding unit;  clock means for applying a repetitive pulse signal to the input winding of the first logic unit;  a plurality of sensor means each of which monitors a given process parameter and generates a sensor signal having a first condition when the parameter is within a selected range and a second trip condition when the parameter is out of the selected range;  a plurality of local bypass means selectively operative to generate a local bypass signal having a first bypass condition and a second not bypassed condition;  switch means connected to the second side of the control winding on each of said logic units and to a sensor means and a local bypass means and operative to a closed position in response to a signal in the first condition from either the associated sensor means or the local bypass means to complete a circuit between the control winding and the d-c power source so that current flows through the associated control winding to permit pulses applied to the input winding to appear at the output winding of the logic unit and said switch means being operative in response to a signal in the second condition from both the sensor means and the local bypass means to an open position which deenergizes the control winding to block the passage of pulses from the input to the output winding of the logic unit; and  output means connected between the output winding of said last logic unit in the series and the reactor trip switchgear and operative to prevent a trip of the switchgear so long as the output means receives pulses and to trip the switch gear in the absence of pulses, whereby when any one of the monitored process parameters is out of its selected range, the pulse signal is interrupted to trip the trip switchgear unless the local bypass signal is generated to effect a bypass of the affected sensor means.  a logic switch including a single core of rectangular hysteresis loop magnetic material having a single magnetic flux path and an input winding, and an output winding only in addition to a control winding all wound on said core such that with a d-c current applied to the control winding of sufficient magnitude to saturate the core in one direction, pulses applied to the input winding which are of sufficient magnitude to saturate the core in one direction, pulses applied to the input winding which are of sufficient magnitude to saturate the core in the opposite direction, generate pulses on the output winding while the absence of current through the control winding results in the core remaining saturated in said opposite direction to block pulses applied to the input winding from appearing on the output winding;  pulse discriminator-shaper means connected to the output winding of the logic switch means to form the output of the modular logic unit and responsive only to pulses from the output winding generated by a change in flux in the magnetic core form saturation in either direction to saturation in the other direction and which shapes the pulses appearing on the output winding into pulses having a duration and shape similar to that of the pulse applied to the input winding of said logic switch means; and  a control circuit for the control winding of said logic switch, including a d-c current source connected to one side of said control winding , and a plurality of leads each connected to the other side of the control winding, and each having therein a control switch , such that with any one of said control switches in the current sinking state a circuit is completed for energization of the control winding and pulses applied to the input coil of said switch will generate pulses of similar duration and shape at the output of said logic unit, but no pulses appear at the output of said logic unit when all of said control switches are in the current blocking state. 2. The protection system of claim 1 wherein said logic means, said global bypass means and said output means comprise a channel, wherein said plurality of sensor means include redundant sensors for each monitored parameter forming a set of sensor means, and wherein a plurality of channels are provided with one sensor means from each set connected to the control winding means of one of said channels. 3. The protection system of claim 2 wherein said global bypass means in each channel includes means responsive to another global bypass means associated with another channel which is already in a bypass condition for block in the application of pulses both from the clock means and the output winding means of the associated logic means to the associated output means when said bypass means is operated to the bypass condition. 4. The protection system of claim 3 wherein said means connecting the sensor means to the control winding means of said logic means in each channel include local bypass means associated with each sensor means which permit the pulses applied to the input winding means of the logic means to pass to the output winding means even though the parameter monitored by the sensor means is outside the selected range. 5. The protection system of claim 4 wherein each said logic means comprises a series of logic units each of which comprises a core of rectangular hysteresis loop material wound with an input winding, an output winding and a control winding with the input winding of each successive logic unit connected to the output winding of the preceding logic unit, said means connecting the sensor means to the control winding means comprising means which connect each sensor means to the control winding on one of said logic units such that when the associated parameter is within the selected range, pulses applied to the input of the logic unit appear at the output winding and when the monitored parameter is out of the selected range, no pulses appear at the output winding, and said local bypass means including means associated with each of said logic units which permit pulses applied to the input winding to appear at the output winding even though the parameter monitored by the associated sensor means is out of the selected range. 6. The protection system of claim 5 wherein said global bypass means for each channel includes a first logic unit connected between the clock means and the output means, a second said logic unit connected between the output winding of the last logic unit in said series and said output means and means connected to the control winding of said first and second logic unit to the output means and to block the flow of pulses through said second logic unit from said series of logic units to said output means, and to condition said first and second logic units to the unbypassed condition to block the flow of pulses from the clock through the first logic unit and to permit the flow of pulses through the second logic unit from said series of logic units to the output means. 7. The protection system of claim 6 wherein said global bypass means for each channel includes a third logic unit connected in series with said first logic unit and wherein said means responsive to another global bypass means associated with another channel which is already in a bypass condition is connected to the control winding of said third logic unit to block the flow of clock pulses to the output means when said first and second logic units are conditioned to the bypass condition. 8. Apparatus for selectively energizing the undervoltage coils on the trip switchgear of a nuclear power plant, said apparatus comprising: 9. The apparatus of claim 8 wherein each logic unit includes pulse discriminator-shaper means connected to the output winding to form the output of the logic unit and which is responsive only to pulses generated by a change influx in the magnetic core from saturation in either direction to saturation in the other direction and which shapes said pulses into a pulse having a magnitude, duration and shape similar to that of the pulse applied to the input winding of the logic unit, such that a pulse signal similar to that applied by the clock means to the input winding of the first logic unit is propagated through the series of logic units. 10. The apparatus of claim 9 wherein the output means includes dc-to-dc power converter means which converts the applied pulse signal to a dc output signal of sufficient magnitude to energize the undervoltage coils of reactor trip switchgear to preclude a trip and which deenergizes the undervoltage coils to trip the reactor trip switchgear in the absence of an applied pulse signal. 11. The apparatus of claim 10 wherein the dc-to-dc power converter means includes a buck boost derived, flyback dc-to-dc power converter. 12. The apparatus of claim 10 including global bypass means comprising a first additional logic unit connected between said clock means and the output means in parallel with said train of logic units, and global bypass control means including switch means connected to the second side of the control winding of said first additional logic unit which switch is normally open to block the flow of pulses through the first additional logic unit but which closes in response to a global bypass signal to energize said control winding so that clock pulses applied to the input winding are passed through to said output means, said global bypass control means also including means which at the same time blocks the flow of pulses from the output of said train of logic units to the output means so that all of the logic units in said train are bypassed. 13. The apparatus of claim 12 wherein said global bypass control means includes a second additional logic unit connected between the output of said train of logic units and the output means, and interlocking means which ensure that the control winding of only one of said first and second additional logic units is energized at any time. 14. The apparatus of claim 13 wherein the switch means on the second side of the control winding on the first additional logic unit connects the second side of the winding to ground when the switch is closed to complete an energizing circuit for the coil and permit clock pulses to pass through the first additional logic unit to the output means, and wherein the interlock means includes an electrical lead connected between the first side of the control coil on the second additional logic unit and the secon side of said control winding on the first additional logic unit such taht when said switch on the first additional logic unit is closed to energize the control winding on the first additional logic unit, the control winding on the second additional logic unit is shorted out to block the flow of pulses from the output of the channel of logic units to the output means. 15. The apparatus of claim 14 wherein said train of logic units, said switch means, said local bypass means, said global bypass means and said output means form a channel, wherein said plurality of sensor means includes redundant sensor means for each monitored parameter forming a set of sensor means, and wherein a plurality of channels are provided withone sensor means from each set connected to the switch means for the control winding on a logic unit in one of said channels. 16. The apparatus of claim 15 wherein said global bypass means in each channel includes a third additional logic unit between said clock means and the first additional logic unit, each said channel also including computing means responsive to the condition of the global bypass means in the other channels for controlling the switch means controlling the flow of current in the control winding of said third additional logic unit, said computing means normally holding said switch closed so that pulses from the clock pass through the third additional logic unit to the first additional logic unit but opening said switch when the global bypass means of a selected number of other channels are already in a bypass condition. 17. The apparatus of claim 16 wherein said computing means in each channel is responsive to the condition of the sensor signals and bypass signals from each of the other channels and is operative to generate a trip enable signal having an enable condition and a disable condition for each of the logic units in the train based thereon, and wherein said switch means associated with the control winding in each logic unit in the train is responsive to the trip enable signal to deenergize the associated control winding when the sensor signal is in the second trip condition and the trip enable signal is in the enable condition and to keep the control winding energized despite the partial trip condition of the sensor signal when the trip enable signal is not in the enable condition. 18. The apparatus of claim 17 wherein said switch means associated with the control winding in each logic unit comprises a sensor switch which is controlled by the sensor signal and is closed when the sensor signal is in the first condition and open when it is in the second trip condition, a local bypass switch which is controlled by the local bypass signal and is closed when the local bypass signal is in the first bypass condition and closed when it is in the second unbypassed condition, and a trip enable switch which is controlled by the trip enable signal and is open when the trip enable signal is in the enable conditionand is closed when it is not in the enable condition, said switches being in parallel such that the control winding of the logic unit is energized when any of said switches is closed. 19. A modular logic unit for use with control switches having current sinking and current blocking states, said unit comprising: 20. The modular logic unit of claim 19 including an additional lead connected between said current source and said one side of said control winding of the logic switch and to which an additional control switch is connected such that with said additional control switch in the current sinking state current from the current source is diverted through said addtional lead instead of through said control winding whereby said additional lead serves as an inverter input for said modular logic unit. 21. The modular logic unit of claim 20 including a diode connected in said additional lead such that current can only flow toward said additional control switch, said combination including another lead connected to said other side of the control winding of the logic switch and to a ground and having a zener diode connected therein for holding the second side of said control winding at a higher potential than the first side thereof to assure that current does not flow through the control winding when the additional control switch is in the current sinking state.