Patent Number: 
Section: claims

1. A method for forming shallow junctions, the method comprising the steps of:generating an ion beam comprising molecular ions based on ZnCxFy, wherein Z represents one or more atomic species other than carbon or hydrogen; andcausing the ion beam to impact a semiconductor wafer. 2. The method according to claim 1, wherein the impact of the ion beam causes at least one portion of the semiconductor wafer to be amorphized prior to ion implantation of dopants into the semiconductor wafer. 3. The method according to claim 2, wherein the impact of the ion beam further causes one or more co-implant species selected from a group consisting of carbon and fluorine to be placed in one or more predetermined locations in the semiconductor wafer. 4. The method according to claim 2, further comprising:performing a low-temperature ion implantation on the semiconductor wafer to incorporate dopants into the amorphized portion of the semiconductor wafer. 5. The method according to claim 1, wherein the impact of the ion beam causes one or more co-implant species to be placed into the semiconductor wafer. 6. The method according to claim 5, wherein the one or more co-implant species are selected from a group consisting of carbon and fluorine. 7. The method according to claim 6, wherein the one or more co-implant species are placed in an end-of range area within the semiconductor wafer. 8. The method according to claim 1, wherein, during the impact of the ion beam, the semiconductor wafer is in a temperature range substantially lower than room temperature. 9. A method for forming shallow junctions, the method comprising the steps of:generating an ion beam comprising molecular ions based on one or more materials selected from a group consisting of: germanium nitride (Ge3N4) and germanium-fluorine compounds (GeFn, wherein n=1, 2, or 3); andcausing the ion beam to impact a semiconductor wafer. 10. The method according to claim 1, wherein the impact of the ion beam causes at least one portion of the semiconductor wafer to be amorphized prior to ion implantation of dopants into the semiconductor wafer. 11. The method according to claim 1, further comprising:performing a first ion implantation on the semiconductor wafer to incorporate dopants into the semiconductor wafer; andperforming a second ion implantation on the semiconductor wafer to place one or more co-implant species in the semiconductor wafer, the one or more co-implant species being implanted with molecular ions based on one or more materials selected from a group consisting of CF, CF2, ZnCxFy, and CxHyZn, wherein Z represents one or more atomic species other than carbon or hydrogen. 12. The method according to claim 1, further comprising:performing a first ion implantation on the semiconductor wafer to place one or more co-implant species in the semiconductor wafer, the one or more co-implant species being implanted with molecular ions based on one or more materials selected from a group consisting of CF, CF2, ZnCxFy, and CxHyZn, wherein Z represents one or more atomic species other than carbon or hydrogen; andperforming a second ion implantation on the semiconductor wafer to incorporate dopants into the semiconductor wafer. 13. The method according to claim 1, further comprising:performing ion implantation on the semiconductor wafer to incorporate dopants into the semiconductor wafer, wherein, at least at the beginning of the ion implantation, a temperature of the semiconductor wafer is substantially lower than room temperature. 14. The method according to claim 13, wherein the temperature of the semiconductor wafer is lower than zero degree Celsius. 15. The method according to claim 13, wherein the temperature of the semiconductor wafer is pre-chilled to a desired temperature prior to the ion implantation. 16. The method according to claim 13, wherein the semiconductor wafer is maintained in a desired temperature range during at least a portion of the ion implantation. 17. The method according to claim 1, wherein, during the impact of the ion beam, the semiconductor wafer is in a temperature range substantially lower than room temperature. 18. An apparatus for forming shallow junctions, the apparatus comprising:an ion source assembly to generate an ion beam comprising molecular ions based on one or more materials selected from a group consisting of: germanium nitride (Ge3N4) and germanium-fluorine compounds (GeFn, wherein n=1, 2, or 3); andone or more components to cause the ion beam to impact a semiconductor wafer. 19. The apparatus according to claim 18, wherein the impact of the ion beam causes at least one portion of the semiconductor wafer to be amorphized prior to ion implantation of dopants into the semiconductor wafer. 20. The apparatus according to claim 18, being further configured to maintain the semiconductor wafer in a temperature range substantially lower than room temperature during the impact of the ion beam. 21. The apparatus according to claim 18, being further configured to perform a low-temperature ion implantation on the semiconductor wafer to incorporate dopants into an amorphized portion of the semiconductor wafer. 22. An apparatus for forming shallow junctions, the apparatus comprising:an ion source assembly to generate an ion beam comprising molecular ions based on ZnCxFy, wherein Z represents one or more atomic species other than carbon or hydrogen; andone or more components to cause the ion beam to impact a semiconductor wafer. 23. The apparatus according to claim 22, wherein the impact of the ion beam further causes one or more co-implant species selected from a group consisting of carbon and fluorine to be placed in one or more predetermined locations in the semiconductor wafer. 24. The apparatus according to claim 22, wherein the impact of the ion beam causes one or more co-implant species to be placed into the semiconductor wafer. 25. The apparatus according to claim 24, wherein the one or more co-implant species are selected from a group consisting of carbon and fluorine. 26. The apparatus according to claim 25, wherein the one or more co-implant species are placed in an end-of-range area within the semiconductor wafer. 27. The apparatus according to claim 22, wherein the impact of the ion beam causes at least one portion of the semiconductor wafer to be amorphized prior to ion implantation of dopants into the semiconductor wafer. 28. The apparatus according to claim 22, being further configured to maintain the semiconductor wafer in a temperature range substantially lower than room temperature during the impact of the ion beam. 29. The apparatus according to claim 22, being further configured to perform a low-temperature ion implantation on the semiconductor wafer to incorporate dopants into an amorphized portion of the semiconductor wafer.