Patent Number: 042773083
Section: description

DETAILED DESCRIPTION According to the drawing, there is shown a reactor flux level 8 which is increasing monitonically with time and which is monitored by a monitoring circuit. The monitoring circuit includes a proportional counter 10 which is a device which develops an output pulse in response to a neutron being incident thereon, i.e., it is a pulse-type neutron detector. The proportional counter 10 is positioned in the nuclear reactor environment and the output pulses therefrom are applied to a pulse amplifier system 12 and then to a comparator 14. Comparator 14 separates neutron-induced pulses for unwanted pulses on the basis of pulse amplitude. Thus, comparator 14 will output neutron-induced pulses which are applied to counter 16. Counter 16 counts the pulses it receives. The pulses from comparator 14 are also applied to a programmable divider 18 which generates one output pulse after each n pulses from the comparator 14, thus, in effect dividing by n the output of comparator 14. Programmable divider 18 could be set to any integer value as will be described. The output of divider 18 is applied to counter 20 which counts the number of pulses from divider 18. Programmable timer 22 is coupled to counter 16 and counter 20 and develops a command signal every .DELTA.t time period with .DELTA.t being determined as will be described. In response to a command signal from timer 22, counter 16 updates the value contained in memory register 24. Also in response to the command signal from timer 22, i.e., after each time period .DELTA.t, each counter 16 and 20 is reset to zero so that they begin a new counting cycle. Comparator 26 compares the value of the output of counter 20 with value stored in register 24. If the value of counter 20 is greater than or equal to the value stored in register 24, comparator 26 generates a trip signal. Scram generator 28 is responsive to a trip signal from comparator 26 to generate a reactor scram signal, indicating that the reactor power level is increasing at an unacceptable rate. The count-factor-increase time monitor operates as follows: beginning at zero counts, counter 16 counts the number of neutron-induced pulses from detector 10 for the first .DELTA.t time period. At the end of the first .DELTA.t time period, the count achieved is stored in register 24. During the next or second .DELTA.t time period, counter 16 again starts at zero and counts the number of neutron-induced pulses from detector 10. Also during the second .DELTA.t time period, counter 20 is counting the number of neutron-induced pulses from detector 10 divided by n. During the second .DELTA.t time period, comparator 16 is constantly comparing the count of counter 20 with the value stored in register 24, which will be the value counted by counter 16 during the first .DELTA.t time period, and if the count of counter 20 is at any time equal to or greater than the value stored in memory register 24, a trip signal is generated at that time by comparator 26. This indicates that the rate of change of the reactor power level has exceeded the allowed value and the reactor should be scrammed. At the end of each .DELTA.t time period, the value stored in register 24 is updated to the value counted by counter 16, and the counters 16 and 20 are zeroed. A new monitoring cycle is begun. It is apparent that during the first cycle of operation, register 24 will have no value stored therein. To start monitoring, one can use a preset input count 30 to preset register 24, so that this preset value is initially set in register 24. The comparators can be inhibited during this preset operation. The theory underlying the operation of the monitor is that the reactor period and the count-factor-increase have been determined to obey the following relation, providing one assumes that reactor period is constant for a given time span equal to twice .DELTA.t or longer: ##EQU1## where T.sub.j-(j+1) is an asymptotic period measured between time intervals t.sub.(j-1) and t.sub.(j+1), N.sub.(j+1) is the number of counts occurring between t.sub.j and t.sub.(j+1), PA1 N.sub.j is the number of counts occurring between t.sub.(j-1) and t.sub.j, and PA1 .DELTA.t.sub.j-(j+1) is the time duration between time t.sub.j and time t.sub.(j+1). It is assumed that .DELTA.t.sub.(j-1)-j =.DELTA.t.sub.j-(j+1) =.DELTA.t.sub.(j+1)-(j+2), etc. Consider the case where N.sub.(j+1) /N.sub.j =2. Programmable divider 18 will then have n=2 and the monitor will observe count-doubling time. Fundamentally, the count-doubling time measuring circuit measures the time necessary for the number of counts in the interval from t.sub.j to t.sub.(j+1) to equal twice the number of counts in the interval from t.sub.(j-1) to t.sub.j. Thus it is generally more meaningful to think of this circuit in terms of count-doubling time rather than period. If this time is less than a prescribed value a scram is initiated as soon as N.sub.(j+1) /N.sub.j is equal to 2. The scram will occur on the basis of the time required for N.sub.(j+1) /N.sub.j to equal 2 regardless of whether the reactor is on an asymptotic or transient period. In practice, if the times required for N.sub.(j+1) to be twice N.sub.j are greater than the prescribed value, the circuits are reset at definite .DELTA.t intervals and N.sub.(j+1) replaces N.sub.j as the reference count; no scram is initiated. The ratio N.sub.(j+1) /N.sub.j may, of course, be any appropriate constant. However, the factor 2 is certainly acceptable from safety considerations for low and medium power level reactor operation and is convenient from circuit considerations. The statistics associated with N.sub.(j+1) /N.sub.j =2 are also acceptable. If, for example, a scram is desired when N.sub.(j+1) /N.sub.j =2 occurs in less than 4 seconds, a counting rate of 100 counts per second would result in the order of 400 counts during this interval. The standard deviation would be about 20 and a 10.sigma. deviation would be only about 50% of the total count required to effect a scram. This fluctuation, although very large and very improbable, will not result in a scram if superimposed upon any reasonable operating period. With n=2 and .DELTA.t selected at 5 seconds, i.e. timer 22 set at 5 seconds, a reactor scram will be developed with T.apprxeq.7.2 seconds. Generally one selects T in the range of 5-10 seconds. The minimum .DELTA.t that can be used is a statistical limitation in that there must be a sufficient .DELTA.t to allow for meaningful counts. The count-factor-increase time monitoring circuit described is not by itself a good source of information for display or recording purposes. One way to obtain visual display information is to use separate comparator circuitry to determine the length of time for N.sub.(j+1) /N.sub.j to reach some value such as 1.10. This time is a measure of the rate of the increase of the reactor power level. The time can be recorded by a scaler and transmitted to the display devices. Another method simply uses a microcomputer or programmable calculator 32 to interrogate counter 16 and counter 20 for information at appropriate time intervals, and then calculate the period or count-doubling times. This new circuit is simple, fast and is capable of assuring that the reactor power level cannot rise too rapidly. By selecting a suitable N.sub.2 /N.sub.1 ratio, the probability for spurious scrams can be negligible without compromising reactor safety. An inexpensive microcomputer or programmable calculator can be operated in parallel with the safety circuit to provide frequent updating of period or rate of change information for display and recording purposes.