Patent Number: 
Section: claims

1. An emitter for an electron-beam projection lithography system, the emitter comprising:a photoconductor substrate;an insulating layer formed on a front surface of the photoconductor substrate;a gate electrode layer formed on the insulating layer, wherein the gate electrode layer comprises an etched first conductor layer and a continuous second conductor layer; anda base electrode layer formed on a rear surface of the photoconductor substrate and formed of a transparent conductive material. 2. The emitter as claimed in claim 1, wherein the gate electrode layer comprises a pattern of alternating relatively thick and thin portions. 3. The emitter as claimed in claim 1, wherein the photoconductor substrate comprises at least one of a gallium arsenide substrate and an amorphous silicon substrate. 4. The emitter as claimed in claim 1, wherein the insulating layer is formed of an anodized metal. 5. The emitter as claimed in claim 4, wherein the insulating layer is formed of an anodized alumina. 6. The emitter as claimed in claim 1, wherein the gate electrode layer is formed of a metal selected from the group consisting of gold (Au), palladium (Pd), titanium (Ti) and aluminum (Al). 7. The emitter as claimed in claim 1, wherein the base electrode layer is formed of indium tin oxide. 8. A method of manufacturing an emitter for an electron-beam projection lithography system, the method comprising:preparing a photoconductor substrate;forming a base electrode layer on a rear surface of the photoconductor substrate, the base electrode layer being transparent;forming an insulating layer on a front surface of the photoconductor substrate;forming a gate electrode layer bydepositing a first conductive material on the insulating layer to form a first conductor layer;patterning the first conductor layer to form a predetermined conductor layer pattern; anddepositing a second conductive material on the first conductor layer and the insulating layer exposed by the patterning step to form a continuous second conductor layer. 9. The method as claimed in claim 8, wherein the forming of the base electrode layer is performed after the forming of the gate electrode layer. 10. The method as claimed in claim 8, wherein the photoconductor substrate comprises at least one of a gallium arsenide substrate and an amorphous silicon substrate. 11. The method as claimed in claim 8, wherein the base electrode layer is formed of indium tin oxide. 12. The method as claimed in claim 8, wherein forming the insulating layer comprises:depositing an anodizable metal on an entire surface of the photoconductor substrate; andanodizing the deposited metal. 13. The method as claimed in claim 12, wherein the metal is aluminum and alumina is formed by anodizing the aluminum. 14. The method as claimed in claim 8, wherein the gate electrode layer is formed of a metal selected from the group consisting of gold (Au), palladium (Pd), titanium (Ti) and aluminum (Al). 15. The method as claimed in claim 8, wherein forming the gate electrode layer further comprises patterning the first conductor layer and the second conductor layer so as to have a pattern of alternating relatively thick and thin portions. 16. The method as claimed in claim 8 wherein patterning the first conductor layer comprises:coating a resist on an upper surface of the first conductor layer;patterning the coated resist;selectively etching the first conductor layer by using the patterned resist as an etch mask; andremoving the resist.