Patent Number: 046802436
Section: summary

BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to masks used in photolithographic processes for manufacturing integrated circuits, and more particularly to methods for manufacturing masks used in x-ray photolithographic processes. 2. Description of the Prior Art It is known in the art to use masks during the process of manufacturing integrated circuits. Typical steps taken during the manufacturing of integrated circuits involve coating a silicon wafer with a layer of photoresist, selectively exposing portions of the photoresist and removing the exposed portions. Thereafter, a number of other steps can be taken, e.g., doping the exposed portions of silicon with impurities or depositing metal over the exposed portions. Normally, the process of exposing photoresist involves the use of visible light. However, there is a limit to the resolution that can be achieved with light having a wavelength in the visible portion of the spectrum. It is known in the art that it is desirable to achieve very fine resolution when manufacturing integrated circuits because a finer resolution permits a circuit designer to design integrated circuits using less silicon surface area. This is desirable because processing silicon to make an integrated circuit is expensive and the smaller one can make an integrated circuit, the less expensive it will be. One method of achieving fine resolution is to use x-ray radiation. An example of a system for manufacturing integrated circuits using x-ray photolithography is discussed in U.S. Pat. No. 3,743,842 (Smith et al.). Masks used in x-ray photolithographic processes typically have a coating which selectively blocks x-rays formed on an x-ray transparent membrane. Because the mask must be capable of producing repeatable geometries of submicron dimensions, the mask must be mechanically strong and constructed with very fine mechanical tolerances. The mask geometries must be capable of being aligned with another set of patterns on a wafer within submicron tolerances. SUMMARY OF THE INVENTION In accordance with this invention, a method is provided for manufacturing a mask for use in x-ray photolithographic processes. The mask includes a pyrex ring bonded to a silicon ring. Across the interior opening of the silicon ring is a layer of boron nitride, which is transparent to x-rays. Deposited on the layer of boron nitride is a layer of x-ray opaque material such as gold. In one embodiment of the invention, a silicon wafer is polished on both surfaces and the polished surfaces are then coated with a layer of boron nitride. A first surface of the boron nitride coated silicon wafer is then covered with a masking substance such as a Dynagrip disk. The boron nitride on the second surface of the silicon wafer is then etched away. The Dynagrip disk masks and protects being underlying boron nitride on the first surface from the etched. After the boron nitride is removed from the second surface of the wafer, the Dynagrip disk is removed. The surface of the wafer from which the boron nitride was removed is bonded to a pyrex ring using field assisted thermal (FAT) bonding. The FAT bond, which requires no epoxy or adhesive, is a bond in which the silicon is directly sealed to the pyrex ring. This bond suffers none of the problems normally associated with epoxies, e.g., weakening with age, weakening with adverse thermal or chemical conditions etc. In one embodiment, the FAT bond is created by placing the wafer against the pyrex ring, raising the temperature of the ring and the wafer to about 190.degree. to 500.degree. C. and providing a voltage between 500 and 1500 V across the silicon-pyrex interface. After the wafer is bonded to the pyrex ring, a circular portion of the silicon within the wafer is etched away, leaving a boron nitride membrane formed on a silicon ring which is bonded to the pyrex ring. A layer of zirconium sputtered onto the wafer serves as a mask to prevent etching of silicon near the FAT bond. Thereafter, the boron nitride membrane is annealed to achieve a desired tension in the membrane. (As is known in the art, annealing increases the tensile stress in the boron nitride, and is accomplished by heating the membrane.) A layer of polyimide (which provides added strength to the membrane) and a layer of x-ray opaque material are then deposited on the boron nitride membrane. The x-ray opaque material is then etched in accordance with a desired pattern to form a mask. The mask can then be used to produce desired structures, typically with submicron dimensions, in an integrated circuit. In accordance with another embodiment of the invention, a first side of a silicon wafer is FAT bonded to a pyrex ring and the wafer and ring are then completely covered with boron nitride. The boron nitride on the first side of the wafer is then etched, thereby exposing a portion of the underlying silicon. The exposed silicon is then removed, leaving an x-ray transparent boron nitride membrane affixed to a silicon ring bonded to a pyrex ring. The boron nitride is then annealed and coated with ppolyimide and a patterned layer of x-ray opaque material as described above. In another embodiment of the invention, a first side of a glass wafer is FAT bonded to a metal ring which is FAT bonded to a pyrex ring. The resulting structure is then completely covered with boron nitride. A portion of the boron nitride on the first side of the wafer is then removed, thereby exposing a portion of the underlying glass. The exposed glass is then removed, leaving an x-ray transparent boron nitride membrane affixed to a glass ring which is bonded to a pyrex ring support structure via an intermediate metal ring. The boron nitride is then annealed and coated with polyimide and a patterned layer of x-ray opaque material. In yet another embodiment, a metal ring is sputtered onto a first side of a boron nitride coated silicon wafer. The metal ring is FAT bonded to a pyrex ring. The boron nitride on the second side of the wafer is then removed, thus exposing the underlying silicon. The silicon is then removed, leaving an x-ray transparent boron nitride membrane affixed to a metal ring which is bonded to a pyrex ring. The boron nitride is then annealed and covered with polyimide and a patterned layer of x-ray opaque material as described above. In another embodiment of the invention, both sides of a silicon wafer are coated with a boron nitride layer. The first side of the wafer is then coated with an x-ray transparent electrically conductive material such as indium tin oxide (ITO). The ITO is FAT bonded to a pyrex ring, and the boron nitride on the second side of the wafer is removed, thus exposing the underlying silicon. The silicon is then removed, leaving a membrane comprising ITO and boron nitride layers affixed to a pyrex ring. The boron nitride is then annealed and covered with polyimide and a patterned layer of an x-ray opaque material. In another embodiment of the invention, a silicon wafer is coated on both sides with a boron nitride layer which is doped so as to be conductive. The conductive boron nitride layer on the first side of the wafer is FAT bonded directly to a pyrex ring. The boron nitride on the second side of the wafer is removed, thus exposing the underlying silicon. The silicon is then removed, leaving an x-ray transparent boron nitride membrane affixed to a pyrex ring support structure. The boron nitride is then annealed and covered with polyimide and a patterned layer of an x-ray opaque material.