Patent Number: 
Section: description

FIG. 1 is a schematic illustration of a system 20 for X-ray reflectometry of a sample 22, in accordance with a preferred embodiment of the present invention. An X-ray source 24, typically an X-ray tube, irradiates a small area 28 on sample 22 via a focusing monochromator 26. Most preferably, monochromator 26 comprises a Kirkpatrick-Baez type device, available from Osmic Inc., of Troy, Mich., or an X-ray Doubly-bent Focusing Crystal Optic, manufactured by XOS (X-ray optical Systems), Inc., of Albany, N.Y. Such monochromators are described in greater detail in a patent application entitled xe2x80x9cX-ray Microanalysis of Thin Films,xe2x80x9d filed on even date, which is assigned to the assignee of the present patent application and whose disclosure is incorporated herein by reference. Alternatively, any other suitable monochromator may be used, such as those described in the above-mentioned U.S. Pat. Nos. 5,619,548 and 5,923,720, as may the knife-edge arrangement described in the above-mentioned article by Chihab et al. A typical irradiation energy for reflectometric measurements in system 20 is about 5.4 keV. X-rays reflected by sample 22 are collected by an array 30 of detectors 32. The detectors are coupled to processing circuitry 34, comprising a plurality of processing channels 36, each of which receives signals from a corresponding detector 32. Although for the sake of simplicity of illustration, only a single row of detectors 32 is shown in FIG. 1, with a relatively small number of detectors, in preferred embodiments of the present invention, array 30 generally includes a greater number of elements, arranged in either a linear or a matrix (two-dimensional) array, with a corresponding array of processing channels 36, as described further hereinbelow. Output signals from channels 36, preferably in digital form, are transferred to a processing and analysis block 38, typically comprising a general-purpose computer, suitably programmed, which is coupled to a display 40 and/or other output device. Block 38 analyzes the outputs of channels 36, preferably so as to determine a distribution 42 of the flux of photons reflected from sample 22 as a function of angle at a given energy or over a range of energies. As described further hereinbelow, energy-dispersive processing by channels 36 obviates the need for an additional monochromator between sample 22 and detector array 30, since energy-selectivity is provided in the signal processing. When sample 22 has one or more thin surface layers, such as thin films, at area 28, distribution 42 typically exhibits a periodic structure due to interference effects among reflected X-ray waves from interfaces between the layers. Characteristics of the periodic structure are preferably analyzed by block 38 in order to determine the thickness, density and surface quality of one or more of the surface layers, using methods of analysis described, for example, in the above-mentioned U.S. Pat. Nos. 5,619,548 and 5,740,226, or as is otherwise known in the art. Although in the preferred embodiment shown in FIG. 1, system 20, including array 30 and accompanying circuitry 34, is described with reference to X-ray reflectometry, it will be appreciated that the system may similarly be used, mutatis mutandis, in other fields of X-ray analysis. Possible fields of application include X-ray fluorescence (XRF) analysis, including particularly grazing emission XRF, as well as other XRF techniques known in the art, as described in the Background of the Invention. Furthermore, the principles of system 20 may be implemented in position-sensitive detection systems for other energy ranges, such as for detection of gamma rays and other nuclear radiation. FIG. 2 is a block diagram that schematically illustrates detector array 30 and processing circuitry 34, in accordance with a preferred embodiment of the present invention. Detectors 32 preferably comprise silicon PIN diodes, having a depletion thickness of at least 20 xcexcm. Such detectors have the advantages of being low in cost and integrable with circuitry 34 on a common silicon substrate. Alternatively, any other suitable type of detectors known in the art may be used, for example, CdZnTe detectors, which are preferably wire-bonded to one or more silicon chips comprising the corresponding processing channels 36. Optionally, array 30 and circuitry 34 are cooled, preferably by a thermoelectric cooler, to improve their signal/noise performance. Details of channels 36 are described hereinbelow with reference to FIG. 3. Array 30 most preferably comprises 512 detectors 32 disposed along a linear axis of the array, having an axial dimension of approximately 30 xcexcm and a transverse dimension of 6-12 mm. Such dimensions give the array an active area of about 15xc3x976 mm up to about 15xc3x9712 mm. The narrow axial spacing of the detectors enhances the angular resolution that can be achieved in measurements using array 30, while the broad transverse dimension is useful in maximizing the sensitivity of detection, thus increasing the XRR measurement throughput of system 20. It will be understood, however, that these dimensions and numbers of detectors are cited here by way of example, and detectors of any suitable type, dimension and number can be used. In place of the linear array shown in FIG. 2, detectors 32 may alternatively be disposed in a two-dimensional matrix array. Such an array has the advantage of providing two-dimensional angular resolution if desired. If two-dimensional resolution is not needed, signal outputs may be summed over the pixels in each of the rows of the array. The relatively small pixel size in this configuration has at least two potential benefits: (1) saturation at angles with high X-ray flux is avoided; and (2) the capacitance of the detectors is reduced, which may lead to a reduction in the overall detection noise. Further alternatively, a mask may be placed over linear array 30 to limit the active area of detectors 32 that is exposed to X-rays. For example, if fine angular resolution is desired in the transverse direction, as well as in the axial direction, the active areas of detectors 32 may be masked so as to reduce the transverse dimensions of the areas exposed to the X-rays. The mask may be moved transversely and signals captured at multiple locations if desired, to capture X-rays at different transverse angular positions. Alternatively, a mask made up of a row of narrow slits, each slit corresponding to one of detectors 32, may be translated axially over the array to enhance the detection resolution in the axial direction. Further alternatively, if there is a substantial variation in the X-ray flux incident on array 30 as a function of angle in the axial direction (as commonly occurs in XRR measurement), the mask may have a graduated transverse dimension, so that detectors 32 in the high-flux region have a smaller active area exposed to the X-rays than those in the low-flux region. This configuration reduces the likelihood of saturation in the high-flux region and effectively increases the dynamic range of the array. FIG. 3 is a block diagram that schematically illustrates one of processing channels 36, in accordance with a preferred embodiment of the present invention. Signals output by corresponding detector 32 are first amplified by a charge-sensitive preamplifier 70, typically a low-noise FET amplifier. A pulse-shaping filter 72 smooths and shapes the signals output by preamplifier 70, so as to generate a pulse having an amplitude indicative of the energy of the incident photon. Preferably, a gain and shaping control circuit 73 (not shown in FIG. 2 for the sake of simplicity of illustration) provides appropriate control inputs to preamplifier 70 and filter 72. Preferably, the degree of smoothing applied by filter 72 is adjusted based on the pulse rate encountered the detectors, i.e., responsive to the flux of X-ray photons incident on array 30. The adjustment is used to increase the sensitivity of channels in which there is a relatively low rate of incident photons, while the sensitivity of channels having high incidence rates is reduced in order to allow high pulse counting throughput. Typically, the sensitivity is set so that channel 36 can accommodate at least 1.5xc3x97105 pulses/sec, as determined by the pulse shaping time of the channel. Optionally, the sensitivity of each channel or of a group of channels is individually adjustable. Appropriate choices of components and design parameters for channel 36 will be clear to those skilled in the art, based on the use of similar components and designs in conventional energy-dispersive processing systems. A level discriminator 74 is preferably applied to the output of pulse shaper 72 in order to select a range of energies to be passed to a n-bit counter circuit 76. Preferably, each of counter circuits 76 is capable of integrating up to 108 photon counts, dependent on the width of a bus 60 through which the counts are read out and on the integration time between successive readouts. The range of discriminator 74 is selected by an energy threshold control 52, so that only photons in the selected energy range are chosen. Preferably, a common energy range is chosen for all of channels 36, with an energy passband no more than about 0.3 keV wide. In addition to rejecting photons outside the chosen passband, the upper limit set on discriminator 74 also eliminates spurious signals due to pulse pile-up, i.e., high-amplitude signals generated when two photons arrive at almost the same time. The energy discrimination afforded by array 30 and circuitry 34 is particularly useful in determining the angular distribution of X-rays reflected from sample 22. It allows the reflected X-ray photons (which have the same, substantially monochromatic energy as the incident photons from source 24) to be distinguished from photons whose wavelength is shifted due to fluorescent emission and scattering processes. There is no need for an additional monochromator between sample 22 and detector array 30. This energy discrimination capability can likewise be used in distinguishing particular X-ray fluorescence lines or scattering transitions. Alternatively, different energies are chosen for level discriminators 74 in different channels 36. Further alternatively or additionally, the energy thresholds are swept over a number of different energy levels of interest. Moreover, although channel 36 is shown in FIG. 3 as including only a single discriminator 74 and counter 76, in alternative embodiments of the present invention, the channels may include multiple, parallel counters, each with its own level discriminator. In such embodiments, the parallel counters count the number of X-ray photons incident on the corresponding detector 32 at a number of different energy levels simultaneously. Returning now to FIG. 2, it is observed that certain functions are performed collectively for the entire array 30 of detectors 32 and corresponding processing channels 36. A high-voltage bias circuit 50 provides a bias voltage common to all of the detectors. Threshold control circuitry 52 preferably sets the energy level discrimination range for all of the channels (although as noted hereinabove, it is also possible to set different ranges for different channels). N-bit count outputs of counters 76 are output to common bus 60, for sequential transfer to processing and analysis block 38, under the control of a bus controller 54. The bus controller reads out the counts from each of channels 36 in turn, in accordance with signals provided by a chip reset and control circuit 56 and with address selection by a counter address bus circuit 58. The bus addressing may read channels 36 sequentially or by random access. The design of such circuits will be clear to those skilled in the art. Optionally, circuit 58 may be programmed and controlled so as to provide a relatively longer integration time to channels in which the photon flux is relatively low. Each detector 32 and the corresponding channel 36 make up a channel unit 48, which is preferably integrated on a single substrate. Most preferably, all of units 48, i.e., all of the detectors in array 30 and the processing channels in circuitry 34, are produced together on a single, custom integrated circuit chip 62 on a silicon substrate. Control circuits 52, 54, 56 and 58 are preferably included on chip 62, as well. Other modes of integration are also possible, however. For example, each channel unit 48 may comprise a separate integrated circuit on a silicon substrate, or alternatively may comprise a hybrid circuit, with several integrated circuits on a ceramic or chip carrier substrate. Alternatively, a number of units 48 together may be contained in a single custom integrated circuit or hybrid. These integrated channel units 48 are then combined in a hybrid or multi-layer sandwich arrangement, or alternatively on a printed circuit board, to make up the entire array 30 together with circuitry 34. Those skilled in the art will be able to devise other means for integrating the multiple channels of array 30 and circuitry 34, all of which means are considered to be within the scope of the present invention. It will thus be appreciated that the preferred embodiments described above are cited by way of example, and the full scope of the invention is limited only by the claims.