Patent Number: 
Section: claims

1. A method of fabricating a photo mask, the method comprising:collecting sample data;setting a target mask layout data;performing an optical proximity correction using the sample data and a preliminary mask layout to obtain an optimized preliminary mask layout;verifying the optimized preliminary mask layout to obtain a final mask layout; andfabricating the photo mask using the final mask layout,wherein verifying the optimized preliminary mask layout includes operating a verification simulator using the sample data and the optimized preliminary mask layout as input data to obtain verification image data, andwherein the verification image data includes a plurality of contours of a verification-simulated pattern at different vertical positions. 2. The method of claim 1, wherein verifying the optimized preliminary mask layout further comprises:comparing the verification image data with the target mask layout data to detect a verification error; anddetermining whether the verification error is out of an allowable range,wherein the verification image data further include a plurality of critical dimensions of the verification-simulated pattern at different vertical positions, a sidewall profile and a corner angle. 3. The method of claim 2, wherein comparing the verification image data with the target mask layout data to detect a verification error includes comparing the plurality of contours of the verification-simulated pattern to detect a subresolution assist feature and a side lobe image. 4. The method of claim 3, wherein the detecting of the verification error detects a side lobe in resist if the side lobe image is formed in the verification-simulated pattern, andwherein the detecting the verification error detects a side lobe out resist if the side lobe image is formed to be apart from the verification-simulated pattern. 5. The method of claim 2, wherein comparing the verification image data with the target mask layout data to detect a verification error includes calculating a difference between the plurality of critical dimensions of the verification-simulated pattern to detect a bridge or a necking. 6. The method of claim 2, wherein comparing the verification image data with the target mask layout data to detect a verification error includes calculating the corner angle to detect a bridge or a necking. 7. The method of claim 2, wherein, if the verification error is out of the allowable range, the preliminary mask layout is compensated and the optical proximity correction and the verification of the optimized preliminary mask layout are again performed using the compensated preliminary mask layout. 8. The method of claim 2, wherein, if the verification error is out of the allowable range, the target mask layout data is reset and the optical proximity correction and the verification of the optimized preliminary mask layout are again performed using the reset target mask layout data. 9. The method of claim 2, further comprising generating an alarm message indicating the verification error when the verification error is out of the allowable range. 10. The method of claim 1, wherein performing the optical proximity correction comprises:operating a model simulator using the sample data and the preliminary mask layout as input data to obtain a model image data in which an optical proximity effect is reflected;comparing the model image data with the target mask layout data to detect a model error; anddetermining whether the model error is out of an allowable range. 11. The method of claim 10, wherein, if the model error is out of the allowable range, the preliminary mask layout is compensated and the optical proximity correction and the verification of the optimized preliminary mask layout are again performed using the compensated preliminary mask layout. 12. The method of claim 10, wherein the verification simulator is different from the model simulator. 13. The method of claim 1, wherein collecting the sample data comprises:performing exposure and development processes using a test mask having test patterns of various sizes, various shapes and various spaces to form photoresist patterns; andmeasuring thicknesses of the photoresist patterns, corner angles of the photoresist patterns, sidewall profiles of the photoresist patterns, critical dimensions at different vertical positions of the photoresist patterns, and contours of the photoresist patterns. 14. The method of claim 13, wherein measuring the thicknesses, the corner angles, the sidewall profiles, the critical dimensions and contours of the photoresist patterns is performed using one of a top-view critical dimension scanning electron microscope (CD SEM) and an angled critical dimension scanning electron microscope (CD SEM). 15. The method of claim 1, wherein the contours include a top contour and a bottom contour of the verification-simulated pattern, and the top contour and the bottom contour are obtained at different vertical positions of the verification-simulated pattern. 16. A method of forming a semiconductor device, comprising:preparing a wafer;forming a photoresist layer on the wafer; andforming photoresist patterns by perfoming a photolithography process with respect to the wafer using a photo mask formed by the method of claim 1. 17. A method of fabricating a photo mask, the method comprising:collecting sample data;setting a target mask layout data;performing an optical proximity correction using the sample data and a preliminary mask layout to obtain an optimized preliminary mask layout;verifying the optimized preliminary mask layout by generating verification image data and comparing the verification image data with the target mask layout data to detect a verification error;generating an alarm message indicating the verification error when the verification error is out of an allowable range and obtaining a final mask layout when the verification error is within the allowable range; andfabricating the photo mask using the final mask layout. 18. The method of claim 17, wherein verifying the optimized preliminary mask layout includes operating a verification simulator using the sample data and the optimized preliminary mask layout as input data to obtain the verification image data, and wherein the verification image data includes a plurality of contours of a verification-simulated pattern at different vertical positions. 19. The method of claim 18, wherein verifying the optimized preliminary mask layout further comprises:determining whether the verification error is out of an allowable range,wherein the verification image data further include a plurality of critical dimensions of the verification-simulated pattern at different vertical positions, a sidewall profile and a corner angle. 20. The method of claim 19, wherein comparing the verification image data with the target mask layout data to detect a verification error includes comparing the plurality of contours of the pattern to detect a sub-resolution assist feature and a side lobe. 21. The method of claim 19, wherein comparing the verification image data with the target mask layout data to detect a verification error comprises at least one of calculating a difference between the plurality of critical dimensions of the verification-simulated pattern to detect a bridge or a necking and calculating the corner angle to detect a bridge or a necking. 22. The method of claim 17, wherein the verification image data includes a top contour and a bottom contour of a verification-simulated pattern, and the top contour and the bottom contour are obtained at different vertical positions of the verification-simulated pattern.