Patent Number: 
Section: claims

1. An apparatus for inspecting overlapping figures comprising:a chip overlap inspection unit configured to input a data file on each chip of a plurality of chips arranged in a writing pattern, and inspect an existence of an overlap between each region of a plurality of chips, based on arrangement data on each region of the plurality of chips, wherein the plurality of chips are different chips to be written;a setting unit configured to set, with respect to the plurality of chips, a plurality of hierarchies and a plurality of cell regions of each of the plurality of hierarchies;an extraction unit configured to extract, with respect to a plurality of chips where the overlap occurs, a cell region where the overlap is located, from a higher hierarchy level to a lower hierarchy level in order, wherein the plurality of chips where the overlap occurs are different chips to be written, the cell region extracted is included in one of the plurality of chips where the overlap occurs and another cell region extracted is included in the other one of the plurality of chips where the overlap occurs;a figure overlap judging unit configured to judge an existence of an overlap between a figure in the cell region extracted and a figure in the other cell region extracted; andan output unit configured to output data on a plurality of figures overlapping. 2. An apparatus for inspecting overlapping figures comprising:a chip overlap inspection unit configured to input a file of data on each chip of a plurality of chips arranged in a writing pattern, and inspect an existence of an overlap between each region of a plurality of chips, based on arrangement data on each region of the plurality of chips, wherein the plurality of chips are different chips to be written;a setting unit configured to set, with respect to the plurality of chips, a plurality of cell regions for each hierarchy of the data on the each chip;an extraction unit configured to extract, with respect to a plurality of chips where the overlap occurs, a cell region where the overlap is located, from a higher hierarchy level to a lower hierarchy level in order, wherein the plurality of chips where the overlap occurs are different chips to be written, the cell region extracted is included in one of the plurality of chips where the overlap occurs and another cell region extracted is included in the other one of the plurality of chips where the overlap occurs;a figure overlap judging unit configured to judge an existence of an overlap between a figure in the cell region extracted and a figure in the other cell region extracted; andan output unit configured to output data on a plurality of figures overlapping. 3. An apparatus for inspecting overlapping figures comprising:a chip overlap inspection unit configured to input a data file on each chip of a plurality of chips which are arranged in a writing pattern and in which a plurality of hierarchies and a plurality of cell regions for each of the plurality of hierarchies are defined in such a manner that the plurality of cell regions become smaller in order according to the plurality of hierarchies, and to inspect an existence of an overlap between each region of a plurality of chips, based on arrangement data on each region of the plurality of chips, wherein the plurality of chips are different chips to be written;an extraction unit configured to extract, with respect to a plurality of chips where the overlap occurs, a cell region where the overlap is located, from a higher hierarchy level to a lower hierarchy level in order, wherein the plurality of chips where the overlap occurs are different chips to be written, the cell region extracted is included in one of the plurality of chips where the overlap occurs and the another cell region extracted is included in the other one of the plurality of chips where the overlap occurs;a figure overlap judging unit configured to judge an existence of an overlap between a figure in the cell region extracted and a figure in the other cell region extracted; andan output unit configured to output data on a plurality of figures overlapping. 4. A charged particle beam writing apparatus comprising:a chip overlap inspection unit configured to input a data file on each chip of a plurality of chips arranged in a writing pattern, and inspect an existence of an overlap between each region of a plurality of chips, based on arrangement data on each region of the plurality of chips, wherein the plurality of chips are different chips to be written;a setting unit configured to set, with respect to the plurality of chips, a plurality of hierarchies and a plurality of cell regions of each of the plurality of hierarchies;an extraction unit configured to extract, with respect to a plurality of chips where the overlap occurs, a cell region where the overlap is located, from a higher hierarchy level to a lower hierarchy level in order, wherein the plurality of chips where the overlap occurs are different chips to be written, the cell region extracted is included in one of the plurality of chips where the overlap occurs and another cell region extracted is included in the other one of the plurality of chips where the overlap occurs;a figure overlap judging unit configured to judge an existence of an overlap between a figure in the cell region extracted and a figure in the other cell region extracted;an output unit configured to output data on a plurality of figures overlapping; anda writing unit configured to write a writing pattern in which a plurality of chips having no overlap in a figure hierarchy are arranged, onto a target workpiece by using a charged particle beam. 5. A charged particle beam writing apparatus comprising:a chip overlap inspection unit configured to input a file of data on each chip of a plurality of chips arranged in a writing pattern, and inspect an existence of an overlap between each region of a plurality of chip regions, based on arrangement data on each region of the plurality of chips, wherein the plurality of chips are different chips to be written;a setting unit configured to set, with respect to the plurality of chips, a plurality of cell regions for each hierarchy of the data on the each chip;an extraction unit configured to extract, with respect to a plurality of chips where the overlap occurs, a cell region where the overlap is located, from a higher hierarchy level to a lower hierarchy level in order, wherein the plurality of chips where the overlap occurs are different chips to be written, each other, the cell region extracted is included in one of the plurality of chips where the overlap occurs and another cell region extracted is included in the other one of the plurality of chips where the overlap occurs;a figure overlap judging unit configured to judge an existence of an overlap between a figure in the cell region extracted and a figure in the other cell region extracted;an output unit configured to output data on a plurality of figures overlapping; anda writing unit configured to write a writing pattern in which a plurality of chips having no overlap in a figure hierarchy are arranged, onto a target workpiece by using a charged particle beam. 6. A charged particle beam writing apparatus comprising:a judging unit configured to input a data file on each chip of a plurality of chips which are arranged in a writing pattern and in which a plurality of hierarchies and a plurality of cell regions for each of the plurality of hierarchies are defined in such a manner that the plurality of cell regions become smaller in order according to the plurality of hierarchies, and to judge an existence of an overlap between each region of a plurality of chip regions, based on arrangement data on each region of the plurality of chips, wherein the plurality of chips are different chips to be written;an extraction unit configured to extract, with respect to a plurality of chips where the overlap occurs, a cell region where the overlap is located, from a higher hierarchy level to a lower hierarchy level in order, wherein the plurality of chips where the overlap occurs are different chips to be written, the cell region extracted is included in one of the plurality of chips where the overlap occurs and another cell region extracted is included in the other one of the plurality of chips where the overlap occurs;a figure overlap judging unit configured to judge an existence of an overlap between a figure in the cell region extracted and a figure in the other cell region extracted;an output unit configured to output data on a plurality of figures overlapping; anda writing unit configured to write a writing pattern in which a plurality of chips having no overlap in a figure hierarchy are arranged, onto a target workpiece by using a charged particle beam. 7. A method for inspecting overlapping figures comprising:inputting a data file on each chip of a plurality of chips arranged in a writing pattern, and inspecting an existence of an overlap between each region of a plurality of chips, based on arrangement data on each region of the plurality of chips, wherein the plurality of chips are different chips to be written;setting, with respect to the plurality of chips, a plurality of hierarchies and a plurality of cell regions of each of the plurality of hierarchies;extracting, with respect to a plurality of chips where the overlap occurs, a cell region where the overlap is located, from a higher hierarchy level to a lower hierarchy level in order; wherein the plurality of chips where the overlap occurs are different chips to be written, the cell region extracted is included in one of the plurality of chips where the overlap occurs and another cell region extracted is included in the other one of the plurality of chips where the overlap occurs;judging, using hardware or a programmed computer, an existence of an overlap between a figure in the cell region extracted and a figure in the other cell region extracted; andoutputting data on a plurality of figures overlapping. 8. A method for inspecting overlapping figures comprising:inputting a file of data on each chip of a plurality of chips arranged in a writing pattern, and inspecting an existence of an overlap between each region of a plurality of chips, based on arrangement data on each region of the plurality of chips, wherein the plurality of chips are different chips to be written;setting, with respect to the plurality of chips, a plurality of cell regions for each hierarchy of the data on the each chip;extracting, with respect to a plurality of chips where the overlap occurs, a cell region where the overlap is located, from a higher hierarchy level to a lower hierarchy level in order, wherein the plurality of chips where the overlap occurs are different chips to be written, the cell region extracted is included in one of the plurality of chips where the overlap occurs and another cell region extracted is included in the other one of the plurality of chips where the overlap occurs;judging, using hardware or a programmed computer, an existence of an overlap between a figure in the cell region extracted and a figure in the other cell region extracted; andoutputting data on a plurality of figures overlapping. 9. A method for inspecting overlapping figures comprising:inputting a data file on each chip of a plurality of chips which are arranged in a writing pattern and in which a plurality of hierarchies and a plurality of cell regions for each of the plurality of hierarchies are defined in such a manner that the plurality of cell regions become smaller in order according to the plurality of hierarchies, and judging, using hardware or a programmed computer, an existence of an overlap between each region of a plurality of chip regions, based on arrangement data on each region of the plurality of chips, wherein the plurality of chips are different chips to be written;extracting, with respect to a plurality of chips where the overlap occurs, a cell region where the overlap is located, from a higher hierarchy level to a lower hierarchy level in order, wherein the plurality of chips where the overlap occurs are different chips to be written, the cell region extracted is included in one of the plurality of chips where the overlap occurs and another cell region extracted is included in the other one of the plurality of chips where the overlap occurs;judging an existence of an overlap between a figure in the cell region extracted and a figure in the other cell region extracted; andoutputting data on a plurality of figures overlapping.