Hugging Face
Models
Datasets
Spaces
Posts
Docs
Enterprise
Pricing
Log In
Sign Up
shailja
/
fine-tuned-codegen-16B-Verilog
like
10
Text Generation
Transformers
PyTorch
shailja/Verilog_GitHub
codegen
code
Eval Results
Inference Endpoints
arxiv:
2212.11140
License:
bigcode-openrail-m
Model card
Files
Files and versions
Community
3
Train
Deploy
Use this model
af0f1d3
fine-tuned-codegen-16B-Verilog
2 contributors
History:
2 commits
shailja-thakur
uploading 16B Verilog LLM
af0f1d3
almost 2 years ago
.gitattributes
Safe
1.48 kB
initial commit
almost 2 years ago
README.md
Safe
21 Bytes
initial commit
almost 2 years ago
fine-tuned-codegen-16B-4gpu.tar.zst
Safe
37.8 GB
LFS
uploading 16B Verilog LLM
almost 2 years ago
