Patent Document

CROSS-REFERENCE 
     This is a continuation-in-part application of Ser. No. 105,333, filed Dec. 19, 1979, now abandoned. 
    
    
     BACKGROUND OF THE INVENTION 
     The present invention relates to amplifiers and more particularly to a wide band amplifier using bipolar transistors. 
     For an amplifier intended for amplifying a wide bandwidth signal such as a video signal, it is necessary to minimize the amplifier&#39;s distortion. For this purpose, a technique for suppressing distortion by employing negative fedback has been extensively used. However, negative feedback cannot be employed without decreasing the amplification factor. Accordingly, in order to obtain a desired amplification factor, it is necessary to use a number of amplifying elements or amplifier circuits. In this case, the stability of the entire amplifier circuit is lowered, which may result in oscillation. 
     The input and output characteristic between the base and emitter of a transistor used as an amplifying element is non-linear. In order to overcome the non-linearity, a technique wherein a large current is used and a technique in which negative feedback is employed have been used. However, none of these have been found to be totally acceptable. Especially, the negative feedback technique still involves the above-described difficulties. 
     Accordingly, an object of this invention is to provide a transistor amplifier in which the non-linear distortion of transistors is eliminated without employing negative feedback. 
     SUMMARY OF THE INVENTION 
     In an amplifier according to one preferred embodiment of the invention, two transistors opposite in conductivity to each other are connected in such a manner that preferably one of the transistors is connected as an emitter follower transistor while the other is connected to amplify the emitter follower output. Current supplying means such as a current mirror circuit supplies currents to the two transistors as the emitter load and the collector load of the two transistors so that an amplified output is provided between the reference potential point and the emitter transistor of a transistor which is collector load of the aforementioned amplifying transistor of the transistors forming the current mirror circuit. The current supplying means supplies the currents I 1  and I 2  to the emitter follower transistor and the amplifying transistor, respectively, the ratio I 1  /I 2  of which is constant (I 1  /I 2  =1/α where α is constant). The constant α may of course be selected to be 1 so that the current is equally applied to the two transistors. 
     In an amplifier according to another preferred embodiment of the invention, two transistors opposite in conductivity to each other and an output resistor as an output conversion means are employed. A first one of the two transistors is connected as an emitter follower transistor while the second is connected to amplify the emitter follower output. In addition, a current mirror circuit is provided as the emitter load of the first transistor and as the collector load of the second transistor. The current mirror circuit supplies currents respectively to the two transistors and the output resistor in such a manner that a ratio of the current supplied to the first transistor to that supplied to the second one is constant and further a ratio of the current supplied to the second transistor to that supplied to the output resistor is also constant. The output of the amplifier is developed across the output resistor. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a circuit diagram showing a first embodiment of an amplifier according to the invention; 
     FIG. 2 is a circuit diagram showing a second embodiment of an amplifier according to the invention; 
     FIG. 3 is a circuit diagram showing a third embodiment of an amplifier according to the invention; 
     FIG. 4 is a circuit diagram showing a fourth embodiment of an amplifier according to the invention; and 
     FIG. 5 is a circuit diagram showing a fifth embodiment of an amplifier according to the invention. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     The present invention will now be described with reference to the accompanying drawings. 
     FIG. 1 is a circuit diagram showing a first preferred embodiment of an amplifier according to the invention. In this circuit, an input signal V IN  is applied to the base of a PNP transistor Q 1  connected to form an emitter follower circuit and the emitter follower output of the transistor Q 1  is applied to the base of an NPN transistor Q 2  in the following stage. A current mirror circuit 1 is provided as the emitter load of the transistor Q 1  and as the collector load of the transistor Q 2 . The current mirror circuit 1 is composed of PNP transistors Q 3  and Q 4  whose bases are connected to each other and emitter resistors R 2  and R 3  which are connected to the emitters of the transistors Q 4  and Q 3 , respectively. The transistor Q 4  is diode-connected, that is, its base is connected to its collector. The thus constructed current mirror circuit 1 supplies currents I 1  and I 2  to the transistors Q 1  and Q 2 , respectively, the ratio I 1  /I 2  of which is constant (I 1  /I 2  =1/α where α is constant). The ratio 1/α of the currents which are supplied to the transistors Q 1  and Q 2  is set to a desired constant value by appropriately selecting the values of the resistors R 2  and R 3 . If the resistances of the resistors R 2  and R 3  are selected to be equal to each other, then substantially equal currents are supplied from the collectors of the transistors Q 3  and Q 4  to the emitter follower transistor Q 1  and the amplifying transistor Q 2 , respectively. 
     An emitter resistor R 1  is connected between the emitter of the amplifying transistor Q 2  and ground. An amplified output is developed across the resistor R 2 . 
     If, in this circuit, the base-emitter voltages of the transistors Q 1  and Q 2  are represented by V BE1  and V BE2 , respectively, the voltage at the emitter of the transistor Q 1  is represented by V A  and the current flowing in the transistors Q 1  and Q 2  are represented by I 1  and I 2 , respectively, then the following equations can be established: 
     
         V.sub.A =V.sub.IN +V.sub.BE1                               (1) 
    
     
         I.sub.2 =(V.sub.A -V.sub.BE2)/R.sub.1                      (2) 
    
     
         V.sub.OUT =I.sub.2 ·R.sub.2                       (3) 
    
     From equations (1) to (3), the following equation is established: 
     
         V.sub.OUT =(V.sub.IN +V.sub.BE1 -V.sub.BE2)·(R.sub.2 /R.sub.1) (4) 
    
     In general, the relation between the collector current I C  of a transistor and the base-emitter voltage V BE  is represented as follows: 
     
         I.sub.C =I.sub.S (exp(qV.sub.BE /kT)-1)                    (5) 
    
     where q is the electron charge, k is Boltzmann&#39;s constant, T is absolute temperature, and I S  is the base-emitter reverse saturation current. 
     From equation (5), V BE  in equation (1) is: 
     
         V.sub.BE =(kT/q)ln(I.sub.C /I.sub.S +1)                    (6) 
    
     (V BE1  -V BE2 ) in equation (1) is: 
     
         V.sub.BE1 -V.sub.BE2 =(k/q){T.sub.1 ln(I.sub.1 /I.sub.S1 +1)-T.sub.2 ln(αI.sub.1 /I.sub.S2 +1),                          (7) 
    
     where T 1  is the base-emitter junction temperature of the transistor Q 1   and T 2  is the base-emitter junction temperature of the transistor Q 2 . 
     Since I S  is a fixed constant value specific to each transistor, I S2  =βI S1  where β is constant. Since the value I S  is small compared with the collector current (I C  /I S  &gt;&gt;1), the following equation (8) is established: 
     
         (I.sub.C /I.sub.S +1≈I.sub.C /I.sub.S              (8) 
    
     Equation (7) can be rewritten into the following equation (9) by using equation (8) above: 
     
         V.sub.BE1 -V.sub.BE2 ≈(k/q){T.sub.1 ln(I.sub.1 /I.sub.S1)-T.sub.2 ln(αI.sub.1 /βI.sub.S1)}                       (9) 
    
     In equation (9), provided that the junction temperature of the transistor is constant, then the following equation (10) is obtained: 
     
         V.sub.BE1 -V.sub.BE2 =(kT/q)ln(β/α)             (10) 
    
     In the above equation, since the value (V BE1  -V BE2 ) is constant, equation (4) can be simply expressed as follows; where (V BE1  -V BE2 ) is replaced by γ. 
     
         V.sub.OUT =(V.sub.IN +γ)·(R.sub.2 /R.sub.1) (11) 
    
     As can be appreciated from equation (11), the output voltage V OUT  is completely independent of the base-emitter voltage V BE  of each transistor. Input V IN  is boosted by an amplification factor depending on the ratio of the resistance R 2  to the resistance R 1 . This is attributed to the fact that the effects of the non-linearities of the transistors Q 1  and Q 2  due to the base-emitter voltages thereof are eliminated by making constant the ratio of currents flowing in the transistors Q 1  and Q 2 . 
     Although description has been made with respect to the case where the ratio of the current I 1  flowing in the emitter follower transistor Q 1  to the current I 2  flowing in the amplifying transistor Q 2  is constant (I 1  /I 2  =1/α), the foregoing description is also true for the case where the current I 1  is made to be equal to the current I 2  by the current mirror circuit 1. Specifically, in this case also, the output V OUT  is independent of the base-emitter voltage V BE  of each transistor, because it can be considered that V BE1  of the transistor Q 1  is equal to V BE2  of the transistor Q 2 . 
     The currents flowing in the various elements in the circuit shown in FIG. 1 will now be described in detail. If it is assumed that the currents flowing in the resistors R 2  and R 3  are equal to each other, each being represented by I E  -2I B  where I B  is the base current of each transistor, then the collector currents of the transistors Q 3  and Q 4   are equal to each other, each being I E  -3I B . The collector current I E  -3I B  of the transistor Q 4  is added to the base currents 2I B  of the two transistors and the resultant current I E  -I B  is applied to the collector of transistor Q 2 . Accordingly, the emitter current of the transistor Q 2  can be expressed by I E . On the other hand, from the collector current I E  -3I B , the current I B  is employed as the base current of the transistor Q 2  while the remaining current I E  -4I B  flows as the emitter current of the transistor Q 1 . 
     Accordingly, the emitter current of the two transistors Q 1  and Q 2  are I E  -4I B  and I E , respectively. That is, the difference between the emitter currents is 4I B . As a result, the base-emitter voltages of the two transistors are not completely equal to each other and the effects of the non-linearities thereof are not completely eliminated. However, in practice this can be neglected. 
     A circuit intended for completely cancelling the non-linearities is shown in FIG. 2, in which those components which have been described with reference to FIG. 1 are therefore similarly designated. Only components different from those in FIG. 1 will be described. In FIG. 1, the transistor Q 4  is diode-connected. However, in the circuit shown in FIG. 2, a PNP transistor Q 5  is additionally provided and the base and the collector of the transistor Q 4  are connected to the emitter and the base of the transistor Q 5 , respectively. Furthermore, the collector of the transistor Q 5  is connected to the collector of the transistor Q 3 . 
     Accordingly, by means of the transistor Q 5 , the base currents 2I B  of the transistors Q 3  and Q 4  are added to the collector current of the transistor Q 3  at the collector of the transistor Q 3  to provide a current I E  -I B . From the current I E  -I B , the current I B  is employed as the base current of the transistor Q 2  while the remaining current I E  -2I B  flows as the emitter current of the transistor Q 1 . 
     If the current amplification factor of the transistor Q 5  is large, the base current of the transistor will accordingly be small so that it can be neglected. Thus, in this case, the collector current I E  -3I B  of the transistor Q 4  substantially completely flows in the collector of the transistor Q 2 . Therefore, the emitter current of the transistor Q 2  is I E  -2I B  which is exactly equal to that of the transistor Q 1  and accordingly the base-emitter voltages of the two transistors are equal to each other. Thus, with the aid of the transistor Q 5 , the base currents of the transistors whose bases are connected to each other in the current mirror circuit 1 are supplied to the collector of the transistor Q 3  and accordingly to the emitter of the transistor Q 1  so that the effects of non-linearities due to the base-emitter voltages V BE  of the emitter follower transistor Q 1  and the amplifying transistor Q 2  are completely eliminated. 
     FIG. 3 shows a third embodiment of an amplifier according to the present invention in which the components which have been described with reference to FIG. 1 are similarly designated. In this embodiment, an output V OUT  is developed across the emitter resistor R 1  of the transistor Q 2  and both the transistors Q 1  and Q 2  are connected to form emitter follower circuits so that the gain of the amplifier is 1. In order to set a ratio of the currents flowing in the transistors Q 1  and Q 2  to be a desired value, a ratio of an emitter area of the transistor Q 3  to that of the transistor Q 4  is set to be a desired value while removing the resistors R 2  and R 3 . 
     In this circuit, the output V OUT  is expressed by the following equation: 
     
         V.sub.OUT =V.sub.IN +V.sub.BE1 -V.sub.BE2                  (12) 
    
     Furthermore, the value (V BE1  -V BE2 ) is expressed by the equation (10) similar to the embodiment shown in FIG. 1. Therefore, equation (12) is rewritten as follows: 
     
         V.sub.OUT =V.sub.IN +γ                               (13) 
    
     where γ is a constant value representing (V BE1  -V BE2 ). 
     Accordingly, the amplifier according to the third embodiment acts as a buffer amplifier which has an offset voltage γ and a gain 1. This amplifier is also advantageous in that it is free from distortion caused by the emitter-base voltage V BE  of each of the transistors. 
     In the above embodiments, a resistor element may be provided between the collector of the transistor Q 2  and the current mirror circuit 1 so that the output voltage can be developed thereacross. Furthermore, the resistor element may be provided between the collector of the transistor Q 1  and ground or between the emitter of the transistor Q 1  and the current mirror circuit 1. In the embodiments shown in FIGS. 1 and 2, the resistor R 3  is also available to derive the output voltage therefrom. 
     FIG. 4 shows a fourth embodiment of an amplifier according to the present invention which is suitable for obtaining a larger gain of amplification. The components similar to those shown in FIG. 1 are designated by similar characters or symbols. The current mirror circuit 1, as shown in FIG. 4, includes PNP transistors Q 3 , Q 4  and Q 6  and resistors R 2 , R 3  and R 5  connected respectively to the emitters of the transistors Q 4 , Q 3  and Q 6 . The bases of the transistors Q 4 , Q 3  and Q 6  are connected commonly to one another. The transistor Q 4  is diode-connected. That is, its base is connected to its collector. In this circuit arrangement, currents I 1  and I 2  respectively in the transistors Q 1  and Q 2  are set so that a ratio of I 1  /I 2  is 1/α where α is constant and a ratio of the current I 2  to current I 3  flowing in the resistor R 4  is set to be 1/α&#39; where α&#39; is constant. 
     In the circuit arrangement according to the fourth embodiment, equations (1) and (2)are also established and the voltage V B  on the common base line of the transistors in the current mirror circuit 1 is: 
     
         V.sub.B =V.sub.CC -V.sub.BE4 -I.sub.2 R.sub.2              (14) 
    
     If the equation (14) is rearranged using the equations (1) and (2), then: 
     
         V.sub.B =V.sub.CC -V.sub.BE4 -(R.sub.2 /R.sub.1)(V.sub.IN +V.sub.BE1 -V.sub.BE2)                                               (15) 
    
     Furthermore, the current I 3  can be represented by the following equation (16): 
     
         I.sub.3 =(V.sub.CC -V.sub.BE6 -V.sub.B)/R.sub.5            (16) 
    
     Therefore, the output V OUT  of the circuit is: 
     
         V.sub.OUT =I.sub.3 ·R.sub.4 =(R.sub.4 /R.sub.5)(V.sub.CC -V.sub.BE6 -V.sub.B)                                      (17) 
    
     If the equation (15) is substituted into the equation (17), then: 
     
         V.sub.OUT =(R.sub.4 /R.sub.5){V.sub.BE4 -V.sub.BE6 +(R.sub.2 /R.sub.1)(V.sub.IN +V.sub.BE1 -V.sub.BE2)}                (18) 
    
     In the equation (18), note that (V BE1  -V BE2 ) is constant (γ) as is appreciated from the equation (10). Further, (V BE4  -V BE6 ) is represented by: 
     
         V.sub.BE4 -V.sub.BE6 ≈(kT/q) ln(β&#39;/α&#39;)  (19) 
    
     where β&#39; is a ratio of I S  of transistor Q 6  to that of transistor Q 4 . The equation (19) is also constant, and if the same is expressed by γ&#39;, the equation (18) is rewritten as: 
     
         V.sub.OUT =(R.sub.4 /R.sub.5){γ&#39;+(R.sub.2 /R.sub.1)(V.sub.IN +γ)}                                                (20) 
    
     As is clear from the equation (20), the output V OUT  is independent of the base-emitter voltage V BE  of the transistors. Moreover, the output V OUT  is obtained by boosting the input V IN  by an amplification factor which is defined by the ratio of the resistances R 1  and R 2  and of the resistances R 4  and R 5 . 
     The currents at various points in the circuit in FIG. 4 will now be described in more detail. if it is assumed that the current flowing in the resistors R 2  and R 3  are equal to each other, each being represented by I E  -2I B  where I B  is the base current of each transistor, then the collector currents of the transistors Q 3  and Q 4  are equal to each other with each being represented by I E  -3I B . The collector current I E  -3I B  of the transistor Q 4  is added to the base currents 3I E  of the three transistors Q 3 , Q 4  and Q 6  at the collector of the transistor Q 2 . That is, a collector current I E  is applied to the collector of the transistor Q 2 . Accordingly, the emitter current of the transistor Q 2  is I E  +I B . From the collector current I E  3I B , the current I B  is employed as the base current of the transistor Q 2  while the remaining current I E  -4I B  flows as the emitter current of the transistor Q 1 . 
     Thus, the emitter currents of the two transistors Q 1  and Q 2  are I E  -4I B  and I E  +I B , respectively. Accordingly, the base-emitter voltages V BE  of the two transistors are not completely equal to each other, as in the embodiment of FIG. 1, and accordingly, the effects of the non-linearities thereof are not completely eliminated. However, this can be neglected, in practice. 
     In order to more completely cancel the non-linearities, a circuit as shown in FIG. 5 may be provided according to the invention. In FIG. 5, those components which have been previously described with reference to FIGS. 1 to 4 are similarly designated. Only components which are different from those in FIG. 4 will be described. 
     In FIGS. 1 and 4, the transistor Q 4  is diode-connected. Instead of this, in the circuit shown in FIG. 5, a PNP transistor Q 5  whose emitter and base are connected respectively to the base and collector of the transistor Q 4  is provided. The collector of the transistor Q 5  is connected to the collector of the transistor Q 3 . 
     Accordingly, by means of the transistor Q 5 , the base currents 3I B  of the transistors Q 3 , Q 4  and Q 6  are added to the collector current of the transistor Q 3  as a result of which a current I E  is obtained. From the current I E , the current I B  is employed as the base current of the transistor Q 2  while the remaining current I E  -I B  flows as the emitter current of the transistor Q 1 . 
     If the current amplification factor of the transistor Q 5  is selected to be large, then the base current of the transistor is sufficiently small that it can be neglected. Therefore, substantially all of the collector current of the transistor Q 4  flows in the collector of the transistor Q 2 . Accordingly, the emitter current of the transistor Q 2  is I E  -2I B . Thus, the difference between the emitter current of the transistor Q 2  and that of the aforementioned transistor Q 1  is only I B  and therefore the base-emitter voltages V BE  of the two transistors are more equal to each other than those in the circuit in FIGS. 1 and 4. 
     The circuit in FIG. 5 is so designed that, with the aid of the transistor Q 5 , the base currents of the transistors whose bases are connected to one another in the current mirror circuit are applied to the collector of the transistor Q 3  and accordingly to the emitter of the transistor Q 1 . Thus, the effects of the non-linearities of the emitter follower transistor Q 1  and the amplifying transistor Q 2  are completely eliminated. 
     As is clear from the above description, the invention provides a transistor amplifier of simple construction in which distortion is eliminated without negative feedback and which has a desired amplification factor.

Technology Category: 5