Patent Document

BACKGROUND OF THE INVENTION  
       [0001]     1. Technical Field  
         [0002]     The present invention generally relates to Micro-Electro-Mechanical Systems (MEMS). More particularly, the present invention relates to a MEMS structure including an anodically bonded silicon-on-insulator substrate.  
         [0003]     2. Background Information  
         [0004]     There has been a wide range of fabrication methods developed to fabricate microsensors and microactuators. These devices can be used for sensing, measurement and displacement in the range of micrometers or sub-micrometers. The sensitivity of such kind of devices can be high because of their extremely small dimensions. But their fabrication is quite a challenge due to the strict requirement of process reproducibility and wafer uniformity. Conventional fabrication methods have inherent non-uniformity across full wafer size in both thin film deposition and etching.  
         [0005]     It is a common practice to form a heavily B-doped silicon layer and use this as an etch stop to construct a thin silicon membrane. However, there are three key disadvantages associated with the use of a heavily boron-doped silicon layer. One is that the boron doping process requires a long drive-in time. If the silicon membrane thickness is large, it becomes practically impossible to fabricate a freely suspended membrane. The second disadvantage is that the etch chemical is very toxic to allow an acceptable etch stop on boron-doped silicon. Heavy silicon doping also introduces stress into the fabricated silicon membrane and performance degradation can result. A non-uniform boron doping profile (boron concentration decays as it goes deeper into the wafer) can also yield a membrane with a poorly defined interface.  
         [0006]     Thus, a need exists for a way to make a well-defined thin silicon membrane for a sensor.  
       SUMMARY OF THE INVENTION  
       [0007]     Briefly, the present invention satisfies the need for a well-defined thin silicon membrane for a sensor by incorporating an anodically bonded silicon-on-insulator (SOI) substrate with another substrate, the insulator layer serving as an excellent etch stop.  
         [0008]     In accordance with the above, it is an object of the present invention to provide a well-defined, thin silicon membrane for a sensor.  
         [0009]     It is another object of the present invention to provide a structure with a SOI substrate anodically bonded to a glass substrate.  
         [0010]     It is another object of the present invention to provide a way to create a structure with a SOI substrate anodically bonded on each side to a glass substrate, such that creation of the second anodic bond does not degrade the first anodic bond.  
         [0011]     The present invention provides, in a first aspect, a method of making a MEMS structure. The method comprises providing a SOI substrate and a second substrate. The SOI substrate has a first silicon layer, a second silicon layer and an insulator layer between the first silicon layer and the second silicon layer. The SOI substrate and second substrate are anodically bonded without electrically bypassing the insulator layer.  
         [0012]     The present invention provides, in a second aspect, a method of making a MEMS structure. The method comprises providing a SOI substrate. The SOI substrate has a first silicon layer, a second silicon layer and an insulator layer between the first silicon layer and the second silicon layer. The method also comprises electrically isolating the insulator layer therein. The method further comprises providing a second substrate, and anodically bonding the SOI substrate and the second substrate.  
         [0013]     The present invention provides, in a third aspect, a sensor. The sensor comprises a SOI substrate having a first silicon layer, a second silicon layer and an insulator layer between the first silicon layer and the second silicon layer, and a second substrate anodically bonded to the SOI substrate at the first silicon layer. The sensor further comprises a membrane in the first silicon layer, and at least one electrical contact coupled to the second substrate for detecting deflection of the membrane.  
         [0014]     The present invention provides, in a fourth aspect, a method of making a sensor. The method comprises providing a SOI substrate having a first silicon layer, a second silicon layer and an insulator layer between the first silicon layer and the second silicon layer, and anodically bonding a second substrate to the SOI substatrate at the first silicon layer. The method further comprises creating a membrane in the first silicon layer, and coupling at least one electrical contact to the second substrate for the detecting deflection of the membrane.  
         [0015]     The present invention provides, in a fifth aspect, a MEMS structure. The structure comprises a SOI substrate having a first silicon layer, a second silicon layer and an insulator layer between the first silicon layer and the second silicon layer. The structure further comprises a first glass substrate anodically bonded by a first bond to the SOI substrate at the first silicon layer, and a second glass substrate anodically bonded by a second bond to the SOI substrate at the second silicon layer. The first bond and the second bond are roughly equal in strength.  
         [0016]     The present invention provides, in a sixth aspect, a method of making a MEMS structure. The method comprises providing a SOI substrate having a first silicon layer, a second silicon layer and an insulator layer between the first silicon layer and the second silicon layer. The method further comprises anodically bonding a first glass substrate to the SOI substrate at the first silicon layer, thereby creating a first bond, and anodically bonding a second glass substrate to the SOI substrate at the second silicon layer, thereby creating a second bond. The method also comprises preventing debonding of the first bond during creation of the second bond.  
         [0017]     These, and other objects, features and advantages of this invention will become apparent from the following detailed description of the various aspects of the invention taken in conjunction with the accompanying drawings. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0018]      FIG. 1  is cross-sectional view of a silicon-on-insulator (SOI) substrate prior to processing in accordance with the present invention.  
         [0019]      FIG. 2  depicts the SOI substrate of  FIG. 1  after initial patterning and etching.  
         [0020]      FIG. 3  depicts the SOI substrate of  FIG. 2  after additional patterning and etching.  
         [0021]      FIG. 4  depicts the SOI substrate of  FIG. 3  after the creation of electrical contacts thereon.  
         [0022]      FIG. 5  is a cross-sectional view of a glass substrate prior to processing thereof in accordance with the present invention.  
         [0023]      FIG. 6  depicts the glass substrate of  FIG. 5  after patterning and etching.  
         [0024]      FIG. 7  depicts the glass substrate of  FIG. 6  after creation of an electrical contact thereon.  
         [0025]      FIG. 8  depicts the glass substrate of  FIG. 7  after ultrasonic drilling thereof.  
         [0026]      FIG. 9  depicts the SOI substrate of  FIG. 4  and the glass substrate of  FIG. 8  after anodic bonding thereof.  
         [0027]      FIG. 10  is an exploded view of an alternative anodic bonding process for SOI and glass.  
         [0028]      FIG. 11  depicts the structure of  FIG. 9  after patterning and etching through the handle layer up to the insulator layer of the SOI substrate.  
         [0029]      FIG. 12  depicts the structure of  FIG. 1  after removal of a portion of the insulator layer of the SOI substrate to create a thin silicon membrane.  
         [0030]      FIG. 13  depicts a pressure sensor, comprising the structure of  FIG. 12  after anodically bonding a second glass substrate to the handle layer of the SOI substrate.  
         [0031]      FIG. 14  is an exploded view showing more detail regarding the anodic bonding of  FIG. 13 .  
         [0032]      FIG. 15  depicts an acoustic sensor in accordance with the present invention.  
         [0033]      FIG. 16  depicts an accelerometer in accordance with the present invention. 
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0034]      FIG. 1  is a cross-sectional view of a silicon-on-insulator (SOI) substrate  100  prior to processing thereof in accordance with the present invention. SOI substrate  100  comprises a first silicon layer  102 , also referred to as the device layer, a second silicon layer  104 , also referred to as the handle layer, and an insulator layer  106  therebetween. The insulator layer comprises silicon dioxide (SiO 2 ).  
         [0035]      FIG. 2  depicts the SOI substrate  100  of  FIG. 1  after photoresist patterning and etching to create a recess  200  in the device layer  102 .  
         [0036]      FIG. 3  depicts the SOI substrate  100  of  FIG. 2  after the creation of trenches  300  and  302 . The trenches are created, for example, by photoresist patterning and etching, using, for example, a Bosch process known in the art. As one skilled in the art will know, the Bosch process involves a sequence of alternating etch and deposition to fabricate high aspect ratio silicon structures while the substrate temperature is controlled near room temperature.  
         [0037]      FIG. 4  depicts the SOI substrate  100  of  FIG. 3  after the creation of electrical contacts  400  and  402  thereon. The contacts comprise, for example, a multi layer metal film of gold (Au) and a titanium (Ti)/tungsten (W) alloy. The contacts can be created by, for example, sputtering the Ti/W alloy first as an adhesion layer, then the gold across the substrate, spinning photoresist on top of the gold, and patterning the photoresist to remove it everywhere except on top of where the contacts are desired. Finally, the metal film is removed everywhere except where it is protected by the photoresist, and then the remaining photoresist above the gold contacts is removed. Contacts  400  and  402  will provide external electrical contact points in use.  
         [0038]      FIG. 5  is a cross-sectional view of a glass substrate  500  prior to processing thereof in accordance with the present invention. The glass substrate comprises, for example, PYREX 7740 available from Corning Corporation, Corning, N.Y. As another example, Hoya SD-2, available from Hoya Corporation USA in San Jose, Calif., could be used. In general, the glass that is used is rich in sodium (for anodic bonding, further described below), and has a thermal coefficient of expansion that closely matches that of silicon.  
         [0039]      FIG. 6  depicts the glass substrate  500  of  FIG. 5  after creation of recesses  600 ,  602  and  604  therein. The recesses are created by, for example, standard photoresist patterning and etching techniques comprising either a dry or wet process, or a combination of both dry and wet.  
         [0040]      FIG. 7  depicts the glass substrate  500  of  FIG. 6  after creation of electrode and electrical contact  700  thereon. The contact comprises, for example, a multi layer metal film of gold and a tungsten/titanium alloy. The contact can be created, for example, by applying the metal film across the substrate surface, applying and patterning photoresist, and removing the metal film everywhere except where the contact is sought to be created. The remaining photoresist above the gold contact can then be removed.  
         [0041]      FIG. 8  depicts the glass substrate  500  of  FIG. 7  after creation of recesses  800  and  802  therein. The recesses can be created by, for example, ultrasonic drilling, plasma dry etch or laser drilling.  
         [0042]      FIG. 9  depicts a semiconductor structure  900  in accordance with the present invention. Semiconductor structure  900  comprises glass substrate  500  and SOI substrate  100  anodically bonded at interface  902 . As one skilled in the art will know, anodic bonding involves applying a high DC voltage potential of about 1000 V across the interface to generate an electric field, applying pressure of about 30,000 Pascal and exposing to temperatures of about 400° C., that together drive Na +  ions in the glass substrate away from the interface region. A Na +  depletion zone is thus formed that leaves oxygen atoms highly reactive at the interface. Oxygen atoms in device layer  102  of SOI substrate  100  form a chemical bond Si—O, which provides a strong bond between the substrates, due to the permanent covalent bond within the silicon dioxide that is formed.  
         [0043]     Unexpectedly, it was found that anodic bonding could be accomplished with the SOI substrate without electrically bypassing the insulator layer. The natural assumption, due to the presence of the insulator layer in the SOI substrate, is that the insulator layer would prevent an electrical path from fully forming so as to enable the anodic bonding. However, it is now thought that the potential difference that is used in anodic bonding is enough to open a path in the insulator layer without electrically coupling the two silicon layers in the SOI substrate.  
         [0044]      FIG. 10  depicts the anodic bonding of SOI wafer  1000  and glass wafer  1002  using an optional conductive path  1004  to electrically couple device layer  1006  and handle layer  1008 , thereby electrically isolating the insulator layer  1010 . Conductive path  1004  can be created in a number of ways, for example, the use of a metallic paste, the use of a metal clamp, or the use of metal sputtering deposition at the edge of the SOI wafer. Also shown in  FIG. 10  are electrodes  1012  and  1014  for enabling the potential across an interface between the SOI and glass wafers. Although as noted with respect to  FIG. 9 , the conductive path between the silicon layers is not necessary for enabling anodic bonding, it is possible that the large potential used in anodic bonding may initially or eventually damage the insulator layer of the SOI wafer, or lead to a partial breakdown thereof. For example, depending on the quality of the oxide, an electric field strength on the order of 105-107 V/cm can cause oxide breakdown. Finally, although not shown in  FIG. 10 , it will be understood by one skilled in the art that the flat of the glass and silicon wafers are rotated by 90 degrees with respect to each other in order to allow electrical contact to the silicon wafer and assist with coarse alignment.  
         [0045]      FIG. 11  depicts the semiconductor structure  900  of  FIG. 9  after being flipped for processing of the handle layer  104  of SOI substrate  100 . As shown in  FIG. 11 , recesses  1100 ,  1102  and  1104  have been created in handle layer  104 . As shown, one way to create the recesses in semiconductor structure  900  is to deposit a layer of chromium  1106  on top of handle layer  104 , and cover the chromium layer with photoresist  1108 . The photoresist is patterned and the chromium removed in the areas over the locations in the handle layer where the recesses are sought to be created. Chromium can be removed, for example, using Chromium Etchant 1020, available from Transene Company, Inc., Danvers, Mass. The handle layer is then etched, for example, using a Bosch process.  
         [0046]      FIG. 12  depicts the semiconductor structure  900  of  FIG. 11  after selective removal of insulator layer  106  in SOI substrate  100 , creating trenches  1200  and  1202 , as well as thin silicon membrane or diaphragm  1204 . The thickness of the membrane varies, for example, from about 1 micron to about 20 microns, depending on the application.  
         [0047]      FIG. 13  depicts a pressure sensor  1300  in accordance with the present invention. Pressure sensor  1300  comprises semiconductor structure  900  from  FIG. 12  anodically bonded at handle layer  104  of SOI substrate  100  to a second glass substrate  1302  having an opening therein  1304  corresponding to the recess in handle layer  104  leading to membrane  1204 . Opening  1304  comprises a first portion  1306  corresponding to the recess in the SOI substrate, and a larger, counterbored portion  1308 . The counterboring is done to fit the fabricated device to the packaging. As one skilled in the art will know, thin glass covers  1310  and  1312  protect contacts  400  and  402 , respectively, during processing and would be removed prior to use. Membrane diameters for the pressure sensor can range, for example, from about 25 microns to about 5000 microns, with a measurement range from about 10 mTorr to about 100 Torr.  
         [0048]     It should be noted that in creating the anodic bond between SOI substrate  100  and the second glass substrate  1302 , there is the potential for debonding of the anodic bond between glass substrate  500  and SOI substrate  100 . As shown in  FIG. 14 , the potential for debonding is addressed by equalizing the electrical potential between both silicon layers of the SOI substrate. As shown in  FIG. 14 , a conductor  1400  along an edge of the SOI wafer is used, similar to that described with respect to  FIG. 10 . In addition, glass wafer  500  and SOI wafer  100  are arranged such that the SOI wafer is exposed at area  1402 , and a conductor  1404  (e.g., a spiral metal spring) is employed to electrically couple electrode  1406  and device layer  102  of the SOI wafer. Conductor  1400  then provides an electrical path from electrode  1406  to handle layer  104  in the SOI wafer. In this way, the potential difference between the silicon layers of the SOI wafer and electrode is equalized with no potential drop across the glass wafer, thereby preventing debonding of the anodic bond with glass wafer  500  when the SOI wafer and glass wafer  1302  are anodically bonded, using electrodes  1406  and  1408 . The result is that the strength of the anodic bonds is roughly equal, since no debonding of the first anodic bond has occurred and the glass wafers comprise the same material.  
         [0049]      FIG. 15  depicts an acoustic sensor  1500  that can be created with the same process flow used to create the pressure sensor, though the mask layout would be different and no second glass substrate is necessary. Acoustic sensor  1500  comprises SOI substrate  1502  and glass substrate  1504  anodically bonded thereto, including a plurality of electrical contacts  1506  similar to those in the pressure sensor, a plurality of openings  1508  in the glass substrate (created, e.g., with ultrasonic drilling), and a thin silicon membrane or diaphragm  1510 . The membrane thickness ranges, for example, from about 1 micron to about 30 microns.  
         [0050]      FIG. 16  depicts another device that can be made using the process flow of the present invention with a different mask layout and no second glass substrate. In this case,  FIG. 16  depicts an accelerometer  1600 . The accelerometer comprises SOI substrate  1602 , glass substrate  1604  anodically bonded thereto, electrical contact  1606  and thin silicon membrane  1608  with opening  1610  therein. Lateral dimensions for the accelerometer can range, for example, from about 25 microns to about 5000 microns.  
         [0051]     While several aspects of the present invention have been described and depicted herein, alternative aspects may be effected by those skilled in the art to accomplish the same objectives. Accordingly, it is intended by the appended claims to cover all such alternative aspects as fall within the true spirit and scope of the invention.

Technology Category: 7