Patent Document

CROSS REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application claims priority to U.S. Provisional Patent Application No. 61/733,166 filed on Dec. 4, 2012, the contents of which are incorporated by reference herein in its entirety. 
     
    
     TECHNICAL FIELD 
       [0002]    The present disclosure relates generally to integrated circuit (IC) designs, and more particularly to a reference voltage circuit. 
       BACKGROUND 
       [0003]    The increase in demand for portable devices and technology scaling are driving down the supply voltages of digital circuits. A voltage reference generator is used in many integrated circuits (ICs). The bandgap reference generator which can operate from a 1V supply is widely used, for example, in DRAM and flash memories. A bandgap voltage reference should be insensitive to temperature, power supply and load variations. 
         [0004]    One principle of operation of bandgap circuits relies on two groups of diode-connected bipolar junction transistors (BJT) running at different emitter current densities. By canceling the negative temperature dependence of the PN junctions in one group of transistors with the positive temperature dependence from a PTAT (proportional-to-absolute-temperature) circuit which includes the other group of transistors, a fixed DC voltage output, Vref, which doesn&#39;t substantially change with temperature is generated. This reference voltage is typically 1.26 volts, which is approximately equal to the bandgap voltage of silicon. 
         [0005]    Recent IC designs sometimes require sub-1 volt operation regions. Additionally, for integrated circuits used in thermal sensors or three-dimensional (3-D) IC applications, for example, it is desirable to have a very small temperature coefficient bandgap reference voltage in order to sense temperature variations. Some bandgap reference circuits, however, can become unstable or lose accuracy as a result of variation in input offset voltages applied to an operational amplifier of the bandgap reference circuit and/or current mirror mismatch effects. However, at low input offset voltages applied to the operational amplifier, the current mirror mismatch effect will dominate and can degrade the accuracy and performance of such bandgap reference circuits. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWING 
         [0006]    The present disclosure is best understood from the following detailed description when read in conjunction with the accompanying drawings. It is emphasized that, according to common practice, the various features of the drawings are not necessarily to scale. On the contrary, the dimensions of the various features may be arbitrarily enlarged or reduced for clarity or emphasis. Like numerals denote like features throughout the specification and drawings. 
           [0007]      FIG. 1  illustrates a simplified schematic diagram of a bandgap reference circuit without a current a mirror, in accordance an embodiment of the disclosure. 
           [0008]      FIG. 2  illustrates a table that shows a comparison of various operating parameters of another bandgap reference circuit when compared to an exemplary bandgap reference circuit in accordance with an embodiment of the disclosure. 
           [0009]      FIG. 3  illustrates a graph plot showing temperature coefficient (TCF) ppm vs. the number of Monte Carlo computer simulations performed on another bandgap circuit (series 1) compared to an exemplary bandgap circuit of the present disclosure (series 2). 
           [0010]      FIG. 4  illustrates a graph plot showing Vref vs. the number of Monte Carlo computer simulations performed on another bandgap circuit (series 1) compared to an exemplary bandgap circuit of the present disclosure (series 2). 
       
    
    
     DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS 
       [0011]    Exemplary embodiments of the disclosure are described in detail below with reference to the figures As would be apparent to one of ordinary skill in the art after reading this description, these embodiments are merely exemplary and the disclosure is not limited to these examples. It is to be understood that other embodiments may be utilized and structural changes may be made without departing from the scope of the present disclosure. 
         [0012]      FIG. 1  illustrates a bandgap reference voltage circuit  200 , which does not have a current mirror, in accordance with an embodiment of the disclosure. As shown in  FIG. 1 , the bandgap reference circuit  200  includes three sub-circuits  20 ,  22  and  24 . 
         [0013]    The first sub-circuit  20  includes two bipolar transistors  202  and  204 , five resistive devices  206 ,  208 ,  210 ,  212  and  214 , two MOSFET transistors  224  and  226 , and a first differential amplifier  228 . The second sub-circuit  22  includes two differential amplifiers  230  and  232 . The third sub-circuit  24  includes four resistive devices  216 ,  218 ,  220  and  222 , and a fourth differential amplifier  234 . The functionality of each of the sub-circuits  20 ,  22  and  24  are described generally below, followed by a more detailed, component-level discussion of the operation of the bandgap reference circuit  200 . 
         [0014]    In one embodiment, the first sub-circuit generally operates in a current mode to provide temperature compensated reference currents through resistive devices  206 ,  208 ,  210 ,  212  and  214 , bipolar transistors  202  and  204  and MOSFET transistors  224  and  226 . As shown in  FIG. 1 , the temperature-compensated reference currents I 1  and I 2  generate corresponding temperature-compensated reference voltages V P  and V P2 , which can be adjusted or tuned to desired levels by selecting appropriate resistance values for resistive devices  206 ,  208 ,  210 ,  212  and  214 . A more detailed discussion of how the first sub-circuit  20  generates temperature compensated voltages V P  and V P2 , in accordance with one embodiment, is provided below. 
         [0015]    The temperature-compensated voltages V P  and V P2  are provided as input voltages to the second sub-circuit  22 . In one embodiment, the second sub-circuit  22  generally functions as a buffer amplifier that provides electrical impedance transformation between the first sub-circuit  20  and the third sub-circuit  24 . Generally, the second differential amplifier  230  receives V P2  at its positive input, with its negative input tied to its output. Thus, one purpose of the second differential amplifier  230  is to provide a voltage buffer for sensing V P2  and outputting a corresponding reference voltage V REF1 . Similarly, the third differential amplifier  232  receives V P  at its positive input, with its negative input tied to its output, as shown in  FIG. 1 . Thus, one purpose of the third differential amplifier  232  is to provide a voltage buffer for sensing V P  and outputting a corresponding reference voltage V REF2 . 
         [0016]    The third sub-circuit  24  receives reference voltages V REF1  and V REF2  from the second sub-circuit  22  and generally functions as a swing-buffer circuit to sense V REF1  and V REF2  and output a desired bandgap reference voltage V REF . As shown in  FIG. 1 , V REF1  is provided to a first terminal of resistive device  216 . Resistive devices  216  and  220  adjust the value of V REF1  to a desired level, which is then provided to a positive input of the fourth differential amplifier  234 , as shown in  FIG. 1 . Similarly, V REF2  is provided to a first terminal of resistive device  218 . Resistive devices  218  and  222  adjust the value of V REF2  to a desired level, which is then provided to a negative input of the fourth differential amplifier  234 . By adjusting the resistance ratios of resistive devices  216 ,  218 ,  220  and  222  the third sub-circuit  24  can fine tune the output of the fourth differential amplifier  234  to provide a desired bandgap reference voltage V REF . 
         [0017]    A more detailed discussion of each of the components and operation of the bandgap reference circuit  200 , in accordance with one embodiment, is provided below. 
         [0018]    In one embodiment, the bandgap reference voltage circuit  200  includes two bipolar transistors  202  and  204 , as shown in  FIG. 1 . In this embodiment, the two bipolar transistors  202  and  204  are PNP bipolar transistors having their base terminals coupled to ground and their collector terminals also coupled to ground. The emitter of the first PNP bipolar transistor  202  is coupled to a first terminal of resistive device  206  and the emitter of the second PNP bipolar transistor  204  is coupled to a first terminal of the resistive device  208 . A second terminal of the resistive device  206  is coupled to a first terminal of resistive device  210  and a second terminal of resistive device  210  is coupled to a drain terminal of the first MOSFET transistor  224 . A second terminal of resistive device  208  is coupled to a drain terminal of the second MOSFET transistor  226 . 
         [0019]    In an embodiment, the first and second MOSFET transistors  224  and  226  are PMOS transistors having their sources coupled to a voltage source V DD . The gate terminals of the PMOS transistors  224  and  226  are both coupled to an output of a differential amplifier  228 . A first terminal of resistive device  212  is coupled to ground while a second terminal of resistive device  212  is coupled to a positive input terminal of the differential amplifier  228 . The second terminal of resistive device  206  is also coupled to the second terminal of resistive device  212  and the positive input terminal of the differential amplifier  228 . A first terminal of resistive device  214  is coupled to ground while a second terminal of resistive device  214  is coupled to a negative input terminal of the differential amplifier  228  and the first terminal of resistive device  208 . The differential amplifier  228  senses the voltage difference between its positive and negative terminals and outputs a regulated voltage to control the PMOS transistors  224  and  226 . 
         [0020]    In an embodiment, a bandgap reference circuit generates one or more temperature-compensated voltages (e.g., V P  and V P2  in  FIG. 1 ), as discussed in further detail below. Referring to  FIG. 1 , for example, the voltage drop across the base-emitter junction, Vbe, of the bipolar junction transistors  202  and  204  changes in a Complementary-to-Absolute-Temperature (CTAT) fashion. Whereas if the two bipolar transistors  202  and  204  operate with unequal emitter current densities, for example, due to the extra resistive device  206  coupled between the emitter of the transistor  202  and resistive device  210 , then the difference in the base-emitter voltages, ΔVbe, between the transistors  202  and  204  changes in a Proportional-To-Absolute-Temperature (PTAT) fashion. The PTAT relationship is given by ΔVbe=V T (In(n)), where V T =kT/q, k is Boltzmann&#39;s constant, T is the absolute temperature, q is the electron charge and n is the ratio of the current densities of the two bipolar transistors  202  and  204 . The PTAT voltage (i.e., the difference in the base-emitter voltages, ΔVbe, between transistors  202  and  204 ) may be added to the CTAT voltage (i.e., the voltage drop across the base-emitter junction, Vbe, of the bipolar junction transistors  202  and  204 ) with suitable weighting constants to obtain a constant reference voltage. 
         [0021]    During operation, the voltage at the positive terminal of differential amplifier  228  will reach a higher level than the voltage at the negative input terminal due to the resistive device  206 . This allows the differential amplifier  228  to output a regulated signal at its output that will turn on the PMOS transistors  224  and  226 . The feedback loop consisting of a differential amplifier  228  and the PMOS transistors  224  and  226  coupled with the voltage source, V DD , forces the voltages at the positive and negative input terminals of the differential amplifier  228  to be equal. Consequently the current through the resistive device  212  (I 2 ) is proportional to the base-emitter junction voltage, Vbe, of the transistors  202  and  204  and the current through the resistive device  206  (I 1 ) is proportional to the difference of the two base-emitter junction voltages of the transistors  202  and  204  (ΔVbe). Setting the resistive device  212  equal to resistive device  214  makes their currents the same. Since the current flowing through the PMOS  224  is the sum of currents through resistive devices  206  and  212  (I 1 +I 2 ), it will be proportional to Vbe+αΔVbe, which provides a substantially temperature independent reference. This is based on the fact that the two terms in the sum (Vbe and ΔVbe) have temperature coefficients of different sign and thus by adjusting the multiplication constant α, they can be made to cancel each other. Thus, the sum of the currents through resistive devices  206  and  212  (I 1 +I 2 ), which equals the current through resistive device  210 , are temperature compensated currents that generate temperature-compensated voltages V P  and V P2 , as discussed further below. 
         [0022]    As the voltage levels change at both the positive and negative terminals of the differential amplifier  228  during the operation of the bandgap reference circuit  200 , the differential amplifier  228  will continue to sense the voltage difference between the two input terminals to provide a regulated signal at its output to control the PMOS transistors  224  and  226 , thereby further adjusting the level of current (I 1 +I 2 ) across resistive devices  206 ,  210  and  212 , which sets the voltage (V P ) at the positive input terminal of the differential amplifier  228 , and the level of current across resistive devices  208  and  214 , which sets the voltage at the negative terminal of the differential amplifier  228 . As showin in  FIG. 1 , the voltage V P2  at the drain terminal of the PMOS transistor  224  also depends on the value of the sum of the currents (I 1 +I 2 ) through resistive devices  206 ,  210  and  212 . Thus, V P  and V P2  constitute temperature-compensated voltages because their value depends on the value of the temperature-compensated current sum (I 1 +I 2 ). These temperature-compensated reference voltages are then provide to the second sub-circuit  22 , as described below. 
         [0023]    Instead of having the output of the differential amplifier  228  coupled to a gate of a third PMOS transistor of a current mirror as in another approach, for example, the bandgap circuit of  FIG. 1  couples the drain terminal of PMOS transistor  224  (and hence V P2 ) to a positive input terminal of a second differential amplifier  230 . Additionally, the positive input terminal of the first differential amplifier  228  (and hence V P ) is coupled to a positive input terminal of a third differential amplifier  232 . 
         [0024]    The output of the second differential amplifier  230  is fed back to a negative input terminal of the amplifier  230  and outputs a first circuit reference voltage shown in  FIG. 1  as V REF1 . The output of the third differential amplifier  232  is fed back to a negative input terminal of the amplifier  232  and outputs a second circuit reference voltage shown in  FIG. 1  as V REF2 . The outputs, V REF1  and V REF2 , of the second and third differential amplifiers  230  and  232 , respectively, are then provided to the positive and negative inputs of a fourth differential amplifier  234  through two respective serial resistive devices  216  and  218 , as shown in  FIG. 1 . A first terminal of a resistive device  220  is coupled to the supply voltage VDD while a second terminal of the resistive device  220  is coupled to the positive terminal of the fourth differential amplifier  234 . A first terminal of a resistive device  222  is coupled to an output of the fourth differential amplifier  234  while a second terminal of the resistive device  222  is coupled to the negative input terminal of the fourth differential amplifier  234 . Thus, the output of the fourth differential amplifier  234  is fed back to the negative input terminal of the amplifier  234  through serial resistive device  222 . 
         [0025]    The output of the fourth differential amplifier  234  is the bandgap reference voltage (V REF ) provided by the bandgap reference circuit shown in  FIG. 1 , in accordance with an embodiment. Based on the circuit described above and illustrated in  FIG. 1 , a bandgap function in accordance with one embodiment can be expressed by the following equations: 
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         [0000]    where R 1  corresponds to the resistance value of resistive device  212 , R 2  corresponds to the resistance value of resistive device  214 , R 3  corresponds to the resistance value of resistive device  206 , R 5  corresponds to the resistance value of resistive device  210 , R 6  corresponds to the resistance value of resistive device  208 , R 7  corresponds to the resistance value of resistive device  216 , R 8  corresponds to the resistance value of resistive device  218 , R 9  corresponds to the resistance value of resistive device  220 , V REF1  is the output of the second differential amplifier  230 , V REF2  is the output of the third differential amplifier  232 , V OS1  is the difference in input voltages at the positive and negative terminals of the second differential amplifier  230 , V OS2  is the difference in input voltages at the positive and negative terminals of the third differential amplifier  232 , V OS3  is the difference in input voltages at the positive and negative terminals of the fourth differential amplifier  234 , V OS4  is the difference in input voltages at the positive and negative terminals of the first differential amplifier  228 , V P  is the input voltage at the positive input terminal of the third differential amplifier  232 , V P2  is the input voltage at the positive input terminal of the second differential amplifier  230 , V EB2  is the base-emitter voltage of PNP transistor  204 , and V T (In(n)) was defined above. 
         [0026]    In an embodiment, the following resistive device values can be used: R 1 =R 2 =6 KOhms; R 3 =1 K Ohm; R 5 =R 6 =60 K Ohms; R 7 =R 8 =2 K Ohms; and R 9 =40 K Ohms. If V REF  is set to be equal to 0.6 volts, and V OS4  is set to be 1 mV, the total error in V REF  is equal to approximately 3.5 mV, which leads to approximately a 0.49% accuracy range based on Monte Carlo computer simulations. 
         [0027]    Thus, the exemplary bandgap circuit described above and illustrated in  FIG. 1  greatly increases the accuracy of a reference voltage when compared to other bandgap reference circuits. As shown in the table provided in  FIG. 2 , over a temperature range of −25 to 125 degrees Celsius, with a supply voltage of 1.8 volts, the standard variation of the VREF accuracy of the bandgap circuit in accordance with an embodiment of the disclosure when compared to another bandgap reference circuit improved from 2.10% to 0.80% accuracy. The standard variation of the temperature coefficient (TCF) improved from 30 ppm to 10 ppm (10 −6 ). While current load increased from 300 uA to 600 uA. 
         [0028]      FIG. 3  illustrates a plot diagram of the standard variation of the temperature coefficient (TCF) of another bandgap reference circuit (series 1) and that of the bandgap reference circuit of  FIG. 1  (series 2) as a function of increasing numbers of Monte Carlo computer simulations of the circuits. As shown in  FIG. 3 , all the TCF values for series 2 fall approximately at 10.00 ppm with little variance between values. In contrast, the TCF values for series 1 range from approximately 6.00 ppm to as high as 30.00 ppm. Thus, the TCF of the bandgap circuit of  FIG. 1  (series 2) is significantly more stable and accurate than that of other bandgap reference circuits (series 1). 
         [0029]      FIG. 4  illustrates a plot diagram of the standard variation of the accuracy of the reference output voltage (V REF ) of another bandgap reference circuit (series 1) and that of the bandgap reference circuit of  FIG. 1  (series 2) as a function of increasing numbers of Monte Carlo computer simulations of the circuits. As shown in  FIG. 4 , the V REF  standard variation of the bandgap circuit of  FIG. 1  (series 2) is relatively constant at −7.08E-01, while the standard variation of another bandgap circuit had a much larger range between −6.98E-01 to −7.16E-01. Thus, the V REF  standard variation of the bandgap circuit of  FIG. 1  (series 2) is significantly more stable and accurate than that of other bandgap reference circuits. 
         [0030]    While at least an exemplary embodiment has been presented in the foregoing detailed description, it should be appreciated that many variations are possible. It should also be appreciated that the exemplary embodiment or exemplary embodiments are only examples, and are not intended to limit the scope, applicability, or configuration of the disclosure in any way. Rather, the foregoing detailed description will provide those of ordinary skill in the art with an enabling description and guidance for implementing the exemplary embodiment or exemplary embodiments. It should be understood that various changes can be made in the function and arrangement of elements without departing from the scope of the disclosure. For example, various types of reference voltage circuits may be made in accordance with the principles described in the present disclosure. Thus, the breadth and scope of the invention should not be limited by any of the above-described exemplary embodiments but, rather, be accorded a scope consistent with the claims presented below.

Technology Category: g