Patent Document

RELATED APPLICATIONS 
     This application claims the benefit of U.S. Provisional Application No. 60/722,308, filed Sep. 30, 2005. This application is herein incorporated in its entirety by reference. 
    
    
     FIELD OF THE INVENTION 
     The present invention relates to medium wavelength infrared (MWIR) narrow band emitters and more particularly to the heater and photonic band gap heater element used in such emitters 
     BACKGROUND OF THE INVENTION 
     In the manufacture of MWIR narrow band emitters, it was heretofore the practice to etch holes in a substrate and heat the substrate from behind. The resulting structure would act as a filter allowing only a narrow window of the IR radiation through. There was no gain in efficiency and the tolerances in manufacturing were not easy to achieve. In addition the previous method and structure used gold. The emissivity of gold is very low, also adding to the low power efficiency. 
     There is, therefore, a need for a more efficient process for manufacturing MWIR narrow band emitters. In particular, there is a need to integrate the additive tungsten CVD process of the present invention allows for better control of the device parameters. 
     BRIEF SUMMARY OF THE INVENTION 
     One embodiment of the present invention is a method for manufacturing a MWIR emitter comprising the step of using a chemically polished tungsten array combined with a passive hermetic barrier and mirror to create a high performance emitter. In addition, the heater of the present invention is a metal photonic band gap (PBG) filter. By using a high emissivity material like tungsten we are able to develop greater energy densities at the photonic band gap structure. 
     One embodiment of the present invention provides a device for medium wavelength infrared emission, that device having: a semiconductor substrate; a passive hermetic barrier disposed upon the substrate; an emitter element disposed within the passive hermetic barrier; and a mirror. 
     Another embodiment of the present invention provides such a device further comprising a cavity disposed in the substrate. 
     A further embodiment of the present invention provides such a device wherein the semiconductor substrate comprises silicon. 
     Yet another embodiment of the present invention provides such a device wherein the mirror comprises gold. 
     A yet further embodiment of the present invention provides such a device wherein the hermetic barrier comprises a nitride. 
     Even another embodiment of the present invention provides such a device wherein the nitride is selected from the group of nitrides consisting of silicon nitride and boron nitride. 
     One embodiment of the present invention provides a method of manufacturing an integrated medium wavelength infrared emitter, the method comprising: providing a substrate; applying a first barrier layer to the substrate; depositing a mold layer disposed on the first barrier layer; planarizing the mold layer; etching the mold layer thereby creating at least one emitter mold; depositing emitter material upon the mold layer and in the emitter mold; chemically polishing excess the emitter material; and removing the mold layer by etching. 
     Another embodiment of the present invention provides such a method further comprising etching a well into the substrate between a first and second the emitter. 
     A further embodiment of the present invention provides such a method further comprising applying a second barrier layer to the emitter material. 
     Yet another embodiment of the present invention provides such a method further comprising depositing a reflective coating on the second barrier. 
     A yet further embodiment of the present invention provides such a method wherein the reflective coating comprises gold. 
     Even another embodiment of the present invention provides such a method wherein the reflective coating is between 250 and 500 angstroms thick. 
     An even further embodiment of the present invention provides such a method further comprising etching the substrate thereby forming wells prior to applying the first barrier layer. 
     Yet another wherein the first barrier layer comprises a barrier material selected from the group of barrier materials consisting of boron nitride and silicon nitride. 
     A yet further embodiment of the present invention provides such a method wherein the mold layer comprises silicon dioxide. 
     Still another embodiment of the present invention provides such a method further comprising etching the substrate thereby creating wells after removing the mold layer by etching. 
     A still further embodiment of the present invention provides such a method wherein the emitter material is selected from the group of emitter materials consisting of tungsten, silicon carbide, carbon and alloys thereof. 
     One embodiment of the present invention provides an integrated middle wavelength infrared emitter manufactured by a method comprising: providing a substrate; applying a thin silicon nitride layer to the substrate; depositing a silicon dioxide mold layer disposed on the thin silicon nitride layer; planarizing the silicon dioxide mold layer; etching the silicon dioxide mold layer thereby creating at least one emitter mold; depositing tungsten upon the mold layer and in the emitter mold; chemically polishing excess the tungsten; and removing the silicon dioxide by etching. 
     Another embodiment of the present invention provides such an emitter wherein the thin silicon nitride layer is not greater than 500 angstroms. 
     A further embodiment of the present invention provides such a emitter wherein the method further comprises applying a protective layer of silicon nitride and applying a layer of gold to active areas of the emitter. 
     The features and advantages described herein are not all-inclusive and, in particular, many additional features and advantages will be apparent to one of ordinary skill in the art in view of the drawings, specification, and claims. Moreover, it should be noted that the language used in the specification has been principally selected for readability and instructional purposes, and not to limit the scope of the inventive subject matter. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The present invention is further described with reference to the accompanying drawings wherein: 
         FIG. 1  is a block diagram illustrating a silicon substrate of an emitter configured in accord with one embodiment of the present invention. 
         FIG. 2  is a block diagram illustrating a silicon substrate coated with a silicon nitride layer of an emitter configured in accord with one embodiment of the present invention. 
         FIG. 3  is a block diagram illustrating a silicon substrate and sacrificial silicon dioxide mold layer for forming an emitter configured in accord with one embodiment of the present invention. 
         FIG. 4  is a block diagram illustrating a silicon substrate and sacrificial silicon dioxide mold layer with etched mold openings for forming an emitter configured in accord with one embodiment of the present invention. 
         FIG. 5  is a block diagram illustrating a deposition of a layer of emitter material for forming an emitter configured in accord with one embodiment of the present invention. 
         FIG. 6  is a block diagram illustrating removal by chemi-mechanical polishing of excess emitter material of an emitter configured in accord with one embodiment of the present invention. 
         FIG. 7  is a block diagram illustrating patterning of an emitter configured in accord with one embodiment of the present invention. 
         FIG. 8  is a block diagram illustrating removal of sacrificial silicon dioxide and excess silicon nitride from an emitter configured in accord with one embodiment of the present invention. 
         FIG. 9  is a block diagram illustrating removal of formation of wells in the substrate of an emitter configured in accord with one embodiment of the present invention. 
         FIG. 10  is a block diagram illustrating application of silicon nitride to the surface of an emitter configured in accord with one embodiment of the present invention. 
         FIG. 11  is a block diagram illustrating removal of patterning of active emitter sites on an emitter configured in accord with one embodiment of the present invention. 
         FIG. 12  is a block diagram illustrating removal of deposition of a layer of gold on active emitter sites on an emitter configured in accord with one embodiment of the present invention. 
         FIG. 13  is a block diagram illustrating removal of opening vias on active emitter sites on an emitter configured in accord with one embodiment of the present invention. 
         FIG. 14  is a block diagram illustrating a silicon substrate of an emitter configured in accord with one embodiment of the present invention. 
         FIG. 15  is a block diagram illustrating etching a silicon substrate of an emitter configured in accord with one embodiment of the present invention. 
         FIG. 16  is a block diagram illustrating a silicon substrate coated with a silicon nitride layer of an emitter configured in accord with one embodiment of the present invention. 
         FIG. 17  is a block diagram illustrating a silicon substrate and sacrificial silicon dioxide mold layer for forming an emitter configured in accord with one embodiment of the present invention. 
         FIG. 18  is a block diagram illustrating a silicon substrate and sacrificial silicon dioxide mold layer with etched mold openings for forming an emitter configured in accord with one embodiment of the present invention. 
         FIG. 19  is a block diagram illustrating a deposition of a layer of emitter material for forming an emitter configured in accord with one embodiment of the present invention. 
         FIG. 20  is a block diagram illustrating removal by chemi-mechanical polishing of excess emitter material of an emitter configured in accord with one embodiment of the present invention. 
         FIG. 21  is a block diagram illustrating removal of sacrificial silicon dioxide and excess silicon nitride from an emitter configured in accord with one embodiment of the present invention. 
     
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     One embodiment of the present invention provides emitters having tungsten based emitter heater structure and a method to fabricate the same. Such an emitter allows for the efficient generation of spectrally confined infrared emission. The efficiency of the emitter is further improved in embodiments where a reflective coating of gold is applied to the active emitters. 
     Gold, while possessing reflective properties desirable for emitter grids and mirrors, does not make a good heating element due to it&#39;s low resistivity and emissivity. For an isolated high emissive heater, materials such tungsten, silicon carbide or carbon are better suited. 
     In one embodiment of the present invention, these heater elements are formed using a combination of mold fill and chemi-mechanical polishing (CMP) processes. While an embodiment of the present invention is described with respect to tungsten, other embodiments within the scope of the present invention could utilize silicon carbide, carbon or other suitable emitter materials. In embodiments utilizing tungsten, the method of the present invention makes use of a chemical vapor deposition (CVD) of tungsten to form the heater elements. In the case of other materials, a sputter deposition technology may be used. CMP is utilized at various points in the process to planarize and reveal desired components. 
     A coating of gold may be applied to the emitter and exposed substrate, thereby adding a reflective coating to the emitter surface and improving performance. 
     In one embodiment of the present invention, the heating emitter elements may be configured such that they are disposed between channels or cavities that are provided with a depth that is equal to a whole number multiple of the wavelength of the emitted radiation. In one such embodiment, the depth of the finished well is between one and two times the wavelength of the radiation emitted. 
     As illustrated in  FIG. 2 , a protective film of silicon nitride  22  is disposed on the surface of a silicon substrate wafer  20 , coating the surface of the wafer. In one embodiment of the present invention, 500 angstroms or less of silicon nitride are deposited on the surface of a bare silicon wafer  20 . The layer of silicon nitride  22  electrically and physically isolates silicon substrate  20  from tungsten heater elements disposed thereon, and allows etching various sacrificial layers during the processing of the device without erosion of the silicon substrate  20 . 
     In one embodiment of the present invention, illustrated in  FIG. 3 , a coating of silicon dioxide  24  is applied to the silicon nitride layer  22 . For structures with a desired active emitter device with a depth of about approximately 10,000 angstroms, a layer of silicon dioxide of, in one embodiment about approximately 11,000 angstroms is deposited over the silicon nitride. One skilled in the art will readily appreciate that the depth of the mold is related to the depth of the desired emitter, and further, the layer of silicon dioxide deposited must be thicker than the desired mold depth. In this way the silicon dioxide is applied in sufficient thickness to allow for chemi-mechanical polishing of the surface down to the desired mold thickness. 
     Once at the desired thickness, the silicon dioxide layer  24  disposed on the silicon nitride layer is patterned using deep ultraviolet lithography or other suitable technique and etched to form the mold pattern for the heater element. The resulting structure is illustrated in  FIG. 4 . Cavities  26  are disposed between remaining structures of silicon dioxide  24 . These structures  24  are the negative of the desired pattern of emitters. 
     Once a mold has been formed, the emissive material may be deposited. As illustrated in  FIG. 5 , using, in one embodiment, tungsten hexaflorite Chemical Vapor Deposition (CVD), a coating of tungsten  28  is deposited over the surface of the wafer. The thickness of this coating of tungsten shall be thick enough to fill cavities forming molds in the silicon dioxide  24  and thereby create a solid tungsten plug or wire in the mold. CMP is then used to remove unwanted Tungsten and planerize the surface of the structure, removing, in one embodiment, approximately 10,000 angstroms of material from the structure. The result, as illustrated in  FIG. 6 , leaves tungsten structures  28  disposed between the silicon dioxide structures  24 . 
     As illustrated in  FIG. 7 , photoresist or other suitable patterning agent  30  is applied to the tungsten structures  28  to allow silicon dioxide  24  to be selectively removed from between the heater elements  28 . In one embodiment, selective removal of non-masked regions of silicon dioxide  24  is made by wet etching (buffered hydrogen fluoride) is then used to remove the silicon dioxide  24  and the thin silicon nitride  22  resulting in the structure illustrated in  FIG. 8 . As illustrated in  FIG. 9 , either a dry or wet chemical etching processes are then used to etch the silicon  20  to a depth of between 2-4 microns. This structure is cleaned, effecting the removal of the photoresist layer  30 , leaving tungsten  28 , disposed upon silicon nitride  22 , which is in turn disposed upon an etched silicon wafer  20 . 
     A layer of silicon nitride  32  is then applied to the surface of the structure, covering the tungsten  28 , disposed upon silicon nitride  22 , which is in turn disposed upon an etched silicon wafer  20 , as illustrated in  FIG. 10 . This layer  32 , may in one embodiment be approximately 1000 angstrom in thickness and is applied over the surface of the emitter to isolate and protect the tungsten heater elements  28 . 
     As illustrated in  FIG. 11 , photoresist  34  is again applied, coating non-active portions of the device and allowing active areas to be exposed. These exposed areas are then coated with gold  36 . This coating of gold  36 , illustrated in  FIG. 12 , may in some embodiments is less than about approximately 1000 angstroms, and typically between about approximately 250 and 500 angstroms, and acts to increase the surface reflectivity of the cavity and improve device efficiency. Vias are then opened through the silicon nitride to allow metal contact formation to the heater material resulting in a structure such as that illustrated in  FIG. 13 . Gold or aluminum contacts (Not shown) are then applied to the heater elements to allow current to be injected into the heating element. 
     In an alternative embodiment to the silicon nitride encapsulation of the heater element would be CVD deposition of boron nitride. 
     In an alternative embodiment illustrated in  FIGS. 14-21 , the silicon substrate wafer  20  is first etched with cavities  40  as in  FIG. 15  to form bases for etching the substrate in such a way enhances the depth of the wells  40  and improves performance of the structure. The depth of well etchings  40  in the wafer  20  may, according to one such embodiment be about approximately 500 Å. 
     As illustrated in  FIG. 16 , as in the other embodiment, silicon nitrite or boron nitrite is applied to the substrate  20 . A layer of silicon dioxide  24 , as in  FIG. 17  is deposited on the silicon nitride  22  filling the well etchings  40  and building up a layer on the surface. CMP is utilized to insure planarity of the surfaces. The silicon dioxide layer  24  is then etched forming a negative of the desired emitter design. Such a structure is illustrated in  FIG. 18 . Tungsten or another emitter material is then deposited in an emitter material layer  28  as illustrated in  FIG. 19 . As illustrated in  FIG. 20  the emitter layer is polished with CMP to a thickness where only emitter elements  28  remain, disposed between silicon dioxide mold structures  24 . These mold structured and silicon nitride coating are then removed producing a structure like that illustrated in  FIG. 21 . The structure thus produced is then processed as in the other described embodiment. 
     While the present invention has been described in connection with the embodiments of the various figures, it is to be understood that other similar embodiments may be used or modifications and additions may be made to the described embodiment for performing the same function of the present invention without deviating therefrom. Therefore, the present invention should not be limited to any single embodiment, but rather construed in breadth and scope in accordance with the recitation of the appended claims.

Technology Category: h