Patent Document

TECHNICAL FIELD 
       [0001]    The present invention relates to circuitry for driving one or more light emitting diodes (LEDs), and more particularly to a low leakage current LED drive apparatus with fault protection and diagnostics. 
       BACKGROUND OF THE INVENTION 
       [0002]    High intensity LEDs have been utilized in a variety of lighting applications traditionally implemented with incandescent lamps, primarily due to their superior reliability and photonic efficiency. Typically, a field-effect transistor (FET) is used to control the LED current, and the FET is modulated ON and OFF by a pre-FET drive circuit under the control of a microprocessor. However, pre-FET drive circuits that include open-circuit and short-to-ground diagnostic capability typically require a leakage current in the range of 100 uA −200 uA when the LED is supposed to be OFF, and a leakage current of that magnitude is sufficient to make a high intensity LED glow perceptibly. This presents a problem, particularly in applications where the ambient light is low, such as in a vehicle being driven at night. While the open-circuit and short-to-ground diagnostic capability can be disabled to solve the leakage current problem, many LED lighting applications require fault protection and diagnostics. Accordingly, what is needed is a low leakage current LED drive apparatus that provides fault protection and diagnostics. 
       SUMMARY OF THE INVENTION 
       [0003]    The present invention is directed to an improved LED drive apparatus including a microprocessor having a configurable input/output (I/O) port, a FET current control transistor, and a diagnostic interface circuit. The diagnostic interface circuit includes a transistor having an input coupled to a junction between the FET and the LED, and an output coupled to an input of the FET. The microprocessor I/O port is coupled to the input of the FET for turning the LED ON and OFF and performing fault protection and diagnostics. At each desired transition of the LED, the microprocessor configures its input/output port as an “output” and momentarily sets the output state to achieve the desired transition, then re-configures the input/output port as an “input” to determine the conduction state of the diagnostic interface circuit transistor, and determines an output fault status of the drive apparatus based on the determined conduction state. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0004]      FIG. 1  is a circuit diagram of a prior art LED drive apparatus; 
           [0005]      FIG. 2  is a circuit diagram of a LED drive apparatus according to the present invention, including a microprocessor having a configurable input/output port, a FET current control transistor, and a diagnostic interface circuit; 
           [0006]      FIG. 3  is a flow diagram representing a software routine executed by the microprocessor of  FIG. 2  for carrying out a short-to-battery (STB) diagnostic and an OFF-to-ON transition of the LED; and 
           [0007]      FIG. 4  is a flow diagram representing a software routine executed by the microprocessor of  FIG. 2  for carrying out an open-circuit and short-to-ground (STG) diagnostic and an ON-to-OFF transition of the LED. 
       
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT 
       [0008]    Referring to  FIG. 1 , the reference numeral  10  generally designates a prior art drive apparatus for controlling the current supplied to a high intensity LED  12 . The anode of LED  12  is coupled to the positive terminal of a DC source such as the battery  14 , and the cathode of LED  12  is coupled to an output terminal  26  of drive apparatus  10  via a current limiting resistor  16  and a connector  18 . The drive apparatus  10  includes a microprocessor (μP)  20 , a FET current control transistor  22 , and a pre-FET drive circuit (PFD)  24 . The drain of FET  22  is coupled to output terminal  26 , and the source of FET  22  is coupled to ground. The gate of FET  22  is coupled to a gate drive (GD) output of pre-FET drive circuit  24  via resistor  28 . A capacitor  30  is connected between the output terminal  26  and ground for RF de-coupling, and the output terminal  26  is coupled to a feedback (FB) input of pre-FET drive circuit  24  via resistor  32 . The pre-FET drive circuit  24  turns FET  22  ON and OFF based on the logic state at the output port (O) of microprocessor  20  for driving LED  12  ON and OFF. During OFF periods of LED  12 , pre-FET drive circuit  24  permits a leakage current to flow through the feedback pin (FB) and the drain-to-source circuit of FET  22  for open-circuit and short-to-ground fault detection. An open-circuit fault occurs when the connector  18  or a conductor attached to connector  18  fails, and a short-to-ground fault occurs when a connector failure or pinched conductor shorts the output terminal  26  of drive apparatus  10  to ground potential. In each instance, the voltage at output terminal  26  is lower than normal, and when this condition is detected at the feedback input of pre-FET drive circuit  24 , a fault indication is provided through a serial interface (I) of microprocessor  20  as represented by line  34 . 
         [0009]    As mentioned above, the leakage current permitted by the prior art pre-FET drive circuit  24  for open-circuit and short-to-ground fault detection is typically in the range of 100-200 microamperes, which is sufficient to make the high intensity LED  12  glow perceptibly even though it is supposed to be OFF. In contrast, the drive apparatus of the present invention provides fault protection and diagnostics while limiting OFF-period leakage current to a value well below a current threshold at which LED  12  begins to glow perceptibly. 
         [0010]    Referring to  FIG. 2 , an LED drive apparatus according to the present invention is generally designated by the reference numeral  40 . As in  FIG. 1 , the anode of high intensity LED  12  is coupled to the positive terminal of battery  14 , and the cathode is coupled to an output terminal  42  of drive apparatus  40  via current limiting resistor  16  and connector  18 . The drive apparatus  40  includes a microprocessor (μP)  44 , a FET current control transistor  46 , and a diagnostic interface circuit  48 . The microprocessor  44  includes an input/output port (I/O)  50  that is selectively configurable as an input or an output, and I/O port  50  is coupled to control terminal  56 . Control terminal  56  is coupled to the gate (input) of FET  46  via resistor  54 , and the diagnostic interface circuit  48  is coupled between control terminal  56  and the other terminals of FET  46 . The drain (output) of FET  46  is coupled to the output terminal  42 , the source of FET  46  is coupled to ground through a current limiting resistor  52 . 
         [0011]    Diagnostic interface circuit  48  includes a bipolar transistor  58 , a diode  60 , resistors  62 - 68 , and a capacitor  70 . The emitter (output) of transistor  58  is connected to a logic voltage (Vcc) such as 5 VDC, and the resistor  62  is connected between the transistor&#39;s emitter and base to bias transistor  58  to a normally-OFF state. The collector of transistor  58  is connected to control terminal  56  via the resistor  64 , and the resistor  66  connects the control terminal  56  to ground potential. The base (input) of transistor  58  is coupled to output terminal  42  through the series combination of resistor  68  and diode  60 . The capacitor  70  provides RF decoupling like capacitor  30  of the prior art driver  10 , and additionally facilitates diagnosis of an open-circuit fault condition as described below. 
         [0012]    During ON periods of LED  12  in the absence fault conditions, both FET  46  and transistor  58  are biased ON, while during OFF periods of LED  12  in the absence fault conditions, both FET  46  and transistor  58  are biased OFF, and diode  60  is reverse-biased. Thus, in the OFF state of LED  12 , the leakage current of drive apparatus  40  is limited to the minimum OFF-state leakage current of FET  46 , which is typically only a few microamperes. 
         [0013]    Microprocessor  44  initiates fault detection at each desired OFF-to-ON and ON-to-OFF transition of LED  12  by configuring I/O port  50  as an output with the desired output state for a predefined interval such as 30 μsec, and then configuring I/O port  50  as an input and sampling the voltage at control terminal  56 . If a fault is detected, I/O port  50  is re-configured as an output, and set to a logic zero to hold FET  46  OFF. If no fault is detected, the diagnostic interface circuit  48  latches FET  46  to maintain the desired output state of LED  12 .  FIG. 3  is a flow diagram representing a software routine executed by microprocessor  44  at a desired OFF-to-ON transition of LED  12  for diagnosing and protecting against short-to-battery (STB) output fault conditions; and  FIG. 4  is a flow diagram representing a software routine executed by microprocessor  44  at a desired ON-to-OFF transition of LED  12  for diagnosing open-circuit (OC) and short-to-ground (STG) output fault conditions. 
         [0014]      FIG. 3  depicts a flow diagram of the routine executed at a desired OFF-to-ON transition of LED  12  and periodically in part during the ensuing ON state of LED  12 . The STB diagnostic is initiated by executing blocks  72 ,  74  and  76  to configure I/O port  50  as an output, to set the output state high (i.e., to a logic one voltage) for 30 μsec, and then to re-configure I/O port  50  as an input for sampling the voltage at control terminal  56 . If there is a STB output fault condition (i.e., if a connector failure or pinched conductor shorts the output terminal  42  to the positive terminal of battery  14 ), FET  46  will momentarily turn ON, with resistor  52  limiting its current to a safe value, but transistor  58  remains OFF due to the high voltage at output terminal  42  (or turns OFF if the STB condition occurs during the ON state of LED  12 ). Consequently, resistor  66  will pull the voltage at control terminal  56  substantially to ground potential, and the voltage sampled by microprocessor  44  at block  78  will be low (i.e., a logic zero). In this case, the blocks  80 ,  82  and  84  are executed to re-configure I/O port  50  as an output, to set the output state to low to hold FET  46  OFF, and to set the STB fault status to True. 
         [0015]    In the absence of a STB output fault condition, the 30 μsec output pulse at I/O port  50  turns both FET  46  and transistor  58  ON, and the current sourced by transistor  58  sustains a high voltage at control terminal  56  when the I/O port  50  is re-configured as an input at block  76  to sample the control terminal voltage. Since the high voltage at control terminal  56  latches FET  46  ON, the microprocessor  44  simply executes block  86  to set the STB fault status to False when the voltage sampled at block  76  is high. In other words, microprocessor  44  does not need to continue driving FET  46  to maintain activation of LED  12  because FET  46  is held ON by transistor  58 , through the divider action of resistors  64  and  66 . However, in the ensuing ON state of LED  12 , the microprocessor  44  periodically re-executes block  78  to detect an STB fault that occurs during the ON state. 
         [0016]      FIG. 4  depicts a flow diagram of the routine executed at a desired ON-to-OFF transition of LED  12 . The OC/STG diagnostic is initiated by executing blocks  88 ,  90  and  92  to configure I/O port  50  as an output, to set the output state low (i.e., to a logic zero voltage) for 30 μsec, and then to re-configure I/O port  50  as an input for sampling the voltage at control terminal  56 . 
         [0017]    If there is a STG output fault condition (i.e., if a connector failure or pinched conductor shorts the output terminal  42  to ground), transistor  58  will be ON due to the ground voltage at output terminal  42 . Consequently, the transistor  58  sources current through the resistors  64  and  66 , and the voltage sampled by microprocessor  44  at block  94  will be high (i.e., a logic one). In this case, the blocks  96 ,  98  and  100  are executed to re-configure I/O port  50  as an output, to set the output state to low to hold FET  46  OFF, and to set the OC/STG fault status to True. 
         [0018]    If there is an open-circuit output fault condition (i.e., if the connector  18  or a conductor or component between output terminal  42  and battery  14  is electrically open) when blocks  88  and  90  are executed, FET  46  will turn OFF and capacitor  70  will slowly charge through resistor  62 , the base-emitter junction of transistor  58 , resistor  68  and diode  60 . In an exemplary implementation, the resistors  62  and  68  have resistance values of 30 kilo-ohms and 50 kilo-ohms, respectively, and nearly 800 μsec is required to charge capacitor  70 . The transistor  58  will still be ON when microprocessor  44  executes blocks  92  and  94 , and block  94  will be answered in the affirmative. As with the OC failure, the blocks  96 ,  98  and  100  are then executed to re-configure I/O port  50  as an output, to set the output state to low to hold FET  46  OFF, and to set the OC/STG fault status to True. 
         [0019]    In the absence of an output fault condition, executing blocks  88  and  90  will turn OFF FET  46 , and the capacitor  70  will quickly charge through LED  12  and resistor  16  to a voltage sufficient to turn OFF transistor  58 . In an exemplary implementation, the resistor  16  has a resistance value of only 680 ohms, and the capacitor  70  charges to the Vcc voltage in approximately 10 μsec. As a result, transistor  58  is OFF when microprocessor  44  executes blocks  92  and  94  to check the voltage at control terminal  56 , and block  94  is answered in the negative. In this case, block  102  is simply executed set the OC/STG fault status to False, and the resistor  66  holds FET  46  OFF. 
         [0020]    In summary, the LED drive apparatus of the present invention achieves a superior level of fault protection by providing fault latching for OC, STB and STG output fault conditions, while essentially eliminating leakage currents that cause LED  12  to glow when it is supposed to be OFF. While the prior driver circuit  10  permits significant leakage current during OFF periods of the LED  12  in order to detect output fault conditions, the drive apparatus  40  diagnoses output fault conditions in a new and different way that does not depend on leakage current. Accordingly, the drive apparatus  40  limits OFF-period leakage current to only a few microamperes instead of the usual 100-200 microamperes. At the same time, the diagnostic interface circuit  48  costs significantly less than the prior art pre-FET drive circuit  24 , and the software burden of microprocessor  44  is barely increased. 
         [0021]    While the present invention has been described with respect to the illustrated embodiment, it is recognized that numerous modifications and variations in addition to those mentioned herein will occur to those skilled in the art. Accordingly, it is intended that the invention not be limited to the disclosed embodiment, but that it have the full scope permitted by the language of the following claims.

Technology Category: 5