Patent Document

CROSS-REFERENCED TO RELATED APPLICATION 
       [0001]    This application is a divisional of U.S. patent application Ser. No. 11/588,925, filed Oct. 26, 2006, which is now pending. U.S. patent application Ser. No. 11/588,925 is hereby incorporated by reference. 
     
    
     FIELD OF THE INVENTION 
       [0002]    The present invention relates to image sensor devices, and more particularly, to image sensors with micro-mirrors formed over the light sensitive elements. 
       BACKGROUND 
       [0003]    As the size of image sensors and the individual pixels that make up the sensing array become smaller as the result of further integration, it becomes important to capture as much of the incident light onto the sensing array as possible. 
         [0004]    Approaches to addressing this issue include having the light sensitive element (such as a photodiode) take up as much as the pixel area as possible. Another approach is to use microlenses over each pixel to focus the incident light onto the photodiode. The microlens approach attempts to capture the light that would be normally incident on portions of the pixel outside of the photodiode region. 
         [0005]    Further, in a backside illuminated (BSI) device, a flat mirror material may be used to reflect light back through the photodiode, thereby causing more of the incident light to be converted into an electrical signal. 
       SUMMARY 
       [0006]    The invention involves the integration of curved mirrors over a photodiode active area (collection area) in a CMOS image sensor (CIS) process. The curved micro-mirrors reflect light that has passed through the collection area back into the photodiode. The curved micro-mirrors are in one embodiment implemented in a BSI device. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0007]      FIG. 1  illustrates a schematic cross-section portion of a prior art CMOS image sensor with micro-lens. 
           [0008]      FIG. 2  illustrates a schematic cross-section portion of a prior art backside illuminated device with micro-lens. 
           [0009]      FIG. 3  illustrates a schematic cross-section portion of a backside illuminated device with light paths reflected from a prior art flat micro-mirror. 
           [0010]      FIG. 4  illustrates a schematic cross-section portion of a backside illuminated device with light paths reflected from a curved micro-mirror, according to one embodiment of the invention. 
           [0011]      FIG. 5  illustrates a schematic cross-section portion of a backside illuminated device with a curved micro-mirror above a pre-metal dielectric layer, according to one embodiment of the invention. 
           [0012]      FIGS. 6A-6G  illustrate a process for manufacturing a backside illuminated device with a curved micro-mirror above a pre-metal dielectric layer, according to one embodiment of the invention. 
           [0013]      FIG. 7  illustrates a schematic cross-section portion of a backside illuminated device with a micro-mirror fabricated within a pre-metal dielectric layer, according to one embodiment of the invention. 
           [0014]      FIGS. 8A-8H  illustrate steps for fabricating a backside illuminated device with a micro-mirror fabricated within a pre-metal dielectric layer, according to one embodiment of the invention. 
           [0015]      FIG. 9  illustrates a schematic cross-section portion of a backside illuminated device with a micro-mirror fabricated on a silicon surface of the backside illuminated device, according to one embodiment of the invention. 
           [0016]      FIGS. 10A-10G  illustrate steps for fabricating a backside illuminated device with a micro-mirror fabricated on a silicon surface of the backside illuminated device, according to one embodiment of the invention. 
           [0017]      FIG. 11  shows a flow chart for a method of fabricating a micro-mirror according to one embodiment of the invention. 
           [0018]      FIG. 12  shows a flow chart for a method of fabricating a micro-mirror according to one embodiment of the invention. 
           [0019]      FIG. 13  shows a flow chart for a method of fabricating a micro-mirror according to one embodiment of the invention. 
           [0020]      FIG. 14  shows a flow chart for a method of fabricating a micro-mirror according to one embodiment of the invention. 
       
    
    
     DETAILED DESCRIPTION 
       [0021]    In the following description, numerous specific details are provided in order to give a thorough understanding of embodiments of the invention. One skilled in the relevant art will recognize, however, that the invention may be practiced without one or more of the specific details, or with other methods, components, materials, etc. In other instances, well known structures, materials, or operations are not shown or described in order to avoid obscuring aspects of the invention. 
         [0022]    References throughout the specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment and included in at least one embodiment of the present invention. Thus, the appearances of the phrase “in one embodiment” or “in an embodiment” in various places throughout the specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. 
         [0023]      FIG. 1  illustrates a schematic cross-section portion of a prior art CMOS image sensor  100  with micro-lens  190 . A substrate  110  has formed therein a photodiode and is coupled to pre-metal dielectric (PMD) layer  120 . Pre-metal dielectric (PMD) layer  120  is coupled to inter-layer dielectric (ILD) layer  130  and first metal layer  135 . Inter-layer dielectric (ILD) layer  130  is coupled to inter-layer dielectric (ILD) layer  140  and second metal layer  145 . Inter-layer dielectric (ILD) layer  140  is coupled to inter-layer dielectric (ILD) layer  150  and third metal layer  155 . Inter-layer dielectric layer  150  is coupled to and underneath antireflective layer  160 . Antireflective layer  160  is coupled to and underneath planarization layer  165 . Planarization layer  165  is coupled to color filter  170 . Color filter  170  is coupled to planarization layer  180 . Planarization layer  180  is coupled to microlens  190 . 
         [0024]    The prior art cross-section of an image sensor shown in  FIG. 1  may include fewer or greater dielectric and/or metal layers. However, the general concepts are the same, i.e. that a photodiode is formed in a substrate and various dielectric and metal layers are formed atop of the substrate. Further, a color filter layer and microlenses are formed on top of the pixel to complete the main functional structures in the cross section view.  FIG. 1  shows a conventional “front side” image sensor where the light is incident from the top surface of the substrate. 
         [0025]      FIG. 2  illustrates a schematic cross-section portion of a prior art backside illuminated device  200  with micro-lens  210 . Micro-lens  210  is coupled to a planarization layer  220 . Planarization layer  220  is coupled to a color filter  230 . The color filter  230  is coupled to planarization layer  240 . Finally, the planarization layer  240  is formed on the backside (or bottom surface) of the substrate  250  that contains the photodiode. On the top surface of the substrate  250 , the substrate has the various dielectric and metal layers as shown in  FIG. 1  that are used for electrical interconnection to other components of the pixel and/or sensing array. Thus, substrate  250  is coupled to pre-metal dielectric (PMD) layer  260 . PMD layer  260  is coupled to inter-layer dielectric (ILD) layer  270  and first metal layer  275 . ILD layer  270  is coupled to inter-layer dielectric (ILD) layer  280  and second metal layer  285 . ILD layer  280  is coupled to inter-layer dielectric (ILD) layer  290  and third metal layer  295 . 
         [0026]      FIG. 3  illustrates a schematic cross-section portion of a prior art backside illuminated device  300  with light paths reflected from a flat micro-mirror  360 . Micro-lens  310  is coupled to planarization layer  320 . Planarization layer  320  is coupled to color filter  330 . Color filter  330  is coupled to photodiode layer  340 . Photodiode layer  340  is coupled to pre-metal dielectric (PMD) layer  350 . PMD layer  350  is coupled to flat micro-mirror  360 . Incident light is lost, or worse causes crosstalk with adjacent pixels. 
         [0027]      FIG. 4  illustrates an advantage of the present invention.  FIG. 4  shows a schematic cross-section portion of a backside illuminated device  400  with light paths reflected from a curved micro-mirror  460 . As can be seen and in contrast to  FIG. 3 , a curved micro-mirror  460  is effective to capture and redirect a higher amount of “passthrough” incident light back through the photodiode area. This is advantageous for increasing the signal generated by the photodiode. 
         [0028]      FIG. 5  illustrates a schematic cross-section portion of a backside illuminated device  500  with a curved micro-mirror  565  above a pre-metal dielectric layer  560  according to one embodiment of the present invention. As will be apparent from the following discussion, the micro-mirror  565  may be placed in a variety of locations in the “dielectric stack” encompassing layers  560 - 590 . Indeed, the micro-mirror  565  may be placed between the substrate  550  and the pre-metal dielectric layer  560  or atop of the inter-layer dielectric layer  590 . The precise placement is generally dependent upon various specific design parameters and dimensions of the image sensor, but is generally placed to maximize reflection of light onto the photodiode. 
         [0029]    As seen in  FIG. 5 , on the backside of the substrate  550 , micro-lens  510  is coupled to planarization layer  520 . Planarization layer  520  is coupled to color filter  530 . Color filter  530  is coupled to planarization layer  540 . Finally, planarization layer  540  is coupled to substrate  550 . 
         [0030]    On the topside of the substrate  550 , pre-metal dielectric (PMD) layer  560  is formed atop of the substrate  550 . PMD layer  560  is coupled to curved micro-mirror  565 . PMD layer  560  is also coupled to inter-layer dielectric (ILD) layer  570  and first metal layer  575 . ILD layer  570  is coupled to inter-layer dielectric (ILD) layer  580  and second metal layer  585 . ILD layer  580  is coupled to inter-layer dielectric (ILD) layer  590  and third metal layer  595 . 
         [0031]    In one embodiment of the invention, the CIS may be processed up to the first metal layer, and an inorganic microlens processed on top of the PMD layer  560 . A thin layer of reflective material, such as a metal, may be blanket deposited over the wafer; the thickness of the reflective material may be on the order of 10-50 nm. The wafer may then be covered with photo-resist. Using standard lithographic techniques, the photo-resist may be patterned to remove the photo-resist from all areas except the curved surface of the inorganic microlens/metal film. The exposed metal may be etched away, either by wet or by dry etching. The remaining photo-resist may be removed, and standard BSI processing may continue. 
         [0032]      FIGS. 6A-6G  illustrate a process for manufacturing a backside illuminated device with a curved micro-mirror above a pre-metal dielectric layer, according to one embodiment of the invention.  FIG. 6(   a ) illustrates a step where the CMOS image sensor (CIS) is processed up to metal  1 .  FIG. 6(   b ) illustrates a step where an inorganic microlens (i.e. silicon oxide or silicon nitride) is processed on top of the pre-metal dielectric (PMD).  FIG. 6(   c ) illustrates a step where a thin layer of reflective material, such as a metal, is blanket deposited over the wafer. The thickness will vary with material, device architecture and processing conditions, however it is expected that this material should be on the order of nanometers (10 nm-50 nm).  FIG. 6(   d ) illustrates a step where the wafer is then covered with photo-resist.  FIG. 6(   e ) illustrates a step where using standard lithographic techniques, the photo-resist is patterned to remove the resist from all areas except the curved surface of the inorganic microlens/metal film.  FIG. 6(   f ) illustrates a step where the exposed metal is etched away, either by wet or dry etching.  FIG. 6(   g ) illustrates a step where the remaining photo resist is removed and standard BSI processing continues. 
         [0033]      FIG. 7  illustrates a schematic cross-section portion of a backside illuminated device  700  with a curved micro-mirror  765  fabricated within a pre-metal dielectric layer  760 . Much of the structure of the embodiment of  FIG. 7  is similar to that of  FIG. 5 . Micro-lens  710  is coupled to planarization layer  720 . Planarization layer  720  is coupled to color filter  730 . Color filter  730  is coupled to planarization layer  740 . Planarization layer  740  is coupled to substrate  750 . Substrate  750  is coupled to pre-metal dielectric (PMD) layer  760 . Unlike the embodiment of  FIG. 5  where the micro-mirror  565  is formed atop of the PMD layer  560 , in this embodiment, the PMD layer  760  has integrally formed therein the micro-mirror  765 . PMD layer  760  is coupled to inter-layer dielectric (ILD) layer  770  and first metal layer  775 . ILD layer  770  is coupled to inter-layer dielectric (ILD) layer  780  and second metal layer  785 . ILD layer  780  is coupled to inter-layer dielectric (ILD) layer  790  and third metal layer  795 . 
         [0034]    In this embodiment, the CIS is processed up to PMD deposition. At this point, a portion of the PMD layer  760  is deposited. An inorganic microlens  710  (e.g. silicon dioxide or silicon nitride) may be processed on top of the first portion of the PMD layer  760 . A thin layer of a reflective material, such as a metal, may be blanket deposited over the wafer. The thickness of the reflective material layer may be on the order of 10-50 nm. The wafer may then be covered with photo-resist. Using standard lithographic techniques, the photo-resist may be patterned to remove the photo-resist from all areas except the curved surface of the inorganic microlens/metal film. The exposed metal may be etched away by either wet or dry etching. The remaining photo-resist may be removed and a remainder of the PMD layer  760  may be deposited. The remainder of the PMD layer  760  may need to be planarized, e.g. by CMP. Standard BSI processing may continue from this point. The disadvantage of this technique is that the PMD layer  760  may need to be planarized, which is an extra processing step. 
         [0035]      FIGS. 8A-8H  illustrate steps for fabricating a backside illuminated device with a micro-mirror fabricated within a pre-metal dielectric layer, according to one embodiment of the invention.  FIG. 8(   a ) illustrates a step where the CMOS image sensor (CIS) is processed up to PMD deposition. At this point a portion of the PMD thickens is deposited (PMD/n)  FIG. 8(   b ) illustrates a step where an inorganic microlens (i.e. silicon oxide or silicon nitride) is processed on top of the 1.sup.st PMD layer.  FIG. 8(   c ) illustrates a step where a thin layer of reflective material, such as a metal, is blanket deposited over the wafer. The thickness will vary with material, device architecture and processing conditions, however it is expected that this material should be on the order of nanometers (10 nm-50 nm).  FIG. 8(   d ) illustrates a step where the wafer is then covered with photo-resist.  FIG. 8(   e ) illustrates a step where using standard lithographic techniques, the photo-resist is patterned to remove the resist from all areas except the curved surface of the inorganic microlens/metal film.  FIG. 8(   f ) illustrates a step where the exposed metal is etched away, either by wet or dry etching.  FIG. 8(   g ) illustrates a step where the remaining photo resist is removed and the remainder of the PMD layer is deposited. Depending on the thickness, the second PMD layer may need to be planarized; for instance by CMP.  FIG. 8(   h ) illustrates a step where standard BSI processing is continued. 
         [0036]    In another embodiment of the present invention,  FIG. 9  illustrates a schematic cross-section portion of a backside illuminated device where the micro-mirror is fabricated on the substrate  940  before any pre-metal dielectric layer is formed. Note that the micro-mirror is not in direct contact with the substrate  940  and instead sits atop various other thin layers (e.g. gate oxides, silicides, etc. . . .) not germane to the present invention. Thus, the term “on the substrate  940 ” is broad and generally means prior to any thick dielectric layers. In this embodiment, the CIS may be processed up to the PMD deposition step. An inorganic microlens (e.g. silicon oxide or silicon nitride) may be processed on top of the silicon surface. There may be a layer between the microlens and the silicon surface, such as a contact etch stop layer; such a layer is usually made of silicon oxide or silicon nitride. A thin layer of a reflective material, such as a metal, may be blanket deposited over the wafer; this reflective material may be 10-50 nm thick. The wafer may then be covered with photoresist. Using standard lithographic techniques, the photoresist may be patterned to remove the resist from all areas except the curved surface of the inorganic microlens/metal film. The exposed metal may be etched away by wet or dry etching. The remaining photoresist may be removed, and standard BSI processing may continue from this point. Depending on the thickness of the micromirror and the PMD layer, an additional planarization step may be required before standard BSI processing. The advantage of this embodiment is that it reduces the probability that light will scatter into an adjacent device. 
         [0037]      FIGS. 10A-10G  illustrate steps for fabricating a backside illuminated device with a micro-mirror fabricated on a silicon surface of the backside illuminated device, according to one embodiment of the invention.  FIG. 10(   a ) illustrates a step where the CMOS image sensor (CIS) is processed up to PMD deposition.  FIG. 10(   b ) illustrates a step where an inorganic microlens (i.e. silicon oxide or silicon nitride) is processed on top of the silicon surface. There may be a layer between the microlens and the silicon surface such as a contact etch stop layer; usually made of silicon oxide or silicon nitride.  FIG. 10(   c ) illustrates a step where thin layer of reflective material, such as a metal, is blanket deposited over the wafer. The thickness will vary with material, device architecture and processing conditions, however it is expected that this material should be on the order of nanometers (10 nm-50 nm).  FIG. 10(   d ) illustrates a step where the wafer is covered with photo-resist.  FIG. 10(   e ) illustrates a step where using standard lithographic techniques, the photo-resist is patterned to remove the resist from all areas except the curved surface of the inorganic microlens/metal film.  FIG. 10(   f ) illustrates a step where the exposed metal is etched away, either by wet or dry etching.  FIG. 10(   g ) illustrates a step where the remaining photo resist is removed standard BSI processing continues from this point. In this case the next step would most likely be PMD deposition. Depending on the thickness of the newly formed micro mirror and the PMD layer, an additional planarization step may be required. 
         [0038]      FIG. 11  shows a flow chart  1100  for a method of fabricating a micro-mirror according to one embodiment of the invention. In step  1110 , an image sensor is fabricated up to, but not including, a first metallization layer. In step  1120 , an inorganic microlens (i.e. silicon oxide or silicon nitride) is processed on top of a pre-metal dielectric (PMD) layer. In step  1130 , a thin layer of reflective material, such as a metal, is blanket deposited over the wafer. The thickness will vary with material, device architecture and processing conditions, however it is expected that this material should be on the order of nanometers (10 nm-50 nm). 
         [0039]    In step  1140 , the wafer is then covered with photo-resist. In step  1150 , the photo-resist is patterned to remove the resist from all areas except the curved surface of the inorganic microlens/metal film. In step  1160 , exposed metal is etched away, either by wet or dry etching. In step  1170 , the remaining photo resist is removed and standard BSI processing continues. 
         [0040]      FIG. 12  shows a flow chart  1200  for a method of fabricating a micro-mirror according to one embodiment of the invention. In step  1210 , an image sensor is fabricated up to, but not including, a first metallization layer. In step  1220 , an inorganic micro-lens is (i.e. silicon oxide or silicon nitride) is processed on top of a pre-metal dielectric (PMD) layer of the image sensor. In step  1230 , a thin layer of reflective material, such as a metal, is blanket deposited over the wafer. The thickness will vary with material, device architecture and processing conditions, however it is expected that this material should be on the order of nanometers (10 nm-50 nm). In step  1240 , the wafer is then covered with photo-resist. In step  1250 , the photo-resist is patterned to remove the resist from all areas except the curved surface of the inorganic microlens/metal film. In step  1260 , exposed metal is etched away, either by wet or dry etching. In step  1270 , remaining photo resist is removed and standard BSI processing continues. 
         [0041]      FIG. 13  shows a flow chart  1300  for a method of fabricating a micro-mirror according to an alternative embodiment of the invention. In step  1310 , an image sensor is fabricated up to, but not including, a first metallization layer. In step  1320 , a mask for a first metallization layer is applied. The mask designates a micro-mirror. In step  1330 , a first metallization layer is etched. In step  1340 , a first metallization layer is deposited to form a micro-mirror. 
         [0042]      FIG. 14  shows a flow chart  1400  for a method of fabricating a micro-mirror according to an alternative embodiment of the invention. In step  1410 , an image sensor is fabricated up to PMD deposition. At this point a portion of the PMD thickness is deposited (PMD/n). In step  1420 , an inorganic microlens (i.e. silicon oxide or silicon nitride) is processed on top of the 1 st  PMD layer. In step  1430 , thin layer of reflective material, such as a metal, is blanket deposited over the wafer. The thickness will vary with material, device architecture and processing conditions, however it is expected that this material should be on the order of nanometers (10 mm-50 nm). 
         [0043]    In step  1440 , the wafer is then covered with photo-resist. In step  1450 , Using standard lithographic techniques, the photo-resist is patterned to remove the resist from all areas except the curved surface of the inorganic microlens/metal film. In step  1460 , the exposed metal is etched away, either by wet or dry etching. In step  1470 , remaining photo resist is removed. In step  1480 , the remainder of the PMD layer is deposited. Depending on the thickness, the second PMD layer may need to be planarized; for instance by CMP. 
         [0044]    From the foregoing, it will be appreciated that specific embodiments of the invention have been described herein for purposes of illustration, but that various modifications may be made without deviating from the spirit and scope of the invention. Accordingly, the invention is not limited except as by the appended claims.

Technology Category: 5