Patent Document

RELATED APPLICATION  
       [0001]     This application claims priority under 35 U.S.C. § 119(e) of the co-pending U.S. provisional patent application Ser. No. 60/669,520, filed Apr. 8, 2005, and titled “Dynamically Illuminated Biometric Sensor, Modular Packaging Technology, and Over-Current Chip Protection Architecture,” which is hereby incorporated by reference. 
     
    
     FIELD OF THE INVENTION  
       [0002]     This invention is related to contact detectors. More specifically, this invention is related to systems for and methods of protecting contact detectors from excessive currents and resulting damage.  
       BACKGROUND OF THE INVENTION  
       [0003]     Integrated circuits, especially those with surfaces that are exposed to human contact, are susceptible to damage resulting from electrostatic discharge (ESD), short circuits, mechanical damage, and similar occurrences. These occurrences can induce latch-up conditions in at least a portion of the integrated circuit or can produce other damage that results in excessive or over currents. These over currents can cause the integrated circuit to get too hot, rupture junctions, short circuit across insulators, open circuit conductors, malfunction, and even melt. The increased temperature can injure a user, can generate current overloads that damage the power supply or battery of the integrated circuit, of companion circuits, or any combination of these.  
         [0004]     Some prior art solutions use protection switches. The protection switches are placed external to the integrated circuit so that they will not be exposed to the ESD events or other occurrences, thus protecting them from damage suffered by other portions of the integrated circuit. These protection switches contain a current detection circuit, a current switch, and a reset signal generator. When latch-up occurs, the current detection circuit detects excessive current consumption and disconnects the entire integrated circuit from the power supply source for a time sufficient to remove the latch-up conditions. When the power supply voltage is restored, the reset circuit returns the digital blocks that form the integrated circuit to their initial conditions. The reset circuit also sets a flag to indicate to a host processor that the data previously stored in the digital blocks is lost or is unreliable.  
         [0005]     These external protection switches increase the cost of the final product of which they form a part. They also take up space on printed circuit boards. Space is typically at a premium on small, portable products such as cell phones and personal digital assistants. These external protection switches also reset the entire integrated circuit every time latch-up occurs, even when only a small portion of the integrated circuit is affected by latch-up. This occurs even though some areas of the integrated circuit are often not affected by latch-up, are undamaged, and consequently do not need to be reset.  
       SUMMARY OF THE INVENTION  
       [0006]     Embodiments of the present invention protect contact detectors, such as fingerprint sensors, from damage stemming from electrostatic discharge (ESD) events, mechanical damage, and similar events. Electrostatic charges stored on a finger, body of a user, or both can be discharged to devices that the finger contacts. This discharge often triggers a latch-up condition, which in turn can draw excessive current. Embodiments of the present invention have a power switch, insulated from ESD events, that disconnects power to portions of the contact detector when an over current condition is detected on the contact sensor. Embodiments of the present invention also include a state machine for recovering from latch-up and disconnecting portions of the device that are permanently damaged.  
         [0007]     Other embodiments, formed on a single integrated circuit using NMOS and PMOS transistors, minimize the occurrence of latch-up by adequately spacing the NMOS and PMOS transistors. And still other embodiments divide a surface of a contact detector and associated electronics into multiple blocks, each controlled by a dedicated power switch. Damaged areas of the contact detector are functionally disconnected from the contact detector. Thus, rather than disconnecting a large block of electronics when only a small area of the contact detector is damaged, the small area is disconnected using its dedicated power switch, thus leaving more of the contact detector for subsequent functioning. Thus, more finely grained control of damaged areas is provided.  
         [0008]     In a first aspect of the present invention, a contact detector includes an exposed surface for detecting the presence of an object, an insulating surface, and a protection element. The protection element is disposed under the insulating surface. This position protects it from ESD and similar events, and is used to control power to the contact detector. The protection element is configured to disconnect power to the contact detector when a current to the contact detector above a threshold is detected. Preferably, the contact detector forms a finger image sensor, such as a finger swipe sensor or a finger placement sensor. The finger swipe sensor includes a sensing array, such as one using capacitive elements, electric field elements, thermal elements, or optical elements.  
         [0009]     In other embodiments, the exposed surface overlies an analog block for capturing analog data generated by contacting the contact detector and a digital block for processing digital data generated from the analog data. The analog data is preferably finger image data and the digital data corresponds to the finger image data. Preferably, the first protection element includes a first switch for controlling power to the analog block and a second switch for controlling power to the digital block. The first switch and the second switch are configured to cooperatively disconnect power to the analog block and the digital block and to selectively reconnect power to the analog block and the digital block after a predetermined time. When one or both of the analog and the digital block is determined to have suffered irreparable damage, power is not reconnected to the damaged block. Undamaged blocks continue to operate.  
         [0010]     In another embodiment, the contact detector also includes a state machine. The state machine is used to place the first switch and the second switch into a selected one of an operating mode, a stand-by mode, and a disconnect mode. Preferably, the state machine is implemented on a host processor.  
         [0011]     Preferably, the insulating surface surrounds the exposed surface. Alternatively, the insulating surface merely borders opposing ends of the exposed surface.  
         [0012]     In a second aspect of the present invention, a fingerprint sensor includes an exposed surface overlying a plurality of blocks, an insulating surface, and a plurality of protection elements. Each block contains a contact detector element for detecting the presence of a patterned image on the exposed surface. The protection elements are disposed under the insulating surface and each is used to control power to one of the plurality of blocks. Each protection element is configured to disconnect power to a corresponding block from the plurality of blocks when a current to the block exceeds a threshold. Preferably, the blocks contain an array of sensing elements for capturing swiped fingerprint images and digital components for processing swiped finger image data. Preferably, signals fed to and generated by the plurality of protection elements are static.  
         [0013]     The insulating surface includes a non-conductive material, such as a non-conductive polymeric material. In one embodiment, the insulating material also includes a grounded conductive material, such as a metal, overlying the non-conductive material.  
         [0014]     In a third aspect of the present invention, a method of forming a fingerprint sensor includes forming electronic components in a semiconductor substrate for capturing finger image data; forming a power protection element in the semiconductor substrate for controlling power to the electronic components; and forming an insulating layer over the power protection element, thereby leaving a surface over the electronic components exposed and a surface over the power protection element un-exposed. Preferably, the electronic components form a finger swipe sensor. Alternatively, the electronic components form a finger placement sensor.  
         [0015]     The method also includes coupling a state machine to the power protection element. The state machine is for controlling the power protection element to selectively disconnect power to the electronic components in the event an over current is detected on any of the electronic components. The state machine is also used to control the power protection element to selectively reconnect power a selected one or more of the electronic components after a pre-determined time. Preferably, the state machine is disposed under the insulating layer.  
         [0016]     In one embodiment, the electronic components comprise transistors, such as PMOS and NMOS transistors. Both forming the electronic components and forming a power protection element includes spacing the transistors to minimize latch-up.  
         [0017]     In a fourth aspect of the present invention, a method of forming a fingerprint sensor comprises forming multiple electronic components in a semiconductor substrate, such that multiple electronic components are able to capture and process finger image data; forming multiple power protection elements in the semiconductor substrate, each for controlling power to a corresponding one of the multiple electronic components; and forming a protection layer over the multiple power protection elements, thereby leaving the multiple electronic components exposed and the multiple power protection elements un-exposed. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0018]      FIG. 1  shows a finger in contact with a fingerprint sensor having an exposed portion for capturing finger images and an un-exposed portion.  
         [0019]      FIG. 2  shows protection switches and the components they protect in accordance with embodiments of the present invention.  
         [0020]      FIG. 3  is a state diagram for implementing a state machine for recovering from latch up in accordance with embodiments of the present invention.  
         [0021]      FIG. 4  shows protection switches and the components they protect in accordance with other embodiments of the present invention.  
         [0022]      FIG. 5  is a schematic circuit diagram of a protection switch in accordance with one embodiment of the present invention.  
         [0023]      FIGS. 6 and 7  show top and side views, respectively, of a semiconductor substrate during a first processing step for forming a contact detector having protection switches in accordance with the present invention.  
         [0024]      FIGS. 8 and 9  show top and side views, respectively, of the semiconductor substrate of  FIGS. 6 and 7 , during a second processing step for forming a contact detector having protection switches in accordance with the present invention.  
         [0025]      FIGS. 10 and 11  show top and side views, respectively, of the semiconductor substrate of  FIGS. 8 and 9 , during a third processing step for forming a contact detector having protection switches in accordance with the present invention.  
         [0026]      FIG. 12  shows a finger sensor having an exposed surface bordered by an insulating surface overlying protection switches in accordance with the present invention. 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0027]     The present invention is directed to protecting contact detectors that have exposed portions, such as the portion of a finger sensor used to capture finger images. These portions are exposed in that they are contacted to capture image data or other data and thus contain or overlie electronics used to process the image or other data. Because these portions come into contact with fingers and materials that can carry electrostatic charges, these portions are necessarily vulnerable to latch-up, which can result in the generation of excessive current that can damage the integrated circuits that form the contact detector. The portions are also susceptible to mechanical and other damage. While much of the discussion that follows focuses on finger image sensors, it will be appreciated that other contact detectors and other types of integrated circuits are able to benefit from the present invention.  
         [0028]      FIG. 1  shows a finger  110  being swiped along a finger swipe sensor  100  in accordance with the present invention, with the arrow indicating a swipe direction. The finger swipe sensor  100  contains an exposed surface  105 , under which lies electronics that are susceptible to damage from over current and other conditions generated from, for example, electrostatic discharge (ESD) events. The exposed portion  105  is shown much larger in its relation to the finger  110  merely to make the drawing easier to read; the drawings are not to scale. Generally, these electronics that underlie the exposed surface  105  include analog components and digital components. If the finger swipe sensor  100  is a capacitive swipe sensor, which uses capacitors to sense an image of a finger, the analog components can include an array of sense capacitors. If the finger swipe sensor is an optical swipe sensor, which uses charge coupled devices to sense an image of a finger, the analog components can include photodiodes. In either case, the digital components can include processing elements for converting the analog image data into digital data for further processing. ESD, its generation, and its effect on finger sensors are explained in more detail in U.S. patent application Ser. No. 11/070,154, titled “Electrostatic Discharge Protection for a Fingerprint Sensor,” and filed Mar. 1, 2005, which is incorporated by reference.  
         [0029]     The surface of the exposed portion  105  and the underlying components function by capturing finger images and are thus necessarily exposed to ESD events. Also, because it functions by being contacted by a finger, it is also referred to as a “contact surface,” a “contact detector,” and the like.  
         [0030]     Still referring to  FIG. 1 , the finger swipe sensor  100  also includes an insulating surface  120  that protects electronics contained below it from ESD events, abrasion, shock, and other damage. Electronics below the insulating surface  120  are thus less susceptible to, for example, latch up and the resulting over currents. Suitable materials for the insulating surface  120  include, but are not limited to, non-conductive polymeric materials such as plastics. The electronics underlying the insulating layer include both analog and digital components for processing finger image data.  
         [0031]      FIG. 2  is a schematic of a section of a contact device  200  in accordance with the present invention. The contact device  200  comprises an exposed area  201  having a surface that overlies a block  210  of analog components and a block  220  of digital components (also referred to as uncovered or exposed blocks). As one example, the contact device  200  is a capacitive finger sensor, and the block  210  contains a capacitive sense array. It will be appreciated that the capacitive sense array itself is generally protected from minor abrasions by, for example, a passivation layer, a thin-film, or both. The contact device  200  also comprises an unexposed area that contains an insulating surface (not shown) that overlies a power switch (also referred to as a current switch)  211  for controlling power to the block  210  and a power switch  221  for controlling power to the block  220  (also referred to as covered or un-exposed blocks). The contact device  200  also comprises a block  230  of covered analog components, a block  240  of covered digital components, a covered Input Output (I/O) block  250 , a power switch  231  for controlling power to the block  230 , a power switch  241  for controlling power to the block  240 , and a power switch  251  for controlling power to the I/O block  250 . All of the power switches  211 ,  221 ,  231 ,  241 , and  251  are protected from ESD events and other damage by the insulating layer that shields them from ESD, such as discharged from a finger or other charged object contacting the exposed area  201 .  
         [0032]     As one example, in operation, if latch up in the block  210  generates an over current, the power switch  211  detects the over current and raises a signal (on the line LATCH_B, discussed below) indicating the over current. The block  240  receives the signal and generates a signal to the power switches  211  and  221  to remove power from the blocks  210  and  220 , respectively, to terminate the latch up condition. After a predetermined time, sufficient to allow the latch up condition to terminate, the power switches  211  and  221  reconnect the blocks  210  and  220  to power. During this process, the switches  231 ,  241 , and  251  do not remove power from the blocks  230 ,  240 , and  250 , respectively. In other words, the blocks  230 ,  240 , and  250  are not reset when the blocks  211  and  221  are.  
         [0033]     In the embodiment shown in  FIG. 2 , the block  240  controls the power switches  211 ,  221 ,  231 ,  241 , and  251  to place them in an operating mode, a standby mode, and a disconnect mode, all described in more detail below. The block  240  contains a state machine for performing these functions. In other embodiments a host processor external to the contact device  200  performs these functions.  
         [0034]     Still referring to  FIG. 2 , voltage (power supply) lines from the power switches  211 ,  221 ,  231 ,  241 , and  251  are coupled to the blocks  210 ,  220 ,  230 ,  240 , and  250 , respectively, and are controllably routed to the blocks  210 ,  220 ,  230 ,  240 , and  250  in accordance with the present invention. All of the power switches  211 ,  221 ,  231 ,  241 , and  251  and the block  240  are coupled to one another at a power down (PD) input line for each. A signal on the PD input of one of the power switches  211 ,  221 ,  231 ,  241 , and  251  is used to control the power switch to route full power or to route standby power to the blocks  210 ,  220 ,  230 ,  240 , and  250 , respectively. The power switches  211  and  221  have interconnected input/output (I/O) lines labeled LATCH_B, which are also coupled to the block  240 . Similarly, the power switches  231 ,  241 , and  251  have interconnected I/O lines labeled LATCH_B. As described below, a signal on a LATCH_B line is used to indicate an over current. The disconnect (DIS) input for the power switches  211  and  221  is output from block  240 . A signal on a DIS line is used to instruct a power switch to permanently disconnect power to the block. This occurs when the block  240  determines that a block is unusable, such as when it raises a signal on its LATCH_B line several consecutive times, indicating, for example, that it cannot recover from latch-up. DIS inputs for the blocks  231 ,  241 , and  251  are not used and are accordingly grounded.  
         [0035]     As explained below, when power switches have interconnected LATCH_B inputs, if any of the power switches indicates an over current condition, all the power switches will to cut off power to all the blocks they control power to. The power switches are thus in a wired OR configuration.  
         [0036]     VSS (ground) lines from the I/O block  250  are coupled to VSS inputs to the power switches  211 ,  221 ,  231 , and  241 . An analog ANA_VDD (voltage source) line from the I/O block  250  is coupled to VDD inputs of the power switches  211  and  231 . An I/O VDD line from the I/O block  250  is coupled to the VDD input of the power switch  251 , and the DIS input and the ground input of the power switch  251  are coupled to the ground I/O_VSS output of the I/O block  250 . The power line for digital components DIG_VDD from the I/O block  250  couples the power inputs VDD of the power switches  221  and  241 . Finally, the I/O lines for all of the blocks  210 ,  220 ,  230 ,  240 , and  250  (shown as thick lines) are coupled together.  
         [0037]     The I/O block  250  is used to (1) route power and provide ground over the lines AVA_VDD/ANA_VSS to the power switches  211  and  231 , which then controllably route power to the (analog) blocks  210  and  230 , (2) route power and provide ground over the lines DIG_VDD/DIG_VSS to the power switches  221  and  241 , which then controllably route power to the (digital) blocks  220  and  240 , (3) receive power and ground for itself over the lines I/O_VDD/I/O_VSS, and (4) route analog I/O signals between the block  230  and components external to the contact detector  200  and (5) route digital I/O signals between the block  240  and components external to the contact detector  200 . The blocks  210 ,  220 ,  230 , and  240  are all coupled to one another along their I/O lines.  
         [0038]     In operation, as explained briefly above, when a signal on a LATCH_B line indicates over current, power to all the analog and digital blocks that are controlled by power switches coupled to the LATCH_B line is disconnected. At the same time this signal is used by the block  240  to set the reset flag or, if the over-current condition does not disappear, to generate a disable flag. This flag puts the entire contact detector  200  in power down mode (all the power supply switches have common power down signal PD) and generates signal DIS (disconnect) for the exposed blocks of the integrated circuit. All the signals are static. For this reason, the power switches  211 ,  221 ,  231 ,  241 , and  251  and the blocks  230 ,  240 , and  250  can be in the power down mode of operation. The blocks  230 ,  240 , and  250  are not considered prone to a physical damage and do not need a disconnect option. In order to disconnect the blocks  210  and  220 , the covered blocks  230 ,  240 , and  250  should be functional.  
         [0039]      FIG. 3  shows a state diagram  300  for implementing a state machine, such as one executing on the block  240  of  FIG. 2 , in accordance with the present invention. As explained above, in accordance with one embodiment of the present invention, when an over current is detected anywhere in the finger sensor, control logic on the finger sensor, implemented in the state machine, controls power switches to enter (1) an operating mode  305 , in which power is routed from the power switch to a block, (2) a standby mode  310 , in which the finger sensor is not being used and only limited power is routed from a power switch to a block so that the block can be quickly placed in the operating mode, (3) a reset check mode  315 , entered after an over current is detected, during which each power switch that controls power to electronics in an exposed area disconnects power to the block it controls, giving the block time to allow the latch-up condition to terminate, and (4) a disconnect mode  320 , in which power is permanently disconnected from a block. Preferably, the reset check mode  315  is consolidated in the operating mode  305 .  FIG. 3  shows the operating mode  305  and the reset check mode  315  as distinct merely to simplify the explanation.  
         [0040]     Referring to the state diagram  300 , from the operating mode  305 , raising a signal on a standby line (raised, for example, when the exposed area of the finger sensor has not been contacted by a finger or patterned object for a predetermined time) places the finger sensor in the standby mode  310 . In the standby mode, the electrical components of the finger sensor draw less current, thereby conserving power and ensures that the finger sensor does not heat up unnecessarily. While the finger sensor is in the standby mode  310 , when a finger or other object contacts a surface of the finger sensor, the finger sensor goes into the operating mode  305 , powering on the electronics.  
         [0041]     In the operating mode  305 , if an over current is detected, the finger sensor enters the reset check mode  315 , where it temporarily disconnects power from one or more of the blocks, allowing any latch-up condition that occurred as a result of the over current to be removed. The finger sensor then returns to the operating mode  305 . If, however, an over current is again detected, the finger sensor again returns to the reset check mode  315 . If the finger sensor returns to the reset check mode  315  a predetermined number of consecutive times, indicating that a block is permanently damaged, the finger sensor enters the disconnect mode  320 , in which the block is flagged as damaged, and accordingly is no longer used. A processor on the finger sensor (e.g., block  240  in  FIG. 2 ) uses the flag to determine that the damaged block is not longer used to store, receive, or process data. The finger sensor then returns to the operating mode  305 , for the remainder of the (i.e., the functioning, undamaged) blocks.  
         [0042]     It will be appreciated that while  FIG. 2  shows an exposed area  201  containing both an analog block  210  and a digital block  220 , in other embodiments the exposed area  201  contains one or more analog blocks, one or more digital blocks, but not both. In accordance with other embodiments of the invention, an exposed area is divided into multiple blocks containing electronic components, such that power to each block is controlled by a dedicated power element. Dividing the multiple blocks in this way allows smaller blocks to be isolated and later disabled, if necessary.  FIG. 4  shows a portion of a contact sensor  400  in accordance with one embodiment of the present invention. The contact sensor  400  comprises a first block of electronic components  420  containing a digital block  420 A controlled by a dedicated power switch  426  and an analog block  420 B controlled by a dedicated power switch  425 ; a second block of electronic components  430  containing a digital block  430 A controlled by a dedicated power switch  435  and an analog block  430 B controlled by a dedicated power switch  436 ; a third block of electronic components  440  containing a digital block  440 A controlled by a dedicated power switch  446  and an analog block  440 B controlled by a dedicated power switch  445 ; and a fourth block of electronic components  450  containing a digital block  450 A controlled by a dedicated power switch  455  and an analog block  450 B controlled by a dedicated power switch  456 . The blocks  420 ,  430 ,  440 , and  450  are all contained in an uncovered or exposed area  460 , and the power switches  425 ,  426 ,  435 ,  436 ,  445 ,  446 ,  455 , and  456  are all contained in a covered or un-exposed area  465 .  
         [0043]     If it is later determined that the block  420 B is irreparably damaged, such as by an over current condition, then the power switch  425  is able to permanently disconnect power from the block  420 B, removing one-eighth of the electronics (e.g., sensing elements) of the finger sensor from operation, leaving seven-eighths for use. If a single power switch were used to control power to the entire block  420  and the entire block  420  must permanently disconnected because the block  420 B is damaged, a larger portion of the sensing array would be lost to use. It will thus be recognized that by increasing the number of blocks (e.g.,  420 ,  430 ,  440 , and  450 ), each having a dedicated power switch, when a portion of the finger sensor is disconnected due to damage, the damage is better isolated and a larger portion of the finger sensor remains available for use.  
         [0044]      FIG. 5  is a schematic diagram for a current switch  500  in accordance with one embodiment of the present invention. Those skilled in the art will recognize from the schematic diagram that the current switch contains PMOS and NMOS transistors. The PMOS and NMOS transistors can be replaced with other types of transistors. The output lines labeled VDD, VSS, OUT, LATCH_B refer to signal lines with the same function as similarly labeled lines in  FIG. 2 . The current switch  500  includes an over-current detector amplifier (transistors N 1 -N 3 , P 1 -P 4 , resistor R_NPLUS, and a capacitor connected transistor U 7 ), a Schmitt trigger (transistors PIN 1 , PIN 2 , PIN 4 , NIN 1 , NIN 2 , NIN 4 ), mode control logic (PIN 2 B, PIN 2 C, PIN 3 , PIN 3 A, PIN 5 , NIN 2 A, NIN 2 B, NIN 2 C, NIN 3 , NIN 3 A, NIN 5 , N 4 , N 5 ), and switch transistors PSW, PBP, PBPA. The current switch  500  has two input lines PD (power down), DIS (disconnect), one output line OUT, one input/output line LATCH_B, a power supply VDD line, and a local ground VSS.  
         [0045]     The VDD line is coupled to the source and bulk (substrate) of the transistors PBPA, PIN 5 , PIN 1 , PIN 2 , PIN 2 B, PIN 3 , PIN 3 A, P 1 , P 3 , P 4 , to the bulks of P 1 A, P 2 , PBP and PSW, and to a first end of the resistor R_NPLUS. The VSS line is coupled to the bulk, the drain and source of the transistor U 7 , to the bulk and source of the transistors N 1 , N 1 A, N 2 , N 3 , NIN 1 , NIN 2 , NIN 2 A, NIN 2 B, NIN 3 A, NIN 4 , NIN 2 C, N 5 , NIN 5 , and to the bulk of the transistors N 4  and NIN 3 . The gate of the transistor P 4  is coupled to the gate of the transistor PBP, to the gate of the transistor N 5 , to the drain of the transistor PIN 5 , and to the drain of the transistor NIN 5 .  
         [0046]     The DIS line is coupled to the gate of the transistor PBPA. The PD line is coupled to the gates of the transistors P 1 , P 1 A, PIN 2 C, and PIN 5 , and to the gates of the transistors N 3 , NIN 2 B, and NIN 5 . The LATCH_B line is coupled to the gate of the transistor NIN 3 A, the drain of the transistor NIN 2 C, and the gate of the transistor PIN 3 A. A line  501  couples the drains of the transistors P 2  and PSW to a second end of the resistor R_NPLUS. The INTEG line couples the drain of the transistor P 3 , the gate of the transistor U 7 , the drain of the transistor N 3 , the drain of the transistor N 2 , the gate of the transistor PIN 1 , and the gate of the transistor NIN 1 . The drain and gate of the transistor N 1  are both coupled to the drain of the transistor P 1 A, to the gate of the transistor N 1 A, and to the gate of the transistor N 2 . The gate and the drain of the transistor P 2  are both coupled to the drain of the transistor P 4 , to the gate of the transistor P 3 , and to the drain of the transistor NIA.  
         [0047]     The V OUT  line couples the drains of the transistors PBP and PSW to the drain of the transistor N 4 . The source of the transistor N 4  is coupled to the drain of the transistor N 5 . The line  515  couples the gate of the transistor N 4  to the gate of the transistor PSW, to the drain of the transistor PIN 3 A, to the drain of the transistor PIN 3 , and to the drain of the transistor NIN 3 .  
         [0048]     The gate of the transistor NIN 3  is coupled to the gate of the transistor PIN 3  and to the drains of the transistors NIN 2 A and NIN 2 B, and to the drain of the transistor PIN 2 C. The drain of the transistor PIN 1  is coupled to the drain of the transistor NIN 1 , to the gates of the transistors PIN 2  and NIN 2 , to the drain of the transistor PIN 4 , and to the drain of the transistor NIN 4 . The gates of the transistors NIN 4  and NIN 2 C are coupled together, to the gates of the transistors PIN 4 , NIN 2 A, and PIN 2 B, to the drain of the transistor PIN 2 , and to the drain of the transistor NIN 2 . The bulk of the transistor PIN 4  is coupled to its source. The drain of the transistor PBPA is coupled to the source of the transistor PBP.  
         [0049]     As explained above, the current switch  500  has three modes of operation: operating mode, standby mode, and disconnect mode. Each of these modes is now explained in relation to the components in  FIG. 5 . First, in the operating mode both of the signals PD and DIS are set LOW. This disables the current bypass transistor PBP and enables the over-current detector amplifier along with the mode control logic. The current switch  500  is now able to detect over currents. The signal LATCH_B, which is normally HIGH in this mode (using a pull up PMOS outside of this block), is coupled in wired OR configuration with similar current switches, used to thereby disconnect the power supply (VDD), if either one or more of the current switches detects an over-current condition. The current switch  500  provides the power supply voltage from power line VDD to the output terminal OUT through the switch transistor PSW, which is normally in an ON state in this mode, and resistor R_NPLUS, which is used for the over-current detection. The voltage drop across the resistor R_NPLUS is the input signal for the over-current detector amplifier P 2 /P 3 /N 1 A/N 2 . The amplifier includes two skewed current mirrors  580  and  590  coupled to the summation node INTEG. The transistors of the over-current detector amplifier current mirrors are sized so that the current sink, normally provided by the transistor N 2  of the amplifier, is stronger than current source provided by the transistor P 3 . This current difference pulls the INTEG node to the ground potential. Because there are an even number of inversions (4) between the INTEG node and the gate node of the switch transistor PSW, its gate is the ground potential too and the switch transistor PSW is in an ON state.  
         [0050]     When the current supplied to the output node exceeds some threshold level, the voltage drop across the resistor R_NPLUS becomes sufficient to turn the current ratio of the amplifier current mirrors in opposite directions. This happens because the bias voltage of the current source transistor P 3  is the sum of the gate-source voltage of P 2  and the voltage drop across the resistor R_NPLUS. Because the current source transistor P 3  now overrides the current sink, the voltage of the INTEG node starts to rise. The slew rate is established by the values of the current difference of the source and sink and the capacitor U 7 . Thus, the higher the voltage drop across the resistor R_NPLUS, the faster the voltage at the INTEG node is increasing. The delay is used to prevent false triggering of the current switch  500  as the result of brief current spikes occurring during the normal operation of the current switches, coupled to the OUT node of the switch, and during the initial power supply ramp up. When the voltage at the INTEG node exceeds the upper threshold of the Schmitt trigger, the gate voltage of the switch transistor PSW goes high and turns this transistor off. At the same time, the transistor N 4  turns on and pulls the output terminal OUT to ground. Simultaneously, the transistor NIN 2 C turns on, pulling the LATCH_B line to ground. This induces similar OFF conditions to all the switch transistors of all the current switches connected in wired OR configuration along their LATCH_B lines.  
         [0051]     Although the voltage across the resistor R_NPLUS instantaneously drops to 0 and the current sink of the over-current detector amplifier becomes stronger than the current source, it takes some time to discharge the capacitor U 7  coupled to the INTEG node down to the lower threshold voltage of the Schmitt trigger. During this time the OUT line stays grounded. The duration of this state should be sufficient for all latch-up conditions that caused the over-current to disappear. When the Schmitt trigger flips, the current switch is returned to the normal operation state.  
         [0052]     In the standby mode, the signal on the line PD is set HIGH and the signal on the DIS line is LOW. The current bypass transistor PBP is enabled and the over-current detector amplifier along with the mode control logic and the current switch transistor PSW are disabled. The signal on the LATCH_B line no longer affects the operation of the current switch  500 . The current switch  500  provides the power supply voltage from the power line VDD to the OUT terminal through two relatively weak bypass transistors PBP and PBPA in series. The sizes of the transistors PBP and PBPA are chosen such that the current they can provide is sufficient to maintain standby conditions of the respective blocks of the integrated circuit, but too small to sustain any latch-up condition anywhere in the integrated circuit. Since the over-current protection amplifier is disabled, the current switch  500  does not consume any current in standby mode of operation.  
         [0053]     In the disconnect mode, both of the signals PD and DIS are set HIGH. The only difference between the disconnect and the standby mode is that in the disconnect mode the bypass current path is cut off and no current can be provided to the OUT terminal. This mode of operation is used to permanently disconnect damaged blocks from the power supply.  
         [0054]     In those embodiments that use metal oxide semiconductors (MOS) to implement the contact detector, the PMOS transistors are placed substantially far away from NMOS transistors so that the current switch  500  itself is substantially immune to latch-up and any resulting permanent damage. Those skilled in the art will recognize proper spacing for the PMOS and NMOS transistors, which is based on feedback gains and the sizes of transistor components.  
         [0055]     In a preferred embodiment, the power switches and other components of a contact detector circuit in accordance with the present invention are fabricated as part of a single integrated circuit.  FIGS. 6-11  show steps for fabricating a detector circuit in accordance with one embodiment of the present invention. Identical elements are labeled with the same number.  FIGS. 6 and 7  show, respectively, top and side cross-sectional views of a structure  600  containing semiconductor substrate  601 .  FIGS. 8 and 9  show, respectively, top and side cross-sectional views of a structure  650  containing the semiconductor substrate  601  after a first set of electronics  655 , a channel  655 , and a protection element  660  are formed on it. The first set of electronics  655  are for capturing and processing image data. The channel  665  couples the first set of electronics  655  to a protection element  660 .  
         [0056]      FIGS. 10 and 11  show, respectively, top and side cross-sectional views of a structure  700 , which is the structure  650  after an insulating layer  710  has been formed over the protection element  660  (shown in phantom, outlined by dashed lines) and a passivation layer  720  has been formed over the electronics  655  to form an exposed portion.  
         [0057]     Those skilled in the art will recognize other structures in accordance with the present invention. For example,  FIG. 12  shows a finger swipe sensor  800  having an exposed area  810  bordered on opposing ends by the unexposed areas  820 A and  820 B. Because a finger  840  traveling along the finger swipe sensor  800  only travels between the lines  820  and  821  (a swipe area defined by a swipe direction and does not include the areas  830 A and  830 B), an insulating layer does not need to cover the areas  830 A and  830 B.  
         [0058]     It will be readily apparent to one skilled in the art that other modifications may be made to the embodiments without departing from the spirit and scope of the invention as defined by the appended claims.

Technology Category: 3