Patent Document

This application is a continuation in part of application Ser. No. 08/054,918 filed on Apr. 29, 1993 now issued as U.S. Pat. No. 5,303,138 on Apr.  12, 1994. This application is a continuation of reissue application Ser. No. 09/039,106, filed on Mar. 13, 1998, now Re 36,571. The above - listed application Ser. No.  09 / 039 , 106  is commonly assigned with the present invention and is incorporated herein by reference. Ser. No.  09 / 039 , 106  is a reissue of application Ser. No.  08 / 225 , 027 , filed on Apr.  8 ,  1994 , now U.S. Pat. No.  5 , 528 , 482 , which is a continuation of application Ser. No.  08 / 045 , 918 , filed on Apr.  29 ,  1993 , now U.S. Pat. No.  5 , 303 , 138 .   
    
    
     FIELD OF THE INVENTION 
     This invention relates to switching type poser converters and in particular to forward and flyback converters having a clamp-mode topology. 
     BACKGROUND OF THE INVENTION 
     Self synchronized rectifiers refer to rectifiers using MOSFET rectifying devices having control terminals which are driven by voltages of the windings of the power transformer in order to provide the rectification of the output of the transformer. Use of synchronous rectifiers has been limited however by the inefficiency of these rectifiers in buck derived converter topologies. Efficiency is limited due to the nature of switching of buck derived converters (i.e. buck, buck-boost, boost converters including forward and flyback topologies and due to the variability of the transformer reset voltages in the forward type converters. This variability of reset voltage limits the conduction time of one of the MOSFET rectifiers, diminishing the effectiveness and efficiency of the rectifier. This is because the rectifying devices do not conduct for the full switching period and the gate drive energy of one of the rectifiers is dissipated. 
     SUMMARY OF THE INVENTION 
     A synchronous rectifier is combined with a clamped-mode buck derived power converter. In one illustrative embodiment a hybrid rectifier includes a MOSFET rectifying device active in a first cyclic interval of the conduction/nonconduction sequence of the power switch. A second rectifying device embodied in one illustrative embodiment as a low forward voltage drop bipolar diode rectifying device is active during an alternative interval to the first conduction/nonconduction interval The gate drive to the MOSFET device is maintained continuous at a constant level for substantially the all of the second interval by the clamping action of the clamping circuitry of the converter. This continuous drive enhances the efficiency of the rectifier. 
     The bipolar rectifier device may also embodied as a MOSFET device in a rectifier using two MOSFET devices. The subject rectifier may be used in both forward and flyback poser converters. 
    
    
     BRIEF DESCRIPTION OF THE DRAWING 
     FIG. 1 is a schematic of a forward converter, of the prior are, having a synchronous rectifier; 
     FIG. 2 is a voltage waveform of the secondary transformer winding of the converter of FIG. 1; 
     FIG. 3 is a schematic of a clamped-mode forward converter with a synchronous rectifier embodying the principles of the invention; 
     FIG. 4 is a voltage waveform of the secondary transformer winding of the converter of FIG. 3; 
     FIG. 5 is a schematic of another version of a clamped-mode forward converter with a synchronous rectifier embodying the principles of the invention; 
     FIG. 6 is a schematic of another version of a clamper-mode forward converter with a synchronous rectifier and a center tapped secondary winding embodying the principles of the invention; 
     FIG. 7 is a schematic of a clamped-mode flyback converter with a synchronous rectifier embodying the principles or the invention; and 
     FIG. 8 is a schematic of another version of a clamped-mode forward converter with a synchronous rectifier and a center tapped secondary winding embodying the principles of the invention. 
    
    
     DETAILED DESCRIPTION 
     In the converter shown in the FIG. 1, a conventional forward topology of the prior art with an isolating power transformer is combined with a self synchronized synchronous rectifier. In such a rectifier controlled devices are used with the control terminals being driven by an output winding of the power transformer. 
     A DC voltage input V ix , at input  100 , is connected to the primary winding  110  of the power transformer by a MOSFET power switch  101 . The secondary winding  102  is connected to an output lead  103  through an output filter inductor  104  and a synchronous rectifier including the MOSFET rectifying devices  105  and  106 . Each rectifying device includes a body diode  108  and  107 , respectively. 
     With the power switch  101  conducting, the input voltage is applied across the primary winding  110 . The secondary winding  102  is oriented in polarity to respond to the primary voltage with a current flow through the inductor  104 , the load connected to output lead  103  and back through the MOSFET rectifier  106  to the secondary winding  102 . Continuity of current flow in the inductor  104 , when the power switch  101  is non-conducting, is maintained by the current path provided by the conduction of the MOSFET rectifier  105 . An output filter capacitor  111  shunts the output of the converter. 
     Conductivity of the MOSFET rectifiers is controlled by the gate drive signals provided by the voltage appearing across the secondary winding  102 . This voltage is shown graphically by the voltage waveform  201  in FIG.  2 . During the conduction interval T 1  of the power switch  101 , the secondary winding voltage V as1  charges the gate of MOSFET  106  to bias it conducting for the entire interval T 1 . The MOSFET  105  is biased non conducting during the T 1  interval. The conducting MOSFET rectifying device  106  provides the current path allowing energy transfer to the output during the interval T 1 . The gate of MOSFET rectifier  106  is charged in response to the input voltage V in . All of the gate drive energy due to this voltage is dissipated. 
     As the poser MOSFET switch  101  turns off, the voltage V as1  across the secondary winding  102  reverses polarity just as the time interval T 2  begins. This voltage reversal initiates a reset of the transformer magnetizing inductance, resonantly discharges the gate of MOSFET rectifier  106  and begins charging the gate of MOSFET rectifier  105 . As shown by the voltage waveform of FIG. 2, the voltage across the secondary winding  102  is not a constant value, but is rather a variable voltage that collapses to zero in the subsequent time interval T 3 , which occurs prior to the subsequent conduction interval of the power switch  101 . This voltage is operative to actually drive the rectifier  105  conducting over only a portion of the time interval T 2  which is indicated by the cross hatched area  202  associated with the waveform  201  n FIG.  2 . This substantially diminishes the performance of the rectifier  105  as a low loss rectifier device. This is aggravated by the fact that the body diode  108  of the rectifier  105  has a large forward voltage drop which is too large to efficiently carry the load current. 
     The loss of efficiency of the synchronous rectifier limits the overall efficiency of the power converter and has an adverse effect on the possible power density attainable. Since the synchronous rectifier  105  does not continuously conduct throughout the entire switching period, a conventional rectifier diode (e.g. connected in shunt with rectifier  105 ) capable of carrying the load current is required in addition to MOSFET rectifier  105 . This inefficiency is further aggravated by the gate drive energy dissipation associated with the MOSFET rectifier  106 . This gate drive loss may exceed the conduction loss for MOSFET rectifier  106 , at high switching frequency (e.g. &gt;300 kHz). 
     The efficiency of a forward converter with synchronous rectification is significantly improved according to the invention by using a clamp circuit arrangement to limit the reset voltage and by using a low forward voltage drop diode in the rectifying circuitry. Such an arrangement is shown in the schematic of FIG.  3 . In this forward power converter the power MOSFET device  101  is shunted by a series connection of a clamp capacitor  321  and a MOSFET switch device  322 . The conducting intervals of power switch  101  and MOSFET device  322  are mutually exclusive. The duty cycle of power switch  101  is D and the duty cycle of MOSFET device  322  is 1−D. The voltage inertia of the capacitor  321  limits the amplitude of the reset voltage appearing across the magnetizing inductance during the non conducting interval of the MOSFET power switch  101 . 
     The diode  323  of the synchronous rectifier, shown in FIG. 3, has been substituted for the MOSFET device  106  shown in the FIG.  1 . Due to the dissipation of gate drive energy the overall contribution of the MOSFET rectifier  106  in FIG. 1 is limited. The clamping action of the clamping circuitry results in the constant voltage level  402  shown in the voltage waveform  401 , across the secondary winding  102 , in the time period T 2 . This constant voltage applied to the gate drive of the MOSFET rectifier  105  drives it into conduction for the entire T 2  reset interval. In this arrangement there is no need for a bipolar or a body diode shunting the MOSFET rectifier  105 . An advantage in the clamped mode converter is that the peak inverse voltage applied to the diode  323  is much less than that applied to the similarly positioned MOSFET device in FIG.  1 . Accordingly the diode  323  may be a very efficient low voltage diode which may be embodied by a low voltage diode normally considered unsuitable for rectification purposes. 
     In the operation of the clamped mode forward converter the MOSFET switch  322  is turned off just prior to turning the MOSFET power switch on. Energy stored in the parasitic capacitances of the MOSFET switching devices  101  and  322  is commutated to the leakage inductance of the power transformer, discharging the capacitance down toward zero voltage. During the time interval T 3  shown in FIG. 4, voltage across the primary winding is supported by the leakage inductance. The voltage across the secondary winding  102  drops to zero value as shown in the FIG.  4 . With this zero voltage level of the secondary winding, the output inductor resonantly discharges the gate capacitance of the MOSFET rectifying device  105  and eventually forward biases the the bipolar diode  323 . The delay time T 3  is a fixed design parameter and is a factor in the control of the power switches  101  and  322 , which may be switched to accommodate soft waveforms. This synchronous rectification circuit of FIG. 3 provides the desired efficiencies lacking in the arrangement of the circuit shown in FIG. 1 
     Control of the conductivity of the power switching devices  101  and  322  is by means of a control circuit  350 , which is connected, by lead  351 , to an output terminal  103  of the converter to sense the output terminal voltage. The control circuit  350  is connected, by leads  353  and  354 , to the drive terminals of the power switches  101  and  322 . The drive signals are controlled to regulate an the output voltage at output terminal. The exact design of a control circuit, to achieve the desired regulation, is well known in the art and hence is not disclosed in detail herein. This control circuit  350  is suitable for application to the converters of FIGS.  5 , 6 , 7  and  8 . 
     A modified version of the circuit of FIG. 3 is shown in the circuit schematic of the FIG.  5 . The converter of FIG. 5 is a clamped mode forward converter having two gated synchronous rectifying devices  105  and  106 . In this embodiment of the synchronous rectifier the synchronized rectifying device  106  can be used without adversely affecting the converter efficiency at lower operating frequencies. 
     The circuit of FIG. 6 is a clamped mode forward converter having a rectifier analogous to that of FIG. 3 in using one bipolar rectifying diode. The secondary winding is tapped creating two secondary winding segments  603  and  602 . 
     The converter FIG. 7 operates in a flyback mode. The bipolar and synchronous rectifier device are in a reversed connection from the connection of FIG. 3 to accommodate the flyback operation. 
     In some applications directs application of the gate drive signal directly from the secondary winding may result in voltage spikes exceeding the rating of the gate. A small signal MOSFET device  813  is connected to couple the gate drive to the MOSFET rectifying device  105 . This device may be controlled by the control drive lead  815  to limit the peak voltage applied to the gate of rectifier  105 . The MOSFET synchronous rectifier is then discharged through the body diode of the MOSFET device  813 .

Technology Category: h