Patent Document

BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a method and apparatus for detecting line-shorts between conductive layers of a semiconductor device and the like. 
     2. Description of the Related Art 
     Generally, in a semiconductor device or a liquid crystal display (LCD) panel, when line-shorts are generated between conductive layers (wires), fatal electrical faults are caused in the semiconductor device or the LCD panel. 
     Therefore, it is essential to provide an automated line-shorts inspection method and apparatus for test conductive layers, so that the analysis of line-shorts is fed back to the manufacturing process, which would enhance the manufacturing yield. 
     In a first prior art method for detecting line-shorts of an LCD panel (see: JP-A-4-314032), a conductive tape is adhered to all gate bus lines and a conductive tape is adhered to all source bus lines. In this case, the conductive tapes and are connected by switches, respectively, to the ground. 
     In order to detect line-shorts around cross-over portions between the gate bus lines and the source bus lines, first, the respective switches are turned OFF and ON, and then, charged gate bus lines and grounded gate bus lines are monitored by a CRT or the like using a scanning electron microscope (SEM) inspection. In this case, the grounded gate bus lines are related to the line-shorts defects. Next, the respective switches are turned ON and OFF, and then, charged source bus lines and grounded source bus lines are monitored by a CRT or the like using the SEM inspection. In this case, the grounded source bus lines are related to the line-shorts defects. Thus, the locations of the line-shorts can be specified. This will be explained later in detail. 
     In the above-described first prior art method, however, if the test structures, i.e., the gate bus lines and the source bus lines are very-fined, it is difficult to adhere the conductive tapes thereto. Additionally, if the number of test structures formed on a transparent insulating substrate is large, the adhesion of conductive tapes thereto takes a long time, which would increase the burden of line-shorts inspection. Further, the transparent insulating substrate may be contaminated by the adhesion of the conductive tapes. Furthermore, since the SEM inspection requires vacuum equipment including a vacuum chamber, a vacuum pump, a vacuum meter and the like, the inspection apparatus therefor is expensive. 
     In a second prior art method for detecting line-shorts (see: Aakella V. S. Satya, “Microelectronic Test Structures for Rapid Automated Contactless Inline Defect Inspection”, IEEE Trans. on Semiconductor Manufacturing, Vol. 10, No, 3, pp. 384-389), parallel serpentine test conductive layers are provided to sandwich rows of floating rectangular pads. The test conductive layers are grounded at their ends through a substrate-contact. 
     In order to detect line-shorts between the conductive layers and the pads, electron beams of a low energy are scanned onto the pads. As a result, secondary-electron peak-intensity profile is displayed on a CRT or the like using the SEM inspection. In this case, the number of secondary electrons emitted from the pads having line-shorts with the conductive layers is made smaller. Thus, the locations of the line-shorts can be specified. This also will be explained later in detail. 
     In the second prior art method, however, in order to increase the S/N ratio, the area of each of the pads has to be increased, which cannot lengthen the conductive layers. As a result, the conductive layers are far from those of actual products. Also, the substrate-contact for grounding the conductive layers increases the manufacturing steps, which would increase the manufacturing cost. Further, since the SEM inspection requires vacuum equipment including a vacuum chamber, a vacuum pump, a vacuum meter and the like, the inspection apparatus therefor is expensive. 
     SUMMARY OF THE INVENTION 
     It is an object of the present invention to provide a method and apparatus for detecting line-shorts of a semiconductor device capable of decreasing the burden of line-short inspection without being expensive. 
     According to the present invention, in a method for detecting a line-short between conductive layers, a potential (or temperature) distribution of the conductive layers is detected while applying a DC voltage thereto. 
     Also, in an apparatus for detecting a line-short between conductive layers a scanning potential (or thermal) microscope is provided to detect a potential (or temperature) distribution of the conductive layers while applying a DC voltage thereto. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The present invention will be more clearly understood from the description set forth below, as compared with the prior art, with reference to the accompanying drawings, wherein: 
     FIG. 1 is a plan view for explaining a first prior art method for detecting line-shorts; 
     FIG. 2 is a plan view for explaining a second prior art method for detecting line-shorts; 
     FIG. 3 is a diagram for explaining a first embodiment of the method for detecting line-shorts of a semiconductor device according to the present invention; 
     FIG. 4 is a cross-sectional view taken along the line IV—IV of FIG. 3; 
     FIG. 5 is a flowchart showing the operation of the tester of FIG. 3; 
     FIG. 6 is a diagram showing a potential distribution of the device of FIG. 3 along the direction D 1  of FIG. 3; 
     FIG. 7 is a diagram showing a potential distribution along the directions D 2  of FIG. 3; 
     FIG. 8 is a diagram showing a potential distribution along the direction D 3  of FIG. 3; 
     FIG. 9 is a diagram for explaining a second embodiment of the method for detecting line-shorts of a semiconductor device according to the present invention; 
     FIG. 10 is a cross-sectional view taken along the line X—X of FIG. 9; 
     FIG. 11 is a flowchart showing the operation of the tester of FIG. 9; 
     FIG. 12 is a diagram showing a temperature distribution of the tester of FIG. 9 along the direction D 1  of FIG. 9; 
     FIG. 13 is a diagram showing a temperature distribution along the directions D 2  of FIG. 9; 
     FIG. 14 is a diagram showing a temperature distribution along the direction D 3  of FIG. 9; and 
     FIG. 15 is a plan view showing a temperature distribution of the comb-shaped conductive layers of FIG. 9 around one line-short. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT 
     Before the description of the preferred embodiments, prior art methods for detecting line-shorts will be explained with reference to FIGS. 1 and 2. 
     In FIG. 1, which is a plan view for explaining a first prior art method for detecting line-shorts of an LCD panel (see: JP-A-4-314032), reference numeral  101  designates a transparent insulating substrate on which gate bus lines  102  and source bus lines  103  are formed. In this case, the gate bus lines  102  and the source bus lines  103  are perpendicular to each other and are isolated by insulating material (not shown). Also, one pixel (not shown) formed by a thin film transistor (TFT) and a liquid crystal cell is provided at each intersection of the gate bus lines  102  and the source bus lines  103 . 
     Also, a conductive tape  104  is adhered to all the gate bus lines  102  and a conductive tape  105  is adhered to all the source bus lines  103 . In this case, the conductive tapes  104  and  105  are connected by switches  106  and  107 , respectively, to the ground GND. 
     In order to detect line-shorts around cross-over portions between the gate bus lines  102  and the source bus lines  103 , first, the switches  106  and  107  are turned OFF and ON, respectively, and then, charged gate bus lines and grounded gate bus lines are monitored by a CRT or the like using the SEM inspection. In this case, the grounded gate bus lines are related to the line-shorts defects. Next, the switches  106  and  107  are turned ON and OFF, respectively, and then, charged source bus lines and grounded source bus lines are monitored by a CRT or the like using the SEM inspection. In this case, the grounded source bus lines are related to the line-shorts defects. Thus, the locations of the line-shorts can be specified. 
     In the first prior art method as illustrated in FIG. 1, however, if the test structures, i.e., the gate bus lines  102  and the source bus lines  103  are very-fined, it is difficult to adhere the conductive tapes  104  and  105  thereto. Additionally, if the number of test structures formed on the transparent insulating substrate  101  is large, the adhesion of conductive tapes thereto takes a long time, which would increase the burden of line-shorts inspection. Further, the transparent insulating substrate  101  may be contaminated by the adhesion of the conductive tapes  104  and  105 . Furthermore, since the SEM inspection requires vacuum equipment including a vacuum chamber, a vacuum pump, a vacuum meter and the like, the inspection apparatus therefor is expensive. 
     In FIG. 2, which is a plan view for explaining a second prior art method for detecting line-shorts (see: Aakella V. S. Satya, “Microelectronic Test Structures for Rapid Automated Contactless Inline Defect Inspection”, IEEE Trans. on Semiconductor Manufacturing, Vol. 10, No. 3, pp. 384-389), parallel serpentine test conductive layers  201  are provided to sandwich rows of floating rectangular pads  202 . The test conductive layers  201  are grounded at their ends through a substrate-contact. 
     In order to detect line-shorts between the conductive layers  201  and the pads  202 , electron beams of a low energy are scanned onto the pads  202 . As a result, secondary-electron peak-intensity profile is displayed on a CRT or the like using the SEM inspection. In this case, the number of secondary electrons emitted from the pads  202  having line-shorts with the conductive layers  201  is made smaller. Thus, the locations of the line-shorts can be specified. 
     In the second prior art method as illustrated in FIG. 2, however, in order to increase the S/N ratio, the area of each of the pads  202  has to be increased, which cannot lengthen the conductive layers  201 . As a result the conductive layers  201  are far from those of actual products. Also, the substrate-contact for grounding the conductive layers  201  increases the manufacturing steps, which would increase the manufacturing cost. Further, since the SEM inspection requires vacuum equipment including a vacuum chamber, a vacuum pump, a vacuum meter and the like, the inspection apparatus therefor is expensive. 
     FIG. 3 is a diagram for explaining a first embodiment of the method for detecting line-shorts of a semiconductor device according to the present invention, and FIG. 4 is a cross-sectional view taken along the line IV—IV of FIG.  3 . In FIGS. 3 and 4, reference numeral  1  designates a semiconductor substrate on which an about 0.5 μm thick insulating layer  2  is formed. Also, two comb-shaped conductive layers  3  and  4  which interdigitate each other are formed on the insulating layer  2 . In this case, the conductive layers  3  and  4  are made of aluminum, for example, and have about 3 μm wide pieces having a spacing of about 3 μm. Also, the combination of the conductive layers  3  and  4  have a size of about 1 mm×1 mm. 
     A semiconductor device formed by the elements  1 ,  2 ,  3  and  4  is mounted on a stage  5  which is driven along the X- and Y-directions by a tester  6 . Note that the X direction is in parallel to the pieces of the comb-shaped conductive layers  3  and  4 . On the other hand, the Y direction is perpendicular to the pieces of the comb-shaped conductive layers  3  and  4 . 
     Also, probes  7  and  8  are placed on the pads of the conductive layers  3  and  4 , respectively, and are connected to the tester  6 . 
     Further, the tester  6  is operated to drive a scanning probe  9  of a scanning potential microscope (not shown) for detecting the potential distribution on the surface of the semiconductor device. The scanning potential microscope is an interleave type scanning potential microscope, a scanning Kelvin probe force microscope or a scanning Maxwell-stress microscope. Additionally, the tester  6  is operated to drive a probe  10  of an atomic force microscope (not shown) for mapping the surface atomic structure by measuring the force acting on the probe  10 . 
     The tester  6  is constructed by a microcomputer or the like. 
     The operation of the tester  6  of FIG. 3 is explained next with reference to FIG.  5 . 
     First, at step  501 , a DC test is carried out by applying a DC voltage between the probes  7  and  8 , to determine whether or not a current flows between the probes  7  and  8 . Only when such a current flows, does the control proceed to step  502 . Otherwise, the control proceeds directly to step  507 . 
     At step  502 , while a DC voltage of about 0.2V is applied between the probes  7  and  8 , a first potential detecting operation is carried out by moving the probe  9  for a wide range D 1  along the Y direction. For example, a potential distribution as shown in FIG. 6 is obtained by the scanning potential microscope. In this case, around Y=Y 1 , the potential at one piece of the comb-shaped conductive layer  3  is lower than the potential (about 0.2V) at the probe  7  and the potential at one piece of the comb-shaped conductive layer  4  is higher than the potential (about OV) at the probe  8 . Thus, one line-short is determined to be generated around Y=Y 1 . 
     Next at step  503 , a DC voltage of about 0.2V is applied between the probes  7  and  8 , and then, a second potential detecting operation is carried out by moving the prove  9  for a narrow range D 2  along the Y direction around Y=Y 1  while shifting the probe  9  along the X direction by about 50 μm. For example, a potential distribution as shown in FIG. 7 is obtained by the scanning potential microscope. In this case, around X=X 1 , the difference in potential between one piece of the comb-shaped conductive layer  3  and one piece of the comb-shaped conductive layer  4  is minimum. Thus, one line-short is determined to be generated around X=X 1 . 
     Next, at step  504 , while a DC voltage of about 0.2V is applied between the probes  7  and  8 , a third potential detecting operation is carried out by moving the probe  9  for a narrow range D 3  along the X direction around (X 1 , Y 1 ). For example, a potential distribution as shown in FIG. 8 is obtained by the scanning potential microscope. In this case, the potential at one piece of the comb-shaped conductive layer  3  is sharply changed as indicated by a solid line at X=X 1 ′ around X 1 . Thus, one line-short is determined to be accurately generated at X=X 1 ′. Note that, if the probe  9  is moving on one piece of the comb-shaped conductive layer  4 , the potential is sharply changed as indicated by a dotted line at X=X 1 ′. 
     Next, at step  506 , the tester  6  is operated to drive the probe  10  onto the location determined by (X 1 ′, Y 1 ) to detect an accurate configuration of one line-short by the atomic force microscope. 
     Thus, the operation of FIG. 5 is completed by step  507 . 
     In the above-described first embodiment, the probe  9  can serve as the probe  10 , so that only one probe can be provided. 
     FIG. 9 is a diagram for explaining a second embodiment of the method for detecting line-shorts of a semiconductor device according to the present invention, and FIG. 10 is a cross-sectional view taken along the line X—X of FIG.  9 . In FIGS. 9 and 10, a scanning probe  9 A of a scanning thermal microscope (not shown) is provided instead of the scanning probe  9  of the scanning potential microscope of FIG. 3, to detect the temperature distribution on the surface of the semiconductor device. 
     The operation of the tester  6  of FIG. 9 is explained next with reference to FIG.  11 . 
     First, at step  1101 , in the same way as at step  501 , a DC test is carried out by applying a DC voltage between the probes  7  and  8 , to determine whether or not a current flows between the probes  7  and  8 . Only when such a current flows, does the control proceed to step  1102 . Otherwise, the control proceeds directly to step  1107 . 
     At step  1102 , while a DC voltage of about 0.2V is applied between the probes  7  and  8 , a first temperature detecting operation is carried out by moving the probe  9 A for a wide range D 1  along the Y direction. For example, a temperature distribution as shown in FIG. 12 is obtained by the scanning thermal microscope. In this case, around Y=Y 1 , the temperature at one piece of the comb-shaped conductive layer  3  is much higher than a predetermined temperature TEMO and the potential at one piece of the comb-shaped conductive layer  4  is also much higher than the pretermined temperature TEMO. Thus, one line-short is determined to be generated around Y=Y 1 . 
     Next at step  1103 , a DC voltage of about 0.2V is applied between the probes  7  and  8 , and then, a second temperature detecting operation is carried out by moving the prove  9 A for a narrow range D 2  along the Y direction around Y=Y 1  while shifting the probe  9 A along the X direction by about 50 μm. For example, a temperature distribution as shown in FIG. 13 is obtained by the scanning temperature microscope. In this case, around X=X 1 , the difference in temperature between one piece of the comb-shaped conductive layer  3  and one piece of the comb-shaped conductive layer  4  is inverted. Thus, one line-short is determined to be generated around X=X 1 . 
     Next, at step  1104 , while a DC voltage of about 0.2V is applied between the probes  7  and  8 , a third temperature detecting operation is carried out by moving the probe  9 A for a narrow range D 3  along the X direction around (X 1 , Y 1 ). For example, a temperature distribution as shown in FIG. 14 is obtained by the scanning temperature microscope. In this case, the temperature at one piece of the comb-shaped conductive layer  3  is sharply changed as indicated by a solid line at X=X 1 ′ around X 1 . Thus, one line-short is determined to be accurately generated at X=X 1 ′. Note that, if the probe  9 A is moving on one piece of the comb-shaped conductive layer  4 , the temperature is sharply changed as indicated by a dotted line at X=X 1 ′. In this case, note that the temperature distribution around the line-short is shown in FIG.  15 . 
     Next, at step  1106 , the tester  6  is operated to drive the probe  10  onto the location determined by (X 1 ′, Y 1 ) to detect an accurate configuration of one line-short by the atomic force microscope. 
     Thus, the operation of FIG. 11 is completed by step  1107 . 
     In the first embodiment, the potential distribution is subject to the charge-up phenomenon of the insulating layer  2 . 
     On the other hand, in the second embodiment, the temperature distribution is not subject to the charge-up phenomenon of the insulating layer  2 . 
     In the above-described embodiments, the tester  6  is combined with the scanning potential (or thermal) microscope and the atomic force microscope. 
     As explained hereinabove, according to the present invention, since a potential or temperature detecting operation is carried out without using vacuum equipment, the inspection apparatus can be inexpensive. Also, since it is unnecessary to adhere conductive tapes, the burden of line-short inspection can be decreased.

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