Patent Document

BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to incremental position encoders and position interpolators and circuits for generating change of position signals with a high degree of accuracy. More particularly, the present invention relates to real time diagnostic and correction circuits for improving incremental encoder servo-signal performance at low and high speeds. 
     2. Description of the Prior Art 
     Rotary and linear encoders are well known to those skilled in the encoder art and it is also well known that when encoder sensors are moved relative to a rotary or linear scale, they may produce a square wave or sinusoidal analog output signal. These signals may be processed and counted to determine relative movement of the scale to the sensor head. When two sensor heads are employed in an incremental encoder system, one is phase-displaced 90 degrees from the other so that the simultaneous effective outputs may represent both magnitude and direction. 
     Encoder systems are employed to generate velocity signals by calculating the change of relative position as a function of time. The ability of a servo-positioner to perform its positioning function is dependent on the encoder system&#39;s resolution accuracy and its ability to generate both position and velocity information. 
     Low velocity speeds generate signals which are unstable. This causes dithering and hunting in the servo-positioner being driven. It is also possible to incur spikes, blips and distortions at low critical speeds from noise coupling of the servomotor and other sources in the encoder system. 
     High or peak velocity speeds can produce loss of position due to illegal state changes as well from as the aforementioned spikes, blips and distortions. 
     Blips and distortions may also be caused by electronic noise, defective encoders and/or sensors as well as dirty or cracked or scratched encoder scales. 
     Heretofore, the manufacturers of encoders specified the preferred range of operable speeds to be used with their encoders. Customer/users are also aware that there is a range of acceptable speeds for encoders that should be even more restrained than the manufacturer&#39;s recommendations. 
     Accordingly, it would be extremely desirable to provide an encoder system having an improved velocity profile for incremental encoders that automatically optimizes the performance and reduces error conditions. 
     SUMMARY OF THE INVENTION 
     It is a principal object of the present invention to provide an encoder system that reduces hunting at low speeds. 
     It is a principal object of the present invention to provide an encoder system with an improved output error signal. 
     It is a principal object of the present invention to provide an encoder system that smoothes out and/or eliminates noise spikes and blips permitting higher maximum velocities without sacrificing position accuracy. 
     It is a principal object of the present invention to detect an illegal state change in an encoder system which may have been caused by noise and/or defective encoder equipment. 
     It is a principal object of the present invention to provide a real time diagnostic evaluation of loss of position or state error in an incremental encoder system. 
     It is a principal object of the present invention to increase the speed of operation of incremental encoders by performing real time processing of input signal distortions and maintaining such distortions within predetermined tolerances. 
     It is yet another object of the present invention to analyze both state errors and input signal errors to determine if the errors are the result of excessive speed or noise or are due to faulty encoders. 
     It is yet another object of the present invention to provide a novel digital filter that substantially eliminates errors introduced by analog input signals. 
     It is a general object of the present invention to detect high velocity conditions which could create errors before they occur. 
     It is a general object of the present invention to employ digital filtered position vectors to optimize the minimum and maximum velocity in an incremental encoder system. 
     It is a general object of the present invention to match output signals to commercially available servo-controllers so that the servo-controller can handle the data rate of the information being supplied without errors. 
     It is a general object of the present invention to provide diagnostic logic means for determining the magnitude of noise and encoder induced errors to determine the source of the error. 
     It is a general object of the present invention to provide a high speed encoder system that is readily assembled from commercially available components such as complex programmable logic devices, digital signal processors and application specific programmable devices. 
     According to these and other objects of the present invention there is provided an incremental encoder system which comprises a pair of sensor/encoders arranged as a quadrature pair for producing analog position signals that are converted to digital signals which define a digital position vector and the presence or absence of an error. The digital position vector and the digital error signals are processed in a high speed logic device that is programmable to produce a filtered quadrature output capable of defining the position of the sensor relative to the encoder scale and its velocity. The system removes noise spikes and determines if there has been an illegal state change or state error. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a schematic drawing in perspective of a rotary graduated disk and plural sensors comprising a prior art incremental encoder system; 
     FIG. 2 is a schematic drawing in perspective view of a prior art linear reflective incremental encoder system; 
     FIG. 3 is a schematic drawing of analog waveforms of the type produced by the sensors of the encoder systems of FIGS. 1 and 2; 
     FIG. 4 is a drawing of the digital waveforms produced from the analog waveforms of FIG. 3; 
     FIG. 5 is a drawing of plural digital waveforms shown in FIG.  3  and showing a synchronizing clock signal; 
     FIG. 6 is a schematic block diagram of a prior art servo-motor drive and control system using incremental encoder inputs of the type shown in FIG. 3; 
     FIG. 7 is a flow diagram of the steps and functions which occur in the prior art system shown in FIG. 6; 
     FIG. 8 is a schematic block diagram of the present invention servo-drive and control system for use with incremental encoder inputs; 
     FIG. 9 is a flow diagram of the steps and functions performed in the present invention control system shown in FIG. 8; 
     FIG. 10 is a block diagram of a digital filter of the type used in the logic circuits of FIG. 8; 
     FIG. 11 is a state error diagram showing four counter-clockwise changes of state when no error occurs; 
     FIG. 12 is a state error diagram showing four counter-clockwise changes of state when no error occurs; 
     FIG. 13 is a state error diagram showing two state changes that can occur in incremental encoders that are representative of a loss in position; 
     FIG. 14 is another state error diagram showing two state error changes that can occur in incremental encoders that are representative of a loss of position, and 
     FIG. 15 is a table of binary position states at time T and the possible legal and illegal transition states that may occur at time T+1. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Refer now to FIG. 1 showing a schematic drawing in perspective of a rotary scale incremental encoder  10  comprising a graduated disk  11  and photo-sensors  12 . There are five photo-sensors  12  shown for producing analog waveform outputs and a reference signal as will be explained hereinafter. There is shown a scanning reticle  13  through which light passes produced by a light source  14  and a condenser lens  15 . The light passes through the graduated scale  16  on the disk  11  and is sensed by the sensors  12 . One of the sensors is employed to sense the reference mark  17  on the disk  11 . The rotary scale incremental encoder  10  is typical of commercially available encoders. 
     Refer now to FIG. 2 showing a schematic drawing in perspective of a linear reflective incremental encoder  10 A. Encoder  10 A comprises a light source  14  and a condensing lens  15  through which passes collimated light through the scanning reticle  13  that is directed to the reflective scale  16 A and reflected back through the scanning reticle  13  and condensing lens  15  to the sensors  12 . The two outer sensors are used for the quadrature signals and the third or center sensor may be used for averaging or centering. 
     Refer now to FIG. 3 showing a schematic drawing of analog waveforms produced by the sensors  12 . The upper waveform  18  is an analog sensor sine wave output. The middle waveform is an analog sensor cosine output and the lower reference sensor output  21  is indicative of the voltage signal produced by the reference mark  17  shown in FIG.  1 . 
     Refer now to FIG. 4 showing a schematic drawing of digital waveforms that may be produced by some commercially available encoders and are usable directly into a servo-controller. The upper waveform  22  is indicative of a digitized sinusoidal output. The middle waveform  23  is indicative of a digitized cosine wave output and the lower waveform  24  is indicative of a reference sensor output. When the digitized measuring signals or sensor output signals shown in FIG. 4 are used directly into a servo-controller the actual position that can be determined is limited by the occurrence of the transitions that are already digitized whereas the use of the analog signals  18  and  19  represent an infinite number of positions. 
     Refer now to FIG. 5 showing a drawing of plural digital waveforms that have been produced from the analog waveforms shown in FIG.  3 . In this case the waveforms may be produced by a clock signal or other means known in the prior art. The waveform  25  and the cosine digitized waveform  26  are used as inputs to the servo-controller in the prior art as will be discussed hereinafter. Also the reference pulse  27  may be produced from the waveform  21  shown in FIG.  3  and employed in the circuit to be discussed hereinafter. The clock signal  28  is used for producing the pulses  25  through  27  and may be produced by known means not shown. 
     Refer now to FIG. 6 showing a schematic block diagram of a prior art servomotor drive and control system using incremental encoder inputs of the type shown in FIG.  3 . For purposes of this discussion, assume that the signals  18  and  19  discussed in FIG. 3 are on the lines  18  and  19  shown in FIG.  6 . For purposes of this discussion, assume that the sensor  12 A produces the analog sinusoidal signal  18  to the analog-to-digital converter  29  and the analog cosine wave  19  is inputted to the analog-to-digital converter  31 . 
     The output of converters  29  and  31  are shown on lines  32  being inputted to an interpolator  33  to produce a position signal on lines  34  shown as two bits to the position latch  35 . Also the interpolator is programmed to determine if the two digitized inputs on line  32  are out of specification so as to produce a three-bit error signal on line  36  for this example. The number of error bit signals is in part a function of what diagnostic means a user may require. The error signal is latched into error latch  37  and available to the IO interface  38 . The IO interface  38  has the ability to create an error signal on line  39  which is communicated via bus  41  and line  43  to CPU  42  which can, in turn, generate a signal that shuts the system down or affects any one of the components such as the servocontroller and servomotor via line  44 . The digital position on line  34  is applied to position latch  35  and produces the aforementioned quadrature signals  25  and  26  explained with reference to FIG.  5 . The digitized quadrature signals  25  and  26  are applied to the servo-controller  45  and enable the logic in the controller to determine position and velocity. 
     The servo-controller  45  in turn generates a signal on line  46  which may be analog or digital to an appropriate amplifier  47  which generates an output signal on line  48  that will drive the servo  49  employed in the system. 
     If the input signals on lines  25  and  26  to the servo-controller  45  contain any blips or spikes or spurious noises, the servo-controller  45  can lose track of position and would incorrectly calculate the velocity. 
     Refer now to FIG. 7 showing a flow diagram of the steps and functions which occur in the prior art system shown in FIG.  6 . The block  51  generates the quadrature encoder positions at  12 A,  12 B. Block  52  converts the analog signals to digital signals at converters  29  and  31 . Block  53  generates the digital quadrature and position error signal in the interpolator  33  and outputs the signals on lines  34  and  36 . The block  54  latches the digital position signal and error signal into latches  35  and  37 . Block  55  generates the position signals to the servo-controller on lines  25  and  26 . Block  56  generates the servo-drive signals and outputs them on line  46  utilizing servo-controller  45 . The signal on line  46  is amplified in amplifier  47  and employed to drive an appropriate servo  49  as shown at block  57 . The prior art encoder system FIG. 6 is typical of systems that are not capable of determining when an error signal has occurred or a condition prior to creation of such an error signal. 
     Refer now to FIG. 8 showing a schematic block diagram of the present invention drive and control system for use with incremental encoder inputs. For the purpose of explaining the present invention distinctions over the prior art, a similar input system is shown even though direct digitized signals may be inputted into the logic means to be explained hereinafter. The sensor  12 A creates a sinusoidal analog waveform on line  18  to the converter  29  for outputting a digital signal on line  32  representative of the analog sinusoidal signal. Similarly the sensor  12 A outputs a cosine waveform on line  19  to analog the digital converter  31  for producing a digitized cosine waveform on line  32 C. The X and Y components on lines  32  and  32 C are applied to a novel calculating means  38  to be explained in greater detail hereinafter but may include look-up tables, digital signal processors, microprocessors, and other forms of calculating means. The calculating means produces a position vector shown as eight bits on line  59  which is unfiltered and may contain noise. The signal on line  59  is applied to a delay latch  61  and returned via line  62  to the calculating means  58  for determining state errors before filtering and may be an optional feature in the present invention. The calculating means  58  also produces a multibit error signal on line  63  which is applied to novel logic means  64  along with the position vector on line  59 . The novel logic means includes means for detecting excessive rate change of position; means for detecting excessive noise coupling to the encoder; means for filtering the digital signals to be used to analyze the type of errors that have occurred and state logic means for determining the transition from a legal state to an illegal state as will be explained in greater detail hereinafter. 
     Logic means  64  produces state and phase error signals on line  63 A to the IO interface  38 A. There is shown a filtered state error signal on line  63 B to the interface  38 A. There is also shown a reference pulse on line  27 A to the interface  38 A. These signals are produced by the logic means  64 . The reference signal on line  21  from the reference sensor is applied to a comparator  21 B to provide a signal  24 A similar to  24  which is inputted into logic means  64  for producing the reference pulse on line  27 A to interface  38 A. Similarly, the logic means  64  produces the filtered quadrature output signals on lines  59 A with reduced noise to the servo-controller  45  which in turn produces a control signal to amplifier  47  which processes the control signal and produces an analog or digital signal on line  48  for controlling the servo  49 . As explained hereinbefore, the signals that are outputted from IO interface  38 A on line  39  are status signals which need to be adapted to the systems bus  41  so they may be processed in CPU  42  which can then issue instructions to the servo-controller via bus  41  and line  44 . The filtered quadrature output signals on lines  59 A are capable of optimizing the velocity of the servo-controller  45  being used. In order to do this, it is necessary to program into logic means  64  the critical velocity limits of the low and high velocities so that the logic means can determine when the servo-controller is approaching its limits of capability of handling the data rate. As an alternative, it is possible to have the logic means  64  directly communicate with the CPU  42  via line  44 A if the servo-controller does not have this capability. 
     Refer now to FIG. 9 showing a flow diagram of steps and functions performed in the present invention control system shown in FIG.  8 . This flow diagram also includes a number of optional features which may be employed or may be omitted as necessary for operation of the servo-controller that is being employed in the system. Block  65  is shown generating a quadrature encoder position which is converted at block  66  to a digital signal for input to the calculating means  58 . The calculating means  58  generates the multi-bit position vector in block  67  as well as the position multi-bit error signals. Block  68  processes the state error which is optional in the calculating means when this signal is available at line  62  from latch  61 . Block  69  shows the function of filtering the digital position vector signal in the logic means  64 . Block  71  illustrates the optional features which may be employed in logic means  64  such as comparing and analyzing vector signals at one or two stages of the digital filter and performing the optional features which will be explained hereinafter. Block  72  is shown generating the quadrature outputs on line  59 A or parallel serial outputs to the servo-controller  45  and/or to the CPU  42 . Block  73  illustrates the function of driving the servo  49  with the signals produced on line  46 , amplifier  47  and line  48 . 
     Before explaining the optional features mentioned hereinbefore, refer now to FIG. 10 showing a digital filter  66  of the type used in the logic circuits of logic means  64 . The position vector on line  59  is shown being applied to a first low pass digital filter  67  to produce a first filtered digital signal on line  68  which is applied to a second low pass digital filter  69  to produce a second filtered digital signal  71 . The signals on lines  59 ,  68  and  71  are shown being applied to a microprocessor or state machine  72  which analyzes the signals and is capable of producing the novel control signals on lines  59 A to the servo-controller  45  and on lines  63 A,  63 B and  27 A to the IO interface  38 A which are then coupled to the CPU  42 . 
     It will be understood that by employing the novel digital filter shown in FIG. 10 the system is now capable of comparing and analyzing one or two stages of the filtered position vector to enable the system to detect effectiveness of the digital filter; to detect excessive rate of change of position; to avoid velocity conditions which could create state errors and position errors; and to detect excessive noise coupling that occurs in the encoders. 
     Refer now to FIGS. 11 through 14 showing state error diagrams which diagramatically represent the diagnostic and logic means  64  ability to determine state errors during transition. FIG. 11 shows a quadrature state error diagram illustrating the four binary clockwise conditions or changes of state when no error occurs. For example, it is perfectly legal to change from state  00  to state  10  without creating an error. Similarly it is possible to go from state  01  to state  00  without creating an error. FIG. 12 shows a similar condition where four counter-clockwise changes of state may be made without creating an error when analyzed in the logic means  64 . For example, it is now possible to go from state  00  to state  01 , etc. without creating any state error. However, FIG. 13 shows a state error diagram in which a state change occurs that is illegal and indicates that the incremental encoder has lost a position. It is illegal to go from state  00  to state  11  or from state  11  to state  00  because the transition must occur through the states  01  and/or state  10  to be permissible and legal. FIG. 14 shows the error condition when the state machine goes from state  01  to state  10  or from state  10  to state  01  without transitioning through the adjoining states. 
     Refer now to FIG. 15 showing a table of binary position states at time T and the possible legal and illegal transition states that may occur at time T+1. In column one there are shown four states,  01  through  10 . These four quadrature states may change at time T+1 to the legal states shown in the second column to the right of time T. Thus, each one of the states shown in column T may stay the same or transition to an adjacent state as shown in the table of FIG.  15 . Similarly, column three shows the transition to an illegal state of the type illustrated in FIGS. 13 and 14. When this condition occurs at time T+1 and the state condition previously at time T was shown in column one, then the incremental encoder has lost position. This table may be implemented into logic means  64  so that it can detect a state error or state transition error. When the error occurs the user can elect to send the error condition directly via line  44 A to the CPU  42  or present the error condition to any of the sections of the system that can utilize the error condition and shut the machine down and/or warn the operator and/or allow the controller and the logic means to slow the machine down so that such errors do not occur again. In the preferred embodiment of the present invention, it is intended that the logic means, if properly programmed, can determine when the velocity conditions and the noise or spike or blip condition of the signals are on the verge of creating errors so that such conditions can be rectified before the errors occur. 
     Having explained a typical prior art servo-drive system for an incremental encoder and explaining that the prior art encoders did not optimize the velocity of the commercially available servo-controllers, it will be appreciated that the novel incremental encoder servo-drive shown in FIG. 8 is flexible enough to be programmed to operate in conjunction with numerous commercially available servo-controllers  45  and the intent of the system shown in FIG. 8 is to be able to employ commercially available components and still accomplish the novel results described hereinbefore.

Technology Category: 5