Patent Document

CROSS-REFERENCE TO RELATED APPLICATION  
       [0001]     The present application claims the benefit of previously filed, co-pending Application Ser. No. 60/545,368, filed Feb. 18, 2004 by S. Petricek, entitled: “Method of Controlling Multiple Parallel Conversion Paths,” assigned to the assignee of the present application, and the disclosure of which is incorporated herein. 
     
    
     FIELD OF THE INVENTION  
       [0002]     The present invention relates in general to DC power supply systems and subsystems therefor, and is particularly directed to a new and improved DC-DC converter architecture, in which respectively different channels thereof have different operational performance parameters, in particular a fast transient response power path and a high efficiency power path, whose operations are controlled so as to optimize the overall performance of the converter.  
       BACKGROUND OF THE INVENTION  
       [0003]     The design of a DC-DC converter often involves a compromise between goals of bandwidth capability and efficiency. On the one hand, it is desired to provide a fast response capability to load transients, which may require a switching frequency higher than that normally required for steady state loading. A problem arises since increasing the switching frequency to achieve more gain and fast response times involves a trade-off of efficiency, as switching losses increase substantially.  
       SUMMARY OF THE INVENTION  
       [0004]     In accordance with the present invention, this trade-off problem is successfully addressed by employing a dual mode DC-DC converter architecture, that includes a fast transient response power path for handling rapid changes in load current demand, and a high efficiency power path which is configured to provide average power supply requirements once the load transient demand has subsided. The fast transient response power path is of conventional DC-DC converter configuration that includes a voltage regulation control unit, that is referenced to a prescribed DC voltage and which controls the operation of a PWM modulator and power switching unit such as a standard buck mode configured converter, the output of which is coupled to a load. As a non-limiting, but preferred example, the power switching circuitry comprises a multiphase output configuration, in which currents supplied through multiple output inductors are summed for delivery to the load. In accordance with conventional operation, the regulation control unit of the fast response power path monitors the voltage at the output node via a feedback path and is operative to vary its output current in accordance with the transient demand exhibited by the load.  
         [0005]     Coupled in parallel with the fast transient response power path is the high efficiency power path, which supplies an average state current to the output node. A current sensing circuit, such as, but not limited to a current-to-voltage conversion unit, is coupled in the output current path from output node of the fast transient response power path. This current-sensing circuit supplies a voltage representative of the current being supplied by the high bandwidth path to an integrating difference amplifier, which is referenced to a prescribed reference voltage associated with a reference current.  
         [0006]     The output of the integrating error amplifier is a voltage control input to a current error amplifier that is used to drive the PWM and power switching circuitry within the high efficiency power path. Like the fast transient response power path, the high efficiency power path DC-DC converter is of conventional configuration having a PWM modulator and power switching unit, such as a standard buck mode configured converter. For purposes of providing a non-limiting example, the power switching circuitry may also be understood to have a multiphase output configuration, in which currents supplied through multiple output inductors are summed as an output current to be combined with that supplied by the high bandwidth power path for delivery to the load. A current-to-voltage converter is coupled to the output node in the current flow path for the average current, and provides a voltage that is fed back to the current error amplifier.  
         [0007]     In operation, the two paths perform respectively different functions, as described briefly above. Via an output voltage monitoring path the fast transient response power path directly monitors the output node for a change in load conditions and responds in kind with a rapid change in its output current. In effect, this path monitors ‘edges’ in the output current demand. On the other, the high efficiency power path has no knowledge of the output load voltage; it only has knowledge of the current supplied by the high frequency path. This current is integrated through the front end error amplifier circuitry of the high efficiency power path to produce an average output current which is summed with the transient response current to realize a composite current delivered to the load.  
         [0008]     In this manner the (wide bandwidth) fast transient response power path is effective to completely control voltage regulation, as it alone directly monitors output voltage. In a complementary manner, the high efficiency power path is controlled in such a way as to relieve the fast transient response power path, so that the average current is carried by the high efficiency power path which integrates the output current being delivered by the high bandwidth path in response to a transient change. Once the transient subsides, the load is supplied with the average current being generated by the high efficiency path. In this manner, over the integration period of the front end error amplifiers of the high efficiency path, the high bandwidth path will have been relieved of having to supply all the DC current, as when it first reacted to a change in load requirements. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0009]      FIG. 1  is an overall block diagram of a parallel diverse channel DC-DC converter system in accordance with the present invention. 
     
    
     DETAILED DESCRIPTION  
       [0010]     Before describing the diverse channel DC-DC converter in accordance with the present invention, it should be observed that the invention resides primarily in a modular arrangement of conventional power supply circuits and electronic signal processing circuits and components therefor. In a practical implementation that facilitates packaging in a hardware-efficient equipment configuration, these modular arrangements may be readily implemented as field programmable gate array (FPGA)-, or application specific integrated circuit (ASIC)-based chip sets. Consequently, the configuration of such an arrangement of circuits and components and the manner in which they are interfaced with one another have, for the most part, been illustrated in the drawings by readily understandable block diagrams, which show only those specific details that are pertinent to the present invention, so as not to obscure the disclosure with details which will be readily apparent to those skilled in the art having the benefit of the description herein. The block diagram illustrations are primarily intended to show the major components of the invention in a convenient functional grouping, whereby the present invention may be more readily understood.  
         [0011]     Attention is initially directed to  FIG. 1 , which is an overall block diagram of a parallel diverse channel DC-DC converter system in accordance with the present invention. As shown therein, the converter includes a fast transient response power path  10 , that is designed to respond rapidly to transients in load current demand, and a high efficiency power path  20 , which is designed to handle average current demand of an output load  30 .  
         [0012]     The fast transient response power path  10  is of conventional DC-DC converter configuration having a regulation control unit  11 , referenced to a prescribed voltage V REF  that controls the operation of a PWM modulator and power switching unit  12 , such as a standard buck mode configured converter. It should be noted that although this is shown as a voltage mode control circuit, it could also be implemented as a current mode control circuit without a loss in generality.  
         [0013]     For purposes of providing a non-limiting example, the power switching circuitry is shown as having a multiphase output configuration, in which currents supplied through output inductors L 1 − 1 , . . . , L 1 −n are summed as an output current I 1  at an output node  13  for delivery to load  30  which is coupled to output power terminal VOUT. In accordance with conventional operation, the regulation control unit of the fast response power path monitors the voltage at the output node VOUT via a feedback path  14 , and is operative to vary the current I 1  in accordance with the demand exhibited by the variation in output voltage at the VOUT terminal.  
         [0014]     Coupled in parallel with the fast transient response power path is the high efficiency power path, which supplies an average state current I 2  to the output node VOUT. For this purpose, a current-to-voltage conversion unit  15  is coupled in the output current path from output node  13  of the fast transient response power path  10 . Current-to-voltage conversion unit  15  supplies a voltage representative of the current I 1  to a first, non-inverting (+) input  41  of an integrating difference amplifier  40 , the inverting (−) input  42  of which is coupled to receive a prescribed reference voltage associated with a reference current (e.g., 0 amps).  
         [0015]     The output  43  of integrating error amplifier  40  is a voltage control input VControl to the non-inverting (+) input  51  of a current error amplifier  50 . Amplifier  50  is used to drive the PWM and power switching circuitry  22  within the high efficiency power path  20 . Like the fast transient response power path  10 , the high efficiency power path DC-DC converter is of conventional configuration having a PWM modulator and power switching unit  22 , such as a standard buck mode configured converter. For purposes of providing a non-limiting example, the power switching circuitry  22  is also shown as having a multiphase output configuration, in which currents supplied through output inductors L 2 − 1 , . . . , L 2 −n are summed as an output current I 2  at an output node  23  for delivery to load  30  at output power terminal VOUT. A current-to-voltage converter  25  is coupled to output node  23  in the current flow path for current I 2 , and provides a voltage representative of the current I 2 . This voltage is fed back to the inverting (−) input  52  of current error amplifier  50 . (It will be appreciated that amplifier  50  and the current to voltage for the high efficiency stage effectively form a current mode controlled buck converter wherein the ‘reference’ is Vcontrol, as a non-limiting example.)  
         [0016]     In operation, the two paths  10  and  20  perform respectively different functions, as described briefly above. Via feedback path  14 , the fast transient response power path  10  directly monitors the output node for a change in load conditions and responds in kind with a rapid change in output current I 1 . In effect, this path monitors ‘edges’ in the output current demand. On the other, the high efficiency power path  20  has no knowledge of the output load voltage; it only has knowledge of the current I 1  flowing in the high frequency path. This current is integrated through the front end circuitry of the high efficiency power path  20  to produce an average output current I 2 , which is summed with the transient response current I 1  to realize a composite current I 3  delivered to the load  30 .  
         [0017]     In this manner the (wide bandwidth) fast transient response power path  10  is effective to completely control voltage regulation, as it alone directly monitors load current demand. In a complementary manner, the high efficiency power path  20  is controlled in such a way as to relieve the fast transient response power path  10  of the load, so that the average current is carried by the high efficiency power path  20 , which integrates the output current being delivered by the high bandwidth path in response to a transient change. Once the transient subsides, the load is supplied with the average current being generated by the high efficiency path  20 . In this manner, over the integration period of the front end error amplifiers of the high efficiency path  20 , the high bandwidth path  10  will have been relieved of having to supply all the DC current, as when it first reacted to a change in load requirements.  
         [0018]     While I have shown and described an embodiment in accordance with the present invention, it is to be understood that the same is not limited thereto but is susceptible to numerous changes and modifications as known to a person skilled in the art. I therefore do not wish to be limited to the details shown and described herein, but intend to cover all such changes and modifications as are obvious to one of ordinary skill in the art.

Technology Category: 4