Patent Document

This application claims priority under 35 U.S.C. §§ 119 and/or 365 to 0025436.7 filed in the United Kingdom on Oct. 17, 2000 and to 60/241,796 filed in The United States of America on Oct. 20, 2000; the entire content of which is hereby incorporated by reference. 

   The present invention relates to communications systems, and, in particular, to digital communications systems. 
   BACKGROUND OF THE INVENTION 
   Typical current digital communication systems often use non-constant envelope modulation schemes, e.g. the new system EDGE using 3π/8-8PSK modulation. This means that some part of the information lies in the amplitude (envelope) of the transmitted signal and some part lies in the phase of the transmitted signal. In other words, this is a combination of Amplitude Modulation (AM) and Phase Modulation (PM). 
   To deal with amplitude modulation, an output Power Amplifier (PA) in the radio transmitter has to be linear, i.e. the relationship between the output power of the PA (P out,PA ) and the input power of the PA (P in,PA ) has to be linear for all possible power levels. Otherwise the result will be AM-to-AM distortion, i.e. the gain of the PA changes with the input amplitude. 
   To deal with the phase modulation, the phase-shift (Δφ) through the PA has to be constant for all possible power levels. Otherwise the result will be AM-to-PM distortion, i.e. the phase-shift of the PA changes with the input amplitude. 
   The consequences of using a PA with non-constant gain and/or non-constant phase-shift, will be amplitude distortion and/or phase distortion in the transmitted signal. This distortion leads to spectrum broadening, which results in an increased adjacent channel disturbance. The amplitude/phase distortion (vector distortion) in the transmitter also affects the performance of the communications system. For example, an increased BER (Bit Error Rate) in the communication system, will lead to a decreased signal quality (e.g. degraded audio quality in a voice application). 
   Therefore, linearity is crucial for a transmitter used in a digital modulation system with non-constant amplitude modulation. Moreover, high linearity requirements often lead to poor power efficiency. To attain good linearity and good power efficiency, some linearization method and/or some efficiency enhancement method are often used. A problem that often arises is then poor time alignment between the “information parameters” (or “information components”), i.e. gain and phase (polar representation), alternatively I and Q (cartesian representation). 
   There are several known ways to attain linearity and/or power efficiency in RF (Radio Frequency) transmitters for digital modulation systems with non-constant amplitude modulation, for example:
         Polar Loop Feedback   Cartesian Loop Feedback   Predistortion   Adaptive Baseband Predistortion   Feed-forward   Envelope Elimination and Restoration   Combining two power amplifiers
 
The methods can be divided in three categories:
 
1) How the modulation is generated:
   Cartesian modulation, i.e. in-phase (I) and quadrature (Q)   Polar modulation (e.g. Envelope Elimination and Restoration), i.e. the signal is divided into amplitude information (r) and phase information (φ)
 
2) Whether or not the method uses feedback
   Examples of methods using feedback: Polar loop feedback, Cartesian loop feedback, Adaptive baseband predistortion   Examples of methods not using feedback: Predistortion, Feedforward, Envelope elimination and restoration, combination of 2 non-linear signals paths (e.g. LINC or CALLUM). For example, see D C Cox, “Linear amplification with non-linear components”, IEEE Transactions on Communications, Vol 22, No. 12, pp 1942–1945, Dec 1974; and A. Bateman, “The combined analogue locked loop universal modulator (Callum), proceedings of the 42 nd  IEEE Vehicular Technical Conference, May 1992, pp 759–764.
 
3) How the feedback signal path, if any, is implemented
   I/Q-demodulator (I/Q-feedback),   Amplitude feedback only   Phase feedback only   Both amplitude and phase-feedback       

   SUMMARY OF THE PRESENT INVENTION 
   One embodiment of the present invention can compensate for time delay between amplitude and phase-information. Alternatively, compensation for time delay between the in-phase component (I) and the quadrature component (Q) can be obtained. The timing problem is transferred to the digital baseband domain, where it can be solved. The method could be used in different linearization configurations, such as “Cartesian Feedback”, “Polar Loop Feedback” and “Envelope Elimination and Restoration with Linearization”. Since the time delay compensation as well as the adaptive linearization takes place in the digital baseband domain, the invention is a form of “Adaptive Time-alignment of Information Components”. As will be shown, the invention also gives increased flexibility in the choice of circuit configuration in the feedback part of the linearizer. 
   The invention can be applied both in TDMA (Time Division Multiple Access) systems or in CDMA (Code Division Multiple Access) systems. An example of a system in a TDMA category is EDGE (Enhanced Data rates for GSM Evolution). In the CDMA category we have, for example, Wideband CDMA or UMTS. 
   The invention presented in this report reduces time miss-alignment between the amplitude and the phase-information, alternatively between I and Q, in a radio transmitter. The invention can be applied in TDMA (Time Division Multiple Access) systems, or in CDMA (Code Division Multiple Access) systems. An example of a system in the TDMA category is EDGE (Enhanced Data rates for GSM Evolution), another is UMTS. In the CDMA category we have for example W-CDMA. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
       FIG. 1  illustrates a first embodiment of the present invention; 
       FIG. 2  illustrates a second embodiment of the present invention; 
       FIGS. 3 and 4  illustrate respective output detector units suitable for use with the embodiments shown in  FIGS. 1 and 2 ; 
       FIG. 5  illustrates a third embodiment of the present invention; 
       FIG. 6  illustrates a fourth embodiment of the present invention; and 
       FIG. 7  illustrates an output detector unit suitable for use in the embodiments of  FIGS. 5 and 6 . 
   

   DESCRIPTION OF THE PREFERRED EMBODIMENTS 
   A block diagram illustrating a first embodiment of the invention with compensation for time delay between the phase φ and the amplitude (envelope) r, is presented in  FIG. 1 . 
   The system of  FIG. 1  includes a radio frequency transmitter having RF circuitry 1 including a power amplifier which produces a power amplifier output PA out  for supply to an antenna  2 . The RF circuitry  1  receives phase and amplitude signals (φ 2 , r 2 ) from which the output signal is produced. The operation of the RF circuitry is well known and will not be described in further detail for the sake of clarity. 
   In an embodiment of the present invention, an output detector unit  3  is provided which serves to monitor the power amplifier output signal and to produce detected phase and amplitude (φ 4 , r 4 ) signals. A local oscillator (LO)  5  is provided in order to enable the output detector unit  3  to convert the RF power amplifier output signal to the digital baseband frequency of the circuit. The RF signal is mixed down to the digital baseband frequency. This operation can be performed by a mixer having one input from the RF signal and another input from the local oscillator  5 . The mixer multiplies the two signals to produce a signal having one component having a frequency equal to the local oscillator frequency plus the RF frequency, and another component having a frequency equal to the difference in LO and RF frequencies. The LO+RF frequency is filtered out, leaving a baseband frequency signal. The system also incorporates a signal generator  7  which receives digital data D and operates to produce phase and amplitude information (φ 1 , r 1 ) for supply to the RF circuitry  1 . 
   In an embodiment of the present invention, the phase information (φ 1 ) produced by the signal generator  7  is supplied to a delay element  8   1 . The delay element  8   1  operates to delay the signal φ 1  by an amount of time controlled by a controller  9   1 . The output of the delay unit  8   1  (i.e. a delayed φ 1 ) is subtracted by a combining unit  10   1 , from the detected phase signal (φ 4 ) of the output detector unit  3 . The delay controller  9   1  operates to modify the delay introduced by the delay unit  8   1  such that the magnitude of the difference between the detected phase value (φ 4 ) and the delayed generated phase value (φ 3 ) is minimised. The result of this control, signal d 1  is a measurement of how much the phase signal φ is delayed in the RF circuitry  1 . 
   Corresponding circuit elements are provided for the generated amplitude signal r 1 . The amplitude signal r 1  is delayed by a delay unit  8   2  which is itself controlled by a delay controller  9   2 . A combining unit  10   2  subtracts the delayed generated amplitude signal r 3  from the detected amplitude signal r 4 . The delay controller  9   2  operates to minimize the magnitude of the difference between the detected and delayed generated amplitude signals (r 4 , r 3 ). As before, the delay control signal d 2  for the amplitude circuit is a measurement of how much the amplitude signal r is delayed by the RF circuitry  1 . 
   An embodiment of the present invention includes a delay calculation unit  12  which receives the outputs from the delay control units  9   1  and  9   2  (signals d 1  and d 2 ). The delay calculation unit  12  determines the difference between the two input signals and produces control outputs dφ control and dr control. The control outputs dφ, dr from the calculation unit  12  are used as inputs to a phase controller  14  and an amplitude controller  16  respectively. The phase controller  14  operates to adjust the generated phase signal φ 1  for supply (φ 2 ) to the RF power amplifier circuitry, and the amplitude controller  16  operates to adjust the generated amplitude signal r 1  for supply (r 2 ) to the power amplifier circuitry. The phase and amplitude controllers  14  and  16  operate to compensate for the actual detected time delay between the phase and the amplitude detected by the output detector unit  3 . 
     FIG. 2  describes another embodiment of the invention. The difference between  FIG. 1  and  FIG. 2  is that the latter shows a system where the input signals to the RF circuitry  1  are in-phase (I) and quadrature (Q) signals. A polar to Cartesian converter  17  is therefore needed to convert the amplitude (r) and phase (φ) information polar into an in-phase component (I) and a quadrature component (Q). The relationship between I, Q, φ and r is given by equation (1):
   I+j·Q=r·e   j·φ   (1) 
     FIG. 3  illustrates one configuration of an output detector unit  3  which is suitable for use in the system of  FIGS. 1 and 2 . The output detector unit  3  includes an I/Q demodulator  31  which uses the output of a local oscillator  5  to produce detected in-phase I and quadrature Q signals from the PA output signal. A Cartesian to polar conversion unit  32  converts the detected in-phase (I) and quadrature (Q) signals to detected amplitude (r) and phase (φ) signals. 
     FIG. 4  illustrates an alternative output detector unit  3  for use in the systems of  FIGS. 1 and 2 . The output detector unit  3  of  FIG. 4  includes a signal limiter  33  and phase detector  35  which together operate to produce a detected phase signal (φ). An envelope detector  34  is provided which operates to Produce a detected amplitude signal (r). 
     FIG. 5  illustrates a third embodiment of the present invention. This third embodiment is similar to the first and second embodiments, except that an output detector unit  18  is provided which operates to detect the in-phase component I and the quadrature component Q from the power amplifier output signal. The output detector unit  18  of  FIG. 5  supplies the detected I and Q components to the remainder of the system. A signal generator  20  is provided that receives digital data D and produces in-phase I and quadrature Q signals for supply to the RF circuitry  1 . The generated I and Q signals are delayed and subtracted from the detected I and Q signals, in a manner similar to that described with reference to  FIGS. 1 and 2 . Delay of the generated I signal is controlled by a control  9   1  such that the difference between detected and delayed generated signals is minimised. The delay of the generated Q signal is controlled by a control  9   2  such that the difference between the detected Q signal and delayed generated Q signal is minimised. The control signals that are produced by the controls  9   1  and  9   2  to control delay elements  8   1  and  8   2  are respective measurements of how each component is delayed by the RF circuitry  1 . As before, a delay calculation circuit  12  is provided, and operates to produce I and Q control signals d ICONTROL , d QCONTROL  from the delay control signals. I and Q controllers  22  and  24  respectively operate to adjust the generated I and Q values on the basis of the determined delay values. Thus, the corrected I and Q values are compensated for actual time delay between the in-phase component and the quadrature component produced by action of the RF circuitry  1 . 
     FIG. 6  describes a fourth embodiment of the present invention. The difference between  FIG. 5  and  FIG. 6  is that the latter describes a system in which the input signals to the RF circuitry are phase and amplitude signals (i.e. polar signals). An extra block, a Cartesian to polar converter  25 , is therefore needed to convert the in-phase component (I) and one quadrature component (Q) into amplitude (r) and phase (φ) information. The relation between I, Q, φ and r is, as mentioned earlier, is given by equation (1). 
   In the following, x and y are used to represent parameters that, from the above-described embodiments would be a polar or Cartesian parameter. The block Delay  1  Control  9   1  changes the delay control parameter d 1  (i.e. the delay value of Delay unit  8   1 ) until the difference Δ x  between x 3  and x 4  has been minimised. The difference between x 3  and x 4  could for example (however other possibilities exist) be calculated as the “Least-Mean-Square”-value (LMS) given by equation (2): 
                   Δ   x     =       ∑     k   =   n       n   +   m       ⁢       (         x   1     ⁡     (     k   +     d   1       )       -       x   4     ⁡     (   k   )         )     2               (   2   )               
where m is the number of samples over which the LMS-value is calculated. The value d 1  is the number of samples which x 1  is delayed in order to form X 4 . When min {Δ x } has been found, the “final” value of d 1  has also been found.
 
   In the same way, delay control  9   2  changes the delay parameter d 2  (i.e. the control delay value of delay unit  8   2 ) until the difference Δ y  between y 3  and y 4  has been minimised. This means that d 2  is obtained by minimising Δ y  in the expression (equation (3)): 
   
     
       
         
           
             
               
                 
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                   y 
                 
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                       ( 
                       
                         
                           
                             y 
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                               k 
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                                 d 
                                 2 
                               
                             
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                             y 
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                     2 
                   
                 
               
             
             
               
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   After d 1  and d 2  have been found, we can calculate dx and dy, which are the two parameters used for achieving time-alignment between x and y. Since d1 and d2 tell us how much the signals x respectively y are delayed in the system, the time delay between x and y can be found by calculating Δ xy =d 1 −d 2 . If Δ xy &gt;0, i.e. if d 1 &gt;d 2 , then x 2  should be sent Δ xy  samples before y2. Use for example d x =0 and d y=Δ   xy . 
   Correspondingly, if Δ xy &lt;0, i.e. if d 1 &lt;d 2 , then x 2  should be sent Δ xy  samples after y 2 . Use for example d x =Δ xy  and d y =0. 
   If Δ xy =0, no correction is needed. Use for example d x=d   y =0. 
   Benefits of embodiments of the invention are listed below: 
   
       
       
         
           Automatic compensation of parameter variations in the transmitter, since the time-delay compensation is adaptive. For the same reason, the solution is able to compensate for temperature variations. 
           Flexibility, since there are several possible transmitter configurations, in which the invention can work. 
           Embodiments of the invention could also be used together with linearization schemes, for example with adaptive predistortion linearization. The linearization will perform better if time-alignment between φ and r (alternative I and Q) is made prior to calculation of the predistorted φ-value and r-value (alternative I-value and Q-value). 
         
       
     
  
   As mentioned, embodiments of the invention can be very flexible. It could be used in several types of system: 
   1) Systems with different types of modulation principles 
   
       
       
         
           Polar modulation (e.g. “Envelope Elimination and Restoration”, systems with polar feedback loop, etc.) 
           Cartesian modulation (e.g. systems with Cartesian feedback loop) 
           Modulation with non-linear PA&#39;s (e.g. LINC, CALLUM, etc).
 
2) Systems with different types of feedback
 
           polar feedback
           Both amplitude and phase detection   Amplitude detection only   Phase detection only   
         
           Cartesian feedback (i.e. quadrature demodulator in the feedback loop)

Technology Category: h