Patent Document

[0001]     The invention is based on a priority application EP 05290242.6 which is hereby incorporated by reference.  
       FIELD OF THE INVENTION  
       [0002]     The present invention relates to the field of electronics and more particular to an interposer for use on a printed circuit board for decoupling integrated circuits.  
       BACKGROUND OF THE INVENTION  
       [0003]     As the level of integration increases, the number of pins of a integrated circuit package that need to be connected to a circuit board becomes larger and larger. A well known packaging technique is called Ball Grid Array (BGA), which is a type of microchip connection methodology. A Ball Grid Array chip is a square package with solder balls on the underside for surface mounting. Use of BGA allows die package size to be reduced by allowing more surface area for attachment. Smaller packaging allows more components to be mounted on a module making greater densities available.  
         [0004]     On the other hand, the clock rate under which modern integrated circuits operate becomes higher and higher with every generation of microchips. A basic requirement for high speed operation is the availability of sufficient energy at each power pin of the integrated circuit. This decoupling is typically achieved by connecting capacitors to each power pin, which buffer the current source and supply the short term energy demand. These capacitors, however, consume surface area on the circuit board and hence limit the achievable integration density.  
         [0005]     It has also been proposed to place an interposer between a microchip and the printed circuit board. An interposer is realized as a small, thin printed circuit board, which contains buried components such as capacitors and resistors arranged in layers inside the interposer. A buried capacitors is realized using a thin metalized dielectric foil. Such laminates can achieve a capacity of 4-10 nF/in 2 . However, since the surface area and volume of the interposer is limited, the number and capacity of capacitors that can be buried for the decoupling of power pins is restricted.  
         [0006]     It is therefore an object of the present invention to provide an improved decoupling for microchips on circuit boards.  
       SUMMARY OF THE INVENTION  
       [0007]     These and other objects of the invention that appear below are achieved by an interposer for the decoupling of a microchip on a circuit board. The interposer contains on its upper and lower surfaces structured metal layers for attachment to the microchip and the circuit board, respectively. Inside the interposer, there are two sets of mutually isolated metal structures extending substantially perpendicular to the upper and lower surfaces of said interposer. The first set extends closer towards the upper surface than said second set, while the second set extends closer towards the lower surface than said first set.  
         [0008]     According to the invention, the two sets of metal structures are arranged in a regular, non-structured pattern within said interposer at a spacing between adjacent metal structures which is smaller than the pitch of two connections of the microchip. Moreover, the metal layers are structured in an application specific way to form capacitors by connecting metal structures from the first set to the top metal layer and adjacent metal structures from the second set to the bottom metal layer.  
         [0009]     In this interposer, capacitors are easily formed by connecting metal structures from the first set to the top metal layer and adjacent metal structures from the second set to the bottom metal layer. This allows high capacities with very short connections for every pin. The new interposer is a standard base element that can be applied with high flexibility. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0010]     Preferred embodiments of the invention will be described below with reference to the accompanying drawings, in which  
         [0011]      FIG. 1  shows a first embodiment of a BGA microchip attached with an interposer on a circuit board;  
         [0012]      FIG. 2  shows a second embodiment of a BGA microchip attached with an interposer on a circuit board;  
         [0013]      FIG. 3  shows the construction of an interposer according to the invention;  
         [0014]      FIG. 4  shows an alternative construction of an interposer according to the invention;  
         [0015]      FIG. 5  shows a cross-section of an interposer compared to the pitch of a microchip;  
         [0016]      FIG. 6  shows a polished cut image of an interposer according to the invention; and  
         [0017]      FIG. 7  shows an implementation with additional through connections.  
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0018]     A first embodiment of the invention is shown schematically as a cross-section in  FIG. 1 . A Ball Grid Array (BGA) packaged microchip  10  is attached on an interposer  20 , which is fastened on a printed circuit board  30 . The microchip has three solder balls  11 ,  12 , and  13  on its bottom side, which connect to corresponding solder pads  26   a ,  26   b , and  26   c  on the top surface of the interposer. Solder balls  31 ,  32 , and  33  on the circuit board  30  connect to corresponding solder pads  26   d ,  26   e , and  26   f  on the bottom surface of the interposer  20 .  
         [0019]     The interposer  20  itself contains vertical metal structures  21 ,  22  of alternating type. A first set of metal structures  21  extends towards the top surface layer of the interposer  20  and a second set of metal structures  22  extends towards the bottom surface of the interposer  20 . Solder pads  26   b  and  26   c  hence connect to some of the upper metal structures  21 , while solder pad  26   f  for instance connects to some of the lower metal structures  22 . Solder pads  26   a  and  26   d  are deposited on top of respective blind vias  23   a  and  23   b  (i.e., metal coated blind holes), which reach down to some of the opposite side metal structures. Hence, between solder balls  11  and  31 , there exists a shortcut over the respective metal structures  21  and  22 , which represents a through connection. Moreover, under solder pads  26   b  and  26   e , there is a via  25  interconnecting these pads directly. The area  29  serves as a capacitor between solder pads  26   b  and  26   d.    
         [0020]     Blind vias  23   a  and  23   b  and via  25  are drilled mechanically or with lasers. Metal coatings are deposited galvanically or chemically and structured by a wet etching process as known in the art.  
         [0021]     In this simplified example, solder ball  12  is a power pin of microchip  10  and is connected over through-connection  25  to a power supply point  32  on the circuit board. Solder ball  33  on the circuit board connects to ground level, so that the capacitor  29  built by the metal structures between pads  26   b  and  26   d  serves to decouple power pin  12 .  
         [0022]      FIG. 2  shows a similar assembly but with the difference that instead of single top and bottom metal layers, additional circuit board layers  27  and  28  are provided, which may contain additional connections and elements. The additional circuit board layers  27  and  28  include top and bottom metal layers structured for the attachment of microchip and circuit board, but which are not shown separately.  
         [0023]     Due to the extra circuit board layers  27  and  28 , blind vias of different depth are required to connect to the inner metal structures  21  and  22 . Under solder balls  13  and  33 , there are blind vias  24   a  and  24   b  of a first depth extending towards only the closer metal structures. Conversely, under solder balls  11  and  31 , there are deeper blind vias  23   a  and  23   b , respectively, connecting towards the deeper metal structures, too, so that these form a similar through-connection as in  FIG. 1 .  
         [0024]      FIG. 3  shows the formation of an interposer according to the invention. Foils of sheets of a first type  1  and of a second type  2  are stacked in alternating order. Type  1  foils carry the metal structures  21 , which extend to the top surface of the interposer and type  2  foils carry the metal structures  22 , which extend towards the bottom surface of the interposer. The width of a metal structure plus the distance to the next metal structure on a foil is at least smaller than the pitch of the pins of the microchip to be attached. Preferably, this spacing is smaller than half the pitch of the microchip pins. Positioning of the interposer with respect to circuit board and microchip is hence not required since the inner metal structures cannot cause a shortcut in whatever arbitrary position. As an example, the pitch of the microchip pins can be 1 mm. The spacing of the metal structures is then chosen to 0,4 mm.  
         [0025]     The foils  1  and  2  can be made of polypropylene or polystyrene, for instance and good candidates for the material of the metal structures  21  and  22  are copper, silver, aluminum, or gold.  
         [0026]     The foils  1  and  2  are piled on a stack and then melted or glued together in a thermo-compression step. From the bulk pile thus formed, thin slices can be cut or sawed that build the interposer.  
         [0027]     The capacity that can be reached on the interposer by connecting these metal structures depends on the thickness of the foils and the surface area over which metal structures are connect and thus activated, but can be in the range of up to 20 nF.  
         [0028]     In  FIG. 4 , as an alternative, long widths of foils  1  and  2  are curled to a reel, and bonded together to form a bulk cylinder, from which thin slices can than be sawed or cut to build the interposer.  
         [0029]      FIG. 5  shows a horizontal cross-section through interposer  20 . The grid of circles indicates the pitch of a BGA microchip and the horizontal rows of small stripes represent the vertical metal structures  21  and  22 .  
         [0030]      FIG. 6  shows a microscope photograph of a polished cut of the interposer  20 , which shows the two types of metal structures  21  and  22 .  
         [0031]     Rather than bonding layers of foils together, the interposer can alternatively be formed by growing ceramic layers between which the two sets of metal structures  21  and  22  are deposited and etched in alternating order. This is similar to the manufacturing of known ceramic capacitors, but that the metal layers between the ceramic layers are sub-structured according to the principle invention.  
         [0032]     Another embodiment of the invention is shown in  FIG. 7 . The interposer is here constructed in a chessboard topology from capacitive elements C of the type shown in  FIG. 6  including the vertical metal structures as described above and from conductive elements R, which serve as through-connections. The width d of the elements equals the pitch of the BGA pins of the microchip to be attached. Proper design of top and bottom metal layers (not shown) allow the implementation of any circuit that might be required in a particular application. Preferably, conductive elements R are provided only each second row in the chessboard topology.  
         [0033]     Having described specific embodiments of the present invention in full detail, it should be clear to those skilled in the art, that various modifications and changes can be made without departing from the concepts of the invention.

Technology Category: h