Patent Document

CLAIM FOR PRIORITY 
     The present application is a continuation of U.S. patent application Ser. No. 10/150,521, filed May 17, 2002, now U.S Pat. No. 7,061,157, which application claims the benefit of International Patent Application No. PCT/EP01/10788, published in English, filed Sep. 18, 2001; the present application also claims the benefit of Italian Application No. MI2000A002043, filed Sep. 19, 2000. All of the foregoing applications are incorporated herein by reference in their entireties. 
    
    
     TECHNICAL FIELD 
     The present disclosure relates to an electronic circuit for highly efficient driving of piezoelectric loads, comprising a driver circuit portion coupled to at least one load terminal by means of an inductive-resistive connection whereon a voltage waveform is applied. The present disclosure relates also to a method for driving a piezoelectric load with inductive-resistive connection. The present disclosure relates particularly, but not exclusively, to a driver circuit adapted to follow the current profile required by a piezoelectric printer head coupled to the driver circuit by means of an inductive and resistive cable referred to as flat cable and similar to a resistance and to a series inductor. 
     BACKGROUND  
     As is well known in this specific technical field, a wide range of transducers are available such as, for example, those described in the U.S. Pat. No. 5,895,998. Various types of printer heads are among the wide variety of disclosed transducers. In a piezoelectric load such as a printer head, the electronic circuit is driven by applying voltage waveforms generally formed by a series of ramps having a predetermined slew-rate. An example of such an application is disclosed in the U.S. Pat. No. 4,767,959 in the name of Nippondenso Co. 
     The special accuracy required for applying said voltage waveform to the load terminals, along with the high frequency of the driver signal, leads to the use of linear-mode driver circuits involving high power dissipation. Moreover, the presence of a parasitic inductance in the flat connection cable to the load, which is coupled in series to the real capacitive load, requires the current demanded by the load to be filtered. The profile of this current is not rectangular and has a beveled pattern with over- and under-elongations, to produce a voltage waveform as shown in the attached  FIG. 1 . Therefore, with respect to an ideal case of a merely capacitive load, it is necessary to manage adequately a current slew-rate at the ramp base and a current queue at the ramp end of the capacitive load. 
     The features of these front end electronic circuits depend on the parasite parameters inserted by the flat cable. The structure conventionally used to apply a voltage waveform to a piezoelectric load with an inductive-resistive connection is also shown in  FIG. 1  which illustrates a linear driving example. In practice, the driver circuit of  FIG. 1  comprises an operational amplifier having a power output stage sufficient for load driving. The piezoelectric load is typically a non-dissipating capacitive load wherein all electric power is dissipated at the transistors incorporated in the linear driving stage. The linear driving solution is not particularly effective because of the considerable electric power dissipation. 
     The technical problem underlying the present disclosure is to provide a driver circuit, particularly for piezoelectric loads, with such functional and structural features to allow a highly efficient load driving without reducing the quality of the waveform generated at the load terminals. 
     BRIEF SUMMARY  
     An embodiment is directed to a system and method for providing a driver circuit coupled with further driver portions if compared to the linear portions of the prior art, each further portion having to supply as much current as possible during both the transient and the steady condition. The linear driving stage is charged to supply a residual current portion required for following precisely the reference signal. In this manner it is possible to supply the highest amount of current required by the load avoiding in the meantime too frequent switching, which would be required in case of switching-mode driving. 
     The disclosed embodiments relate also to a method for driving a piezoelectric load with inductive-resistive connection and wherein at least a linear driving of said load is provided by means of a driver circuit equipped with a linear circuit portion coupled to the load by means of said connection. The method is characterized in that it provides two different driving modes, in the transient and in the steady state, wherein the respective circuit portions supply a considerable portion of the overall current required by the load. 
     The characteristics and advantages of the circuit and method according to the present disclosure will be apparent from the following description of an embodiment thereof given by way of non-limiting example with reference to the attached drawings. 
    
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
         FIG. 1  is a schematic view of a piezoelectric load driver circuit according to the prior art; 
         FIG. 2  is a schematic view of a piezoelectric load driver circuit according to an embodiment; 
         FIGS. 3 ,  4  and  5  are respective schematic views of the circuit of  FIG. 2  in three different operating phases; 
         FIG. 6  is a diagram comparing the waveform of the current absorbed by the load with the voltage applied at the load terminals; 
         FIG. 7  is a current vs. time diagram for current signals present in the circuit of  FIG. 2 ; 
         FIG. 8  is a schematic view of a different embodiment of the circuit of  FIG. 2 ; 
         FIGS. 9 ,  10 ,  11  and  12  are respective current vs. time diagrams indicating some time periods of activation of the circuit of the present disclosure according to an embodiment of the driving method of the present disclosure; 
         FIGS. 13 and 14  are respective schematic views of circuit portions accompanying the circuit according to an embodiment. 
     
    
    
     DETAILED DESCRIPTION  
     With reference to the drawings, and particularly to the example of  FIG. 2 , a driver circuit according to an embodiment for driving a piezoelectric load  2  is generally and schematically indicated with circuit  1 . 
     The circuit  1 , comprises an operational amplifier  3  having the output in feedback to its inverting input (−) and further coupled to one terminal of the load  2 , in a node X, to supply a current IAMP. The other non-inverting (+) input of the amplifier  3  receives a reference signal from an input terminal IN of the circuit  1 . This amplifier  3  can be considered as the core of the linear portion of the circuit  1 . The circuit  1  comprises at least a half-bridge circuit portion, including at least a switching device, coupled to the node X through an inductance. More particularly, the circuit  1  further comprises respective half-bridge circuit portions  4 ,  5 , each portion being coupled to the node X through a corresponding inductor LI, L 2 . The portions  4 ,  5  are structurally independent one from the other. The inductors LI and L 2  have preferably different value, although it is possible to use inductors having the same value. The half-bridge circuit portion  4 , indicated with LF, is associated to the inductor LI with higher value. Likewise, the half-bridge circuit portion  5 , indicated with HF, is associated to the inductor L 2  with lower value. A control block  7  is provided to drive the half-bridge circuit portions  4  and  5 . 
     The embodiment of  FIG. 2  is aimed at supplying the highest amount of current required by the load  2  by means of the two half-bridges  4  and  5 , while also avoiding frequent switching. The linear, portion  3  therefore supplies the current difference &#39; A mp that is required to follow precisely the voltage reference signal, formed, for instance, by a series of predetermined slew-rate ramps. Thus, the half-bridge circuit portions  4  and  5  supply with high efficiency, in the transient and in the steady state respectively, a considerable portion of the overall current required by the load  2 , during which the linear circuit portion  3  ensures the accuracy of the voltage waveform by supplying only the current difference  TAW , with considerable power saving. 
     As just mentioned, in order to meet the load  2  current demands, the half-bridge portion LF utilizes a switching device. More particularly, the switching device comprises a pair of transistors MI, M 2  are interconnected together in a node X 1 . The half-bridge LF is powered between a first supply voltage reference  VALIM  and a second ground reference GND. The inductor LI is inserted between the nodes X 1  and X. In one embodiment, the half-bridge LF comprises MOS power transistors; however, it is also possible to use a bipolar transistor bridge or half-bridge. 
     The control terminals of the half-bridge LF transistors MI and M 2  are coupled to the control block  7 . The control block  7  acts on the transistors MI and M 2  to obtain a current profile as close as possible to the required profile. For this reason, the control block  7  requires information about the duration, the ramp slew-rate and the load  CLOAD  value. 
     In a similar and symmetrical manner, the half-bridge HF comprises a pair of transistors M 3 , M 4  interconnected together at a node X 2 . The half-bridge HF is powered, in turn, between the first supply voltage reference  VALIM  and the second ground reference GND. The inductor L 2  is inserted between the nodes X 2  and X. The control terminals of the half-bridge HF transistors M 3  and M 4  are all coupled to a respective output of the control block  7 . 
     The use of two half-bridges  4  and  5  allows, by an appropriate strategy for closing the transistor switches incorporated therein, an approximation of the profile of the signal in voltage applied to the load. The lower value inductor L 2  is suitably sized as to be able to follow the initial transient and the current final queue. The half-bridge  4  with higher value inductor LI follows the waveform supplying the steady state current value without the need for too frequent switching, which′ might be required if the half-bridge  5  were used during this phase. 
     The control strategy is important since it determines the efficiency which can be obtained in terms of power dissipation, as well as the switching frequency of half-bridge switches. The control method for the circuit  1  is based on the measurement of the current  I mo) outputted by the operational amplifier  3  and is implemented by dividing the piezoelectric load charge period into three phases. These three method phases are described with reference to the schematic  FIGS. 3 ,  4  and  5 . 
     The diagram of the circuit  1  shown in  FIGS. 3 ,  4  and  5  has been modified to show the current i A mp outputted by the linear portion  3  as variable. A sensor  8  is located downstream of the portion  3 , upstream of the node X and coupled to the control block  7  to detect the current  IA mp value., The control block  7  comprises a logic interface coupled with the current sensor  8  and a digital-technology logic network having analog output stages coupled to the control terminals of the half-bridge  4  and  5  transistors. Depending on the value of the current  IA mp, the half-bridge devices are switched according to appropriate control strategies described hereinafter. Steady state transient, TI: During this phase, the switch MI of the half-bridge LF is closed for the time needed by the current on the inductor LI to reach the value Io required in the steady condition by the load  2 . In this phase, the switch M 3  of the half-bridge HF is conveniently switched so that the current injected by the system on the load approximates at best that demand, with the aim, once again, of minimizing the amount of current supplied by the linear portion  3 . The control flow is represented by the dot-line  9 . 
     Steady state, T 2 : Once the current value on the inductor LI has reached the steady state value Io, the half-bridge HF is deactivated, i.e. the switch M 3  is open. At the same time, the half-bridge LF, through the switch MI control, keeps the output current close to the current required. The control flow is represented by the dot-line  11 . 
     Fall phase, T 3 : during this phase, it is necessary to shut the half-bridge LF off so that the inductor LI is not charged at a current value other than zero when the current is no longer required by the load  2 . This current would otherwise be absorbed by the linear stage in a dissipating manner. During this phase, the half-bridge HF is activated and follows the fast-changing signals having faster charge and discharge transistors. The control flow is represented by the dot-line  12 . 
     The circuit substantially splits the current necessary to be generated for the load  2  into three distinct parts: 
     (1) two current peaks supplied by the half-bridge HF in correspondence with the fronts  LOAD ; (2) most of the current in the central portion, in the steady state, supplied by the half-bridge LF; and (3) a corrective current supplied by the linear portion  3 . 
       FIG. 6  shows graphical plots of the currents injected by the two half-bridges,  ILF  for the bridge LF and  IHF  for the bridge HF, of the current  IA mp supplied by the operational and of &#39; LOAD  required by the load  2 . For implementing the control method according to an embodiment, two procedures are used: a feedback and a feed-forward procedure. 
     The times T 1  and T 3  are derived analytically. In feed-forward mode, once the inductor LI value, the voltage supply  VALJM , the load value  C   LOAD , the slew-rate and the initial and final ramp voltages are known, the times T 1  and T 3  can be ascertained The feedback variable used in the diagram is represented, on the contrary, by the current IAmp outputted by the linear stage. Depending on this current IAmp value, the stage LF is switched during the phase T 2  and the stage HF during the phases T 1  and T 3 , according to the criteria described hereinafter. 
     The feedback variable IAmp may be controlled in several ways. For example, the transistor M 1  can be opened at predetermined times and closed again when the current  IA mp exceeds a predetermined threshold. A different control scheme provides the use of a hysteresis loop. In this control scheme for example, when the current outputted by the linear portion  3  exceeds an appropriate threshold &#39;mom the switch M 1  or M 3  of the half-bridge LF or HF coupled to the supply is closed and, consequently, the current outputted by the non-linear portion increases, whereas the current  IA mp of the linear portion decreases until the latter reaches a lower threshold &#39; LOW  at which the switch M 1  or M 3  is opened, thus repeating the cycle. In this way the hysteresis type of control is:
 
 I   HYST   =I   HIGH   −I   LOW  
 
The outcome of this control and the corresponding waveforms are shown in  FIG. 7  for a time period indicated with T 2  at which the feedback variable acts on the half-bridge LF. During the times indicated with T* the switch MI is closed since the operational  3  current is higher than the value &#39; LOW . The switch M 1  is closed until the threshold  LOW  is reached. The  IH ys T  value choice is a compromise-choice. A small value results in a high half-bridge switching speed whereas a high value results in a higher dissipation by the linear portion.
 
     The previous comments are based on the use of a single feedback variable acting on the two half-bridges LF and HF in time-distinct phases.  FIG. 8  shows schematically a different embodiment illustrating the possibility of measuring a second quantity in addition to the linear portion current  IA mp. In this embodiment, a second current sensor  9  inserted between the inductor L 2  and the node X is provided. Therefore, if another quantity is measurable through the second sensor  9 , this quantity can be so used as to control both half-bridges. Knowing, for example, the current outputted by the half-bridge HF, &#39;Amp could be used as variable for controlling both the switching of the half-bridge HF during the whole period and the sum IAmp IHF (equal to  I LOAD-I LF ) to drive the LF stage. 
     The manner for determining the three times T 1 , T 2 , and T 3  in an analytical manner will now be described. The following formulas, obtained analytically, allow a real time calculation of said times during the load  2  control phase to be achieved. 
     Another method for formulating the differential equation which determines the time pattern of the inductor current can be used in other embodiments. A finite difference equation is determined in which the current value, in a precise instant, is given by the sum of the value, in the previous instant plus an increase depending on the voltage present at the inductor terminals. Through simple addition using accumulating circuit blocks, it is possible to calculate the inductor current and assess (as clock stroke number) the time required by the current to reach the steady state value Io, thus obtaining TI. Likewise, it is possible to calculate T 3  by inverting the time scale. If the inductor starts from a current value equal to zero and reaches the steady state value Io, it is possible to obtain a transient having the same duration as the discharge transient T 3  by using a voltage signal which is time-inverted with respect to the signal required. In this case too, simple addition using accumulating circuit blocks are sufficient for the assessment. 
       FIGS. 13 and 14  show respective embodiments of circuit networks comprising adding and accumulating blocks which can be used for the above purposes.  FIG. 13  shows a circuit for calculating the time TI. The current In value is compared with the current Io value, T 1  being reached when these values coincide.  FIG. 14  shows a circuit for calculating the time T 3 . The current In value is compared with the current Io value, T 3  being reached when these values coincide. 
     From the control point of view, four different situations shown in  FIGS. 9 ,  10 ,  11  and  12  can occur. The cases shown in  FIGS. 10 and 11  require a special control. In the case of  FIG. 10 , the time T 3  is known later than the moment of its use for shutting the half-bridge LF off. This occurs because the algorithm does not produce the desired results in the instant of their application. In the case of  FIG. 11 , the current is so high that the sum of times T 1  and T 3  is higher than the ramp duration, the assessment being, therefore, useless for control purposes. 
     In both cases, it is useful to know a time Tx defined as the instant of intersection between the charge and discharge currents of the inductor LI. The time Tx allows the inductor LI charge to be interrupted so that no residual current is present at the ramp end, the current being otherwise recovered by the linear stage, with subsequent detrimental power dissipation. 
     Steady state rise time for the inductor LI, i.e. the time required by LI to reach the current theoretic value (SRC): 
     rise ramp: 
     
       
         
           
             
               t 
               1 
             
             ⁢ 
             
                 
             
             = 
             
               
                 
                   
                     
                       V 
                       ALIM 
                     
                     - 
                     
                       V 
                       O 
                     
                   
                   SR 
                 
                 ⁢ 
                 
                   
                     
                       ( 
                       
                         
                           
                             V 
                             ALIM 
                           
                           - 
                           
                             V 
                             O 
                           
                         
                         SR 
                       
                       ) 
                     
                     2 
                   
                 
               
               - 
               
                 2 
                 ⁢ 
                 LC 
               
             
           
         
       
     
     fall ramp: 
     
       
         
           
             
               t 
               1 
             
             = 
             
               
                 
                   
                     V 
                     O 
                   
                   SR 
                 
                 ⁢ 
                 
                   
                     
                       ( 
                       
                         
                           V 
                           O 
                         
                         SR 
                       
                       ) 
                     
                     2 
                   
                 
               
               - 
               
                 2 
                 ⁢ 
                 LC 
               
             
           
         
       
     
     Discharge time required to let the inductor LI have no residual current at the ramp end: rise ramp: 
     
       
         
           
             
               t 
               3 
             
             = 
             
               
                 
                   
                     V 
                     D 
                   
                   + 
                   
                     V 
                     F 
                   
                 
                 SR 
               
               ⁢ 
               
                 
                   
                     
                       ( 
                       
                         
                           
                             V 
                             D 
                           
                           + 
                           
                             V 
                             F 
                           
                         
                         SR 
                       
                       ) 
                     
                     2 
                   
                   - 
                   
                     2 
                     ⁢ 
                     LC 
                   
                 
               
             
           
         
       
     
     fall ramp: 
     
       
         
           
             
               t 
               3 
             
             = 
             
               
                 
                   
                     
                       V 
                       D 
                     
                     + 
                     
                       V 
                       ALIM 
                     
                     - 
                     
                       V 
                       F 
                     
                   
                   SR 
                 
                 ⁢ 
                 
                   
                     
                       ( 
                       
                         
                           
                             V 
                             D 
                           
                           + 
                           
                             V 
                             ALIM 
                           
                           - 
                           
                             V 
                             F 
                           
                         
                         SR 
                       
                       ) 
                     
                     2 
                   
                 
               
               - 
               
                 2 
                 ⁢ 
                 LC 
               
             
           
         
       
     
     where 
       VD =direct voltage on the feedback diode; 
       VF =final voltage; 
     Vo=initial voltage; 
     L=inductor Li; 
     C=overall load capacity; 
       SR =voltage ramp slew rate; 
     V ALIM =supply voltage 
     TIME T 1  CALCULATION: At the inductor LI terminals (L indicating the inductor LI value) the following differential equation applies: 
               V   L     =         V   ALIM     -     V   C       =     L   ·       ⅆ   i       ⅆ   t                 
by solving it in a discrete form, it becomes
 
                 Δ   ⁢           ⁢   ⅈ       T   CL       =         V   ALIM     -     V   C       L           
by solving it in a discrete form also the voltage at the capacitive load terminals:
 
 V   C   =SR·t+V   O  
 
 V   C   =SR·n·T   CL   +V   O  
 
     where 
     
       
         
           
             SR 
             = 
             
               
                 
                   V 
                   F 
                 
                 - 
                 
                   V 
                   O 
                 
               
               
                 T 
                 ON 
               
             
           
         
       
       
         
           
             SR 
             = 
             
               
                 
                   V 
                   F 
                 
                 - 
                 
                   V 
                   O 
                 
               
               
                 
                   n 
                   ON 
                 
                 · 
                 
                   T 
                   CL 
                 
               
             
           
         
       
     
     with 
     
       
         
           
             
               SR 
               _ 
             
             = 
             
               
                 
                   V 
                   F 
                 
                 - 
                 
                   V 
                   O 
                 
               
               
                 N 
                 ON 
               
             
           
         
       
       
         
           and 
         
       
       
         
           
             SR 
             = 
             
               
                 SR 
                 _ 
               
               
                 T 
                 CL 
               
             
           
         
       
     
     it becomes
 
 V   CN   =  SR ·n+V   O  
 
     and then:
 
 V   Cn+1   =V   Cn   +  SR   
 
     with 
     
       
         
           
             
               V 
               CO 
             
             = 
             
               V 
               O 
             
           
         
       
       
         
           
             
               i 
               
                 n 
                 + 
                 1 
               
             
             = 
             
               
                 I 
                 n 
               
               + 
               
                 
                   
                     
                       V 
                       ALIM 
                     
                     - 
                     
                       V 
                       O 
                     
                     - 
                     
                       
                         SR 
                         _ 
                       
                       · 
                       n 
                     
                   
                   L 
                 
                 ⁢ 
                 
                   T 
                   CL 
                 
               
             
           
         
       
     
     through the temporary variable 
     
       
         
           
             
               
                 i 
                 n 
               
               _ 
             
             = 
             
               
                 i 
                 n 
               
               · 
               
                 L 
                 
                   T 
                   CL 
                 
               
             
           
         
       
       
         
           
             
               
                 i 
                 
                   n 
                   + 
                   1 
                 
               
               _ 
             
             = 
             
               
                 
                   i 
                   n 
                 
                 _ 
               
               + 
               
                 V 
                 ALIM 
               
               - 
               
                 V 
                 O 
               
               - 
               
                 
                   SR 
                   _ 
                 
                 · 
                 n 
               
             
           
         
       
     
     TIME T 3  CALCULATION: to calculate the discharge time, when the inductor passes from a current Io to a current equal to zero at the real end of the voltage ramp, assuming to be in said last instant and to go back in time till the instant T 3  when the current Io flows through the inductor, it is evident that (by applying the variable replacement t==r) that the system is analogue to another one being advanced in time, but with negative voltage ramp, in formulas: 
               L   ·       ⅆ   i       ⅆ   i         =       -     V   D       -       V   C     ⁡     (   t   )                   With                 V   C     ⁡     (   t   )       =       V   F     +     SR   ·   t             
The previous equation with negative t is equivalent to the following one with positive t:
 
               L   ·       ⅆ   i       ⅆ   i         =       V   D     +       V   C     ⁡     (   t   )                   With                 V   C     ⁡     (   t   )       =       V   F     -     SR   ·   t             
By solving the latter in a discrete form, it becomes:
 
                 Δ   ⁢           ⁢   i       T   CL       =         V   C     -     V   C       L           
by solving the voltage value in a discrete form at the capacitive load terminals:
 
 V   C   =SR·t+V   O  
 
 V   C   =V   F   −SR·n·T   CL  
 
where
 
             SR   =         V   F     -     V   O         T   ON                   SR   =         V   F     -     V   O           n   ON     ·     T   CL               
with
 
               SR   _     =         V   F     -     V   O         n   ON                 and             SR   =       SR   _       T   CL             
it becomes
 
 V   Cn   =V   F   −  SR ·n  
 
and then:
 
 V   Cn+1   =V   Cn   −  SR   
 
with
 
V CO =V F  
 
through the temporary variable
 
     
       
         
           
             
               
                 i 
                 n 
               
               _ 
             
             = 
             
               
                 i 
                 n 
               
               · 
               
                 L 
                 
                   T 
                   CL 
                 
               
             
           
         
       
       
         
           
             
               
                 i 
                 
                   n 
                   + 
                   1 
                 
               
               _ 
             
             = 
             
               
                 
                   i 
                   n 
                 
                 _ 
               
               + 
               
                 V 
                 D 
               
               + 
               
                 V 
                 F 
               
               - 
               
                 
                   SR 
                   _ 
                 
                 · 
                 n 
               
             
           
         
       
     
     Tx TIME CALCULATION: simple calculations generate the following formula: 
     
       
         
           
             
               T 
               X 
             
             = 
             
               
                 T 
                 ON 
               
               · 
               
                 
                   
                     V 
                     D 
                   
                   + 
                   
                     
                       
                         V 
                         F 
                       
                       + 
                       
                         V 
                         O 
                       
                     
                     2 
                   
                 
                 
                   
                     V 
                     D 
                   
                   + 
                   
                     V 
                     DD 
                   
                 
               
             
           
         
       
     
     From the foregoing description, it will be appreciated that, although specific embodiments have been described herein for purposes of illustration, various modifications may be made without deviating from the spirit and scope of the present disclosure. Accordingly, the present disclosure is not limited except as by the appended claims.

Technology Category: 5