Patent Document

BACKGROUND 
       [0001]    The present disclosure relates generally to power supplies for light emitting diodes (LEDs), especially for power supplies with the ability of suppressing or reducing audio noise. 
         [0002]    This is an era that power consumption and efficiency are important issues for almost every device in this modern world. LEDs, because of their excellent power efficiency and compact device size, have become more and more popular in lighting markets. For example, the cold-cathode fluorescent lamps (CCFL) in the back-light modules of liquid-crystal-display (LCD) panels have largely been replaced by LEDs. 
         [0003]      FIG. 1  illustrates back light module  8  with LEDs and a power supply. The power supply of  FIG. 1  has two stages: voltage-controlled stage  4  and current-controlled stage  6 . As shown in  FIG. 1 , voltage-controlled stage  4  is a booster, in which power controller  18  alternatively turns on and off power switch  15  to store electric power in inductive device PRM and to release the stored electric power such that output voltage V OUT  with required specifications is built up at output node OUT connected to LEDs. Current controller  20  in current-controlled stage  6  majorly balances the currents through the LED chains, such that the currents are substantially the same in amplitude and all LED chains illuminate evenly. 
         [0004]    To adjust the brightness of an LCD panel, back light module  8  could receive a dimming signal V DIM  to substantially control the lighting of the LED chains. Generally speaking, when dimming signal V DIM  is asserted, the LED chains illuminate, and when dimming signal V DIM  is deasserted, the LED chains stop illuminating. The duty cycle of dimming signal V DIM , that is, the asserted time in proportion to the cycle time, determines the intensity of lighting felt by human eyes. 
         [0005]      FIG. 2  shows dimming signal V DIM  at dimming node DIM, gate signal V GATE  at gate node GATE, current I IN  flowing into inductive device PRM from input node V IN , and output voltage V OUT  at output node OUT. During the dimming-ON period when dimming signal V DIM  is asserted, power controller  18  outputs gate signal V GATE  to alternatively turn on and off power switch  15 . Meanwhile, current I IN  is drained from input node V IN  to build up output voltage V OUT . Current controller  20  also conducts and spreads current I IN  through LED chains to illuminate. 
         [0006]    During the dimming-OFF period when dimming signal V DIM  is deasserted, power controller  18  deasserts gate signal V GATE , current I IN  is about 0 A, and output voltage V OUT  might slightly ramp down over time due to some leakage current. Current controller  20  could cut the current paths through the LED chains so that the LED chains stop illuminating. 
         [0007]    From the perspective of voltage-controlled stage  4 , it can be found from the signals in  FIG. 2  that switching between the dimming-OFF period and the dimming-ON period is equivalent, per se, to switching between no load and heavy load. Even if the frequency of dimming signal V DIM  might be as low as 200 Hz within the frequency range hardly heard by human, the load transition is so large that current I IN  could has considerable energy allocated in some frequencies harmonic to the frequency of dimming signal V DIM  and cause inductive device PRM to generate noise, which is unpleasant to human and should be erased or diminished in consumer products. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0008]    The invention can be more fully understood by the subsequent detailed description and examples with references made to the accompanying drawings, wherein: 
           [0009]      FIG. 1  illustrates a back light module with LEDs and a power supply; 
           [0010]      FIG. 2  shows dimming signal V DIM  at dimming node DIM, gate signal V GATE  at gate node GATE, current I IN  flowing into inductive device PRM from input node V IN , and output voltage V OUT  at output node OUT; 
           [0011]      FIG. 3A  demonstrates a power controller employed in the power controller of  FIG. 1 ; 
           [0012]      FIG. 3B  shows waveforms of dimming signal V DIM , gate signal V GATE , and current I IN  drained to the LED chains from input node V IN  according to the power controller of  FIG. 3A ; 
           [0013]      FIG. 4A  demonstrates a power controller according to one embodiment of the invention; 
           [0014]      FIG. 4B  shows waveforms of dimming signal V DIM , gate signal V GATE , and current I IN  drained to the LED chains from input node V IN , according to the embodiment of  FIG. 4A ; 
           [0015]      FIG. 5  shows a control method adapted to the power controller of  FIG. 3A  or the power controller of  FIG. 4A ; 
           [0016]      FIG. 6A  shows some signal waveforms around the transition from a dimming-OFF period to a dimming-ON period according to the control method of  FIG. 5 ; 
           [0017]      FIG. 6B  shows some signal waveforms around the transition from a dimming-ON period to a dimming-OFF period according to the control method of  FIG. 5 ; 
           [0018]      FIG. 7  shows some signal waveforms, including dimming signal V DIM , gate signal V GATE , compensation signal V COM , current I IN , around the transition from a dimming-OFF period to a dimming-ON period while no soft-start mechanism is used; and 
           [0019]      FIG. 8  shows a control method according to one embodiment of the invention. 
       
    
    
     DETAILED DESCRIPTION 
       [0020]    In this specification, the devices with the same symbol refer to the devices with substantially the same or similar function, structure, compound or application, but are not necessarily all the same. After reading this specification, persons skilled in the art can replace or alter some devices in the embodiments without departing the essence of the invention. Accordingly, the embodiments herein are not used for limiting the scope of the invention. 
         [0021]      FIG. 3A  demonstrates power controller  22 , which, as an example, is employed in power controller  18  of  FIG. 1 . Power controller  22  has pulse width modulator  32  and gate-driving circuit  24 . Pulse-width signal V PWM  is generated according to compensation signal V COM  at compensation node COM. For example, the higher the compensation signal V COM , the longer the ON time when pulse-width signal V PWM  is asserted to make power switch  15  perform a short circuit, the more the electric energy stored in an inductive device, and the higher the power a corresponding power converter converts. Gate-driving circuit  24  drives gate node GATE of power switch  15 , generating gate signal V GATE  based on pulse-width signal V PWM  and dimming signal V DIM . It can be derived from the schematic of gate-driving circuit  24  that, when dimming signal is asserted, gate signal V GATE  at gate node GATE is substantially in phase with pulse-width signal V PWM . Gate-driving circuit  24  has driver  26 , which, as an example to compare with embodiments, has a driving force of 4 units to drive gate node GATE. 
         [0022]      FIG. 3B  shows dimming signal V DIM , gate signal V GATE , and current I IN  drained to the LED chains from input node V IN . As shown in  FIG. 3B , when dimming signal V DIM  is asserted, driver  26  generates gate signal V GATE , using its driving force of 4 units, such that power switch  15  is periodically turned ON and OFF, and current I IN  vibrates within a certain range to power the LED chains of  FIG. 1 . When dimming signal V DIM  is deasserted, driver  26  uses its driving force of 4 units to deassert gate signal V GATE , whose voltage, as a result, drops quickly and stays around 0 volt, completely turning off power switch  15 . For power switch  15  is turned off, current I IN  decreases linearly over time and become 0 A eventually. 
         [0023]      FIG. 4A  demonstrates power controller  30 , which in one embodiment of the invention replaces power controller  18  of  FIG. 1 . Power controller  30  has pulse width modulator  32  and gate-driving circuit  34 .  FIG. 4A  share with  FIG. 3A  some common devices, which could be comprehensible to persons skilled in the art and will not be detailed in consideration of brevity. 
         [0024]    Different to gate-driving circuit  24  of  FIG. 3A  having a single driver  26 , gate-driving circuit  34  of  FIG. 4A  includes two drivers  36  and  38 , having driving force of 1 unit and 3 units respectively. For instance, in one embodiment, the maximum pulling-down current that driver  36  can afford is 10 mA, and the maximum pulling-down current that driver  38  can afford is 30 mA, such that the driving force of driver  38  is three times that of driver  36 . In another embodiment, the pulling-down resistance of driver  36  is three times that of driver  38  to make the driving force of driver  38  three times that of driver  36 . When dimming signal V DIM  is asserted, gate signal V GATE  is substantially in phase with pulse-width signal V PWM , and drivers  36  and  38  together use driving force of 4 units in total to generate gate signal V GATE . When signal V DIM  is deasserted, driver  38  is disabled, its output impedance becomes so large, and it drives no more the control gate of power switch  15 . Thus, driver  36  alone deasserts gate signal V GATE , using driving force of 1 unit. 
         [0025]      FIG. 4B  shows waveforms of dimming signal V DIM , gate signal V GATE , and current I IN  drained to the LED chains from input node V IN , according to the embodiment of  FIG. 4A . Unlike the gate signal V GATE  in  FIG. 3B , whose voltage, when dimming signal V DIM  switches to being asserted, drops quickly because of the driving force of 4 units, gate signal V GATE  in  FIG. 4B  drops relatively slower when dimming signal V DIM  switches to being asserted, because the driving force to pull down gate signal V GATE  is mere 1 unit. Accordingly, current I IN  in  FIG. 4B  can hold for a short period of time and then, when gate signal V GATE  is surely deasserted to complete turn OFF power switch  15 , decreases linearly over time and become 0 A eventually. 
         [0026]    Comparing with the waveform of current I IN  in  FIG. 3B , current I IN  in  FIG. 4B  varies milder, especially when dimming signal V DIM  is switched to being deasserted. It can be derived from spectrum analysis that a signal that varies relatively milder will have stronger energy to its fundamental frequency and less energy to its harmonic frequencies. As aforementioned, audio noise might happen easily if the energy to the harmonic frequencies of a signal is large even though the fundamental frequency of the signal locates within a frequency range less audible to human. Since power controller  30  of  FIG. 4A  renders relatively-less energy to harmonic frequencies, it is more-likely that power controller  30  can reduce the audio noise caused by harmonic frequencies. 
         [0027]      FIG. 5  shows control method  40  adapted to power controller  22  of  FIG. 3A  or power controller  30  of  FIG. 4A . Control method  40  is used in power controller  30  in one embodiment of the invention. 
         [0028]    In step  42 , power controller  30  makes sure that operation voltage V cc  is well prepared for power controller  30  to properly function. For example, in one embodiment, operation voltage V CC  must exceed a certain level to be claimed as being well prepared. 
         [0029]    Step  44  follows, where power controller  30  checks whether it should operate in a dimming-ON period or a dimming-OFF period. For example, if dimming signal V DIM  is asserted, power controller  30  should operate in a dimming-ON period and step  46  follows. In the contrary, if dimming signal V DIM  is deasserted, power controller  30  should operate in a dimming-OFF period and step  54  follows. 
         [0030]    In step  46 , for a predetermined number of subsequent switch cycles, the ON time T ON  in each switch cycle is forced to be a predetermined minimum ON time, independent to compensation signal V COM  at compensation node COM. The time period for this predetermined number of subsequent switch cycles could be referred to as a soft-start time. In the meantime, current controller  20  in  FIG. 1  starts conducting and spreading current I IN  through LED chains to illuminate. Following step  46  is step  48 . 
         [0031]    In step  48 , power controller  30  controls ON time T ON  of power switch  15  in a following switch cycle according to compensation signal V COM , such that the LED chains are powered to illuminate. Step  50  follows. 
         [0032]    It can be found from the sequence with steps  44 ,  46  and  48 , that step  46  likely provides a soft-start mechanism, which limits the power converted by the voltage-controlled stage during the soft-start time at the beginning of a dimming-ON period. The power during the soft-start time is less than the power actually required by the current-controlled stage. After the soft-start time, as being in responsive to compensation signal V COM , power controller  30  makes the voltage-controlled stage provide the power substantially required by the current-controlled stage for illuminating the LED chains. 
         [0033]    In step  50 , power controller  30  again checks whether it should operate in a dimming-ON period or a dimming-OFF period. For example, if dimming signal V DIM  is still asserted, power controller  30  should continuously operate in a dimming-ON period and control method  40  proceeds back to step  48 . In the contrary, if dimming signal V PWM  is deasserted, power controller  30  should switch to a dimming-OFF period and control method  40  proceeds to step  52 . 
         [0034]    Step  52  is similar with step  46 . In step  52 , for another predetermined number of subsequent switch cycles, the ON time T ON  in each switch cycle is forced by power controller  30  to be the predetermined minimum ON time, independent to compensation signal V COM  at compensation node COM. The time period for this predetermined number of the subsequent switch cycles in step  52  could be referred to as a soft-brake time. During the soft-brake time, current controller  20  in  FIG. 1  stops conducting and spreading current I IN  such that the LED chains stop illuminating. Following step  52  is step  54 . 
         [0035]    In step  54 , power controller  30  does not convert electric power and provide current to drive the LED chains. In the meantime, the LED chains are kept as not illuminating. For example, power controller  30  makes and keeps gate signal V GATE  deasserted, such that power switch  15  remains as turned OFF so no electric power is converted. 
         [0036]    It can be found from the sequence with steps  50 ,  52  and  54 , that step  52  likely provides a soft-brake mechanism, which, before power conversion is complete stopped, keeps little but not zero power converted by the voltage-controlled stage during the soft-brake time at the beginning of a dimming-OFF period, in which no power is actually required as the LED chains do not illuminate. After the soft-brake time, power controller  30  constantly turns off power switch  15 , stopping the electric power conversion in the voltage-control stage and current I IN  to the current-controlled stage. 
         [0037]      FIG. 6A  shows some signal waveforms around the transition from a dimming-OFF period to a dimming-ON period, while  FIG. 6B  does some signal waveforms around the transition from a dimming-ON period to a dimming-OFF period according to control method  40  of  FIG. 5 . Signal waveforms in each of  FIGS. 6A and 6B  refer to, from top to bottom, dimming signal V DIM , gate signal V GATE , current I IN , compensation signal V COM , and voltage signal V as  at current-sense node CS. 
         [0038]    At time t R  in  FIG. 6A , dimming signal V DIM  is switched to be asserted, such that a dimming-OFF period ends and a dimming-ON period begins. Soft-start time T SS , the period from time t R  to time t ES  at the beginning of a dimming-ON period, has four switch cycles. During soft-start time T SS , each ON time of power switch  15 , as shown in  FIG. 6A , is fixed to be the minimum ON time predetermined by power controller  30 , even though compensation signal is demanding longer ON time and more power. After time t ES , the ON time of power switch  15  is determined by compensation signal V COM  and might be as long as the maximum ON time predetermined by power controller  30 . It can found in  FIG. 6A  that the power converted during soft-start time T SS  is less than what compensation voltage V COM  corresponds to or demands. 
         [0039]    At time t F  in  FIG. 6B , dimming signal V DIM  is switched to be deasserted, such that a dimming-ON period ends and a dimming-OFF period begins. Soft-brake time T SE , the period from time t F  to time t SE  at the beginning of a dimming-OFF period, has four switch cycles. During soft-brake time T SE , each ON time of power switch  15 , as shown in  FIG. 6B , is fixed to be the minimum ON time predetermined by power controller  30 , even though the LED chains stop illuminating and require no power. After time t SE , power switch  15  is no more turned on, and gate signal V GATE  is constantly deasserted. It can found in  FIG. 6B  that the power converted during braking time T SE  is more than 0, but less than what compensation voltage V COM  corresponds to or demands. 
         [0040]      FIG. 7  shows some signal waveforms, including dimming signal V DIM , gate signal V GATE , compensation signal V COM , current I IN , around the transition from a dimming-OFF period to a dimming-ON period while no soft-start mechanism is used. In comparison with current I IN  in  FIG. 7 , current I IN  in  FIG. 6A , due to the introduction of the soft-start mechanism, rises relatively milder around the transition from a dimming-OFF period to a dimming-ON period. Accordingly, it is possible that current I IN  in  FIG. 6A  causes relatively less audio noise. 
         [0041]    Similarly, by comparing with current I IN  in  FIG. 3B , which employs no braking mechanism, current I IN  in  FIG. 6B , due to the introduction of the soft-braking mechanism, falls relatively milder. Accordingly, it is possible that current I IN  in  FIG. 6B  causes relatively less audio noise. 
         [0042]    During the soft-brake time, the LED chains do not illuminate such that the power provided or converted by the voltage-controlled stage during the soft-brake time is not consumed, but stored at output node OUT. This stored power might make up for the lack during the following soft-start time when the voltage-controlled stage provides power less than that demanded by the LED chains. Accordingly, employing both the soft-start and soft-brake mechanisms in one embodiment might be beneficial in reducing variation of compensation signal V COM . 
         [0043]    One power controller according to the invention might be configured to perform the soft-start and/or soft-brake mechanisms introduced in  FIG. 5  and, as well, the driving-force control introduced in  FIG. 4A . Another power controller according to the invention might be configured to perform only the soft-start and/or soft-brake mechanisms, but not the driving-force control. Another power controller according to the invention might be configured to perform only the driving-force control, but not the soft-start and/or soft-brake mechanisms. 
         [0044]    It is not necessary that the ON time of a power switch in each switch cycle during the soft-start time and the soft-brake time must be the minimum ON time. In another embodiment, what is limited during the soft-start time and the soft-brake time is the peak value of voltage signal V CS , which corresponds to the peak current flowing through inductive device PRM. In control method  96  shown in  FIG. 8 , voltage signal V CS  for each switch cycle during a soft-brake time is forced to be at least a first predetermined value, as indicated by step  98 . Similarly, voltage signal V CS  for each switch cycle during a soft-start time is forced to be no more than a second predetermined value, as indicated by step  97  in  FIG. 8 . The first and second predetermined values are the same in one embodiment, while they might be different in another embodiment. 
         [0045]    In one embodiment, during a dimming-ON period, regardless it is within a soft-start time or not, compensation node COM will be charged or discharged according to the feedback voltage at feedback node FB. Accordingly, compensation signal V COM  substantially corresponds to the power required by the LED chains to illuminate. During a dimming-OFF time, nevertheless, compensation node COM is isolated or stopped from being charged or discharged, such that compensation signal V COM  is substantially held or sustained by an external compensation capacitor. When switching to a following dimming-ON period, as compensation signal V COM  substantially keeps its value as of the ending of the previous dimming-ON period, a voltage-controlled stage can quickly provide the power actually required by the LED chains. 
         [0046]    According to the aforementioned analysis, embodiments of the invention might render current I IN  with milder variation, resulting in reduced audio noise caused by harmonic frequencies. 
         [0047]    Even though  FIG. 1  exemplifies an embodiment of the invention by way of booster topology, the invention is not limited to. For example, embodiments of the invention might be flyback converters, buck converters, buck-boosters, and the like. 
         [0048]    While the invention has been described by way of examples and in terms of preferred embodiments, it is to be understood that the invention is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.

Technology Category: 5