Patent Document

[0001]     This application claims the benefit of U.S. Provisional Application No. 60/584,738, filed on Jul. 1, 2004. 
     
    
     FIELD OF THE INVENTION  
       [0002]     The present invention relates to digital light processor systems and methods of fabricating such systems and, more particularly, to a spacer fabrication process for use in manufacturing reflective stealth mirrors and other microelectromechanical systems.  
       BACKGROUND  
       [0003]     A digital light processor (DLP) is a microelectromechanical system (MEMS) that operates as a fast, reflective digital light switch. A DLP system combines image processing, a memory, a light source, and optics. The DLP may be monolithically fabricated in a complementary metal-oxide-semiconductor (CMOS) process over a conventional CMOS integrated circuit (IC).  
         [0004]     A reflective stealth mirror (RSM) is a recent development in DLP systems. As illustrated in  FIG. 1 , an RSM may comprise one or more movable mirrors  20  and fixed hinges  30  to support the mirrors  20  on a glass substrate  10 . Each mirror  20  reflects light in different directions depending on the state of an underlying memory cell.  
         [0005]     Two layers of amorphous silicon (a-Si) are typically used during the fabrication of an RSM to fixedly support mirror  20  from the top and bottom. The a-Si layers are removed by etching to release mirror  20  after fabrication of the RSM is completed. Serious metal spiking often occurs at the interface of the mirror sidewalls and the overlying a-Si layer  40 , which creates mirror bridges  45  after removal of the a-Si layer  40 , as illustrated in  FIG. 2 . The spiking of the mirror is a major quality issue, as the resulting mirror bridges  45  prevent movement of the mirror  20  during operation of the RSM.  
         [0006]     Oxide spacers may be utilized along the sidewalls of the mirror and the overlying a-Si layer to prevent spiking. As illustrated in  FIG. 3A , the oxide spacers are conventionally fabricated by depositing a conformal oxide layer  60  over the mirror  20 , formed by a bottom oxide layer  21 , an intermediate reflective layer  22  and a top oxide layer  23 , and anisotropically dry etching the oxide layer  60 . If the spacer process is properly controlled, the oxide spacers  60   a  and  60   b  will have a height that allows them to completely cover each sidewall of the mirror  20 , as illustrated in  FIG. 3B . However, the height of the oxide spacers is hard to control using the conventional spacer process due to etching rate variations or unstable endpoint. Hence, the oxide layer  60  may be over-etched thereby resulting in spacers  60   a ′,  60   b ′ of insufficient height, which expose the intermediate reflective layer  22 . The exposed portions of the reflective layer  22  are where the mirror bridges originate.  
         [0007]     Accordingly, a robust spacer fabrication process is needed for manufacturing RSMs, and other MEMS devices, which avoids mirror bridging.  
       SUMMARY  
       [0008]     An aspect of the invention is a method of fabricating spacers for use in manufacturing a microelectromechanical system, such as a reflective stealth mirror. The method comprises the steps of: forming an I-shape microelectromechanical structure, such as a mirror; forming a spacer layer over the microelectromechanical structure; and patterning the spacer layer to form at least one spacer along a side of the microelectromechanical structure.  
         [0009]     Another aspect of the invention is a microelectromechanical system, such as a reflective stealth mirror. The microelectromechanical system comprises: a substrate; an I-shape microelectromechanical structure, such as a mirror, formed over the substrate; and at least one spacer disposed along a side of the microelectromechanical structure.  
         [0010]     Still another aspect of the invention is a method of manufacturing a microelectromechanical system, such as a reflective stealth mirror. The method comprises the steps of: forming an I-shape microelectromechanical structure, such as a mirror; forming a spacer layer over the microelectromechanical structure; and patterning the spacer layer to form at least one spacer along a side of the microelectromechanical structure. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0011]      FIG. 1  is a perspective view of a conventional reflective stealth mirror.  
         [0012]      FIG. 2  is a top view of the mirror of during the manufacturing of a conventional reflective stealth mirror.  
         [0013]      FIG. 3A  is a sectional view through the mirror illustrating a conventional oxide spacer fabrication process.  
         [0014]      FIG. 3B  is a sectional view through the mirror illustrating an ideal profile of oxide spacers fabricated according to the conventional oxide spacer process.  
         [0015]      FIG. 3C  is a sectional view through the mirror illustrating the profile of poorly constructed oxide spacers fabricated according to the conventional oxide spacer process.  
         [0016]      FIGS. 4A-4E ,  5 A, and  5 B are sectional views through the mirror illustrating the spacer fabrication process of the present invention, where  FIGS. 4A-4E  illustrate the fabrication of an I-shape mirror structure and  FIGS. 5A and 5B  illustrate the fabrication of spacers along sides of the I-shape mirror structure.  
         [0017]      FIG. 6  is a sectional view through the completed I-shape mirror structure.  
         [0018]      FIG. 7  is a sectional view through the I-shape mirror structure, after completion of an exemplary RSM. 
     
    
     DETAILED DESCRIPTION  
       [0019]     One aspect of the present invention is a spacer fabrication process for use in fabricating a RSM structure for DLP systems or other MEMS device. The process comprises fabricating a mirror structure having, in section, an I-shape and forming non-conductive spacers along the sides of the mirror structure. Another aspect of the present invention is a microelectromechanical system comprising a mirror structure having, in section, an I-shape. Still another aspect of the present invention is a method of manufacturing a microelectromechanical system.  
         [0020]     Referring now to  FIG. 4A , a first a-Si layer  110  is formed over a substrate  100 . The substrate  100  is preferably composed of glass, however, the substrate  100  may be composed of other materials, such as silicon. The substrate  100  includes a CMOS IC (not shown) that will control the movement of the mirror structure to be formed thereon. The CMOS IC may be fabricated using conventional semiconductor wafer fabrication processes and materials. The first a-Si layer  110  may be formed using a conventional chemical vapor deposition (CVD) process. In one exemplary embodiment, the a-Si layer  110  may have a thickness of about 14,000 angstroms (A).  
         [0021]     In  FIG. 4B , a dielectric layer  121  is formed over the first a-Si layer  110 . The dielectric layer  121  may be composed, for example, of silicon dioxide or silicon nitride and may be formed using a conventional CVD process. In one exemplary embodiment, the dielectric layer  121  may have a thickness of about 400 A.  
         [0022]     As also illustrated in  FIG. 4B , an intermediate reflective layer  122  composed, for example, of aluminum silicon copper (AlSiCu), is formed over the dielectric layer  121 . The reflective layer  122  may be formed using a conventional CVD process, and in one exemplary embodiment, may have a thickness of about 2500 A.  
         [0023]     As further illustrated in  FIG. 4B , a barrier layer  123  composed, for example, of titanium nitride, is formed over the reflective layer  122 . The barrier layer  123  may be formed using a conventional CVD process. In one exemplary embodiment, the barrier layer  123  may have a thickness of about 400 A so that it is transparent.  
         [0024]     In  FIG. 4C , a mask layer  140  (e.g., photoresist) is formed over a selected portion of the barrier layer  123 . The mask layer  140  will be used during a first mirror patterning process to approximately define the mirror structure, as described immediately below.  
         [0025]     As illustrated in  FIG. 4D , the barrier, reflective, and dielectric layers  123 ,  122 ,  121 , are patterned to the approximate shape of the mirror structure using, for example, an anisotropic etching process.  
         [0026]     Then as illustrated in  FIG. 4E , the mirror structure is further patterned so that the structure has an I-shape, in section. This may be accomplished, for example, using a dry isotropic etching process (that utilizes, e.g., a rich Cl 2  plasma) or a wet etching process. The isotropic dry or wet etch process is selective to the reflective layer  122  and etches this layer at a higher rate than the dielectric and barrier layers  123 ,  121 . Accordingly, the dielectric and barrier layers  123 ,  121  overhang the reflective layer  122 , thus creating a mirror structure  120  having an I-shape, in section.  
         [0027]     The non-conductive spacers are formed along the sides of the I-shape mirror structure as shown in  FIGS. 5A and 5B . As illustrated in  FIG. 5A , a spacer layer  160  is conformally formed over the I-shape mirror structure  120 . The spacer layer  160  may be composed, for example, of plasma enhanced (PE) silicon dioxide or PE silicon nitride and may be formed using a conventional plasma enhanced chemical vapor deposition (PECVD) process. In one exemplary embodiment, the spacer layer  160  may be about 800 A in thickness.  
         [0028]     As illustrated in  FIG. 5B , the spacer layer  160  is patterned, using a conventional spacer etching process to form non-conductive spacers  160   a ,  160   b  that extend along the sides of the reflective and bottom dielectric layers  122 ,  121  of the mirror structure  120 , between the overhanging barrier layer portions  123   a ,  123   b  and the substrate  100 . The spacers  160   a ,  160   b  completely cover each sidewall of the reflective layer  122  of the mirror structure  120 . The spacer layer  160  may be patterned with an anisotropic dry etching process that utilizes the barrier layer  123  of the I-shape mirror structure  120  as a hardmask.  
         [0029]     As illustrated in  FIG. 6 , a second a-Si layer  130  is formed over the mirror structure  120  and spacers  160   a ,  160   b . The second a-Si layer  130  may be formed using a conventional CVD process and in one exemplary embodiment, may have a thickness of about 9000 A.  
         [0030]      FIG. 7  illustrates the I-shape mirror structure  120 , after completion of the RSM. The first and second a-Si layers  110 ,  130  are subsequently removed to release the mirror structure  120  which is now coupled to the substrate  100  by a hinge  170 , which may be fabricated using conventional MEMs methods. Because the spacers  160   a ,  160   b , completely cover each sidewall of the reflective layer  122  of the mirror structure  120 , (e.g.  FIG. 6 ) there are no exposed portions of the reflective layer  122  where mirror bridges can originate due to spiking when the first and second a-Si layers  110 ,  130  are removed to release the mirror  120 .  
         [0031]     While the foregoing invention has been described with reference to the above, various modifications and changes can be made without departing from the spirit of the invention. Accordingly, all such modifications and changes are considered to be within the scope of the appended claims.

Technology Category: 3