Patent Document

CLAIM OF PRIORITY  
       [0001]     The present application claims priority from Japanese Application JP 2004-112727, filed on Apr. 7, 2004, the content of which is incorporated by reference into this application.  
       FIELD OF THE INVENTION  
       [0002]     The present invention relates to an image display device having optical detecting means.  
       BACKGROUND OF THE INVENTION  
       [0003]     One example of the related art will be described below with reference to  FIG. 21 .  
         [0004]     The structure of this example will be described first.  
         [0005]      FIG. 21  shows the configuration of a conventional liquid crystal display having optical detecting means. Each pixel consists of a liquid crystal element  201 , a storage capacitor  202  and a pixel switch  203 . One end of the storage capacitor  202  is connected to a constant voltage line  204 , and the other end is connected to one end of the pixel switch  203 . The other end of the pixel switch  203  is connected to a signal line  206 , and its gate is connected to a gate line  205 .  
         [0006]     So far is the configuration of a usual liquid crystal display, but this example is further provided with an optical detecting element  211  consisting of an optical detection TFT (thin-film transistor)  207 , an optical signal electric-carrier capacitor  208  and a scan switch  209 . The gate of the optical detection TFT  207  here is connected to a constant voltage line  204 , and one end of the optical detection TFT  207  is connected to a scan switch  209  and at the same time to the constant voltage line  204  via the optical signal electric-carrier capacitor  208 . The other end of the scan switch  209  is connected to an optical signal output line  210 , and its gate is connected to the gate line  205 . The other end of the optical signal output line  210  is entered into an integrator composed of a feedback capacitor  213 , a reset switch  214  and a differential amplifier  212 .  
         [0007]     Next will be described the operation of this example of the related art.  
         [0008]     Its operation is the same as that of a usual liquid crystal display as far as a signal voltage entered via the signal line  206  is written into the storage capacitor  202  in the pixel scanned by the gate line  205  and an image is displayed by the liquid crystal element  201  by manifesting optical characteristics according to the signal voltage.  
         [0009]     Hereupon in this example of the related art, the optical signal electric-carrier capacitor  208  is scanned at the same time by the scanning of the gate line  205 , and the optical signal electric-carrier stored in the optical signal electric-carrier capacitor  208  is entered into the integrator via the optical signal output line  210 . The integrator buffers the signal electric-carrier stored in the optical signal electric-carrier capacitor  208  and outputs it as a voltage Vout. By this operation, the conventional display device can not only visually display the display signals but also output the optical image coming incident on the display screen as electric signals (see Non-Patent document 1 for instance).  
         [0010]     [Non-Patent document 1] 2003 SID Digest of Technical Papers, pp. 1494-1497  
       SUMMARY OF THE INVENTION  
       [0011]     In the example of the related art described above, in order to capture one frame of optical image, the gate line  205  needs to be scanned throughout. However, the gate line  205  is wired all over the display screen, and accordingly does not lend itself to high speed scanning. As a result, capturing one optical image basically requires a length of time equivalent to one frame. Since an image is always on the display screen, this gives rise to a problem that crosstalk inevitably occurs between the displayed image and the optical image to be captured. Especially for dot-type image inputting as in the case of a touch panel, this poses an input trouble.  
         [0012]     One of the typical aspects of the invention disclosed in this application will be briefly summarized below. Thus, an image display device pertaining to the invention comprises a plurality of pixels having display brightness modulation means controlled with display signals, a display unit in which the plurality of pixels are arrayed, and a plurality of optical detecting means provided with in the display unit wherein: 
        each of the optical detecting means comprises optical sense means for converting incident lights into signal electric-carriers, signal electric-carrier resetting means for resetting the signal electric-carriers, output impedance modulating means for detecting the signal electric-carriers and modulating output impedances, and the output impedance modulating means of the plurality of optical detecting means are connected in series to each other.       
 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0014]      FIG. 1  shows the configuration of the display unit of a personal digital assistance, which is an image display device representing a first preferred embodiment of the present invention.  
         [0015]      FIG. 2  shows the configuration of a pixel in the first preferred embodiment.  
         [0016]      FIG. 3  shows the configuration of an optical detecting element in the first embodiment.  
         [0017]      FIG. 4  shows the layout of the optical detecting element in the first embodiment.  
         [0018]      FIG. 5  shows the sectional structure of the part along line AA-BB in  FIG. 4 .  
         [0019]      FIG. 6  shows the configuration of one frame in the first embodiment.  
         [0020]      FIG. 7  is an operational timing chart of the write period in the first embodiment.  
         [0021]      FIG. 8  is an operational timing chart of the light emission period in the first embodiment.  
         [0022]      FIG. 9  is an operational timing chart of the detection period in the first embodiment.  
         [0023]      FIG. 10  shows the configuration of an X output scanning circuit in the first embodiment.  
         [0024]      FIG. 11  shows the overall configuration of the personal digital assistance in the first embodiment.  
         [0025]      FIG. 12  shows the configuration of an optical detecting element in a second preferred embodiment of the invention.  
         [0026]      FIG. 13  is an operational timing chart of the detection period in the second embodiment.  
         [0027]      FIG. 14  shows the configuration of an optical detecting element in a third preferred embodiment.  
         [0028]      FIG. 15  is an operational timing chart of the light emission period, the detection period and the write period in the third embodiment.  
         [0029]      FIG. 16  shows the configuration of an optical detecting element in a fourth preferred embodiment.  
         [0030]      FIG. 17  is an operational timing chart of the detection period in the fourth embodiment.  
         [0031]      FIG. 18  shows the configuration of an optical detecting element in a fifth embodiment.  
         [0032]      FIG. 19  is an operational timing chart of the detection period in a sixth embodiment.  
         [0033]      FIG. 20  shows the configuration of the x output scanning circuit in the sixth embodiment.  
         [0034]      FIG. 21  shows the configuration of a conventional liquid crystal display having optical detecting means. 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0035]     A number of preferred examples of the image display device pertaining to the present invention will be described in detail below with reference to accompanying drawings.  
       Embodiment 1  
       [0036]     The configuration and operation of an image display device, which is the first preferred embodiment of the invention, will be successively described with reference to  FIG. 1  through  FIG. 11 .  
         [0037]      FIG. 1  shows the image display device, the first embodiment of the invention, in particular the display unit of a personal digital assistance having an optical touch panel. In a display area  1 , pixels  2  are arranged in the shape of a matrix. To each of the pixels  2 , a reset line  4 A and a light-up line  4 B are connected in the horizontal direction, and a signal line  5  is connected in the vertical direction. A vertical scanning circuit (VTSCN)  6  is provided at one end each of the reset line  4 A and the light-up line  4 B, and a signal voltage input circuit (SGVIN)  7 , at one end of the signal line  5 . A display signal input line  8  is connected to the signal voltage input circuit  7 .  
         [0038]     At the same time, optical detecting elements  3  are also disposed in the shape of a matrix in the display area  1 . To each of the optical detecting elements  3 , a Y output line  11  is connected in the horizontal direction and an X output line  12  is connected in the vertical direction. One end of the Y output line  11  is connected to a Y output scanning circuit (SCN_YOUT)  13 , and one end of the X output line  12  is connected to an X output scanning circuit (SCN_XOUT)  14 . Incidentally, the Y output scanning circuit  13  and the X output scanning circuit  14  output to a Y output line  15  and an X output line  16 , respectively. The other ends of the Y output line  11  and the X output line  12  are commonly connected to a high voltage source terminal  10 .  
         [0039]     Next will be described the configuration of the pixel  2 .  
         [0040]      FIG. 2  shows the configuration of the pixel  2 . One end of a storage capacitor  24  is connected to the signal line  5 , and the other end of the storage capacitor  24  is connected to the gate of a p-type poly-crystal drive TFT  21 . The source of the drive TFT  21  is connected to a power supply line  25 , and its drain is connected to an organic EL (electro-luminescence) light emitting element  20  via a light-up switch  22 , which is an n-type poly-crystal drive TFT. The other end of the organic EL light emitting element  20  is connected to a common cathode CC. Further, a reset switch  23 , which is another n-type poly-crystal drive TFT, is connected between the drain and the gate of the drive TFT  21 , and the gates of the light-up switch  22  and of the reset switch  23  are connected to the light-up line  4 B and the reset line  4 A, respectively.  
         [0041]     Next will be described the configuration of the optical detecting element  3 .  
         [0042]      FIG. 3  shows the configuration of the optical detecting element  3 . One end of a detection element reset switch  31 , which is an n-type poly-crystal Si-TFT, is connected to the power supply line  25 , and the other end of the detection element reset switch  31  is connected to the gate of an X output TFT  33 , which is an n-type poly-crystal Si-TFT, the gate of a Y output TFT  32 , which is a p-type poly-crystal Si-TFT, and an optical detection diode  30 , which is a poly-crystal Si thin film diode. The other end of the optical detection diode  30  is connected to a low voltage power supply line  26 . A detection element reset line  34  is connected to the gate of the detection element reset switch  31 , and the Y output line  11  and the X output line  12  are connected to both ends of the Y output TFT  32  and both ends of the X output TFT  33 , respectively.  
         [0043]     Hereupon, the physical structure of the optical detecting element  3  will be described with reference to  FIG. 4  and  FIG. 5 .  
         [0044]      FIG. 4  shows the layout of the optical detecting element  3 , wherein thin solid lines represent aluminum (Al) wiring; thick solid lines, gate wiring; broken lines, poly-crystal Si islands; and circles, contact holes. It is therefore seen that the detection element reset switch  31 , the Y output TFT  32  and the X output TFT  33  are realized as areas where thick solid lines and broken lines cross. Incidentally, Al wiring  35  here is a structural element for connecting poly-crystal Si islands and TFT gate electrodes.  
         [0045]      FIG. 5  shows the sectional structure of the part along line AA-BB in  FIG. 4 . A display unit  37  itself is disposed over a glass substrate (GLS)  36 , and one poly-crystal Si island is formed between AA and BB above. The poly-crystal Si island is doped with p-type and n-type impurities as illustrated excepted in the non-doped region i immediately underneath the gate of the detection element reset switch  31 , and the optical detection diode  30  is also fabricated in this way. An n-region is arranged in the channel region at the gate edge of the detection element reset switch  31 . This n-region provides the detection element reset switch  31  with an LDD (lightly doped drain) structure for reducing off-currents.  
         [0046]     Next will be described the operation of this display unit with reference to  FIG. 6  through  FIG. 9 .  
         [0047]      FIG. 6  shows the configuration of one frame (FRM) in this display unit. One frame period consists of three periods including a write period WRT, a light emission period ILM, and a detection period SNS as illustrated therein. In  FIG. 6 , time t proceeds from left to right. The operation in this each period will be described below in due sequence.  
         [0048]      FIG. 7  is an operational timing chart of the write period WRT, wherein the upper part shows that the TFTs whose gates are connected to the reset line  4 A and the light-up line  4 B are on, and the lower part, they are off. The voltage V 5  of the signal line  5  is high in the upper part and low in the lower part. This is a period in which a display signal voltage is written into each pixel  2 , and  FIG. 7  shows writing onto three lines including the N-th, (N+1)-th and (N+2)-th. In writing onto the N-th line, first the reset line  4 A and the light-up line  4 B are turned on, and at this time a display signal voltage is applied to the signal line  5 . When the reset line  4 A and the light-up line  4 B are tuned on, the drive TFT  21  is diode-connected and connected in series to the organic EL element  20  in the pixel  2 .  
         [0049]     Then, when the light-up line  4 B is turned off, the light-up switch  22  is turned off, and the gate voltage of the drive TFT  21  becomes stabilized when it reaches a threshold voltage Vth. When this takes place, a display signal voltage is applied to the other end of the storage capacitor  24 . When the reset line  4 A turns off the reset switch  23  hereupon, the storage capacitor  24  stores a state in which the threshold voltage Vth of the drive TFT  21  is generated on the gate side of the drive TFT  21  when the display signal voltage is applied to the signal line  5  side. What has been described so far is the writing of the display signal voltage onto one line of the pixel  2 , and the same operation is repeated for each subsequent line.  
         [0050]     Next,  FIG. 8  is an operational timing chart of the light-up line  4 B and the signal line  5  in the light emission period ILM wherein, as in  FIG. 7 , the upper part shows an ON state and the lower part, an OFF state. This also applies to the voltage V 5  of the signal line  5 , which is high in the upper part and low in the lower part. This is the light emission period for each pixel  2 , and the light-up switch  22  of every pixel is turned as every the light-up line  4 B is turned on.  
         [0051]     If a triangular waveform as shown in  FIG. 8  is entered here as the voltage V 5  of the signal line  5 , the drive TFT  21  of each pixel will remain off as long as the voltage of the triangular waveform is higher than the prewritten display signal voltage, and will become off when the voltage of the triangular waveform becomes lower than the prewritten display signal voltage. Thus, the light emission period of the organic EL element  20  can be modulated with the prewritten display signal voltage, and light emission display matching the display signal voltage is thereby made possible without being affected by any fluctuation in the characteristics of TFTs constituting the pixel  2 .  
         [0052]     Next,  FIG. 9  is an operational timing chart of the detection period SNS, wherein, as in  FIG. 7 , the upper part shows the ON state of the detection element reset line  34  and the lower part, the OFF state of the same. Vsns denotes the detection voltage, which is the voltage at the two ends of the optical detection diode  30 , the upper line representing the high level and the lower, the low level. The operations of the Y output scanning circuit  13  and the X output scanning circuit  14  are also shown in this chart, but they will be described afterwards with reference to  FIG. 10 .  
         [0053]     This is a period of optical detection, wherein the pixel is not lit as every light-up line  4 B shown in  FIG. 8  is turned off. In this period, first, as the detection element reset line  34  remains ON for a certain duration and the detection element reset switch  31  is turned on, a reset voltage is applied to both ends of the optical detection diode  30 . After that, when the detection element reset line  34  is turned off and the detection element reset switch  31  is also turned off, the detection voltage Vsns of the optical detection diode  30  remains at the high level “H” if no light comes incident as indicated on (CA1) or drops to the low level “L” if any light comes incident as indicated on (CA2).  
         [0054]     As the voltage of the optical detection diode  30  is then applied as it is to the gates of the Y output TFT  32  and the X output TFT  33 , which are p-type TFTs, in the case of CA1 wherein no light comes incident, the Y output TFT  32  and the X output TFT  33  remain off or, in the case of CA2 wherein a light does come incident, the Y output TFT  32  and the X output TFT  33  vary to an ON state.  
         [0055]     As the drain-source routes of the Y output TFT  32  and the X output TFT  33  here are connected in series by the Y output line  11  and the X output line  12 , respectively, if any of the optical detecting elements  3 , connected in series as shown in  FIG. 1 , is not irradiated with light or is irradiated only at a low level of brightness, the outputs themselves of the Y output line  11  and the X output line  12  will take on high impedances. By detecting them in the X and Y directions, the address of the optical detecting element  3  not irradiated with light or irradiated only at a low level of brightness can be readily found out.  
         [0056]     This address detection structure will be described below with reference to  FIG. 10 .  
         [0057]      FIG. 10  shows the configuration of the X output scanning circuit  14  shown in  FIG. 1 . One end of a preset switch  41  controlled with a preset line  42  is connected to the X output line  12  entered in parallel, while the other end of the preset switch  41  is grounded. Further, an end of the X output line  12  is grounded via an X output line capacitor  43 , and is connected to an X signal output line  16  via an X scan switch  45 . Incidentally, the gate of the X scan switch  45  here is successively scanned by an X scanning circuit (SCN_X)  44 .  
         [0058]     The X output scanning circuit  14  operates as shown in  FIG. 9 . After the detection element reset line  34  is turned off, the preset switch  41  controlled with the preset line  42  is turned on to preset (PST) the X output line capacitor  43 . After that, if the output of the X output line  12  is at a low impedance, the X output line capacitor  43  will be returned to a high voltage by a power source provided at the other end of the X output line  12 , but if the output of the X output line  12  is at a high impedance, the X output line capacitor  43  will remain preset to a low voltage. By successively reading the capacitances of the X output line capacitors  43  then by scanning with the X scanning circuit  44 , it can be determined whether or not there is any which is not irradiated with light or irradiated only at a low level of brightness among the optical detecting elements  3  on the pertinent line. Incidentally, description of the operation of the Y output scanning circuit  13  is dispensed with here because it is the same as that of the X output scanning circuit  14 .  
         [0059]     Whereas detection of lights from the optical detecting elements  3  are detected within one frame in this embodiment as described above, since the scanning by the X scanning circuit  44  and the Y scanning circuit is only to scan the X output line capacitors  43  and the Y output line capacitors, it can be completed in a short period of time substantially equal to one horizontal period. This detection period SNS is only about, for instance, 50 μsec to 100 μsec. Furthermore, since light emission of every pixel is stopped during this optical detection period, there is no possibility for crosstalk from the displayed image to optical detection to arise. Since optical detection is possible only in a very short period of time in this embodiment, crosstalk can be avoided by stopping light emission during the detection period.  
         [0060]     Next will be described the overall configuration and operation of a personal digital assistance having the optical touch panel which constitutes this embodiment of the invention.  
         [0061]      FIG. 11  shows the overall configuration of the personal digital assistance having the optical touch panel which constitutes this embodiment. Within a personal digital assistance  58 , a CPU (central processing unit)  55 , a frame memory (MEM)  56 , numeric keys and a wireless input interface circuit (I/F)  57  are connected to a graphic control circuit (GRPCTL)  53  by a system bus  60 . The output of the graphic control circuit  53  is entered into a timing control circuit (TMCTL)  52 , and the display signal input line  8  and a prescribed control signal line  51  are connected from the timing control circuit  52  to a display unit (DISP)  50 .  
         [0062]     Details of the display unit  50  here have already been described. Outputs are provided from the display unit  50  to the Y signal output line  15  and the X signal output line  16 , and they are entered into the graphic control circuit  53  via a position detection circuit (POS)  54 .  
         [0063]     Next will be described the operation of this embodiment.  
         [0064]     When a prescribed instruction is entered from the input interface circuit  57  to the CPU  55  via the system bus  60 , the CPU  55  operates the frame memory  56  in accordance with this instruction, and transfers necessary instructions and display data to the graphic control circuit  53 . Here upon, the graphic control circuit  53  enters prescribed instructions and display data into the timing control circuit  52 , which converts these signals into signals having prescribed voltage amplitudes, and transfers control signals and display signals to circuits disposed on a glass substrate, which constitutes the display unit  50 . The display unit  50  displays the transferred display signals and, at the same time, supplies optical touch panel outputs to the Y signal output line  15  and the X signal output line  16  from time to time as requested.  
         [0065]     The position detection circuit  54  extracts from these outputs touch input address information entered with a finger, stick or the like, and feeds back the obtained touch input address information to the graphic control circuit  53  on a real time basis. In response to this, the CPU  55  judges what kind of touch input instructions has been entered and alters the display signals as required. Such alterations may include, for instance, altering the part of the displayed image corresponding to the touched part.  
         [0066]     The design of the embodiment of the invention so far described can obviously be modified in various ways without deviating from the spirit of the invention. For instance, the glass substrate used as the TFT substrate can be replaced with some other transparent insulating substrate, such as a quartz glass substrate or a transparent plastic substrate. Or an opaque substrate can as well be used if the organic EL light emitting element  13  is structured for top emission.  
         [0067]     Any mention of the number of pixels, panel size and similar factors was intentionally refrained from the foregoing description of this embodiment, because the invention is not confined to these specifications or formats. Regarding the number of displayed pixels, the optical opening for displayed pixels can obviously be expanded by appropriately reducing the number of optical detecting elements.  
         [0068]     Further in this embodiment, though organic EL elements are used in the pixel part, liquid crystal display elements can as well be used in place of them. In this case, optical detection free from crosstalk of the displayed image can be made possible by fully turning off the back light. If not full turning-off, the brightness can be reduced low enough to make crosstalk negligible. In this case, obviously it is preferable for the brightness of light emission in the optical detection part to be as uniform as practicable.  
         [0069]     Further in this embodiment, though n-type poly-crystal drive Si-TFTs are used as the detection element reset switches  31 , evidently the voltage of the detection element reset line  34  can be reduced by replacing them with p-type poly-crystal drive Si-TFTs.  
         [0070]     These various modifications are not confined to this embodiment, but can basically be applied to the other embodiments to be described below.  
       Embodiment 2  
       [0071]     Another image display device, which is a second preferred embodiment of the present invention, will be described below with reference to  FIG. 12  and  FIG. 13 ,  
         [0072]     As the basic structure and operation of a personal digital assistance having the optical touch panel, which is the second embodiment, are the same as those of the first embodiment already described, and this embodiment differs from the first embodiment in the structure and operation of the optical detecting elements, these differences will be described below.  
         [0073]      FIG. 12  shows the configuration of an optical detecting element  3 B. The cathode of the optical detection diode  30 , which is a poly-crystal Si thin film diode, is connected to the power supply line  25 , and the gate of an X output TFT  33 B, which is an n-type poly-crystal drive Si-TFT, the gate of a Y output TFT  32 B, which is another n-type poly-crystal drive Si-TFT, and one end of a detection element reset switch  31 B, which is still another n-type poly-crystal drive Si-TFT, are connected to the anode of the optical detection diode  30 . The other end of the detection element reset switch  31 B is connected to the low voltage power supply line  26 . The detection element reset line  34  is connected to the gate of the detection element reset switch  31 B, and the Y output line  11  and the X output line  12  are connected to the two ends of the Y output TFT  32 B and those of the X output TFT  33 B, respectively.  
         [0074]     Next will be described the operation of the optical detecting element  3 B.  
         [0075]      FIG. 13  is an operational timing chart of the detection period SNS, wherein the upper level of the detection element reset line  34  represents ON and the lower level represents OFF. Incidentally, Vsns denotes the detection voltage, which is the voltage on the anode side of the optical detection diode  30 , the upper line representing the high voltage and the lower, the low voltage. This is a period of optical detection, wherein the pixel is not lit as every light-up line  4 B is turned off as in the first embodiment.  
         [0076]     In this period, first, as the detection element reset line  34  remains ON for a certain duration and the detection element reset switch  31 B is turned on, the anode voltage Vsns of the optical detection diode  30  is reset to a low level. After that, when the detection element reset line  34  is turned off and the detection element reset switch  31 B is also turned off, the anode voltage of the optical detection diode  30  remains at the low level “L” if no light comes incident as indicated on (CA1) or rises to the high level “H” if any light comes incident as indicated on (CA2).  
         [0077]     The anode voltage Vsns of the optical detection diode  30  is then applied as it is to the gates of the Y output TFT  32 B and the X output TFT  33 B, which are n-type TFTs. Therefore, if no light comes incident, the Y output TFT  32 B and the X output TFT  33 B will remain off or, if a light comes incident, the Y output TFT.  32 B and the X output TFT  33 B vary to an ON state. As the Y output TFT  32 B and the X output TFT  33 B here are connected in series by the Y output line  11  and the X output line  12 , respectively if any of the optical detecting elements  3 , which are connected in series, is not irradiated with light or is irradiated only at a low level of brightness, the outputs themselves of the Y output line  11  and the X output line  12  will take on high impedances. By detecting them in the X and Y directions, the address of the optical detecting element  3  not irradiated with light or irradiated only at a low level of brightness can be readily found out as in the first embodiment.  
       Embodiment 3  
       [0078]     Still another image display device, which is a third preferred embodiment of the present invention, will be described below with reference to  FIG. 14  and  FIG. 15 .  
         [0079]     As the basic structure and operation of a personal digital assistance having the optical touch panel, which is the third embodiment, are the same as those of the second embodiment already described, and this embodiment differs from the second embodiment in the structure and operation of the optical detecting elements, these differences will be described below.  
         [0080]      FIG. 14  shows the configuration of an optical detecting element  3 C. The optical detection diode  30 , which is a poly-crystal Si thin film diode, is connected to the power supply line  25 , and the gate of an X output TFT  33 C, which is a p-type poly-crystal drive Si-TFT, the gate of a Y output TFT  32 C, which is another p-type poly-crystal drive Si-TFT, and a detection element reset switch  31 C, which is an n-type poly-crystal drive Si-TFT, are connected to the anode of the optical detection diode  30 . The other end of the detection element reset switch  31 C is connected to the low voltage power supply line  26 . The detection element reset line  34  is connected to the gate of the detection element reset switch  31 C, and the Y output line  11  and the X output line  12  are connected to the two ends of the Y output TFT  32 C and to those of the X output TFT  33 C, respectively.  
         [0081]     Next will be described the operation of the optical detecting element  3 C.  
         [0082]      FIG. 15  is an operational timing chart of the detection period SNS, light emission period ILM and the write period WRT, wherein the upper level of the light-up line  4 B represents ON and the lower level represents OFF. Regarding the voltage V 5  of the signal line  5 , the upper line represents the high voltage and the lower represents the low voltage. To compare here  FIG. 15  with  FIG. 8 , which is the timing chart of the first embodiment, it is seen that the voltage V 5  of the signal line  5  is at the low level in the detection period SNS. This results in light emission from every pixel in the detection period SNS.  
         [0083]     To compare this embodiment with the second, the X output TFT  33 C and the Y output TFT  32 C are p-type, instead of n-type, poly-crystal drive Si-TFTs. For this reason, the outputs of this embodiment are such that the Y output TFT  32 C and the X output TFT  33 C remain ON when no light comes incident, while the Y output TFT  32 C and the X output TFT  33 C vary to OFF when a light comes incident. As the Y output TFT  32 C and the X output TFT  33 C here are connected in series by the Y output line  11  and the X output line  12 , respectively, if any of the optical detecting elements  3 , which are connected in series, is irradiated with light or is irradiated at a high level of brightness, the outputs themselves of the Y output line  11  and the X output line  12  will take on high impedances.  
         [0084]     Since every pixel emits light during the detection period in this embodiment, if anything is in contact with the display, reflection from that part will become greater to make that part as if its brightness were increased. Therefore, a touch panel function can be realized in this embodiment by detecting that high brightness part. In particular, even if the brightness in the surrounding environment is low, a highly sensitive touch panel function can be realized in this embodiment.  
         [0085]     To add, it is evidently possible to let external light-intercepting type optical detection as in the second embodiment and contact part-reflecting type optical detection as in this embodiment coexist in a single display, and to use either of the two types as desired.  
       Embodiment 4  
       [0086]     Yet another image display device, which is a fourth preferred embodiment of the present invention, will be described below with reference to  FIG. 16  and  FIG. 17 .  
         [0087]     As the basic structure and operation of a personal digital assistance having the optical touch panel, which is the fourth embodiment, are the same as those of the first embodiment already described, and this embodiment differs from the first embodiment in the structure and operation of the optical detecting elements, these differences will be described below.  
         [0088]      FIG. 16  shows the configuration of an optical detecting element  3 D. The optical detection diode  30 , which poly-crystal Si thin film diode, is connected to a power supply line  26 D, and the gate of the X output TFT  33 , which is a p-type poly-crystal drive Si-TFT, and the gate of the Y output TFT  32 , which is another p-type poly-crystal drive Si-TFT, are connected to the other end of the optical detection diode  30 . The Y output line  11  and the X output line  12  are connected to the two ends of the Y output TFT  32  and to those of the X output TFT  33 , respectively.  
         [0089]     Next will be described the operation of the optical detecting element  3 D.  
         [0090]      FIG. 17  is an operational timing chart of the detection period SNS, wherein the upper level of the power supply line  26 D represents ON (high voltage) and the lower level represents OFF (low voltage). Incidentally, Vsns denotes the detection voltage, which is the voltage on the cathode side of the optical detection diode  30  here, the upper line representing the high voltage and the lower represents the low voltage.  
         [0091]     This is a period of optical detection, wherein no pixel is lit as every light-up line  4 B is turned off as in the first embodiment.  
         [0092]     In this period, first, as the power supply line  26 D remains ON for a certain duration and the optical detection diode  30  is biased in the forward direction, the cathode voltage of the optical detection diode  30  is reset to a high level. After that, when the power supply line  26 D is turned off, the cathode voltage Vsns of the optical detection diode  30  remains at the high level “H” if no light comes incident as indicated on (CA1) or drops to the low level “L” if any light comes incident as indicated on (CA2). The cathode voltage Vsns of the optical detection diode  30  is then applied as it is to the gates of the Y output TFT  32  and the X output TFT  33 , which are p-type TFTs. Therefore, if no light comes incident, the Y output TFT  32  and the X output TFT  33  will remain off or, if a light comes incident, the Y output TFT  32  and the X output TFT  33  vary to an ON state. As the Y output TFT  32  and the X output TFT  33  here are connected in series by the Y output line  11  and the X output line  12 , respectively, if any of the optical detecting elements  3 , which are connected in series, is not irradiated with light or is irradiated only at a low level of brightness, the outputs themselves of the Y output line  11  and the X output line  12  will take on high impedances. By detecting them in the X and Y directions, the address of the optical detecting element  3 D not irradiated with light or irradiated only at a low level of brightness can be readily found out as in the first embodiment.  
         [0093]     This embodiment has an advantage that the structure of the optical detecting elements can be simplified and a large display pixel area can be secured by making the power supply line  26 D variable.  
       Embodiment 5  
       [0094]     Still another image display device, which is a fifth preferred embodiment of the present invention, will be described below with reference to  FIG. 18 .  
         [0095]     As the basic structure and operation of a personal digital assistance having the optical touch panel, which is the fifth embodiment, are the same as those of the fourth embodiment already described, and this embodiment differs from the fourth embodiment in the structure and operation of the optical detecting elements, these differences will be described below.  
         [0096]      FIG. 18  shows the configuration of an optical detecting elements  3 E. An optical detection diode  30 E, which is configured by diode-connecting a p-type poly-crystal Si-TFT, is connected to a power supply line  26 E, and the gate of the X output TFT  33 , which is a p-type poly-crystal drive Si-TFT, and the gate of the Y output TFT  32 , which is another p-type poly-crystal drive Si-TFT, are connected to the other end of the optical detection diode  30 E. The Y output line  11  and the X output line  12  are connected to the two ends of the Y output TFT  32  and to those of the X output TFT  33 , respectively.  
         [0097]     This embodiment, besides providing the same benefits as the fourth embodiment, has an advantage of permitting fabrication in an all-TFT configuration. Furthermore, a similar configuration is made possible with n-type TFTs instead of p-type TFTs by reversing the voltage relationship. There is another cost advantage that an all p-MOS process or an all n-MOS process can be applied by appropriate combination with the configuration of display pixels.  
       Embodiment 6  
       [0098]     Yet another image display device, which is a sixth preferred embodiment of the present invention, will be described below with reference to  FIG. 19  and  FIG. 20 .  
         [0099]     As the basic structure and operation of a personal digital assistance having the optical touch panel, which is the sixth embodiment, are the same as those of the first embodiment already described, and this embodiment differs from the first embodiment in the structure and operation of an X output scanning circuit  14 F and an Y output scanning circuit  13 F, these differences will be described below.  
         [0100]      FIG. 19  is an operational timing chart of the detection period SNS, wherein the upper level of the detection element reset line  34  represents ON and the lower level represents OFF. Incidentally, Vsns denotes the detection voltage, which is the voltage at the two ends of the optical detection diode  30  here, the upper line representing the high voltage and the lower representing the low voltage. The operations of the Y output scanning circuit  13 F and the X output scanning circuit  14 F are also shown in this chart, but they will be described afterwards with reference to  FIG. 20 .  
         [0101]     This is a period of optical detection, wherein no pixel is lit as every light-up line  4 B is turned off.  
         [0102]     In this period, first, as the detection element reset line  34  remains on for a certain duration and the detection element reset switch  31  is turned on, a reset voltage is applied to both ends of the optical detection diode  30 . After that, when the detection element reset line  34  is turned off and the detection element reset switch  31  is also turned off, the detection voltage Vsns of the optical detection diode  30  remains at the high level “H” if no light comes incident as indicated on (CA1) or drops to the low level “L” if any light comes incident as indicated on (CA2).  
         [0103]     As the voltage of the optical detection diode  30  is then applied as it is to the gates of the Y output TFT  32  and the X output TFT  33 , which are p-type TFTs, in the case of no light coming incident, the Y output TFT  32  and the X output TFT  33  remain off or, in the case of a light coming incident, the Y output TFT  32  and the X output TFT  33  vary to an ON state. As the Y output TFT  32  and the X output TFT  33  here are connected in series by the Y output line  11  and the X output line  12 , respectively, if any of the optical detecting elements  3 , which are connected in series, is not irradiated with light or is irradiated only at a low level of brightness, the outputs themselves of the Y output line  11  and the X output line  12  will take on high impedances. By detecting them in the X and Y directions, the address of the optical detecting element  3  not irradiated with light or irradiated only at a low level of brightness can be readily found out.  
         [0104]     Next will be described the configuration of this address detection circuit with reference to  FIG. 20 .  
         [0105]      FIG. 20  shows the configuration of an X output scanning circuit (SCN_X)  14 F. The X output line  12  entered in parallel is provided with the preset switch  41  controlled with the preset line  42 , while the other end of the preset switch  41  is grounded. The X output line  12  is connected to the X output line capacitor  43  via a sampling switch  46 F controlled by a sampling gate line  47 F via an X output line capacitor  43 , and is further connected to the X signal output line  16  via the X scan switch  45 . Incidentally, the gate of the X scan switch  45  here is successively scanned by the X scanning circuit  44 .  
         [0106]     The X output scanning circuit  14 F operates as illustrated in  FIG. 19 . Exactly when the detection element reset line  34  is turned on, the preset switch  41  controlled by the preset line  42  is turned on to preset (PST) the X output line  12 . After that, if the output of the X output line  12  is at a low impedance, the X output line capacitor  43  will be returned to a high voltage by a power source (not shown) connected to the source terminal  10  provided at the other end of the X output line  12 , but if the output of the X output line  12  is at a high impedance, the X output line capacitor  43  will remain preset to a low voltage.  
         [0107]     By successively sampling (SPL) and storing the capacitances of the X output line capacitors  43  then with the sampling switch  46 F controlled by the sampling gate line  47 F, and then reading them out successively by scanning with the X scanning circuit (SCN_X)  44 , it can be determined whether or not there is any which is not irradiated with light or irradiated only at a low level of brightness among the optical detecting elements  3  on the pertinent line. Incidentally, description of the operation of the Y output scanning circuit  13  is dispensed with here because it is the same as that of the X output scanning circuit  14 .  
         [0108]     Since the X output line  12  and the Y output line  11  can be sampled at the same point of time in this embodiment, any influence of a difference in scanning time between the X scanning circuit  44  and the Y scanning circuit can avoided, resulting in an advantage of making possible more accurate optical detection.  
         [0109]     The invention can eliminate crosstalk between displayed images and optical inputs and provide an image display device having an optical touch panel free from input trouble. Further by integrating this optical touch panel with a display, the image display device can be provided at a lower cost.

Technology Category: g