Patent Document

FIELD OF THE INVENTION 
   The present invention relates to a mixer circuit, and more particularly to a mixer circuit having a transconductor with a linear voltage-current transfer function. 
   BACKGROUND OF THE INVENTION 
   Generally, the mixer is a frequency conversion element used in a radio transceiver.  FIG. 1  depicts a block diagram of a conventional mixer. Basically, a mixer comprises a transconductor  10 , a switch quad  20 , and a load circuit  30 . The load circuit  30  comprises a first load (l 1 ) and a second load (l 2 ). Each of the first load (l 1 ) and the second load (l 2 ) has a first terminal to which a voltage source (Vcc) is applied, and a second terminal serving as an output terminal (Out). 
   The switch quad  20  comprises four n-channel transistors Mn 13 , Mn 14 , Mn 15 , and Mn 16 . The drains of the transistors Mn 13 , Mn 15  are coupled to the second terminal of the first load (l 1 ), and the drains of the n-channel transistors Mn 14 , Mn 16  are coupled to the second terminal of the second load (l 2 ). Moreover, the gates of the n-channel transistors Mn 13 , Mn 16  are coupled to each other, and the gates of the n-channel transistors Mn 14 , Mn 15  are coupled to each other. An LO signal (Local Oscillator Signal) is applied to the gates of the n-channel transistors Mn 13  and Mn 14 . Moreover, the sources of the n-channel transistors Mn 13  and Mn 14  are coupled to each other to provide a first current path of the switch quad  20 . The sources of the n-channel transistors Mn 15  and Mn 16  are coupled to each other to provide a second current path of the switch quad  20 . 
   The transconductor  10  comprises two n-channel transistors Mn 17  and Mn 18 . The drain of the n-channel transistor Mn 17  is coupled to the first current path of the switch quad  20 , and the drain of the n-channel transistor Mn 18  is coupled to the second current path of the switch quad  20 . Voltage signals Vin +  and Vin −  are applied to the gates of the n-channel transistors Mn 17  and Mn 18 , respectively. Moreover, the sources of the n-channel transistors Mn 17  and Mn 18  are coupled to the drain of the n-channel transistor Mn 19 . The source of the n-channel transistor Mn 19  is grounded. The n-channel transistor Mn 19  serves as a constant current source due to the gate of the n-channel transistors Mn 19  being applied thereto a fixed DC voltage. 
     FIG. 2  is a timing diagram showing the input/output signals of the conventional mixer. In a small signal differential model, the input voltage signal (Vin=Vin + −Vin − ) is converted to a current signal (Iin) by the transconductor  10 . When the current signal (Iin) is flowing through the first current path and the second current path of the switch quad  20 , the current signal (Iin) is converted to a frequency converted current signal by the driving of the LO signal. Then, the frequency converted current signal is converted to a voltage signal by the load circuit  30  and the voltage signal is outputted from the output terminal (Out). 
     FIG. 3  is a diagram showing a typical voltage-current transfer function of the transconductor in the conventional mixer. As depicted in  FIG. 3 , the voltage to current transfer function is not linear, but quadratic. Because of the non-linear characteristic of the n-channel transistors Mn 17  and Mn 18 , the transfer function between the voltage and the current in the transconductor  10  is non-linear. The conventional mixer suffers from the non-linear characteristic of the transconductor  10 , which prohibits this type of mixer in the high linearity application such as wireless local area network (WLAN) or code division multiple access (CDMA) transmitters. 
   There are several conventional mixers employing transconductors with linear transfer functions.  FIG. 4  depicts a mixer, disclosed in IEEE Journal of Solid-State Circuits. Vol. 40, No. 5, May 2005, having a transconductor with a linear voltage-current transfer function. The following description focuses on the circuit design of the transconductor. 
   As depicted in  FIG. 4 , the transconductor  40  comprises two n-channel transistors Mn 20  and Mn 21 , two operational amplifiers OP 3  and OP 4 , a resistor R 4 , and two current sources I 4 th and I 5 th. The drains of the n-channel transistors Mn 20  and Mn 21  are coupled to the first current path and the second current path of the switch quad, respectively. The output terminal of the operational amplifier OP 3  is coupled to the game of the n-channel transistor Mn 20 , and the negative input terminal of the operational amplifier OP 3  is coupled to the source of the n-channel transistor Mn 20 . The output terminal of the operational amplifier OP 4  is coupled to the gate of the n-channel transistor Mn 21 , and the negative input terminal of the operational amplifier OP 4  is coupled to the source of the n-channel transistor Mn 21 . The input voltage signals Vin +  and Vin −  are applied to the positive input terminals of the operational amplifiers OP 3  and OP 4 , respectively. Moreover, the current source I 4 th is coupled between the source of the n-channel transistor Mn 20  and the ground. The current source I 5 th is coupled between the source of the n-channel transistor Mn 21  and the ground. The resistor R 4  is coupled between the source of the n-channel transistor Mn 20  and the source of the n-channel transistor Mn 21 . 
   In the operational amplifier OP 3 , due to its high open loop gain, the voltage of the positive input terminal is equal to the voltage of the negative input terminal. Similarly, the voltage of the positive input terminal is equal to the voltage of the negative input terminal in the operational amplifier OP 4 . Therefore, in the small signal model, the current Iin is given by the equation Iin=(Vin + −Vin − )/R 4 . The linear voltage-current transfer function can be achieved in the transconductor  40  shown in  FIG. 4 . 
     FIG. 5  depicts a mixer, which is disclosed in IEEE Journal of Solid-State Circuits, Vol. 38, No. 12, December 2003, having a transconductor with a linear voltage-current transfer function. The transconductor  50  comprises two p-channel transistors Mp 1  and Mp 2 , two operational amplifiers OP 5  and OP 6 , a resistor R 5 , and four current sources I 6 th, I 7 th, I 8 th, and I 9 th. The drains of the p-channel transistors Mp 1  and Mp 2  are coupled to the first current path and the second current path of the switch quad, respectively. The output terminal of the operational amplifier OP 5  is coupled to the gate of the p-channel transistor Mp 1 , and the negative input terminal of the operational amplifier OP 5  is coupled to the source of the p-channel transistor Mp 1 . The output terminal of the operational amplifier OP 6  is coupled to the gate of the p-channel transistor Mp 2 , and the negative input terminal of the operational amplifier OP 6  is coupled to the source of the p-channel transistor Mp 2 . The voltage signals Vin +  and Vin −  are applied to the positive input terminals of the operational amplifiers OP 5  and OP 6 , respectively. Moreover, the current source I 6 th is coupled between the source of the p-channel transistor Mp 1  and the voltage source (Vcc), the current source I 7 th is coupled between the source of the of the p-channel transistor Mp 2  and the voltage source (Vcc), the current source I 8 th is coupled between the drain of the p-channel transistor Mp 1  and the ground, and the current source I 9 th is coupled between the drain of the p-channel transistor Mp 2  and the ground. The resistor R 5  is coupled between the sources of the p-channel transistor Mp 1  and the p-channel transistor Mp 2 . 
   Similarly, in the operational amplifier OP 5 , due to its high open loop gain, the voltage of the positive input terminal is equal to the voltage of the negative input terminal, so that the voltage of the positive input terminal is equal to the voltage of the negative input terminal in the operational amplifier OP 6 . Therefore, the current Iin is given by the equation Iin=(Vin + −Vin − )/R 5  in the small model. The linear voltage-current transfer function can be achieved in the transconductor  50  shown in  FIG. 5 . 
     FIG. 6  depicts a mixer, disclosed in IEEE Journal of Solid-State Circuits, Vol. 39, No. 8, August 2004, having a transconductor with a linear voltage-current transfer function. The transconductor  60  comprises two n-channel transistors Mn 22  and Mn 23 , a differential operational amplifier  63 , two resistors R 6  and R 7 , a compensating circuit  64  and a compensating circuit  66 . The drains of the n-channel transistors Mn 22  and Mn 23  are coupled to the first current path and the second current path of the switch quad, respectively. The first output terminal of the differential operational amplifier  63  is coupled to the gate of the n-channel transistor Mn 22 , and the negative input terminal of the differential operational amplifier  63  is coupled to the source of the n-channel transistor Mn 22 . The second output terminal of the differential operational amplifier  63  is coupled to the gate of the n-channel transistor Mn 23 , and the positive input terminal of the differential operational amplifier  63  is coupled to the source of the n-channel transistor Mn 23 . The compensating circuit  64  is coupled between the first output terminal of the differential operational amplifier  63  and the ground, and the compensating circuit  66  is coupled between the second output terminal of the differential operational amplifier  63  and the ground, wherein both the compensating circuit  64  and the compensating circuit  66  comprise a capacitor and a resistor coupled in series. The first terminal of the resistor R 6  is coupled to the negative input terminal of the differential operational amplifier  63 , and the first terminal of the resistor R 7  is coupled to the positive input terminal of the differential operational amplifier  63 . The voltage signals Vin +  and Vin −  are applied to the second terminal of the resistor R 6  and the second terminal of the resistor R 7 , respectively. 
   In view of the differential operational amplifier  63 , due to its high open loop gain, the voltage of the positive input terminal is equal to the voltage of the negative input terminal. Therefore, the current Iin is given by the equation Iin=(Vin + −Vin − )/(R 6 +R 7 ) in the small signal differential model. The linear voltage-current transfer function can be achieved in the transconductor  60  shown in  FIG. 6 . 
     FIG. 7  depicts a mixer, which is disclosed in IEEE Journal of Solid-State Circuits, Vol. 41, No. 8, August 2006, having a transductor with a linear voltage-current transfer function. The transconductor  70  comprises four n-channel transistors Mn 24 , Mn 25 , Mn 26 , and Mn 27 , four current sources I 10 th, I 11 th, I 12 th, and I 13 th, a resistor R 8 , and two p-channel transistors Mp 3  and Mp 4 . The drains of the n-channel transistors Mn 24  and Mn 25  are coupled to the first current path and the second current path of the switch quad, respectively. The current source I 12 th is coupled between the source and the gate of the n-channel transistor Mn 24 , and also coupled between the source and the gate of the n-channel transistor Mn 26 . The current source I 13 th is coupled between the source and the gate of the n-channel transistor Mn 25 , and also coupled between the source and the gate of the n-channel transistor Mn 27 . The drain of the p-channel transistor Mp 3  is coupled to the gate of the n-channel transistor Mn 26 , and the source of the p-channel transistor Mp 3  is coupled to the drain of the n-channel transistor Mn 26 . The drain of the p-channel transistor Mp 4  is coupled to the gate of the n-channel transistor Mn 27 , and the source of the p-channel transistor Mp 4  is coupled to the drain of the n-channel transistor Mn 27 . The resistor R 8  is coupled between the source of the p-channel transistor Mp 3  and the source of the p-channel transistor Mp 4 . The current source I 10 th is coupled between the source of the p-channel transistor Mp 3  and the voltage source (Vcc), and the current source I 11 th is coupled between the source of the p-channel transistor Mp 4  and the voltage source (Vcc). 
   In view of the p-channel transistors Mp 3  and Mp 4 , the voltage of the gate is equal to the voltage of the source due to each transistor being connected as a super source follower. Therefore, the current I′ is given by the equation I′=(Vin + −Vin − )/R 8  in the small signal model. The current Iin is given by the equation Iin=NI′=N(Vin + −Vin − )/R 8  if the aspect ratio of Mn 24  to Mn 26  is N:1 and the aspect ratio of Mn 25  to Mn 27  is N:1. The linear voltage-current transfer function can be achieved in the transconductor  70  shown in  FIG. 7 . 
     FIG. 8  depicts a mixer, which is disclosed in IEEE Journal of Solid-State Circuits, Vol. 41, No. 5, May 2006, having a conductor with a linear voltage-current transfer function. The transconductor  80  comprises four n-channel transistors Mn 5 , Mn 6 , Mn 7 , and Mn 8 , a buffer  87 , and two resistors R 9  and R 10 . The drains of the n-channel transistors Mn 5  and Mn 6  are coupled to the first current path and the second current path of the switch quad, respectively. The sources of the n-channel transistors Mn 5 , Mn 6 , Mn 7 , and Mn 8  are grounded. The gate and the drain of the n-channel transistor Mn 7  are coupled together, the gate of the n-channel transistor Mn 5  and the gate of the n-channel transistor Mn 7  are coupled together, and thus the n-channel transistors Mn 5  and Mn 7  function as a current mirror. The gate and the drain of the n-channel transistor Mn 8  are coupled together, the gate of the n-channel transistor Mn 6  and the gate of the n-channel transistor Mn 8  are coupled together, and thus the n-channel transistors Mn 6  and Mn 8  form a current mirror. The resistor R 9  is coupled between the drain of the n-channel transistor Mn 7  and a voltage source (Vcc), and the resistor R 10  is coupled between the drain of the n-channel transistor Mn 8  and the voltage source (Vcc). The voltage signals Vin +  and Vin −  are applied to the two input terminals of the buffer  87 , and the two output terminals of the buffer  87  are coupled to the gates of the n-channel transistors Mn 7  and Mn 8 , respectively. 
   In the small signal model, the current I′ is given by the equation I′=(Vin + −Vin − )/(R 9 +R 10 ). Also, the current Iin is given by the equation Iin=NI′=N (Vin + −Vin − )/(R 9 +R 10 ) if the aspect ratio of Mn 5  to Mn  7  is N:1 and the aspect ratio of Mn 6  to M 8  is N:1. The linear voltage-current transfer function can be achieved in the transconductor  80  shown in  FIG. 8 . 
   To achieve the transconductor with a linear voltage-current transfer function, the transconductors in the mixers shown in  FIGS. 4 ,  5 , and  6  utilize negative feedback at the source terminals of the transistors. The purpose of the present invention provides a novel mixer having a linear voltage-current transfer function. 
   SUMMARY OF THE INVENTION 
   Therefore, the object of the present invention is to provide a transconductor in a mixer with a liner voltage-current transfer function. 
   The present invention discloses a mixer in a small signal differential model, which comprises: a load circuit; a switch quad coupled to the load circuit, and having a first current path and a second current path, wherein a connecting node between the switch quad and the load circuit is defined as an output terminal; and a transconductor having a first resistor, a first operational amplifier, a second operational amplifier, a first current mirror, and a second current mirror, wherein the first resistor is coupled between a first input terminal of the first operational amplifier and a first input terminal of the second operational amplifier, a current control terminal of the first current mirror is coupled to the first input terminal of the first operational amplifier, a current mirroring terminal of the first current mirror is coupled to the first current path, a current control terminal of the second current mirror is coupled to the first input terminal of the second operational amplifier, a current mirroring terminal of the second current mirror is coupled to the second current path, and a second input terminal of the first operational amplifier and a second input terminal of the second operational amplifier can receive a voltage signal. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The present invention will become readily apparent to those ordinarily skilled in the art after reviewing the following detailed description and accompanying drawings, in which: 
       FIG. 1  depicts a block diagram of a conventional mixer. 
       FIG. 2  is a timing diagram showing the input signal (Vin) and the output signal (Out) of the conventional mixer. 
       FIG. 3  is a diagram showing a voltage-current transfer function of a transconductor in the conventional mixer. 
       FIGS. 4 ,  5 ,  6 ,  7  and  8  depict mixers according to the prior art. 
       FIG. 9  is a mixer according to the first embodiment of the present invention. 
       FIG. 10  is an equivalent circuit of the first embodiment in a small signal differential model. 
       FIG. 11  is a mixer according to the second embodiment of the present invention. 
       FIG. 12  is a mixer according to the third embodiment of the present invention. 
       FIG. 13  is a mixer according to the fourth embodiment of the present invention. 
       FIG. 14  is a mixer according to the fifth embodiment of the present invention. 
       FIG. 15  is a mixer according to the sixth embodiment of the present invention. 
   

   DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     FIG. 9  depicts a mixer according to the first embodiment of the present invention. The main difference between the mixer shown in  FIG. 9  and the conventional mixer shown in  FIG. 1  is the circuit design of the transconductor, and therefore, the following description will be focused on the circuit design of the transconductor. 
   The transductor  100  comprises four n-channel transistors Mn 1 , Mn 2 , Mn 3 , and Mn 4 , two operational amplifiers OP 1  and OP 2 , and two resistors r 1  and r 2 , each having a resistance of R/2. The aspect ratio of Mn 3  to Mn 1  to N:1 and the aspect ratio of Mn 4  to Mn 2  is N:1. 
   The resistor r 1  is coupled between a positive input terminal of the operational amplifier OP 1  and a DC voltage source (Vb), and the resistor r 2  is coupled between a positive input terminal of the operational amplifier OP 2  and the DC voltage source (Vb). The gates of the n-channel transistors Mn 1  and Mn 3  are coupled to each other and the n-channel transistors Mn 1  and Mn 3  operate as a current mirror  110 . The drain of the n-channel transistor Mn 1  serves as a current control terminal of the current mirror  110 , and the drain of the n-channel transistor Mn 3  serves as a current mirroring terminal of the current mirror  110 , which is coupled to the first current path of the switch quad. The sources of the n-channel transistors Mn 1  and Mn 3  are coupled to the ground. The gates of the n-channel transistors Mn 2  and Mn 4  are coupled to each other and the n-channel transistors Mn 2  and Mn 4  operate as a current mirror  120 . The drain of the n-channel transistor Mn 2  serves as a current control terminal of the current mirror  120 , and the drain of the n-channel transistor Mn 4  serves as a current mirroring terminal of the current mirror  120 , which is coupled to the second current path of the switch quad. The sources of the n-channel transistors Mn 2  and Mn 4  are grounded. Moreover, the output terminal of the operational amplifier OP 1  is coupled to the gate of the n-channel transistor Mn 1 , and the output terminal of the operational amplifier OP 2  is coupled to the gate of the n-channel transistor Mn 2 . The voltage signals Vin +  and Vin −  are applied to the negative input terminals of the operational amplifiers OP 1  and OP 2 , respectively. 
     FIG. 10  depicts an equivalent circuit of the first embodiment in the small signal differential model. The resistors r 1  and r 2  are coupled in series (R/2+R/2=R) between the positive terminal of the operational amplifier OP 1  and the positive terminal of the operational amplifier OP 2 . Therefore, the current Ic flowing through the current control terminals of the two current mirrors is given by the equation Ic=(Vin + −Vin − )/R. Also, the current Iin flowing through the current mirroring terminals of the two current mirrors is given by the equation Iin=N*(Vin + −Vin − )/R. The linear voltage-current transfer function is achieved by the transconductor  100  of the first embodiment. 
     FIG. 11  depicts a mixer according to the second embodiment of the present invention. The main difference between the second embodiment and the first embodiment is the circuitry of the current mirror. In  FIG. 11 , each of the current mirrors  230  and  240  comprises cascade transistors. These cascade transistors provide more precise currents to the current control terminals and the current mirroring terminals of the current mirrors  230  and  240 . 
   The current mirror  230  comprises four n-channel transistors Mn 5 , Mn 7 , Mn 9 , and Mn 11 . The aspect ratio of Mn 7  to Mn 5  is N:1. The drain of the n-channel transistor Mn 9  serves as a current control terminal of the current mirror  230 . The source of the n-channel transistor Mn 9  is coupled to the drain of the n-channel transistor Mn 5 . The drain of the n-channel transistor Mn 11  serves as a current mirroring terminal of the current mirror  230 , which is coupled to the first current path of the switch quad. The source of the n-channel transistor Mn 11  is coupled to the drain of the n-channel transistor Mn 7 . The gates of the n-channel transistor Mn 9  and Mn 11  are coupled to a DC bias voltage source Vbias. The gates of the n-channel transistors Mn 5  and Mn 7  are coupled to the output terminal of the operational amplifier OP 1 . The sources of the n-channel transistors Mn 5  and Mn 7  are grounded. 
   Similarly, the current mirror  240  comprises four n-channel transistors Mn 6 , Mn 8 , Mn 10 , and Mn 12 . The aspect ratio of Mn 8  to Mn 6  is N:1. The drain of the n-channel transistor Mn 10  serves as a current control terminal of the current mirror  240 . The source of the n-channel transistor Mn 10  is coupled to the drain of the n-channel transistor Mn 6 . The drain of the n-channel transistor Mn 12  serves as a current mirroring terminal of the current mirror  240 , which is coupled to the second current path of the switch quad. The source of the n-channel transistor Mn 12  is coupled to the drain of the n-channel transistor Mn 8 . The gates of the n-channel transistor Mn 10  and Mn 12  are coupled to the DC bias voltage source Vbias. The gates of the n-channel transistors Mn 6  and Mn 8  are coupled to the output terminal of the operational amplifier OP 2 . The sources of the n-channel transistors Mn 6  and Mn 8  are grounded. 
   The equivalent circuit of the second embodiment in the small signal differential model is the same as the  FIG. 10 . The resistors r 1  and r 2  are coupled in series (R/2+R/2=R) between two positive terminals of the operation amplifiers OP 1  and OP 2 . Therefore, the current Ic flowing through the current control terminals of the two current mirrors is given by the equation Ic=(Vin + −Vin − )/R. The current Iin flowing through the current mirroring terminals of the two current mirrors is given by the equation Iin=N(Vin + −Vin − )/R. The linear voltage-current transfer function is achieved in the transconductor  200  of the second embodiment of the present invention. 
     FIG. 12  depicts a mixer according to the third embodiment of the present invention. The main difference between the third embodiment and the first embodiment is the bias current applied to the resistors r 1  and r 2 . The transconductor  300  comprises two resistors r 1  (R/2) and r 2  (R/2), two operational amplifiers OP 1  and OP 2 , a DC current source I 1 st, and four n-channel transistors Mn 1 , Mn 2 , Mn 3 , and Mn 4 . The aspect ratio of Mn 3  to Mn 1  is N:1 and the aspect ratio of Mn 4  to Mn 2  is N:1. 
   The resistor r 1  is coupled between a positive input terminal of the operational amplifier OP 1  and an output terminal of the current source I 1 st, and the resistor r 2  is coupled between a positive input terminal of the operational amplifier OP 2  and the output terminal of the current source I 1 st. The gates of the n-channel transistors Mn 1  and Mn 3  are coupled to each other and the n-channel transistors Mn 1  and Mn 3  operate as a current mirror  310 . In the current mirror  310 , the drain of the n-channel transistor Mn 1  serves as a current control terminal of the current mirror  310 . The drain of the n-channel transistor Mn 3  serves as a current mirroring terminal of the current mirror  310 , which is coupled to the first current path of the switch quad. The sources of the n-channel transistors Mn 1  and Mn 3  are grounded. The gates of the n-channel transistors Mn 2  and Mn 4  are coupled to each other and the n-channel transistors Mn 2  and Mn 4  operate as a current mirror  320 . In the current mirror  320 , the drain of the n-channel transistor Mn 2  serves as a current control terminal of the current mirror  320 . The drain of the n-channel transistor Mn 4  serves as a current mirroring terminal of the current mirror  320 , which is coupled to the second current path of the switch quad. The sources of the n-channel transistors Mn 2  and Mn 4  are grounded. Moreover, the output terminal of the operational amplifier OP 1  is coupled to the gate of the n-channel transistor Mn 1 , and the output terminal of the operational amplifier OP 2  is coupled to the gate of the n-channel transistor Mn 2 . The voltage signals Vin +  and Vin −  are applied to the negative input terminals of the operational amplifiers OP 1  and OP 2 , respectively. 
   The equivalent circuit of the third embodiment using the small signal differential model is the same as the  FIG. 10 . The resistors r 1  and r 2  are coupled in series (R/2+R/2=R) between the positive terminal of the operational amplifier OP 1  and the positive terminal of the operational amplifier OP 2 . Therefore, the current Ic flowing through the current control terminals of the two current mirrors is given by the equation Ic=(Vin + −Vin − )/R. The current Iin flowing through the current mirroring terminals of the two current mirrors is given by the equation Iin=N (Vin + −Vin − )/R. The linear voltage-current transfer function is achieved in the transconductor  300  of the third embodiment of the present invention. 
     FIG. 13  depicts a mixer according to the fourth embodiment of the present invention. The main difference between the fourth embodiment and the third embodiment is the design of the current mirror. Each of the current mirrors  430  and  440  comprises cascade transistors. These cascade transistors provide more precise currents to the current control terminals and the current mirroring terminals of the current mirrors  430  and  440 . 
   The current mirror  430  comprise four n-channel transistors Mn 5 , Mn 7 , Mn 9 , and Mn 11 . The aspect ratio of Mn 7  to Mn 5  is N:1. The drain of the n-channel transistor Mn 9  serves as a current control terminal of the current mirror  430 . The source of the n-channel transistor Mn 9  is coupled to the drain of the n-channel transistor Mn 5 . The drain of the n-channel transistor Mn 11  serves as a current mirroring terminal of the current mirror  430 , which is coupled to the first current path of the switch quad. The source of the n-channel transistor Mn 11  is coupled to the drain of the n-channel transistor Mn 7 . The gates of the n-channel transistor Mn 9  and Mn 11  are coupled to the DC bias voltage source Vbias. The gates of the n-channel transistors Mn 5  and Mn 7  are coupled to the output terminal of the operational amplifier OP 1 . The sources of the n-channel transistors Mn 5  and Mn 7  are grounded. The current mirror  440  comprises four n-channel transistors Mn 6 , Mn 8 , Mn 10 , and Mn 12 . The aspect ratio of Mn 8  to Mn 6  is N:1. The drain of the n-channel transistor Mn 10  serves as a current control terminal of the current mirror  440 . The source of the n-channel transistor Mn 10  is coupled to the drain of the n-channel transistor Mn 6 . The drain of the n-channel transistor Mn 12  serves as a current mirroring terminal of the current mirror  440 , which is coupled to the second current path of the switch quad. The source of the n-channel transistor Mn 12  is coupled to the drain of the n-channel transistor Mn 8 . The gates of the n-channel transistor Mn 10  and Mn 12  are coupled to the DC bias voltage source Vbias. The gates of the n-channel transistors Mn 6  and Mn 8  are coupled to the output terminal of the operational amplifier OP 2 . The sources of the n-channel transistors Mn 6  and Mn 8  are grounded. 
   The equivalent circuit of the fourth embodiment in the small signal differential model is the same as the  FIG. 10 . The resistors r 1  and r 2  are coupled in series (R/2+R/2=R) between the positive terminal of the operational amplifier OP 1  and the positive terminal of the operational amplifier OP 2 . Therefore, the current Ic flowing through the current control terminals of the two current mirrors is given by the equation Ic=(Vin + −Vin − )/R. The current Iin flowing through the current mirroring terminals of the two current mirrors is given by the equation Iin=N(Vin + −Vin − )/R. The linear voltage-current transfer function is achieved in the transconductor  400  of the fourth embodiment of the present invention. 
     FIG. 14  depicts a mixer according to the fifth embodiment of the present invention. The main difference between the fifth embodiment and the first embodiment is the bias currents applied to the resistor r 3 . The transconductor  500  comprises a resistor r 3  having a resistor value of R, two current sources I 2 nd and I 3 rd, two operational amplifiers OP 1  and OP 2 , and four n-channel transistors Mn 1 , Mn 2 , Mn 3 , and Mn 4 . The aspect ratio of Mn 3  to Mn 1  is N:1 and the aspect ratio of Mn 4  to Mn 2  is N:1. The resistor r 3  is coupled between a positive input terminal of the operational amplifier OP 1  and a positive input terminal of the operational amplifier OP 2 . The output terminal of the current source I 2 nd is coupled to the positive input terminal of the operational amplifier OP 1 , and the output terminal of the current source I 3 rd is coupled to the positive input terminal of the operational amplifier OP 2 . The gates of the n-channel transistors Mn 1  and Mn 3  are coupled to each other and the n-channel transistors Mn 1  and Mn 3  operate as a current mirror  510 . In the current mirror  510 , the drain of the n-channel transistor Mn 1  serves as a current control terminal of the current mirror  510 . The drain of the n-channel transistor Mn 3  serves as a current mirroring terminal of the current mirror  510 , which is coupled to the first current path of the switch quad. The sources of the n-channel transistors Mn 1  and Mn 3  are grounded. The gates of the n-channel transistors Mn 2  and Mn 4  are coupled to each other and the n-channel transistors Mn 2  and Mn 4  operate as a current mirror  520 . The drain of the n-channel transistor Mn 2  serves as a current control terminal of the current mirror  520 . The drain of the n-channel transistor Mn 4  serves as a current mirroring terminal of the current mirror  520 , which is coupled to the second current path of the switch quad. The sources of the n-channel transistors Mn 2  and Mn 4  are grounded. Moreover, the output terminal of the operational amplifier OP 1  is coupled to the gate of the n-channel transistor Mn 1 , and the output terminal of the operational amplifier OP 2  is coupled to the gate of the n-channel transistor Mn 2 . The voltage signals Vin +  and Vin −  are applied to the negative input terminals of the operational amplifiers OP 1  and OP 2 , respectively. 
   The equivalent circuit of the fifth embodiment using a small signal differential model is the same as the  FIG. 10 . The resistor r 3  is coupled between the positive terminal of the operational amplifier OP 1  and the positive terminal of the operational amplifier OP 2 . Therefore, the current Ic flowing through the current control terminals of these two current mirrors is given by the equation Ic=(Vin + −Vin − )/R. The current Iin flowing through the current mirroring terminals of these two current mirrors is given by the equation Iin=N*(Vin + −Vin − )/R. The linear voltage-current transfer function can be achieved in the transconductor  500  of the fifth embodiment of the present invention. 
     FIG. 15  depicts a mixer according to the sixth embodiment of the present invention. The main difference between the sixth embodiment and the fifth embodiment is the circuitry of the current mirror. Each of the current mirrors  630  and  640  comprises cascade transistors. These cascade transistors provide more precise currents to the current control terminals and the current mirroring terminals of the current mirror  630  and the current mirror  640 . 
   The current mirror  630  comprises four n-channel transistors Mn 5 , Mn 7 , Mn 9 , and Mn 11 . The aspect ratio of Mn 7  to Mn 5  is N:1. The drain of the n-channel transistor Mn 9  serves as a current control terminal of the current mirror  630 . The source of the n-channel transistor Mn 9  is coupled to the drain of the n-channel transistor Mn 5 . The drain of the n-channel transistor Mn 11  serves as a current mirroring terminal of the current mirror  630 , which is coupled to the first current path of the switch quad. The source of the n-channel transistor Mn 11  is coupled to the drain of the n-channel transistor Mn 7 . The gates of the n-channel transistors Mn 9  and Mn 11  are coupled to the DC bias voltage source (Vbias). The gates of the n-channel transistors Mn 5  and Mn 7  are coupled to the output terminal of the operational amplifier OP 1 . The sources of the n-channel transistors Mn 5  and Mn 7  are grounded. The current mirror  640  comprises four n-channel transistors Mn 6 , Mn 8 , Mn 10 , and Mn 12 . The aspect ratio of Mn 8  to Mn 6  is N:1. The drain of the n-channel transistor Mn 10  serves as a current control terminal of the current mirror  640 . The source of the n-channel transistor Mn 10  is coupled to the drain of the n-channel transistor Mn 6 . The drain of the n-channel transistor Mn 12  serves as a current mirroring terminal of the current mirror  640 , which is coupled to the second current path of the switch quad. The source of the n-channel transistor Mn 12  is coupled to the drain of the n-channel transistor Mn 8 . The gates of the n-channel transistors Mn 10  and Mn 12  are coupled to the DC bias voltage source (Vbias). The gates of the n-channel transistors Mn 6  and Mn 8  are coupled to the output terminal of the operational amplifier OP 2 . The sources of the n-channel transistors Mn 6  and Mn 8  are grounded. 
   The equivalent circuit of the sixth embodiment in a small signal differential model is the same as the  FIG. 10 . The resistor r 3  (R) is coupled between the positive terminals of the operational amplifiers OP 1  and OP 2 . Therefore, the current Ic flowing through the current control terminals of the two current mirrors is given by the equation Ic=(Vin + −Vin − )/R. The current Iin flowing through the current mirroring terminals of the two current mirrors is given by the equation Iin=N* (Vin + −Vin − )/R. The linear voltage-current transfer function is achieved in the transconductor  600  in this embodiment. 
   From the above-mentioned embodiments, the mixers have different DC biasing circuits, but have the same equivalent circuit in the small signal differential model. Furthermore, the linear voltage-current transfer function is achieved in transconductors of all embodiments by using the negative feedback feature of the operational amplifier and using a resistor coupled between the drains of two transistors. 
   While the invention has been described in terms of what is presently considered to be the most practical and preferred embodiments, it is to be understood that the invention needs not be limited to the disclosed embodiments. On the contrary, it covers various modifications and similar arrangements included within the spirit and scope of the appended claims, which are to be accorded with the broadest interpretation so as to encompass all such modifications and similar structures.

Technology Category: h